if_urtwn.c revision 302034
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/urtwn/if_urtwn.c 302034 2016-06-20 22:39:32Z avos $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 73297596Sadrian#include <net80211/ieee80211_superg.h> 74297596Sadrian#endif 75251538Srpaulo 76251538Srpaulo#include <dev/usb/usb.h> 77251538Srpaulo#include <dev/usb/usbdi.h> 78291902Skevlo#include <dev/usb/usb_device.h> 79251538Srpaulo#include "usbdevs.h" 80251538Srpaulo 81251538Srpaulo#include <dev/usb/usb_debug.h> 82251538Srpaulo 83297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 84297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 85251538Srpaulo 86251538Srpaulo#ifdef USB_DEBUG 87294471Savosenum { 88294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 89294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 90294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 91294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 92294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 93294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 94294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 95294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 96294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 97294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 98294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 99294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 100297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 101294471Savos URTWN_DEBUG_ANY = 0xffffffff 102294471Savos}; 103251538Srpaulo 104294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 105294471Savos if ((_sc)->sc_debug & (_m)) \ 106294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 107294471Savos} while(0) 108294471Savos 109294471Savos#else 110294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 111251538Srpaulo#endif 112251538Srpaulo 113288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 114251538Srpaulo 115297175Sadrianstatic int urtwn_enable_11n = 1; 116297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 117297175Sadrian 118251538Srpaulo/* various supported device vendors/products */ 119251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 120251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 121264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 122264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 123264912Skevlo#define URTWN_RTL8188E 1 124251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 127251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 128266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 129251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 132251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 133251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 135251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 140251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 141251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 145252196Skevlo URTWN_DEV(DLINK, DWA131B), 146251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 147251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 148251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 150251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 151251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 152251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 153251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 154251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 155251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 156251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 157251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 163251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 169282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 170251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 174272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 175251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 178251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 181251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 183251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 184264912Skevlo /* URTWN_RTL8188E */ 185295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 186273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 187270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 188273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 189264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 191264912Skevlo#undef URTWN_RTL8188E_DEV 192251538Srpaulo#undef URTWN_DEV 193251538Srpaulo}; 194251538Srpaulo 195251538Srpaulostatic device_probe_t urtwn_match; 196251538Srpaulostatic device_attach_t urtwn_attach; 197251538Srpaulostatic device_detach_t urtwn_detach; 198251538Srpaulo 199251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 200251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 201251538Srpaulo 202294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 203294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 204287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 205287197Sglebius struct usb_device_request *, void *); 206251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 207251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 208251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 210251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 211302034Savosstatic void urtwn_vap_clear_tx(struct urtwn_softc *, 212302034Savos struct ieee80211vap *); 213302034Savosstatic void urtwn_vap_clear_tx_queue(struct urtwn_softc *, 214302034Savos urtwn_datahead *, struct ieee80211vap *); 215292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 216292207Savos struct r92c_rx_stat *, int); 217292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 218292207Savos struct urtwn_data *); 219292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 220292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 221292167Savos void *); 222292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 223292207Savos struct mbuf *, int8_t *); 224289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 225289891Savos int); 226281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 227251538Srpaulo struct urtwn_data[], int, int); 228251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 229251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 230251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 231251538Srpaulo struct urtwn_data data[], int); 232289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 233289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 234251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 235251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 236291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 237251538Srpaulo uint8_t *, int); 238291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 239291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 240291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 241291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 242251538Srpaulo uint8_t *, int); 243251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 244251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 245251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 246281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 247251538Srpaulo const void *, int); 248292174Savosstatic void urtwn_cmdq_cb(void *, int); 249292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 250292174Savos size_t, CMD_FUNC_PROTO); 251264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 252264912Skevlo uint8_t, uint32_t); 253281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 254264912Skevlo uint8_t, uint32_t); 255251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 256281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 257251538Srpaulo uint32_t); 258291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 259291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 260291264Savos uint8_t, uint8_t); 261294471Savos#ifdef USB_DEBUG 262291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 263291264Savos uint8_t *, uint16_t); 264291264Savos#endif 265291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 266291264Savos uint16_t); 267291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 268251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 269291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 270291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 271251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 272290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 273290631Savos struct urtwn_vap *); 274290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 275290631Savos struct ieee80211_node *); 276290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 277290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 278290631Savos struct urtwn_vap *); 279292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 280292175Savos struct ieee80211_key *, ieee80211_keyix *, 281292175Savos ieee80211_keyix *); 282292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 283292175Savos union sec_param *); 284292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 285292175Savos union sec_param *); 286292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 287292175Savos const struct ieee80211_key *); 288292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 289292175Savos const struct ieee80211_key *); 290290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 291290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 292290631Savos struct ieee80211vap *); 293292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 294251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 295289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 296290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 297290651Savos struct mbuf *, int, 298290651Savos const struct ieee80211_rx_stats *, int, int); 299281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 300251538Srpaulo enum ieee80211_state, int); 301294473Savosstatic void urtwn_calib_to(void *); 302294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 303294473Savos union sec_param *); 304251538Srpaulostatic void urtwn_watchdog(void *); 305251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 306251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 307264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 308290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 309251538Srpaulo struct ieee80211_node *, struct mbuf *, 310251538Srpaulo struct urtwn_data *); 311292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 312292221Savos struct ieee80211_node *, struct mbuf *, 313292221Savos struct urtwn_data *, 314292221Savos const struct ieee80211_bpf_params *); 315290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 316290630Savos uint8_t, struct urtwn_data *); 317287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 318287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 319287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 320264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 321264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 322295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 323295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 324251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 325295871Savos#ifndef URTWN_WITHOUT_UCODE 326251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 327264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 328281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 329251538Srpaulo const uint8_t *, int); 330251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 331295871Savos#endif 332291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 333291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 334251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 335251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 336251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 337292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 338292175Savos uint32_t); 339251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 340251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 341251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 342281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 343251538Srpaulo uint16_t[]); 344251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 345281069Srpaulo struct ieee80211_channel *, 346251538Srpaulo struct ieee80211_channel *, uint16_t[]); 347264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 348281069Srpaulo struct ieee80211_channel *, 349264912Skevlo struct ieee80211_channel *, uint16_t[]); 350251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 351281069Srpaulo struct ieee80211_channel *, 352251538Srpaulo struct ieee80211_channel *); 353290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 354290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 355251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 356251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 357300754Savosstatic void urtwn_getradiocaps(struct ieee80211com *, int, int *, 358300754Savos struct ieee80211_channel[]); 359251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 360292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 361294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 362294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 363294465Savos union sec_param *); 364294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 365299965Savosstatic uint8_t urtwn_get_multi_pos(const uint8_t[]); 366299965Savosstatic void urtwn_set_multi(struct urtwn_softc *); 367290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 368290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 369289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 370297910Sadrianstatic struct ieee80211_node *urtwn_node_alloc(struct ieee80211vap *, 371292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 372297910Sadrianstatic void urtwn_newassoc(struct ieee80211_node *, int); 373297910Sadrianstatic void urtwn_node_free(struct ieee80211_node *); 374251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 375281069Srpaulo struct ieee80211_channel *, 376251538Srpaulo struct ieee80211_channel *); 377251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 378251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 379294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 380301762Savosstatic void urtwn_setup_static_keys(struct urtwn_softc *, 381301762Savos struct urtwn_vap *); 382291698Savosstatic int urtwn_init(struct urtwn_softc *); 383287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 384251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 385251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 386251538Srpaulo const struct ieee80211_bpf_params *); 387266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 388251538Srpaulo 389251538Srpaulo/* Aliases. */ 390251538Srpaulo#define urtwn_bb_write urtwn_write_4 391251538Srpaulo#define urtwn_bb_read urtwn_read_4 392251538Srpaulo 393251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 394251538Srpaulo [URTWN_BULK_RX] = { 395251538Srpaulo .type = UE_BULK, 396251538Srpaulo .endpoint = UE_ADDR_ANY, 397251538Srpaulo .direction = UE_DIR_IN, 398251538Srpaulo .bufsize = URTWN_RXBUFSZ, 399251538Srpaulo .flags = { 400251538Srpaulo .pipe_bof = 1, 401251538Srpaulo .short_xfer_ok = 1 402251538Srpaulo }, 403251538Srpaulo .callback = urtwn_bulk_rx_callback, 404251538Srpaulo }, 405251538Srpaulo [URTWN_BULK_TX_BE] = { 406251538Srpaulo .type = UE_BULK, 407251538Srpaulo .endpoint = 0x03, 408251538Srpaulo .direction = UE_DIR_OUT, 409251538Srpaulo .bufsize = URTWN_TXBUFSZ, 410251538Srpaulo .flags = { 411251538Srpaulo .ext_buffer = 1, 412251538Srpaulo .pipe_bof = 1, 413251538Srpaulo .force_short_xfer = 1 414251538Srpaulo }, 415251538Srpaulo .callback = urtwn_bulk_tx_callback, 416251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 417251538Srpaulo }, 418251538Srpaulo [URTWN_BULK_TX_BK] = { 419251538Srpaulo .type = UE_BULK, 420251538Srpaulo .endpoint = 0x03, 421251538Srpaulo .direction = UE_DIR_OUT, 422251538Srpaulo .bufsize = URTWN_TXBUFSZ, 423251538Srpaulo .flags = { 424251538Srpaulo .ext_buffer = 1, 425251538Srpaulo .pipe_bof = 1, 426251538Srpaulo .force_short_xfer = 1, 427251538Srpaulo }, 428251538Srpaulo .callback = urtwn_bulk_tx_callback, 429251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 430251538Srpaulo }, 431251538Srpaulo [URTWN_BULK_TX_VI] = { 432251538Srpaulo .type = UE_BULK, 433251538Srpaulo .endpoint = 0x02, 434251538Srpaulo .direction = UE_DIR_OUT, 435251538Srpaulo .bufsize = URTWN_TXBUFSZ, 436251538Srpaulo .flags = { 437251538Srpaulo .ext_buffer = 1, 438251538Srpaulo .pipe_bof = 1, 439251538Srpaulo .force_short_xfer = 1 440251538Srpaulo }, 441251538Srpaulo .callback = urtwn_bulk_tx_callback, 442251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 443251538Srpaulo }, 444251538Srpaulo [URTWN_BULK_TX_VO] = { 445251538Srpaulo .type = UE_BULK, 446251538Srpaulo .endpoint = 0x02, 447251538Srpaulo .direction = UE_DIR_OUT, 448251538Srpaulo .bufsize = URTWN_TXBUFSZ, 449251538Srpaulo .flags = { 450251538Srpaulo .ext_buffer = 1, 451251538Srpaulo .pipe_bof = 1, 452251538Srpaulo .force_short_xfer = 1 453251538Srpaulo }, 454251538Srpaulo .callback = urtwn_bulk_tx_callback, 455251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 456251538Srpaulo }, 457251538Srpaulo}; 458251538Srpaulo 459292014Savosstatic const struct wme_to_queue { 460292014Savos uint16_t reg; 461292014Savos uint8_t qid; 462292014Savos} wme2queue[WME_NUM_AC] = { 463292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 464292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 465292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 466292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 467292014Savos}; 468292014Savos 469300754Savosstatic const uint8_t urtwn_chan_2ghz[] = 470300754Savos { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 471300754Savos 472251538Srpaulostatic int 473251538Srpaulourtwn_match(device_t self) 474251538Srpaulo{ 475251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 476251538Srpaulo 477251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 478251538Srpaulo return (ENXIO); 479251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 480251538Srpaulo return (ENXIO); 481251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 482251538Srpaulo return (ENXIO); 483251538Srpaulo 484251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 485251538Srpaulo} 486251538Srpaulo 487297175Sadrianstatic void 488297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 489297175Sadrian{ 490297175Sadrian} 491297175Sadrian 492251538Srpaulostatic int 493297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 494297175Sadrian{ 495297175Sadrian 496297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 497297175Sadrian return (0); 498297175Sadrian} 499297175Sadrian 500297175Sadrianstatic int 501251538Srpaulourtwn_attach(device_t self) 502251538Srpaulo{ 503251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 504251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 505287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 506251538Srpaulo int error; 507251538Srpaulo 508251538Srpaulo device_set_usb_desc(self); 509251538Srpaulo sc->sc_udev = uaa->device; 510251538Srpaulo sc->sc_dev = self; 511264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 512264912Skevlo sc->chip |= URTWN_CHIP_88E; 513251538Srpaulo 514294471Savos#ifdef USB_DEBUG 515294471Savos int debug; 516294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 517294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 518294471Savos sc->sc_debug = debug; 519294471Savos#endif 520294471Savos 521251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 522251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 523292174Savos URTWN_CMDQ_LOCK_INIT(sc); 524292167Savos URTWN_NT_LOCK_INIT(sc); 525294473Savos callout_init(&sc->sc_calib_to, 0); 526251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 527287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 528251538Srpaulo 529291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 530291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 531291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 532251538Srpaulo if (error) { 533251538Srpaulo device_printf(self, "could not allocate USB transfers, " 534251538Srpaulo "err=%s\n", usbd_errstr(error)); 535251538Srpaulo goto detach; 536251538Srpaulo } 537251538Srpaulo 538251538Srpaulo URTWN_LOCK(sc); 539251538Srpaulo 540251538Srpaulo error = urtwn_read_chipid(sc); 541251538Srpaulo if (error) { 542251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 543251538Srpaulo URTWN_UNLOCK(sc); 544251538Srpaulo goto detach; 545251538Srpaulo } 546251538Srpaulo 547251538Srpaulo /* Determine number of Tx/Rx chains. */ 548251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 549251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 550251538Srpaulo sc->nrxchains = 2; 551251538Srpaulo } else { 552251538Srpaulo sc->ntxchains = 1; 553251538Srpaulo sc->nrxchains = 1; 554251538Srpaulo } 555251538Srpaulo 556264912Skevlo if (sc->chip & URTWN_CHIP_88E) 557291264Savos error = urtwn_r88e_read_rom(sc); 558264912Skevlo else 559291264Savos error = urtwn_read_rom(sc); 560291264Savos if (error != 0) { 561291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 562291264Savos __func__, error); 563291264Savos URTWN_UNLOCK(sc); 564291264Savos goto detach; 565291264Savos } 566264912Skevlo 567251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 568251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 569264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 570251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 571251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 572251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 573251538Srpaulo 574251538Srpaulo URTWN_UNLOCK(sc); 575251538Srpaulo 576283537Sglebius ic->ic_softc = sc; 577283527Sglebius ic->ic_name = device_get_nameunit(self); 578251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 579251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 580251538Srpaulo 581251538Srpaulo /* set device capabilities */ 582251538Srpaulo ic->ic_caps = 583251538Srpaulo IEEE80211_C_STA /* station mode */ 584251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 585290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 586290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 587251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 588251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 589297175Sadrian#if 0 590251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 591297175Sadrian#endif 592251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 593292014Savos | IEEE80211_C_WME /* 802.11e */ 594297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 595297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 596251538Srpaulo ; 597251538Srpaulo 598292175Savos ic->ic_cryptocaps = 599292175Savos IEEE80211_CRYPTO_WEP | 600292175Savos IEEE80211_CRYPTO_TKIP | 601292175Savos IEEE80211_CRYPTO_AES_CCM; 602292175Savos 603297175Sadrian /* Assume they're all 11n capable for now */ 604297175Sadrian if (urtwn_enable_11n) { 605297175Sadrian device_printf(self, "enabling 11n\n"); 606297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 607297601Sadrian#if 0 608297175Sadrian IEEE80211_HTC_AMPDU | 609297601Sadrian#endif 610297175Sadrian IEEE80211_HTC_AMSDU | 611297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 612297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 613297175Sadrian /* no HT40 just yet */ 614297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 615297175Sadrian 616297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 617297175Sadrian ic->ic_txstream = sc->ntxchains; 618297175Sadrian ic->ic_rxstream = sc->nrxchains; 619297175Sadrian } 620297175Sadrian 621300754Savos /* XXX TODO: setup regdomain if R92C_CHANNEL_PLAN_BY_HW bit is set. */ 622251538Srpaulo 623300754Savos urtwn_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 624300754Savos ic->ic_channels); 625300754Savos 626287197Sglebius ieee80211_ifattach(ic); 627251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 628251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 629251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 630300754Savos ic->ic_getradiocaps = urtwn_getradiocaps; 631251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 632287197Sglebius ic->ic_transmit = urtwn_transmit; 633287197Sglebius ic->ic_parent = urtwn_parent; 634251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 635251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 636292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 637294465Savos ic->ic_updateslot = urtwn_update_slot; 638290564Savos ic->ic_update_promisc = urtwn_update_promisc; 639251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 640292167Savos if (sc->chip & URTWN_CHIP_88E) { 641297910Sadrian ic->ic_node_alloc = urtwn_node_alloc; 642297910Sadrian ic->ic_newassoc = urtwn_newassoc; 643292167Savos sc->sc_node_free = ic->ic_node_free; 644297910Sadrian ic->ic_node_free = urtwn_node_free; 645292167Savos } 646297175Sadrian ic->ic_update_chw = urtwn_update_chw; 647297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 648251538Srpaulo 649281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 650251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 651251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 652251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 653251538Srpaulo 654292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 655292174Savos 656294471Savos urtwn_sysctlattach(sc); 657294471Savos 658251538Srpaulo if (bootverbose) 659251538Srpaulo ieee80211_announce(ic); 660251538Srpaulo 661251538Srpaulo return (0); 662251538Srpaulo 663251538Srpaulodetach: 664251538Srpaulo urtwn_detach(self); 665251538Srpaulo return (ENXIO); /* failure */ 666251538Srpaulo} 667251538Srpaulo 668294471Savosstatic void 669294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 670294471Savos{ 671294471Savos#ifdef USB_DEBUG 672294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 673294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 674294471Savos 675294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 676294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 677294471Savos "control debugging printfs"); 678294471Savos#endif 679294471Savos} 680294471Savos 681251538Srpaulostatic int 682251538Srpaulourtwn_detach(device_t self) 683251538Srpaulo{ 684251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 685287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 686263153Skevlo unsigned int x; 687281069Srpaulo 688263153Skevlo /* Prevent further ioctls. */ 689263153Skevlo URTWN_LOCK(sc); 690263153Skevlo sc->sc_flags |= URTWN_DETACHED; 691263153Skevlo URTWN_UNLOCK(sc); 692251538Srpaulo 693291698Savos urtwn_stop(sc); 694291698Savos 695251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 696294473Savos callout_drain(&sc->sc_calib_to); 697251538Srpaulo 698288353Sadrian /* stop all USB transfers */ 699288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 700288353Sadrian 701263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 702263153Skevlo URTWN_LOCK(sc); 703263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 704263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 705263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 706263153Skevlo 707263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 708263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 709263153Skevlo URTWN_UNLOCK(sc); 710263153Skevlo 711263153Skevlo /* drain USB transfers */ 712263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 713263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 714263153Skevlo 715263153Skevlo /* Free data buffers. */ 716263153Skevlo URTWN_LOCK(sc); 717263153Skevlo urtwn_free_tx_list(sc); 718263153Skevlo urtwn_free_rx_list(sc); 719263153Skevlo URTWN_UNLOCK(sc); 720263153Skevlo 721292174Savos if (ic->ic_softc == sc) { 722292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 723292174Savos ieee80211_ifdetach(ic); 724292174Savos } 725292174Savos 726292167Savos URTWN_NT_LOCK_DESTROY(sc); 727292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 728251538Srpaulo mtx_destroy(&sc->sc_mtx); 729251538Srpaulo 730251538Srpaulo return (0); 731251538Srpaulo} 732251538Srpaulo 733251538Srpaulostatic void 734289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 735251538Srpaulo{ 736289066Skevlo struct mbuf *m; 737289066Skevlo struct ieee80211_node *ni; 738289066Skevlo URTWN_ASSERT_LOCKED(sc); 739289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 740289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 741289066Skevlo m->m_pkthdr.rcvif = NULL; 742289066Skevlo ieee80211_free_node(ni); 743289066Skevlo m_freem(m); 744251538Srpaulo } 745251538Srpaulo} 746251538Srpaulo 747251538Srpaulostatic usb_error_t 748251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 749251538Srpaulo void *data) 750251538Srpaulo{ 751251538Srpaulo usb_error_t err; 752251538Srpaulo int ntries = 10; 753251538Srpaulo 754251538Srpaulo URTWN_ASSERT_LOCKED(sc); 755251538Srpaulo 756251538Srpaulo while (ntries--) { 757251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 758251538Srpaulo req, data, 0, NULL, 250 /* ms */); 759251538Srpaulo if (err == 0) 760251538Srpaulo break; 761251538Srpaulo 762294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 763294471Savos "%s: control request failed, %s (retries left: %d)\n", 764294471Savos __func__, usbd_errstr(err), ntries); 765251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 766251538Srpaulo } 767251538Srpaulo return (err); 768251538Srpaulo} 769251538Srpaulo 770251538Srpaulostatic struct ieee80211vap * 771251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 772251538Srpaulo enum ieee80211_opmode opmode, int flags, 773251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 774251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 775251538Srpaulo{ 776290631Savos struct urtwn_softc *sc = ic->ic_softc; 777251538Srpaulo struct urtwn_vap *uvp; 778251538Srpaulo struct ieee80211vap *vap; 779251538Srpaulo 780251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 781251538Srpaulo return (NULL); 782251538Srpaulo 783287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 784251538Srpaulo vap = &uvp->vap; 785251538Srpaulo /* enable s/w bmiss handling for sta mode */ 786251538Srpaulo 787281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 788287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 789257743Shselasky /* out of memory */ 790257743Shselasky free(uvp, M_80211_VAP); 791257743Shselasky return (NULL); 792257743Shselasky } 793257743Shselasky 794290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 795290631Savos urtwn_init_beacon(sc, uvp); 796290631Savos 797251538Srpaulo /* override state transition machine */ 798251538Srpaulo uvp->newstate = vap->iv_newstate; 799251538Srpaulo vap->iv_newstate = urtwn_newstate; 800290631Savos vap->iv_update_beacon = urtwn_update_beacon; 801292175Savos vap->iv_key_alloc = urtwn_key_alloc; 802292175Savos vap->iv_key_set = urtwn_key_set; 803292175Savos vap->iv_key_delete = urtwn_key_delete; 804298138Sadrian 805298138Sadrian /* 802.11n parameters */ 806298138Sadrian vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 807298175Sadrian vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 808298138Sadrian 809290651Savos if (opmode == IEEE80211_M_IBSS) { 810290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 811290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 812290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 813290651Savos } 814251538Srpaulo 815292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 816292167Savos ieee80211_ratectl_init(vap); 817251538Srpaulo /* complete setup */ 818251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 819287197Sglebius ieee80211_media_status, mac); 820251538Srpaulo ic->ic_opmode = opmode; 821251538Srpaulo return (vap); 822251538Srpaulo} 823251538Srpaulo 824251538Srpaulostatic void 825251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 826251538Srpaulo{ 827290651Savos struct ieee80211com *ic = vap->iv_ic; 828292167Savos struct urtwn_softc *sc = ic->ic_softc; 829251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 830251538Srpaulo 831302034Savos /* Guarantee that nothing will go through this vap. */ 832302034Savos ieee80211_new_state(vap, IEEE80211_S_INIT, -1); 833302034Savos ieee80211_draintask(ic, &vap->iv_nstate_task); 834302034Savos 835302034Savos URTWN_LOCK(sc); 836290651Savos if (uvp->bcn_mbuf != NULL) 837290651Savos m_freem(uvp->bcn_mbuf); 838302034Savos /* Cancel any unfinished Tx. */ 839302034Savos urtwn_vap_clear_tx(sc, vap); 840302034Savos URTWN_UNLOCK(sc); 841290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 842290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 843292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 844292167Savos ieee80211_ratectl_deinit(vap); 845251538Srpaulo ieee80211_vap_detach(vap); 846251538Srpaulo free(uvp, M_80211_VAP); 847251538Srpaulo} 848251538Srpaulo 849302034Savosstatic void 850302034Savosurtwn_vap_clear_tx(struct urtwn_softc *sc, struct ieee80211vap *vap) 851302034Savos{ 852302034Savos 853302034Savos URTWN_ASSERT_LOCKED(sc); 854302034Savos 855302034Savos urtwn_vap_clear_tx_queue(sc, &sc->sc_tx_active, vap); 856302034Savos urtwn_vap_clear_tx_queue(sc, &sc->sc_tx_pending, vap); 857302034Savos} 858302034Savos 859302034Savosstatic void 860302034Savosurtwn_vap_clear_tx_queue(struct urtwn_softc *sc, urtwn_datahead *head, 861302034Savos struct ieee80211vap *vap) 862302034Savos{ 863302034Savos struct urtwn_data *dp, *tmp; 864302034Savos 865302034Savos STAILQ_FOREACH_SAFE(dp, head, next, tmp) { 866302034Savos if (dp->ni != NULL) { 867302034Savos if (dp->ni->ni_vap == vap) { 868302034Savos ieee80211_free_node(dp->ni); 869302034Savos dp->ni = NULL; 870302034Savos 871302034Savos if (dp->m != NULL) { 872302034Savos m_freem(dp->m); 873302034Savos dp->m = NULL; 874302034Savos } 875302034Savos 876302034Savos STAILQ_REMOVE(head, dp, urtwn_data, next); 877302034Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, dp, 878302034Savos next); 879302034Savos } 880302034Savos } 881302034Savos } 882302034Savos} 883302034Savos 884251538Srpaulostatic struct mbuf * 885292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 886292207Savos int totlen) 887251538Srpaulo{ 888287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 889251538Srpaulo struct mbuf *m; 890292207Savos uint32_t rxdw0; 891292207Savos int pktlen; 892251538Srpaulo 893251538Srpaulo /* 894251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 895251538Srpaulo * RUNNING. 896251538Srpaulo */ 897287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 898251538Srpaulo return (NULL); 899251538Srpaulo 900251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 901251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 902251538Srpaulo /* 903251538Srpaulo * This should not happen since we setup our Rx filter 904251538Srpaulo * to not receive these frames. 905251538Srpaulo */ 906294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 907294471Savos "%s: RX flags error (%s)\n", __func__, 908292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 909292207Savos goto fail; 910251538Srpaulo } 911292207Savos 912292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 913292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 914294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 915294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 916292207Savos goto fail; 917271303Skevlo } 918251538Srpaulo 919292207Savos if (__predict_false(totlen > MCLBYTES)) { 920292207Savos /* convert to m_getjcl if this happens */ 921292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 922292207Savos __func__, pktlen, totlen); 923292207Savos goto fail; 924251538Srpaulo } 925251538Srpaulo 926260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 927292207Savos if (__predict_false(m == NULL)) { 928292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 929292207Savos __func__); 930292207Savos goto fail; 931251538Srpaulo } 932251538Srpaulo 933251538Srpaulo /* Finalize mbuf. */ 934292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 935292207Savos m->m_pkthdr.len = m->m_len = totlen; 936292207Savos 937251538Srpaulo return (m); 938292207Savosfail: 939292207Savos counter_u64_add(ic->ic_ierrors, 1); 940292207Savos return (NULL); 941251538Srpaulo} 942251538Srpaulo 943251538Srpaulostatic struct mbuf * 944292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 945251538Srpaulo{ 946251538Srpaulo struct urtwn_softc *sc = data->sc; 947287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 948251538Srpaulo struct r92c_rx_stat *stat; 949251538Srpaulo uint8_t *buf; 950292167Savos int len; 951251538Srpaulo 952251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 953251538Srpaulo 954251538Srpaulo if (len < sizeof(*stat)) { 955287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 956251538Srpaulo return (NULL); 957251538Srpaulo } 958251538Srpaulo 959251538Srpaulo buf = data->buf; 960292167Savos stat = (struct r92c_rx_stat *)buf; 961292167Savos 962297596Sadrian /* 963297596Sadrian * For 88E chips we can tie the FF flushing here; 964297596Sadrian * this is where we do know exactly how deep the 965297596Sadrian * transmit queue is. 966297596Sadrian * 967297596Sadrian * But it won't work for R92 chips, so we can't 968297596Sadrian * take the easy way out. 969297596Sadrian */ 970297596Sadrian 971292167Savos if (sc->chip & URTWN_CHIP_88E) { 972292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 973292167Savos 974292167Savos switch (report_sel) { 975292167Savos case R88E_RXDW3_RPT_RX: 976292207Savos return (urtwn_rxeof(sc, buf, len)); 977292167Savos case R88E_RXDW3_RPT_TX1: 978292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 979292167Savos break; 980292167Savos default: 981294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 982294471Savos "%s: case %d was not handled\n", __func__, 983294471Savos report_sel); 984292167Savos break; 985292167Savos } 986292167Savos } else 987292207Savos return (urtwn_rxeof(sc, buf, len)); 988292167Savos 989292167Savos return (NULL); 990292167Savos} 991292167Savos 992292167Savosstatic struct mbuf * 993292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 994292167Savos{ 995292167Savos struct r92c_rx_stat *stat; 996292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 997292167Savos uint32_t rxdw0; 998292167Savos int totlen, pktlen, infosz, npkts; 999292167Savos 1000251538Srpaulo /* Get the number of encapsulated frames. */ 1001251538Srpaulo stat = (struct r92c_rx_stat *)buf; 1002251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 1003294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 1004294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 1005251538Srpaulo 1006251538Srpaulo /* Process all of them. */ 1007251538Srpaulo while (npkts-- > 0) { 1008251538Srpaulo if (len < sizeof(*stat)) 1009251538Srpaulo break; 1010251538Srpaulo stat = (struct r92c_rx_stat *)buf; 1011251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 1012251538Srpaulo 1013251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 1014251538Srpaulo if (pktlen == 0) 1015251538Srpaulo break; 1016251538Srpaulo 1017251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1018251538Srpaulo 1019251538Srpaulo /* Make sure everything fits in xfer. */ 1020251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 1021251538Srpaulo if (totlen > len) 1022251538Srpaulo break; 1023251538Srpaulo 1024292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 1025251538Srpaulo if (m0 == NULL) 1026251538Srpaulo m0 = m; 1027251538Srpaulo if (prevm == NULL) 1028251538Srpaulo prevm = m; 1029251538Srpaulo else { 1030251538Srpaulo prevm->m_next = m; 1031251538Srpaulo prevm = m; 1032251538Srpaulo } 1033251538Srpaulo 1034251538Srpaulo /* Next chunk is 128-byte aligned. */ 1035251538Srpaulo totlen = (totlen + 127) & ~127; 1036251538Srpaulo buf += totlen; 1037251538Srpaulo len -= totlen; 1038251538Srpaulo } 1039251538Srpaulo 1040251538Srpaulo return (m0); 1041251538Srpaulo} 1042251538Srpaulo 1043251538Srpaulostatic void 1044292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 1045292167Savos{ 1046292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 1047292167Savos struct ieee80211vap *vap; 1048292167Savos struct ieee80211_node *ni; 1049292167Savos uint8_t macid; 1050292167Savos int ntries; 1051292167Savos 1052292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 1053292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 1054292167Savos 1055292167Savos URTWN_NT_LOCK(sc); 1056292167Savos ni = sc->node_list[macid]; 1057292167Savos if (ni != NULL) { 1058292167Savos vap = ni->ni_vap; 1059294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1060294471Savos "%s sent (%d retries)\n", __func__, macid, 1061294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1062294471Savos ntries); 1063292167Savos 1064292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1065292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1066292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1067292167Savos } else { 1068292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1069292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1070292167Savos } 1071294471Savos } else { 1072294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1073294471Savos __func__, macid); 1074294471Savos } 1075292167Savos URTWN_NT_UNLOCK(sc); 1076292167Savos} 1077292167Savos 1078292207Savosstatic struct ieee80211_node * 1079292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1080292207Savos{ 1081292207Savos struct ieee80211com *ic = &sc->sc_ic; 1082292207Savos struct ieee80211_frame_min *wh; 1083292207Savos struct r92c_rx_stat *stat; 1084292207Savos uint32_t rxdw0, rxdw3; 1085292207Savos uint8_t rate, cipher; 1086297910Sadrian int8_t rssi = -127; 1087292207Savos int infosz; 1088292207Savos 1089292207Savos stat = mtod(m, struct r92c_rx_stat *); 1090292207Savos rxdw0 = le32toh(stat->rxdw0); 1091292207Savos rxdw3 = le32toh(stat->rxdw3); 1092292207Savos 1093292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1094292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1095292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1096292207Savos 1097292207Savos /* Get RSSI from PHY status descriptor if present. */ 1098292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1099292207Savos if (sc->chip & URTWN_CHIP_88E) 1100292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1101292207Savos else 1102292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1103297910Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: rssi=%d\n", __func__, rssi); 1104292207Savos /* Update our average RSSI. */ 1105292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1106292207Savos } 1107292207Savos 1108292207Savos if (ieee80211_radiotap_active(ic)) { 1109292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1110292207Savos 1111292207Savos tap->wr_flags = 0; 1112292207Savos 1113292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1114292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1115292207Savos le32toh(stat->rxdw5))) { 1116292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1117292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1118292207Savos } else 1119292207Savos tap->wr_tsft &= 0xffffffff00000000; 1120292207Savos tap->wr_tsft += stat->rxdw5; 1121292207Savos 1122297175Sadrian /* XXX 20/40? */ 1123297175Sadrian /* XXX shortgi? */ 1124297175Sadrian 1125292207Savos /* Map HW rate index to 802.11 rate. */ 1126292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1127292207Savos tap->wr_rate = ridx2rate[rate]; 1128292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1129292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1130292207Savos tap->wr_rate = 0x80 | (rate - 12); 1131292207Savos } 1132297910Sadrian 1133297910Sadrian /* XXX TODO: this isn't right; should use the last good RSSI */ 1134292207Savos tap->wr_dbm_antsignal = rssi; 1135292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1136292207Savos } 1137292207Savos 1138292207Savos *rssi_p = rssi; 1139292207Savos 1140292207Savos /* Drop descriptor. */ 1141292207Savos m_adj(m, sizeof(*stat) + infosz); 1142292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1143292207Savos 1144292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1145292207Savos cipher != R92C_CAM_ALGO_NONE) { 1146292207Savos m->m_flags |= M_WEP; 1147292207Savos } 1148292207Savos 1149292207Savos if (m->m_len >= sizeof(*wh)) 1150292207Savos return (ieee80211_find_rxnode(ic, wh)); 1151292207Savos 1152292207Savos return (NULL); 1153292207Savos} 1154292207Savos 1155292167Savosstatic void 1156251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1157251538Srpaulo{ 1158251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1159287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1160251538Srpaulo struct ieee80211_node *ni; 1161251538Srpaulo struct mbuf *m = NULL, *next; 1162251538Srpaulo struct urtwn_data *data; 1163292207Savos int8_t nf, rssi; 1164251538Srpaulo 1165251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1166251538Srpaulo 1167251538Srpaulo switch (USB_GET_STATE(xfer)) { 1168251538Srpaulo case USB_ST_TRANSFERRED: 1169251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1170251538Srpaulo if (data == NULL) 1171251538Srpaulo goto tr_setup; 1172251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1173292207Savos m = urtwn_report_intr(xfer, data); 1174251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1175251538Srpaulo /* FALLTHROUGH */ 1176251538Srpaulo case USB_ST_SETUP: 1177251538Srpaulotr_setup: 1178251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1179251538Srpaulo if (data == NULL) { 1180251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1181297596Sadrian goto finish; 1182251538Srpaulo } 1183251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1184251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1185251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1186251538Srpaulo usbd_xfer_max_len(xfer)); 1187251538Srpaulo usbd_transfer_submit(xfer); 1188251538Srpaulo 1189251538Srpaulo /* 1190251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1191251538Srpaulo * ieee80211_input() because here is at the end of a USB 1192251538Srpaulo * callback and safe to unlock. 1193251538Srpaulo */ 1194251538Srpaulo while (m != NULL) { 1195251538Srpaulo next = m->m_next; 1196251538Srpaulo m->m_next = NULL; 1197292207Savos 1198292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1199297910Sadrian 1200297910Sadrian /* Store a global last-good RSSI */ 1201297910Sadrian if (rssi != -127) 1202297910Sadrian sc->last_rssi = rssi; 1203297910Sadrian 1204292207Savos URTWN_UNLOCK(sc); 1205292207Savos 1206251538Srpaulo nf = URTWN_NOISE_FLOOR; 1207251538Srpaulo if (ni != NULL) { 1208297910Sadrian if (rssi != -127) 1209297910Sadrian URTWN_NODE(ni)->last_rssi = rssi; 1210297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1211297175Sadrian m->m_flags |= M_AMPDU; 1212297910Sadrian (void)ieee80211_input(ni, m, 1213297910Sadrian URTWN_NODE(ni)->last_rssi - nf, nf); 1214251538Srpaulo ieee80211_free_node(ni); 1215289799Savos } else { 1216297910Sadrian /* Use last good global RSSI */ 1217297910Sadrian (void)ieee80211_input_all(ic, m, 1218297910Sadrian sc->last_rssi - nf, nf); 1219289799Savos } 1220292207Savos URTWN_LOCK(sc); 1221251538Srpaulo m = next; 1222251538Srpaulo } 1223251538Srpaulo break; 1224251538Srpaulo default: 1225251538Srpaulo /* needs it to the inactive queue due to a error. */ 1226251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1227251538Srpaulo if (data != NULL) { 1228251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1229251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1230251538Srpaulo } 1231251538Srpaulo if (error != USB_ERR_CANCELLED) { 1232251538Srpaulo usbd_xfer_set_stall(xfer); 1233287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1234251538Srpaulo goto tr_setup; 1235251538Srpaulo } 1236251538Srpaulo break; 1237251538Srpaulo } 1238297596Sadrianfinish: 1239297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1240297596Sadrian /* 1241297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1242297596Sadrian * flush the FF staging queue if we're approaching idle. 1243297596Sadrian */ 1244297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1245297596Sadrian URTWN_UNLOCK(sc); 1246297596Sadrian ieee80211_ff_age_all(ic, 1); 1247297596Sadrian URTWN_LOCK(sc); 1248297596Sadrian#endif 1249297596Sadrian 1250297596Sadrian /* Kick-start more transmit in case we stalled */ 1251297596Sadrian urtwn_start(sc); 1252251538Srpaulo} 1253251538Srpaulo 1254251538Srpaulostatic void 1255289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1256251538Srpaulo{ 1257251538Srpaulo 1258251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1259289891Savos 1260290631Savos if (data->ni != NULL) /* not a beacon frame */ 1261290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1262289891Savos 1263297596Sadrian if (sc->sc_tx_n_active > 0) 1264297596Sadrian sc->sc_tx_n_active--; 1265297596Sadrian 1266287197Sglebius data->ni = NULL; 1267287197Sglebius data->m = NULL; 1268289891Savos 1269251538Srpaulo sc->sc_txtimer = 0; 1270289891Savos 1271289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1272251538Srpaulo} 1273251538Srpaulo 1274289066Skevlostatic int 1275289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1276289066Skevlo int ndata, int maxsz) 1277289066Skevlo{ 1278289066Skevlo int i, error; 1279289066Skevlo 1280289066Skevlo for (i = 0; i < ndata; i++) { 1281289066Skevlo struct urtwn_data *dp = &data[i]; 1282289066Skevlo dp->sc = sc; 1283289066Skevlo dp->m = NULL; 1284289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1285289066Skevlo if (dp->buf == NULL) { 1286289066Skevlo device_printf(sc->sc_dev, 1287289066Skevlo "could not allocate buffer\n"); 1288289066Skevlo error = ENOMEM; 1289289066Skevlo goto fail; 1290289066Skevlo } 1291289066Skevlo dp->ni = NULL; 1292289066Skevlo } 1293289066Skevlo 1294289066Skevlo return (0); 1295289066Skevlofail: 1296289066Skevlo urtwn_free_list(sc, data, ndata); 1297289066Skevlo return (error); 1298289066Skevlo} 1299289066Skevlo 1300289066Skevlostatic int 1301289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1302289066Skevlo{ 1303289066Skevlo int error, i; 1304289066Skevlo 1305289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1306289066Skevlo URTWN_RXBUFSZ); 1307289066Skevlo if (error != 0) 1308289066Skevlo return (error); 1309289066Skevlo 1310289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1311289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1312289066Skevlo 1313289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1314289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1315289066Skevlo 1316289066Skevlo return (0); 1317289066Skevlo} 1318289066Skevlo 1319289066Skevlostatic int 1320289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1321289066Skevlo{ 1322289066Skevlo int error, i; 1323289066Skevlo 1324289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1325289066Skevlo URTWN_TXBUFSZ); 1326289066Skevlo if (error != 0) 1327289066Skevlo return (error); 1328289066Skevlo 1329289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1330289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1331289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1332289066Skevlo 1333289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1334289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1335289066Skevlo 1336289066Skevlo return (0); 1337289066Skevlo} 1338289066Skevlo 1339251538Srpaulostatic void 1340289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1341289066Skevlo{ 1342289066Skevlo int i; 1343289066Skevlo 1344289066Skevlo for (i = 0; i < ndata; i++) { 1345289066Skevlo struct urtwn_data *dp = &data[i]; 1346289066Skevlo 1347289066Skevlo if (dp->buf != NULL) { 1348289066Skevlo free(dp->buf, M_USBDEV); 1349289066Skevlo dp->buf = NULL; 1350289066Skevlo } 1351289066Skevlo if (dp->ni != NULL) { 1352289066Skevlo ieee80211_free_node(dp->ni); 1353289066Skevlo dp->ni = NULL; 1354289066Skevlo } 1355289066Skevlo } 1356289066Skevlo} 1357289066Skevlo 1358289066Skevlostatic void 1359289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1360289066Skevlo{ 1361289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1362289066Skevlo} 1363289066Skevlo 1364289066Skevlostatic void 1365289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1366289066Skevlo{ 1367289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1368289066Skevlo} 1369289066Skevlo 1370289066Skevlostatic void 1371251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1372251538Srpaulo{ 1373251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1374297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1375297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1376297596Sadrian#endif 1377251538Srpaulo struct urtwn_data *data; 1378251538Srpaulo 1379251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1380251538Srpaulo 1381251538Srpaulo switch (USB_GET_STATE(xfer)){ 1382251538Srpaulo case USB_ST_TRANSFERRED: 1383251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1384251538Srpaulo if (data == NULL) 1385251538Srpaulo goto tr_setup; 1386251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1387289891Savos urtwn_txeof(sc, data, 0); 1388251538Srpaulo /* FALLTHROUGH */ 1389251538Srpaulo case USB_ST_SETUP: 1390251538Srpaulotr_setup: 1391251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1392251538Srpaulo if (data == NULL) { 1393294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1394294471Savos "%s: empty pending queue\n", __func__); 1395297596Sadrian sc->sc_tx_n_active = 0; 1396288353Sadrian goto finish; 1397251538Srpaulo } 1398251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1399251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1400251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1401251538Srpaulo usbd_transfer_submit(xfer); 1402297596Sadrian sc->sc_tx_n_active++; 1403251538Srpaulo break; 1404251538Srpaulo default: 1405251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1406251538Srpaulo if (data == NULL) 1407251538Srpaulo goto tr_setup; 1408289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1409289891Savos urtwn_txeof(sc, data, 1); 1410251538Srpaulo if (error != USB_ERR_CANCELLED) { 1411251538Srpaulo usbd_xfer_set_stall(xfer); 1412251538Srpaulo goto tr_setup; 1413251538Srpaulo } 1414251538Srpaulo break; 1415251538Srpaulo } 1416288353Sadrianfinish: 1417297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1418297596Sadrian /* 1419297596Sadrian * If the TX active queue drops below a certain 1420297596Sadrian * threshold, ensure we age fast-frames out so they're 1421297596Sadrian * transmitted. 1422297596Sadrian */ 1423297596Sadrian if (sc->sc_tx_n_active <= 1) { 1424297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1425297596Sadrian 1426297596Sadrian /* 1427297596Sadrian * Note: this sc_tx_n_active currently tracks 1428297596Sadrian * the number of pending transmit submissions 1429297596Sadrian * and not the actual depth of the TX frames 1430297596Sadrian * pending to the hardware. That means that 1431297596Sadrian * we're going to end up with some sub-optimal 1432297596Sadrian * aggregation behaviour. 1433297596Sadrian */ 1434297596Sadrian /* 1435297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1436297596Sadrian * flush the FF staging queue if we're approaching idle. 1437297596Sadrian */ 1438297596Sadrian URTWN_UNLOCK(sc); 1439297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1440297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1441297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1442297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1443297596Sadrian URTWN_LOCK(sc); 1444297596Sadrian } 1445297596Sadrian#endif 1446288353Sadrian /* Kick-start more transmit */ 1447288353Sadrian urtwn_start(sc); 1448251538Srpaulo} 1449251538Srpaulo 1450251538Srpaulostatic struct urtwn_data * 1451251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1452251538Srpaulo{ 1453251538Srpaulo struct urtwn_data *bf; 1454251538Srpaulo 1455251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1456251538Srpaulo if (bf != NULL) 1457251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1458294471Savos else { 1459294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1460294471Savos "%s: out of xmit buffers\n", __func__); 1461294471Savos } 1462251538Srpaulo return (bf); 1463251538Srpaulo} 1464251538Srpaulo 1465251538Srpaulostatic struct urtwn_data * 1466251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1467251538Srpaulo{ 1468251538Srpaulo struct urtwn_data *bf; 1469251538Srpaulo 1470251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1471251538Srpaulo 1472251538Srpaulo bf = _urtwn_getbuf(sc); 1473294471Savos if (bf == NULL) { 1474294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1475294471Savos __func__); 1476294471Savos } 1477251538Srpaulo return (bf); 1478251538Srpaulo} 1479251538Srpaulo 1480291698Savosstatic usb_error_t 1481251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1482251538Srpaulo int len) 1483251538Srpaulo{ 1484251538Srpaulo usb_device_request_t req; 1485251538Srpaulo 1486251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1487251538Srpaulo req.bRequest = R92C_REQ_REGS; 1488251538Srpaulo USETW(req.wValue, addr); 1489251538Srpaulo USETW(req.wIndex, 0); 1490251538Srpaulo USETW(req.wLength, len); 1491251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1492251538Srpaulo} 1493251538Srpaulo 1494291698Savosstatic usb_error_t 1495251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1496251538Srpaulo{ 1497291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1498251538Srpaulo} 1499251538Srpaulo 1500291698Savosstatic usb_error_t 1501251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1502251538Srpaulo{ 1503251538Srpaulo val = htole16(val); 1504291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1505251538Srpaulo} 1506251538Srpaulo 1507291698Savosstatic usb_error_t 1508251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1509251538Srpaulo{ 1510251538Srpaulo val = htole32(val); 1511291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1512251538Srpaulo} 1513251538Srpaulo 1514291698Savosstatic usb_error_t 1515251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1516251538Srpaulo int len) 1517251538Srpaulo{ 1518251538Srpaulo usb_device_request_t req; 1519251538Srpaulo 1520251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1521251538Srpaulo req.bRequest = R92C_REQ_REGS; 1522251538Srpaulo USETW(req.wValue, addr); 1523251538Srpaulo USETW(req.wIndex, 0); 1524251538Srpaulo USETW(req.wLength, len); 1525251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1526251538Srpaulo} 1527251538Srpaulo 1528251538Srpaulostatic uint8_t 1529251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1530251538Srpaulo{ 1531251538Srpaulo uint8_t val; 1532251538Srpaulo 1533251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1534251538Srpaulo return (0xff); 1535251538Srpaulo return (val); 1536251538Srpaulo} 1537251538Srpaulo 1538251538Srpaulostatic uint16_t 1539251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1540251538Srpaulo{ 1541251538Srpaulo uint16_t val; 1542251538Srpaulo 1543251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1544251538Srpaulo return (0xffff); 1545251538Srpaulo return (le16toh(val)); 1546251538Srpaulo} 1547251538Srpaulo 1548251538Srpaulostatic uint32_t 1549251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1550251538Srpaulo{ 1551251538Srpaulo uint32_t val; 1552251538Srpaulo 1553251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1554251538Srpaulo return (0xffffffff); 1555251538Srpaulo return (le32toh(val)); 1556251538Srpaulo} 1557251538Srpaulo 1558251538Srpaulostatic int 1559251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1560251538Srpaulo{ 1561251538Srpaulo struct r92c_fw_cmd cmd; 1562291698Savos usb_error_t error; 1563251538Srpaulo int ntries; 1564251538Srpaulo 1565295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1566295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1567295871Savos "was not loaded; command (id %d) will be discarded\n", 1568295871Savos __func__, id); 1569295871Savos return (0); 1570295871Savos } 1571295871Savos 1572251538Srpaulo /* Wait for current FW box to be empty. */ 1573251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1574251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1575251538Srpaulo break; 1576266472Shselasky urtwn_ms_delay(sc); 1577251538Srpaulo } 1578251538Srpaulo if (ntries == 100) { 1579251538Srpaulo device_printf(sc->sc_dev, 1580251538Srpaulo "could not send firmware command\n"); 1581251538Srpaulo return (ETIMEDOUT); 1582251538Srpaulo } 1583251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1584251538Srpaulo cmd.id = id; 1585251538Srpaulo if (len > 3) 1586251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1587251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1588251538Srpaulo memcpy(cmd.msg, buf, len); 1589251538Srpaulo 1590251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1591291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1592251538Srpaulo (uint8_t *)&cmd + 4, 2); 1593291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1594291698Savos return (EIO); 1595291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1596251538Srpaulo (uint8_t *)&cmd + 0, 4); 1597291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1598291698Savos return (EIO); 1599251538Srpaulo 1600251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1601251538Srpaulo return (0); 1602251538Srpaulo} 1603251538Srpaulo 1604292174Savosstatic void 1605292174Savosurtwn_cmdq_cb(void *arg, int pending) 1606292174Savos{ 1607292174Savos struct urtwn_softc *sc = arg; 1608292174Savos struct urtwn_cmdq *item; 1609292174Savos 1610292174Savos /* 1611292174Savos * Device must be powered on (via urtwn_power_on()) 1612292174Savos * before any command may be sent. 1613292174Savos */ 1614292174Savos URTWN_LOCK(sc); 1615292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1616292174Savos URTWN_UNLOCK(sc); 1617292174Savos return; 1618292174Savos } 1619292174Savos 1620292174Savos URTWN_CMDQ_LOCK(sc); 1621292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1622292174Savos item = &sc->cmdq[sc->cmdq_first]; 1623292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1624292174Savos URTWN_CMDQ_UNLOCK(sc); 1625292174Savos 1626292174Savos item->func(sc, &item->data); 1627292174Savos 1628292174Savos URTWN_CMDQ_LOCK(sc); 1629292174Savos memset(item, 0, sizeof (*item)); 1630292174Savos } 1631292174Savos URTWN_CMDQ_UNLOCK(sc); 1632292174Savos URTWN_UNLOCK(sc); 1633292174Savos} 1634292174Savos 1635292174Savosstatic int 1636292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1637292174Savos CMD_FUNC_PROTO) 1638292174Savos{ 1639292174Savos struct ieee80211com *ic = &sc->sc_ic; 1640292174Savos 1641292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1642292174Savos 1643292174Savos URTWN_CMDQ_LOCK(sc); 1644292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1645292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1646292174Savos URTWN_CMDQ_UNLOCK(sc); 1647292174Savos 1648292174Savos return (EAGAIN); 1649292174Savos } 1650292174Savos 1651292174Savos if (ptr != NULL) 1652292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1653292174Savos sc->cmdq[sc->cmdq_last].func = func; 1654292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1655292174Savos URTWN_CMDQ_UNLOCK(sc); 1656292174Savos 1657292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1658292174Savos 1659292174Savos return (0); 1660292174Savos} 1661292174Savos 1662264912Skevlostatic __inline void 1663251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1664251538Srpaulo{ 1665264912Skevlo 1666264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1667264912Skevlo} 1668264912Skevlo 1669264912Skevlostatic void 1670264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1671264912Skevlo uint32_t val) 1672264912Skevlo{ 1673251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1674251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1675251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1676251538Srpaulo} 1677251538Srpaulo 1678264912Skevlostatic void 1679264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1680264912Skevlouint32_t val) 1681264912Skevlo{ 1682264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1683264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1684264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1685264912Skevlo} 1686264912Skevlo 1687251538Srpaulostatic uint32_t 1688251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1689251538Srpaulo{ 1690251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1691251538Srpaulo 1692251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1693251538Srpaulo if (chain != 0) 1694251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1695251538Srpaulo 1696251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1697251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1698266472Shselasky urtwn_ms_delay(sc); 1699251538Srpaulo 1700251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1701251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1702251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1703266472Shselasky urtwn_ms_delay(sc); 1704251538Srpaulo 1705251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1706251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1707266472Shselasky urtwn_ms_delay(sc); 1708251538Srpaulo 1709251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1710251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1711251538Srpaulo else 1712251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1713251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1714251538Srpaulo} 1715251538Srpaulo 1716251538Srpaulostatic int 1717251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1718251538Srpaulo{ 1719291698Savos usb_error_t error; 1720251538Srpaulo int ntries; 1721251538Srpaulo 1722291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1723251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1724251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1725251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1726291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1727291698Savos return (EIO); 1728251538Srpaulo /* Wait for write operation to complete. */ 1729251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1730251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1731251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1732251538Srpaulo return (0); 1733266472Shselasky urtwn_ms_delay(sc); 1734251538Srpaulo } 1735251538Srpaulo return (ETIMEDOUT); 1736251538Srpaulo} 1737251538Srpaulo 1738291264Savosstatic int 1739291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1740251538Srpaulo{ 1741251538Srpaulo uint32_t reg; 1742291698Savos usb_error_t error; 1743251538Srpaulo int ntries; 1744251538Srpaulo 1745291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1746291264Savos return (EFAULT); 1747291264Savos 1748251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1749291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1750251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1751291264Savos 1752291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1753291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1754291698Savos return (EIO); 1755251538Srpaulo /* Wait for read operation to complete. */ 1756251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1757251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1758251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1759291264Savos break; 1760266472Shselasky urtwn_ms_delay(sc); 1761251538Srpaulo } 1762291264Savos if (ntries == 100) { 1763291264Savos device_printf(sc->sc_dev, 1764291264Savos "could not read efuse byte at address 0x%x\n", 1765291264Savos sc->last_rom_addr); 1766291264Savos return (ETIMEDOUT); 1767291264Savos } 1768291264Savos 1769291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1770291264Savos sc->last_rom_addr++; 1771291264Savos 1772291264Savos return (0); 1773251538Srpaulo} 1774251538Srpaulo 1775291264Savosstatic int 1776291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1777291264Savos uint8_t msk) 1778291264Savos{ 1779291264Savos uint8_t reg; 1780291264Savos int i, error; 1781291264Savos 1782291264Savos for (i = 0; i < 4; i++) { 1783291264Savos if (msk & (1 << i)) 1784291264Savos continue; 1785291264Savos error = urtwn_efuse_read_next(sc, ®); 1786291264Savos if (error != 0) 1787291264Savos return (error); 1788294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1789294471Savos off * 8 + i * 2, reg); 1790291264Savos rom[off * 8 + i * 2 + 0] = reg; 1791291264Savos 1792291264Savos error = urtwn_efuse_read_next(sc, ®); 1793291264Savos if (error != 0) 1794291264Savos return (error); 1795294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1796294471Savos off * 8 + i * 2 + 1, reg); 1797291264Savos rom[off * 8 + i * 2 + 1] = reg; 1798291264Savos } 1799291264Savos 1800291264Savos return (0); 1801291264Savos} 1802291264Savos 1803294471Savos#ifdef USB_DEBUG 1804251538Srpaulostatic void 1805291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1806251538Srpaulo{ 1807251538Srpaulo int i; 1808251538Srpaulo 1809291264Savos /* Dump ROM contents. */ 1810291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1811291264Savos for (i = 0; i < size; i++) { 1812291264Savos if (i % 32 == 0) 1813291264Savos printf("\n%03X: ", i); 1814291264Savos else if (i % 4 == 0) 1815291264Savos printf(" "); 1816291264Savos 1817291264Savos printf("%02X", rom[i]); 1818291264Savos } 1819291264Savos printf("\n"); 1820291264Savos} 1821291264Savos#endif 1822291264Savos 1823291264Savosstatic int 1824291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1825291264Savos{ 1826291264Savos#define URTWN_CHK(res) do { \ 1827291264Savos if ((error = res) != 0) \ 1828291264Savos goto end; \ 1829291264Savos} while(0) 1830291264Savos uint8_t msk, off, reg; 1831291264Savos int error; 1832291264Savos 1833291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1834264912Skevlo 1835291264Savos /* Read full ROM image. */ 1836291264Savos sc->last_rom_addr = 0; 1837291264Savos memset(rom, 0xff, size); 1838291264Savos 1839291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1840291264Savos while (reg != 0xff) { 1841291264Savos /* check for extended header */ 1842291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1843291264Savos off = reg >> 5; 1844291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1845291264Savos 1846291264Savos if ((reg & 0x0f) != 0x0f) 1847291264Savos off = ((reg & 0xf0) >> 1) | off; 1848291264Savos else 1849291264Savos continue; 1850291264Savos } else 1851291264Savos off = reg >> 4; 1852251538Srpaulo msk = reg & 0xf; 1853291264Savos 1854291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1855291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1856251538Srpaulo } 1857291264Savos 1858291264Savosend: 1859291264Savos 1860294471Savos#ifdef USB_DEBUG 1861294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1862291264Savos urtwn_dump_rom_contents(sc, rom, size); 1863251538Srpaulo#endif 1864291264Savos 1865282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1866291264Savos 1867291264Savos if (error != 0) { 1868291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1869291264Savos __func__); 1870291264Savos } 1871291264Savos 1872291264Savos return (error); 1873291264Savos#undef URTWN_CHK 1874282623Skevlo} 1875281592Skevlo 1876291698Savosstatic int 1877264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1878264912Skevlo{ 1879291698Savos usb_error_t error; 1880264912Skevlo uint32_t reg; 1881251538Srpaulo 1882291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1883291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1884291698Savos return (EIO); 1885281918Skevlo 1886264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1887264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1888291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1889264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1890291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1891291698Savos return (EIO); 1892264912Skevlo } 1893264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1894264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1895291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1896264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1897291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1898291698Savos return (EIO); 1899264912Skevlo } 1900264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1901264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1902264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1903291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1904264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1905291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1906291698Savos return (EIO); 1907264912Skevlo } 1908291698Savos 1909291698Savos return (0); 1910264912Skevlo} 1911264912Skevlo 1912251538Srpaulostatic int 1913251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1914251538Srpaulo{ 1915251538Srpaulo uint32_t reg; 1916251538Srpaulo 1917264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1918264912Skevlo return (0); 1919264912Skevlo 1920251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1921251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1922251538Srpaulo return (EIO); 1923251538Srpaulo 1924251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1925251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1926251538Srpaulo /* Check if it is a castrated 8192C. */ 1927251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1928251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1929251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1930251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1931251538Srpaulo } 1932251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1933251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1934251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1935251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1936251538Srpaulo } 1937251538Srpaulo return (0); 1938251538Srpaulo} 1939251538Srpaulo 1940291264Savosstatic int 1941251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1942251538Srpaulo{ 1943291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1944291264Savos int error; 1945251538Srpaulo 1946251538Srpaulo /* Read full ROM image. */ 1947291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1948291264Savos if (error != 0) 1949291264Savos return (error); 1950251538Srpaulo 1951251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1952291264Savos sc->last_rom_addr = 0x1fa; 1953291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1954291264Savos if (error != 0) 1955291264Savos return (error); 1956294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1957294471Savos sc->pa_setting); 1958251538Srpaulo 1959251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1960251538Srpaulo 1961251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1962294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1963294471Savos __func__, sc->regulatory); 1964287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1965251538Srpaulo 1966264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1967264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1968295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1969291264Savos 1970291264Savos return (0); 1971251538Srpaulo} 1972251538Srpaulo 1973291264Savosstatic int 1974264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1975264912Skevlo{ 1976294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1977294198Savos int error; 1978264912Skevlo 1979294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1980291264Savos if (error != 0) 1981291264Savos return (error); 1982264912Skevlo 1983294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1984264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1985264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1986294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1987264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1988264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1989294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1990294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1991294471Savos __func__,sc->regulatory); 1992294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1993264912Skevlo 1994264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1995264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1996295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1997291264Savos 1998291264Savos return (0); 1999264912Skevlo} 2000264912Skevlo 2001298436Savosstatic __inline uint8_t 2002298436Savosrate2ridx(uint8_t rate) 2003298436Savos{ 2004298436Savos if (rate & IEEE80211_RATE_MCS) { 2005298436Savos /* 11n rates start at idx 12 */ 2006298436Savos return ((rate & 0xf) + 12); 2007298436Savos } 2008298436Savos switch (rate) { 2009298436Savos /* 11g */ 2010298436Savos case 12: return 4; 2011298436Savos case 18: return 5; 2012298436Savos case 24: return 6; 2013298436Savos case 36: return 7; 2014298436Savos case 48: return 8; 2015298436Savos case 72: return 9; 2016298436Savos case 96: return 10; 2017298436Savos case 108: return 11; 2018298436Savos /* 11b */ 2019298436Savos case 2: return 0; 2020298436Savos case 4: return 1; 2021298436Savos case 11: return 2; 2022298436Savos case 22: return 3; 2023298436Savos default: return URTWN_RIDX_UNKNOWN; 2024298436Savos } 2025298436Savos} 2026298436Savos 2027251538Srpaulo/* 2028251538Srpaulo * Initialize rate adaptation in firmware. 2029251538Srpaulo */ 2030251538Srpaulostatic int 2031251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 2032251538Srpaulo{ 2033287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2034251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2035251538Srpaulo struct ieee80211_node *ni; 2036297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 2037251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 2038251538Srpaulo uint32_t rates, basicrates; 2039298436Savos uint8_t mode, ridx; 2040298436Savos int maxrate, maxbasicrate, error, i; 2041251538Srpaulo 2042251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2043251538Srpaulo rs = &ni->ni_rates; 2044297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 2045251538Srpaulo 2046251538Srpaulo /* Get normal and basic rates mask. */ 2047251538Srpaulo rates = basicrates = 0; 2048251538Srpaulo maxrate = maxbasicrate = 0; 2049297175Sadrian 2050297175Sadrian /* This is for 11bg */ 2051251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 2052251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 2053298436Savos ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); 2054298436Savos if (ridx == URTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ 2055251538Srpaulo continue; 2056298436Savos rates |= 1 << ridx; 2057298436Savos if (ridx > maxrate) 2058298436Savos maxrate = ridx; 2059251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 2060298436Savos basicrates |= 1 << ridx; 2061298436Savos if (ridx > maxbasicrate) 2062298436Savos maxbasicrate = ridx; 2063251538Srpaulo } 2064251538Srpaulo } 2065297175Sadrian 2066297175Sadrian /* If we're doing 11n, enable 11n rates */ 2067297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 2068297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 2069297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 2070297175Sadrian continue; 2071297175Sadrian /* 11n rates start at index 12 */ 2072298436Savos ridx = ((rs_ht->rs_rates[i]) & 0xf) + 12; 2073298436Savos rates |= (1 << ridx); 2074297175Sadrian 2075297175Sadrian /* Guard against the rate table being oddly ordered */ 2076298436Savos if (ridx > maxrate) 2077298436Savos maxrate = ridx; 2078297175Sadrian } 2079297175Sadrian } 2080297175Sadrian 2081297175Sadrian#if 0 2082297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 2083297175Sadrian raid = R92C_RAID_11GN; 2084297175Sadrian#endif 2085297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 2086251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2087251538Srpaulo mode = R92C_RAID_11B; 2088251538Srpaulo else 2089251538Srpaulo mode = R92C_RAID_11BG; 2090297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 2091294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 2092294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2093251538Srpaulo mode, rates, basicrates); 2094251538Srpaulo 2095251538Srpaulo /* Set rates mask for group addressed frames. */ 2096251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2097251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2098251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2099251538Srpaulo if (error != 0) { 2100252401Srpaulo ieee80211_free_node(ni); 2101251538Srpaulo device_printf(sc->sc_dev, 2102251538Srpaulo "could not add broadcast station\n"); 2103251538Srpaulo return (error); 2104251538Srpaulo } 2105297175Sadrian 2106251538Srpaulo /* Set initial MRR rate. */ 2107294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2108294471Savos maxbasicrate); 2109251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2110251538Srpaulo maxbasicrate); 2111251538Srpaulo 2112251538Srpaulo /* Set rates mask for unicast frames. */ 2113297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2114297175Sadrian mode = R92C_RAID_11GN; 2115297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2116297175Sadrian mode = R92C_RAID_11B; 2117297175Sadrian else 2118297175Sadrian mode = R92C_RAID_11BG; 2119251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2120251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2121251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2122251538Srpaulo if (error != 0) { 2123252401Srpaulo ieee80211_free_node(ni); 2124251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2125251538Srpaulo return (error); 2126251538Srpaulo } 2127251538Srpaulo /* Set initial MRR rate. */ 2128294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2129294471Savos maxrate); 2130251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2131251538Srpaulo maxrate); 2132251538Srpaulo 2133251538Srpaulo /* Indicate highest supported rate. */ 2134297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2135297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2136297175Sadrian | IEEE80211_RATE_MCS; 2137297175Sadrian else 2138297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2139252401Srpaulo ieee80211_free_node(ni); 2140252401Srpaulo 2141251538Srpaulo return (0); 2142251538Srpaulo} 2143251538Srpaulo 2144290439Savosstatic void 2145290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2146251538Srpaulo{ 2147290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2148290631Savos 2149290631Savos txd->txdw0 = htole32( 2150290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2151290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2152290631Savos txd->txdw1 = htole32( 2153290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2154290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2155290631Savos 2156291858Savos if (sc->chip & URTWN_CHIP_88E) { 2157290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2158291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2159291858Savos } else { 2160290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2161291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2162291858Savos } 2163290631Savos 2164290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2165290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2166251538Srpaulo} 2167251538Srpaulo 2168290631Savosstatic int 2169290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2170290631Savos{ 2171290631Savos struct ieee80211vap *vap = ni->ni_vap; 2172290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2173290631Savos struct mbuf *m; 2174290631Savos int error; 2175290631Savos 2176290631Savos URTWN_ASSERT_LOCKED(sc); 2177290631Savos 2178290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2179290631Savos return (EINVAL); 2180290631Savos 2181290631Savos m = ieee80211_beacon_alloc(ni); 2182290631Savos if (m == NULL) { 2183290631Savos device_printf(sc->sc_dev, 2184290631Savos "%s: could not allocate beacon frame\n", __func__); 2185290631Savos return (ENOMEM); 2186290631Savos } 2187290631Savos 2188290631Savos if (uvp->bcn_mbuf != NULL) 2189290631Savos m_freem(uvp->bcn_mbuf); 2190290631Savos 2191290631Savos uvp->bcn_mbuf = m; 2192290631Savos 2193290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2194290631Savos return (error); 2195290631Savos 2196290631Savos /* XXX bcnq stuck workaround */ 2197290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2198290631Savos return (error); 2199290631Savos 2200294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2201294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2202294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2203294471Savos 2204290631Savos return (0); 2205290631Savos} 2206290631Savos 2207251538Srpaulostatic void 2208290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2209290631Savos{ 2210290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2211290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2212290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2213290631Savos struct ieee80211_node *ni = vap->iv_bss; 2214290631Savos int mcast = 0; 2215290631Savos 2216290631Savos URTWN_LOCK(sc); 2217290631Savos if (uvp->bcn_mbuf == NULL) { 2218290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2219290631Savos if (uvp->bcn_mbuf == NULL) { 2220290631Savos device_printf(sc->sc_dev, 2221290631Savos "%s: could not allocate beacon frame\n", __func__); 2222290631Savos URTWN_UNLOCK(sc); 2223290631Savos return; 2224290631Savos } 2225290631Savos } 2226290631Savos URTWN_UNLOCK(sc); 2227290631Savos 2228290631Savos if (item == IEEE80211_BEACON_TIM) 2229290631Savos mcast = 1; /* XXX */ 2230290631Savos 2231290631Savos setbit(bo->bo_flags, item); 2232290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2233290631Savos 2234290631Savos URTWN_LOCK(sc); 2235290631Savos urtwn_tx_beacon(sc, uvp); 2236290631Savos URTWN_UNLOCK(sc); 2237290631Savos} 2238290631Savos 2239290631Savos/* 2240290631Savos * Push a beacon frame into the chip. Beacon will 2241290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2242290631Savos */ 2243290631Savosstatic int 2244290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2245290631Savos{ 2246290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2247290631Savos struct urtwn_data *bf; 2248290631Savos 2249290631Savos URTWN_ASSERT_LOCKED(sc); 2250290631Savos 2251290631Savos bf = urtwn_getbuf(sc); 2252290631Savos if (bf == NULL) 2253290631Savos return (ENOMEM); 2254290631Savos 2255290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2256290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2257290631Savos 2258290631Savos sc->sc_txtimer = 5; 2259290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2260290631Savos 2261290631Savos return (0); 2262290631Savos} 2263290631Savos 2264292175Savosstatic int 2265292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2266292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2267292175Savos{ 2268292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2269292175Savos uint8_t i; 2270292175Savos 2271292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2272292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2273292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2274292175Savos URTWN_LOCK(sc); 2275292175Savos /* 2276292175Savos * First 4 slots for group keys, 2277292175Savos * what is left - for pairwise. 2278292175Savos * XXX incompatible with IBSS RSN. 2279292175Savos */ 2280292175Savos for (i = IEEE80211_WEP_NKID; 2281292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2282292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2283292175Savos sc->keys_bmap |= 1 << i; 2284292175Savos *keyix = i; 2285292175Savos break; 2286292175Savos } 2287292175Savos } 2288292175Savos URTWN_UNLOCK(sc); 2289292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2290292175Savos device_printf(sc->sc_dev, 2291292175Savos "%s: no free space in the key table\n", 2292292175Savos __func__); 2293292175Savos return 0; 2294292175Savos } 2295292175Savos } else 2296292175Savos *keyix = 0; 2297292175Savos } else { 2298292175Savos *keyix = k - vap->iv_nw_keys; 2299292175Savos } 2300292175Savos *rxkeyix = *keyix; 2301292175Savos return 1; 2302292175Savos} 2303292175Savos 2304290631Savosstatic void 2305292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2306292175Savos{ 2307292175Savos struct ieee80211_key *k = &data->key; 2308292175Savos uint8_t algo, keyid; 2309292175Savos int i, error; 2310292175Savos 2311292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2312292175Savos keyid = k->wk_keyix; 2313292175Savos else 2314292175Savos keyid = 0; 2315292175Savos 2316292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2317292175Savos switch (k->wk_cipher->ic_cipher) { 2318292175Savos case IEEE80211_CIPHER_WEP: 2319292175Savos if (k->wk_keylen < 8) 2320292175Savos algo = R92C_CAM_ALGO_WEP40; 2321292175Savos else 2322292175Savos algo = R92C_CAM_ALGO_WEP104; 2323292175Savos break; 2324292175Savos case IEEE80211_CIPHER_TKIP: 2325292175Savos algo = R92C_CAM_ALGO_TKIP; 2326292175Savos break; 2327292175Savos case IEEE80211_CIPHER_AES_CCM: 2328292175Savos algo = R92C_CAM_ALGO_AES; 2329292175Savos break; 2330292175Savos default: 2331292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2332292175Savos __func__, k->wk_cipher->ic_cipher); 2333292175Savos return; 2334292175Savos } 2335292175Savos 2336294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2337294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2338294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2339294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2340294471Savos ether_sprintf(k->wk_macaddr)); 2341292175Savos 2342292175Savos /* Write key. */ 2343292175Savos for (i = 0; i < 4; i++) { 2344292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2345298359Savos le32dec(&k->wk_key[i * 4])); 2346292175Savos if (error != 0) 2347292175Savos goto fail; 2348292175Savos } 2349292175Savos 2350292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2351292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2352298359Savos le32dec(&k->wk_macaddr[2])); 2353292175Savos if (error != 0) 2354292175Savos goto fail; 2355292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2356292175Savos SM(R92C_CAM_ALGO, algo) | 2357292175Savos SM(R92C_CAM_KEYID, keyid) | 2358298359Savos SM(R92C_CAM_MACLO, le16dec(&k->wk_macaddr[0])) | 2359292175Savos R92C_CAM_VALID); 2360292175Savos if (error != 0) 2361292175Savos goto fail; 2362292175Savos 2363292175Savos return; 2364292175Savos 2365292175Savosfail: 2366292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2367292175Savos} 2368292175Savos 2369292175Savosstatic void 2370292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2371292175Savos{ 2372292175Savos struct ieee80211_key *k = &data->key; 2373292175Savos int i; 2374292175Savos 2375294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2376294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2377292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2378292175Savos 2379292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2380292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2381292175Savos 2382292175Savos /* Clear key. */ 2383292175Savos for (i = 0; i < 4; i++) 2384292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2385292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2386292175Savos} 2387292175Savos 2388292175Savosstatic int 2389292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2390292175Savos{ 2391292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2392301762Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2393292175Savos 2394292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2395292175Savos /* Not for us. */ 2396292175Savos return (1); 2397292175Savos } 2398292175Savos 2399301762Savos if (&vap->iv_nw_keys[0] <= k && 2400301762Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID]) { 2401301762Savos URTWN_LOCK(sc); 2402301762Savos uvp->keys[k->wk_keyix] = k; 2403301762Savos if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2404301762Savos /* 2405301762Savos * The device was not started; 2406301762Savos * the key will be installed later. 2407301762Savos */ 2408301762Savos URTWN_UNLOCK(sc); 2409301762Savos return (1); 2410301762Savos } 2411301762Savos URTWN_UNLOCK(sc); 2412301762Savos } 2413301762Savos 2414292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2415292175Savos} 2416292175Savos 2417292175Savosstatic int 2418292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2419292175Savos{ 2420292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2421301762Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2422292175Savos 2423292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2424292175Savos /* Not for us. */ 2425292175Savos return (1); 2426292175Savos } 2427292175Savos 2428301762Savos if (&vap->iv_nw_keys[0] <= k && 2429301762Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID]) { 2430301762Savos URTWN_LOCK(sc); 2431301762Savos uvp->keys[k->wk_keyix] = NULL; 2432301762Savos if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2433301762Savos /* All keys are removed on device reset. */ 2434301762Savos URTWN_UNLOCK(sc); 2435301762Savos return (1); 2436301762Savos } 2437301762Savos URTWN_UNLOCK(sc); 2438301762Savos } 2439301762Savos 2440292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2441292175Savos} 2442292175Savos 2443292175Savosstatic void 2444290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2445290651Savos{ 2446290651Savos struct ieee80211vap *vap = arg; 2447290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2448290651Savos struct ieee80211_node *ni; 2449290651Savos uint32_t reg; 2450290651Savos 2451290651Savos URTWN_LOCK(sc); 2452290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2453290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2454290651Savos 2455290651Savos /* Accept beacons with the same BSSID. */ 2456290651Savos urtwn_set_rx_bssid_all(sc, 0); 2457290651Savos 2458290651Savos /* Enable synchronization. */ 2459290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2460290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2461290651Savos 2462290651Savos /* Synchronize. */ 2463290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2464290651Savos 2465290651Savos /* Disable synchronization. */ 2466290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2467290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2468290651Savos 2469290651Savos /* Remove beacon filter. */ 2470290651Savos urtwn_set_rx_bssid_all(sc, 1); 2471290651Savos 2472290651Savos /* Enable beaconing. */ 2473290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2474290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2475290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2476290651Savos 2477290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2478290651Savos ieee80211_free_node(ni); 2479290651Savos URTWN_UNLOCK(sc); 2480290651Savos} 2481290651Savos 2482290651Savosstatic void 2483290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2484290631Savos{ 2485290651Savos struct ieee80211com *ic = &sc->sc_ic; 2486290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2487290651Savos 2488290631Savos /* Reset TSF. */ 2489290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2490290631Savos 2491290631Savos switch (vap->iv_opmode) { 2492290631Savos case IEEE80211_M_STA: 2493290631Savos /* Enable TSF synchronization. */ 2494290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2495290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2496290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2497290631Savos break; 2498290651Savos case IEEE80211_M_IBSS: 2499290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2500290651Savos break; 2501290631Savos case IEEE80211_M_HOSTAP: 2502290631Savos /* Enable beaconing. */ 2503290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2504290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2505290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2506290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2507290631Savos break; 2508290631Savos default: 2509290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2510290631Savos vap->iv_opmode); 2511290631Savos return; 2512290631Savos } 2513290631Savos} 2514290631Savos 2515290631Savosstatic void 2516292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2517292203Savos{ 2518292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2519292203Savos} 2520292203Savos 2521292203Savosstatic void 2522251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2523251538Srpaulo{ 2524251538Srpaulo uint8_t reg; 2525281069Srpaulo 2526251538Srpaulo if (led == URTWN_LED_LINK) { 2527264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2528264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2529264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2530264912Skevlo if (!on) { 2531264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2532264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2533264912Skevlo reg | R92C_LEDCFG0_DIS); 2534264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2535264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2536264912Skevlo 0xfe); 2537264912Skevlo } 2538264912Skevlo } else { 2539264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2540264912Skevlo if (!on) 2541264912Skevlo reg |= R92C_LEDCFG0_DIS; 2542264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2543264912Skevlo } 2544264912Skevlo sc->ledlink = on; /* Save LED state. */ 2545251538Srpaulo } 2546251538Srpaulo} 2547251538Srpaulo 2548289811Savosstatic void 2549289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2550289811Savos{ 2551289811Savos uint8_t reg; 2552289811Savos 2553289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2554289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2555289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2556289811Savos} 2557289811Savos 2558290651Savosstatic void 2559290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2560290651Savos const struct ieee80211_rx_stats *rxs, 2561290651Savos int rssi, int nf) 2562290651Savos{ 2563290651Savos struct ieee80211vap *vap = ni->ni_vap; 2564290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2565290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2566290651Savos uint64_t ni_tstamp, curr_tstamp; 2567290651Savos 2568290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2569290651Savos 2570290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2571290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2572290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2573290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2574290651Savos URTWN_LOCK(sc); 2575290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2576290651Savos URTWN_UNLOCK(sc); 2577290651Savos curr_tstamp = le64toh(curr_tstamp); 2578290651Savos 2579290651Savos if (ni_tstamp >= curr_tstamp) 2580290651Savos (void) ieee80211_ibss_merge(ni); 2581290651Savos } 2582290651Savos} 2583290651Savos 2584251538Srpaulostatic int 2585251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2586251538Srpaulo{ 2587251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2588251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2589286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2590251538Srpaulo struct ieee80211_node *ni; 2591251538Srpaulo enum ieee80211_state ostate; 2592290631Savos uint32_t reg; 2593290631Savos uint8_t mode; 2594290631Savos int error = 0; 2595251538Srpaulo 2596251538Srpaulo ostate = vap->iv_state; 2597294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2598294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2599251538Srpaulo 2600251538Srpaulo IEEE80211_UNLOCK(ic); 2601251538Srpaulo URTWN_LOCK(sc); 2602251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2603251538Srpaulo 2604251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2605294473Savos /* Stop calibration. */ 2606294473Savos callout_stop(&sc->sc_calib_to); 2607294473Savos 2608251538Srpaulo /* Turn link LED off. */ 2609251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2610251538Srpaulo 2611251538Srpaulo /* Set media status to 'No Link'. */ 2612289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2613251538Srpaulo 2614251538Srpaulo /* Stop Rx of data frames. */ 2615251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2616251538Srpaulo 2617251538Srpaulo /* Disable TSF synchronization. */ 2618251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2619290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2620251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2621251538Srpaulo 2622290631Savos /* Disable beaconing. */ 2623290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2624290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2625290631Savos 2626290631Savos /* Reset TSF. */ 2627290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2628290631Savos 2629251538Srpaulo /* Reset EDCA parameters. */ 2630251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2631251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2632251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2633251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2634251538Srpaulo } 2635251538Srpaulo 2636251538Srpaulo switch (nstate) { 2637251538Srpaulo case IEEE80211_S_INIT: 2638251538Srpaulo /* Turn link LED off. */ 2639251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2640251538Srpaulo break; 2641251538Srpaulo case IEEE80211_S_SCAN: 2642251538Srpaulo /* Pause AC Tx queues. */ 2643251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2644293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2645251538Srpaulo break; 2646251538Srpaulo case IEEE80211_S_AUTH: 2647251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2648251538Srpaulo break; 2649251538Srpaulo case IEEE80211_S_RUN: 2650251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2651251538Srpaulo /* Turn link LED on. */ 2652251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2653251538Srpaulo break; 2654251538Srpaulo } 2655251538Srpaulo 2656251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2657290631Savos 2658290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2659290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2660290631Savos device_printf(sc->sc_dev, 2661290631Savos "%s: could not move to RUN state\n", __func__); 2662290631Savos error = EINVAL; 2663290631Savos goto end_run; 2664290631Savos } 2665290631Savos 2666290631Savos switch (vap->iv_opmode) { 2667290631Savos case IEEE80211_M_STA: 2668290631Savos mode = R92C_MSR_INFRA; 2669290631Savos break; 2670290651Savos case IEEE80211_M_IBSS: 2671290651Savos mode = R92C_MSR_ADHOC; 2672290651Savos break; 2673290631Savos case IEEE80211_M_HOSTAP: 2674290631Savos mode = R92C_MSR_AP; 2675290631Savos break; 2676290631Savos default: 2677290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2678290631Savos vap->iv_opmode); 2679290631Savos error = EINVAL; 2680290631Savos goto end_run; 2681290631Savos } 2682290631Savos 2683251538Srpaulo /* Set media status to 'Associated'. */ 2684290631Savos urtwn_set_mode(sc, mode); 2685251538Srpaulo 2686251538Srpaulo /* Set BSSID. */ 2687298359Savos urtwn_write_4(sc, R92C_BSSID + 0, le32dec(&ni->ni_bssid[0])); 2688298359Savos urtwn_write_4(sc, R92C_BSSID + 4, le16dec(&ni->ni_bssid[4])); 2689251538Srpaulo 2690251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2691251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2692251538Srpaulo else /* 802.11b/g */ 2693251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2694251538Srpaulo 2695251538Srpaulo /* Enable Rx of data frames. */ 2696251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2697251538Srpaulo 2698251538Srpaulo /* Flush all AC queues. */ 2699251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2700251538Srpaulo 2701251538Srpaulo /* Set beacon interval. */ 2702251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2703251538Srpaulo 2704251538Srpaulo /* Allow Rx from our BSSID only. */ 2705290564Savos if (ic->ic_promisc == 0) { 2706290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2707290631Savos 2708301128Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) { 2709290631Savos reg |= R92C_RCR_CBSSID_DATA; 2710301128Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2711301128Savos reg |= R92C_RCR_CBSSID_BCN; 2712301128Savos } 2713290631Savos 2714290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2715290564Savos } 2716251538Srpaulo 2717290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2718290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2719290631Savos error = urtwn_setup_beacon(sc, ni); 2720290631Savos if (error != 0) { 2721290631Savos device_printf(sc->sc_dev, 2722290631Savos "unable to push beacon into the chip, " 2723290631Savos "error %d\n", error); 2724290631Savos goto end_run; 2725290631Savos } 2726290631Savos } 2727290631Savos 2728251538Srpaulo /* Enable TSF synchronization. */ 2729290631Savos urtwn_tsf_sync_enable(sc, vap); 2730251538Srpaulo 2731251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2732251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2733251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2734251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2735251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2736251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2737251538Srpaulo 2738251538Srpaulo /* Intialize rate adaptation. */ 2739292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2740264912Skevlo urtwn_ra_init(sc); 2741251538Srpaulo /* Turn link LED on. */ 2742251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2743251538Srpaulo 2744251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2745251538Srpaulo /* Reset temperature calibration state machine. */ 2746294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2747251538Srpaulo sc->thcal_lctemp = 0; 2748294473Savos /* Start periodic calibration. */ 2749294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2750290631Savos 2751290631Savosend_run: 2752251538Srpaulo ieee80211_free_node(ni); 2753251538Srpaulo break; 2754251538Srpaulo default: 2755251538Srpaulo break; 2756251538Srpaulo } 2757290631Savos 2758251538Srpaulo URTWN_UNLOCK(sc); 2759251538Srpaulo IEEE80211_LOCK(ic); 2760290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2761251538Srpaulo} 2762251538Srpaulo 2763251538Srpaulostatic void 2764294473Savosurtwn_calib_to(void *arg) 2765294473Savos{ 2766294473Savos struct urtwn_softc *sc = arg; 2767294473Savos 2768294473Savos /* Do it in a process context. */ 2769294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2770294473Savos} 2771294473Savos 2772294473Savosstatic void 2773294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2774294473Savos{ 2775294473Savos /* Do temperature compensation. */ 2776294473Savos urtwn_temp_calib(sc); 2777294473Savos 2778294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2779294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2780294473Savos} 2781294473Savos 2782294473Savosstatic void 2783251538Srpaulourtwn_watchdog(void *arg) 2784251538Srpaulo{ 2785251538Srpaulo struct urtwn_softc *sc = arg; 2786251538Srpaulo 2787251538Srpaulo if (sc->sc_txtimer > 0) { 2788251538Srpaulo if (--sc->sc_txtimer == 0) { 2789251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2790287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2791251538Srpaulo return; 2792251538Srpaulo } 2793251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2794251538Srpaulo } 2795251538Srpaulo} 2796251538Srpaulo 2797251538Srpaulostatic void 2798251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2799251538Srpaulo{ 2800251538Srpaulo int pwdb; 2801251538Srpaulo 2802251538Srpaulo /* Convert antenna signal to percentage. */ 2803251538Srpaulo if (rssi <= -100 || rssi >= 20) 2804251538Srpaulo pwdb = 0; 2805251538Srpaulo else if (rssi >= 0) 2806251538Srpaulo pwdb = 100; 2807251538Srpaulo else 2808251538Srpaulo pwdb = 100 + rssi; 2809264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2810289758Savos if (rate <= URTWN_RIDX_CCK11) { 2811264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2812264912Skevlo pwdb += 6; 2813264912Skevlo if (pwdb > 100) 2814264912Skevlo pwdb = 100; 2815264912Skevlo if (pwdb <= 14) 2816264912Skevlo pwdb -= 4; 2817264912Skevlo else if (pwdb <= 26) 2818264912Skevlo pwdb -= 8; 2819264912Skevlo else if (pwdb <= 34) 2820264912Skevlo pwdb -= 6; 2821264912Skevlo else if (pwdb <= 42) 2822264912Skevlo pwdb -= 2; 2823264912Skevlo } 2824251538Srpaulo } 2825251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2826251538Srpaulo sc->avg_pwdb = pwdb; 2827251538Srpaulo else if (sc->avg_pwdb < pwdb) 2828251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2829251538Srpaulo else 2830251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2831297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2832294471Savos pwdb, sc->avg_pwdb); 2833251538Srpaulo} 2834251538Srpaulo 2835251538Srpaulostatic int8_t 2836251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2837251538Srpaulo{ 2838251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2839251538Srpaulo struct r92c_rx_phystat *phy; 2840251538Srpaulo struct r92c_rx_cck *cck; 2841251538Srpaulo uint8_t rpt; 2842251538Srpaulo int8_t rssi; 2843251538Srpaulo 2844289758Savos if (rate <= URTWN_RIDX_CCK11) { 2845251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2846251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2847251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2848251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2849251538Srpaulo } else { 2850251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2851251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2852251538Srpaulo } 2853251538Srpaulo rssi = cckoff[rpt] - rssi; 2854251538Srpaulo } else { /* OFDM/HT. */ 2855251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2856251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2857251538Srpaulo } 2858251538Srpaulo return (rssi); 2859251538Srpaulo} 2860251538Srpaulo 2861264912Skevlostatic int8_t 2862264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2863264912Skevlo{ 2864264912Skevlo struct r92c_rx_phystat *phy; 2865264912Skevlo struct r88e_rx_cck *cck; 2866264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2867264912Skevlo int8_t rssi; 2868264912Skevlo 2869264972Skevlo rssi = 0; 2870289758Savos if (rate <= URTWN_RIDX_CCK11) { 2871264912Skevlo cck = (struct r88e_rx_cck *)physt; 2872264912Skevlo cck_agc_rpt = cck->agc_rpt; 2873264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2874281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2875264912Skevlo switch (lna_idx) { 2876264912Skevlo case 7: 2877264912Skevlo if (vga_idx <= 27) 2878264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2879264912Skevlo else 2880264912Skevlo rssi = -100; 2881264912Skevlo break; 2882264912Skevlo case 6: 2883264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2884264912Skevlo break; 2885264912Skevlo case 5: 2886264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2887264912Skevlo break; 2888264912Skevlo case 4: 2889264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2890264912Skevlo break; 2891264912Skevlo case 3: 2892264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2893264912Skevlo break; 2894264912Skevlo case 2: 2895264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2896264912Skevlo break; 2897264912Skevlo case 1: 2898264912Skevlo rssi = 8 - (2 * vga_idx); 2899264912Skevlo break; 2900264912Skevlo case 0: 2901264912Skevlo rssi = 14 - (2 * vga_idx); 2902264912Skevlo break; 2903264912Skevlo } 2904264912Skevlo rssi += 6; 2905264912Skevlo } else { /* OFDM/HT. */ 2906264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2907264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2908264912Skevlo } 2909264912Skevlo return (rssi); 2910264912Skevlo} 2911264912Skevlo 2912251538Srpaulostatic int 2913290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2914290630Savos struct mbuf *m, struct urtwn_data *data) 2915251538Srpaulo{ 2916292167Savos const struct ieee80211_txparam *tp; 2917287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2918251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2919292167Savos struct ieee80211_key *k = NULL; 2920292167Savos struct ieee80211_channel *chan; 2921292167Savos struct ieee80211_frame *wh; 2922251538Srpaulo struct r92c_tx_desc *txd; 2923300434Savos uint8_t macid, raid, rate, ridx, type, tid, qos, qsel; 2924292014Savos int hasqos, ismcast; 2925251538Srpaulo 2926251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2927251538Srpaulo 2928290630Savos wh = mtod(m, struct ieee80211_frame *); 2929264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2930292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2931290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2932264912Skevlo 2933292014Savos /* Select TX ring for this frame. */ 2934292014Savos if (hasqos) { 2935300433Savos qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2936300433Savos tid = qos & IEEE80211_QOS_TID; 2937300433Savos } else { 2938300433Savos qos = 0; 2939292014Savos tid = 0; 2940300433Savos } 2941292014Savos 2942292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2943292167Savos ni->ni_chan : ic->ic_curchan; 2944292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2945292167Savos 2946292167Savos /* Choose a TX rate index. */ 2947292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2948292167Savos rate = tp->mgmtrate; 2949292167Savos else if (ismcast) 2950292167Savos rate = tp->mcastrate; 2951292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2952292167Savos rate = tp->ucastrate; 2953292167Savos else if (m->m_flags & M_EAPOL) 2954292167Savos rate = tp->mgmtrate; 2955292167Savos else { 2956292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2957292167Savos /* XXX pass pktlen */ 2958292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2959292167Savos rate = ni->ni_txrate; 2960292167Savos } else { 2961297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2962297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2963297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2964297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2965292167Savos rate = 108; 2966292167Savos else 2967292167Savos rate = 22; 2968292167Savos } 2969292167Savos } 2970292167Savos 2971297175Sadrian /* 2972297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2973297175Sadrian * nodes in hostap mode 2974297175Sadrian */ 2975292167Savos ridx = rate2ridx(rate); 2976297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2977297175Sadrian raid = R92C_RAID_11GN; 2978297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2979292167Savos raid = R92C_RAID_11BG; 2980292167Savos else 2981292167Savos raid = R92C_RAID_11B; 2982292167Savos 2983260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2984290630Savos k = ieee80211_crypto_encap(ni, m); 2985251538Srpaulo if (k == NULL) { 2986251538Srpaulo device_printf(sc->sc_dev, 2987251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2988251538Srpaulo return (ENOBUFS); 2989251538Srpaulo } 2990251538Srpaulo 2991251538Srpaulo /* in case packet header moved, reset pointer */ 2992290630Savos wh = mtod(m, struct ieee80211_frame *); 2993251538Srpaulo } 2994281069Srpaulo 2995251538Srpaulo /* Fill Tx descriptor. */ 2996251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2997251538Srpaulo memset(txd, 0, sizeof(*txd)); 2998251538Srpaulo 2999251538Srpaulo txd->txdw0 |= htole32( 3000251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3001251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3002290630Savos if (ismcast) 3003251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3004290630Savos 3005290630Savos if (!ismcast) { 3006300433Savos /* Unicast frame, check if an ACK is expected. */ 3007300433Savos if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) != 3008300433Savos IEEE80211_QOS_ACKPOLICY_NOACK) { 3009300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 3010300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 3011300433Savos tp->maxretry)); 3012300433Savos } 3013300433Savos 3014292167Savos if (sc->chip & URTWN_CHIP_88E) { 3015292167Savos struct urtwn_node *un = URTWN_NODE(ni); 3016292167Savos macid = un->id; 3017292167Savos } else 3018292167Savos macid = URTWN_MACID_BSS; 3019290630Savos 3020290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 3021292014Savos qsel = tid % URTWN_MAX_TID; 3022290630Savos 3023292167Savos if (sc->chip & URTWN_CHIP_88E) { 3024292167Savos txd->txdw2 |= htole32( 3025292167Savos R88E_TXDW2_AGGBK | 3026292167Savos R88E_TXDW2_CCX_RPT); 3027292167Savos } else 3028290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 3029290630Savos 3030297175Sadrian /* protmode, non-HT */ 3031297175Sadrian /* XXX TODO: noack frames? */ 3032297175Sadrian if ((rate & 0x80) == 0 && 3033297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 3034290630Savos switch (ic->ic_protmode) { 3035290630Savos case IEEE80211_PROT_CTSONLY: 3036290630Savos txd->txdw4 |= htole32( 3037301132Savos R92C_TXDW4_CTS2SELF); 3038290630Savos break; 3039290630Savos case IEEE80211_PROT_RTSCTS: 3040290630Savos txd->txdw4 |= htole32( 3041290630Savos R92C_TXDW4_RTSEN | 3042290630Savos R92C_TXDW4_HWRTSEN); 3043290630Savos break; 3044290630Savos default: 3045290630Savos break; 3046290630Savos } 3047290630Savos } 3048297175Sadrian 3049297175Sadrian /* protmode, HT */ 3050297175Sadrian /* XXX TODO: noack frames? */ 3051297175Sadrian if ((rate & 0x80) && 3052297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 3053297175Sadrian txd->txdw4 |= htole32( 3054297175Sadrian R92C_TXDW4_RTSEN | 3055297175Sadrian R92C_TXDW4_HWRTSEN); 3056297175Sadrian } 3057297175Sadrian 3058297175Sadrian /* XXX TODO: rtsrate is configurable? 24mbit may 3059297175Sadrian * be a bit high for RTS rate? */ 3060290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3061290630Savos URTWN_RIDX_OFDM24)); 3062297175Sadrian 3063290630Savos txd->txdw5 |= htole32(0x0001ff00); 3064290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 3065290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 3066251538Srpaulo } else { 3067290630Savos macid = URTWN_MACID_BC; 3068290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 3069290630Savos } 3070251538Srpaulo 3071290630Savos txd->txdw1 |= htole32( 3072290630Savos SM(R92C_TXDW1_QSEL, qsel) | 3073290630Savos SM(R92C_TXDW1_RAID, raid)); 3074290630Savos 3075297175Sadrian /* XXX TODO: 40MHZ flag? */ 3076297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 3077297175Sadrian /* XXX Short preamble? */ 3078297175Sadrian /* XXX Short-GI? */ 3079297175Sadrian 3080290630Savos if (sc->chip & URTWN_CHIP_88E) 3081290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 3082290630Savos else 3083290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 3084290630Savos 3085290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3086297175Sadrian 3087291858Savos /* Force this rate if needed. */ 3088292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 3089297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 3090292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 3091251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3092251538Srpaulo 3093292014Savos if (!hasqos) { 3094251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 3095291858Savos if (sc->chip & URTWN_CHIP_88E) 3096291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3097291858Savos else 3098291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3099290630Savos } else { 3100290630Savos /* Set sequence number. */ 3101290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3102290630Savos } 3103251538Srpaulo 3104292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3105292175Savos uint8_t cipher; 3106292175Savos 3107292175Savos switch (k->wk_cipher->ic_cipher) { 3108292175Savos case IEEE80211_CIPHER_WEP: 3109292175Savos case IEEE80211_CIPHER_TKIP: 3110292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3111292175Savos break; 3112292175Savos case IEEE80211_CIPHER_AES_CCM: 3113292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3114292175Savos break; 3115292175Savos default: 3116292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3117292175Savos __func__, k->wk_cipher->ic_cipher); 3118292175Savos return (EINVAL); 3119292175Savos } 3120292175Savos 3121292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3122292175Savos } 3123292175Savos 3124251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3125251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3126251538Srpaulo 3127251538Srpaulo tap->wt_flags = 0; 3128290630Savos if (k != NULL) 3129290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3130290630Savos ieee80211_radiotap_tx(vap, m); 3131251538Srpaulo } 3132251538Srpaulo 3133290630Savos data->ni = ni; 3134251538Srpaulo 3135290630Savos urtwn_tx_start(sc, m, type, data); 3136290630Savos 3137290630Savos return (0); 3138290630Savos} 3139290630Savos 3140292221Savosstatic int 3141292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3142292221Savos struct mbuf *m, struct urtwn_data *data, 3143292221Savos const struct ieee80211_bpf_params *params) 3144292221Savos{ 3145292221Savos struct ieee80211vap *vap = ni->ni_vap; 3146292221Savos struct ieee80211_key *k = NULL; 3147292221Savos struct ieee80211_frame *wh; 3148292221Savos struct r92c_tx_desc *txd; 3149292221Savos uint8_t cipher, ridx, type; 3150292221Savos 3151292221Savos /* Encrypt the frame if need be. */ 3152292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3153292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3154292221Savos /* Retrieve key for TX. */ 3155292221Savos k = ieee80211_crypto_encap(ni, m); 3156292221Savos if (k == NULL) 3157292221Savos return (ENOBUFS); 3158292221Savos 3159292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3160292221Savos switch (k->wk_cipher->ic_cipher) { 3161292221Savos case IEEE80211_CIPHER_WEP: 3162292221Savos case IEEE80211_CIPHER_TKIP: 3163292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3164292221Savos break; 3165292221Savos case IEEE80211_CIPHER_AES_CCM: 3166292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3167292221Savos break; 3168292221Savos default: 3169292221Savos device_printf(sc->sc_dev, 3170292221Savos "%s: unknown cipher %d\n", 3171292221Savos __func__, k->wk_cipher->ic_cipher); 3172292221Savos return (EINVAL); 3173292221Savos } 3174292221Savos } 3175292221Savos } 3176292221Savos 3177297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3178297175Sadrian 3179292221Savos wh = mtod(m, struct ieee80211_frame *); 3180292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3181292221Savos 3182292221Savos /* Fill Tx descriptor. */ 3183292221Savos txd = (struct r92c_tx_desc *)data->buf; 3184292221Savos memset(txd, 0, sizeof(*txd)); 3185292221Savos 3186292221Savos txd->txdw0 |= htole32( 3187292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3188292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3189292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3190292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3191292221Savos 3192300433Savos if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) { 3193300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 3194300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 3195300433Savos params->ibp_try0)); 3196300433Savos } 3197292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3198301132Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_HWRTSEN); 3199292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3200292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3201292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3202292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3203292221Savos URTWN_RIDX_OFDM24)); 3204292221Savos } 3205292221Savos 3206292221Savos if (sc->chip & URTWN_CHIP_88E) 3207292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3208292221Savos else 3209292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3210292221Savos 3211297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3212292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3213292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3214292221Savos 3215292221Savos /* Choose a TX rate index. */ 3216292221Savos ridx = rate2ridx(params->ibp_rate0); 3217292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3218292221Savos txd->txdw5 |= htole32(0x0001ff00); 3219292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3220292221Savos 3221292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3222292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3223292221Savos if (sc->chip & URTWN_CHIP_88E) 3224292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3225292221Savos else 3226292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3227292221Savos } else { 3228292221Savos /* Set sequence number. */ 3229292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3230292221Savos } 3231292221Savos 3232292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3233292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3234292221Savos 3235292221Savos tap->wt_flags = 0; 3236292221Savos if (k != NULL) 3237292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3238292221Savos ieee80211_radiotap_tx(vap, m); 3239292221Savos } 3240292221Savos 3241292221Savos data->ni = ni; 3242292221Savos 3243292221Savos urtwn_tx_start(sc, m, type, data); 3244292221Savos 3245292221Savos return (0); 3246292221Savos} 3247292221Savos 3248290630Savosstatic void 3249290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3250290630Savos struct urtwn_data *data) 3251290630Savos{ 3252290630Savos struct usb_xfer *xfer; 3253290630Savos struct r92c_tx_desc *txd; 3254290630Savos uint16_t ac, sum; 3255290630Savos int i, xferlen; 3256290630Savos 3257290630Savos URTWN_ASSERT_LOCKED(sc); 3258290630Savos 3259290630Savos ac = M_WME_GETAC(m); 3260290630Savos 3261290630Savos switch (type) { 3262290630Savos case IEEE80211_FC0_TYPE_CTL: 3263290630Savos case IEEE80211_FC0_TYPE_MGT: 3264290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3265290630Savos break; 3266290630Savos default: 3267292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3268290630Savos break; 3269290630Savos } 3270290630Savos 3271290630Savos txd = (struct r92c_tx_desc *)data->buf; 3272290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3273290630Savos 3274290630Savos /* Compute Tx descriptor checksum. */ 3275290630Savos sum = 0; 3276290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3277290630Savos sum ^= ((uint16_t *)txd)[i]; 3278290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3279290630Savos 3280290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3281290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3282290630Savos 3283251538Srpaulo data->buflen = xferlen; 3284290630Savos data->m = m; 3285251538Srpaulo 3286251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3287251538Srpaulo usbd_transfer_start(xfer); 3288251538Srpaulo} 3289251538Srpaulo 3290287197Sglebiusstatic int 3291287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3292251538Srpaulo{ 3293287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3294287197Sglebius int error; 3295261863Srpaulo 3296261863Srpaulo URTWN_LOCK(sc); 3297287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3298287197Sglebius URTWN_UNLOCK(sc); 3299287197Sglebius return (ENXIO); 3300287197Sglebius } 3301287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3302287197Sglebius if (error) { 3303287197Sglebius URTWN_UNLOCK(sc); 3304287197Sglebius return (error); 3305287197Sglebius } 3306287197Sglebius urtwn_start(sc); 3307261863Srpaulo URTWN_UNLOCK(sc); 3308287197Sglebius 3309287197Sglebius return (0); 3310261863Srpaulo} 3311261863Srpaulo 3312261863Srpaulostatic void 3313287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3314261863Srpaulo{ 3315251538Srpaulo struct ieee80211_node *ni; 3316251538Srpaulo struct mbuf *m; 3317251538Srpaulo struct urtwn_data *bf; 3318251538Srpaulo 3319261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3320287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3321251538Srpaulo bf = urtwn_getbuf(sc); 3322251538Srpaulo if (bf == NULL) { 3323287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3324251538Srpaulo break; 3325251538Srpaulo } 3326251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3327251538Srpaulo m->m_pkthdr.rcvif = NULL; 3328297596Sadrian 3329297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3330297596Sadrian __func__, 3331297596Sadrian m); 3332297596Sadrian 3333290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3334287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3335287197Sglebius IFCOUNTER_OERRORS, 1); 3336251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3337288353Sadrian m_freem(m); 3338251538Srpaulo ieee80211_free_node(ni); 3339251538Srpaulo break; 3340251538Srpaulo } 3341251538Srpaulo sc->sc_txtimer = 5; 3342251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3343251538Srpaulo } 3344251538Srpaulo} 3345251538Srpaulo 3346287197Sglebiusstatic void 3347287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3348251538Srpaulo{ 3349286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3350251538Srpaulo 3351263153Skevlo URTWN_LOCK(sc); 3352287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3353287197Sglebius URTWN_UNLOCK(sc); 3354287197Sglebius return; 3355287197Sglebius } 3356291698Savos URTWN_UNLOCK(sc); 3357291698Savos 3358287197Sglebius if (ic->ic_nrunning > 0) { 3359291698Savos if (urtwn_init(sc) != 0) { 3360291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3361291698Savos if (vap != NULL) 3362291698Savos ieee80211_stop(vap); 3363291698Savos } else 3364291698Savos ieee80211_start_all(ic); 3365291698Savos } else 3366287197Sglebius urtwn_stop(sc); 3367251538Srpaulo} 3368251538Srpaulo 3369264912Skevlostatic __inline int 3370251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3371251538Srpaulo{ 3372264912Skevlo 3373264912Skevlo return sc->sc_power_on(sc); 3374264912Skevlo} 3375264912Skevlo 3376264912Skevlostatic int 3377264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3378264912Skevlo{ 3379251538Srpaulo uint32_t reg; 3380291698Savos usb_error_t error; 3381251538Srpaulo int ntries; 3382251538Srpaulo 3383251538Srpaulo /* Wait for autoload done bit. */ 3384251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3385251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3386251538Srpaulo break; 3387266472Shselasky urtwn_ms_delay(sc); 3388251538Srpaulo } 3389251538Srpaulo if (ntries == 1000) { 3390251538Srpaulo device_printf(sc->sc_dev, 3391251538Srpaulo "timeout waiting for chip autoload\n"); 3392251538Srpaulo return (ETIMEDOUT); 3393251538Srpaulo } 3394251538Srpaulo 3395251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3396291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3397291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3398291698Savos return (EIO); 3399251538Srpaulo /* Move SPS into PWM mode. */ 3400291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3401291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3402291698Savos return (EIO); 3403266472Shselasky urtwn_ms_delay(sc); 3404251538Srpaulo 3405251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3406251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3407291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3408251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3409291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3410291698Savos return (EIO); 3411266472Shselasky urtwn_ms_delay(sc); 3412291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3413251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3414251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3415291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3416291698Savos return (EIO); 3417251538Srpaulo } 3418251538Srpaulo 3419251538Srpaulo /* Auto enable WLAN. */ 3420291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3421251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3422291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3423291698Savos return (EIO); 3424251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3425262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3426262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3427251538Srpaulo break; 3428266472Shselasky urtwn_ms_delay(sc); 3429251538Srpaulo } 3430251538Srpaulo if (ntries == 1000) { 3431251538Srpaulo device_printf(sc->sc_dev, 3432251538Srpaulo "timeout waiting for MAC auto ON\n"); 3433251538Srpaulo return (ETIMEDOUT); 3434251538Srpaulo } 3435251538Srpaulo 3436251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3437291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3438251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3439251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3440251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3441291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3442291698Savos return (EIO); 3443251538Srpaulo /* Release RF digital isolation. */ 3444291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3445251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3446291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3447291698Savos return (EIO); 3448251538Srpaulo 3449251538Srpaulo /* Initialize MAC. */ 3450291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3451251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3452291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3453291698Savos return (EIO); 3454251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3455251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3456251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3457251538Srpaulo break; 3458266472Shselasky urtwn_ms_delay(sc); 3459251538Srpaulo } 3460251538Srpaulo if (ntries == 200) { 3461251538Srpaulo device_printf(sc->sc_dev, 3462251538Srpaulo "timeout waiting for MAC initialization\n"); 3463251538Srpaulo return (ETIMEDOUT); 3464251538Srpaulo } 3465251538Srpaulo 3466251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3467251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3468251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3469251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3470251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3471251538Srpaulo R92C_CR_ENSEC; 3472291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3473291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3474291698Savos return (EIO); 3475251538Srpaulo 3476291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3477291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3478291698Savos return (EIO); 3479251538Srpaulo return (0); 3480251538Srpaulo} 3481251538Srpaulo 3482251538Srpaulostatic int 3483264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3484264912Skevlo{ 3485264912Skevlo uint32_t reg; 3486291698Savos usb_error_t error; 3487264912Skevlo int ntries; 3488264912Skevlo 3489264912Skevlo /* Wait for power ready bit. */ 3490264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3491281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3492264912Skevlo break; 3493266472Shselasky urtwn_ms_delay(sc); 3494264912Skevlo } 3495264912Skevlo if (ntries == 5000) { 3496264912Skevlo device_printf(sc->sc_dev, 3497264912Skevlo "timeout waiting for chip power up\n"); 3498264912Skevlo return (ETIMEDOUT); 3499264912Skevlo } 3500264912Skevlo 3501264912Skevlo /* Reset BB. */ 3502291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3503264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3504264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3505291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3506291698Savos return (EIO); 3507264912Skevlo 3508291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3509281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3510291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3511291698Savos return (EIO); 3512264912Skevlo 3513264912Skevlo /* Disable HWPDN. */ 3514291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3515281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3516291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3517291698Savos return (EIO); 3518264912Skevlo 3519264912Skevlo /* Disable WL suspend. */ 3520291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3521281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3522281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3523291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3524291698Savos return (EIO); 3525264912Skevlo 3526291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3527281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3528291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3529291698Savos return (EIO); 3530264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3531281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3532281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3533264912Skevlo break; 3534266472Shselasky urtwn_ms_delay(sc); 3535264912Skevlo } 3536264912Skevlo if (ntries == 5000) 3537264912Skevlo return (ETIMEDOUT); 3538264912Skevlo 3539264912Skevlo /* Enable LDO normal mode. */ 3540291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3541295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3542291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3543291698Savos return (EIO); 3544264912Skevlo 3545264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3546291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3547291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3548291698Savos return (EIO); 3549264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3550264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3551264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3552264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3553291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3554291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3555291698Savos return (EIO); 3556264912Skevlo 3557264912Skevlo return (0); 3558264912Skevlo} 3559264912Skevlo 3560295874Savosstatic __inline void 3561295874Savosurtwn_power_off(struct urtwn_softc *sc) 3562295874Savos{ 3563295874Savos 3564295874Savos return sc->sc_power_off(sc); 3565295874Savos} 3566295874Savos 3567295874Savosstatic void 3568295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3569295874Savos{ 3570295874Savos uint32_t reg; 3571295874Savos 3572295874Savos /* Block all Tx queues. */ 3573295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3574295874Savos 3575295874Savos /* Disable RF */ 3576295874Savos urtwn_rf_write(sc, 0, 0, 0); 3577295874Savos 3578295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3579295874Savos 3580295874Savos /* Reset BB state machine */ 3581295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3582295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3583295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3584295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3585295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3586295874Savos 3587295874Savos /* 3588295874Savos * Reset digital sequence 3589295874Savos */ 3590295874Savos#ifndef URTWN_WITHOUT_UCODE 3591295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3592295874Savos /* Reset MCU ready status */ 3593295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3594295874Savos 3595295874Savos /* If firmware in ram code, do reset */ 3596295874Savos urtwn_fw_reset(sc); 3597295874Savos } 3598295874Savos#endif 3599295874Savos 3600295874Savos /* Reset MAC and Enable 8051 */ 3601295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3602295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3603295874Savos R92C_SYS_FUNC_EN_ELDR | 3604295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3605295874Savos 3606295874Savos /* Reset MCU ready status */ 3607295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3608295874Savos 3609295874Savos /* Disable MAC clock */ 3610295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3611295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3612295874Savos R92C_SYS_CLKR_ANA8M | 3613295874Savos R92C_SYS_CLKR_LOADER_EN | 3614295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3615295874Savos R92C_SYS_CLKR_SYS_EN | 3616295874Savos R92C_SYS_CLKR_RING_EN | 3617295874Savos 0x4000); 3618295874Savos 3619295874Savos /* Disable AFE PLL */ 3620295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3621295874Savos 3622295874Savos /* Gated AFE DIG_CLOCK */ 3623295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3624295874Savos 3625295874Savos /* Isolated digital to PON */ 3626295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3627295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3628295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3629295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3630295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3631295874Savos R92C_SYS_ISO_CTRL_DIOP | 3632295874Savos R92C_SYS_ISO_CTRL_DIOE); 3633295874Savos 3634295874Savos /* 3635295874Savos * Pull GPIO PIN to balance level and LED control 3636295874Savos */ 3637295874Savos /* 1. Disable GPIO[7:0] */ 3638295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3639295874Savos 3640295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3641295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3642295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3643295874Savos 3644295874Savos /* Disable GPIO[10:8] */ 3645295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3646295874Savos 3647295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3648295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3649295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3650295874Savos 3651295874Savos /* Disable LED0 & 1 */ 3652295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3653295874Savos 3654295874Savos /* 3655295874Savos * Reset digital sequence 3656295874Savos */ 3657295874Savos /* Disable ELDR clock */ 3658295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3659295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3660295874Savos R92C_SYS_CLKR_ANA8M | 3661295874Savos R92C_SYS_CLKR_LOADER_EN | 3662295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3663295874Savos R92C_SYS_CLKR_SYS_EN | 3664295874Savos R92C_SYS_CLKR_RING_EN | 3665295874Savos 0x4000); 3666295874Savos 3667295874Savos /* Isolated ELDR to PON */ 3668295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3669295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3670295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3671295874Savos 3672295874Savos /* 3673295874Savos * Disable analog sequence 3674295874Savos */ 3675295874Savos /* Disable A15 power */ 3676295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3677295874Savos /* Disable digital core power */ 3678295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3679295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3680295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3681295874Savos 3682295874Savos /* Enter PFM mode */ 3683295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3684295874Savos 3685295874Savos /* Set USB suspend */ 3686295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3687295874Savos R92C_APS_FSMCO_APDM_HOST | 3688295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3689295874Savos R92C_APS_FSMCO_PFM_ALDN); 3690295874Savos 3691295874Savos /* Lock ISO/CLK/Power control register. */ 3692295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3693295874Savos} 3694295874Savos 3695295874Savosstatic void 3696295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3697295874Savos{ 3698295874Savos uint8_t reg; 3699295874Savos int ntries; 3700295874Savos 3701295874Savos /* Disable any kind of TX reports. */ 3702295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3703295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3704295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3705295874Savos 3706295874Savos /* Stop Rx. */ 3707295874Savos urtwn_write_1(sc, R92C_CR, 0); 3708295874Savos 3709295874Savos /* Move card to Low Power State. */ 3710295874Savos /* Block all Tx queues. */ 3711295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3712295874Savos 3713295874Savos for (ntries = 0; ntries < 20; ntries++) { 3714295874Savos /* Should be zero if no packet is transmitting. */ 3715295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3716295874Savos break; 3717295874Savos 3718295874Savos urtwn_ms_delay(sc); 3719295874Savos } 3720295874Savos if (ntries == 20) { 3721295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3722295874Savos __func__); 3723295874Savos return; 3724295874Savos } 3725295874Savos 3726295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3727295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3728295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3729295874Savos 3730295874Savos urtwn_ms_delay(sc); 3731295874Savos 3732295874Savos /* Reset MAC TRX */ 3733295874Savos urtwn_write_1(sc, R92C_CR, 3734295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3735295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3736295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3737295874Savos 3738295874Savos /* check if removed later */ 3739295874Savos urtwn_write_1(sc, R92C_CR + 1, 3740295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3741295874Savos 3742295874Savos /* Respond TxOK to scheduler */ 3743295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3744295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3745295874Savos 3746295874Savos /* If firmware in ram code, do reset. */ 3747295874Savos#ifndef URTWN_WITHOUT_UCODE 3748295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3749295874Savos urtwn_r88e_fw_reset(sc); 3750295874Savos#endif 3751295874Savos 3752295874Savos /* Reset MCU ready status. */ 3753295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3754295874Savos 3755295874Savos /* Disable 32k. */ 3756295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3757295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3758295874Savos 3759295874Savos /* Move card to Disabled state. */ 3760295874Savos /* Turn off RF. */ 3761295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3762295874Savos 3763295874Savos /* LDO Sleep mode. */ 3764295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3765295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3766295874Savos 3767295874Savos /* Turn off MAC by HW state machine */ 3768295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3769295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3770295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3771295874Savos 3772295874Savos for (ntries = 0; ntries < 20; ntries++) { 3773295874Savos /* Wait until it will be disabled. */ 3774295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3775295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3776295874Savos break; 3777295874Savos 3778295874Savos urtwn_ms_delay(sc); 3779295874Savos } 3780295874Savos if (ntries == 20) { 3781295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3782295874Savos __func__); 3783295874Savos return; 3784295874Savos } 3785295874Savos 3786295874Savos /* schmit trigger */ 3787295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3788295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3789295874Savos 3790295874Savos /* Enable WL suspend. */ 3791295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3792295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3793295874Savos 3794295874Savos /* Enable bandgap mbias in suspend. */ 3795295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3796295874Savos 3797295874Savos /* Clear SIC_EN register. */ 3798295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3799295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3800295874Savos 3801295874Savos /* Set USB suspend enable local register */ 3802295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3803295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3804295874Savos 3805295874Savos /* Reset MCU IO Wrapper. */ 3806295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3807295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3808295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3809295874Savos 3810295874Savos /* marked as 'For Power Consumption' code. */ 3811295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3812295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3813295874Savos 3814295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3815295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3816295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3817295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3818295874Savos 3819295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3820295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3821295874Savos} 3822295874Savos 3823264912Skevlostatic int 3824251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3825251538Srpaulo{ 3826264912Skevlo int i, error, page_count, pktbuf_count; 3827251538Srpaulo 3828264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3829264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3830264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3831264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3832264912Skevlo 3833264912Skevlo /* Reserve pages [0; page_count]. */ 3834264912Skevlo for (i = 0; i < page_count; i++) { 3835251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3836251538Srpaulo return (error); 3837251538Srpaulo } 3838251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3839251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3840251538Srpaulo return (error); 3841251538Srpaulo /* 3842264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3843251538Srpaulo * as ring buffer. 3844251538Srpaulo */ 3845264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3846251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3847251538Srpaulo return (error); 3848251538Srpaulo } 3849251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3850264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3851251538Srpaulo return (error); 3852251538Srpaulo} 3853251538Srpaulo 3854295871Savos#ifndef URTWN_WITHOUT_UCODE 3855251538Srpaulostatic void 3856251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3857251538Srpaulo{ 3858251538Srpaulo uint16_t reg; 3859251538Srpaulo int ntries; 3860251538Srpaulo 3861251538Srpaulo /* Tell 8051 to reset itself. */ 3862251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3863251538Srpaulo 3864251538Srpaulo /* Wait until 8051 resets by itself. */ 3865251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3866251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3867251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3868251538Srpaulo return; 3869266472Shselasky urtwn_ms_delay(sc); 3870251538Srpaulo } 3871251538Srpaulo /* Force 8051 reset. */ 3872251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3873251538Srpaulo} 3874251538Srpaulo 3875264912Skevlostatic void 3876264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3877264912Skevlo{ 3878264912Skevlo uint16_t reg; 3879264912Skevlo 3880264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3881264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3882264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3883264912Skevlo} 3884264912Skevlo 3885251538Srpaulostatic int 3886251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3887251538Srpaulo{ 3888251538Srpaulo uint32_t reg; 3889291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3890291698Savos int off, mlen; 3891251538Srpaulo 3892251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3893251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3894251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3895251538Srpaulo 3896251538Srpaulo off = R92C_FW_START_ADDR; 3897251538Srpaulo while (len > 0) { 3898251538Srpaulo if (len > 196) 3899251538Srpaulo mlen = 196; 3900251538Srpaulo else if (len > 4) 3901251538Srpaulo mlen = 4; 3902251538Srpaulo else 3903251538Srpaulo mlen = 1; 3904251538Srpaulo /* XXX fix this deconst */ 3905281069Srpaulo error = urtwn_write_region_1(sc, off, 3906251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3907291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3908251538Srpaulo break; 3909251538Srpaulo off += mlen; 3910251538Srpaulo buf += mlen; 3911251538Srpaulo len -= mlen; 3912251538Srpaulo } 3913251538Srpaulo return (error); 3914251538Srpaulo} 3915251538Srpaulo 3916251538Srpaulostatic int 3917251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3918251538Srpaulo{ 3919251538Srpaulo const struct firmware *fw; 3920251538Srpaulo const struct r92c_fw_hdr *hdr; 3921251538Srpaulo const char *imagename; 3922251538Srpaulo const u_char *ptr; 3923251538Srpaulo size_t len; 3924251538Srpaulo uint32_t reg; 3925251538Srpaulo int mlen, ntries, page, error; 3926251538Srpaulo 3927264864Skevlo URTWN_UNLOCK(sc); 3928251538Srpaulo /* Read firmware image from the filesystem. */ 3929264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3930264912Skevlo imagename = "urtwn-rtl8188eufw"; 3931264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3932264912Skevlo URTWN_CHIP_UMC_A_CUT) 3933251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3934251538Srpaulo else 3935251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3936251538Srpaulo 3937251538Srpaulo fw = firmware_get(imagename); 3938264864Skevlo URTWN_LOCK(sc); 3939251538Srpaulo if (fw == NULL) { 3940251538Srpaulo device_printf(sc->sc_dev, 3941251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3942251538Srpaulo return (ENOENT); 3943251538Srpaulo } 3944251538Srpaulo 3945251538Srpaulo len = fw->datasize; 3946251538Srpaulo 3947251538Srpaulo if (len < sizeof(*hdr)) { 3948251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3949251538Srpaulo error = EINVAL; 3950251538Srpaulo goto fail; 3951251538Srpaulo } 3952251538Srpaulo ptr = fw->data; 3953251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3954251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3955251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3956264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3957251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3958294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3959294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3960251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3961251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3962251538Srpaulo ptr += sizeof(*hdr); 3963251538Srpaulo len -= sizeof(*hdr); 3964251538Srpaulo } 3965251538Srpaulo 3966264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3967264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3968264912Skevlo urtwn_r88e_fw_reset(sc); 3969264912Skevlo else 3970264912Skevlo urtwn_fw_reset(sc); 3971251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3972251538Srpaulo } 3973264912Skevlo 3974268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3975268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3976268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3977268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3978268487Skevlo } 3979251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3980251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3981251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3982251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3983251538Srpaulo 3984263154Skevlo /* Reset the FWDL checksum. */ 3985263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3986263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3987263154Skevlo 3988251538Srpaulo for (page = 0; len > 0; page++) { 3989251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3990251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3991251538Srpaulo if (error != 0) { 3992251538Srpaulo device_printf(sc->sc_dev, 3993251538Srpaulo "could not load firmware page\n"); 3994251538Srpaulo goto fail; 3995251538Srpaulo } 3996251538Srpaulo ptr += mlen; 3997251538Srpaulo len -= mlen; 3998251538Srpaulo } 3999251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 4000251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 4001251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 4002251538Srpaulo 4003251538Srpaulo /* Wait for checksum report. */ 4004251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 4005251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 4006251538Srpaulo break; 4007266472Shselasky urtwn_ms_delay(sc); 4008251538Srpaulo } 4009251538Srpaulo if (ntries == 1000) { 4010251538Srpaulo device_printf(sc->sc_dev, 4011251538Srpaulo "timeout waiting for checksum report\n"); 4012251538Srpaulo error = ETIMEDOUT; 4013251538Srpaulo goto fail; 4014251538Srpaulo } 4015251538Srpaulo 4016251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 4017251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 4018251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 4019264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4020264912Skevlo urtwn_r88e_fw_reset(sc); 4021251538Srpaulo /* Wait for firmware readiness. */ 4022251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 4023251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 4024251538Srpaulo break; 4025266472Shselasky urtwn_ms_delay(sc); 4026251538Srpaulo } 4027251538Srpaulo if (ntries == 1000) { 4028251538Srpaulo device_printf(sc->sc_dev, 4029251538Srpaulo "timeout waiting for firmware readiness\n"); 4030251538Srpaulo error = ETIMEDOUT; 4031251538Srpaulo goto fail; 4032251538Srpaulo } 4033251538Srpaulofail: 4034251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 4035251538Srpaulo return (error); 4036251538Srpaulo} 4037295871Savos#endif 4038251538Srpaulo 4039291902Skevlostatic int 4040251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 4041251538Srpaulo{ 4042291902Skevlo struct usb_endpoint *ep, *ep_end; 4043291698Savos usb_error_t usb_err; 4044291902Skevlo uint32_t reg; 4045291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 4046291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 4047281069Srpaulo 4048291695Savos /* Initialize LLT table. */ 4049291695Savos error = urtwn_llt_init(sc); 4050291695Savos if (error != 0) 4051291695Savos return (error); 4052291695Savos 4053291902Skevlo /* Determine the number of bulk-out pipes. */ 4054291902Skevlo ntx = 0; 4055291902Skevlo ep = sc->sc_udev->endpoints; 4056291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 4057291902Skevlo for (; ep != ep_end; ep++) { 4058291902Skevlo if ((ep->edesc == NULL) || 4059291902Skevlo (ep->iface_index != sc->sc_iface_index)) 4060291902Skevlo continue; 4061291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 4062291902Skevlo ntx++; 4063291902Skevlo } 4064291902Skevlo if (ntx == 0) { 4065291902Skevlo device_printf(sc->sc_dev, 4066291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 4067291698Savos return (EIO); 4068291902Skevlo } 4069291695Savos 4070251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 4071291902Skevlo hashq = hasnq = haslq = nqueues = 0; 4072291902Skevlo switch (ntx) { 4073291902Skevlo case 1: hashq = 1; break; 4074291902Skevlo case 2: hashq = hasnq = 1; break; 4075291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 4076291902Skevlo } 4077251538Srpaulo nqueues = hashq + hasnq + haslq; 4078251538Srpaulo if (nqueues == 0) 4079251538Srpaulo return (EIO); 4080251538Srpaulo 4081291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 4082291902Skevlo if (sc->chip & URTWN_CHIP_88E) 4083291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 4084291902Skevlo else { 4085291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 4086291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 4087291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 4088291902Skevlo } 4089291902Skevlo 4090251538Srpaulo /* Set number of pages for normal priority queue. */ 4091291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 4092291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 4093291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4094291902Skevlo return (EIO); 4095291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 4096291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4097291902Skevlo return (EIO); 4098291902Skevlo } else { 4099291902Skevlo /* Get the number of pages for each queue. */ 4100291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 4101291902Skevlo /* 4102291902Skevlo * The remaining pages are assigned to the high priority 4103291902Skevlo * queue. 4104291902Skevlo */ 4105291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4106291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4107291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4108291902Skevlo return (EIO); 4109291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4110291902Skevlo /* Set number of pages for public queue. */ 4111291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4112291902Skevlo /* Set number of pages for high priority queue. */ 4113291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4114291902Skevlo /* Set number of pages for low priority queue. */ 4115291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4116291902Skevlo /* Load values. */ 4117291902Skevlo R92C_RQPN_LD); 4118291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4119291902Skevlo return (EIO); 4120291902Skevlo } 4121251538Srpaulo 4122291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4123291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4124291698Savos return (EIO); 4125291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4126291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4127291698Savos return (EIO); 4128291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4129291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4130291698Savos return (EIO); 4131291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4132291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4133291698Savos return (EIO); 4134291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4135291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4136291698Savos return (EIO); 4137251538Srpaulo 4138251538Srpaulo /* Set queue to USB pipe mapping. */ 4139251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4140251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4141251538Srpaulo if (nqueues == 1) { 4142251538Srpaulo if (hashq) 4143251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4144251538Srpaulo else if (hasnq) 4145251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4146251538Srpaulo else 4147251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4148251538Srpaulo } else if (nqueues == 2) { 4149292056Skevlo /* 4150292056Skevlo * All 2-endpoints configs have high and normal 4151292056Skevlo * priority queues. 4152292056Skevlo */ 4153292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4154251538Srpaulo } else 4155251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4156291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4157291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4158291698Savos return (EIO); 4159251538Srpaulo 4160251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4161291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4162291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4163291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4164291698Savos return (EIO); 4165251538Srpaulo 4166291902Skevlo /* Set Tx/Rx transfer page size. */ 4167291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4168291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4169291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4170291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4171264912Skevlo return (EIO); 4172264912Skevlo 4173264912Skevlo return (0); 4174264912Skevlo} 4175264912Skevlo 4176291698Savosstatic int 4177251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4178251538Srpaulo{ 4179291698Savos usb_error_t error; 4180251538Srpaulo int i; 4181251538Srpaulo 4182251538Srpaulo /* Write MAC initialization values. */ 4183264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4184264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4185291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4186264912Skevlo rtl8188eu_mac[i].val); 4187291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4188291698Savos return (EIO); 4189264912Skevlo } 4190264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4191264912Skevlo } else { 4192264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 4193291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4194264912Skevlo rtl8192cu_mac[i].val); 4195291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4196291698Savos return (EIO); 4197264912Skevlo } 4198291698Savos 4199291698Savos return (0); 4200251538Srpaulo} 4201251538Srpaulo 4202251538Srpaulostatic void 4203251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4204251538Srpaulo{ 4205251538Srpaulo const struct urtwn_bb_prog *prog; 4206251538Srpaulo uint32_t reg; 4207264912Skevlo uint8_t crystalcap; 4208251538Srpaulo int i; 4209251538Srpaulo 4210251538Srpaulo /* Enable BB and RF. */ 4211251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4212251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4213251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4214251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4215251538Srpaulo 4216264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4217264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4218251538Srpaulo 4219251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4220251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4221251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4222251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4223251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4224251538Srpaulo 4225264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4226264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4227264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4228264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4229264912Skevlo } 4230251538Srpaulo 4231251538Srpaulo /* Select BB programming based on board type. */ 4232264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4233264912Skevlo prog = &rtl8188eu_bb_prog; 4234264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4235251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4236251538Srpaulo prog = &rtl8188ce_bb_prog; 4237251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4238251538Srpaulo prog = &rtl8188ru_bb_prog; 4239251538Srpaulo else 4240251538Srpaulo prog = &rtl8188cu_bb_prog; 4241251538Srpaulo } else { 4242251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4243251538Srpaulo prog = &rtl8192ce_bb_prog; 4244251538Srpaulo else 4245251538Srpaulo prog = &rtl8192cu_bb_prog; 4246251538Srpaulo } 4247251538Srpaulo /* Write BB initialization values. */ 4248251538Srpaulo for (i = 0; i < prog->count; i++) { 4249251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4250266472Shselasky urtwn_ms_delay(sc); 4251251538Srpaulo } 4252251538Srpaulo 4253251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4254251538Srpaulo /* 8192C 1T only configuration. */ 4255251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4256251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4257251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4258251538Srpaulo 4259251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4260251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4261251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4262251538Srpaulo 4263251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4264251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4265251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4266251538Srpaulo 4267251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4268251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4269251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4270251538Srpaulo 4271251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4272251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4273251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4274251538Srpaulo 4275251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4276251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4277251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4278251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4279251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4280251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4281251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4282251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4283251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4284251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4285251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4286251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4287251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4288251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4289251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4290251538Srpaulo } 4291251538Srpaulo 4292251538Srpaulo /* Write AGC values. */ 4293251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4294251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4295251538Srpaulo prog->agcvals[i]); 4296266472Shselasky urtwn_ms_delay(sc); 4297251538Srpaulo } 4298251538Srpaulo 4299264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4300264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4301266472Shselasky urtwn_ms_delay(sc); 4302264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4303266472Shselasky urtwn_ms_delay(sc); 4304264912Skevlo 4305294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4306264912Skevlo if (crystalcap == 0xff) 4307264912Skevlo crystalcap = 0x20; 4308264912Skevlo crystalcap &= 0x3f; 4309264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4310264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4311264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4312264912Skevlo crystalcap | crystalcap << 6)); 4313264912Skevlo } else { 4314264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4315264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4316264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4317264912Skevlo } 4318251538Srpaulo} 4319251538Srpaulo 4320289066Skevlostatic void 4321251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4322251538Srpaulo{ 4323251538Srpaulo const struct urtwn_rf_prog *prog; 4324251538Srpaulo uint32_t reg, type; 4325251538Srpaulo int i, j, idx, off; 4326251538Srpaulo 4327251538Srpaulo /* Select RF programming based on board type. */ 4328264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4329264912Skevlo prog = rtl8188eu_rf_prog; 4330264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4331251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4332251538Srpaulo prog = rtl8188ce_rf_prog; 4333251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4334251538Srpaulo prog = rtl8188ru_rf_prog; 4335251538Srpaulo else 4336251538Srpaulo prog = rtl8188cu_rf_prog; 4337251538Srpaulo } else 4338251538Srpaulo prog = rtl8192ce_rf_prog; 4339251538Srpaulo 4340251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4341251538Srpaulo /* Save RF_ENV control type. */ 4342251538Srpaulo idx = i / 2; 4343251538Srpaulo off = (i % 2) * 16; 4344251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4345251538Srpaulo type = (reg >> off) & 0x10; 4346251538Srpaulo 4347251538Srpaulo /* Set RF_ENV enable. */ 4348251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4349251538Srpaulo reg |= 0x100000; 4350251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4351266472Shselasky urtwn_ms_delay(sc); 4352251538Srpaulo /* Set RF_ENV output high. */ 4353251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4354251538Srpaulo reg |= 0x10; 4355251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4356266472Shselasky urtwn_ms_delay(sc); 4357251538Srpaulo /* Set address and data lengths of RF registers. */ 4358251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4359251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4360251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4361266472Shselasky urtwn_ms_delay(sc); 4362251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4363251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4364251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4365266472Shselasky urtwn_ms_delay(sc); 4366251538Srpaulo 4367251538Srpaulo /* Write RF initialization values for this chain. */ 4368251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4369251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4370251538Srpaulo prog[i].regs[j] <= 0xfe) { 4371251538Srpaulo /* 4372251538Srpaulo * These are fake RF registers offsets that 4373251538Srpaulo * indicate a delay is required. 4374251538Srpaulo */ 4375266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4376251538Srpaulo continue; 4377251538Srpaulo } 4378251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4379251538Srpaulo prog[i].vals[j]); 4380266472Shselasky urtwn_ms_delay(sc); 4381251538Srpaulo } 4382251538Srpaulo 4383251538Srpaulo /* Restore RF_ENV control type. */ 4384251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4385251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4386251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4387251538Srpaulo 4388251538Srpaulo /* Cache RF register CHNLBW. */ 4389251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4390251538Srpaulo } 4391251538Srpaulo 4392251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4393251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4394251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4395251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4396251538Srpaulo } 4397251538Srpaulo} 4398251538Srpaulo 4399251538Srpaulostatic void 4400251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4401251538Srpaulo{ 4402251538Srpaulo /* Invalidate all CAM entries. */ 4403251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4404251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4405251538Srpaulo} 4406251538Srpaulo 4407292175Savosstatic int 4408292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4409292175Savos{ 4410292175Savos usb_error_t error; 4411292175Savos 4412292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4413292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4414292175Savos return (EIO); 4415292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4416292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4417292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4418292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4419292175Savos return (EIO); 4420292175Savos 4421292175Savos return (0); 4422292175Savos} 4423292175Savos 4424251538Srpaulostatic void 4425251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4426251538Srpaulo{ 4427251538Srpaulo uint8_t reg; 4428251538Srpaulo int i; 4429251538Srpaulo 4430251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4431251538Srpaulo if (sc->pa_setting & (1 << i)) 4432251538Srpaulo continue; 4433251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4434251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4435251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4436251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4437251538Srpaulo } 4438251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4439251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4440251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4441251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4442251538Srpaulo } 4443251538Srpaulo} 4444251538Srpaulo 4445251538Srpaulostatic void 4446251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4447251538Srpaulo{ 4448290564Savos struct ieee80211com *ic = &sc->sc_ic; 4449290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4450290564Savos uint32_t rcr; 4451290564Savos uint16_t filter; 4452290564Savos 4453290564Savos URTWN_ASSERT_LOCKED(sc); 4454290564Savos 4455299965Savos /* Setup multicast filter. */ 4456299965Savos urtwn_set_multi(sc); 4457290564Savos 4458290564Savos /* Filter for management frames. */ 4459290564Savos filter = 0x7f3f; 4460290631Savos switch (vap->iv_opmode) { 4461290631Savos case IEEE80211_M_STA: 4462290564Savos filter &= ~( 4463290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4464290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4465290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4466290631Savos break; 4467290631Savos case IEEE80211_M_HOSTAP: 4468290631Savos filter &= ~( 4469290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4470296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4471290631Savos break; 4472290631Savos case IEEE80211_M_MONITOR: 4473290651Savos case IEEE80211_M_IBSS: 4474290631Savos break; 4475290631Savos default: 4476290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4477290631Savos __func__, vap->iv_opmode); 4478290631Savos break; 4479290564Savos } 4480290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4481290564Savos 4482251538Srpaulo /* Reject all control frames. */ 4483251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4484290564Savos 4485290564Savos /* Reject all data frames. */ 4486290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4487290564Savos 4488290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4489290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4490290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4491290564Savos 4492290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4493290564Savos /* Accept all frames. */ 4494290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4495290564Savos R92C_RCR_AAP; 4496290564Savos } 4497290564Savos 4498290564Savos /* Set Rx filter. */ 4499290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4500290564Savos 4501290564Savos if (ic->ic_promisc != 0) { 4502290564Savos /* Update Rx filter. */ 4503290564Savos urtwn_set_promisc(sc); 4504290564Savos } 4505251538Srpaulo} 4506251538Srpaulo 4507251538Srpaulostatic void 4508251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4509251538Srpaulo{ 4510251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4511251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4512251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4513251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4514251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4515251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4516251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4517251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4518251538Srpaulo} 4519251538Srpaulo 4520289066Skevlostatic void 4521251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4522251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4523251538Srpaulo{ 4524251538Srpaulo uint32_t reg; 4525251538Srpaulo 4526251538Srpaulo /* Write per-CCK rate Tx power. */ 4527251538Srpaulo if (chain == 0) { 4528251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4529251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4530251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4531251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4532251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4533251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4534251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4535251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4536251538Srpaulo } else { 4537251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4538251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4539251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4540251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4541251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4542251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4543251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4544251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4545251538Srpaulo } 4546251538Srpaulo /* Write per-OFDM rate Tx power. */ 4547251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4548251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4549251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4550251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4551251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4552251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4553251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4554251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4555251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4556251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4557251538Srpaulo /* Write per-MCS Tx power. */ 4558251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4559251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4560251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4561251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4562251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4563251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4564251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4565251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4566251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4567251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4568251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4569251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4570261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4571251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4572251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4573251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4574251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4575251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4576251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4577251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4578251538Srpaulo} 4579251538Srpaulo 4580289066Skevlostatic void 4581251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4582251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4583251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4584251538Srpaulo{ 4585287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4586291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4587251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4588251538Srpaulo const struct urtwn_txpwr *base; 4589251538Srpaulo int ridx, chan, group; 4590251538Srpaulo 4591251538Srpaulo /* Determine channel group. */ 4592251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4593251538Srpaulo if (chan <= 3) 4594251538Srpaulo group = 0; 4595251538Srpaulo else if (chan <= 9) 4596251538Srpaulo group = 1; 4597251538Srpaulo else 4598251538Srpaulo group = 2; 4599251538Srpaulo 4600251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4601251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4602251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4603251538Srpaulo base = &rtl8188ru_txagc[chain]; 4604251538Srpaulo else 4605251538Srpaulo base = &rtl8192cu_txagc[chain]; 4606251538Srpaulo } else 4607251538Srpaulo base = &rtl8192cu_txagc[chain]; 4608251538Srpaulo 4609251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4610251538Srpaulo if (sc->regulatory == 0) { 4611289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4612251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4613251538Srpaulo } 4614289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4615251538Srpaulo if (sc->regulatory == 3) { 4616251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4617251538Srpaulo /* Apply vendor limits. */ 4618251538Srpaulo if (extc != NULL) 4619251538Srpaulo max = rom->ht40_max_pwr[group]; 4620251538Srpaulo else 4621251538Srpaulo max = rom->ht20_max_pwr[group]; 4622251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4623251538Srpaulo if (power[ridx] > max) 4624251538Srpaulo power[ridx] = max; 4625251538Srpaulo } else if (sc->regulatory == 1) { 4626251538Srpaulo if (extc == NULL) 4627251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4628251538Srpaulo } else if (sc->regulatory != 2) 4629251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4630251538Srpaulo } 4631251538Srpaulo 4632251538Srpaulo /* Compute per-CCK rate Tx power. */ 4633251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4634289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4635251538Srpaulo power[ridx] += cckpow; 4636251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4637251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4638251538Srpaulo } 4639251538Srpaulo 4640251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4641251538Srpaulo if (sc->ntxchains > 1) { 4642251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4643251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4644251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4645251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4646251538Srpaulo } 4647251538Srpaulo 4648251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4649251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4650251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4651251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4652289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4653251538Srpaulo power[ridx] += ofdmpow; 4654251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4655251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4656251538Srpaulo } 4657251538Srpaulo 4658251538Srpaulo /* Compute per-MCS Tx power. */ 4659251538Srpaulo if (extc == NULL) { 4660251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4661251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4662251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4663251538Srpaulo } 4664251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4665251538Srpaulo power[ridx] += htpow; 4666251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4667251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4668251538Srpaulo } 4669294471Savos#ifdef USB_DEBUG 4670294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4671251538Srpaulo /* Dump per-rate Tx power values. */ 4672251538Srpaulo printf("Tx power for chain %d:\n", chain); 4673289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4674251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4675251538Srpaulo } 4676251538Srpaulo#endif 4677251538Srpaulo} 4678251538Srpaulo 4679289066Skevlostatic void 4680264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4681264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4682264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4683264912Skevlo{ 4684287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4685294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4686264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4687264912Skevlo const struct urtwn_r88e_txpwr *base; 4688264912Skevlo int ridx, chan, group; 4689264912Skevlo 4690264912Skevlo /* Determine channel group. */ 4691264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4692264912Skevlo if (chan <= 2) 4693264912Skevlo group = 0; 4694264912Skevlo else if (chan <= 5) 4695264912Skevlo group = 1; 4696264912Skevlo else if (chan <= 8) 4697264912Skevlo group = 2; 4698264912Skevlo else if (chan <= 11) 4699264912Skevlo group = 3; 4700264912Skevlo else if (chan <= 13) 4701264912Skevlo group = 4; 4702264912Skevlo else 4703264912Skevlo group = 5; 4704264912Skevlo 4705264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4706264912Skevlo base = &rtl8188eu_txagc[chain]; 4707264912Skevlo 4708264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4709264912Skevlo if (sc->regulatory == 0) { 4710289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4711264912Skevlo power[ridx] = base->pwr[0][ridx]; 4712264912Skevlo } 4713289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4714264912Skevlo if (sc->regulatory == 3) 4715264912Skevlo power[ridx] = base->pwr[0][ridx]; 4716264912Skevlo else if (sc->regulatory == 1) { 4717264912Skevlo if (extc == NULL) 4718264912Skevlo power[ridx] = base->pwr[group][ridx]; 4719264912Skevlo } else if (sc->regulatory != 2) 4720264912Skevlo power[ridx] = base->pwr[0][ridx]; 4721264912Skevlo } 4722264912Skevlo 4723264912Skevlo /* Compute per-CCK rate Tx power. */ 4724294198Savos cckpow = rom->cck_tx_pwr[group]; 4725289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4726264912Skevlo power[ridx] += cckpow; 4727264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4728264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4729264912Skevlo } 4730264912Skevlo 4731294198Savos htpow = rom->ht40_tx_pwr[group]; 4732264912Skevlo 4733264912Skevlo /* Compute per-OFDM rate Tx power. */ 4734264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4735289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4736264912Skevlo power[ridx] += ofdmpow; 4737264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4738264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4739264912Skevlo } 4740264912Skevlo 4741264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4742264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4743264912Skevlo power[ridx] += bw20pow; 4744264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4745264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4746264912Skevlo } 4747264912Skevlo} 4748264912Skevlo 4749289066Skevlostatic void 4750251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4751251538Srpaulo struct ieee80211_channel *extc) 4752251538Srpaulo{ 4753251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4754251538Srpaulo int i; 4755251538Srpaulo 4756251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4757251538Srpaulo /* Compute per-rate Tx power values. */ 4758264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4759264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4760264912Skevlo else 4761264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4762251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4763251538Srpaulo urtwn_write_txpower(sc, i, power); 4764251538Srpaulo } 4765251538Srpaulo} 4766251538Srpaulo 4767251538Srpaulostatic void 4768290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4769290048Savos{ 4770290048Savos uint32_t reg; 4771290048Savos 4772290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4773290048Savos if (enable) 4774290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4775290048Savos else 4776290048Savos reg |= R92C_RCR_CBSSID_BCN; 4777290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4778290048Savos} 4779290048Savos 4780290048Savosstatic void 4781290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4782290048Savos{ 4783290048Savos uint32_t reg; 4784290048Savos 4785290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4786290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4787290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4788290048Savos 4789290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4790290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4791290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4792290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4793290048Savos } 4794290048Savos} 4795290048Savos 4796290048Savosstatic void 4797251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4798251538Srpaulo{ 4799290048Savos struct urtwn_softc *sc = ic->ic_softc; 4800290048Savos 4801290048Savos URTWN_LOCK(sc); 4802290048Savos /* Receive beacons / probe responses from any BSSID. */ 4803301128Savos if (ic->ic_opmode != IEEE80211_M_IBSS && 4804301128Savos ic->ic_opmode != IEEE80211_M_HOSTAP) 4805290651Savos urtwn_set_rx_bssid_all(sc, 1); 4806290651Savos 4807290048Savos /* Set gain for scanning. */ 4808290048Savos urtwn_set_gain(sc, 0x20); 4809290048Savos URTWN_UNLOCK(sc); 4810251538Srpaulo} 4811251538Srpaulo 4812251538Srpaulostatic void 4813251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4814251538Srpaulo{ 4815290048Savos struct urtwn_softc *sc = ic->ic_softc; 4816290048Savos 4817290048Savos URTWN_LOCK(sc); 4818290048Savos /* Restore limitations. */ 4819301128Savos if (ic->ic_promisc == 0 && 4820301128Savos ic->ic_opmode != IEEE80211_M_IBSS && 4821301128Savos ic->ic_opmode != IEEE80211_M_HOSTAP) 4822290564Savos urtwn_set_rx_bssid_all(sc, 0); 4823290651Savos 4824290048Savos /* Set gain under link. */ 4825290048Savos urtwn_set_gain(sc, 0x32); 4826290048Savos URTWN_UNLOCK(sc); 4827251538Srpaulo} 4828251538Srpaulo 4829251538Srpaulostatic void 4830300754Savosurtwn_getradiocaps(struct ieee80211com *ic, 4831300754Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 4832300754Savos{ 4833300754Savos uint8_t bands[IEEE80211_MODE_BYTES]; 4834300754Savos 4835300754Savos memset(bands, 0, sizeof(bands)); 4836300754Savos setbit(bands, IEEE80211_MODE_11B); 4837300754Savos setbit(bands, IEEE80211_MODE_11G); 4838300754Savos if (urtwn_enable_11n) 4839300754Savos setbit(bands, IEEE80211_MODE_11NG); 4840300754Savos ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 4841300754Savos urtwn_chan_2ghz, nitems(urtwn_chan_2ghz), bands, 0); 4842300754Savos} 4843300754Savos 4844300754Savosstatic void 4845251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4846251538Srpaulo{ 4847286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4848292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4849281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4850251538Srpaulo 4851251538Srpaulo URTWN_LOCK(sc); 4852281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4853281070Srpaulo /* Make link LED blink during scan. */ 4854281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4855281070Srpaulo } 4856292173Savos urtwn_set_chan(sc, c, NULL); 4857292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4858292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4859292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4860292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4861251538Srpaulo URTWN_UNLOCK(sc); 4862251538Srpaulo} 4863251538Srpaulo 4864292014Savosstatic int 4865292014Savosurtwn_wme_update(struct ieee80211com *ic) 4866292014Savos{ 4867292014Savos const struct wmeParams *wmep = 4868292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4869292014Savos struct urtwn_softc *sc = ic->ic_softc; 4870292014Savos uint8_t aifs, acm, slottime; 4871292014Savos int ac; 4872292014Savos 4873292014Savos acm = 0; 4874292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4875292014Savos 4876292014Savos URTWN_LOCK(sc); 4877292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4878292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4879292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4880292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4881292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4882292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4883292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4884292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4885292014Savos if (ac != WME_AC_BE) 4886292014Savos acm |= wmep[ac].wmep_acm << ac; 4887292014Savos } 4888292014Savos 4889292014Savos if (acm != 0) 4890292014Savos acm |= R92C_ACMHWCTRL_EN; 4891292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4892292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4893292014Savos acm); 4894292014Savos 4895292014Savos URTWN_UNLOCK(sc); 4896292014Savos 4897292014Savos return 0; 4898292014Savos} 4899292014Savos 4900251538Srpaulostatic void 4901294465Savosurtwn_update_slot(struct ieee80211com *ic) 4902294465Savos{ 4903294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4904294465Savos} 4905294465Savos 4906294465Savosstatic void 4907294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4908294465Savos{ 4909294465Savos struct ieee80211com *ic = &sc->sc_ic; 4910294465Savos uint8_t slottime; 4911294465Savos 4912294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4913294465Savos 4914294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4915294471Savos __func__, slottime); 4916294465Savos 4917294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4918294465Savos urtwn_update_aifs(sc, slottime); 4919294465Savos} 4920294465Savos 4921294465Savosstatic void 4922294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4923294465Savos{ 4924294465Savos const struct wmeParams *wmep = 4925294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4926294465Savos uint8_t aifs, ac; 4927294465Savos 4928294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4929294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4930294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4931294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4932294465Savos } 4933294465Savos} 4934294465Savos 4935299965Savosstatic uint8_t 4936299965Savosurtwn_get_multi_pos(const uint8_t maddr[]) 4937299965Savos{ 4938299965Savos uint64_t mask = 0x00004d101df481b4; 4939299965Savos uint8_t pos = 0x27; /* initial value */ 4940299965Savos int i, j; 4941299965Savos 4942299965Savos for (i = 0; i < IEEE80211_ADDR_LEN; i++) 4943299965Savos for (j = (i == 0) ? 1 : 0; j < 8; j++) 4944299965Savos if ((maddr[i] >> j) & 1) 4945299965Savos pos ^= (mask >> (i * 8 + j - 1)); 4946299965Savos 4947299965Savos pos &= 0x3f; 4948299965Savos 4949299965Savos return (pos); 4950299965Savos} 4951299965Savos 4952294465Savosstatic void 4953299965Savosurtwn_set_multi(struct urtwn_softc *sc) 4954299965Savos{ 4955299965Savos struct ieee80211com *ic = &sc->sc_ic; 4956299965Savos uint32_t mfilt[2]; 4957299965Savos 4958299965Savos URTWN_ASSERT_LOCKED(sc); 4959299965Savos 4960299965Savos /* general structure was copied from ath(4). */ 4961299965Savos if (ic->ic_allmulti == 0) { 4962299965Savos struct ieee80211vap *vap; 4963299965Savos struct ifnet *ifp; 4964299965Savos struct ifmultiaddr *ifma; 4965299965Savos 4966299965Savos /* 4967299965Savos * Merge multicast addresses to form the hardware filter. 4968299965Savos */ 4969299965Savos mfilt[0] = mfilt[1] = 0; 4970299965Savos TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { 4971299965Savos ifp = vap->iv_ifp; 4972299965Savos if_maddr_rlock(ifp); 4973299965Savos TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 4974299965Savos caddr_t dl; 4975299965Savos uint8_t pos; 4976299965Savos 4977299965Savos dl = LLADDR((struct sockaddr_dl *) 4978299965Savos ifma->ifma_addr); 4979299965Savos pos = urtwn_get_multi_pos(dl); 4980299965Savos 4981299965Savos mfilt[pos / 32] |= (1 << (pos % 32)); 4982299965Savos } 4983299965Savos if_maddr_runlock(ifp); 4984299965Savos } 4985299965Savos } else 4986299965Savos mfilt[0] = mfilt[1] = ~0; 4987299965Savos 4988299965Savos 4989299965Savos urtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); 4990299965Savos urtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); 4991299965Savos 4992299965Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", 4993299965Savos __func__, mfilt[0], mfilt[1]); 4994299965Savos} 4995299965Savos 4996299965Savosstatic void 4997290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4998290564Savos{ 4999290564Savos struct ieee80211com *ic = &sc->sc_ic; 5000290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5001290564Savos uint32_t rcr, mask1, mask2; 5002290564Savos 5003290564Savos URTWN_ASSERT_LOCKED(sc); 5004290564Savos 5005290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 5006290564Savos return; 5007290564Savos 5008290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 5009290564Savos mask2 = R92C_RCR_APM; 5010290564Savos 5011290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 5012290564Savos switch (vap->iv_opmode) { 5013290564Savos case IEEE80211_M_STA: 5014301128Savos mask2 |= R92C_RCR_CBSSID_BCN; 5015290631Savos /* FALLTHROUGH */ 5016290651Savos case IEEE80211_M_IBSS: 5017290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 5018290651Savos break; 5019301128Savos case IEEE80211_M_HOSTAP: 5020301128Savos break; 5021290564Savos default: 5022290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 5023290564Savos __func__, vap->iv_opmode); 5024290564Savos return; 5025290564Savos } 5026290564Savos } 5027290564Savos 5028290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 5029290564Savos if (ic->ic_promisc == 0) 5030290564Savos rcr = (rcr & ~mask1) | mask2; 5031290564Savos else 5032290564Savos rcr = (rcr & ~mask2) | mask1; 5033290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 5034290564Savos} 5035290564Savos 5036290564Savosstatic void 5037290564Savosurtwn_update_promisc(struct ieee80211com *ic) 5038290564Savos{ 5039290564Savos struct urtwn_softc *sc = ic->ic_softc; 5040290564Savos 5041290564Savos URTWN_LOCK(sc); 5042290564Savos if (sc->sc_flags & URTWN_RUNNING) 5043290564Savos urtwn_set_promisc(sc); 5044290564Savos URTWN_UNLOCK(sc); 5045290564Savos} 5046290564Savos 5047290564Savosstatic void 5048283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 5049251538Srpaulo{ 5050299965Savos struct urtwn_softc *sc = ic->ic_softc; 5051299965Savos 5052299965Savos URTWN_LOCK(sc); 5053299965Savos if (sc->sc_flags & URTWN_RUNNING) 5054299965Savos urtwn_set_multi(sc); 5055299965Savos URTWN_UNLOCK(sc); 5056251538Srpaulo} 5057251538Srpaulo 5058292167Savosstatic struct ieee80211_node * 5059297910Sadrianurtwn_node_alloc(struct ieee80211vap *vap, 5060292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 5061292167Savos{ 5062292167Savos struct urtwn_node *un; 5063292167Savos 5064292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 5065292167Savos M_NOWAIT | M_ZERO); 5066292167Savos 5067292167Savos if (un == NULL) 5068292167Savos return NULL; 5069292167Savos 5070292167Savos un->id = URTWN_MACID_UNDEFINED; 5071292167Savos 5072292167Savos return &un->ni; 5073292167Savos} 5074292167Savos 5075251538Srpaulostatic void 5076297910Sadrianurtwn_newassoc(struct ieee80211_node *ni, int isnew) 5077292167Savos{ 5078292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5079292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5080292167Savos uint8_t id; 5081292167Savos 5082297910Sadrian /* Only do this bit for R88E chips */ 5083297910Sadrian if (! (sc->chip & URTWN_CHIP_88E)) 5084297910Sadrian return; 5085297910Sadrian 5086292167Savos if (!isnew) 5087292167Savos return; 5088292167Savos 5089292167Savos URTWN_NT_LOCK(sc); 5090292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 5091292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 5092292167Savos un->id = id; 5093292167Savos sc->node_list[id] = ni; 5094292167Savos break; 5095292167Savos } 5096292167Savos } 5097292167Savos URTWN_NT_UNLOCK(sc); 5098292167Savos 5099292167Savos if (id > URTWN_MACID_MAX(sc)) { 5100292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 5101292167Savos __func__); 5102292167Savos } 5103292167Savos} 5104292167Savos 5105292167Savosstatic void 5106297910Sadrianurtwn_node_free(struct ieee80211_node *ni) 5107292167Savos{ 5108292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5109292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5110292167Savos 5111292167Savos URTWN_NT_LOCK(sc); 5112292167Savos if (un->id != URTWN_MACID_UNDEFINED) 5113292167Savos sc->node_list[un->id] = NULL; 5114292167Savos URTWN_NT_UNLOCK(sc); 5115292167Savos 5116292167Savos sc->sc_node_free(ni); 5117292167Savos} 5118292167Savos 5119292167Savosstatic void 5120251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 5121251538Srpaulo struct ieee80211_channel *extc) 5122251538Srpaulo{ 5123287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5124251538Srpaulo uint32_t reg; 5125251538Srpaulo u_int chan; 5126251538Srpaulo int i; 5127251538Srpaulo 5128251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 5129251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 5130251538Srpaulo device_printf(sc->sc_dev, 5131251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 5132251538Srpaulo return; 5133251538Srpaulo } 5134251538Srpaulo 5135251538Srpaulo /* Set Tx power for this new channel. */ 5136251538Srpaulo urtwn_set_txpower(sc, c, extc); 5137251538Srpaulo 5138251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5139251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 5140251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 5141251538Srpaulo } 5142251538Srpaulo#ifndef IEEE80211_NO_HT 5143251538Srpaulo if (extc != NULL) { 5144251538Srpaulo /* Is secondary channel below or above primary? */ 5145251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 5146251538Srpaulo 5147251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5148251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 5149251538Srpaulo 5150251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 5151251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 5152251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 5153251538Srpaulo 5154251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5155251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 5156251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5157251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 5158251538Srpaulo 5159251538Srpaulo /* Set CCK side band. */ 5160251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 5161251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 5162251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 5163251538Srpaulo 5164251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 5165251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 5166251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 5167251538Srpaulo 5168251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5169251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 5170251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 5171251538Srpaulo 5172251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 5173251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 5174251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 5175251538Srpaulo 5176251538Srpaulo /* Select 40MHz bandwidth. */ 5177251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5178251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 5179251538Srpaulo } else 5180251538Srpaulo#endif 5181251538Srpaulo { 5182251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5183251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 5184251538Srpaulo 5185251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5186251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 5187251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5188251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 5189251538Srpaulo 5190264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5191264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5192264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5193264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5194264912Skevlo } 5195281069Srpaulo 5196251538Srpaulo /* Select 20MHz bandwidth. */ 5197251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5198281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5199264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5200264912Skevlo R92C_RF_CHNLBW_BW20)); 5201251538Srpaulo } 5202251538Srpaulo} 5203251538Srpaulo 5204251538Srpaulostatic void 5205251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5206251538Srpaulo{ 5207251538Srpaulo /* TODO */ 5208251538Srpaulo} 5209251538Srpaulo 5210251538Srpaulostatic void 5211251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5212251538Srpaulo{ 5213251538Srpaulo uint32_t rf_ac[2]; 5214251538Srpaulo uint8_t txmode; 5215251538Srpaulo int i; 5216251538Srpaulo 5217251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5218251538Srpaulo if ((txmode & 0x70) != 0) { 5219251538Srpaulo /* Disable all continuous Tx. */ 5220251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5221251538Srpaulo 5222251538Srpaulo /* Set RF mode to standby mode. */ 5223251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5224251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5225251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5226251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5227251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5228251538Srpaulo } 5229251538Srpaulo } else { 5230251538Srpaulo /* Block all Tx queues. */ 5231293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5232251538Srpaulo } 5233251538Srpaulo /* Start calibration. */ 5234251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5235251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5236251538Srpaulo 5237251538Srpaulo /* Give calibration the time to complete. */ 5238266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5239251538Srpaulo 5240251538Srpaulo /* Restore configuration. */ 5241251538Srpaulo if ((txmode & 0x70) != 0) { 5242251538Srpaulo /* Restore Tx mode. */ 5243251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5244251538Srpaulo /* Restore RF mode. */ 5245251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5246251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5247251538Srpaulo } else { 5248251538Srpaulo /* Unblock all Tx queues. */ 5249251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5250251538Srpaulo } 5251251538Srpaulo} 5252251538Srpaulo 5253294473Savosstatic void 5254294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5255294473Savos{ 5256294473Savos uint8_t temp; 5257294473Savos 5258294473Savos URTWN_ASSERT_LOCKED(sc); 5259294473Savos 5260294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5261294473Savos /* Start measuring temperature. */ 5262294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5263294473Savos "%s: start measuring temperature\n", __func__); 5264294473Savos if (sc->chip & URTWN_CHIP_88E) { 5265294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5266294473Savos R88E_RF_T_METER_START); 5267294473Savos } else { 5268294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5269294473Savos R92C_RF_T_METER_START); 5270294473Savos } 5271294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5272294473Savos return; 5273294473Savos } 5274294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5275294473Savos 5276294473Savos /* Read measured temperature. */ 5277294473Savos if (sc->chip & URTWN_CHIP_88E) { 5278294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5279294473Savos R88E_RF_T_METER_VAL); 5280294473Savos } else { 5281294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5282294473Savos R92C_RF_T_METER_VAL); 5283294473Savos } 5284294473Savos if (temp == 0) { /* Read failed, skip. */ 5285294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5286294473Savos "%s: temperature read failed, skipping\n", __func__); 5287294473Savos return; 5288294473Savos } 5289294473Savos 5290294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5291294473Savos "%s: temperature: previous %u, current %u\n", 5292294473Savos __func__, sc->thcal_lctemp, temp); 5293294473Savos 5294294473Savos /* 5295294473Savos * Redo LC calibration if temperature changed significantly since 5296294473Savos * last calibration. 5297294473Savos */ 5298294473Savos if (sc->thcal_lctemp == 0) { 5299294473Savos /* First LC calibration is performed in urtwn_init(). */ 5300294473Savos sc->thcal_lctemp = temp; 5301294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5302294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5303294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5304294473Savos __func__, sc->thcal_lctemp, temp); 5305294473Savos urtwn_lc_calib(sc); 5306294473Savos /* Record temperature of last LC calibration. */ 5307294473Savos sc->thcal_lctemp = temp; 5308294473Savos } 5309294473Savos} 5310294473Savos 5311301762Savosstatic void 5312301762Savosurtwn_setup_static_keys(struct urtwn_softc *sc, struct urtwn_vap *uvp) 5313301762Savos{ 5314301762Savos int i; 5315301762Savos 5316301762Savos for (i = 0; i < IEEE80211_WEP_NKID; i++) { 5317301762Savos const struct ieee80211_key *k = uvp->keys[i]; 5318301762Savos if (k != NULL) { 5319301762Savos urtwn_cmd_sleepable(sc, k, sizeof(*k), 5320301762Savos urtwn_key_set_cb); 5321301762Savos } 5322301762Savos } 5323301762Savos} 5324301762Savos 5325291698Savosstatic int 5326287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5327251538Srpaulo{ 5328287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5329287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5330287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5331251538Srpaulo uint32_t reg; 5332291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5333251538Srpaulo int error; 5334251538Srpaulo 5335291698Savos URTWN_LOCK(sc); 5336291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5337291698Savos URTWN_UNLOCK(sc); 5338291698Savos return (0); 5339291698Savos } 5340264864Skevlo 5341251538Srpaulo /* Init firmware commands ring. */ 5342251538Srpaulo sc->fwcur = 0; 5343251538Srpaulo 5344251538Srpaulo /* Allocate Tx/Rx buffers. */ 5345251538Srpaulo error = urtwn_alloc_rx_list(sc); 5346251538Srpaulo if (error != 0) 5347251538Srpaulo goto fail; 5348281069Srpaulo 5349251538Srpaulo error = urtwn_alloc_tx_list(sc); 5350251538Srpaulo if (error != 0) 5351251538Srpaulo goto fail; 5352251538Srpaulo 5353251538Srpaulo /* Power on adapter. */ 5354251538Srpaulo error = urtwn_power_on(sc); 5355251538Srpaulo if (error != 0) 5356251538Srpaulo goto fail; 5357251538Srpaulo 5358251538Srpaulo /* Initialize DMA. */ 5359251538Srpaulo error = urtwn_dma_init(sc); 5360251538Srpaulo if (error != 0) 5361251538Srpaulo goto fail; 5362251538Srpaulo 5363251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5364251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5365251538Srpaulo 5366251538Srpaulo /* Init interrupts. */ 5367264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5368291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5369291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5370291698Savos goto fail; 5371291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5372264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5373291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5374291698Savos goto fail; 5375291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5376264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5377291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5378291698Savos goto fail; 5379291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5380264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5381264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5382291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5383291698Savos goto fail; 5384264912Skevlo } else { 5385291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5386291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5387291698Savos goto fail; 5388291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5389291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5390291698Savos goto fail; 5391264912Skevlo } 5392251538Srpaulo 5393251538Srpaulo /* Set MAC address. */ 5394287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5395291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5396291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5397291698Savos goto fail; 5398251538Srpaulo 5399251538Srpaulo /* Set initial network type. */ 5400289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5401251538Srpaulo 5402290564Savos /* Initialize Rx filter. */ 5403251538Srpaulo urtwn_rxfilter_init(sc); 5404251538Srpaulo 5405282623Skevlo /* Set response rate. */ 5406251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5407251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5408251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5409251538Srpaulo 5410251538Srpaulo /* Set short/long retry limits. */ 5411251538Srpaulo urtwn_write_2(sc, R92C_RL, 5412251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5413251538Srpaulo 5414251538Srpaulo /* Initialize EDCA parameters. */ 5415251538Srpaulo urtwn_edca_init(sc); 5416251538Srpaulo 5417251538Srpaulo /* Setup rate fallback. */ 5418264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5419264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5420264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5421264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5422264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5423264912Skevlo } 5424251538Srpaulo 5425251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5426251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5427251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5428251538Srpaulo /* Set ACK timeout. */ 5429251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5430251538Srpaulo 5431251538Srpaulo /* Setup USB aggregation. */ 5432251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5433251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5434251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5435251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5436251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5437251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5438251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5439264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5440264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5441282266Skevlo else { 5442264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5443282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5444282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5445282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5446282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5447282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5448282266Skevlo } 5449251538Srpaulo 5450251538Srpaulo /* Initialize beacon parameters. */ 5451264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5452251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5453251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5454251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5455251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5456251538Srpaulo 5457264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5458264912Skevlo /* Setup AMPDU aggregation. */ 5459264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5460264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5461264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5462251538Srpaulo 5463264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5464264912Skevlo } 5465251538Srpaulo 5466295871Savos#ifndef URTWN_WITHOUT_UCODE 5467251538Srpaulo /* Load 8051 microcode. */ 5468251538Srpaulo error = urtwn_load_firmware(sc); 5469295871Savos if (error == 0) 5470295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5471295871Savos#endif 5472251538Srpaulo 5473251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5474291698Savos error = urtwn_mac_init(sc); 5475291698Savos if (error != 0) { 5476291698Savos device_printf(sc->sc_dev, 5477291698Savos "%s: error while initializing MAC block\n", __func__); 5478291698Savos goto fail; 5479291698Savos } 5480251538Srpaulo urtwn_bb_init(sc); 5481251538Srpaulo urtwn_rf_init(sc); 5482251538Srpaulo 5483290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5484290564Savos urtwn_rxfilter_init(sc); 5485290564Savos 5486264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5487264912Skevlo urtwn_write_2(sc, R92C_CR, 5488264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5489264912Skevlo R92C_CR_MACRXEN); 5490264912Skevlo } 5491264912Skevlo 5492251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5493251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5494251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5495291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5496291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5497291698Savos goto fail; 5498251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5499251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5500291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5501291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5502291698Savos goto fail; 5503251538Srpaulo 5504251538Srpaulo /* Clear per-station keys table. */ 5505251538Srpaulo urtwn_cam_init(sc); 5506251538Srpaulo 5507292175Savos /* Enable decryption / encryption. */ 5508292175Savos urtwn_write_2(sc, R92C_SECCFG, 5509292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5510292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5511292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5512292175Savos 5513251538Srpaulo /* Enable hardware sequence numbering. */ 5514293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5515251538Srpaulo 5516292167Savos /* Enable per-packet TX report. */ 5517292167Savos if (sc->chip & URTWN_CHIP_88E) { 5518292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5519292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5520292167Savos } 5521292167Savos 5522251538Srpaulo /* Perform LO and IQ calibrations. */ 5523251538Srpaulo urtwn_iq_calib(sc); 5524251538Srpaulo /* Perform LC calibration. */ 5525251538Srpaulo urtwn_lc_calib(sc); 5526251538Srpaulo 5527251538Srpaulo /* Fix USB interference issue. */ 5528264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5529264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5530264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5531264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5532251538Srpaulo 5533264912Skevlo urtwn_pa_bias_init(sc); 5534264912Skevlo } 5535251538Srpaulo 5536251538Srpaulo /* Initialize GPIO setting. */ 5537251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5538251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5539251538Srpaulo 5540251538Srpaulo /* Fix for lower temperature. */ 5541264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5542264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5543251538Srpaulo 5544251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5545251538Srpaulo 5546287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5547251538Srpaulo 5548301762Savos /* 5549301762Savos * Install static keys (if any). 5550301762Savos * Must be called after urtwn_cam_init(). 5551301762Savos */ 5552301762Savos if (vap != NULL) 5553301762Savos urtwn_setup_static_keys(sc, URTWN_VAP(vap)); 5554301762Savos 5555251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5556251538Srpaulofail: 5557291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5558291698Savos error = EIO; 5559291698Savos 5560291698Savos URTWN_UNLOCK(sc); 5561291698Savos 5562291698Savos return (error); 5563251538Srpaulo} 5564251538Srpaulo 5565251538Srpaulostatic void 5566287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5567251538Srpaulo{ 5568251538Srpaulo 5569291698Savos URTWN_LOCK(sc); 5570291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5571291698Savos URTWN_UNLOCK(sc); 5572291698Savos return; 5573291698Savos } 5574291698Savos 5575295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5576295871Savos URTWN_TEMP_MEASURED); 5577294473Savos sc->thcal_lctemp = 0; 5578251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5579295874Savos 5580251538Srpaulo urtwn_abort_xfers(sc); 5581288353Sadrian urtwn_drain_mbufq(sc); 5582295874Savos urtwn_power_off(sc); 5583291698Savos URTWN_UNLOCK(sc); 5584251538Srpaulo} 5585251538Srpaulo 5586251538Srpaulostatic void 5587251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5588251538Srpaulo{ 5589251538Srpaulo int i; 5590251538Srpaulo 5591251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5592251538Srpaulo 5593251538Srpaulo /* abort any pending transfers */ 5594251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5595251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5596251538Srpaulo} 5597251538Srpaulo 5598251538Srpaulostatic int 5599251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5600251538Srpaulo const struct ieee80211_bpf_params *params) 5601251538Srpaulo{ 5602251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5603286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5604251538Srpaulo struct urtwn_data *bf; 5605290630Savos int error; 5606251538Srpaulo 5607297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5608297596Sadrian __func__, 5609297596Sadrian m); 5610297596Sadrian 5611251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5612290630Savos URTWN_LOCK(sc); 5613287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5614290630Savos error = ENETDOWN; 5615290630Savos goto end; 5616251538Srpaulo } 5617290630Savos 5618251538Srpaulo bf = urtwn_getbuf(sc); 5619251538Srpaulo if (bf == NULL) { 5620290630Savos error = ENOBUFS; 5621290630Savos goto end; 5622251538Srpaulo } 5623251538Srpaulo 5624292221Savos if (params == NULL) { 5625292221Savos /* 5626292221Savos * Legacy path; interpret frame contents to decide 5627292221Savos * precisely how to send the frame. 5628292221Savos */ 5629292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5630292221Savos } else { 5631292221Savos /* 5632292221Savos * Caller supplied explicit parameters to use in 5633292221Savos * sending the frame. 5634292221Savos */ 5635292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5636292221Savos } 5637292221Savos if (error != 0) { 5638251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5639290630Savos goto end; 5640251538Srpaulo } 5641290630Savos 5642288353Sadrian sc->sc_txtimer = 5; 5643290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5644290630Savos 5645290630Savosend: 5646290630Savos if (error != 0) 5647290630Savos m_freem(m); 5648290630Savos 5649251538Srpaulo URTWN_UNLOCK(sc); 5650251538Srpaulo 5651290630Savos return (error); 5652251538Srpaulo} 5653251538Srpaulo 5654266472Shselaskystatic void 5655266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5656266472Shselasky{ 5657266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5658266472Shselasky} 5659266472Shselasky 5660251538Srpaulostatic device_method_t urtwn_methods[] = { 5661251538Srpaulo /* Device interface */ 5662251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5663251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5664251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5665251538Srpaulo 5666264912Skevlo DEVMETHOD_END 5667251538Srpaulo}; 5668251538Srpaulo 5669251538Srpaulostatic driver_t urtwn_driver = { 5670251538Srpaulo "urtwn", 5671251538Srpaulo urtwn_methods, 5672251538Srpaulo sizeof(struct urtwn_softc) 5673251538Srpaulo}; 5674251538Srpaulo 5675251538Srpaulostatic devclass_t urtwn_devclass; 5676251538Srpaulo 5677251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5678251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5679251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5680295871Savos#ifndef URTWN_WITHOUT_UCODE 5681251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5682295871Savos#endif 5683251538SrpauloMODULE_VERSION(urtwn, 1); 5684292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5685