if_urtwn.c revision 292207
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtwn.c 292207 2015-12-14 13:05:16Z avos $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29288353Sadrian 30251538Srpaulo#include <sys/param.h> 31251538Srpaulo#include <sys/sockio.h> 32251538Srpaulo#include <sys/sysctl.h> 33251538Srpaulo#include <sys/lock.h> 34251538Srpaulo#include <sys/mutex.h> 35291902Skevlo#include <sys/condvar.h> 36251538Srpaulo#include <sys/mbuf.h> 37251538Srpaulo#include <sys/kernel.h> 38251538Srpaulo#include <sys/socket.h> 39251538Srpaulo#include <sys/systm.h> 40251538Srpaulo#include <sys/malloc.h> 41251538Srpaulo#include <sys/module.h> 42251538Srpaulo#include <sys/bus.h> 43251538Srpaulo#include <sys/endian.h> 44251538Srpaulo#include <sys/linker.h> 45251538Srpaulo#include <sys/firmware.h> 46251538Srpaulo#include <sys/kdb.h> 47251538Srpaulo 48251538Srpaulo#include <machine/bus.h> 49251538Srpaulo#include <machine/resource.h> 50251538Srpaulo#include <sys/rman.h> 51251538Srpaulo 52251538Srpaulo#include <net/bpf.h> 53251538Srpaulo#include <net/if.h> 54257176Sglebius#include <net/if_var.h> 55251538Srpaulo#include <net/if_arp.h> 56251538Srpaulo#include <net/ethernet.h> 57251538Srpaulo#include <net/if_dl.h> 58251538Srpaulo#include <net/if_media.h> 59251538Srpaulo#include <net/if_types.h> 60251538Srpaulo 61251538Srpaulo#include <netinet/in.h> 62251538Srpaulo#include <netinet/in_systm.h> 63251538Srpaulo#include <netinet/in_var.h> 64251538Srpaulo#include <netinet/if_ether.h> 65251538Srpaulo#include <netinet/ip.h> 66251538Srpaulo 67251538Srpaulo#include <net80211/ieee80211_var.h> 68288088Sadrian#include <net80211/ieee80211_input.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72251538Srpaulo 73251538Srpaulo#include <dev/usb/usb.h> 74251538Srpaulo#include <dev/usb/usbdi.h> 75291902Skevlo#include <dev/usb/usb_device.h> 76251538Srpaulo#include "usbdevs.h" 77251538Srpaulo 78251538Srpaulo#define USB_DEBUG_VAR urtwn_debug 79251538Srpaulo#include <dev/usb/usb_debug.h> 80251538Srpaulo 81251538Srpaulo#include <dev/usb/wlan/if_urtwnreg.h> 82289167Sadrian#include <dev/usb/wlan/if_urtwnvar.h> 83251538Srpaulo 84251538Srpaulo#ifdef USB_DEBUG 85251538Srpaulostatic int urtwn_debug = 0; 86251538Srpaulo 87251538SrpauloSYSCTL_NODE(_hw_usb, OID_AUTO, urtwn, CTLFLAG_RW, 0, "USB urtwn"); 88276701ShselaskySYSCTL_INT(_hw_usb_urtwn, OID_AUTO, debug, CTLFLAG_RWTUN, &urtwn_debug, 0, 89251538Srpaulo "Debug level"); 90251538Srpaulo#endif 91251538Srpaulo 92288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 93251538Srpaulo 94251538Srpaulo/* various supported device vendors/products */ 95251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 96251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 97264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 98264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 99264912Skevlo#define URTWN_RTL8188E 1 100251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 101251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 102251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 103251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 104266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 105251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 106251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 107251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 108251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 109251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 110251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 111251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 112251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 113251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 114251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 115251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 116251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 117251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 118251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 119251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 120251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 121252196Skevlo URTWN_DEV(DLINK, DWA131B), 122251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 123251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 124251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 125251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 126251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 127251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 128251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 129251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 130251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 131251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 132251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 133251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 134251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 135251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 136251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 137251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 138251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 139251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 140251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 141251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 142251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 143251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 144251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 145282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 146251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 147251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 148251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 149251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 150272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 151251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 152251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 153251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 154251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 155251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 156251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 157251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 158251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 159251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 160264912Skevlo /* URTWN_RTL8188E */ 161273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 162270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 163273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 164264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 165264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 166264912Skevlo#undef URTWN_RTL8188E_DEV 167251538Srpaulo#undef URTWN_DEV 168251538Srpaulo}; 169251538Srpaulo 170251538Srpaulostatic device_probe_t urtwn_match; 171251538Srpaulostatic device_attach_t urtwn_attach; 172251538Srpaulostatic device_detach_t urtwn_detach; 173251538Srpaulo 174251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 175251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 176251538Srpaulo 177288353Sadrianstatic void urtwn_drain_mbufq(struct urtwn_softc *sc); 178287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 179287197Sglebius struct usb_device_request *, void *); 180251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 181251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 182251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 183251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 184251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 185292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 186292207Savos struct r92c_rx_stat *, int); 187292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 188292207Savos struct urtwn_data *); 189292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 190292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 191292167Savos void *); 192292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 193292207Savos struct mbuf *, int8_t *); 194289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 195289891Savos int); 196281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 197251538Srpaulo struct urtwn_data[], int, int); 198251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 199251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 200251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 201251538Srpaulo struct urtwn_data data[], int); 202289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 203289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 204251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 205251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 206291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 207251538Srpaulo uint8_t *, int); 208291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 209291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 210291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 211291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 212251538Srpaulo uint8_t *, int); 213251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 214251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 215251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 216281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 217251538Srpaulo const void *, int); 218292174Savosstatic void urtwn_cmdq_cb(void *, int); 219292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 220292174Savos size_t, CMD_FUNC_PROTO); 221264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 222264912Skevlo uint8_t, uint32_t); 223281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 224264912Skevlo uint8_t, uint32_t); 225251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 226281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 227251538Srpaulo uint32_t); 228291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 229291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 230291264Savos uint8_t, uint8_t); 231291264Savos#ifdef URTWN_DEBUG 232291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 233291264Savos uint8_t *, uint16_t); 234291264Savos#endif 235291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 236291264Savos uint16_t); 237291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 238251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 239291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 240291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 241251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 242290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 243290631Savos struct urtwn_vap *); 244290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 245290631Savos struct ieee80211_node *); 246290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 247290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 248290631Savos struct urtwn_vap *); 249292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 250292175Savos struct ieee80211_key *, ieee80211_keyix *, 251292175Savos ieee80211_keyix *); 252292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 253292175Savos union sec_param *); 254292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 255292175Savos union sec_param *); 256292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 257292175Savos const struct ieee80211_key *); 258292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 259292175Savos const struct ieee80211_key *); 260290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 261290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 262290631Savos struct ieee80211vap *); 263292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 264251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 265289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 266290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 267290651Savos struct mbuf *, int, 268290651Savos const struct ieee80211_rx_stats *, int, int); 269281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 270251538Srpaulo enum ieee80211_state, int); 271251538Srpaulostatic void urtwn_watchdog(void *); 272251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 273251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 274264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 275290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 276251538Srpaulo struct ieee80211_node *, struct mbuf *, 277251538Srpaulo struct urtwn_data *); 278290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 279290630Savos uint8_t, struct urtwn_data *); 280287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 281287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 282287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 283264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 284264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 285251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 286251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 287264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 288281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 289251538Srpaulo const uint8_t *, int); 290251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 291291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 292291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 293251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 294251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 295251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 296292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 297292175Savos uint32_t); 298251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 299251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 300251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 301281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 302251538Srpaulo uint16_t[]); 303251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 304281069Srpaulo struct ieee80211_channel *, 305251538Srpaulo struct ieee80211_channel *, uint16_t[]); 306264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 307281069Srpaulo struct ieee80211_channel *, 308264912Skevlo struct ieee80211_channel *, uint16_t[]); 309251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 310281069Srpaulo struct ieee80211_channel *, 311251538Srpaulo struct ieee80211_channel *); 312290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 313290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 314251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 315251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 316251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 317292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 318290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 319290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 320289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 321292167Savosstatic struct ieee80211_node *urtwn_r88e_node_alloc(struct ieee80211vap *, 322292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 323292167Savosstatic void urtwn_r88e_newassoc(struct ieee80211_node *, int); 324292167Savosstatic void urtwn_r88e_node_free(struct ieee80211_node *); 325251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 326281069Srpaulo struct ieee80211_channel *, 327251538Srpaulo struct ieee80211_channel *); 328251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 329251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 330291698Savosstatic int urtwn_init(struct urtwn_softc *); 331287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 332251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 333251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 334251538Srpaulo const struct ieee80211_bpf_params *); 335266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 336251538Srpaulo 337251538Srpaulo/* Aliases. */ 338251538Srpaulo#define urtwn_bb_write urtwn_write_4 339251538Srpaulo#define urtwn_bb_read urtwn_read_4 340251538Srpaulo 341251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 342251538Srpaulo [URTWN_BULK_RX] = { 343251538Srpaulo .type = UE_BULK, 344251538Srpaulo .endpoint = UE_ADDR_ANY, 345251538Srpaulo .direction = UE_DIR_IN, 346251538Srpaulo .bufsize = URTWN_RXBUFSZ, 347251538Srpaulo .flags = { 348251538Srpaulo .pipe_bof = 1, 349251538Srpaulo .short_xfer_ok = 1 350251538Srpaulo }, 351251538Srpaulo .callback = urtwn_bulk_rx_callback, 352251538Srpaulo }, 353251538Srpaulo [URTWN_BULK_TX_BE] = { 354251538Srpaulo .type = UE_BULK, 355251538Srpaulo .endpoint = 0x03, 356251538Srpaulo .direction = UE_DIR_OUT, 357251538Srpaulo .bufsize = URTWN_TXBUFSZ, 358251538Srpaulo .flags = { 359251538Srpaulo .ext_buffer = 1, 360251538Srpaulo .pipe_bof = 1, 361251538Srpaulo .force_short_xfer = 1 362251538Srpaulo }, 363251538Srpaulo .callback = urtwn_bulk_tx_callback, 364251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 365251538Srpaulo }, 366251538Srpaulo [URTWN_BULK_TX_BK] = { 367251538Srpaulo .type = UE_BULK, 368251538Srpaulo .endpoint = 0x03, 369251538Srpaulo .direction = UE_DIR_OUT, 370251538Srpaulo .bufsize = URTWN_TXBUFSZ, 371251538Srpaulo .flags = { 372251538Srpaulo .ext_buffer = 1, 373251538Srpaulo .pipe_bof = 1, 374251538Srpaulo .force_short_xfer = 1, 375251538Srpaulo }, 376251538Srpaulo .callback = urtwn_bulk_tx_callback, 377251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 378251538Srpaulo }, 379251538Srpaulo [URTWN_BULK_TX_VI] = { 380251538Srpaulo .type = UE_BULK, 381251538Srpaulo .endpoint = 0x02, 382251538Srpaulo .direction = UE_DIR_OUT, 383251538Srpaulo .bufsize = URTWN_TXBUFSZ, 384251538Srpaulo .flags = { 385251538Srpaulo .ext_buffer = 1, 386251538Srpaulo .pipe_bof = 1, 387251538Srpaulo .force_short_xfer = 1 388251538Srpaulo }, 389251538Srpaulo .callback = urtwn_bulk_tx_callback, 390251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 391251538Srpaulo }, 392251538Srpaulo [URTWN_BULK_TX_VO] = { 393251538Srpaulo .type = UE_BULK, 394251538Srpaulo .endpoint = 0x02, 395251538Srpaulo .direction = UE_DIR_OUT, 396251538Srpaulo .bufsize = URTWN_TXBUFSZ, 397251538Srpaulo .flags = { 398251538Srpaulo .ext_buffer = 1, 399251538Srpaulo .pipe_bof = 1, 400251538Srpaulo .force_short_xfer = 1 401251538Srpaulo }, 402251538Srpaulo .callback = urtwn_bulk_tx_callback, 403251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 404251538Srpaulo }, 405251538Srpaulo}; 406251538Srpaulo 407292014Savosstatic const struct wme_to_queue { 408292014Savos uint16_t reg; 409292014Savos uint8_t qid; 410292014Savos} wme2queue[WME_NUM_AC] = { 411292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 412292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 413292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 414292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 415292014Savos}; 416292014Savos 417251538Srpaulostatic int 418251538Srpaulourtwn_match(device_t self) 419251538Srpaulo{ 420251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 421251538Srpaulo 422251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 423251538Srpaulo return (ENXIO); 424251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 425251538Srpaulo return (ENXIO); 426251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 427251538Srpaulo return (ENXIO); 428251538Srpaulo 429251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 430251538Srpaulo} 431251538Srpaulo 432251538Srpaulostatic int 433251538Srpaulourtwn_attach(device_t self) 434251538Srpaulo{ 435251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 436251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 437287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 438291902Skevlo uint8_t bands; 439251538Srpaulo int error; 440251538Srpaulo 441251538Srpaulo device_set_usb_desc(self); 442251538Srpaulo sc->sc_udev = uaa->device; 443251538Srpaulo sc->sc_dev = self; 444264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 445264912Skevlo sc->chip |= URTWN_CHIP_88E; 446251538Srpaulo 447251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 448251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 449292174Savos URTWN_CMDQ_LOCK_INIT(sc); 450292167Savos URTWN_NT_LOCK_INIT(sc); 451251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 452287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 453251538Srpaulo 454291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 455291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 456291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 457251538Srpaulo if (error) { 458251538Srpaulo device_printf(self, "could not allocate USB transfers, " 459251538Srpaulo "err=%s\n", usbd_errstr(error)); 460251538Srpaulo goto detach; 461251538Srpaulo } 462251538Srpaulo 463251538Srpaulo URTWN_LOCK(sc); 464251538Srpaulo 465251538Srpaulo error = urtwn_read_chipid(sc); 466251538Srpaulo if (error) { 467251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 468251538Srpaulo URTWN_UNLOCK(sc); 469251538Srpaulo goto detach; 470251538Srpaulo } 471251538Srpaulo 472251538Srpaulo /* Determine number of Tx/Rx chains. */ 473251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 474251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 475251538Srpaulo sc->nrxchains = 2; 476251538Srpaulo } else { 477251538Srpaulo sc->ntxchains = 1; 478251538Srpaulo sc->nrxchains = 1; 479251538Srpaulo } 480251538Srpaulo 481264912Skevlo if (sc->chip & URTWN_CHIP_88E) 482291264Savos error = urtwn_r88e_read_rom(sc); 483264912Skevlo else 484291264Savos error = urtwn_read_rom(sc); 485291264Savos if (error != 0) { 486291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 487291264Savos __func__, error); 488291264Savos URTWN_UNLOCK(sc); 489291264Savos goto detach; 490291264Savos } 491264912Skevlo 492251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 493251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 494264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 495251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 496251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 497251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 498251538Srpaulo 499251538Srpaulo URTWN_UNLOCK(sc); 500251538Srpaulo 501283537Sglebius ic->ic_softc = sc; 502283527Sglebius ic->ic_name = device_get_nameunit(self); 503251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 504251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 505251538Srpaulo 506251538Srpaulo /* set device capabilities */ 507251538Srpaulo ic->ic_caps = 508251538Srpaulo IEEE80211_C_STA /* station mode */ 509251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 510290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 511290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 512251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 513251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 514251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 515251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 516292014Savos | IEEE80211_C_WME /* 802.11e */ 517251538Srpaulo ; 518251538Srpaulo 519292175Savos ic->ic_cryptocaps = 520292175Savos IEEE80211_CRYPTO_WEP | 521292175Savos IEEE80211_CRYPTO_TKIP | 522292175Savos IEEE80211_CRYPTO_AES_CCM; 523292175Savos 524251538Srpaulo bands = 0; 525251538Srpaulo setbit(&bands, IEEE80211_MODE_11B); 526251538Srpaulo setbit(&bands, IEEE80211_MODE_11G); 527251538Srpaulo ieee80211_init_channels(ic, NULL, &bands); 528251538Srpaulo 529287197Sglebius ieee80211_ifattach(ic); 530251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 531251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 532251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 533251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 534287197Sglebius ic->ic_transmit = urtwn_transmit; 535287197Sglebius ic->ic_parent = urtwn_parent; 536251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 537251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 538292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 539290564Savos ic->ic_update_promisc = urtwn_update_promisc; 540251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 541292167Savos if (sc->chip & URTWN_CHIP_88E) { 542292167Savos ic->ic_node_alloc = urtwn_r88e_node_alloc; 543292167Savos ic->ic_newassoc = urtwn_r88e_newassoc; 544292167Savos sc->sc_node_free = ic->ic_node_free; 545292167Savos ic->ic_node_free = urtwn_r88e_node_free; 546292167Savos } 547251538Srpaulo 548281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 549251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 550251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 551251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 552251538Srpaulo 553292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 554292174Savos 555251538Srpaulo if (bootverbose) 556251538Srpaulo ieee80211_announce(ic); 557251538Srpaulo 558251538Srpaulo return (0); 559251538Srpaulo 560251538Srpaulodetach: 561251538Srpaulo urtwn_detach(self); 562251538Srpaulo return (ENXIO); /* failure */ 563251538Srpaulo} 564251538Srpaulo 565251538Srpaulostatic int 566251538Srpaulourtwn_detach(device_t self) 567251538Srpaulo{ 568251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 569287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 570263153Skevlo unsigned int x; 571281069Srpaulo 572263153Skevlo /* Prevent further ioctls. */ 573263153Skevlo URTWN_LOCK(sc); 574263153Skevlo sc->sc_flags |= URTWN_DETACHED; 575263153Skevlo URTWN_UNLOCK(sc); 576251538Srpaulo 577291698Savos urtwn_stop(sc); 578291698Savos 579251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 580251538Srpaulo 581288353Sadrian /* stop all USB transfers */ 582288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 583288353Sadrian 584263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 585263153Skevlo URTWN_LOCK(sc); 586263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 587263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 588263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 589263153Skevlo 590263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 591263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 592263153Skevlo URTWN_UNLOCK(sc); 593263153Skevlo 594263153Skevlo /* drain USB transfers */ 595263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 596263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 597263153Skevlo 598263153Skevlo /* Free data buffers. */ 599263153Skevlo URTWN_LOCK(sc); 600263153Skevlo urtwn_free_tx_list(sc); 601263153Skevlo urtwn_free_rx_list(sc); 602263153Skevlo URTWN_UNLOCK(sc); 603263153Skevlo 604292174Savos if (ic->ic_softc == sc) { 605292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 606292174Savos ieee80211_ifdetach(ic); 607292174Savos } 608292174Savos 609292167Savos URTWN_NT_LOCK_DESTROY(sc); 610292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 611251538Srpaulo mtx_destroy(&sc->sc_mtx); 612251538Srpaulo 613251538Srpaulo return (0); 614251538Srpaulo} 615251538Srpaulo 616251538Srpaulostatic void 617289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 618251538Srpaulo{ 619289066Skevlo struct mbuf *m; 620289066Skevlo struct ieee80211_node *ni; 621289066Skevlo URTWN_ASSERT_LOCKED(sc); 622289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 623289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 624289066Skevlo m->m_pkthdr.rcvif = NULL; 625289066Skevlo ieee80211_free_node(ni); 626289066Skevlo m_freem(m); 627251538Srpaulo } 628251538Srpaulo} 629251538Srpaulo 630251538Srpaulostatic usb_error_t 631251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 632251538Srpaulo void *data) 633251538Srpaulo{ 634251538Srpaulo usb_error_t err; 635251538Srpaulo int ntries = 10; 636251538Srpaulo 637251538Srpaulo URTWN_ASSERT_LOCKED(sc); 638251538Srpaulo 639251538Srpaulo while (ntries--) { 640251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 641251538Srpaulo req, data, 0, NULL, 250 /* ms */); 642251538Srpaulo if (err == 0) 643251538Srpaulo break; 644251538Srpaulo 645251538Srpaulo DPRINTFN(1, "Control request failed, %s (retrying)\n", 646251538Srpaulo usbd_errstr(err)); 647251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 648251538Srpaulo } 649251538Srpaulo return (err); 650251538Srpaulo} 651251538Srpaulo 652251538Srpaulostatic struct ieee80211vap * 653251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 654251538Srpaulo enum ieee80211_opmode opmode, int flags, 655251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 656251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 657251538Srpaulo{ 658290631Savos struct urtwn_softc *sc = ic->ic_softc; 659251538Srpaulo struct urtwn_vap *uvp; 660251538Srpaulo struct ieee80211vap *vap; 661251538Srpaulo 662251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 663251538Srpaulo return (NULL); 664251538Srpaulo 665287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 666251538Srpaulo vap = &uvp->vap; 667251538Srpaulo /* enable s/w bmiss handling for sta mode */ 668251538Srpaulo 669281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 670287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 671257743Shselasky /* out of memory */ 672257743Shselasky free(uvp, M_80211_VAP); 673257743Shselasky return (NULL); 674257743Shselasky } 675257743Shselasky 676290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 677290631Savos urtwn_init_beacon(sc, uvp); 678290631Savos 679251538Srpaulo /* override state transition machine */ 680251538Srpaulo uvp->newstate = vap->iv_newstate; 681251538Srpaulo vap->iv_newstate = urtwn_newstate; 682290631Savos vap->iv_update_beacon = urtwn_update_beacon; 683292175Savos vap->iv_key_alloc = urtwn_key_alloc; 684292175Savos vap->iv_key_set = urtwn_key_set; 685292175Savos vap->iv_key_delete = urtwn_key_delete; 686290651Savos if (opmode == IEEE80211_M_IBSS) { 687290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 688290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 689290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 690290651Savos } 691251538Srpaulo 692292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 693292167Savos ieee80211_ratectl_init(vap); 694251538Srpaulo /* complete setup */ 695251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 696287197Sglebius ieee80211_media_status, mac); 697251538Srpaulo ic->ic_opmode = opmode; 698251538Srpaulo return (vap); 699251538Srpaulo} 700251538Srpaulo 701251538Srpaulostatic void 702251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 703251538Srpaulo{ 704290651Savos struct ieee80211com *ic = vap->iv_ic; 705292167Savos struct urtwn_softc *sc = ic->ic_softc; 706251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 707251538Srpaulo 708290651Savos if (uvp->bcn_mbuf != NULL) 709290651Savos m_freem(uvp->bcn_mbuf); 710290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 711290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 712292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 713292167Savos ieee80211_ratectl_deinit(vap); 714251538Srpaulo ieee80211_vap_detach(vap); 715251538Srpaulo free(uvp, M_80211_VAP); 716251538Srpaulo} 717251538Srpaulo 718251538Srpaulostatic struct mbuf * 719292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 720292207Savos int totlen) 721251538Srpaulo{ 722287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 723251538Srpaulo struct mbuf *m; 724292207Savos uint32_t rxdw0; 725292207Savos int pktlen; 726251538Srpaulo 727251538Srpaulo /* 728251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 729251538Srpaulo * RUNNING. 730251538Srpaulo */ 731287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 732251538Srpaulo return (NULL); 733251538Srpaulo 734251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 735251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 736251538Srpaulo /* 737251538Srpaulo * This should not happen since we setup our Rx filter 738251538Srpaulo * to not receive these frames. 739251538Srpaulo */ 740292207Savos DPRINTFN(6, "RX flags error (%s)\n", 741292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 742292207Savos goto fail; 743251538Srpaulo } 744292207Savos 745292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 746292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 747292207Savos DPRINTFN(6, "frame too short: %d\n", pktlen); 748292207Savos goto fail; 749271303Skevlo } 750251538Srpaulo 751292207Savos if (__predict_false(totlen > MCLBYTES)) { 752292207Savos /* convert to m_getjcl if this happens */ 753292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 754292207Savos __func__, pktlen, totlen); 755292207Savos goto fail; 756251538Srpaulo } 757251538Srpaulo 758260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 759292207Savos if (__predict_false(m == NULL)) { 760292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 761292207Savos __func__); 762292207Savos goto fail; 763251538Srpaulo } 764251538Srpaulo 765251538Srpaulo /* Finalize mbuf. */ 766292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 767292207Savos m->m_pkthdr.len = m->m_len = totlen; 768292207Savos 769251538Srpaulo return (m); 770292207Savosfail: 771292207Savos counter_u64_add(ic->ic_ierrors, 1); 772292207Savos return (NULL); 773251538Srpaulo} 774251538Srpaulo 775251538Srpaulostatic struct mbuf * 776292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 777251538Srpaulo{ 778251538Srpaulo struct urtwn_softc *sc = data->sc; 779287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 780251538Srpaulo struct r92c_rx_stat *stat; 781251538Srpaulo uint8_t *buf; 782292167Savos int len; 783251538Srpaulo 784251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 785251538Srpaulo 786251538Srpaulo if (len < sizeof(*stat)) { 787287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 788251538Srpaulo return (NULL); 789251538Srpaulo } 790251538Srpaulo 791251538Srpaulo buf = data->buf; 792292167Savos stat = (struct r92c_rx_stat *)buf; 793292167Savos 794292167Savos if (sc->chip & URTWN_CHIP_88E) { 795292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 796292167Savos 797292167Savos switch (report_sel) { 798292167Savos case R88E_RXDW3_RPT_RX: 799292207Savos return (urtwn_rxeof(sc, buf, len)); 800292167Savos case R88E_RXDW3_RPT_TX1: 801292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 802292167Savos break; 803292167Savos default: 804292167Savos DPRINTFN(7, "case %d was not handled\n", report_sel); 805292167Savos break; 806292167Savos } 807292167Savos } else 808292207Savos return (urtwn_rxeof(sc, buf, len)); 809292167Savos 810292167Savos return (NULL); 811292167Savos} 812292167Savos 813292167Savosstatic struct mbuf * 814292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 815292167Savos{ 816292167Savos struct r92c_rx_stat *stat; 817292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 818292167Savos uint32_t rxdw0; 819292167Savos int totlen, pktlen, infosz, npkts; 820292167Savos 821251538Srpaulo /* Get the number of encapsulated frames. */ 822251538Srpaulo stat = (struct r92c_rx_stat *)buf; 823251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 824251538Srpaulo DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 825251538Srpaulo 826251538Srpaulo /* Process all of them. */ 827251538Srpaulo while (npkts-- > 0) { 828251538Srpaulo if (len < sizeof(*stat)) 829251538Srpaulo break; 830251538Srpaulo stat = (struct r92c_rx_stat *)buf; 831251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 832251538Srpaulo 833251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 834251538Srpaulo if (pktlen == 0) 835251538Srpaulo break; 836251538Srpaulo 837251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 838251538Srpaulo 839251538Srpaulo /* Make sure everything fits in xfer. */ 840251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 841251538Srpaulo if (totlen > len) 842251538Srpaulo break; 843251538Srpaulo 844292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 845251538Srpaulo if (m0 == NULL) 846251538Srpaulo m0 = m; 847251538Srpaulo if (prevm == NULL) 848251538Srpaulo prevm = m; 849251538Srpaulo else { 850251538Srpaulo prevm->m_next = m; 851251538Srpaulo prevm = m; 852251538Srpaulo } 853251538Srpaulo 854251538Srpaulo /* Next chunk is 128-byte aligned. */ 855251538Srpaulo totlen = (totlen + 127) & ~127; 856251538Srpaulo buf += totlen; 857251538Srpaulo len -= totlen; 858251538Srpaulo } 859251538Srpaulo 860251538Srpaulo return (m0); 861251538Srpaulo} 862251538Srpaulo 863251538Srpaulostatic void 864292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 865292167Savos{ 866292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 867292167Savos struct ieee80211vap *vap; 868292167Savos struct ieee80211_node *ni; 869292167Savos uint8_t macid; 870292167Savos int ntries; 871292167Savos 872292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 873292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 874292167Savos 875292167Savos URTWN_NT_LOCK(sc); 876292167Savos ni = sc->node_list[macid]; 877292167Savos if (ni != NULL) { 878292167Savos vap = ni->ni_vap; 879292167Savos 880292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 881292167Savos ieee80211_ratectl_tx_complete(vap, ni, 882292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 883292167Savos } else { 884292167Savos ieee80211_ratectl_tx_complete(vap, ni, 885292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 886292167Savos } 887292167Savos } else 888292167Savos DPRINTFN(8, "macid %d, ni is NULL\n", macid); 889292167Savos URTWN_NT_UNLOCK(sc); 890292167Savos} 891292167Savos 892292207Savosstatic struct ieee80211_node * 893292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 894292207Savos{ 895292207Savos struct ieee80211com *ic = &sc->sc_ic; 896292207Savos struct ieee80211_frame_min *wh; 897292207Savos struct r92c_rx_stat *stat; 898292207Savos uint32_t rxdw0, rxdw3; 899292207Savos uint8_t rate, cipher; 900292207Savos int8_t rssi = URTWN_NOISE_FLOOR + 1; 901292207Savos int infosz; 902292207Savos 903292207Savos stat = mtod(m, struct r92c_rx_stat *); 904292207Savos rxdw0 = le32toh(stat->rxdw0); 905292207Savos rxdw3 = le32toh(stat->rxdw3); 906292207Savos 907292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 908292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 909292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 910292207Savos 911292207Savos /* Get RSSI from PHY status descriptor if present. */ 912292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 913292207Savos if (sc->chip & URTWN_CHIP_88E) 914292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 915292207Savos else 916292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 917292207Savos /* Update our average RSSI. */ 918292207Savos urtwn_update_avgrssi(sc, rate, rssi); 919292207Savos } 920292207Savos 921292207Savos if (ieee80211_radiotap_active(ic)) { 922292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 923292207Savos 924292207Savos tap->wr_flags = 0; 925292207Savos 926292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 927292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 928292207Savos le32toh(stat->rxdw5))) { 929292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 930292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 931292207Savos } else 932292207Savos tap->wr_tsft &= 0xffffffff00000000; 933292207Savos tap->wr_tsft += stat->rxdw5; 934292207Savos 935292207Savos /* Map HW rate index to 802.11 rate. */ 936292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 937292207Savos tap->wr_rate = ridx2rate[rate]; 938292207Savos } else if (rate >= 12) { /* MCS0~15. */ 939292207Savos /* Bit 7 set means HT MCS instead of rate. */ 940292207Savos tap->wr_rate = 0x80 | (rate - 12); 941292207Savos } 942292207Savos tap->wr_dbm_antsignal = rssi; 943292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 944292207Savos } 945292207Savos 946292207Savos *rssi_p = rssi; 947292207Savos 948292207Savos /* Drop descriptor. */ 949292207Savos m_adj(m, sizeof(*stat) + infosz); 950292207Savos wh = mtod(m, struct ieee80211_frame_min *); 951292207Savos 952292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 953292207Savos cipher != R92C_CAM_ALGO_NONE) { 954292207Savos m->m_flags |= M_WEP; 955292207Savos } 956292207Savos 957292207Savos if (m->m_len >= sizeof(*wh)) 958292207Savos return (ieee80211_find_rxnode(ic, wh)); 959292207Savos 960292207Savos return (NULL); 961292207Savos} 962292207Savos 963292167Savosstatic void 964251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 965251538Srpaulo{ 966251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 967287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 968251538Srpaulo struct ieee80211_node *ni; 969251538Srpaulo struct mbuf *m = NULL, *next; 970251538Srpaulo struct urtwn_data *data; 971292207Savos int8_t nf, rssi; 972251538Srpaulo 973251538Srpaulo URTWN_ASSERT_LOCKED(sc); 974251538Srpaulo 975251538Srpaulo switch (USB_GET_STATE(xfer)) { 976251538Srpaulo case USB_ST_TRANSFERRED: 977251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 978251538Srpaulo if (data == NULL) 979251538Srpaulo goto tr_setup; 980251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 981292207Savos m = urtwn_report_intr(xfer, data); 982251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 983251538Srpaulo /* FALLTHROUGH */ 984251538Srpaulo case USB_ST_SETUP: 985251538Srpaulotr_setup: 986251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 987251538Srpaulo if (data == NULL) { 988251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 989251538Srpaulo return; 990251538Srpaulo } 991251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 992251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 993251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 994251538Srpaulo usbd_xfer_max_len(xfer)); 995251538Srpaulo usbd_transfer_submit(xfer); 996251538Srpaulo 997251538Srpaulo /* 998251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 999251538Srpaulo * ieee80211_input() because here is at the end of a USB 1000251538Srpaulo * callback and safe to unlock. 1001251538Srpaulo */ 1002251538Srpaulo while (m != NULL) { 1003251538Srpaulo next = m->m_next; 1004251538Srpaulo m->m_next = NULL; 1005292207Savos 1006292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1007292207Savos URTWN_UNLOCK(sc); 1008292207Savos 1009251538Srpaulo nf = URTWN_NOISE_FLOOR; 1010251538Srpaulo if (ni != NULL) { 1011289799Savos (void)ieee80211_input(ni, m, rssi - nf, nf); 1012251538Srpaulo ieee80211_free_node(ni); 1013289799Savos } else { 1014289799Savos (void)ieee80211_input_all(ic, m, rssi - nf, 1015289799Savos nf); 1016289799Savos } 1017292207Savos 1018292207Savos URTWN_LOCK(sc); 1019251538Srpaulo m = next; 1020251538Srpaulo } 1021251538Srpaulo break; 1022251538Srpaulo default: 1023251538Srpaulo /* needs it to the inactive queue due to a error. */ 1024251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1025251538Srpaulo if (data != NULL) { 1026251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1027251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1028251538Srpaulo } 1029251538Srpaulo if (error != USB_ERR_CANCELLED) { 1030251538Srpaulo usbd_xfer_set_stall(xfer); 1031287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1032251538Srpaulo goto tr_setup; 1033251538Srpaulo } 1034251538Srpaulo break; 1035251538Srpaulo } 1036251538Srpaulo} 1037251538Srpaulo 1038251538Srpaulostatic void 1039289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1040251538Srpaulo{ 1041251538Srpaulo 1042251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1043289891Savos 1044290631Savos if (data->ni != NULL) /* not a beacon frame */ 1045290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1046289891Savos 1047287197Sglebius data->ni = NULL; 1048287197Sglebius data->m = NULL; 1049289891Savos 1050251538Srpaulo sc->sc_txtimer = 0; 1051289891Savos 1052289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1053251538Srpaulo} 1054251538Srpaulo 1055289066Skevlostatic int 1056289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1057289066Skevlo int ndata, int maxsz) 1058289066Skevlo{ 1059289066Skevlo int i, error; 1060289066Skevlo 1061289066Skevlo for (i = 0; i < ndata; i++) { 1062289066Skevlo struct urtwn_data *dp = &data[i]; 1063289066Skevlo dp->sc = sc; 1064289066Skevlo dp->m = NULL; 1065289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1066289066Skevlo if (dp->buf == NULL) { 1067289066Skevlo device_printf(sc->sc_dev, 1068289066Skevlo "could not allocate buffer\n"); 1069289066Skevlo error = ENOMEM; 1070289066Skevlo goto fail; 1071289066Skevlo } 1072289066Skevlo dp->ni = NULL; 1073289066Skevlo } 1074289066Skevlo 1075289066Skevlo return (0); 1076289066Skevlofail: 1077289066Skevlo urtwn_free_list(sc, data, ndata); 1078289066Skevlo return (error); 1079289066Skevlo} 1080289066Skevlo 1081289066Skevlostatic int 1082289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1083289066Skevlo{ 1084289066Skevlo int error, i; 1085289066Skevlo 1086289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1087289066Skevlo URTWN_RXBUFSZ); 1088289066Skevlo if (error != 0) 1089289066Skevlo return (error); 1090289066Skevlo 1091289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1092289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1093289066Skevlo 1094289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1095289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1096289066Skevlo 1097289066Skevlo return (0); 1098289066Skevlo} 1099289066Skevlo 1100289066Skevlostatic int 1101289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1102289066Skevlo{ 1103289066Skevlo int error, i; 1104289066Skevlo 1105289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1106289066Skevlo URTWN_TXBUFSZ); 1107289066Skevlo if (error != 0) 1108289066Skevlo return (error); 1109289066Skevlo 1110289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1111289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1112289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1113289066Skevlo 1114289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1115289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1116289066Skevlo 1117289066Skevlo return (0); 1118289066Skevlo} 1119289066Skevlo 1120251538Srpaulostatic void 1121289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1122289066Skevlo{ 1123289066Skevlo int i; 1124289066Skevlo 1125289066Skevlo for (i = 0; i < ndata; i++) { 1126289066Skevlo struct urtwn_data *dp = &data[i]; 1127289066Skevlo 1128289066Skevlo if (dp->buf != NULL) { 1129289066Skevlo free(dp->buf, M_USBDEV); 1130289066Skevlo dp->buf = NULL; 1131289066Skevlo } 1132289066Skevlo if (dp->ni != NULL) { 1133289066Skevlo ieee80211_free_node(dp->ni); 1134289066Skevlo dp->ni = NULL; 1135289066Skevlo } 1136289066Skevlo } 1137289066Skevlo} 1138289066Skevlo 1139289066Skevlostatic void 1140289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1141289066Skevlo{ 1142289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1143289066Skevlo} 1144289066Skevlo 1145289066Skevlostatic void 1146289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1147289066Skevlo{ 1148289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1149289066Skevlo} 1150289066Skevlo 1151289066Skevlostatic void 1152251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1153251538Srpaulo{ 1154251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1155251538Srpaulo struct urtwn_data *data; 1156251538Srpaulo 1157251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1158251538Srpaulo 1159251538Srpaulo switch (USB_GET_STATE(xfer)){ 1160251538Srpaulo case USB_ST_TRANSFERRED: 1161251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1162251538Srpaulo if (data == NULL) 1163251538Srpaulo goto tr_setup; 1164251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1165289891Savos urtwn_txeof(sc, data, 0); 1166251538Srpaulo /* FALLTHROUGH */ 1167251538Srpaulo case USB_ST_SETUP: 1168251538Srpaulotr_setup: 1169251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1170251538Srpaulo if (data == NULL) { 1171251538Srpaulo DPRINTF("%s: empty pending queue\n", __func__); 1172288353Sadrian goto finish; 1173251538Srpaulo } 1174251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1175251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1176251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1177251538Srpaulo usbd_transfer_submit(xfer); 1178251538Srpaulo break; 1179251538Srpaulo default: 1180251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1181251538Srpaulo if (data == NULL) 1182251538Srpaulo goto tr_setup; 1183289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1184289891Savos urtwn_txeof(sc, data, 1); 1185251538Srpaulo if (error != USB_ERR_CANCELLED) { 1186251538Srpaulo usbd_xfer_set_stall(xfer); 1187251538Srpaulo goto tr_setup; 1188251538Srpaulo } 1189251538Srpaulo break; 1190251538Srpaulo } 1191288353Sadrianfinish: 1192288353Sadrian /* Kick-start more transmit */ 1193288353Sadrian urtwn_start(sc); 1194251538Srpaulo} 1195251538Srpaulo 1196251538Srpaulostatic struct urtwn_data * 1197251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1198251538Srpaulo{ 1199251538Srpaulo struct urtwn_data *bf; 1200251538Srpaulo 1201251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1202251538Srpaulo if (bf != NULL) 1203251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1204251538Srpaulo else 1205251538Srpaulo DPRINTF("%s: %s\n", __func__, "out of xmit buffers"); 1206251538Srpaulo return (bf); 1207251538Srpaulo} 1208251538Srpaulo 1209251538Srpaulostatic struct urtwn_data * 1210251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1211251538Srpaulo{ 1212251538Srpaulo struct urtwn_data *bf; 1213251538Srpaulo 1214251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1215251538Srpaulo 1216251538Srpaulo bf = _urtwn_getbuf(sc); 1217287197Sglebius if (bf == NULL) 1218251538Srpaulo DPRINTF("%s: stop queue\n", __func__); 1219251538Srpaulo return (bf); 1220251538Srpaulo} 1221251538Srpaulo 1222291698Savosstatic usb_error_t 1223251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1224251538Srpaulo int len) 1225251538Srpaulo{ 1226251538Srpaulo usb_device_request_t req; 1227251538Srpaulo 1228251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1229251538Srpaulo req.bRequest = R92C_REQ_REGS; 1230251538Srpaulo USETW(req.wValue, addr); 1231251538Srpaulo USETW(req.wIndex, 0); 1232251538Srpaulo USETW(req.wLength, len); 1233251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1234251538Srpaulo} 1235251538Srpaulo 1236291698Savosstatic usb_error_t 1237251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1238251538Srpaulo{ 1239291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1240251538Srpaulo} 1241251538Srpaulo 1242291698Savosstatic usb_error_t 1243251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1244251538Srpaulo{ 1245251538Srpaulo val = htole16(val); 1246291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1247251538Srpaulo} 1248251538Srpaulo 1249291698Savosstatic usb_error_t 1250251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1251251538Srpaulo{ 1252251538Srpaulo val = htole32(val); 1253291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1254251538Srpaulo} 1255251538Srpaulo 1256291698Savosstatic usb_error_t 1257251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1258251538Srpaulo int len) 1259251538Srpaulo{ 1260251538Srpaulo usb_device_request_t req; 1261251538Srpaulo 1262251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1263251538Srpaulo req.bRequest = R92C_REQ_REGS; 1264251538Srpaulo USETW(req.wValue, addr); 1265251538Srpaulo USETW(req.wIndex, 0); 1266251538Srpaulo USETW(req.wLength, len); 1267251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1268251538Srpaulo} 1269251538Srpaulo 1270251538Srpaulostatic uint8_t 1271251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1272251538Srpaulo{ 1273251538Srpaulo uint8_t val; 1274251538Srpaulo 1275251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1276251538Srpaulo return (0xff); 1277251538Srpaulo return (val); 1278251538Srpaulo} 1279251538Srpaulo 1280251538Srpaulostatic uint16_t 1281251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1282251538Srpaulo{ 1283251538Srpaulo uint16_t val; 1284251538Srpaulo 1285251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1286251538Srpaulo return (0xffff); 1287251538Srpaulo return (le16toh(val)); 1288251538Srpaulo} 1289251538Srpaulo 1290251538Srpaulostatic uint32_t 1291251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1292251538Srpaulo{ 1293251538Srpaulo uint32_t val; 1294251538Srpaulo 1295251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1296251538Srpaulo return (0xffffffff); 1297251538Srpaulo return (le32toh(val)); 1298251538Srpaulo} 1299251538Srpaulo 1300251538Srpaulostatic int 1301251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1302251538Srpaulo{ 1303251538Srpaulo struct r92c_fw_cmd cmd; 1304291698Savos usb_error_t error; 1305251538Srpaulo int ntries; 1306251538Srpaulo 1307251538Srpaulo /* Wait for current FW box to be empty. */ 1308251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1309251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1310251538Srpaulo break; 1311266472Shselasky urtwn_ms_delay(sc); 1312251538Srpaulo } 1313251538Srpaulo if (ntries == 100) { 1314251538Srpaulo device_printf(sc->sc_dev, 1315251538Srpaulo "could not send firmware command\n"); 1316251538Srpaulo return (ETIMEDOUT); 1317251538Srpaulo } 1318251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1319251538Srpaulo cmd.id = id; 1320251538Srpaulo if (len > 3) 1321251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1322251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1323251538Srpaulo memcpy(cmd.msg, buf, len); 1324251538Srpaulo 1325251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1326291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1327251538Srpaulo (uint8_t *)&cmd + 4, 2); 1328291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1329291698Savos return (EIO); 1330291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1331251538Srpaulo (uint8_t *)&cmd + 0, 4); 1332291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1333291698Savos return (EIO); 1334251538Srpaulo 1335251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1336251538Srpaulo return (0); 1337251538Srpaulo} 1338251538Srpaulo 1339292174Savosstatic void 1340292174Savosurtwn_cmdq_cb(void *arg, int pending) 1341292174Savos{ 1342292174Savos struct urtwn_softc *sc = arg; 1343292174Savos struct urtwn_cmdq *item; 1344292174Savos 1345292174Savos /* 1346292174Savos * Device must be powered on (via urtwn_power_on()) 1347292174Savos * before any command may be sent. 1348292174Savos */ 1349292174Savos URTWN_LOCK(sc); 1350292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1351292174Savos URTWN_UNLOCK(sc); 1352292174Savos return; 1353292174Savos } 1354292174Savos 1355292174Savos URTWN_CMDQ_LOCK(sc); 1356292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1357292174Savos item = &sc->cmdq[sc->cmdq_first]; 1358292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1359292174Savos URTWN_CMDQ_UNLOCK(sc); 1360292174Savos 1361292174Savos item->func(sc, &item->data); 1362292174Savos 1363292174Savos URTWN_CMDQ_LOCK(sc); 1364292174Savos memset(item, 0, sizeof (*item)); 1365292174Savos } 1366292174Savos URTWN_CMDQ_UNLOCK(sc); 1367292174Savos URTWN_UNLOCK(sc); 1368292174Savos} 1369292174Savos 1370292174Savosstatic int 1371292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1372292174Savos CMD_FUNC_PROTO) 1373292174Savos{ 1374292174Savos struct ieee80211com *ic = &sc->sc_ic; 1375292174Savos 1376292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1377292174Savos 1378292174Savos URTWN_CMDQ_LOCK(sc); 1379292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1380292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1381292174Savos URTWN_CMDQ_UNLOCK(sc); 1382292174Savos 1383292174Savos return (EAGAIN); 1384292174Savos } 1385292174Savos 1386292174Savos if (ptr != NULL) 1387292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1388292174Savos sc->cmdq[sc->cmdq_last].func = func; 1389292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1390292174Savos URTWN_CMDQ_UNLOCK(sc); 1391292174Savos 1392292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1393292174Savos 1394292174Savos return (0); 1395292174Savos} 1396292174Savos 1397264912Skevlostatic __inline void 1398251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1399251538Srpaulo{ 1400264912Skevlo 1401264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1402264912Skevlo} 1403264912Skevlo 1404264912Skevlostatic void 1405264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1406264912Skevlo uint32_t val) 1407264912Skevlo{ 1408251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1409251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1410251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1411251538Srpaulo} 1412251538Srpaulo 1413264912Skevlostatic void 1414264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1415264912Skevlouint32_t val) 1416264912Skevlo{ 1417264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1418264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1419264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1420264912Skevlo} 1421264912Skevlo 1422251538Srpaulostatic uint32_t 1423251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1424251538Srpaulo{ 1425251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1426251538Srpaulo 1427251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1428251538Srpaulo if (chain != 0) 1429251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1430251538Srpaulo 1431251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1432251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1433266472Shselasky urtwn_ms_delay(sc); 1434251538Srpaulo 1435251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1436251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1437251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1438266472Shselasky urtwn_ms_delay(sc); 1439251538Srpaulo 1440251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1441251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1442266472Shselasky urtwn_ms_delay(sc); 1443251538Srpaulo 1444251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1445251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1446251538Srpaulo else 1447251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1448251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1449251538Srpaulo} 1450251538Srpaulo 1451251538Srpaulostatic int 1452251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1453251538Srpaulo{ 1454291698Savos usb_error_t error; 1455251538Srpaulo int ntries; 1456251538Srpaulo 1457291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1458251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1459251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1460251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1461291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1462291698Savos return (EIO); 1463251538Srpaulo /* Wait for write operation to complete. */ 1464251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1465251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1466251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1467251538Srpaulo return (0); 1468266472Shselasky urtwn_ms_delay(sc); 1469251538Srpaulo } 1470251538Srpaulo return (ETIMEDOUT); 1471251538Srpaulo} 1472251538Srpaulo 1473291264Savosstatic int 1474291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1475251538Srpaulo{ 1476251538Srpaulo uint32_t reg; 1477291698Savos usb_error_t error; 1478251538Srpaulo int ntries; 1479251538Srpaulo 1480291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1481291264Savos return (EFAULT); 1482291264Savos 1483251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1484291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1485251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1486291264Savos 1487291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1488291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1489291698Savos return (EIO); 1490251538Srpaulo /* Wait for read operation to complete. */ 1491251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1492251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1493251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1494291264Savos break; 1495266472Shselasky urtwn_ms_delay(sc); 1496251538Srpaulo } 1497291264Savos if (ntries == 100) { 1498291264Savos device_printf(sc->sc_dev, 1499291264Savos "could not read efuse byte at address 0x%x\n", 1500291264Savos sc->last_rom_addr); 1501291264Savos return (ETIMEDOUT); 1502291264Savos } 1503291264Savos 1504291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1505291264Savos sc->last_rom_addr++; 1506291264Savos 1507291264Savos return (0); 1508251538Srpaulo} 1509251538Srpaulo 1510291264Savosstatic int 1511291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1512291264Savos uint8_t msk) 1513291264Savos{ 1514291264Savos uint8_t reg; 1515291264Savos int i, error; 1516291264Savos 1517291264Savos for (i = 0; i < 4; i++) { 1518291264Savos if (msk & (1 << i)) 1519291264Savos continue; 1520291264Savos error = urtwn_efuse_read_next(sc, ®); 1521291264Savos if (error != 0) 1522291264Savos return (error); 1523291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2, reg); 1524291264Savos rom[off * 8 + i * 2 + 0] = reg; 1525291264Savos 1526291264Savos error = urtwn_efuse_read_next(sc, ®); 1527291264Savos if (error != 0) 1528291264Savos return (error); 1529291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2 + 1, reg); 1530291264Savos rom[off * 8 + i * 2 + 1] = reg; 1531291264Savos } 1532291264Savos 1533291264Savos return (0); 1534291264Savos} 1535291264Savos 1536291264Savos#ifdef URTWN_DEBUG 1537251538Srpaulostatic void 1538291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1539251538Srpaulo{ 1540251538Srpaulo int i; 1541251538Srpaulo 1542291264Savos /* Dump ROM contents. */ 1543291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1544291264Savos for (i = 0; i < size; i++) { 1545291264Savos if (i % 32 == 0) 1546291264Savos printf("\n%03X: ", i); 1547291264Savos else if (i % 4 == 0) 1548291264Savos printf(" "); 1549291264Savos 1550291264Savos printf("%02X", rom[i]); 1551291264Savos } 1552291264Savos printf("\n"); 1553291264Savos} 1554291264Savos#endif 1555291264Savos 1556291264Savosstatic int 1557291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1558291264Savos{ 1559291264Savos#define URTWN_CHK(res) do { \ 1560291264Savos if ((error = res) != 0) \ 1561291264Savos goto end; \ 1562291264Savos} while(0) 1563291264Savos uint8_t msk, off, reg; 1564291264Savos int error; 1565291264Savos 1566291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1567264912Skevlo 1568291264Savos /* Read full ROM image. */ 1569291264Savos sc->last_rom_addr = 0; 1570291264Savos memset(rom, 0xff, size); 1571291264Savos 1572291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1573291264Savos while (reg != 0xff) { 1574291264Savos /* check for extended header */ 1575291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1576291264Savos off = reg >> 5; 1577291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1578291264Savos 1579291264Savos if ((reg & 0x0f) != 0x0f) 1580291264Savos off = ((reg & 0xf0) >> 1) | off; 1581291264Savos else 1582291264Savos continue; 1583291264Savos } else 1584291264Savos off = reg >> 4; 1585251538Srpaulo msk = reg & 0xf; 1586291264Savos 1587291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1588291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1589251538Srpaulo } 1590291264Savos 1591291264Savosend: 1592291264Savos 1593251538Srpaulo#ifdef URTWN_DEBUG 1594291264Savos if (urtwn_debug >= 2) 1595291264Savos urtwn_dump_rom_contents(sc, rom, size); 1596251538Srpaulo#endif 1597291264Savos 1598282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1599291264Savos 1600291264Savos if (error != 0) { 1601291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1602291264Savos __func__); 1603291264Savos } 1604291264Savos 1605291264Savos return (error); 1606291264Savos#undef URTWN_CHK 1607282623Skevlo} 1608281592Skevlo 1609291698Savosstatic int 1610264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1611264912Skevlo{ 1612291698Savos usb_error_t error; 1613264912Skevlo uint32_t reg; 1614251538Srpaulo 1615291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1616291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1617291698Savos return (EIO); 1618281918Skevlo 1619264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1620264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1621291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1622264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1623291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1624291698Savos return (EIO); 1625264912Skevlo } 1626264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1627264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1628291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1629264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1630291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1631291698Savos return (EIO); 1632264912Skevlo } 1633264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1634264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1635264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1636291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1637264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1638291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1639291698Savos return (EIO); 1640264912Skevlo } 1641291698Savos 1642291698Savos return (0); 1643264912Skevlo} 1644264912Skevlo 1645251538Srpaulostatic int 1646251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1647251538Srpaulo{ 1648251538Srpaulo uint32_t reg; 1649251538Srpaulo 1650264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1651264912Skevlo return (0); 1652264912Skevlo 1653251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1654251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1655251538Srpaulo return (EIO); 1656251538Srpaulo 1657251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1658251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1659251538Srpaulo /* Check if it is a castrated 8192C. */ 1660251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1661251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1662251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1663251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1664251538Srpaulo } 1665251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1666251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1667251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1668251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1669251538Srpaulo } 1670251538Srpaulo return (0); 1671251538Srpaulo} 1672251538Srpaulo 1673291264Savosstatic int 1674251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1675251538Srpaulo{ 1676291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1677291264Savos int error; 1678251538Srpaulo 1679251538Srpaulo /* Read full ROM image. */ 1680291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1681291264Savos if (error != 0) 1682291264Savos return (error); 1683251538Srpaulo 1684251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1685291264Savos sc->last_rom_addr = 0x1fa; 1686291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1687291264Savos if (error != 0) 1688291264Savos return (error); 1689251538Srpaulo DPRINTF("PA setting=0x%x\n", sc->pa_setting); 1690251538Srpaulo 1691251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1692251538Srpaulo 1693251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1694251538Srpaulo DPRINTF("regulatory type=%d\n", sc->regulatory); 1695287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1696251538Srpaulo 1697264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1698264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1699291264Savos 1700291264Savos return (0); 1701251538Srpaulo} 1702251538Srpaulo 1703291264Savosstatic int 1704264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1705264912Skevlo{ 1706291264Savos uint8_t *rom = sc->rom.r88e_rom; 1707291264Savos uint16_t addr; 1708291264Savos int error, i; 1709264912Skevlo 1710291264Savos error = urtwn_efuse_read(sc, rom, sizeof(sc->rom.r88e_rom)); 1711291264Savos if (error != 0) 1712291264Savos return (error); 1713264912Skevlo 1714264912Skevlo addr = 0x10; 1715264912Skevlo for (i = 0; i < 6; i++) 1716291264Savos sc->cck_tx_pwr[i] = rom[addr++]; 1717264912Skevlo for (i = 0; i < 5; i++) 1718291264Savos sc->ht40_tx_pwr[i] = rom[addr++]; 1719291264Savos sc->bw20_tx_pwr_diff = (rom[addr] & 0xf0) >> 4; 1720264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1721264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1722291264Savos sc->ofdm_tx_pwr_diff = (rom[addr] & 0xf); 1723264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1724264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1725291264Savos sc->regulatory = MS(rom[0xc1], R92C_ROM_RF1_REGULATORY); 1726291264Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, &rom[0xd7]); 1727264912Skevlo 1728264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1729264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1730291264Savos 1731291264Savos return (0); 1732264912Skevlo} 1733264912Skevlo 1734251538Srpaulo/* 1735251538Srpaulo * Initialize rate adaptation in firmware. 1736251538Srpaulo */ 1737251538Srpaulostatic int 1738251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1739251538Srpaulo{ 1740287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1741251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1742251538Srpaulo struct ieee80211_node *ni; 1743251538Srpaulo struct ieee80211_rateset *rs; 1744251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1745251538Srpaulo uint32_t rates, basicrates; 1746251538Srpaulo uint8_t mode; 1747251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1748251538Srpaulo 1749251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1750251538Srpaulo rs = &ni->ni_rates; 1751251538Srpaulo 1752251538Srpaulo /* Get normal and basic rates mask. */ 1753251538Srpaulo rates = basicrates = 0; 1754251538Srpaulo maxrate = maxbasicrate = 0; 1755251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1756251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1757289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1758289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1759289758Savos ridx2rate[j]) 1760251538Srpaulo break; 1761289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1762251538Srpaulo continue; 1763251538Srpaulo rates |= 1 << j; 1764251538Srpaulo if (j > maxrate) 1765251538Srpaulo maxrate = j; 1766251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1767251538Srpaulo basicrates |= 1 << j; 1768251538Srpaulo if (j > maxbasicrate) 1769251538Srpaulo maxbasicrate = j; 1770251538Srpaulo } 1771251538Srpaulo } 1772251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1773251538Srpaulo mode = R92C_RAID_11B; 1774251538Srpaulo else 1775251538Srpaulo mode = R92C_RAID_11BG; 1776251538Srpaulo DPRINTF("mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1777251538Srpaulo mode, rates, basicrates); 1778251538Srpaulo 1779251538Srpaulo /* Set rates mask for group addressed frames. */ 1780251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 1781251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 1782251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1783251538Srpaulo if (error != 0) { 1784252401Srpaulo ieee80211_free_node(ni); 1785251538Srpaulo device_printf(sc->sc_dev, 1786251538Srpaulo "could not add broadcast station\n"); 1787251538Srpaulo return (error); 1788251538Srpaulo } 1789251538Srpaulo /* Set initial MRR rate. */ 1790251538Srpaulo DPRINTF("maxbasicrate=%d\n", maxbasicrate); 1791251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 1792251538Srpaulo maxbasicrate); 1793251538Srpaulo 1794251538Srpaulo /* Set rates mask for unicast frames. */ 1795251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 1796251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 1797251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1798251538Srpaulo if (error != 0) { 1799252401Srpaulo ieee80211_free_node(ni); 1800251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 1801251538Srpaulo return (error); 1802251538Srpaulo } 1803251538Srpaulo /* Set initial MRR rate. */ 1804251538Srpaulo DPRINTF("maxrate=%d\n", maxrate); 1805251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 1806251538Srpaulo maxrate); 1807251538Srpaulo 1808251538Srpaulo /* Indicate highest supported rate. */ 1809252403Srpaulo ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1810252401Srpaulo ieee80211_free_node(ni); 1811252401Srpaulo 1812251538Srpaulo return (0); 1813251538Srpaulo} 1814251538Srpaulo 1815290439Savosstatic void 1816290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1817251538Srpaulo{ 1818290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 1819290631Savos 1820290631Savos txd->txdw0 = htole32( 1821290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 1822290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1823290631Savos txd->txdw1 = htole32( 1824290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 1825290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1826290631Savos 1827291858Savos if (sc->chip & URTWN_CHIP_88E) { 1828290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 1829291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 1830291858Savos } else { 1831290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 1832291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 1833291858Savos } 1834290631Savos 1835290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 1836290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 1837251538Srpaulo} 1838251538Srpaulo 1839290631Savosstatic int 1840290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 1841290631Savos{ 1842290631Savos struct ieee80211vap *vap = ni->ni_vap; 1843290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1844290631Savos struct mbuf *m; 1845290631Savos int error; 1846290631Savos 1847290631Savos URTWN_ASSERT_LOCKED(sc); 1848290631Savos 1849290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 1850290631Savos return (EINVAL); 1851290631Savos 1852290631Savos m = ieee80211_beacon_alloc(ni); 1853290631Savos if (m == NULL) { 1854290631Savos device_printf(sc->sc_dev, 1855290631Savos "%s: could not allocate beacon frame\n", __func__); 1856290631Savos return (ENOMEM); 1857290631Savos } 1858290631Savos 1859290631Savos if (uvp->bcn_mbuf != NULL) 1860290631Savos m_freem(uvp->bcn_mbuf); 1861290631Savos 1862290631Savos uvp->bcn_mbuf = m; 1863290631Savos 1864290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1865290631Savos return (error); 1866290631Savos 1867290631Savos /* XXX bcnq stuck workaround */ 1868290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1869290631Savos return (error); 1870290631Savos 1871290631Savos return (0); 1872290631Savos} 1873290631Savos 1874251538Srpaulostatic void 1875290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 1876290631Savos{ 1877290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1878290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1879290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1880290631Savos struct ieee80211_node *ni = vap->iv_bss; 1881290631Savos int mcast = 0; 1882290631Savos 1883290631Savos URTWN_LOCK(sc); 1884290631Savos if (uvp->bcn_mbuf == NULL) { 1885290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 1886290631Savos if (uvp->bcn_mbuf == NULL) { 1887290631Savos device_printf(sc->sc_dev, 1888290631Savos "%s: could not allocate beacon frame\n", __func__); 1889290631Savos URTWN_UNLOCK(sc); 1890290631Savos return; 1891290631Savos } 1892290631Savos } 1893290631Savos URTWN_UNLOCK(sc); 1894290631Savos 1895290631Savos if (item == IEEE80211_BEACON_TIM) 1896290631Savos mcast = 1; /* XXX */ 1897290631Savos 1898290631Savos setbit(bo->bo_flags, item); 1899290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 1900290631Savos 1901290631Savos URTWN_LOCK(sc); 1902290631Savos urtwn_tx_beacon(sc, uvp); 1903290631Savos URTWN_UNLOCK(sc); 1904290631Savos} 1905290631Savos 1906290631Savos/* 1907290631Savos * Push a beacon frame into the chip. Beacon will 1908290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 1909290631Savos */ 1910290631Savosstatic int 1911290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1912290631Savos{ 1913290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 1914290631Savos struct urtwn_data *bf; 1915290631Savos 1916290631Savos URTWN_ASSERT_LOCKED(sc); 1917290631Savos 1918290631Savos bf = urtwn_getbuf(sc); 1919290631Savos if (bf == NULL) 1920290631Savos return (ENOMEM); 1921290631Savos 1922290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 1923290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 1924290631Savos 1925290631Savos sc->sc_txtimer = 5; 1926290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1927290631Savos 1928290631Savos return (0); 1929290631Savos} 1930290631Savos 1931292175Savosstatic int 1932292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 1933292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 1934292175Savos{ 1935292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1936292175Savos uint8_t i; 1937292175Savos 1938292175Savos if (!(&vap->iv_nw_keys[0] <= k && 1939292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 1940292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 1941292175Savos URTWN_LOCK(sc); 1942292175Savos /* 1943292175Savos * First 4 slots for group keys, 1944292175Savos * what is left - for pairwise. 1945292175Savos * XXX incompatible with IBSS RSN. 1946292175Savos */ 1947292175Savos for (i = IEEE80211_WEP_NKID; 1948292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 1949292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 1950292175Savos sc->keys_bmap |= 1 << i; 1951292175Savos *keyix = i; 1952292175Savos break; 1953292175Savos } 1954292175Savos } 1955292175Savos URTWN_UNLOCK(sc); 1956292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 1957292175Savos device_printf(sc->sc_dev, 1958292175Savos "%s: no free space in the key table\n", 1959292175Savos __func__); 1960292175Savos return 0; 1961292175Savos } 1962292175Savos } else 1963292175Savos *keyix = 0; 1964292175Savos } else { 1965292175Savos *keyix = k - vap->iv_nw_keys; 1966292175Savos } 1967292175Savos *rxkeyix = *keyix; 1968292175Savos return 1; 1969292175Savos} 1970292175Savos 1971290631Savosstatic void 1972292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 1973292175Savos{ 1974292175Savos struct ieee80211_key *k = &data->key; 1975292175Savos uint8_t algo, keyid; 1976292175Savos int i, error; 1977292175Savos 1978292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 1979292175Savos keyid = k->wk_keyix; 1980292175Savos else 1981292175Savos keyid = 0; 1982292175Savos 1983292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 1984292175Savos switch (k->wk_cipher->ic_cipher) { 1985292175Savos case IEEE80211_CIPHER_WEP: 1986292175Savos if (k->wk_keylen < 8) 1987292175Savos algo = R92C_CAM_ALGO_WEP40; 1988292175Savos else 1989292175Savos algo = R92C_CAM_ALGO_WEP104; 1990292175Savos break; 1991292175Savos case IEEE80211_CIPHER_TKIP: 1992292175Savos algo = R92C_CAM_ALGO_TKIP; 1993292175Savos break; 1994292175Savos case IEEE80211_CIPHER_AES_CCM: 1995292175Savos algo = R92C_CAM_ALGO_AES; 1996292175Savos break; 1997292175Savos default: 1998292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 1999292175Savos __func__, k->wk_cipher->ic_cipher); 2000292175Savos return; 2001292175Savos } 2002292175Savos 2003292175Savos DPRINTFN(9, "keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2004292175Savos "macaddr %s\n", k->wk_keyix, keyid, k->wk_cipher->ic_cipher, algo, 2005292175Savos k->wk_flags, k->wk_keylen, ether_sprintf(k->wk_macaddr)); 2006292175Savos 2007292175Savos /* Write key. */ 2008292175Savos for (i = 0; i < 4; i++) { 2009292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2010292175Savos LE_READ_4(&k->wk_key[i * 4])); 2011292175Savos if (error != 0) 2012292175Savos goto fail; 2013292175Savos } 2014292175Savos 2015292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2016292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2017292175Savos LE_READ_4(&k->wk_macaddr[2])); 2018292175Savos if (error != 0) 2019292175Savos goto fail; 2020292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2021292175Savos SM(R92C_CAM_ALGO, algo) | 2022292175Savos SM(R92C_CAM_KEYID, keyid) | 2023292175Savos SM(R92C_CAM_MACLO, LE_READ_2(&k->wk_macaddr[0])) | 2024292175Savos R92C_CAM_VALID); 2025292175Savos if (error != 0) 2026292175Savos goto fail; 2027292175Savos 2028292175Savos return; 2029292175Savos 2030292175Savosfail: 2031292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2032292175Savos} 2033292175Savos 2034292175Savosstatic void 2035292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2036292175Savos{ 2037292175Savos struct ieee80211_key *k = &data->key; 2038292175Savos int i; 2039292175Savos 2040292175Savos DPRINTFN(9, "keyix %d, flags %04X, macaddr %s\n", 2041292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2042292175Savos 2043292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2044292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2045292175Savos 2046292175Savos /* Clear key. */ 2047292175Savos for (i = 0; i < 4; i++) 2048292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2049292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2050292175Savos} 2051292175Savos 2052292175Savosstatic int 2053292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2054292175Savos{ 2055292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2056292175Savos 2057292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2058292175Savos /* Not for us. */ 2059292175Savos return (1); 2060292175Savos } 2061292175Savos 2062292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2063292175Savos} 2064292175Savos 2065292175Savosstatic int 2066292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2067292175Savos{ 2068292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2069292175Savos 2070292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2071292175Savos /* Not for us. */ 2072292175Savos return (1); 2073292175Savos } 2074292175Savos 2075292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2076292175Savos} 2077292175Savos 2078292175Savosstatic void 2079290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2080290651Savos{ 2081290651Savos struct ieee80211vap *vap = arg; 2082290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2083290651Savos struct ieee80211_node *ni; 2084290651Savos uint32_t reg; 2085290651Savos 2086290651Savos URTWN_LOCK(sc); 2087290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2088290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2089290651Savos 2090290651Savos /* Accept beacons with the same BSSID. */ 2091290651Savos urtwn_set_rx_bssid_all(sc, 0); 2092290651Savos 2093290651Savos /* Enable synchronization. */ 2094290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2095290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2096290651Savos 2097290651Savos /* Synchronize. */ 2098290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2099290651Savos 2100290651Savos /* Disable synchronization. */ 2101290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2102290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2103290651Savos 2104290651Savos /* Remove beacon filter. */ 2105290651Savos urtwn_set_rx_bssid_all(sc, 1); 2106290651Savos 2107290651Savos /* Enable beaconing. */ 2108290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2109290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2110290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2111290651Savos 2112290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2113290651Savos ieee80211_free_node(ni); 2114290651Savos URTWN_UNLOCK(sc); 2115290651Savos} 2116290651Savos 2117290651Savosstatic void 2118290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2119290631Savos{ 2120290651Savos struct ieee80211com *ic = &sc->sc_ic; 2121290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2122290651Savos 2123290631Savos /* Reset TSF. */ 2124290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2125290631Savos 2126290631Savos switch (vap->iv_opmode) { 2127290631Savos case IEEE80211_M_STA: 2128290631Savos /* Enable TSF synchronization. */ 2129290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2130290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2131290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2132290631Savos break; 2133290651Savos case IEEE80211_M_IBSS: 2134290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2135290651Savos break; 2136290631Savos case IEEE80211_M_HOSTAP: 2137290631Savos /* Enable beaconing. */ 2138290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2139290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2140290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2141290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2142290631Savos break; 2143290631Savos default: 2144290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2145290631Savos vap->iv_opmode); 2146290631Savos return; 2147290631Savos } 2148290631Savos} 2149290631Savos 2150290631Savosstatic void 2151292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2152292203Savos{ 2153292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2154292203Savos} 2155292203Savos 2156292203Savosstatic void 2157251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2158251538Srpaulo{ 2159251538Srpaulo uint8_t reg; 2160281069Srpaulo 2161251538Srpaulo if (led == URTWN_LED_LINK) { 2162264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2163264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2164264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2165264912Skevlo if (!on) { 2166264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2167264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2168264912Skevlo reg | R92C_LEDCFG0_DIS); 2169264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2170264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2171264912Skevlo 0xfe); 2172264912Skevlo } 2173264912Skevlo } else { 2174264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2175264912Skevlo if (!on) 2176264912Skevlo reg |= R92C_LEDCFG0_DIS; 2177264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2178264912Skevlo } 2179264912Skevlo sc->ledlink = on; /* Save LED state. */ 2180251538Srpaulo } 2181251538Srpaulo} 2182251538Srpaulo 2183289811Savosstatic void 2184289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2185289811Savos{ 2186289811Savos uint8_t reg; 2187289811Savos 2188289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2189289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2190289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2191289811Savos} 2192289811Savos 2193290651Savosstatic void 2194290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2195290651Savos const struct ieee80211_rx_stats *rxs, 2196290651Savos int rssi, int nf) 2197290651Savos{ 2198290651Savos struct ieee80211vap *vap = ni->ni_vap; 2199290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2200290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2201290651Savos uint64_t ni_tstamp, curr_tstamp; 2202290651Savos 2203290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2204290651Savos 2205290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2206290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2207290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2208290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2209290651Savos URTWN_LOCK(sc); 2210290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2211290651Savos URTWN_UNLOCK(sc); 2212290651Savos curr_tstamp = le64toh(curr_tstamp); 2213290651Savos 2214290651Savos if (ni_tstamp >= curr_tstamp) 2215290651Savos (void) ieee80211_ibss_merge(ni); 2216290651Savos } 2217290651Savos} 2218290651Savos 2219251538Srpaulostatic int 2220251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2221251538Srpaulo{ 2222251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2223251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2224286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2225251538Srpaulo struct ieee80211_node *ni; 2226251538Srpaulo enum ieee80211_state ostate; 2227290631Savos uint32_t reg; 2228290631Savos uint8_t mode; 2229290631Savos int error = 0; 2230251538Srpaulo 2231251538Srpaulo ostate = vap->iv_state; 2232251538Srpaulo DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 2233251538Srpaulo ieee80211_state_name[nstate]); 2234251538Srpaulo 2235251538Srpaulo IEEE80211_UNLOCK(ic); 2236251538Srpaulo URTWN_LOCK(sc); 2237251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2238251538Srpaulo 2239251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2240251538Srpaulo /* Turn link LED off. */ 2241251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2242251538Srpaulo 2243251538Srpaulo /* Set media status to 'No Link'. */ 2244289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2245251538Srpaulo 2246251538Srpaulo /* Stop Rx of data frames. */ 2247251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2248251538Srpaulo 2249251538Srpaulo /* Disable TSF synchronization. */ 2250251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2251290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2252251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2253251538Srpaulo 2254290631Savos /* Disable beaconing. */ 2255290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2256290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2257290631Savos 2258290631Savos /* Reset TSF. */ 2259290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2260290631Savos 2261251538Srpaulo /* Reset EDCA parameters. */ 2262251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2263251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2264251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2265251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2266251538Srpaulo } 2267251538Srpaulo 2268251538Srpaulo switch (nstate) { 2269251538Srpaulo case IEEE80211_S_INIT: 2270251538Srpaulo /* Turn link LED off. */ 2271251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2272251538Srpaulo break; 2273251538Srpaulo case IEEE80211_S_SCAN: 2274251538Srpaulo /* Pause AC Tx queues. */ 2275251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2276251538Srpaulo urtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); 2277251538Srpaulo break; 2278251538Srpaulo case IEEE80211_S_AUTH: 2279251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2280251538Srpaulo break; 2281251538Srpaulo case IEEE80211_S_RUN: 2282251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2283251538Srpaulo /* Turn link LED on. */ 2284251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2285251538Srpaulo break; 2286251538Srpaulo } 2287251538Srpaulo 2288251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2289290631Savos 2290290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2291290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2292290631Savos device_printf(sc->sc_dev, 2293290631Savos "%s: could not move to RUN state\n", __func__); 2294290631Savos error = EINVAL; 2295290631Savos goto end_run; 2296290631Savos } 2297290631Savos 2298290631Savos switch (vap->iv_opmode) { 2299290631Savos case IEEE80211_M_STA: 2300290631Savos mode = R92C_MSR_INFRA; 2301290631Savos break; 2302290651Savos case IEEE80211_M_IBSS: 2303290651Savos mode = R92C_MSR_ADHOC; 2304290651Savos break; 2305290631Savos case IEEE80211_M_HOSTAP: 2306290631Savos mode = R92C_MSR_AP; 2307290631Savos break; 2308290631Savos default: 2309290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2310290631Savos vap->iv_opmode); 2311290631Savos error = EINVAL; 2312290631Savos goto end_run; 2313290631Savos } 2314290631Savos 2315251538Srpaulo /* Set media status to 'Associated'. */ 2316290631Savos urtwn_set_mode(sc, mode); 2317251538Srpaulo 2318251538Srpaulo /* Set BSSID. */ 2319251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 2320251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 2321251538Srpaulo 2322251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2323251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2324251538Srpaulo else /* 802.11b/g */ 2325251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2326251538Srpaulo 2327251538Srpaulo /* Enable Rx of data frames. */ 2328251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2329251538Srpaulo 2330251538Srpaulo /* Flush all AC queues. */ 2331251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2332251538Srpaulo 2333251538Srpaulo /* Set beacon interval. */ 2334251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2335251538Srpaulo 2336251538Srpaulo /* Allow Rx from our BSSID only. */ 2337290564Savos if (ic->ic_promisc == 0) { 2338290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2339290631Savos 2340290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2341290631Savos reg |= R92C_RCR_CBSSID_DATA; 2342290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2343290651Savos reg |= R92C_RCR_CBSSID_BCN; 2344290631Savos 2345290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2346290564Savos } 2347251538Srpaulo 2348290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2349290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2350290631Savos error = urtwn_setup_beacon(sc, ni); 2351290631Savos if (error != 0) { 2352290631Savos device_printf(sc->sc_dev, 2353290631Savos "unable to push beacon into the chip, " 2354290631Savos "error %d\n", error); 2355290631Savos goto end_run; 2356290631Savos } 2357290631Savos } 2358290631Savos 2359251538Srpaulo /* Enable TSF synchronization. */ 2360290631Savos urtwn_tsf_sync_enable(sc, vap); 2361251538Srpaulo 2362251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2363251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2364251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2365251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2366251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2367251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2368251538Srpaulo 2369251538Srpaulo /* Intialize rate adaptation. */ 2370292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2371264912Skevlo urtwn_ra_init(sc); 2372251538Srpaulo /* Turn link LED on. */ 2373251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2374251538Srpaulo 2375251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2376251538Srpaulo /* Reset temperature calibration state machine. */ 2377251538Srpaulo sc->thcal_state = 0; 2378251538Srpaulo sc->thcal_lctemp = 0; 2379290631Savos 2380290631Savosend_run: 2381251538Srpaulo ieee80211_free_node(ni); 2382251538Srpaulo break; 2383251538Srpaulo default: 2384251538Srpaulo break; 2385251538Srpaulo } 2386290631Savos 2387251538Srpaulo URTWN_UNLOCK(sc); 2388251538Srpaulo IEEE80211_LOCK(ic); 2389290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2390251538Srpaulo} 2391251538Srpaulo 2392251538Srpaulostatic void 2393251538Srpaulourtwn_watchdog(void *arg) 2394251538Srpaulo{ 2395251538Srpaulo struct urtwn_softc *sc = arg; 2396251538Srpaulo 2397251538Srpaulo if (sc->sc_txtimer > 0) { 2398251538Srpaulo if (--sc->sc_txtimer == 0) { 2399251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2400287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2401251538Srpaulo return; 2402251538Srpaulo } 2403251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2404251538Srpaulo } 2405251538Srpaulo} 2406251538Srpaulo 2407251538Srpaulostatic void 2408251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2409251538Srpaulo{ 2410251538Srpaulo int pwdb; 2411251538Srpaulo 2412251538Srpaulo /* Convert antenna signal to percentage. */ 2413251538Srpaulo if (rssi <= -100 || rssi >= 20) 2414251538Srpaulo pwdb = 0; 2415251538Srpaulo else if (rssi >= 0) 2416251538Srpaulo pwdb = 100; 2417251538Srpaulo else 2418251538Srpaulo pwdb = 100 + rssi; 2419264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2420289758Savos if (rate <= URTWN_RIDX_CCK11) { 2421264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2422264912Skevlo pwdb += 6; 2423264912Skevlo if (pwdb > 100) 2424264912Skevlo pwdb = 100; 2425264912Skevlo if (pwdb <= 14) 2426264912Skevlo pwdb -= 4; 2427264912Skevlo else if (pwdb <= 26) 2428264912Skevlo pwdb -= 8; 2429264912Skevlo else if (pwdb <= 34) 2430264912Skevlo pwdb -= 6; 2431264912Skevlo else if (pwdb <= 42) 2432264912Skevlo pwdb -= 2; 2433264912Skevlo } 2434251538Srpaulo } 2435251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2436251538Srpaulo sc->avg_pwdb = pwdb; 2437251538Srpaulo else if (sc->avg_pwdb < pwdb) 2438251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2439251538Srpaulo else 2440251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2441251538Srpaulo DPRINTFN(4, "PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb); 2442251538Srpaulo} 2443251538Srpaulo 2444251538Srpaulostatic int8_t 2445251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2446251538Srpaulo{ 2447251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2448251538Srpaulo struct r92c_rx_phystat *phy; 2449251538Srpaulo struct r92c_rx_cck *cck; 2450251538Srpaulo uint8_t rpt; 2451251538Srpaulo int8_t rssi; 2452251538Srpaulo 2453289758Savos if (rate <= URTWN_RIDX_CCK11) { 2454251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2455251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2456251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2457251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2458251538Srpaulo } else { 2459251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2460251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2461251538Srpaulo } 2462251538Srpaulo rssi = cckoff[rpt] - rssi; 2463251538Srpaulo } else { /* OFDM/HT. */ 2464251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2465251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2466251538Srpaulo } 2467251538Srpaulo return (rssi); 2468251538Srpaulo} 2469251538Srpaulo 2470264912Skevlostatic int8_t 2471264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2472264912Skevlo{ 2473264912Skevlo struct r92c_rx_phystat *phy; 2474264912Skevlo struct r88e_rx_cck *cck; 2475264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2476264912Skevlo int8_t rssi; 2477264912Skevlo 2478264972Skevlo rssi = 0; 2479289758Savos if (rate <= URTWN_RIDX_CCK11) { 2480264912Skevlo cck = (struct r88e_rx_cck *)physt; 2481264912Skevlo cck_agc_rpt = cck->agc_rpt; 2482264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2483281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2484264912Skevlo switch (lna_idx) { 2485264912Skevlo case 7: 2486264912Skevlo if (vga_idx <= 27) 2487264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2488264912Skevlo else 2489264912Skevlo rssi = -100; 2490264912Skevlo break; 2491264912Skevlo case 6: 2492264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2493264912Skevlo break; 2494264912Skevlo case 5: 2495264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2496264912Skevlo break; 2497264912Skevlo case 4: 2498264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2499264912Skevlo break; 2500264912Skevlo case 3: 2501264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2502264912Skevlo break; 2503264912Skevlo case 2: 2504264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2505264912Skevlo break; 2506264912Skevlo case 1: 2507264912Skevlo rssi = 8 - (2 * vga_idx); 2508264912Skevlo break; 2509264912Skevlo case 0: 2510264912Skevlo rssi = 14 - (2 * vga_idx); 2511264912Skevlo break; 2512264912Skevlo } 2513264912Skevlo rssi += 6; 2514264912Skevlo } else { /* OFDM/HT. */ 2515264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2516264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2517264912Skevlo } 2518264912Skevlo return (rssi); 2519264912Skevlo} 2520264912Skevlo 2521292167Savosstatic __inline uint8_t 2522292167Savosrate2ridx(uint8_t rate) 2523292167Savos{ 2524292167Savos switch (rate) { 2525292167Savos case 12: return 4; 2526292167Savos case 18: return 5; 2527292167Savos case 24: return 6; 2528292167Savos case 36: return 7; 2529292167Savos case 48: return 8; 2530292167Savos case 72: return 9; 2531292167Savos case 96: return 10; 2532292167Savos case 108: return 11; 2533292167Savos case 2: return 0; 2534292167Savos case 4: return 1; 2535292167Savos case 11: return 2; 2536292167Savos case 22: return 3; 2537292167Savos default: return 0; 2538292167Savos } 2539292167Savos} 2540292167Savos 2541251538Srpaulostatic int 2542290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2543290630Savos struct mbuf *m, struct urtwn_data *data) 2544251538Srpaulo{ 2545292167Savos const struct ieee80211_txparam *tp; 2546287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2547251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2548292167Savos struct ieee80211_key *k = NULL; 2549292167Savos struct ieee80211_channel *chan; 2550292167Savos struct ieee80211_frame *wh; 2551251538Srpaulo struct r92c_tx_desc *txd; 2552292167Savos uint8_t macid, raid, rate, ridx, subtype, type, tid, qsel; 2553292014Savos int hasqos, ismcast; 2554251538Srpaulo 2555251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2556251538Srpaulo 2557251538Srpaulo /* 2558251538Srpaulo * Software crypto. 2559251538Srpaulo */ 2560290630Savos wh = mtod(m, struct ieee80211_frame *); 2561264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2562290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2563292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2564290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2565264912Skevlo 2566292014Savos /* Select TX ring for this frame. */ 2567292014Savos if (hasqos) { 2568292014Savos tid = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2569292014Savos tid &= IEEE80211_QOS_TID; 2570292014Savos } else 2571292014Savos tid = 0; 2572292014Savos 2573292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2574292167Savos ni->ni_chan : ic->ic_curchan; 2575292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2576292167Savos 2577292167Savos /* Choose a TX rate index. */ 2578292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2579292167Savos rate = tp->mgmtrate; 2580292167Savos else if (ismcast) 2581292167Savos rate = tp->mcastrate; 2582292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2583292167Savos rate = tp->ucastrate; 2584292167Savos else if (m->m_flags & M_EAPOL) 2585292167Savos rate = tp->mgmtrate; 2586292167Savos else { 2587292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2588292167Savos /* XXX pass pktlen */ 2589292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2590292167Savos rate = ni->ni_txrate; 2591292167Savos } else { 2592292167Savos if (ic->ic_curmode != IEEE80211_MODE_11B) 2593292167Savos rate = 108; 2594292167Savos else 2595292167Savos rate = 22; 2596292167Savos } 2597292167Savos } 2598292167Savos 2599292167Savos ridx = rate2ridx(rate); 2600292167Savos if (ic->ic_curmode != IEEE80211_MODE_11B) 2601292167Savos raid = R92C_RAID_11BG; 2602292167Savos else 2603292167Savos raid = R92C_RAID_11B; 2604292167Savos 2605260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2606290630Savos k = ieee80211_crypto_encap(ni, m); 2607251538Srpaulo if (k == NULL) { 2608251538Srpaulo device_printf(sc->sc_dev, 2609251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2610251538Srpaulo return (ENOBUFS); 2611251538Srpaulo } 2612251538Srpaulo 2613251538Srpaulo /* in case packet header moved, reset pointer */ 2614290630Savos wh = mtod(m, struct ieee80211_frame *); 2615251538Srpaulo } 2616281069Srpaulo 2617251538Srpaulo /* Fill Tx descriptor. */ 2618251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2619251538Srpaulo memset(txd, 0, sizeof(*txd)); 2620251538Srpaulo 2621251538Srpaulo txd->txdw0 |= htole32( 2622251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2623251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2624290630Savos if (ismcast) 2625251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2626290630Savos 2627290630Savos if (!ismcast) { 2628292167Savos if (sc->chip & URTWN_CHIP_88E) { 2629292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2630292167Savos macid = un->id; 2631292167Savos } else 2632292167Savos macid = URTWN_MACID_BSS; 2633290630Savos 2634290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2635292014Savos qsel = tid % URTWN_MAX_TID; 2636290630Savos 2637292167Savos if (sc->chip & URTWN_CHIP_88E) { 2638292167Savos txd->txdw2 |= htole32( 2639292167Savos R88E_TXDW2_AGGBK | 2640292167Savos R88E_TXDW2_CCX_RPT); 2641292167Savos } else 2642290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2643290630Savos 2644290630Savos if (ic->ic_flags & IEEE80211_F_USEPROT) { 2645290630Savos switch (ic->ic_protmode) { 2646290630Savos case IEEE80211_PROT_CTSONLY: 2647290630Savos txd->txdw4 |= htole32( 2648290630Savos R92C_TXDW4_CTS2SELF | 2649290630Savos R92C_TXDW4_HWRTSEN); 2650290630Savos break; 2651290630Savos case IEEE80211_PROT_RTSCTS: 2652290630Savos txd->txdw4 |= htole32( 2653290630Savos R92C_TXDW4_RTSEN | 2654290630Savos R92C_TXDW4_HWRTSEN); 2655290630Savos break; 2656290630Savos default: 2657290630Savos break; 2658290630Savos } 2659290630Savos } 2660290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2661290630Savos URTWN_RIDX_OFDM24)); 2662290630Savos txd->txdw5 |= htole32(0x0001ff00); 2663290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2664290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2665251538Srpaulo } else { 2666290630Savos macid = URTWN_MACID_BC; 2667290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2668290630Savos } 2669251538Srpaulo 2670290630Savos txd->txdw1 |= htole32( 2671290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2672290630Savos SM(R92C_TXDW1_RAID, raid)); 2673290630Savos 2674290630Savos if (sc->chip & URTWN_CHIP_88E) 2675290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2676290630Savos else 2677290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2678290630Savos 2679290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2680291858Savos /* Force this rate if needed. */ 2681292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 2682292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 2683251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2684251538Srpaulo 2685292014Savos if (!hasqos) { 2686251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 2687291858Savos if (sc->chip & URTWN_CHIP_88E) 2688291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 2689291858Savos else 2690291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2691290630Savos } else { 2692290630Savos /* Set sequence number. */ 2693290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 2694290630Savos } 2695251538Srpaulo 2696292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2697292175Savos uint8_t cipher; 2698292175Savos 2699292175Savos switch (k->wk_cipher->ic_cipher) { 2700292175Savos case IEEE80211_CIPHER_WEP: 2701292175Savos case IEEE80211_CIPHER_TKIP: 2702292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 2703292175Savos break; 2704292175Savos case IEEE80211_CIPHER_AES_CCM: 2705292175Savos cipher = R92C_TXDW1_CIPHER_AES; 2706292175Savos break; 2707292175Savos default: 2708292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 2709292175Savos __func__, k->wk_cipher->ic_cipher); 2710292175Savos return (EINVAL); 2711292175Savos } 2712292175Savos 2713292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 2714292175Savos } 2715292175Savos 2716251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 2717251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2718251538Srpaulo 2719251538Srpaulo tap->wt_flags = 0; 2720290630Savos if (k != NULL) 2721290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2722290630Savos ieee80211_radiotap_tx(vap, m); 2723251538Srpaulo } 2724251538Srpaulo 2725290630Savos data->ni = ni; 2726251538Srpaulo 2727290630Savos urtwn_tx_start(sc, m, type, data); 2728290630Savos 2729290630Savos return (0); 2730290630Savos} 2731290630Savos 2732290630Savosstatic void 2733290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 2734290630Savos struct urtwn_data *data) 2735290630Savos{ 2736290630Savos struct usb_xfer *xfer; 2737290630Savos struct r92c_tx_desc *txd; 2738290630Savos uint16_t ac, sum; 2739290630Savos int i, xferlen; 2740290630Savos 2741290630Savos URTWN_ASSERT_LOCKED(sc); 2742290630Savos 2743290630Savos ac = M_WME_GETAC(m); 2744290630Savos 2745290630Savos switch (type) { 2746290630Savos case IEEE80211_FC0_TYPE_CTL: 2747290630Savos case IEEE80211_FC0_TYPE_MGT: 2748290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 2749290630Savos break; 2750290630Savos default: 2751292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 2752290630Savos break; 2753290630Savos } 2754290630Savos 2755290630Savos txd = (struct r92c_tx_desc *)data->buf; 2756290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 2757290630Savos 2758290630Savos /* Compute Tx descriptor checksum. */ 2759290630Savos sum = 0; 2760290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 2761290630Savos sum ^= ((uint16_t *)txd)[i]; 2762290630Savos txd->txdsum = sum; /* NB: already little endian. */ 2763290630Savos 2764290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 2765290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 2766290630Savos 2767251538Srpaulo data->buflen = xferlen; 2768290630Savos data->m = m; 2769251538Srpaulo 2770251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2771251538Srpaulo usbd_transfer_start(xfer); 2772251538Srpaulo} 2773251538Srpaulo 2774287197Sglebiusstatic int 2775287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 2776251538Srpaulo{ 2777287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 2778287197Sglebius int error; 2779261863Srpaulo 2780261863Srpaulo URTWN_LOCK(sc); 2781287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2782287197Sglebius URTWN_UNLOCK(sc); 2783287197Sglebius return (ENXIO); 2784287197Sglebius } 2785287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 2786287197Sglebius if (error) { 2787287197Sglebius URTWN_UNLOCK(sc); 2788287197Sglebius return (error); 2789287197Sglebius } 2790287197Sglebius urtwn_start(sc); 2791261863Srpaulo URTWN_UNLOCK(sc); 2792287197Sglebius 2793287197Sglebius return (0); 2794261863Srpaulo} 2795261863Srpaulo 2796261863Srpaulostatic void 2797287197Sglebiusurtwn_start(struct urtwn_softc *sc) 2798261863Srpaulo{ 2799251538Srpaulo struct ieee80211_node *ni; 2800251538Srpaulo struct mbuf *m; 2801251538Srpaulo struct urtwn_data *bf; 2802251538Srpaulo 2803261863Srpaulo URTWN_ASSERT_LOCKED(sc); 2804287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2805251538Srpaulo bf = urtwn_getbuf(sc); 2806251538Srpaulo if (bf == NULL) { 2807287197Sglebius mbufq_prepend(&sc->sc_snd, m); 2808251538Srpaulo break; 2809251538Srpaulo } 2810251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2811251538Srpaulo m->m_pkthdr.rcvif = NULL; 2812290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 2813287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 2814287197Sglebius IFCOUNTER_OERRORS, 1); 2815251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2816288353Sadrian m_freem(m); 2817251538Srpaulo ieee80211_free_node(ni); 2818251538Srpaulo break; 2819251538Srpaulo } 2820251538Srpaulo sc->sc_txtimer = 5; 2821251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2822251538Srpaulo } 2823251538Srpaulo} 2824251538Srpaulo 2825287197Sglebiusstatic void 2826287197Sglebiusurtwn_parent(struct ieee80211com *ic) 2827251538Srpaulo{ 2828286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2829251538Srpaulo 2830263153Skevlo URTWN_LOCK(sc); 2831287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 2832287197Sglebius URTWN_UNLOCK(sc); 2833287197Sglebius return; 2834287197Sglebius } 2835291698Savos URTWN_UNLOCK(sc); 2836291698Savos 2837287197Sglebius if (ic->ic_nrunning > 0) { 2838291698Savos if (urtwn_init(sc) != 0) { 2839291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2840291698Savos if (vap != NULL) 2841291698Savos ieee80211_stop(vap); 2842291698Savos } else 2843291698Savos ieee80211_start_all(ic); 2844291698Savos } else 2845287197Sglebius urtwn_stop(sc); 2846251538Srpaulo} 2847251538Srpaulo 2848264912Skevlostatic __inline int 2849251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 2850251538Srpaulo{ 2851264912Skevlo 2852264912Skevlo return sc->sc_power_on(sc); 2853264912Skevlo} 2854264912Skevlo 2855264912Skevlostatic int 2856264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 2857264912Skevlo{ 2858251538Srpaulo uint32_t reg; 2859291698Savos usb_error_t error; 2860251538Srpaulo int ntries; 2861251538Srpaulo 2862251538Srpaulo /* Wait for autoload done bit. */ 2863251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2864251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 2865251538Srpaulo break; 2866266472Shselasky urtwn_ms_delay(sc); 2867251538Srpaulo } 2868251538Srpaulo if (ntries == 1000) { 2869251538Srpaulo device_printf(sc->sc_dev, 2870251538Srpaulo "timeout waiting for chip autoload\n"); 2871251538Srpaulo return (ETIMEDOUT); 2872251538Srpaulo } 2873251538Srpaulo 2874251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 2875291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 2876291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2877291698Savos return (EIO); 2878251538Srpaulo /* Move SPS into PWM mode. */ 2879291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 2880291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2881291698Savos return (EIO); 2882266472Shselasky urtwn_ms_delay(sc); 2883251538Srpaulo 2884251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 2885251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 2886291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 2887251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 2888291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2889291698Savos return (EIO); 2890266472Shselasky urtwn_ms_delay(sc); 2891291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 2892251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 2893251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 2894291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2895291698Savos return (EIO); 2896251538Srpaulo } 2897251538Srpaulo 2898251538Srpaulo /* Auto enable WLAN. */ 2899291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2900251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2901291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2902291698Savos return (EIO); 2903251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2904262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2905262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2906251538Srpaulo break; 2907266472Shselasky urtwn_ms_delay(sc); 2908251538Srpaulo } 2909251538Srpaulo if (ntries == 1000) { 2910251538Srpaulo device_printf(sc->sc_dev, 2911251538Srpaulo "timeout waiting for MAC auto ON\n"); 2912251538Srpaulo return (ETIMEDOUT); 2913251538Srpaulo } 2914251538Srpaulo 2915251538Srpaulo /* Enable radio, GPIO and LED functions. */ 2916291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2917251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 2918251538Srpaulo R92C_APS_FSMCO_PDN_EN | 2919251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 2920291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2921291698Savos return (EIO); 2922251538Srpaulo /* Release RF digital isolation. */ 2923291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 2924251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 2925291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2926291698Savos return (EIO); 2927251538Srpaulo 2928251538Srpaulo /* Initialize MAC. */ 2929291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 2930251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 2931291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2932291698Savos return (EIO); 2933251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 2934251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 2935251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 2936251538Srpaulo break; 2937266472Shselasky urtwn_ms_delay(sc); 2938251538Srpaulo } 2939251538Srpaulo if (ntries == 200) { 2940251538Srpaulo device_printf(sc->sc_dev, 2941251538Srpaulo "timeout waiting for MAC initialization\n"); 2942251538Srpaulo return (ETIMEDOUT); 2943251538Srpaulo } 2944251538Srpaulo 2945251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2946251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 2947251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2948251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2949251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 2950251538Srpaulo R92C_CR_ENSEC; 2951291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 2952291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2953291698Savos return (EIO); 2954251538Srpaulo 2955291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 2956291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2957291698Savos return (EIO); 2958251538Srpaulo return (0); 2959251538Srpaulo} 2960251538Srpaulo 2961251538Srpaulostatic int 2962264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 2963264912Skevlo{ 2964264912Skevlo uint32_t reg; 2965291698Savos usb_error_t error; 2966264912Skevlo int ntries; 2967264912Skevlo 2968264912Skevlo /* Wait for power ready bit. */ 2969264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2970281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 2971264912Skevlo break; 2972266472Shselasky urtwn_ms_delay(sc); 2973264912Skevlo } 2974264912Skevlo if (ntries == 5000) { 2975264912Skevlo device_printf(sc->sc_dev, 2976264912Skevlo "timeout waiting for chip power up\n"); 2977264912Skevlo return (ETIMEDOUT); 2978264912Skevlo } 2979264912Skevlo 2980264912Skevlo /* Reset BB. */ 2981291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 2982264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 2983264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 2984291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2985291698Savos return (EIO); 2986264912Skevlo 2987291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 2988281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 2989291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2990291698Savos return (EIO); 2991264912Skevlo 2992264912Skevlo /* Disable HWPDN. */ 2993291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2994281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 2995291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2996291698Savos return (EIO); 2997264912Skevlo 2998264912Skevlo /* Disable WL suspend. */ 2999291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3000281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3001281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3002291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3003291698Savos return (EIO); 3004264912Skevlo 3005291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3006281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3007291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3008291698Savos return (EIO); 3009264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3010281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3011281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3012264912Skevlo break; 3013266472Shselasky urtwn_ms_delay(sc); 3014264912Skevlo } 3015264912Skevlo if (ntries == 5000) 3016264912Skevlo return (ETIMEDOUT); 3017264912Skevlo 3018264912Skevlo /* Enable LDO normal mode. */ 3019291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3020281918Skevlo urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~0x10); 3021291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3022291698Savos return (EIO); 3023264912Skevlo 3024264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3025291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3026291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3027291698Savos return (EIO); 3028264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3029264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3030264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3031264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3032291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3033291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3034291698Savos return (EIO); 3035264912Skevlo 3036264912Skevlo return (0); 3037264912Skevlo} 3038264912Skevlo 3039264912Skevlostatic int 3040251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3041251538Srpaulo{ 3042264912Skevlo int i, error, page_count, pktbuf_count; 3043251538Srpaulo 3044264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3045264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3046264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3047264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3048264912Skevlo 3049264912Skevlo /* Reserve pages [0; page_count]. */ 3050264912Skevlo for (i = 0; i < page_count; i++) { 3051251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3052251538Srpaulo return (error); 3053251538Srpaulo } 3054251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3055251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3056251538Srpaulo return (error); 3057251538Srpaulo /* 3058264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3059251538Srpaulo * as ring buffer. 3060251538Srpaulo */ 3061264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3062251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3063251538Srpaulo return (error); 3064251538Srpaulo } 3065251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3066264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3067251538Srpaulo return (error); 3068251538Srpaulo} 3069251538Srpaulo 3070251538Srpaulostatic void 3071251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3072251538Srpaulo{ 3073251538Srpaulo uint16_t reg; 3074251538Srpaulo int ntries; 3075251538Srpaulo 3076251538Srpaulo /* Tell 8051 to reset itself. */ 3077251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3078251538Srpaulo 3079251538Srpaulo /* Wait until 8051 resets by itself. */ 3080251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3081251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3082251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3083251538Srpaulo return; 3084266472Shselasky urtwn_ms_delay(sc); 3085251538Srpaulo } 3086251538Srpaulo /* Force 8051 reset. */ 3087251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3088251538Srpaulo} 3089251538Srpaulo 3090264912Skevlostatic void 3091264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3092264912Skevlo{ 3093264912Skevlo uint16_t reg; 3094264912Skevlo 3095264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3096264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3097264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3098264912Skevlo} 3099264912Skevlo 3100251538Srpaulostatic int 3101251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3102251538Srpaulo{ 3103251538Srpaulo uint32_t reg; 3104291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3105291698Savos int off, mlen; 3106251538Srpaulo 3107251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3108251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3109251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3110251538Srpaulo 3111251538Srpaulo off = R92C_FW_START_ADDR; 3112251538Srpaulo while (len > 0) { 3113251538Srpaulo if (len > 196) 3114251538Srpaulo mlen = 196; 3115251538Srpaulo else if (len > 4) 3116251538Srpaulo mlen = 4; 3117251538Srpaulo else 3118251538Srpaulo mlen = 1; 3119251538Srpaulo /* XXX fix this deconst */ 3120281069Srpaulo error = urtwn_write_region_1(sc, off, 3121251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3122291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3123251538Srpaulo break; 3124251538Srpaulo off += mlen; 3125251538Srpaulo buf += mlen; 3126251538Srpaulo len -= mlen; 3127251538Srpaulo } 3128251538Srpaulo return (error); 3129251538Srpaulo} 3130251538Srpaulo 3131251538Srpaulostatic int 3132251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3133251538Srpaulo{ 3134251538Srpaulo const struct firmware *fw; 3135251538Srpaulo const struct r92c_fw_hdr *hdr; 3136251538Srpaulo const char *imagename; 3137251538Srpaulo const u_char *ptr; 3138251538Srpaulo size_t len; 3139251538Srpaulo uint32_t reg; 3140251538Srpaulo int mlen, ntries, page, error; 3141251538Srpaulo 3142264864Skevlo URTWN_UNLOCK(sc); 3143251538Srpaulo /* Read firmware image from the filesystem. */ 3144264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3145264912Skevlo imagename = "urtwn-rtl8188eufw"; 3146264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3147264912Skevlo URTWN_CHIP_UMC_A_CUT) 3148251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3149251538Srpaulo else 3150251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3151251538Srpaulo 3152251538Srpaulo fw = firmware_get(imagename); 3153264864Skevlo URTWN_LOCK(sc); 3154251538Srpaulo if (fw == NULL) { 3155251538Srpaulo device_printf(sc->sc_dev, 3156251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3157251538Srpaulo return (ENOENT); 3158251538Srpaulo } 3159251538Srpaulo 3160251538Srpaulo len = fw->datasize; 3161251538Srpaulo 3162251538Srpaulo if (len < sizeof(*hdr)) { 3163251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3164251538Srpaulo error = EINVAL; 3165251538Srpaulo goto fail; 3166251538Srpaulo } 3167251538Srpaulo ptr = fw->data; 3168251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3169251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3170251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3171264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3172251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3173251538Srpaulo DPRINTF("FW V%d.%d %02d-%02d %02d:%02d\n", 3174251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3175251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3176251538Srpaulo ptr += sizeof(*hdr); 3177251538Srpaulo len -= sizeof(*hdr); 3178251538Srpaulo } 3179251538Srpaulo 3180264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3181264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3182264912Skevlo urtwn_r88e_fw_reset(sc); 3183264912Skevlo else 3184264912Skevlo urtwn_fw_reset(sc); 3185251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3186251538Srpaulo } 3187264912Skevlo 3188268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3189268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3190268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3191268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3192268487Skevlo } 3193251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3194251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3195251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3196251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3197251538Srpaulo 3198263154Skevlo /* Reset the FWDL checksum. */ 3199263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3200263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3201263154Skevlo 3202251538Srpaulo for (page = 0; len > 0; page++) { 3203251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3204251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3205251538Srpaulo if (error != 0) { 3206251538Srpaulo device_printf(sc->sc_dev, 3207251538Srpaulo "could not load firmware page\n"); 3208251538Srpaulo goto fail; 3209251538Srpaulo } 3210251538Srpaulo ptr += mlen; 3211251538Srpaulo len -= mlen; 3212251538Srpaulo } 3213251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3214251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3215251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3216251538Srpaulo 3217251538Srpaulo /* Wait for checksum report. */ 3218251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3219251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3220251538Srpaulo break; 3221266472Shselasky urtwn_ms_delay(sc); 3222251538Srpaulo } 3223251538Srpaulo if (ntries == 1000) { 3224251538Srpaulo device_printf(sc->sc_dev, 3225251538Srpaulo "timeout waiting for checksum report\n"); 3226251538Srpaulo error = ETIMEDOUT; 3227251538Srpaulo goto fail; 3228251538Srpaulo } 3229251538Srpaulo 3230251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3231251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3232251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3233264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3234264912Skevlo urtwn_r88e_fw_reset(sc); 3235251538Srpaulo /* Wait for firmware readiness. */ 3236251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3237251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3238251538Srpaulo break; 3239266472Shselasky urtwn_ms_delay(sc); 3240251538Srpaulo } 3241251538Srpaulo if (ntries == 1000) { 3242251538Srpaulo device_printf(sc->sc_dev, 3243251538Srpaulo "timeout waiting for firmware readiness\n"); 3244251538Srpaulo error = ETIMEDOUT; 3245251538Srpaulo goto fail; 3246251538Srpaulo } 3247251538Srpaulofail: 3248251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3249251538Srpaulo return (error); 3250251538Srpaulo} 3251251538Srpaulo 3252291902Skevlostatic int 3253251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3254251538Srpaulo{ 3255291902Skevlo struct usb_endpoint *ep, *ep_end; 3256291698Savos usb_error_t usb_err; 3257291902Skevlo uint32_t reg; 3258291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3259291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3260281069Srpaulo 3261291695Savos /* Initialize LLT table. */ 3262291695Savos error = urtwn_llt_init(sc); 3263291695Savos if (error != 0) 3264291695Savos return (error); 3265291695Savos 3266291902Skevlo /* Determine the number of bulk-out pipes. */ 3267291902Skevlo ntx = 0; 3268291902Skevlo ep = sc->sc_udev->endpoints; 3269291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3270291902Skevlo for (; ep != ep_end; ep++) { 3271291902Skevlo if ((ep->edesc == NULL) || 3272291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3273291902Skevlo continue; 3274291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3275291902Skevlo ntx++; 3276291902Skevlo } 3277291902Skevlo if (ntx == 0) { 3278291902Skevlo device_printf(sc->sc_dev, 3279291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3280291698Savos return (EIO); 3281291902Skevlo } 3282291695Savos 3283251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3284291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3285291902Skevlo switch (ntx) { 3286291902Skevlo case 1: hashq = 1; break; 3287291902Skevlo case 2: hashq = hasnq = 1; break; 3288291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3289291902Skevlo } 3290251538Srpaulo nqueues = hashq + hasnq + haslq; 3291251538Srpaulo if (nqueues == 0) 3292251538Srpaulo return (EIO); 3293251538Srpaulo 3294291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 3295291902Skevlo if (sc->chip & URTWN_CHIP_88E) 3296291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 3297291902Skevlo else { 3298291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 3299291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 3300291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 3301291902Skevlo } 3302291902Skevlo 3303251538Srpaulo /* Set number of pages for normal priority queue. */ 3304291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 3305291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 3306291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3307291902Skevlo return (EIO); 3308291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 3309291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3310291902Skevlo return (EIO); 3311291902Skevlo } else { 3312291902Skevlo /* Get the number of pages for each queue. */ 3313291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 3314291902Skevlo /* 3315291902Skevlo * The remaining pages are assigned to the high priority 3316291902Skevlo * queue. 3317291902Skevlo */ 3318291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 3319291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 3320291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3321291902Skevlo return (EIO); 3322291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 3323291902Skevlo /* Set number of pages for public queue. */ 3324291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 3325291902Skevlo /* Set number of pages for high priority queue. */ 3326291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 3327291902Skevlo /* Set number of pages for low priority queue. */ 3328291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 3329291902Skevlo /* Load values. */ 3330291902Skevlo R92C_RQPN_LD); 3331291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3332291902Skevlo return (EIO); 3333291902Skevlo } 3334251538Srpaulo 3335291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 3336291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3337291698Savos return (EIO); 3338291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 3339291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3340291698Savos return (EIO); 3341291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 3342291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3343291698Savos return (EIO); 3344291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 3345291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3346291698Savos return (EIO); 3347291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 3348291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3349291698Savos return (EIO); 3350251538Srpaulo 3351251538Srpaulo /* Set queue to USB pipe mapping. */ 3352251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 3353251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 3354251538Srpaulo if (nqueues == 1) { 3355251538Srpaulo if (hashq) 3356251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 3357251538Srpaulo else if (hasnq) 3358251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 3359251538Srpaulo else 3360251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 3361251538Srpaulo } else if (nqueues == 2) { 3362292056Skevlo /* 3363292056Skevlo * All 2-endpoints configs have high and normal 3364292056Skevlo * priority queues. 3365292056Skevlo */ 3366292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 3367251538Srpaulo } else 3368251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 3369291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 3370291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3371291698Savos return (EIO); 3372251538Srpaulo 3373251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 3374291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 3375291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 3376291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3377291698Savos return (EIO); 3378251538Srpaulo 3379291902Skevlo /* Set Tx/Rx transfer page size. */ 3380291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 3381291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 3382291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 3383291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3384264912Skevlo return (EIO); 3385264912Skevlo 3386264912Skevlo return (0); 3387264912Skevlo} 3388264912Skevlo 3389291698Savosstatic int 3390251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 3391251538Srpaulo{ 3392291698Savos usb_error_t error; 3393251538Srpaulo int i; 3394251538Srpaulo 3395251538Srpaulo /* Write MAC initialization values. */ 3396264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3397264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 3398291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 3399264912Skevlo rtl8188eu_mac[i].val); 3400291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3401291698Savos return (EIO); 3402264912Skevlo } 3403264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 3404264912Skevlo } else { 3405264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 3406291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 3407264912Skevlo rtl8192cu_mac[i].val); 3408291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3409291698Savos return (EIO); 3410264912Skevlo } 3411291698Savos 3412291698Savos return (0); 3413251538Srpaulo} 3414251538Srpaulo 3415251538Srpaulostatic void 3416251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 3417251538Srpaulo{ 3418251538Srpaulo const struct urtwn_bb_prog *prog; 3419251538Srpaulo uint32_t reg; 3420264912Skevlo uint8_t crystalcap; 3421251538Srpaulo int i; 3422251538Srpaulo 3423251538Srpaulo /* Enable BB and RF. */ 3424251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3425251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3426251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 3427251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 3428251538Srpaulo 3429264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 3430264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 3431251538Srpaulo 3432251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 3433251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 3434251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3435251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 3436251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 3437251538Srpaulo 3438264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3439264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 3440264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 3441264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 3442264912Skevlo } 3443251538Srpaulo 3444251538Srpaulo /* Select BB programming based on board type. */ 3445264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3446264912Skevlo prog = &rtl8188eu_bb_prog; 3447264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3448251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3449251538Srpaulo prog = &rtl8188ce_bb_prog; 3450251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3451251538Srpaulo prog = &rtl8188ru_bb_prog; 3452251538Srpaulo else 3453251538Srpaulo prog = &rtl8188cu_bb_prog; 3454251538Srpaulo } else { 3455251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3456251538Srpaulo prog = &rtl8192ce_bb_prog; 3457251538Srpaulo else 3458251538Srpaulo prog = &rtl8192cu_bb_prog; 3459251538Srpaulo } 3460251538Srpaulo /* Write BB initialization values. */ 3461251538Srpaulo for (i = 0; i < prog->count; i++) { 3462251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 3463266472Shselasky urtwn_ms_delay(sc); 3464251538Srpaulo } 3465251538Srpaulo 3466251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 3467251538Srpaulo /* 8192C 1T only configuration. */ 3468251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 3469251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 3470251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 3471251538Srpaulo 3472251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 3473251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 3474251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 3475251538Srpaulo 3476251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 3477251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 3478251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 3479251538Srpaulo 3480251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 3481251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 3482251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 3483251538Srpaulo 3484251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 3485251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 3486251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 3487251538Srpaulo 3488251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 3489251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3490251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 3491251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 3492251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3493251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 3494251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 3495251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3496251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 3497251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 3498251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3499251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 3500251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 3501251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3502251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 3503251538Srpaulo } 3504251538Srpaulo 3505251538Srpaulo /* Write AGC values. */ 3506251538Srpaulo for (i = 0; i < prog->agccount; i++) { 3507251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 3508251538Srpaulo prog->agcvals[i]); 3509266472Shselasky urtwn_ms_delay(sc); 3510251538Srpaulo } 3511251538Srpaulo 3512264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3513264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 3514266472Shselasky urtwn_ms_delay(sc); 3515264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 3516266472Shselasky urtwn_ms_delay(sc); 3517264912Skevlo 3518291264Savos crystalcap = sc->rom.r88e_rom[0xb9]; 3519264912Skevlo if (crystalcap == 0xff) 3520264912Skevlo crystalcap = 0x20; 3521264912Skevlo crystalcap &= 0x3f; 3522264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 3523264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 3524264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 3525264912Skevlo crystalcap | crystalcap << 6)); 3526264912Skevlo } else { 3527264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 3528264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 3529264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 3530264912Skevlo } 3531251538Srpaulo} 3532251538Srpaulo 3533289066Skevlostatic void 3534251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 3535251538Srpaulo{ 3536251538Srpaulo const struct urtwn_rf_prog *prog; 3537251538Srpaulo uint32_t reg, type; 3538251538Srpaulo int i, j, idx, off; 3539251538Srpaulo 3540251538Srpaulo /* Select RF programming based on board type. */ 3541264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3542264912Skevlo prog = rtl8188eu_rf_prog; 3543264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3544251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3545251538Srpaulo prog = rtl8188ce_rf_prog; 3546251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3547251538Srpaulo prog = rtl8188ru_rf_prog; 3548251538Srpaulo else 3549251538Srpaulo prog = rtl8188cu_rf_prog; 3550251538Srpaulo } else 3551251538Srpaulo prog = rtl8192ce_rf_prog; 3552251538Srpaulo 3553251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3554251538Srpaulo /* Save RF_ENV control type. */ 3555251538Srpaulo idx = i / 2; 3556251538Srpaulo off = (i % 2) * 16; 3557251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3558251538Srpaulo type = (reg >> off) & 0x10; 3559251538Srpaulo 3560251538Srpaulo /* Set RF_ENV enable. */ 3561251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3562251538Srpaulo reg |= 0x100000; 3563251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3564266472Shselasky urtwn_ms_delay(sc); 3565251538Srpaulo /* Set RF_ENV output high. */ 3566251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3567251538Srpaulo reg |= 0x10; 3568251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3569266472Shselasky urtwn_ms_delay(sc); 3570251538Srpaulo /* Set address and data lengths of RF registers. */ 3571251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3572251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 3573251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3574266472Shselasky urtwn_ms_delay(sc); 3575251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3576251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 3577251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3578266472Shselasky urtwn_ms_delay(sc); 3579251538Srpaulo 3580251538Srpaulo /* Write RF initialization values for this chain. */ 3581251538Srpaulo for (j = 0; j < prog[i].count; j++) { 3582251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 3583251538Srpaulo prog[i].regs[j] <= 0xfe) { 3584251538Srpaulo /* 3585251538Srpaulo * These are fake RF registers offsets that 3586251538Srpaulo * indicate a delay is required. 3587251538Srpaulo */ 3588266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 3589251538Srpaulo continue; 3590251538Srpaulo } 3591251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 3592251538Srpaulo prog[i].vals[j]); 3593266472Shselasky urtwn_ms_delay(sc); 3594251538Srpaulo } 3595251538Srpaulo 3596251538Srpaulo /* Restore RF_ENV control type. */ 3597251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3598251538Srpaulo reg &= ~(0x10 << off) | (type << off); 3599251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 3600251538Srpaulo 3601251538Srpaulo /* Cache RF register CHNLBW. */ 3602251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 3603251538Srpaulo } 3604251538Srpaulo 3605251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3606251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 3607251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 3608251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 3609251538Srpaulo } 3610251538Srpaulo} 3611251538Srpaulo 3612251538Srpaulostatic void 3613251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 3614251538Srpaulo{ 3615251538Srpaulo /* Invalidate all CAM entries. */ 3616251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 3617251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 3618251538Srpaulo} 3619251538Srpaulo 3620292175Savosstatic int 3621292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 3622292175Savos{ 3623292175Savos usb_error_t error; 3624292175Savos 3625292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 3626292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 3627292175Savos return (EIO); 3628292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 3629292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 3630292175Savos SM(R92C_CAMCMD_ADDR, addr)); 3631292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 3632292175Savos return (EIO); 3633292175Savos 3634292175Savos return (0); 3635292175Savos} 3636292175Savos 3637251538Srpaulostatic void 3638251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 3639251538Srpaulo{ 3640251538Srpaulo uint8_t reg; 3641251538Srpaulo int i; 3642251538Srpaulo 3643251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3644251538Srpaulo if (sc->pa_setting & (1 << i)) 3645251538Srpaulo continue; 3646251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 3647251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 3648251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 3649251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 3650251538Srpaulo } 3651251538Srpaulo if (!(sc->pa_setting & 0x10)) { 3652251538Srpaulo reg = urtwn_read_1(sc, 0x16); 3653251538Srpaulo reg = (reg & ~0xf0) | 0x90; 3654251538Srpaulo urtwn_write_1(sc, 0x16, reg); 3655251538Srpaulo } 3656251538Srpaulo} 3657251538Srpaulo 3658251538Srpaulostatic void 3659251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 3660251538Srpaulo{ 3661290564Savos struct ieee80211com *ic = &sc->sc_ic; 3662290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3663290564Savos uint32_t rcr; 3664290564Savos uint16_t filter; 3665290564Savos 3666290564Savos URTWN_ASSERT_LOCKED(sc); 3667290564Savos 3668251538Srpaulo /* Accept all multicast frames. */ 3669251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 3670251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 3671290564Savos 3672290564Savos /* Filter for management frames. */ 3673290564Savos filter = 0x7f3f; 3674290631Savos switch (vap->iv_opmode) { 3675290631Savos case IEEE80211_M_STA: 3676290564Savos filter &= ~( 3677290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 3678290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 3679290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 3680290631Savos break; 3681290631Savos case IEEE80211_M_HOSTAP: 3682290631Savos filter &= ~( 3683290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 3684290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP) | 3685290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_BEACON)); 3686290631Savos break; 3687290631Savos case IEEE80211_M_MONITOR: 3688290651Savos case IEEE80211_M_IBSS: 3689290631Savos break; 3690290631Savos default: 3691290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3692290631Savos __func__, vap->iv_opmode); 3693290631Savos break; 3694290564Savos } 3695290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 3696290564Savos 3697251538Srpaulo /* Reject all control frames. */ 3698251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 3699290564Savos 3700290564Savos /* Reject all data frames. */ 3701290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 3702290564Savos 3703290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 3704290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 3705290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 3706290564Savos 3707290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 3708290564Savos /* Accept all frames. */ 3709290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 3710290564Savos R92C_RCR_AAP; 3711290564Savos } 3712290564Savos 3713290564Savos /* Set Rx filter. */ 3714290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3715290564Savos 3716290564Savos if (ic->ic_promisc != 0) { 3717290564Savos /* Update Rx filter. */ 3718290564Savos urtwn_set_promisc(sc); 3719290564Savos } 3720251538Srpaulo} 3721251538Srpaulo 3722251538Srpaulostatic void 3723251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 3724251538Srpaulo{ 3725251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 3726251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 3727251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 3728251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 3729251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 3730251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 3731251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 3732251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 3733251538Srpaulo} 3734251538Srpaulo 3735289066Skevlostatic void 3736251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 3737251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3738251538Srpaulo{ 3739251538Srpaulo uint32_t reg; 3740251538Srpaulo 3741251538Srpaulo /* Write per-CCK rate Tx power. */ 3742251538Srpaulo if (chain == 0) { 3743251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 3744251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 3745251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 3746251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3747251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 3748251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 3749251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 3750251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3751251538Srpaulo } else { 3752251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 3753251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 3754251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 3755251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 3756251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 3757251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3758251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 3759251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3760251538Srpaulo } 3761251538Srpaulo /* Write per-OFDM rate Tx power. */ 3762251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 3763251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 3764251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 3765251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 3766251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 3767251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 3768251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 3769251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 3770251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 3771251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 3772251538Srpaulo /* Write per-MCS Tx power. */ 3773251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 3774251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 3775251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 3776251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 3777251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 3778251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 3779251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 3780251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 3781251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 3782251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 3783251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 3784251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 3785261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 3786251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 3787251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 3788251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 3789251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 3790251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 3791251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 3792251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 3793251538Srpaulo} 3794251538Srpaulo 3795289066Skevlostatic void 3796251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 3797251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3798251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3799251538Srpaulo{ 3800287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3801291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 3802251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 3803251538Srpaulo const struct urtwn_txpwr *base; 3804251538Srpaulo int ridx, chan, group; 3805251538Srpaulo 3806251538Srpaulo /* Determine channel group. */ 3807251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3808251538Srpaulo if (chan <= 3) 3809251538Srpaulo group = 0; 3810251538Srpaulo else if (chan <= 9) 3811251538Srpaulo group = 1; 3812251538Srpaulo else 3813251538Srpaulo group = 2; 3814251538Srpaulo 3815251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 3816251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 3817251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3818251538Srpaulo base = &rtl8188ru_txagc[chain]; 3819251538Srpaulo else 3820251538Srpaulo base = &rtl8192cu_txagc[chain]; 3821251538Srpaulo } else 3822251538Srpaulo base = &rtl8192cu_txagc[chain]; 3823251538Srpaulo 3824251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3825251538Srpaulo if (sc->regulatory == 0) { 3826289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3827251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3828251538Srpaulo } 3829289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3830251538Srpaulo if (sc->regulatory == 3) { 3831251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3832251538Srpaulo /* Apply vendor limits. */ 3833251538Srpaulo if (extc != NULL) 3834251538Srpaulo max = rom->ht40_max_pwr[group]; 3835251538Srpaulo else 3836251538Srpaulo max = rom->ht20_max_pwr[group]; 3837251538Srpaulo max = (max >> (chain * 4)) & 0xf; 3838251538Srpaulo if (power[ridx] > max) 3839251538Srpaulo power[ridx] = max; 3840251538Srpaulo } else if (sc->regulatory == 1) { 3841251538Srpaulo if (extc == NULL) 3842251538Srpaulo power[ridx] = base->pwr[group][ridx]; 3843251538Srpaulo } else if (sc->regulatory != 2) 3844251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3845251538Srpaulo } 3846251538Srpaulo 3847251538Srpaulo /* Compute per-CCK rate Tx power. */ 3848251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 3849289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3850251538Srpaulo power[ridx] += cckpow; 3851251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3852251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3853251538Srpaulo } 3854251538Srpaulo 3855251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 3856251538Srpaulo if (sc->ntxchains > 1) { 3857251538Srpaulo /* Apply reduction for 2 spatial streams. */ 3858251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 3859251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3860251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 3861251538Srpaulo } 3862251538Srpaulo 3863251538Srpaulo /* Compute per-OFDM rate Tx power. */ 3864251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 3865251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3866251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 3867289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3868251538Srpaulo power[ridx] += ofdmpow; 3869251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3870251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3871251538Srpaulo } 3872251538Srpaulo 3873251538Srpaulo /* Compute per-MCS Tx power. */ 3874251538Srpaulo if (extc == NULL) { 3875251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 3876251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3877251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 3878251538Srpaulo } 3879251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 3880251538Srpaulo power[ridx] += htpow; 3881251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3882251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3883251538Srpaulo } 3884251538Srpaulo#ifdef URTWN_DEBUG 3885251538Srpaulo if (urtwn_debug >= 4) { 3886251538Srpaulo /* Dump per-rate Tx power values. */ 3887251538Srpaulo printf("Tx power for chain %d:\n", chain); 3888289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 3889251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 3890251538Srpaulo } 3891251538Srpaulo#endif 3892251538Srpaulo} 3893251538Srpaulo 3894289066Skevlostatic void 3895264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 3896264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3897264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 3898264912Skevlo{ 3899287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3900264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 3901264912Skevlo const struct urtwn_r88e_txpwr *base; 3902264912Skevlo int ridx, chan, group; 3903264912Skevlo 3904264912Skevlo /* Determine channel group. */ 3905264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3906264912Skevlo if (chan <= 2) 3907264912Skevlo group = 0; 3908264912Skevlo else if (chan <= 5) 3909264912Skevlo group = 1; 3910264912Skevlo else if (chan <= 8) 3911264912Skevlo group = 2; 3912264912Skevlo else if (chan <= 11) 3913264912Skevlo group = 3; 3914264912Skevlo else if (chan <= 13) 3915264912Skevlo group = 4; 3916264912Skevlo else 3917264912Skevlo group = 5; 3918264912Skevlo 3919264912Skevlo /* Get original Tx power based on board type and RF chain. */ 3920264912Skevlo base = &rtl8188eu_txagc[chain]; 3921264912Skevlo 3922264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3923264912Skevlo if (sc->regulatory == 0) { 3924289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3925264912Skevlo power[ridx] = base->pwr[0][ridx]; 3926264912Skevlo } 3927289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3928264912Skevlo if (sc->regulatory == 3) 3929264912Skevlo power[ridx] = base->pwr[0][ridx]; 3930264912Skevlo else if (sc->regulatory == 1) { 3931264912Skevlo if (extc == NULL) 3932264912Skevlo power[ridx] = base->pwr[group][ridx]; 3933264912Skevlo } else if (sc->regulatory != 2) 3934264912Skevlo power[ridx] = base->pwr[0][ridx]; 3935264912Skevlo } 3936264912Skevlo 3937264912Skevlo /* Compute per-CCK rate Tx power. */ 3938264912Skevlo cckpow = sc->cck_tx_pwr[group]; 3939289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3940264912Skevlo power[ridx] += cckpow; 3941264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3942264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3943264912Skevlo } 3944264912Skevlo 3945264912Skevlo htpow = sc->ht40_tx_pwr[group]; 3946264912Skevlo 3947264912Skevlo /* Compute per-OFDM rate Tx power. */ 3948264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 3949289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3950264912Skevlo power[ridx] += ofdmpow; 3951264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3952264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3953264912Skevlo } 3954264912Skevlo 3955264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 3956264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 3957264912Skevlo power[ridx] += bw20pow; 3958264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3959264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3960264912Skevlo } 3961264912Skevlo} 3962264912Skevlo 3963289066Skevlostatic void 3964251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 3965251538Srpaulo struct ieee80211_channel *extc) 3966251538Srpaulo{ 3967251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 3968251538Srpaulo int i; 3969251538Srpaulo 3970251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 3971251538Srpaulo /* Compute per-rate Tx power values. */ 3972264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3973264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 3974264912Skevlo else 3975264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 3976251538Srpaulo /* Write per-rate Tx power values to hardware. */ 3977251538Srpaulo urtwn_write_txpower(sc, i, power); 3978251538Srpaulo } 3979251538Srpaulo} 3980251538Srpaulo 3981251538Srpaulostatic void 3982290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 3983290048Savos{ 3984290048Savos uint32_t reg; 3985290048Savos 3986290048Savos reg = urtwn_read_4(sc, R92C_RCR); 3987290048Savos if (enable) 3988290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 3989290048Savos else 3990290048Savos reg |= R92C_RCR_CBSSID_BCN; 3991290048Savos urtwn_write_4(sc, R92C_RCR, reg); 3992290048Savos} 3993290048Savos 3994290048Savosstatic void 3995290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 3996290048Savos{ 3997290048Savos uint32_t reg; 3998290048Savos 3999290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4000290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4001290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4002290048Savos 4003290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4004290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4005290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4006290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4007290048Savos } 4008290048Savos} 4009290048Savos 4010290048Savosstatic void 4011251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4012251538Srpaulo{ 4013290048Savos struct urtwn_softc *sc = ic->ic_softc; 4014290048Savos 4015290048Savos URTWN_LOCK(sc); 4016290048Savos /* Receive beacons / probe responses from any BSSID. */ 4017290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 4018290651Savos urtwn_set_rx_bssid_all(sc, 1); 4019290651Savos 4020290048Savos /* Set gain for scanning. */ 4021290048Savos urtwn_set_gain(sc, 0x20); 4022290048Savos URTWN_UNLOCK(sc); 4023251538Srpaulo} 4024251538Srpaulo 4025251538Srpaulostatic void 4026251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4027251538Srpaulo{ 4028290048Savos struct urtwn_softc *sc = ic->ic_softc; 4029290048Savos 4030290048Savos URTWN_LOCK(sc); 4031290048Savos /* Restore limitations. */ 4032290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 4033290564Savos urtwn_set_rx_bssid_all(sc, 0); 4034290651Savos 4035290048Savos /* Set gain under link. */ 4036290048Savos urtwn_set_gain(sc, 0x32); 4037290048Savos URTWN_UNLOCK(sc); 4038251538Srpaulo} 4039251538Srpaulo 4040251538Srpaulostatic void 4041251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4042251538Srpaulo{ 4043286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4044292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4045281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4046251538Srpaulo 4047251538Srpaulo URTWN_LOCK(sc); 4048281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4049281070Srpaulo /* Make link LED blink during scan. */ 4050281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4051281070Srpaulo } 4052292173Savos urtwn_set_chan(sc, c, NULL); 4053292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4054292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4055292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4056292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4057251538Srpaulo URTWN_UNLOCK(sc); 4058251538Srpaulo} 4059251538Srpaulo 4060292014Savosstatic int 4061292014Savosurtwn_wme_update(struct ieee80211com *ic) 4062292014Savos{ 4063292014Savos const struct wmeParams *wmep = 4064292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4065292014Savos struct urtwn_softc *sc = ic->ic_softc; 4066292014Savos uint8_t aifs, acm, slottime; 4067292014Savos int ac; 4068292014Savos 4069292014Savos acm = 0; 4070292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4071292014Savos 4072292014Savos URTWN_LOCK(sc); 4073292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4074292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4075292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4076292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4077292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4078292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4079292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4080292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4081292014Savos if (ac != WME_AC_BE) 4082292014Savos acm |= wmep[ac].wmep_acm << ac; 4083292014Savos } 4084292014Savos 4085292014Savos if (acm != 0) 4086292014Savos acm |= R92C_ACMHWCTRL_EN; 4087292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4088292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4089292014Savos acm); 4090292014Savos 4091292014Savos URTWN_UNLOCK(sc); 4092292014Savos 4093292014Savos return 0; 4094292014Savos} 4095292014Savos 4096251538Srpaulostatic void 4097290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4098290564Savos{ 4099290564Savos struct ieee80211com *ic = &sc->sc_ic; 4100290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4101290564Savos uint32_t rcr, mask1, mask2; 4102290564Savos 4103290564Savos URTWN_ASSERT_LOCKED(sc); 4104290564Savos 4105290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4106290564Savos return; 4107290564Savos 4108290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4109290564Savos mask2 = R92C_RCR_APM; 4110290564Savos 4111290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4112290564Savos switch (vap->iv_opmode) { 4113290564Savos case IEEE80211_M_STA: 4114290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 4115290631Savos /* FALLTHROUGH */ 4116290631Savos case IEEE80211_M_HOSTAP: 4117290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 4118290564Savos break; 4119290651Savos case IEEE80211_M_IBSS: 4120290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4121290651Savos break; 4122290564Savos default: 4123290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4124290564Savos __func__, vap->iv_opmode); 4125290564Savos return; 4126290564Savos } 4127290564Savos } 4128290564Savos 4129290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4130290564Savos if (ic->ic_promisc == 0) 4131290564Savos rcr = (rcr & ~mask1) | mask2; 4132290564Savos else 4133290564Savos rcr = (rcr & ~mask2) | mask1; 4134290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4135290564Savos} 4136290564Savos 4137290564Savosstatic void 4138290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4139290564Savos{ 4140290564Savos struct urtwn_softc *sc = ic->ic_softc; 4141290564Savos 4142290564Savos URTWN_LOCK(sc); 4143290564Savos if (sc->sc_flags & URTWN_RUNNING) 4144290564Savos urtwn_set_promisc(sc); 4145290564Savos URTWN_UNLOCK(sc); 4146290564Savos} 4147290564Savos 4148290564Savosstatic void 4149283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 4150251538Srpaulo{ 4151251538Srpaulo /* XXX do nothing? */ 4152251538Srpaulo} 4153251538Srpaulo 4154292167Savosstatic struct ieee80211_node * 4155292167Savosurtwn_r88e_node_alloc(struct ieee80211vap *vap, 4156292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 4157292167Savos{ 4158292167Savos struct urtwn_node *un; 4159292167Savos 4160292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 4161292167Savos M_NOWAIT | M_ZERO); 4162292167Savos 4163292167Savos if (un == NULL) 4164292167Savos return NULL; 4165292167Savos 4166292167Savos un->id = URTWN_MACID_UNDEFINED; 4167292167Savos 4168292167Savos return &un->ni; 4169292167Savos} 4170292167Savos 4171251538Srpaulostatic void 4172292167Savosurtwn_r88e_newassoc(struct ieee80211_node *ni, int isnew) 4173292167Savos{ 4174292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4175292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4176292167Savos uint8_t id; 4177292167Savos 4178292167Savos if (!isnew) 4179292167Savos return; 4180292167Savos 4181292167Savos URTWN_NT_LOCK(sc); 4182292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 4183292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 4184292167Savos un->id = id; 4185292167Savos sc->node_list[id] = ni; 4186292167Savos break; 4187292167Savos } 4188292167Savos } 4189292167Savos URTWN_NT_UNLOCK(sc); 4190292167Savos 4191292167Savos if (id > URTWN_MACID_MAX(sc)) { 4192292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 4193292167Savos __func__); 4194292167Savos } 4195292167Savos} 4196292167Savos 4197292167Savosstatic void 4198292167Savosurtwn_r88e_node_free(struct ieee80211_node *ni) 4199292167Savos{ 4200292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4201292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4202292167Savos 4203292167Savos URTWN_NT_LOCK(sc); 4204292167Savos if (un->id != URTWN_MACID_UNDEFINED) 4205292167Savos sc->node_list[un->id] = NULL; 4206292167Savos URTWN_NT_UNLOCK(sc); 4207292167Savos 4208292167Savos sc->sc_node_free(ni); 4209292167Savos} 4210292167Savos 4211292167Savosstatic void 4212251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 4213251538Srpaulo struct ieee80211_channel *extc) 4214251538Srpaulo{ 4215287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4216251538Srpaulo uint32_t reg; 4217251538Srpaulo u_int chan; 4218251538Srpaulo int i; 4219251538Srpaulo 4220251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4221251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 4222251538Srpaulo device_printf(sc->sc_dev, 4223251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 4224251538Srpaulo return; 4225251538Srpaulo } 4226251538Srpaulo 4227251538Srpaulo /* Set Tx power for this new channel. */ 4228251538Srpaulo urtwn_set_txpower(sc, c, extc); 4229251538Srpaulo 4230251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4231251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 4232251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 4233251538Srpaulo } 4234251538Srpaulo#ifndef IEEE80211_NO_HT 4235251538Srpaulo if (extc != NULL) { 4236251538Srpaulo /* Is secondary channel below or above primary? */ 4237251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 4238251538Srpaulo 4239251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4240251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 4241251538Srpaulo 4242251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 4243251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 4244251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 4245251538Srpaulo 4246251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4247251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 4248251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4249251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 4250251538Srpaulo 4251251538Srpaulo /* Set CCK side band. */ 4252251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 4253251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 4254251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 4255251538Srpaulo 4256251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 4257251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 4258251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 4259251538Srpaulo 4260251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4261251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 4262251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 4263251538Srpaulo 4264251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 4265251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 4266251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 4267251538Srpaulo 4268251538Srpaulo /* Select 40MHz bandwidth. */ 4269251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4270251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 4271251538Srpaulo } else 4272251538Srpaulo#endif 4273251538Srpaulo { 4274251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4275251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 4276251538Srpaulo 4277251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4278251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 4279251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4280251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 4281251538Srpaulo 4282264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4283264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4284264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 4285264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 4286264912Skevlo } 4287281069Srpaulo 4288251538Srpaulo /* Select 20MHz bandwidth. */ 4289251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4290281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 4291264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 4292264912Skevlo R92C_RF_CHNLBW_BW20)); 4293251538Srpaulo } 4294251538Srpaulo} 4295251538Srpaulo 4296251538Srpaulostatic void 4297251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 4298251538Srpaulo{ 4299251538Srpaulo /* TODO */ 4300251538Srpaulo} 4301251538Srpaulo 4302251538Srpaulostatic void 4303251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 4304251538Srpaulo{ 4305251538Srpaulo uint32_t rf_ac[2]; 4306251538Srpaulo uint8_t txmode; 4307251538Srpaulo int i; 4308251538Srpaulo 4309251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 4310251538Srpaulo if ((txmode & 0x70) != 0) { 4311251538Srpaulo /* Disable all continuous Tx. */ 4312251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 4313251538Srpaulo 4314251538Srpaulo /* Set RF mode to standby mode. */ 4315251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4316251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 4317251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 4318251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 4319251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 4320251538Srpaulo } 4321251538Srpaulo } else { 4322251538Srpaulo /* Block all Tx queues. */ 4323251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0xff); 4324251538Srpaulo } 4325251538Srpaulo /* Start calibration. */ 4326251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4327251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 4328251538Srpaulo 4329251538Srpaulo /* Give calibration the time to complete. */ 4330266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 4331251538Srpaulo 4332251538Srpaulo /* Restore configuration. */ 4333251538Srpaulo if ((txmode & 0x70) != 0) { 4334251538Srpaulo /* Restore Tx mode. */ 4335251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 4336251538Srpaulo /* Restore RF mode. */ 4337251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 4338251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 4339251538Srpaulo } else { 4340251538Srpaulo /* Unblock all Tx queues. */ 4341251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 4342251538Srpaulo } 4343251538Srpaulo} 4344251538Srpaulo 4345291698Savosstatic int 4346287197Sglebiusurtwn_init(struct urtwn_softc *sc) 4347251538Srpaulo{ 4348287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4349287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4350287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 4351251538Srpaulo uint32_t reg; 4352291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 4353251538Srpaulo int error; 4354251538Srpaulo 4355291698Savos URTWN_LOCK(sc); 4356291698Savos if (sc->sc_flags & URTWN_RUNNING) { 4357291698Savos URTWN_UNLOCK(sc); 4358291698Savos return (0); 4359291698Savos } 4360264864Skevlo 4361251538Srpaulo /* Init firmware commands ring. */ 4362251538Srpaulo sc->fwcur = 0; 4363251538Srpaulo 4364251538Srpaulo /* Allocate Tx/Rx buffers. */ 4365251538Srpaulo error = urtwn_alloc_rx_list(sc); 4366251538Srpaulo if (error != 0) 4367251538Srpaulo goto fail; 4368281069Srpaulo 4369251538Srpaulo error = urtwn_alloc_tx_list(sc); 4370251538Srpaulo if (error != 0) 4371251538Srpaulo goto fail; 4372251538Srpaulo 4373251538Srpaulo /* Power on adapter. */ 4374251538Srpaulo error = urtwn_power_on(sc); 4375251538Srpaulo if (error != 0) 4376251538Srpaulo goto fail; 4377251538Srpaulo 4378251538Srpaulo /* Initialize DMA. */ 4379251538Srpaulo error = urtwn_dma_init(sc); 4380251538Srpaulo if (error != 0) 4381251538Srpaulo goto fail; 4382251538Srpaulo 4383251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 4384251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 4385251538Srpaulo 4386251538Srpaulo /* Init interrupts. */ 4387264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4388291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 4389291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4390291698Savos goto fail; 4391291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 4392264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 4393291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4394291698Savos goto fail; 4395291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 4396264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 4397291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4398291698Savos goto fail; 4399291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 4400264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 4401264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 4402291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4403291698Savos goto fail; 4404264912Skevlo } else { 4405291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 4406291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4407291698Savos goto fail; 4408291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 4409291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4410291698Savos goto fail; 4411264912Skevlo } 4412251538Srpaulo 4413251538Srpaulo /* Set MAC address. */ 4414287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 4415291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 4416291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4417291698Savos goto fail; 4418251538Srpaulo 4419251538Srpaulo /* Set initial network type. */ 4420289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 4421251538Srpaulo 4422290564Savos /* Initialize Rx filter. */ 4423251538Srpaulo urtwn_rxfilter_init(sc); 4424251538Srpaulo 4425282623Skevlo /* Set response rate. */ 4426251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 4427251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 4428251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 4429251538Srpaulo 4430251538Srpaulo /* Set short/long retry limits. */ 4431251538Srpaulo urtwn_write_2(sc, R92C_RL, 4432251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 4433251538Srpaulo 4434251538Srpaulo /* Initialize EDCA parameters. */ 4435251538Srpaulo urtwn_edca_init(sc); 4436251538Srpaulo 4437251538Srpaulo /* Setup rate fallback. */ 4438264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4439264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 4440264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 4441264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 4442264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 4443264912Skevlo } 4444251538Srpaulo 4445251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 4446251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 4447251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 4448251538Srpaulo /* Set ACK timeout. */ 4449251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 4450251538Srpaulo 4451251538Srpaulo /* Setup USB aggregation. */ 4452251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 4453251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 4454251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 4455251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 4456251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 4457251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 4458251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 4459264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4460264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 4461282266Skevlo else { 4462264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 4463282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 4464282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 4465282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 4466282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 4467282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 4468282266Skevlo } 4469251538Srpaulo 4470251538Srpaulo /* Initialize beacon parameters. */ 4471264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 4472251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 4473251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 4474251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 4475251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 4476251538Srpaulo 4477264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4478264912Skevlo /* Setup AMPDU aggregation. */ 4479264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 4480264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 4481264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 4482251538Srpaulo 4483264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 4484264912Skevlo } 4485251538Srpaulo 4486251538Srpaulo /* Load 8051 microcode. */ 4487251538Srpaulo error = urtwn_load_firmware(sc); 4488251538Srpaulo if (error != 0) 4489251538Srpaulo goto fail; 4490251538Srpaulo 4491251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 4492291698Savos error = urtwn_mac_init(sc); 4493291698Savos if (error != 0) { 4494291698Savos device_printf(sc->sc_dev, 4495291698Savos "%s: error while initializing MAC block\n", __func__); 4496291698Savos goto fail; 4497291698Savos } 4498251538Srpaulo urtwn_bb_init(sc); 4499251538Srpaulo urtwn_rf_init(sc); 4500251538Srpaulo 4501290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 4502290564Savos urtwn_rxfilter_init(sc); 4503290564Savos 4504264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4505264912Skevlo urtwn_write_2(sc, R92C_CR, 4506264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 4507264912Skevlo R92C_CR_MACRXEN); 4508264912Skevlo } 4509264912Skevlo 4510251538Srpaulo /* Turn CCK and OFDM blocks on. */ 4511251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4512251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 4513291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4514291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4515291698Savos goto fail; 4516251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4517251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 4518291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4519291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4520291698Savos goto fail; 4521251538Srpaulo 4522251538Srpaulo /* Clear per-station keys table. */ 4523251538Srpaulo urtwn_cam_init(sc); 4524251538Srpaulo 4525292175Savos /* Enable decryption / encryption. */ 4526292175Savos urtwn_write_2(sc, R92C_SECCFG, 4527292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 4528292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 4529292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 4530292175Savos 4531292175Savos /* 4532292175Savos * Install static keys (if any). 4533292175Savos * Must be called after urtwn_cam_init(). 4534292175Savos */ 4535292175Savos ieee80211_runtask(ic, &sc->cmdq_task); 4536292175Savos 4537251538Srpaulo /* Enable hardware sequence numbering. */ 4538251538Srpaulo urtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); 4539251538Srpaulo 4540292167Savos /* Enable per-packet TX report. */ 4541292167Savos if (sc->chip & URTWN_CHIP_88E) { 4542292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 4543292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 4544292167Savos } 4545292167Savos 4546251538Srpaulo /* Perform LO and IQ calibrations. */ 4547251538Srpaulo urtwn_iq_calib(sc); 4548251538Srpaulo /* Perform LC calibration. */ 4549251538Srpaulo urtwn_lc_calib(sc); 4550251538Srpaulo 4551251538Srpaulo /* Fix USB interference issue. */ 4552264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4553264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 4554264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 4555264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 4556251538Srpaulo 4557264912Skevlo urtwn_pa_bias_init(sc); 4558264912Skevlo } 4559251538Srpaulo 4560251538Srpaulo /* Initialize GPIO setting. */ 4561251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 4562251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 4563251538Srpaulo 4564251538Srpaulo /* Fix for lower temperature. */ 4565264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4566264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4567251538Srpaulo 4568251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 4569251538Srpaulo 4570287197Sglebius sc->sc_flags |= URTWN_RUNNING; 4571251538Srpaulo 4572251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4573251538Srpaulofail: 4574291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4575291698Savos error = EIO; 4576291698Savos 4577291698Savos URTWN_UNLOCK(sc); 4578291698Savos 4579291698Savos return (error); 4580251538Srpaulo} 4581251538Srpaulo 4582251538Srpaulostatic void 4583287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 4584251538Srpaulo{ 4585251538Srpaulo 4586291698Savos URTWN_LOCK(sc); 4587291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 4588291698Savos URTWN_UNLOCK(sc); 4589291698Savos return; 4590291698Savos } 4591291698Savos 4592287197Sglebius sc->sc_flags &= ~URTWN_RUNNING; 4593251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 4594251538Srpaulo urtwn_abort_xfers(sc); 4595288353Sadrian 4596288353Sadrian urtwn_drain_mbufq(sc); 4597291698Savos URTWN_UNLOCK(sc); 4598251538Srpaulo} 4599251538Srpaulo 4600251538Srpaulostatic void 4601251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 4602251538Srpaulo{ 4603251538Srpaulo int i; 4604251538Srpaulo 4605251538Srpaulo URTWN_ASSERT_LOCKED(sc); 4606251538Srpaulo 4607251538Srpaulo /* abort any pending transfers */ 4608251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 4609251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 4610251538Srpaulo} 4611251538Srpaulo 4612251538Srpaulostatic int 4613251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 4614251538Srpaulo const struct ieee80211_bpf_params *params) 4615251538Srpaulo{ 4616251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 4617286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4618251538Srpaulo struct urtwn_data *bf; 4619290630Savos int error; 4620251538Srpaulo 4621251538Srpaulo /* prevent management frames from being sent if we're not ready */ 4622290630Savos URTWN_LOCK(sc); 4623287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 4624290630Savos error = ENETDOWN; 4625290630Savos goto end; 4626251538Srpaulo } 4627290630Savos 4628251538Srpaulo bf = urtwn_getbuf(sc); 4629251538Srpaulo if (bf == NULL) { 4630290630Savos error = ENOBUFS; 4631290630Savos goto end; 4632251538Srpaulo } 4633251538Srpaulo 4634290630Savos if ((error = urtwn_tx_data(sc, ni, m, bf)) != 0) { 4635251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 4636290630Savos goto end; 4637251538Srpaulo } 4638290630Savos 4639288353Sadrian sc->sc_txtimer = 5; 4640290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4641290630Savos 4642290630Savosend: 4643290630Savos if (error != 0) 4644290630Savos m_freem(m); 4645290630Savos 4646251538Srpaulo URTWN_UNLOCK(sc); 4647251538Srpaulo 4648290630Savos return (error); 4649251538Srpaulo} 4650251538Srpaulo 4651266472Shselaskystatic void 4652266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 4653266472Shselasky{ 4654266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 4655266472Shselasky} 4656266472Shselasky 4657251538Srpaulostatic device_method_t urtwn_methods[] = { 4658251538Srpaulo /* Device interface */ 4659251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 4660251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 4661251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 4662251538Srpaulo 4663264912Skevlo DEVMETHOD_END 4664251538Srpaulo}; 4665251538Srpaulo 4666251538Srpaulostatic driver_t urtwn_driver = { 4667251538Srpaulo "urtwn", 4668251538Srpaulo urtwn_methods, 4669251538Srpaulo sizeof(struct urtwn_softc) 4670251538Srpaulo}; 4671251538Srpaulo 4672251538Srpaulostatic devclass_t urtwn_devclass; 4673251538Srpaulo 4674251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 4675251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 4676251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 4677251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 4678251538SrpauloMODULE_VERSION(urtwn, 1); 4679292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 4680