if_urtwn.c revision 291858
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6251538Srpaulo * 7251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 8251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 9251538Srpaulo * copyright notice and this permission notice appear in all copies. 10251538Srpaulo * 11251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18251538Srpaulo */ 19251538Srpaulo 20251538Srpaulo#include <sys/cdefs.h> 21251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtwn.c 291858 2015-12-05 15:08:01Z avos $"); 22251538Srpaulo 23251538Srpaulo/* 24264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 25251538Srpaulo */ 26251538Srpaulo 27288353Sadrian#include "opt_wlan.h" 28288353Sadrian 29251538Srpaulo#include <sys/param.h> 30251538Srpaulo#include <sys/sockio.h> 31251538Srpaulo#include <sys/sysctl.h> 32251538Srpaulo#include <sys/lock.h> 33251538Srpaulo#include <sys/mutex.h> 34251538Srpaulo#include <sys/mbuf.h> 35251538Srpaulo#include <sys/kernel.h> 36251538Srpaulo#include <sys/socket.h> 37251538Srpaulo#include <sys/systm.h> 38251538Srpaulo#include <sys/malloc.h> 39251538Srpaulo#include <sys/module.h> 40251538Srpaulo#include <sys/bus.h> 41251538Srpaulo#include <sys/endian.h> 42251538Srpaulo#include <sys/linker.h> 43251538Srpaulo#include <sys/firmware.h> 44251538Srpaulo#include <sys/kdb.h> 45251538Srpaulo 46251538Srpaulo#include <machine/bus.h> 47251538Srpaulo#include <machine/resource.h> 48251538Srpaulo#include <sys/rman.h> 49251538Srpaulo 50251538Srpaulo#include <net/bpf.h> 51251538Srpaulo#include <net/if.h> 52257176Sglebius#include <net/if_var.h> 53251538Srpaulo#include <net/if_arp.h> 54251538Srpaulo#include <net/ethernet.h> 55251538Srpaulo#include <net/if_dl.h> 56251538Srpaulo#include <net/if_media.h> 57251538Srpaulo#include <net/if_types.h> 58251538Srpaulo 59251538Srpaulo#include <netinet/in.h> 60251538Srpaulo#include <netinet/in_systm.h> 61251538Srpaulo#include <netinet/in_var.h> 62251538Srpaulo#include <netinet/if_ether.h> 63251538Srpaulo#include <netinet/ip.h> 64251538Srpaulo 65251538Srpaulo#include <net80211/ieee80211_var.h> 66288088Sadrian#include <net80211/ieee80211_input.h> 67251538Srpaulo#include <net80211/ieee80211_regdomain.h> 68251538Srpaulo#include <net80211/ieee80211_radiotap.h> 69251538Srpaulo#include <net80211/ieee80211_ratectl.h> 70251538Srpaulo 71251538Srpaulo#include <dev/usb/usb.h> 72251538Srpaulo#include <dev/usb/usbdi.h> 73251538Srpaulo#include "usbdevs.h" 74251538Srpaulo 75251538Srpaulo#define USB_DEBUG_VAR urtwn_debug 76251538Srpaulo#include <dev/usb/usb_debug.h> 77251538Srpaulo 78251538Srpaulo#include <dev/usb/wlan/if_urtwnreg.h> 79289167Sadrian#include <dev/usb/wlan/if_urtwnvar.h> 80251538Srpaulo 81251538Srpaulo#ifdef USB_DEBUG 82251538Srpaulostatic int urtwn_debug = 0; 83251538Srpaulo 84251538SrpauloSYSCTL_NODE(_hw_usb, OID_AUTO, urtwn, CTLFLAG_RW, 0, "USB urtwn"); 85276701ShselaskySYSCTL_INT(_hw_usb_urtwn, OID_AUTO, debug, CTLFLAG_RWTUN, &urtwn_debug, 0, 86251538Srpaulo "Debug level"); 87251538Srpaulo#endif 88251538Srpaulo 89288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 90251538Srpaulo 91251538Srpaulo/* various supported device vendors/products */ 92251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 93251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 94264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 95264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 96264912Skevlo#define URTWN_RTL8188E 1 97251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 98251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 99251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 100251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 101266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 102251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 103251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 104251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 105251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 106251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 107251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 108251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 109251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 110251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 111251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 112251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 113251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 114251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 115251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 116251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 117251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 118252196Skevlo URTWN_DEV(DLINK, DWA131B), 119251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 120251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 121251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 122251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 123251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 124251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 125251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 126251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 127251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 128251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 129251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 130251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 131251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 132251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 133251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 134251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 135251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 136251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 137251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 138251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 139251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 140251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 141251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 142282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 143251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 144251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 145251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 146251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 147272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 148251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 149251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 150251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 151251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 152251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 153251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 154251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 155251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 156251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 157264912Skevlo /* URTWN_RTL8188E */ 158273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 159270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 160273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 161264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 162264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 163264912Skevlo#undef URTWN_RTL8188E_DEV 164251538Srpaulo#undef URTWN_DEV 165251538Srpaulo}; 166251538Srpaulo 167251538Srpaulostatic device_probe_t urtwn_match; 168251538Srpaulostatic device_attach_t urtwn_attach; 169251538Srpaulostatic device_detach_t urtwn_detach; 170251538Srpaulo 171251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 172251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 173251538Srpaulo 174288353Sadrianstatic void urtwn_drain_mbufq(struct urtwn_softc *sc); 175287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 176287197Sglebius struct usb_device_request *, void *); 177251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 178251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 179251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 180251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 181251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 182281069Srpaulostatic struct mbuf * urtwn_rx_frame(struct urtwn_softc *, uint8_t *, int, 183251538Srpaulo int *); 184281069Srpaulostatic struct mbuf * urtwn_rxeof(struct usb_xfer *, struct urtwn_data *, 185251538Srpaulo int *, int8_t *); 186289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 187289891Savos int); 188281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 189251538Srpaulo struct urtwn_data[], int, int); 190251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 191251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 192251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 193251538Srpaulo struct urtwn_data data[], int); 194289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 195289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 196251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 197251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 198291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 199251538Srpaulo uint8_t *, int); 200291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 201291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 202291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 203291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 204251538Srpaulo uint8_t *, int); 205251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 206251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 207251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 208281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 209251538Srpaulo const void *, int); 210264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 211264912Skevlo uint8_t, uint32_t); 212281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 213264912Skevlo uint8_t, uint32_t); 214251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 215281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 216251538Srpaulo uint32_t); 217291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 218291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 219291264Savos uint8_t, uint8_t); 220291264Savos#ifdef URTWN_DEBUG 221291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 222291264Savos uint8_t *, uint16_t); 223291264Savos#endif 224291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 225291264Savos uint16_t); 226291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 227251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 228291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 229291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 230251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 231290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 232290631Savos struct urtwn_vap *); 233290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 234290631Savos struct ieee80211_node *); 235290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 236290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 237290631Savos struct urtwn_vap *); 238290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 239290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 240290631Savos struct ieee80211vap *); 241251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 242289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 243290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 244290651Savos struct mbuf *, int, 245290651Savos const struct ieee80211_rx_stats *, int, int); 246281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 247251538Srpaulo enum ieee80211_state, int); 248251538Srpaulostatic void urtwn_watchdog(void *); 249251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 250251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 251264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 252290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 253251538Srpaulo struct ieee80211_node *, struct mbuf *, 254251538Srpaulo struct urtwn_data *); 255290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 256290630Savos uint8_t, struct urtwn_data *); 257287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 258287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 259287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 260264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 261264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 262251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 263251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 264264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 265281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 266251538Srpaulo const uint8_t *, int); 267251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 268264912Skevlostatic int urtwn_r92c_dma_init(struct urtwn_softc *); 269264912Skevlostatic int urtwn_r88e_dma_init(struct urtwn_softc *); 270291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 271251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 272251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 273251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 274251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 275251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 276251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 277281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 278251538Srpaulo uint16_t[]); 279251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 280281069Srpaulo struct ieee80211_channel *, 281251538Srpaulo struct ieee80211_channel *, uint16_t[]); 282264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 283281069Srpaulo struct ieee80211_channel *, 284264912Skevlo struct ieee80211_channel *, uint16_t[]); 285251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 286281069Srpaulo struct ieee80211_channel *, 287251538Srpaulo struct ieee80211_channel *); 288290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 289290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 290251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 291251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 292251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 293290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 294290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 295289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 296251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 297281069Srpaulo struct ieee80211_channel *, 298251538Srpaulo struct ieee80211_channel *); 299251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 300251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 301291698Savosstatic int urtwn_init(struct urtwn_softc *); 302287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 303251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 304251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 305251538Srpaulo const struct ieee80211_bpf_params *); 306266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 307251538Srpaulo 308251538Srpaulo/* Aliases. */ 309251538Srpaulo#define urtwn_bb_write urtwn_write_4 310251538Srpaulo#define urtwn_bb_read urtwn_read_4 311251538Srpaulo 312251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 313251538Srpaulo [URTWN_BULK_RX] = { 314251538Srpaulo .type = UE_BULK, 315251538Srpaulo .endpoint = UE_ADDR_ANY, 316251538Srpaulo .direction = UE_DIR_IN, 317251538Srpaulo .bufsize = URTWN_RXBUFSZ, 318251538Srpaulo .flags = { 319251538Srpaulo .pipe_bof = 1, 320251538Srpaulo .short_xfer_ok = 1 321251538Srpaulo }, 322251538Srpaulo .callback = urtwn_bulk_rx_callback, 323251538Srpaulo }, 324251538Srpaulo [URTWN_BULK_TX_BE] = { 325251538Srpaulo .type = UE_BULK, 326251538Srpaulo .endpoint = 0x03, 327251538Srpaulo .direction = UE_DIR_OUT, 328251538Srpaulo .bufsize = URTWN_TXBUFSZ, 329251538Srpaulo .flags = { 330251538Srpaulo .ext_buffer = 1, 331251538Srpaulo .pipe_bof = 1, 332251538Srpaulo .force_short_xfer = 1 333251538Srpaulo }, 334251538Srpaulo .callback = urtwn_bulk_tx_callback, 335251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 336251538Srpaulo }, 337251538Srpaulo [URTWN_BULK_TX_BK] = { 338251538Srpaulo .type = UE_BULK, 339251538Srpaulo .endpoint = 0x03, 340251538Srpaulo .direction = UE_DIR_OUT, 341251538Srpaulo .bufsize = URTWN_TXBUFSZ, 342251538Srpaulo .flags = { 343251538Srpaulo .ext_buffer = 1, 344251538Srpaulo .pipe_bof = 1, 345251538Srpaulo .force_short_xfer = 1, 346251538Srpaulo }, 347251538Srpaulo .callback = urtwn_bulk_tx_callback, 348251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 349251538Srpaulo }, 350251538Srpaulo [URTWN_BULK_TX_VI] = { 351251538Srpaulo .type = UE_BULK, 352251538Srpaulo .endpoint = 0x02, 353251538Srpaulo .direction = UE_DIR_OUT, 354251538Srpaulo .bufsize = URTWN_TXBUFSZ, 355251538Srpaulo .flags = { 356251538Srpaulo .ext_buffer = 1, 357251538Srpaulo .pipe_bof = 1, 358251538Srpaulo .force_short_xfer = 1 359251538Srpaulo }, 360251538Srpaulo .callback = urtwn_bulk_tx_callback, 361251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 362251538Srpaulo }, 363251538Srpaulo [URTWN_BULK_TX_VO] = { 364251538Srpaulo .type = UE_BULK, 365251538Srpaulo .endpoint = 0x02, 366251538Srpaulo .direction = UE_DIR_OUT, 367251538Srpaulo .bufsize = URTWN_TXBUFSZ, 368251538Srpaulo .flags = { 369251538Srpaulo .ext_buffer = 1, 370251538Srpaulo .pipe_bof = 1, 371251538Srpaulo .force_short_xfer = 1 372251538Srpaulo }, 373251538Srpaulo .callback = urtwn_bulk_tx_callback, 374251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 375251538Srpaulo }, 376251538Srpaulo}; 377251538Srpaulo 378251538Srpaulostatic int 379251538Srpaulourtwn_match(device_t self) 380251538Srpaulo{ 381251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 382251538Srpaulo 383251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 384251538Srpaulo return (ENXIO); 385251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 386251538Srpaulo return (ENXIO); 387251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 388251538Srpaulo return (ENXIO); 389251538Srpaulo 390251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 391251538Srpaulo} 392251538Srpaulo 393251538Srpaulostatic int 394251538Srpaulourtwn_attach(device_t self) 395251538Srpaulo{ 396251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 397251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 398287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 399251538Srpaulo uint8_t iface_index, bands; 400251538Srpaulo int error; 401251538Srpaulo 402251538Srpaulo device_set_usb_desc(self); 403251538Srpaulo sc->sc_udev = uaa->device; 404251538Srpaulo sc->sc_dev = self; 405264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 406264912Skevlo sc->chip |= URTWN_CHIP_88E; 407251538Srpaulo 408251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 409251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 410251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 411287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 412251538Srpaulo 413251538Srpaulo iface_index = URTWN_IFACE_INDEX; 414251538Srpaulo error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 415251538Srpaulo urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 416251538Srpaulo if (error) { 417251538Srpaulo device_printf(self, "could not allocate USB transfers, " 418251538Srpaulo "err=%s\n", usbd_errstr(error)); 419251538Srpaulo goto detach; 420251538Srpaulo } 421251538Srpaulo 422251538Srpaulo URTWN_LOCK(sc); 423251538Srpaulo 424251538Srpaulo error = urtwn_read_chipid(sc); 425251538Srpaulo if (error) { 426251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 427251538Srpaulo URTWN_UNLOCK(sc); 428251538Srpaulo goto detach; 429251538Srpaulo } 430251538Srpaulo 431251538Srpaulo /* Determine number of Tx/Rx chains. */ 432251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 433251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 434251538Srpaulo sc->nrxchains = 2; 435251538Srpaulo } else { 436251538Srpaulo sc->ntxchains = 1; 437251538Srpaulo sc->nrxchains = 1; 438251538Srpaulo } 439251538Srpaulo 440264912Skevlo if (sc->chip & URTWN_CHIP_88E) 441291264Savos error = urtwn_r88e_read_rom(sc); 442264912Skevlo else 443291264Savos error = urtwn_read_rom(sc); 444291264Savos if (error != 0) { 445291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 446291264Savos __func__, error); 447291264Savos URTWN_UNLOCK(sc); 448291264Savos goto detach; 449291264Savos } 450264912Skevlo 451251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 452251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 453264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 454251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 455251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 456251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 457251538Srpaulo 458251538Srpaulo URTWN_UNLOCK(sc); 459251538Srpaulo 460283537Sglebius ic->ic_softc = sc; 461283527Sglebius ic->ic_name = device_get_nameunit(self); 462251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 463251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 464251538Srpaulo 465251538Srpaulo /* set device capabilities */ 466251538Srpaulo ic->ic_caps = 467251538Srpaulo IEEE80211_C_STA /* station mode */ 468251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 469290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 470290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 471251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 472251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 473251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 474251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 475251538Srpaulo ; 476251538Srpaulo 477251538Srpaulo bands = 0; 478251538Srpaulo setbit(&bands, IEEE80211_MODE_11B); 479251538Srpaulo setbit(&bands, IEEE80211_MODE_11G); 480251538Srpaulo ieee80211_init_channels(ic, NULL, &bands); 481251538Srpaulo 482287197Sglebius ieee80211_ifattach(ic); 483251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 484251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 485251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 486251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 487287197Sglebius ic->ic_transmit = urtwn_transmit; 488287197Sglebius ic->ic_parent = urtwn_parent; 489251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 490251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 491290564Savos ic->ic_update_promisc = urtwn_update_promisc; 492251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 493251538Srpaulo 494281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 495251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 496251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 497251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 498251538Srpaulo 499251538Srpaulo if (bootverbose) 500251538Srpaulo ieee80211_announce(ic); 501251538Srpaulo 502251538Srpaulo return (0); 503251538Srpaulo 504251538Srpaulodetach: 505251538Srpaulo urtwn_detach(self); 506251538Srpaulo return (ENXIO); /* failure */ 507251538Srpaulo} 508251538Srpaulo 509251538Srpaulostatic int 510251538Srpaulourtwn_detach(device_t self) 511251538Srpaulo{ 512251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 513287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 514263153Skevlo unsigned int x; 515281069Srpaulo 516263153Skevlo /* Prevent further ioctls. */ 517263153Skevlo URTWN_LOCK(sc); 518263153Skevlo sc->sc_flags |= URTWN_DETACHED; 519263153Skevlo URTWN_UNLOCK(sc); 520251538Srpaulo 521291698Savos urtwn_stop(sc); 522291698Savos 523251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 524251538Srpaulo 525288353Sadrian /* stop all USB transfers */ 526288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 527288353Sadrian 528263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 529263153Skevlo URTWN_LOCK(sc); 530263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 531263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 532263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 533263153Skevlo 534263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 535263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 536263153Skevlo URTWN_UNLOCK(sc); 537263153Skevlo 538263153Skevlo /* drain USB transfers */ 539263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 540263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 541263153Skevlo 542263153Skevlo /* Free data buffers. */ 543263153Skevlo URTWN_LOCK(sc); 544263153Skevlo urtwn_free_tx_list(sc); 545263153Skevlo urtwn_free_rx_list(sc); 546263153Skevlo URTWN_UNLOCK(sc); 547263153Skevlo 548251538Srpaulo ieee80211_ifdetach(ic); 549251538Srpaulo mtx_destroy(&sc->sc_mtx); 550251538Srpaulo 551251538Srpaulo return (0); 552251538Srpaulo} 553251538Srpaulo 554251538Srpaulostatic void 555289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 556251538Srpaulo{ 557289066Skevlo struct mbuf *m; 558289066Skevlo struct ieee80211_node *ni; 559289066Skevlo URTWN_ASSERT_LOCKED(sc); 560289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 561289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 562289066Skevlo m->m_pkthdr.rcvif = NULL; 563289066Skevlo ieee80211_free_node(ni); 564289066Skevlo m_freem(m); 565251538Srpaulo } 566251538Srpaulo} 567251538Srpaulo 568251538Srpaulostatic usb_error_t 569251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 570251538Srpaulo void *data) 571251538Srpaulo{ 572251538Srpaulo usb_error_t err; 573251538Srpaulo int ntries = 10; 574251538Srpaulo 575251538Srpaulo URTWN_ASSERT_LOCKED(sc); 576251538Srpaulo 577251538Srpaulo while (ntries--) { 578251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 579251538Srpaulo req, data, 0, NULL, 250 /* ms */); 580251538Srpaulo if (err == 0) 581251538Srpaulo break; 582251538Srpaulo 583251538Srpaulo DPRINTFN(1, "Control request failed, %s (retrying)\n", 584251538Srpaulo usbd_errstr(err)); 585251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 586251538Srpaulo } 587251538Srpaulo return (err); 588251538Srpaulo} 589251538Srpaulo 590251538Srpaulostatic struct ieee80211vap * 591251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 592251538Srpaulo enum ieee80211_opmode opmode, int flags, 593251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 594251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 595251538Srpaulo{ 596290631Savos struct urtwn_softc *sc = ic->ic_softc; 597251538Srpaulo struct urtwn_vap *uvp; 598251538Srpaulo struct ieee80211vap *vap; 599251538Srpaulo 600251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 601251538Srpaulo return (NULL); 602251538Srpaulo 603287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 604251538Srpaulo vap = &uvp->vap; 605251538Srpaulo /* enable s/w bmiss handling for sta mode */ 606251538Srpaulo 607281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 608287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 609257743Shselasky /* out of memory */ 610257743Shselasky free(uvp, M_80211_VAP); 611257743Shselasky return (NULL); 612257743Shselasky } 613257743Shselasky 614290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 615290631Savos urtwn_init_beacon(sc, uvp); 616290631Savos 617251538Srpaulo /* override state transition machine */ 618251538Srpaulo uvp->newstate = vap->iv_newstate; 619251538Srpaulo vap->iv_newstate = urtwn_newstate; 620290631Savos vap->iv_update_beacon = urtwn_update_beacon; 621290651Savos if (opmode == IEEE80211_M_IBSS) { 622290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 623290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 624290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 625290651Savos } 626251538Srpaulo 627251538Srpaulo /* complete setup */ 628251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 629287197Sglebius ieee80211_media_status, mac); 630251538Srpaulo ic->ic_opmode = opmode; 631251538Srpaulo return (vap); 632251538Srpaulo} 633251538Srpaulo 634251538Srpaulostatic void 635251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 636251538Srpaulo{ 637290651Savos struct ieee80211com *ic = vap->iv_ic; 638251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 639251538Srpaulo 640290651Savos if (uvp->bcn_mbuf != NULL) 641290651Savos m_freem(uvp->bcn_mbuf); 642290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 643290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 644251538Srpaulo ieee80211_vap_detach(vap); 645251538Srpaulo free(uvp, M_80211_VAP); 646251538Srpaulo} 647251538Srpaulo 648251538Srpaulostatic struct mbuf * 649251538Srpaulourtwn_rx_frame(struct urtwn_softc *sc, uint8_t *buf, int pktlen, int *rssi_p) 650251538Srpaulo{ 651287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 652251538Srpaulo struct ieee80211_frame *wh; 653251538Srpaulo struct mbuf *m; 654251538Srpaulo struct r92c_rx_stat *stat; 655251538Srpaulo uint32_t rxdw0, rxdw3; 656251538Srpaulo uint8_t rate; 657251538Srpaulo int8_t rssi = 0; 658251538Srpaulo int infosz; 659251538Srpaulo 660251538Srpaulo /* 661251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 662251538Srpaulo * RUNNING. 663251538Srpaulo */ 664287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 665251538Srpaulo return (NULL); 666251538Srpaulo 667251538Srpaulo stat = (struct r92c_rx_stat *)buf; 668251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 669251538Srpaulo rxdw3 = le32toh(stat->rxdw3); 670251538Srpaulo 671251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 672251538Srpaulo /* 673251538Srpaulo * This should not happen since we setup our Rx filter 674251538Srpaulo * to not receive these frames. 675251538Srpaulo */ 676287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 677251538Srpaulo return (NULL); 678251538Srpaulo } 679290022Savos if (pktlen < sizeof(struct ieee80211_frame_ack) || 680290022Savos pktlen > MCLBYTES) { 681287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 682271303Skevlo return (NULL); 683271303Skevlo } 684251538Srpaulo 685251538Srpaulo rate = MS(rxdw3, R92C_RXDW3_RATE); 686251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 687251538Srpaulo 688251538Srpaulo /* Get RSSI from PHY status descriptor if present. */ 689251538Srpaulo if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 690281069Srpaulo if (sc->chip & URTWN_CHIP_88E) 691264912Skevlo rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 692264912Skevlo else 693264912Skevlo rssi = urtwn_get_rssi(sc, rate, &stat[1]); 694251538Srpaulo /* Update our average RSSI. */ 695251538Srpaulo urtwn_update_avgrssi(sc, rate, rssi); 696251538Srpaulo } 697251538Srpaulo 698260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 699251538Srpaulo if (m == NULL) { 700251538Srpaulo device_printf(sc->sc_dev, "could not create RX mbuf\n"); 701251538Srpaulo return (NULL); 702251538Srpaulo } 703251538Srpaulo 704251538Srpaulo /* Finalize mbuf. */ 705251538Srpaulo wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 706251538Srpaulo memcpy(mtod(m, uint8_t *), wh, pktlen); 707251538Srpaulo m->m_pkthdr.len = m->m_len = pktlen; 708251538Srpaulo 709251538Srpaulo if (ieee80211_radiotap_active(ic)) { 710251538Srpaulo struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 711251538Srpaulo 712251538Srpaulo tap->wr_flags = 0; 713251538Srpaulo /* Map HW rate index to 802.11 rate. */ 714251538Srpaulo if (!(rxdw3 & R92C_RXDW3_HT)) { 715289758Savos tap->wr_rate = ridx2rate[rate]; 716251538Srpaulo } else if (rate >= 12) { /* MCS0~15. */ 717251538Srpaulo /* Bit 7 set means HT MCS instead of rate. */ 718251538Srpaulo tap->wr_rate = 0x80 | (rate - 12); 719251538Srpaulo } 720251538Srpaulo tap->wr_dbm_antsignal = rssi; 721289816Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 722251538Srpaulo tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 723251538Srpaulo tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 724251538Srpaulo } 725251538Srpaulo 726251538Srpaulo *rssi_p = rssi; 727251538Srpaulo 728251538Srpaulo return (m); 729251538Srpaulo} 730251538Srpaulo 731251538Srpaulostatic struct mbuf * 732251538Srpaulourtwn_rxeof(struct usb_xfer *xfer, struct urtwn_data *data, int *rssi, 733251538Srpaulo int8_t *nf) 734251538Srpaulo{ 735251538Srpaulo struct urtwn_softc *sc = data->sc; 736287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 737251538Srpaulo struct r92c_rx_stat *stat; 738251538Srpaulo struct mbuf *m, *m0 = NULL, *prevm = NULL; 739251538Srpaulo uint32_t rxdw0; 740251538Srpaulo uint8_t *buf; 741251538Srpaulo int len, totlen, pktlen, infosz, npkts; 742251538Srpaulo 743251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 744251538Srpaulo 745251538Srpaulo if (len < sizeof(*stat)) { 746287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 747251538Srpaulo return (NULL); 748251538Srpaulo } 749251538Srpaulo 750251538Srpaulo buf = data->buf; 751251538Srpaulo /* Get the number of encapsulated frames. */ 752251538Srpaulo stat = (struct r92c_rx_stat *)buf; 753251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 754251538Srpaulo DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 755251538Srpaulo 756251538Srpaulo /* Process all of them. */ 757251538Srpaulo while (npkts-- > 0) { 758251538Srpaulo if (len < sizeof(*stat)) 759251538Srpaulo break; 760251538Srpaulo stat = (struct r92c_rx_stat *)buf; 761251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 762251538Srpaulo 763251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 764251538Srpaulo if (pktlen == 0) 765251538Srpaulo break; 766251538Srpaulo 767251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 768251538Srpaulo 769251538Srpaulo /* Make sure everything fits in xfer. */ 770251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 771251538Srpaulo if (totlen > len) 772251538Srpaulo break; 773251538Srpaulo 774251538Srpaulo m = urtwn_rx_frame(sc, buf, pktlen, rssi); 775251538Srpaulo if (m0 == NULL) 776251538Srpaulo m0 = m; 777251538Srpaulo if (prevm == NULL) 778251538Srpaulo prevm = m; 779251538Srpaulo else { 780251538Srpaulo prevm->m_next = m; 781251538Srpaulo prevm = m; 782251538Srpaulo } 783251538Srpaulo 784251538Srpaulo /* Next chunk is 128-byte aligned. */ 785251538Srpaulo totlen = (totlen + 127) & ~127; 786251538Srpaulo buf += totlen; 787251538Srpaulo len -= totlen; 788251538Srpaulo } 789251538Srpaulo 790251538Srpaulo return (m0); 791251538Srpaulo} 792251538Srpaulo 793251538Srpaulostatic void 794251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 795251538Srpaulo{ 796251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 797287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 798290022Savos struct ieee80211_frame_min *wh; 799251538Srpaulo struct ieee80211_node *ni; 800251538Srpaulo struct mbuf *m = NULL, *next; 801251538Srpaulo struct urtwn_data *data; 802251538Srpaulo int8_t nf; 803251538Srpaulo int rssi = 1; 804251538Srpaulo 805251538Srpaulo URTWN_ASSERT_LOCKED(sc); 806251538Srpaulo 807251538Srpaulo switch (USB_GET_STATE(xfer)) { 808251538Srpaulo case USB_ST_TRANSFERRED: 809251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 810251538Srpaulo if (data == NULL) 811251538Srpaulo goto tr_setup; 812251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 813251538Srpaulo m = urtwn_rxeof(xfer, data, &rssi, &nf); 814251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 815251538Srpaulo /* FALLTHROUGH */ 816251538Srpaulo case USB_ST_SETUP: 817251538Srpaulotr_setup: 818251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 819251538Srpaulo if (data == NULL) { 820251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 821251538Srpaulo return; 822251538Srpaulo } 823251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 824251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 825251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 826251538Srpaulo usbd_xfer_max_len(xfer)); 827251538Srpaulo usbd_transfer_submit(xfer); 828251538Srpaulo 829251538Srpaulo /* 830251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 831251538Srpaulo * ieee80211_input() because here is at the end of a USB 832251538Srpaulo * callback and safe to unlock. 833251538Srpaulo */ 834251538Srpaulo URTWN_UNLOCK(sc); 835251538Srpaulo while (m != NULL) { 836251538Srpaulo next = m->m_next; 837251538Srpaulo m->m_next = NULL; 838290022Savos wh = mtod(m, struct ieee80211_frame_min *); 839290022Savos if (m->m_len >= sizeof(*wh)) 840290022Savos ni = ieee80211_find_rxnode(ic, wh); 841290022Savos else 842290022Savos ni = NULL; 843251538Srpaulo nf = URTWN_NOISE_FLOOR; 844251538Srpaulo if (ni != NULL) { 845289799Savos (void)ieee80211_input(ni, m, rssi - nf, nf); 846251538Srpaulo ieee80211_free_node(ni); 847289799Savos } else { 848289799Savos (void)ieee80211_input_all(ic, m, rssi - nf, 849289799Savos nf); 850289799Savos } 851251538Srpaulo m = next; 852251538Srpaulo } 853251538Srpaulo URTWN_LOCK(sc); 854251538Srpaulo break; 855251538Srpaulo default: 856251538Srpaulo /* needs it to the inactive queue due to a error. */ 857251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 858251538Srpaulo if (data != NULL) { 859251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 860251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 861251538Srpaulo } 862251538Srpaulo if (error != USB_ERR_CANCELLED) { 863251538Srpaulo usbd_xfer_set_stall(xfer); 864287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 865251538Srpaulo goto tr_setup; 866251538Srpaulo } 867251538Srpaulo break; 868251538Srpaulo } 869251538Srpaulo} 870251538Srpaulo 871251538Srpaulostatic void 872289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 873251538Srpaulo{ 874251538Srpaulo 875251538Srpaulo URTWN_ASSERT_LOCKED(sc); 876289891Savos 877290631Savos if (data->ni != NULL) /* not a beacon frame */ 878290631Savos ieee80211_tx_complete(data->ni, data->m, status); 879289891Savos 880287197Sglebius data->ni = NULL; 881287197Sglebius data->m = NULL; 882289891Savos 883251538Srpaulo sc->sc_txtimer = 0; 884289891Savos 885289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 886251538Srpaulo} 887251538Srpaulo 888289066Skevlostatic int 889289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 890289066Skevlo int ndata, int maxsz) 891289066Skevlo{ 892289066Skevlo int i, error; 893289066Skevlo 894289066Skevlo for (i = 0; i < ndata; i++) { 895289066Skevlo struct urtwn_data *dp = &data[i]; 896289066Skevlo dp->sc = sc; 897289066Skevlo dp->m = NULL; 898289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 899289066Skevlo if (dp->buf == NULL) { 900289066Skevlo device_printf(sc->sc_dev, 901289066Skevlo "could not allocate buffer\n"); 902289066Skevlo error = ENOMEM; 903289066Skevlo goto fail; 904289066Skevlo } 905289066Skevlo dp->ni = NULL; 906289066Skevlo } 907289066Skevlo 908289066Skevlo return (0); 909289066Skevlofail: 910289066Skevlo urtwn_free_list(sc, data, ndata); 911289066Skevlo return (error); 912289066Skevlo} 913289066Skevlo 914289066Skevlostatic int 915289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 916289066Skevlo{ 917289066Skevlo int error, i; 918289066Skevlo 919289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 920289066Skevlo URTWN_RXBUFSZ); 921289066Skevlo if (error != 0) 922289066Skevlo return (error); 923289066Skevlo 924289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 925289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 926289066Skevlo 927289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 928289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 929289066Skevlo 930289066Skevlo return (0); 931289066Skevlo} 932289066Skevlo 933289066Skevlostatic int 934289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 935289066Skevlo{ 936289066Skevlo int error, i; 937289066Skevlo 938289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 939289066Skevlo URTWN_TXBUFSZ); 940289066Skevlo if (error != 0) 941289066Skevlo return (error); 942289066Skevlo 943289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 944289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 945289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 946289066Skevlo 947289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 948289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 949289066Skevlo 950289066Skevlo return (0); 951289066Skevlo} 952289066Skevlo 953251538Srpaulostatic void 954289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 955289066Skevlo{ 956289066Skevlo int i; 957289066Skevlo 958289066Skevlo for (i = 0; i < ndata; i++) { 959289066Skevlo struct urtwn_data *dp = &data[i]; 960289066Skevlo 961289066Skevlo if (dp->buf != NULL) { 962289066Skevlo free(dp->buf, M_USBDEV); 963289066Skevlo dp->buf = NULL; 964289066Skevlo } 965289066Skevlo if (dp->ni != NULL) { 966289066Skevlo ieee80211_free_node(dp->ni); 967289066Skevlo dp->ni = NULL; 968289066Skevlo } 969289066Skevlo } 970289066Skevlo} 971289066Skevlo 972289066Skevlostatic void 973289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 974289066Skevlo{ 975289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 976289066Skevlo} 977289066Skevlo 978289066Skevlostatic void 979289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 980289066Skevlo{ 981289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 982289066Skevlo} 983289066Skevlo 984289066Skevlostatic void 985251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 986251538Srpaulo{ 987251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 988251538Srpaulo struct urtwn_data *data; 989251538Srpaulo 990251538Srpaulo URTWN_ASSERT_LOCKED(sc); 991251538Srpaulo 992251538Srpaulo switch (USB_GET_STATE(xfer)){ 993251538Srpaulo case USB_ST_TRANSFERRED: 994251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 995251538Srpaulo if (data == NULL) 996251538Srpaulo goto tr_setup; 997251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 998289891Savos urtwn_txeof(sc, data, 0); 999251538Srpaulo /* FALLTHROUGH */ 1000251538Srpaulo case USB_ST_SETUP: 1001251538Srpaulotr_setup: 1002251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1003251538Srpaulo if (data == NULL) { 1004251538Srpaulo DPRINTF("%s: empty pending queue\n", __func__); 1005288353Sadrian goto finish; 1006251538Srpaulo } 1007251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1008251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1009251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1010251538Srpaulo usbd_transfer_submit(xfer); 1011251538Srpaulo break; 1012251538Srpaulo default: 1013251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1014251538Srpaulo if (data == NULL) 1015251538Srpaulo goto tr_setup; 1016289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1017289891Savos urtwn_txeof(sc, data, 1); 1018251538Srpaulo if (error != USB_ERR_CANCELLED) { 1019251538Srpaulo usbd_xfer_set_stall(xfer); 1020251538Srpaulo goto tr_setup; 1021251538Srpaulo } 1022251538Srpaulo break; 1023251538Srpaulo } 1024288353Sadrianfinish: 1025288353Sadrian /* Kick-start more transmit */ 1026288353Sadrian urtwn_start(sc); 1027251538Srpaulo} 1028251538Srpaulo 1029251538Srpaulostatic struct urtwn_data * 1030251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1031251538Srpaulo{ 1032251538Srpaulo struct urtwn_data *bf; 1033251538Srpaulo 1034251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1035251538Srpaulo if (bf != NULL) 1036251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1037251538Srpaulo else 1038251538Srpaulo DPRINTF("%s: %s\n", __func__, "out of xmit buffers"); 1039251538Srpaulo return (bf); 1040251538Srpaulo} 1041251538Srpaulo 1042251538Srpaulostatic struct urtwn_data * 1043251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1044251538Srpaulo{ 1045251538Srpaulo struct urtwn_data *bf; 1046251538Srpaulo 1047251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1048251538Srpaulo 1049251538Srpaulo bf = _urtwn_getbuf(sc); 1050287197Sglebius if (bf == NULL) 1051251538Srpaulo DPRINTF("%s: stop queue\n", __func__); 1052251538Srpaulo return (bf); 1053251538Srpaulo} 1054251538Srpaulo 1055291698Savosstatic usb_error_t 1056251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1057251538Srpaulo int len) 1058251538Srpaulo{ 1059251538Srpaulo usb_device_request_t req; 1060251538Srpaulo 1061251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1062251538Srpaulo req.bRequest = R92C_REQ_REGS; 1063251538Srpaulo USETW(req.wValue, addr); 1064251538Srpaulo USETW(req.wIndex, 0); 1065251538Srpaulo USETW(req.wLength, len); 1066251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1067251538Srpaulo} 1068251538Srpaulo 1069291698Savosstatic usb_error_t 1070251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1071251538Srpaulo{ 1072291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1073251538Srpaulo} 1074251538Srpaulo 1075291698Savosstatic usb_error_t 1076251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1077251538Srpaulo{ 1078251538Srpaulo val = htole16(val); 1079291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1080251538Srpaulo} 1081251538Srpaulo 1082291698Savosstatic usb_error_t 1083251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1084251538Srpaulo{ 1085251538Srpaulo val = htole32(val); 1086291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1087251538Srpaulo} 1088251538Srpaulo 1089291698Savosstatic usb_error_t 1090251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1091251538Srpaulo int len) 1092251538Srpaulo{ 1093251538Srpaulo usb_device_request_t req; 1094251538Srpaulo 1095251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1096251538Srpaulo req.bRequest = R92C_REQ_REGS; 1097251538Srpaulo USETW(req.wValue, addr); 1098251538Srpaulo USETW(req.wIndex, 0); 1099251538Srpaulo USETW(req.wLength, len); 1100251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1101251538Srpaulo} 1102251538Srpaulo 1103251538Srpaulostatic uint8_t 1104251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1105251538Srpaulo{ 1106251538Srpaulo uint8_t val; 1107251538Srpaulo 1108251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1109251538Srpaulo return (0xff); 1110251538Srpaulo return (val); 1111251538Srpaulo} 1112251538Srpaulo 1113251538Srpaulostatic uint16_t 1114251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1115251538Srpaulo{ 1116251538Srpaulo uint16_t val; 1117251538Srpaulo 1118251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1119251538Srpaulo return (0xffff); 1120251538Srpaulo return (le16toh(val)); 1121251538Srpaulo} 1122251538Srpaulo 1123251538Srpaulostatic uint32_t 1124251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1125251538Srpaulo{ 1126251538Srpaulo uint32_t val; 1127251538Srpaulo 1128251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1129251538Srpaulo return (0xffffffff); 1130251538Srpaulo return (le32toh(val)); 1131251538Srpaulo} 1132251538Srpaulo 1133251538Srpaulostatic int 1134251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1135251538Srpaulo{ 1136251538Srpaulo struct r92c_fw_cmd cmd; 1137291698Savos usb_error_t error; 1138251538Srpaulo int ntries; 1139251538Srpaulo 1140251538Srpaulo /* Wait for current FW box to be empty. */ 1141251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1142251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1143251538Srpaulo break; 1144266472Shselasky urtwn_ms_delay(sc); 1145251538Srpaulo } 1146251538Srpaulo if (ntries == 100) { 1147251538Srpaulo device_printf(sc->sc_dev, 1148251538Srpaulo "could not send firmware command\n"); 1149251538Srpaulo return (ETIMEDOUT); 1150251538Srpaulo } 1151251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1152251538Srpaulo cmd.id = id; 1153251538Srpaulo if (len > 3) 1154251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1155251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1156251538Srpaulo memcpy(cmd.msg, buf, len); 1157251538Srpaulo 1158251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1159291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1160251538Srpaulo (uint8_t *)&cmd + 4, 2); 1161291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1162291698Savos return (EIO); 1163291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1164251538Srpaulo (uint8_t *)&cmd + 0, 4); 1165291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1166291698Savos return (EIO); 1167251538Srpaulo 1168251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1169251538Srpaulo return (0); 1170251538Srpaulo} 1171251538Srpaulo 1172264912Skevlostatic __inline void 1173251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1174251538Srpaulo{ 1175264912Skevlo 1176264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1177264912Skevlo} 1178264912Skevlo 1179264912Skevlostatic void 1180264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1181264912Skevlo uint32_t val) 1182264912Skevlo{ 1183251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1184251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1185251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1186251538Srpaulo} 1187251538Srpaulo 1188264912Skevlostatic void 1189264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1190264912Skevlouint32_t val) 1191264912Skevlo{ 1192264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1193264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1194264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1195264912Skevlo} 1196264912Skevlo 1197251538Srpaulostatic uint32_t 1198251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1199251538Srpaulo{ 1200251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1201251538Srpaulo 1202251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1203251538Srpaulo if (chain != 0) 1204251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1205251538Srpaulo 1206251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1207251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1208266472Shselasky urtwn_ms_delay(sc); 1209251538Srpaulo 1210251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1211251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1212251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1213266472Shselasky urtwn_ms_delay(sc); 1214251538Srpaulo 1215251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1216251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1217266472Shselasky urtwn_ms_delay(sc); 1218251538Srpaulo 1219251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1220251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1221251538Srpaulo else 1222251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1223251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1224251538Srpaulo} 1225251538Srpaulo 1226251538Srpaulostatic int 1227251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1228251538Srpaulo{ 1229291698Savos usb_error_t error; 1230251538Srpaulo int ntries; 1231251538Srpaulo 1232291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1233251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1234251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1235251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1236291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1237291698Savos return (EIO); 1238251538Srpaulo /* Wait for write operation to complete. */ 1239251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1240251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1241251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1242251538Srpaulo return (0); 1243266472Shselasky urtwn_ms_delay(sc); 1244251538Srpaulo } 1245251538Srpaulo return (ETIMEDOUT); 1246251538Srpaulo} 1247251538Srpaulo 1248291264Savosstatic int 1249291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1250251538Srpaulo{ 1251251538Srpaulo uint32_t reg; 1252291698Savos usb_error_t error; 1253251538Srpaulo int ntries; 1254251538Srpaulo 1255291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1256291264Savos return (EFAULT); 1257291264Savos 1258251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1259291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1260251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1261291264Savos 1262291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1263291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1264291698Savos return (EIO); 1265251538Srpaulo /* Wait for read operation to complete. */ 1266251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1267251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1268251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1269291264Savos break; 1270266472Shselasky urtwn_ms_delay(sc); 1271251538Srpaulo } 1272291264Savos if (ntries == 100) { 1273291264Savos device_printf(sc->sc_dev, 1274291264Savos "could not read efuse byte at address 0x%x\n", 1275291264Savos sc->last_rom_addr); 1276291264Savos return (ETIMEDOUT); 1277291264Savos } 1278291264Savos 1279291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1280291264Savos sc->last_rom_addr++; 1281291264Savos 1282291264Savos return (0); 1283251538Srpaulo} 1284251538Srpaulo 1285291264Savosstatic int 1286291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1287291264Savos uint8_t msk) 1288291264Savos{ 1289291264Savos uint8_t reg; 1290291264Savos int i, error; 1291291264Savos 1292291264Savos for (i = 0; i < 4; i++) { 1293291264Savos if (msk & (1 << i)) 1294291264Savos continue; 1295291264Savos error = urtwn_efuse_read_next(sc, ®); 1296291264Savos if (error != 0) 1297291264Savos return (error); 1298291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2, reg); 1299291264Savos rom[off * 8 + i * 2 + 0] = reg; 1300291264Savos 1301291264Savos error = urtwn_efuse_read_next(sc, ®); 1302291264Savos if (error != 0) 1303291264Savos return (error); 1304291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2 + 1, reg); 1305291264Savos rom[off * 8 + i * 2 + 1] = reg; 1306291264Savos } 1307291264Savos 1308291264Savos return (0); 1309291264Savos} 1310291264Savos 1311291264Savos#ifdef URTWN_DEBUG 1312251538Srpaulostatic void 1313291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1314251538Srpaulo{ 1315251538Srpaulo int i; 1316251538Srpaulo 1317291264Savos /* Dump ROM contents. */ 1318291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1319291264Savos for (i = 0; i < size; i++) { 1320291264Savos if (i % 32 == 0) 1321291264Savos printf("\n%03X: ", i); 1322291264Savos else if (i % 4 == 0) 1323291264Savos printf(" "); 1324291264Savos 1325291264Savos printf("%02X", rom[i]); 1326291264Savos } 1327291264Savos printf("\n"); 1328291264Savos} 1329291264Savos#endif 1330291264Savos 1331291264Savosstatic int 1332291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1333291264Savos{ 1334291264Savos#define URTWN_CHK(res) do { \ 1335291264Savos if ((error = res) != 0) \ 1336291264Savos goto end; \ 1337291264Savos} while(0) 1338291264Savos uint8_t msk, off, reg; 1339291264Savos int error; 1340291264Savos 1341291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1342264912Skevlo 1343291264Savos /* Read full ROM image. */ 1344291264Savos sc->last_rom_addr = 0; 1345291264Savos memset(rom, 0xff, size); 1346291264Savos 1347291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1348291264Savos while (reg != 0xff) { 1349291264Savos /* check for extended header */ 1350291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1351291264Savos off = reg >> 5; 1352291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1353291264Savos 1354291264Savos if ((reg & 0x0f) != 0x0f) 1355291264Savos off = ((reg & 0xf0) >> 1) | off; 1356291264Savos else 1357291264Savos continue; 1358291264Savos } else 1359291264Savos off = reg >> 4; 1360251538Srpaulo msk = reg & 0xf; 1361291264Savos 1362291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1363291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1364251538Srpaulo } 1365291264Savos 1366291264Savosend: 1367291264Savos 1368251538Srpaulo#ifdef URTWN_DEBUG 1369291264Savos if (urtwn_debug >= 2) 1370291264Savos urtwn_dump_rom_contents(sc, rom, size); 1371251538Srpaulo#endif 1372291264Savos 1373282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1374291264Savos 1375291264Savos if (error != 0) { 1376291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1377291264Savos __func__); 1378291264Savos } 1379291264Savos 1380291264Savos return (error); 1381291264Savos#undef URTWN_CHK 1382282623Skevlo} 1383281592Skevlo 1384291698Savosstatic int 1385264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1386264912Skevlo{ 1387291698Savos usb_error_t error; 1388264912Skevlo uint32_t reg; 1389251538Srpaulo 1390291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1391291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1392291698Savos return (EIO); 1393281918Skevlo 1394264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1395264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1396291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1397264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1398291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1399291698Savos return (EIO); 1400264912Skevlo } 1401264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1402264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1403291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1404264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1405291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1406291698Savos return (EIO); 1407264912Skevlo } 1408264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1409264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1410264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1411291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1412264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1413291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1414291698Savos return (EIO); 1415264912Skevlo } 1416291698Savos 1417291698Savos return (0); 1418264912Skevlo} 1419264912Skevlo 1420251538Srpaulostatic int 1421251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1422251538Srpaulo{ 1423251538Srpaulo uint32_t reg; 1424251538Srpaulo 1425264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1426264912Skevlo return (0); 1427264912Skevlo 1428251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1429251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1430251538Srpaulo return (EIO); 1431251538Srpaulo 1432251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1433251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1434251538Srpaulo /* Check if it is a castrated 8192C. */ 1435251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1436251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1437251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1438251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1439251538Srpaulo } 1440251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1441251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1442251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1443251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1444251538Srpaulo } 1445251538Srpaulo return (0); 1446251538Srpaulo} 1447251538Srpaulo 1448291264Savosstatic int 1449251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1450251538Srpaulo{ 1451291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1452291264Savos int error; 1453251538Srpaulo 1454251538Srpaulo /* Read full ROM image. */ 1455291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1456291264Savos if (error != 0) 1457291264Savos return (error); 1458251538Srpaulo 1459251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1460291264Savos sc->last_rom_addr = 0x1fa; 1461291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1462291264Savos if (error != 0) 1463291264Savos return (error); 1464251538Srpaulo DPRINTF("PA setting=0x%x\n", sc->pa_setting); 1465251538Srpaulo 1466251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1467251538Srpaulo 1468251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1469251538Srpaulo DPRINTF("regulatory type=%d\n", sc->regulatory); 1470287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1471251538Srpaulo 1472264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1473264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1474264912Skevlo sc->sc_dma_init = urtwn_r92c_dma_init; 1475291264Savos 1476291264Savos return (0); 1477251538Srpaulo} 1478251538Srpaulo 1479291264Savosstatic int 1480264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1481264912Skevlo{ 1482291264Savos uint8_t *rom = sc->rom.r88e_rom; 1483291264Savos uint16_t addr; 1484291264Savos int error, i; 1485264912Skevlo 1486291264Savos error = urtwn_efuse_read(sc, rom, sizeof(sc->rom.r88e_rom)); 1487291264Savos if (error != 0) 1488291264Savos return (error); 1489264912Skevlo 1490264912Skevlo addr = 0x10; 1491264912Skevlo for (i = 0; i < 6; i++) 1492291264Savos sc->cck_tx_pwr[i] = rom[addr++]; 1493264912Skevlo for (i = 0; i < 5; i++) 1494291264Savos sc->ht40_tx_pwr[i] = rom[addr++]; 1495291264Savos sc->bw20_tx_pwr_diff = (rom[addr] & 0xf0) >> 4; 1496264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1497264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1498291264Savos sc->ofdm_tx_pwr_diff = (rom[addr] & 0xf); 1499264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1500264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1501291264Savos sc->regulatory = MS(rom[0xc1], R92C_ROM_RF1_REGULATORY); 1502291264Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, &rom[0xd7]); 1503264912Skevlo 1504264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1505264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1506264912Skevlo sc->sc_dma_init = urtwn_r88e_dma_init; 1507291264Savos 1508291264Savos return (0); 1509264912Skevlo} 1510264912Skevlo 1511251538Srpaulo/* 1512251538Srpaulo * Initialize rate adaptation in firmware. 1513251538Srpaulo */ 1514251538Srpaulostatic int 1515251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1516251538Srpaulo{ 1517287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1518251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1519251538Srpaulo struct ieee80211_node *ni; 1520251538Srpaulo struct ieee80211_rateset *rs; 1521251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1522251538Srpaulo uint32_t rates, basicrates; 1523251538Srpaulo uint8_t mode; 1524251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1525251538Srpaulo 1526251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1527251538Srpaulo rs = &ni->ni_rates; 1528251538Srpaulo 1529251538Srpaulo /* Get normal and basic rates mask. */ 1530251538Srpaulo rates = basicrates = 0; 1531251538Srpaulo maxrate = maxbasicrate = 0; 1532251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1533251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1534289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1535289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1536289758Savos ridx2rate[j]) 1537251538Srpaulo break; 1538289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1539251538Srpaulo continue; 1540251538Srpaulo rates |= 1 << j; 1541251538Srpaulo if (j > maxrate) 1542251538Srpaulo maxrate = j; 1543251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1544251538Srpaulo basicrates |= 1 << j; 1545251538Srpaulo if (j > maxbasicrate) 1546251538Srpaulo maxbasicrate = j; 1547251538Srpaulo } 1548251538Srpaulo } 1549251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1550251538Srpaulo mode = R92C_RAID_11B; 1551251538Srpaulo else 1552251538Srpaulo mode = R92C_RAID_11BG; 1553251538Srpaulo DPRINTF("mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1554251538Srpaulo mode, rates, basicrates); 1555251538Srpaulo 1556251538Srpaulo /* Set rates mask for group addressed frames. */ 1557251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 1558251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 1559251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1560251538Srpaulo if (error != 0) { 1561252401Srpaulo ieee80211_free_node(ni); 1562251538Srpaulo device_printf(sc->sc_dev, 1563251538Srpaulo "could not add broadcast station\n"); 1564251538Srpaulo return (error); 1565251538Srpaulo } 1566251538Srpaulo /* Set initial MRR rate. */ 1567251538Srpaulo DPRINTF("maxbasicrate=%d\n", maxbasicrate); 1568251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 1569251538Srpaulo maxbasicrate); 1570251538Srpaulo 1571251538Srpaulo /* Set rates mask for unicast frames. */ 1572251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 1573251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 1574251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1575251538Srpaulo if (error != 0) { 1576252401Srpaulo ieee80211_free_node(ni); 1577251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 1578251538Srpaulo return (error); 1579251538Srpaulo } 1580251538Srpaulo /* Set initial MRR rate. */ 1581251538Srpaulo DPRINTF("maxrate=%d\n", maxrate); 1582251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 1583251538Srpaulo maxrate); 1584251538Srpaulo 1585251538Srpaulo /* Indicate highest supported rate. */ 1586252403Srpaulo ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1587252401Srpaulo ieee80211_free_node(ni); 1588252401Srpaulo 1589251538Srpaulo return (0); 1590251538Srpaulo} 1591251538Srpaulo 1592290439Savosstatic void 1593290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1594251538Srpaulo{ 1595290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 1596290631Savos 1597290631Savos txd->txdw0 = htole32( 1598290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 1599290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1600290631Savos txd->txdw1 = htole32( 1601290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 1602290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1603290631Savos 1604291858Savos if (sc->chip & URTWN_CHIP_88E) { 1605290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 1606291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 1607291858Savos } else { 1608290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 1609291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 1610291858Savos } 1611290631Savos 1612290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 1613290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 1614251538Srpaulo} 1615251538Srpaulo 1616290631Savosstatic int 1617290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 1618290631Savos{ 1619290631Savos struct ieee80211vap *vap = ni->ni_vap; 1620290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1621290631Savos struct mbuf *m; 1622290631Savos int error; 1623290631Savos 1624290631Savos URTWN_ASSERT_LOCKED(sc); 1625290631Savos 1626290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 1627290631Savos return (EINVAL); 1628290631Savos 1629290631Savos m = ieee80211_beacon_alloc(ni); 1630290631Savos if (m == NULL) { 1631290631Savos device_printf(sc->sc_dev, 1632290631Savos "%s: could not allocate beacon frame\n", __func__); 1633290631Savos return (ENOMEM); 1634290631Savos } 1635290631Savos 1636290631Savos if (uvp->bcn_mbuf != NULL) 1637290631Savos m_freem(uvp->bcn_mbuf); 1638290631Savos 1639290631Savos uvp->bcn_mbuf = m; 1640290631Savos 1641290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1642290631Savos return (error); 1643290631Savos 1644290631Savos /* XXX bcnq stuck workaround */ 1645290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1646290631Savos return (error); 1647290631Savos 1648290631Savos return (0); 1649290631Savos} 1650290631Savos 1651251538Srpaulostatic void 1652290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 1653290631Savos{ 1654290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1655290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1656290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1657290631Savos struct ieee80211_node *ni = vap->iv_bss; 1658290631Savos int mcast = 0; 1659290631Savos 1660290631Savos URTWN_LOCK(sc); 1661290631Savos if (uvp->bcn_mbuf == NULL) { 1662290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 1663290631Savos if (uvp->bcn_mbuf == NULL) { 1664290631Savos device_printf(sc->sc_dev, 1665290631Savos "%s: could not allocate beacon frame\n", __func__); 1666290631Savos URTWN_UNLOCK(sc); 1667290631Savos return; 1668290631Savos } 1669290631Savos } 1670290631Savos URTWN_UNLOCK(sc); 1671290631Savos 1672290631Savos if (item == IEEE80211_BEACON_TIM) 1673290631Savos mcast = 1; /* XXX */ 1674290631Savos 1675290631Savos setbit(bo->bo_flags, item); 1676290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 1677290631Savos 1678290631Savos URTWN_LOCK(sc); 1679290631Savos urtwn_tx_beacon(sc, uvp); 1680290631Savos URTWN_UNLOCK(sc); 1681290631Savos} 1682290631Savos 1683290631Savos/* 1684290631Savos * Push a beacon frame into the chip. Beacon will 1685290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 1686290631Savos */ 1687290631Savosstatic int 1688290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1689290631Savos{ 1690290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 1691290631Savos struct urtwn_data *bf; 1692290631Savos 1693290631Savos URTWN_ASSERT_LOCKED(sc); 1694290631Savos 1695290631Savos bf = urtwn_getbuf(sc); 1696290631Savos if (bf == NULL) 1697290631Savos return (ENOMEM); 1698290631Savos 1699290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 1700290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 1701290631Savos 1702290631Savos sc->sc_txtimer = 5; 1703290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1704290631Savos 1705290631Savos return (0); 1706290631Savos} 1707290631Savos 1708290631Savosstatic void 1709290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 1710290651Savos{ 1711290651Savos struct ieee80211vap *vap = arg; 1712290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1713290651Savos struct ieee80211_node *ni; 1714290651Savos uint32_t reg; 1715290651Savos 1716290651Savos URTWN_LOCK(sc); 1717290651Savos ni = ieee80211_ref_node(vap->iv_bss); 1718290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 1719290651Savos 1720290651Savos /* Accept beacons with the same BSSID. */ 1721290651Savos urtwn_set_rx_bssid_all(sc, 0); 1722290651Savos 1723290651Savos /* Enable synchronization. */ 1724290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 1725290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1726290651Savos 1727290651Savos /* Synchronize. */ 1728290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 1729290651Savos 1730290651Savos /* Disable synchronization. */ 1731290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 1732290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1733290651Savos 1734290651Savos /* Remove beacon filter. */ 1735290651Savos urtwn_set_rx_bssid_all(sc, 1); 1736290651Savos 1737290651Savos /* Enable beaconing. */ 1738290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 1739290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 1740290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 1741290651Savos 1742290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1743290651Savos ieee80211_free_node(ni); 1744290651Savos URTWN_UNLOCK(sc); 1745290651Savos} 1746290651Savos 1747290651Savosstatic void 1748290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 1749290631Savos{ 1750290651Savos struct ieee80211com *ic = &sc->sc_ic; 1751290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1752290651Savos 1753290631Savos /* Reset TSF. */ 1754290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 1755290631Savos 1756290631Savos switch (vap->iv_opmode) { 1757290631Savos case IEEE80211_M_STA: 1758290631Savos /* Enable TSF synchronization. */ 1759290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 1760290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 1761290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 1762290631Savos break; 1763290651Savos case IEEE80211_M_IBSS: 1764290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 1765290651Savos break; 1766290631Savos case IEEE80211_M_HOSTAP: 1767290631Savos /* Enable beaconing. */ 1768290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 1769290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 1770290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 1771290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 1772290631Savos break; 1773290631Savos default: 1774290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 1775290631Savos vap->iv_opmode); 1776290631Savos return; 1777290631Savos } 1778290631Savos} 1779290631Savos 1780290631Savosstatic void 1781251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 1782251538Srpaulo{ 1783251538Srpaulo uint8_t reg; 1784281069Srpaulo 1785251538Srpaulo if (led == URTWN_LED_LINK) { 1786264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 1787264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 1788264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 1789264912Skevlo if (!on) { 1790264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 1791264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 1792264912Skevlo reg | R92C_LEDCFG0_DIS); 1793264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 1794264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 1795264912Skevlo 0xfe); 1796264912Skevlo } 1797264912Skevlo } else { 1798264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 1799264912Skevlo if (!on) 1800264912Skevlo reg |= R92C_LEDCFG0_DIS; 1801264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 1802264912Skevlo } 1803264912Skevlo sc->ledlink = on; /* Save LED state. */ 1804251538Srpaulo } 1805251538Srpaulo} 1806251538Srpaulo 1807289811Savosstatic void 1808289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 1809289811Savos{ 1810289811Savos uint8_t reg; 1811289811Savos 1812289811Savos reg = urtwn_read_1(sc, R92C_MSR); 1813289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 1814289811Savos urtwn_write_1(sc, R92C_MSR, reg); 1815289811Savos} 1816289811Savos 1817290651Savosstatic void 1818290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 1819290651Savos const struct ieee80211_rx_stats *rxs, 1820290651Savos int rssi, int nf) 1821290651Savos{ 1822290651Savos struct ieee80211vap *vap = ni->ni_vap; 1823290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1824290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1825290651Savos uint64_t ni_tstamp, curr_tstamp; 1826290651Savos 1827290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 1828290651Savos 1829290651Savos if (vap->iv_state == IEEE80211_S_RUN && 1830290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 1831290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 1832290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 1833290651Savos#ifdef D3831 1834290651Savos URTWN_LOCK(sc); 1835290651Savos urtwn_get_tsf(sc, &curr_tstamp); 1836290651Savos URTWN_UNLOCK(sc); 1837290651Savos curr_tstamp = le64toh(curr_tstamp); 1838290651Savos 1839290651Savos if (ni_tstamp >= curr_tstamp) 1840290651Savos (void) ieee80211_ibss_merge(ni); 1841290651Savos#else 1842290651Savos (void) sc; 1843290651Savos (void) curr_tstamp; 1844290651Savos#endif 1845290651Savos } 1846290651Savos} 1847290651Savos 1848251538Srpaulostatic int 1849251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1850251538Srpaulo{ 1851251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 1852251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 1853286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 1854251538Srpaulo struct ieee80211_node *ni; 1855251538Srpaulo enum ieee80211_state ostate; 1856290631Savos uint32_t reg; 1857290631Savos uint8_t mode; 1858290631Savos int error = 0; 1859251538Srpaulo 1860251538Srpaulo ostate = vap->iv_state; 1861251538Srpaulo DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 1862251538Srpaulo ieee80211_state_name[nstate]); 1863251538Srpaulo 1864251538Srpaulo IEEE80211_UNLOCK(ic); 1865251538Srpaulo URTWN_LOCK(sc); 1866251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 1867251538Srpaulo 1868251538Srpaulo if (ostate == IEEE80211_S_RUN) { 1869251538Srpaulo /* Turn link LED off. */ 1870251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 1871251538Srpaulo 1872251538Srpaulo /* Set media status to 'No Link'. */ 1873289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 1874251538Srpaulo 1875251538Srpaulo /* Stop Rx of data frames. */ 1876251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 1877251538Srpaulo 1878251538Srpaulo /* Disable TSF synchronization. */ 1879251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 1880290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 1881251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 1882251538Srpaulo 1883290631Savos /* Disable beaconing. */ 1884290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 1885290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 1886290631Savos 1887290631Savos /* Reset TSF. */ 1888290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 1889290631Savos 1890251538Srpaulo /* Reset EDCA parameters. */ 1891251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 1892251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 1893251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 1894251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 1895251538Srpaulo } 1896251538Srpaulo 1897251538Srpaulo switch (nstate) { 1898251538Srpaulo case IEEE80211_S_INIT: 1899251538Srpaulo /* Turn link LED off. */ 1900251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 1901251538Srpaulo break; 1902251538Srpaulo case IEEE80211_S_SCAN: 1903251538Srpaulo /* Pause AC Tx queues. */ 1904251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 1905251538Srpaulo urtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); 1906251538Srpaulo break; 1907251538Srpaulo case IEEE80211_S_AUTH: 1908251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 1909251538Srpaulo break; 1910251538Srpaulo case IEEE80211_S_RUN: 1911251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 1912251538Srpaulo /* Turn link LED on. */ 1913251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 1914251538Srpaulo break; 1915251538Srpaulo } 1916251538Srpaulo 1917251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1918290631Savos 1919290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 1920290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 1921290631Savos device_printf(sc->sc_dev, 1922290631Savos "%s: could not move to RUN state\n", __func__); 1923290631Savos error = EINVAL; 1924290631Savos goto end_run; 1925290631Savos } 1926290631Savos 1927290631Savos switch (vap->iv_opmode) { 1928290631Savos case IEEE80211_M_STA: 1929290631Savos mode = R92C_MSR_INFRA; 1930290631Savos break; 1931290651Savos case IEEE80211_M_IBSS: 1932290651Savos mode = R92C_MSR_ADHOC; 1933290651Savos break; 1934290631Savos case IEEE80211_M_HOSTAP: 1935290631Savos mode = R92C_MSR_AP; 1936290631Savos break; 1937290631Savos default: 1938290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 1939290631Savos vap->iv_opmode); 1940290631Savos error = EINVAL; 1941290631Savos goto end_run; 1942290631Savos } 1943290631Savos 1944251538Srpaulo /* Set media status to 'Associated'. */ 1945290631Savos urtwn_set_mode(sc, mode); 1946251538Srpaulo 1947251538Srpaulo /* Set BSSID. */ 1948251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 1949251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 1950251538Srpaulo 1951251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1952251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 1953251538Srpaulo else /* 802.11b/g */ 1954251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 1955251538Srpaulo 1956251538Srpaulo /* Enable Rx of data frames. */ 1957251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 1958251538Srpaulo 1959251538Srpaulo /* Flush all AC queues. */ 1960251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 1961251538Srpaulo 1962251538Srpaulo /* Set beacon interval. */ 1963251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 1964251538Srpaulo 1965251538Srpaulo /* Allow Rx from our BSSID only. */ 1966290564Savos if (ic->ic_promisc == 0) { 1967290631Savos reg = urtwn_read_4(sc, R92C_RCR); 1968290631Savos 1969290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 1970290631Savos reg |= R92C_RCR_CBSSID_DATA; 1971290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 1972290651Savos reg |= R92C_RCR_CBSSID_BCN; 1973290631Savos 1974290631Savos urtwn_write_4(sc, R92C_RCR, reg); 1975290564Savos } 1976251538Srpaulo 1977290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 1978290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 1979290631Savos error = urtwn_setup_beacon(sc, ni); 1980290631Savos if (error != 0) { 1981290631Savos device_printf(sc->sc_dev, 1982290631Savos "unable to push beacon into the chip, " 1983290631Savos "error %d\n", error); 1984290631Savos goto end_run; 1985290631Savos } 1986290631Savos } 1987290631Savos 1988251538Srpaulo /* Enable TSF synchronization. */ 1989290631Savos urtwn_tsf_sync_enable(sc, vap); 1990251538Srpaulo 1991251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 1992251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 1993251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 1994251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 1995251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 1996251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 1997251538Srpaulo 1998251538Srpaulo /* Intialize rate adaptation. */ 1999264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2000264912Skevlo ni->ni_txrate = 2001264912Skevlo ni->ni_rates.rs_rates[ni->ni_rates.rs_nrates-1]; 2002281069Srpaulo else 2003264912Skevlo urtwn_ra_init(sc); 2004251538Srpaulo /* Turn link LED on. */ 2005251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2006251538Srpaulo 2007251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2008251538Srpaulo /* Reset temperature calibration state machine. */ 2009251538Srpaulo sc->thcal_state = 0; 2010251538Srpaulo sc->thcal_lctemp = 0; 2011290631Savos 2012290631Savosend_run: 2013251538Srpaulo ieee80211_free_node(ni); 2014251538Srpaulo break; 2015251538Srpaulo default: 2016251538Srpaulo break; 2017251538Srpaulo } 2018290631Savos 2019251538Srpaulo URTWN_UNLOCK(sc); 2020251538Srpaulo IEEE80211_LOCK(ic); 2021290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2022251538Srpaulo} 2023251538Srpaulo 2024251538Srpaulostatic void 2025251538Srpaulourtwn_watchdog(void *arg) 2026251538Srpaulo{ 2027251538Srpaulo struct urtwn_softc *sc = arg; 2028251538Srpaulo 2029251538Srpaulo if (sc->sc_txtimer > 0) { 2030251538Srpaulo if (--sc->sc_txtimer == 0) { 2031251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2032287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2033251538Srpaulo return; 2034251538Srpaulo } 2035251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2036251538Srpaulo } 2037251538Srpaulo} 2038251538Srpaulo 2039251538Srpaulostatic void 2040251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2041251538Srpaulo{ 2042251538Srpaulo int pwdb; 2043251538Srpaulo 2044251538Srpaulo /* Convert antenna signal to percentage. */ 2045251538Srpaulo if (rssi <= -100 || rssi >= 20) 2046251538Srpaulo pwdb = 0; 2047251538Srpaulo else if (rssi >= 0) 2048251538Srpaulo pwdb = 100; 2049251538Srpaulo else 2050251538Srpaulo pwdb = 100 + rssi; 2051264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2052289758Savos if (rate <= URTWN_RIDX_CCK11) { 2053264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2054264912Skevlo pwdb += 6; 2055264912Skevlo if (pwdb > 100) 2056264912Skevlo pwdb = 100; 2057264912Skevlo if (pwdb <= 14) 2058264912Skevlo pwdb -= 4; 2059264912Skevlo else if (pwdb <= 26) 2060264912Skevlo pwdb -= 8; 2061264912Skevlo else if (pwdb <= 34) 2062264912Skevlo pwdb -= 6; 2063264912Skevlo else if (pwdb <= 42) 2064264912Skevlo pwdb -= 2; 2065264912Skevlo } 2066251538Srpaulo } 2067251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2068251538Srpaulo sc->avg_pwdb = pwdb; 2069251538Srpaulo else if (sc->avg_pwdb < pwdb) 2070251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2071251538Srpaulo else 2072251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2073251538Srpaulo DPRINTFN(4, "PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb); 2074251538Srpaulo} 2075251538Srpaulo 2076251538Srpaulostatic int8_t 2077251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2078251538Srpaulo{ 2079251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2080251538Srpaulo struct r92c_rx_phystat *phy; 2081251538Srpaulo struct r92c_rx_cck *cck; 2082251538Srpaulo uint8_t rpt; 2083251538Srpaulo int8_t rssi; 2084251538Srpaulo 2085289758Savos if (rate <= URTWN_RIDX_CCK11) { 2086251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2087251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2088251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2089251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2090251538Srpaulo } else { 2091251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2092251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2093251538Srpaulo } 2094251538Srpaulo rssi = cckoff[rpt] - rssi; 2095251538Srpaulo } else { /* OFDM/HT. */ 2096251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2097251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2098251538Srpaulo } 2099251538Srpaulo return (rssi); 2100251538Srpaulo} 2101251538Srpaulo 2102264912Skevlostatic int8_t 2103264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2104264912Skevlo{ 2105264912Skevlo struct r92c_rx_phystat *phy; 2106264912Skevlo struct r88e_rx_cck *cck; 2107264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2108264912Skevlo int8_t rssi; 2109264912Skevlo 2110264972Skevlo rssi = 0; 2111289758Savos if (rate <= URTWN_RIDX_CCK11) { 2112264912Skevlo cck = (struct r88e_rx_cck *)physt; 2113264912Skevlo cck_agc_rpt = cck->agc_rpt; 2114264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2115281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2116264912Skevlo switch (lna_idx) { 2117264912Skevlo case 7: 2118264912Skevlo if (vga_idx <= 27) 2119264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2120264912Skevlo else 2121264912Skevlo rssi = -100; 2122264912Skevlo break; 2123264912Skevlo case 6: 2124264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2125264912Skevlo break; 2126264912Skevlo case 5: 2127264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2128264912Skevlo break; 2129264912Skevlo case 4: 2130264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2131264912Skevlo break; 2132264912Skevlo case 3: 2133264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2134264912Skevlo break; 2135264912Skevlo case 2: 2136264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2137264912Skevlo break; 2138264912Skevlo case 1: 2139264912Skevlo rssi = 8 - (2 * vga_idx); 2140264912Skevlo break; 2141264912Skevlo case 0: 2142264912Skevlo rssi = 14 - (2 * vga_idx); 2143264912Skevlo break; 2144264912Skevlo } 2145264912Skevlo rssi += 6; 2146264912Skevlo } else { /* OFDM/HT. */ 2147264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2148264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2149264912Skevlo } 2150264912Skevlo return (rssi); 2151264912Skevlo} 2152264912Skevlo 2153251538Srpaulostatic int 2154290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2155290630Savos struct mbuf *m, struct urtwn_data *data) 2156251538Srpaulo{ 2157251538Srpaulo struct ieee80211_frame *wh; 2158290630Savos struct ieee80211_key *k = NULL; 2159287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2160251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2161251538Srpaulo struct r92c_tx_desc *txd; 2162290630Savos uint8_t macid, raid, ridx, subtype, type, qsel; 2163290630Savos int ismcast; 2164251538Srpaulo 2165251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2166251538Srpaulo 2167251538Srpaulo /* 2168251538Srpaulo * Software crypto. 2169251538Srpaulo */ 2170290630Savos wh = mtod(m, struct ieee80211_frame *); 2171264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2172290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2173290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2174264912Skevlo 2175260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2176290630Savos k = ieee80211_crypto_encap(ni, m); 2177251538Srpaulo if (k == NULL) { 2178251538Srpaulo device_printf(sc->sc_dev, 2179251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2180251538Srpaulo return (ENOBUFS); 2181251538Srpaulo } 2182251538Srpaulo 2183251538Srpaulo /* in case packet header moved, reset pointer */ 2184290630Savos wh = mtod(m, struct ieee80211_frame *); 2185251538Srpaulo } 2186281069Srpaulo 2187251538Srpaulo /* Fill Tx descriptor. */ 2188251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2189251538Srpaulo memset(txd, 0, sizeof(*txd)); 2190251538Srpaulo 2191251538Srpaulo txd->txdw0 |= htole32( 2192251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2193251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2194290630Savos if (ismcast) 2195251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2196290630Savos 2197290630Savos raid = R92C_RAID_11B; /* by default */ 2198290630Savos ridx = URTWN_RIDX_CCK1; 2199290630Savos if (!ismcast) { 2200290630Savos macid = URTWN_MACID_BSS; 2201290630Savos 2202290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2203290630Savos qsel = R92C_TXDW1_QSEL_BE; 2204290630Savos 2205290630Savos if (!(m->m_flags & M_EAPOL)) { 2206290630Savos if (ic->ic_curmode != IEEE80211_MODE_11B) { 2207290630Savos raid = R92C_RAID_11BG; 2208290630Savos ridx = URTWN_RIDX_OFDM54; 2209290630Savos } else 2210290630Savos ridx = URTWN_RIDX_CCK11; 2211251538Srpaulo } 2212290630Savos 2213290630Savos if (sc->chip & URTWN_CHIP_88E) 2214290630Savos txd->txdw2 |= htole32(R88E_TXDW2_AGGBK); 2215290630Savos else 2216290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2217290630Savos 2218290630Savos if (ic->ic_flags & IEEE80211_F_USEPROT) { 2219290630Savos switch (ic->ic_protmode) { 2220290630Savos case IEEE80211_PROT_CTSONLY: 2221290630Savos txd->txdw4 |= htole32( 2222290630Savos R92C_TXDW4_CTS2SELF | 2223290630Savos R92C_TXDW4_HWRTSEN); 2224290630Savos break; 2225290630Savos case IEEE80211_PROT_RTSCTS: 2226290630Savos txd->txdw4 |= htole32( 2227290630Savos R92C_TXDW4_RTSEN | 2228290630Savos R92C_TXDW4_HWRTSEN); 2229290630Savos break; 2230290630Savos default: 2231290630Savos break; 2232290630Savos } 2233290630Savos } 2234290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2235290630Savos URTWN_RIDX_OFDM24)); 2236290630Savos txd->txdw5 |= htole32(0x0001ff00); 2237290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2238290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2239251538Srpaulo } else { 2240290630Savos macid = URTWN_MACID_BC; 2241290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2242290630Savos } 2243251538Srpaulo 2244290630Savos txd->txdw1 |= htole32( 2245290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2246290630Savos SM(R92C_TXDW1_RAID, raid)); 2247290630Savos 2248290630Savos if (sc->chip & URTWN_CHIP_88E) 2249290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2250290630Savos else 2251290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2252290630Savos 2253290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2254291858Savos /* Force this rate if needed. */ 2255291858Savos if (ismcast || type != IEEE80211_FC0_TYPE_DATA || 2256291858Savos (m->m_flags & M_EAPOL)) 2257251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2258251538Srpaulo 2259288534Sadrian if (!IEEE80211_QOS_HAS_SEQ(wh)) { 2260251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 2261291858Savos if (sc->chip & URTWN_CHIP_88E) 2262291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 2263291858Savos else 2264291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2265290630Savos } else { 2266290630Savos /* Set sequence number. */ 2267290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 2268290630Savos } 2269251538Srpaulo 2270251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 2271251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2272251538Srpaulo 2273251538Srpaulo tap->wt_flags = 0; 2274251538Srpaulo tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2275251538Srpaulo tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2276290630Savos if (k != NULL) 2277290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2278290630Savos ieee80211_radiotap_tx(vap, m); 2279251538Srpaulo } 2280251538Srpaulo 2281290630Savos data->ni = ni; 2282251538Srpaulo 2283290630Savos urtwn_tx_start(sc, m, type, data); 2284290630Savos 2285290630Savos return (0); 2286290630Savos} 2287290630Savos 2288290630Savosstatic void 2289290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 2290290630Savos struct urtwn_data *data) 2291290630Savos{ 2292290630Savos struct usb_xfer *xfer; 2293290630Savos struct r92c_tx_desc *txd; 2294290630Savos uint16_t ac, sum; 2295290630Savos int i, xferlen; 2296290630Savos struct usb_xfer *urtwn_pipes[WME_NUM_AC] = { 2297290630Savos sc->sc_xfer[URTWN_BULK_TX_BE], 2298290630Savos sc->sc_xfer[URTWN_BULK_TX_BK], 2299290630Savos sc->sc_xfer[URTWN_BULK_TX_VI], 2300290630Savos sc->sc_xfer[URTWN_BULK_TX_VO] 2301290630Savos }; 2302290630Savos 2303290630Savos URTWN_ASSERT_LOCKED(sc); 2304290630Savos 2305290630Savos ac = M_WME_GETAC(m); 2306290630Savos 2307290630Savos switch (type) { 2308290630Savos case IEEE80211_FC0_TYPE_CTL: 2309290630Savos case IEEE80211_FC0_TYPE_MGT: 2310290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 2311290630Savos break; 2312290630Savos default: 2313290630Savos xfer = urtwn_pipes[ac]; 2314290630Savos break; 2315290630Savos } 2316290630Savos 2317290630Savos txd = (struct r92c_tx_desc *)data->buf; 2318290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 2319290630Savos 2320290630Savos /* Compute Tx descriptor checksum. */ 2321290630Savos sum = 0; 2322290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 2323290630Savos sum ^= ((uint16_t *)txd)[i]; 2324290630Savos txd->txdsum = sum; /* NB: already little endian. */ 2325290630Savos 2326290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 2327290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 2328290630Savos 2329251538Srpaulo data->buflen = xferlen; 2330290630Savos data->m = m; 2331251538Srpaulo 2332251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2333251538Srpaulo usbd_transfer_start(xfer); 2334251538Srpaulo} 2335251538Srpaulo 2336287197Sglebiusstatic int 2337287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 2338251538Srpaulo{ 2339287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 2340287197Sglebius int error; 2341261863Srpaulo 2342261863Srpaulo URTWN_LOCK(sc); 2343287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2344287197Sglebius URTWN_UNLOCK(sc); 2345287197Sglebius return (ENXIO); 2346287197Sglebius } 2347287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 2348287197Sglebius if (error) { 2349287197Sglebius URTWN_UNLOCK(sc); 2350287197Sglebius return (error); 2351287197Sglebius } 2352287197Sglebius urtwn_start(sc); 2353261863Srpaulo URTWN_UNLOCK(sc); 2354287197Sglebius 2355287197Sglebius return (0); 2356261863Srpaulo} 2357261863Srpaulo 2358261863Srpaulostatic void 2359287197Sglebiusurtwn_start(struct urtwn_softc *sc) 2360261863Srpaulo{ 2361251538Srpaulo struct ieee80211_node *ni; 2362251538Srpaulo struct mbuf *m; 2363251538Srpaulo struct urtwn_data *bf; 2364251538Srpaulo 2365261863Srpaulo URTWN_ASSERT_LOCKED(sc); 2366287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2367251538Srpaulo bf = urtwn_getbuf(sc); 2368251538Srpaulo if (bf == NULL) { 2369287197Sglebius mbufq_prepend(&sc->sc_snd, m); 2370251538Srpaulo break; 2371251538Srpaulo } 2372251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2373251538Srpaulo m->m_pkthdr.rcvif = NULL; 2374290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 2375287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 2376287197Sglebius IFCOUNTER_OERRORS, 1); 2377251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2378288353Sadrian m_freem(m); 2379251538Srpaulo ieee80211_free_node(ni); 2380251538Srpaulo break; 2381251538Srpaulo } 2382251538Srpaulo sc->sc_txtimer = 5; 2383251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2384251538Srpaulo } 2385251538Srpaulo} 2386251538Srpaulo 2387287197Sglebiusstatic void 2388287197Sglebiusurtwn_parent(struct ieee80211com *ic) 2389251538Srpaulo{ 2390286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2391251538Srpaulo 2392263153Skevlo URTWN_LOCK(sc); 2393287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 2394287197Sglebius URTWN_UNLOCK(sc); 2395287197Sglebius return; 2396287197Sglebius } 2397291698Savos URTWN_UNLOCK(sc); 2398291698Savos 2399287197Sglebius if (ic->ic_nrunning > 0) { 2400291698Savos if (urtwn_init(sc) != 0) { 2401291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2402291698Savos if (vap != NULL) 2403291698Savos ieee80211_stop(vap); 2404291698Savos } else 2405291698Savos ieee80211_start_all(ic); 2406291698Savos } else 2407287197Sglebius urtwn_stop(sc); 2408251538Srpaulo} 2409251538Srpaulo 2410264912Skevlostatic __inline int 2411251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 2412251538Srpaulo{ 2413264912Skevlo 2414264912Skevlo return sc->sc_power_on(sc); 2415264912Skevlo} 2416264912Skevlo 2417264912Skevlostatic int 2418264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 2419264912Skevlo{ 2420251538Srpaulo uint32_t reg; 2421291698Savos usb_error_t error; 2422251538Srpaulo int ntries; 2423251538Srpaulo 2424251538Srpaulo /* Wait for autoload done bit. */ 2425251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2426251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 2427251538Srpaulo break; 2428266472Shselasky urtwn_ms_delay(sc); 2429251538Srpaulo } 2430251538Srpaulo if (ntries == 1000) { 2431251538Srpaulo device_printf(sc->sc_dev, 2432251538Srpaulo "timeout waiting for chip autoload\n"); 2433251538Srpaulo return (ETIMEDOUT); 2434251538Srpaulo } 2435251538Srpaulo 2436251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 2437291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 2438291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2439291698Savos return (EIO); 2440251538Srpaulo /* Move SPS into PWM mode. */ 2441291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 2442291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2443291698Savos return (EIO); 2444266472Shselasky urtwn_ms_delay(sc); 2445251538Srpaulo 2446251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 2447251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 2448291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 2449251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 2450291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2451291698Savos return (EIO); 2452266472Shselasky urtwn_ms_delay(sc); 2453291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 2454251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 2455251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 2456291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2457291698Savos return (EIO); 2458251538Srpaulo } 2459251538Srpaulo 2460251538Srpaulo /* Auto enable WLAN. */ 2461291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2462251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2463291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2464291698Savos return (EIO); 2465251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2466262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2467262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2468251538Srpaulo break; 2469266472Shselasky urtwn_ms_delay(sc); 2470251538Srpaulo } 2471251538Srpaulo if (ntries == 1000) { 2472251538Srpaulo device_printf(sc->sc_dev, 2473251538Srpaulo "timeout waiting for MAC auto ON\n"); 2474251538Srpaulo return (ETIMEDOUT); 2475251538Srpaulo } 2476251538Srpaulo 2477251538Srpaulo /* Enable radio, GPIO and LED functions. */ 2478291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2479251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 2480251538Srpaulo R92C_APS_FSMCO_PDN_EN | 2481251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 2482291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2483291698Savos return (EIO); 2484251538Srpaulo /* Release RF digital isolation. */ 2485291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 2486251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 2487291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2488291698Savos return (EIO); 2489251538Srpaulo 2490251538Srpaulo /* Initialize MAC. */ 2491291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 2492251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 2493291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2494291698Savos return (EIO); 2495251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 2496251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 2497251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 2498251538Srpaulo break; 2499266472Shselasky urtwn_ms_delay(sc); 2500251538Srpaulo } 2501251538Srpaulo if (ntries == 200) { 2502251538Srpaulo device_printf(sc->sc_dev, 2503251538Srpaulo "timeout waiting for MAC initialization\n"); 2504251538Srpaulo return (ETIMEDOUT); 2505251538Srpaulo } 2506251538Srpaulo 2507251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2508251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 2509251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2510251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2511251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 2512251538Srpaulo R92C_CR_ENSEC; 2513291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 2514291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2515291698Savos return (EIO); 2516251538Srpaulo 2517291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 2518291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2519291698Savos return (EIO); 2520251538Srpaulo return (0); 2521251538Srpaulo} 2522251538Srpaulo 2523251538Srpaulostatic int 2524264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 2525264912Skevlo{ 2526264912Skevlo uint32_t reg; 2527291698Savos usb_error_t error; 2528264912Skevlo int ntries; 2529264912Skevlo 2530264912Skevlo /* Wait for power ready bit. */ 2531264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2532281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 2533264912Skevlo break; 2534266472Shselasky urtwn_ms_delay(sc); 2535264912Skevlo } 2536264912Skevlo if (ntries == 5000) { 2537264912Skevlo device_printf(sc->sc_dev, 2538264912Skevlo "timeout waiting for chip power up\n"); 2539264912Skevlo return (ETIMEDOUT); 2540264912Skevlo } 2541264912Skevlo 2542264912Skevlo /* Reset BB. */ 2543291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 2544264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 2545264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 2546291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2547291698Savos return (EIO); 2548264912Skevlo 2549291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 2550281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 2551291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2552291698Savos return (EIO); 2553264912Skevlo 2554264912Skevlo /* Disable HWPDN. */ 2555291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2556281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 2557291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2558291698Savos return (EIO); 2559264912Skevlo 2560264912Skevlo /* Disable WL suspend. */ 2561291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2562281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 2563281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 2564291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2565291698Savos return (EIO); 2566264912Skevlo 2567291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2568281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2569291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2570291698Savos return (EIO); 2571264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2572281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2573281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2574264912Skevlo break; 2575266472Shselasky urtwn_ms_delay(sc); 2576264912Skevlo } 2577264912Skevlo if (ntries == 5000) 2578264912Skevlo return (ETIMEDOUT); 2579264912Skevlo 2580264912Skevlo /* Enable LDO normal mode. */ 2581291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 2582281918Skevlo urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~0x10); 2583291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2584291698Savos return (EIO); 2585264912Skevlo 2586264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2587291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 2588291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2589291698Savos return (EIO); 2590264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 2591264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2592264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2593264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 2594291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 2595291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2596291698Savos return (EIO); 2597264912Skevlo 2598264912Skevlo return (0); 2599264912Skevlo} 2600264912Skevlo 2601264912Skevlostatic int 2602251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 2603251538Srpaulo{ 2604264912Skevlo int i, error, page_count, pktbuf_count; 2605251538Srpaulo 2606264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 2607264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 2608264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 2609264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 2610264912Skevlo 2611264912Skevlo /* Reserve pages [0; page_count]. */ 2612264912Skevlo for (i = 0; i < page_count; i++) { 2613251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 2614251538Srpaulo return (error); 2615251538Srpaulo } 2616251538Srpaulo /* NB: 0xff indicates end-of-list. */ 2617251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 2618251538Srpaulo return (error); 2619251538Srpaulo /* 2620264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 2621251538Srpaulo * as ring buffer. 2622251538Srpaulo */ 2623264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 2624251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 2625251538Srpaulo return (error); 2626251538Srpaulo } 2627251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 2628264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 2629251538Srpaulo return (error); 2630251538Srpaulo} 2631251538Srpaulo 2632251538Srpaulostatic void 2633251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 2634251538Srpaulo{ 2635251538Srpaulo uint16_t reg; 2636251538Srpaulo int ntries; 2637251538Srpaulo 2638251538Srpaulo /* Tell 8051 to reset itself. */ 2639251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 2640251538Srpaulo 2641251538Srpaulo /* Wait until 8051 resets by itself. */ 2642251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 2643251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 2644251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 2645251538Srpaulo return; 2646266472Shselasky urtwn_ms_delay(sc); 2647251538Srpaulo } 2648251538Srpaulo /* Force 8051 reset. */ 2649251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2650251538Srpaulo} 2651251538Srpaulo 2652264912Skevlostatic void 2653264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 2654264912Skevlo{ 2655264912Skevlo uint16_t reg; 2656264912Skevlo 2657264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 2658264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2659264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 2660264912Skevlo} 2661264912Skevlo 2662251538Srpaulostatic int 2663251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 2664251538Srpaulo{ 2665251538Srpaulo uint32_t reg; 2666291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 2667291698Savos int off, mlen; 2668251538Srpaulo 2669251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2670251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 2671251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2672251538Srpaulo 2673251538Srpaulo off = R92C_FW_START_ADDR; 2674251538Srpaulo while (len > 0) { 2675251538Srpaulo if (len > 196) 2676251538Srpaulo mlen = 196; 2677251538Srpaulo else if (len > 4) 2678251538Srpaulo mlen = 4; 2679251538Srpaulo else 2680251538Srpaulo mlen = 1; 2681251538Srpaulo /* XXX fix this deconst */ 2682281069Srpaulo error = urtwn_write_region_1(sc, off, 2683251538Srpaulo __DECONST(uint8_t *, buf), mlen); 2684291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2685251538Srpaulo break; 2686251538Srpaulo off += mlen; 2687251538Srpaulo buf += mlen; 2688251538Srpaulo len -= mlen; 2689251538Srpaulo } 2690251538Srpaulo return (error); 2691251538Srpaulo} 2692251538Srpaulo 2693251538Srpaulostatic int 2694251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 2695251538Srpaulo{ 2696251538Srpaulo const struct firmware *fw; 2697251538Srpaulo const struct r92c_fw_hdr *hdr; 2698251538Srpaulo const char *imagename; 2699251538Srpaulo const u_char *ptr; 2700251538Srpaulo size_t len; 2701251538Srpaulo uint32_t reg; 2702251538Srpaulo int mlen, ntries, page, error; 2703251538Srpaulo 2704264864Skevlo URTWN_UNLOCK(sc); 2705251538Srpaulo /* Read firmware image from the filesystem. */ 2706264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2707264912Skevlo imagename = "urtwn-rtl8188eufw"; 2708264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 2709264912Skevlo URTWN_CHIP_UMC_A_CUT) 2710251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 2711251538Srpaulo else 2712251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 2713251538Srpaulo 2714251538Srpaulo fw = firmware_get(imagename); 2715264864Skevlo URTWN_LOCK(sc); 2716251538Srpaulo if (fw == NULL) { 2717251538Srpaulo device_printf(sc->sc_dev, 2718251538Srpaulo "failed loadfirmware of file %s\n", imagename); 2719251538Srpaulo return (ENOENT); 2720251538Srpaulo } 2721251538Srpaulo 2722251538Srpaulo len = fw->datasize; 2723251538Srpaulo 2724251538Srpaulo if (len < sizeof(*hdr)) { 2725251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 2726251538Srpaulo error = EINVAL; 2727251538Srpaulo goto fail; 2728251538Srpaulo } 2729251538Srpaulo ptr = fw->data; 2730251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 2731251538Srpaulo /* Check if there is a valid FW header and skip it. */ 2732251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 2733264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 2734251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 2735251538Srpaulo DPRINTF("FW V%d.%d %02d-%02d %02d:%02d\n", 2736251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 2737251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 2738251538Srpaulo ptr += sizeof(*hdr); 2739251538Srpaulo len -= sizeof(*hdr); 2740251538Srpaulo } 2741251538Srpaulo 2742264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 2743264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2744264912Skevlo urtwn_r88e_fw_reset(sc); 2745264912Skevlo else 2746264912Skevlo urtwn_fw_reset(sc); 2747251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 2748251538Srpaulo } 2749264912Skevlo 2750268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2751268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 2752268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2753268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 2754268487Skevlo } 2755251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2756251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 2757251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 2758251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 2759251538Srpaulo 2760263154Skevlo /* Reset the FWDL checksum. */ 2761263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 2762263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 2763263154Skevlo 2764251538Srpaulo for (page = 0; len > 0; page++) { 2765251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 2766251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 2767251538Srpaulo if (error != 0) { 2768251538Srpaulo device_printf(sc->sc_dev, 2769251538Srpaulo "could not load firmware page\n"); 2770251538Srpaulo goto fail; 2771251538Srpaulo } 2772251538Srpaulo ptr += mlen; 2773251538Srpaulo len -= mlen; 2774251538Srpaulo } 2775251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2776251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 2777251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 2778251538Srpaulo 2779251538Srpaulo /* Wait for checksum report. */ 2780251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2781251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 2782251538Srpaulo break; 2783266472Shselasky urtwn_ms_delay(sc); 2784251538Srpaulo } 2785251538Srpaulo if (ntries == 1000) { 2786251538Srpaulo device_printf(sc->sc_dev, 2787251538Srpaulo "timeout waiting for checksum report\n"); 2788251538Srpaulo error = ETIMEDOUT; 2789251538Srpaulo goto fail; 2790251538Srpaulo } 2791251538Srpaulo 2792251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2793251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 2794251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2795264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2796264912Skevlo urtwn_r88e_fw_reset(sc); 2797251538Srpaulo /* Wait for firmware readiness. */ 2798251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2799251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 2800251538Srpaulo break; 2801266472Shselasky urtwn_ms_delay(sc); 2802251538Srpaulo } 2803251538Srpaulo if (ntries == 1000) { 2804251538Srpaulo device_printf(sc->sc_dev, 2805251538Srpaulo "timeout waiting for firmware readiness\n"); 2806251538Srpaulo error = ETIMEDOUT; 2807251538Srpaulo goto fail; 2808251538Srpaulo } 2809251538Srpaulofail: 2810251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 2811251538Srpaulo return (error); 2812251538Srpaulo} 2813251538Srpaulo 2814264912Skevlostatic __inline int 2815251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 2816251538Srpaulo{ 2817291698Savos usb_error_t usb_err; 2818291695Savos int error; 2819281069Srpaulo 2820291695Savos /* Initialize LLT table. */ 2821291695Savos error = urtwn_llt_init(sc); 2822291695Savos if (error != 0) 2823291695Savos return (error); 2824291695Savos 2825291695Savos error = sc->sc_dma_init(sc); 2826291695Savos if (error != 0) 2827291695Savos return (error); 2828291695Savos 2829291695Savos /* Set Tx/Rx transfer page size. */ 2830291698Savos usb_err = urtwn_write_1(sc, R92C_PBP, 2831291695Savos SM(R92C_PBP_PSRX, R92C_PBP_128) | 2832291695Savos SM(R92C_PBP_PSTX, R92C_PBP_128)); 2833291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 2834291698Savos return (EIO); 2835291695Savos 2836291695Savos return (0); 2837264912Skevlo} 2838264912Skevlo 2839264912Skevlostatic int 2840264912Skevlourtwn_r92c_dma_init(struct urtwn_softc *sc) 2841264912Skevlo{ 2842251538Srpaulo int hashq, hasnq, haslq, nqueues, nqpages, nrempages; 2843291698Savos usb_error_t error; 2844251538Srpaulo uint32_t reg; 2845251538Srpaulo 2846251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 2847251538Srpaulo hashq = hasnq = haslq = 0; 2848251538Srpaulo reg = urtwn_read_2(sc, R92C_USB_EP + 1); 2849251538Srpaulo DPRINTFN(2, "USB endpoints mapping 0x%x\n", reg); 2850251538Srpaulo if (MS(reg, R92C_USB_EP_HQ) != 0) 2851251538Srpaulo hashq = 1; 2852251538Srpaulo if (MS(reg, R92C_USB_EP_NQ) != 0) 2853251538Srpaulo hasnq = 1; 2854251538Srpaulo if (MS(reg, R92C_USB_EP_LQ) != 0) 2855251538Srpaulo haslq = 1; 2856251538Srpaulo nqueues = hashq + hasnq + haslq; 2857251538Srpaulo if (nqueues == 0) 2858251538Srpaulo return (EIO); 2859251538Srpaulo /* Get the number of pages for each queue. */ 2860251538Srpaulo nqpages = (R92C_TX_PAGE_COUNT - R92C_PUBQ_NPAGES) / nqueues; 2861251538Srpaulo /* The remaining pages are assigned to the high priority queue. */ 2862251538Srpaulo nrempages = (R92C_TX_PAGE_COUNT - R92C_PUBQ_NPAGES) % nqueues; 2863251538Srpaulo 2864251538Srpaulo /* Set number of pages for normal priority queue. */ 2865291698Savos error = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 2866291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2867291698Savos return (EIO); 2868291698Savos error = urtwn_write_4(sc, R92C_RQPN, 2869251538Srpaulo /* Set number of pages for public queue. */ 2870251538Srpaulo SM(R92C_RQPN_PUBQ, R92C_PUBQ_NPAGES) | 2871251538Srpaulo /* Set number of pages for high priority queue. */ 2872251538Srpaulo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 2873251538Srpaulo /* Set number of pages for low priority queue. */ 2874251538Srpaulo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 2875251538Srpaulo /* Load values. */ 2876251538Srpaulo R92C_RQPN_LD); 2877291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2878291698Savos return (EIO); 2879251538Srpaulo 2880291698Savos error = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2881291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2882291698Savos return (EIO); 2883291698Savos error = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2884291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2885291698Savos return (EIO); 2886291698Savos error = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, R92C_TX_PAGE_BOUNDARY); 2887291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2888291698Savos return (EIO); 2889291698Savos error = urtwn_write_1(sc, R92C_TRXFF_BNDY, R92C_TX_PAGE_BOUNDARY); 2890291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2891291698Savos return (EIO); 2892291698Savos error = urtwn_write_1(sc, R92C_TDECTRL + 1, R92C_TX_PAGE_BOUNDARY); 2893291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2894291698Savos return (EIO); 2895251538Srpaulo 2896251538Srpaulo /* Set queue to USB pipe mapping. */ 2897251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 2898251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 2899251538Srpaulo if (nqueues == 1) { 2900251538Srpaulo if (hashq) 2901251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 2902251538Srpaulo else if (hasnq) 2903251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 2904251538Srpaulo else 2905251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 2906251538Srpaulo } else if (nqueues == 2) { 2907251538Srpaulo /* All 2-endpoints configs have a high priority queue. */ 2908251538Srpaulo if (!hashq) 2909251538Srpaulo return (EIO); 2910251538Srpaulo if (hasnq) 2911251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 2912251538Srpaulo else 2913251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_LQ; 2914251538Srpaulo } else 2915251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 2916291698Savos error = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 2917291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2918291698Savos return (EIO); 2919251538Srpaulo 2920251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 2921291698Savos error = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 0x27ff); 2922291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2923291698Savos return (EIO); 2924251538Srpaulo 2925251538Srpaulo return (0); 2926251538Srpaulo} 2927251538Srpaulo 2928264912Skevlostatic int 2929264912Skevlourtwn_r88e_dma_init(struct urtwn_softc *sc) 2930264912Skevlo{ 2931264912Skevlo struct usb_interface *iface; 2932264912Skevlo uint32_t reg; 2933291698Savos usb_error_t error; 2934264912Skevlo int nqueues; 2935264912Skevlo 2936264912Skevlo /* Get Tx queues to USB endpoints mapping. */ 2937264912Skevlo iface = usbd_get_iface(sc->sc_udev, 0); 2938264912Skevlo nqueues = iface->idesc->bNumEndpoints - 1; 2939264912Skevlo if (nqueues == 0) 2940264912Skevlo return (EIO); 2941264912Skevlo 2942264912Skevlo /* Set number of pages for normal priority queue. */ 2943291698Savos error = urtwn_write_2(sc, R92C_RQPN_NPQ, 0x000d); 2944291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2945291698Savos return (EIO); 2946291698Savos error = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 2947291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2948291698Savos return (EIO); 2949264912Skevlo 2950291698Savos error = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, R88E_TX_PAGE_BOUNDARY); 2951291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2952291698Savos return (EIO); 2953291698Savos error = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, R88E_TX_PAGE_BOUNDARY); 2954291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2955291698Savos return (EIO); 2956291698Savos error = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, R88E_TX_PAGE_BOUNDARY); 2957291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2958291698Savos return (EIO); 2959291698Savos error = urtwn_write_1(sc, R92C_TRXFF_BNDY, R88E_TX_PAGE_BOUNDARY); 2960291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2961291698Savos return (EIO); 2962291698Savos error = urtwn_write_1(sc, R92C_TDECTRL + 1, R88E_TX_PAGE_BOUNDARY); 2963291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2964291698Savos return (EIO); 2965264912Skevlo 2966264912Skevlo /* Set queue to USB pipe mapping. */ 2967264912Skevlo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 2968264912Skevlo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 2969264912Skevlo if (nqueues == 1) 2970264912Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 2971264912Skevlo else if (nqueues == 2) 2972264912Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 2973264912Skevlo else 2974264912Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 2975291698Savos error = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 2976291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2977291698Savos return (EIO); 2978264912Skevlo 2979264912Skevlo /* Set Tx/Rx transfer page boundary. */ 2980291698Savos error = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 0x23ff); 2981291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2982291698Savos return (EIO); 2983264912Skevlo 2984264912Skevlo return (0); 2985264912Skevlo} 2986264912Skevlo 2987291698Savosstatic int 2988251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 2989251538Srpaulo{ 2990291698Savos usb_error_t error; 2991251538Srpaulo int i; 2992251538Srpaulo 2993251538Srpaulo /* Write MAC initialization values. */ 2994264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2995264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 2996291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 2997264912Skevlo rtl8188eu_mac[i].val); 2998291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2999291698Savos return (EIO); 3000264912Skevlo } 3001264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 3002264912Skevlo } else { 3003264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 3004291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 3005264912Skevlo rtl8192cu_mac[i].val); 3006291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3007291698Savos return (EIO); 3008264912Skevlo } 3009291698Savos 3010291698Savos return (0); 3011251538Srpaulo} 3012251538Srpaulo 3013251538Srpaulostatic void 3014251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 3015251538Srpaulo{ 3016251538Srpaulo const struct urtwn_bb_prog *prog; 3017251538Srpaulo uint32_t reg; 3018264912Skevlo uint8_t crystalcap; 3019251538Srpaulo int i; 3020251538Srpaulo 3021251538Srpaulo /* Enable BB and RF. */ 3022251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3023251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3024251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 3025251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 3026251538Srpaulo 3027264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 3028264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 3029251538Srpaulo 3030251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 3031251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 3032251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3033251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 3034251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 3035251538Srpaulo 3036264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3037264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 3038264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 3039264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 3040264912Skevlo } 3041251538Srpaulo 3042251538Srpaulo /* Select BB programming based on board type. */ 3043264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3044264912Skevlo prog = &rtl8188eu_bb_prog; 3045264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3046251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3047251538Srpaulo prog = &rtl8188ce_bb_prog; 3048251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3049251538Srpaulo prog = &rtl8188ru_bb_prog; 3050251538Srpaulo else 3051251538Srpaulo prog = &rtl8188cu_bb_prog; 3052251538Srpaulo } else { 3053251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3054251538Srpaulo prog = &rtl8192ce_bb_prog; 3055251538Srpaulo else 3056251538Srpaulo prog = &rtl8192cu_bb_prog; 3057251538Srpaulo } 3058251538Srpaulo /* Write BB initialization values. */ 3059251538Srpaulo for (i = 0; i < prog->count; i++) { 3060251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 3061266472Shselasky urtwn_ms_delay(sc); 3062251538Srpaulo } 3063251538Srpaulo 3064251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 3065251538Srpaulo /* 8192C 1T only configuration. */ 3066251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 3067251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 3068251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 3069251538Srpaulo 3070251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 3071251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 3072251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 3073251538Srpaulo 3074251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 3075251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 3076251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 3077251538Srpaulo 3078251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 3079251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 3080251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 3081251538Srpaulo 3082251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 3083251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 3084251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 3085251538Srpaulo 3086251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 3087251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3088251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 3089251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 3090251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3091251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 3092251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 3093251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3094251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 3095251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 3096251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3097251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 3098251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 3099251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3100251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 3101251538Srpaulo } 3102251538Srpaulo 3103251538Srpaulo /* Write AGC values. */ 3104251538Srpaulo for (i = 0; i < prog->agccount; i++) { 3105251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 3106251538Srpaulo prog->agcvals[i]); 3107266472Shselasky urtwn_ms_delay(sc); 3108251538Srpaulo } 3109251538Srpaulo 3110264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3111264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 3112266472Shselasky urtwn_ms_delay(sc); 3113264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 3114266472Shselasky urtwn_ms_delay(sc); 3115264912Skevlo 3116291264Savos crystalcap = sc->rom.r88e_rom[0xb9]; 3117264912Skevlo if (crystalcap == 0xff) 3118264912Skevlo crystalcap = 0x20; 3119264912Skevlo crystalcap &= 0x3f; 3120264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 3121264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 3122264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 3123264912Skevlo crystalcap | crystalcap << 6)); 3124264912Skevlo } else { 3125264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 3126264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 3127264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 3128264912Skevlo } 3129251538Srpaulo} 3130251538Srpaulo 3131289066Skevlostatic void 3132251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 3133251538Srpaulo{ 3134251538Srpaulo const struct urtwn_rf_prog *prog; 3135251538Srpaulo uint32_t reg, type; 3136251538Srpaulo int i, j, idx, off; 3137251538Srpaulo 3138251538Srpaulo /* Select RF programming based on board type. */ 3139264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3140264912Skevlo prog = rtl8188eu_rf_prog; 3141264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3142251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3143251538Srpaulo prog = rtl8188ce_rf_prog; 3144251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3145251538Srpaulo prog = rtl8188ru_rf_prog; 3146251538Srpaulo else 3147251538Srpaulo prog = rtl8188cu_rf_prog; 3148251538Srpaulo } else 3149251538Srpaulo prog = rtl8192ce_rf_prog; 3150251538Srpaulo 3151251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3152251538Srpaulo /* Save RF_ENV control type. */ 3153251538Srpaulo idx = i / 2; 3154251538Srpaulo off = (i % 2) * 16; 3155251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3156251538Srpaulo type = (reg >> off) & 0x10; 3157251538Srpaulo 3158251538Srpaulo /* Set RF_ENV enable. */ 3159251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3160251538Srpaulo reg |= 0x100000; 3161251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3162266472Shselasky urtwn_ms_delay(sc); 3163251538Srpaulo /* Set RF_ENV output high. */ 3164251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3165251538Srpaulo reg |= 0x10; 3166251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3167266472Shselasky urtwn_ms_delay(sc); 3168251538Srpaulo /* Set address and data lengths of RF registers. */ 3169251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3170251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 3171251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3172266472Shselasky urtwn_ms_delay(sc); 3173251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3174251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 3175251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3176266472Shselasky urtwn_ms_delay(sc); 3177251538Srpaulo 3178251538Srpaulo /* Write RF initialization values for this chain. */ 3179251538Srpaulo for (j = 0; j < prog[i].count; j++) { 3180251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 3181251538Srpaulo prog[i].regs[j] <= 0xfe) { 3182251538Srpaulo /* 3183251538Srpaulo * These are fake RF registers offsets that 3184251538Srpaulo * indicate a delay is required. 3185251538Srpaulo */ 3186266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 3187251538Srpaulo continue; 3188251538Srpaulo } 3189251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 3190251538Srpaulo prog[i].vals[j]); 3191266472Shselasky urtwn_ms_delay(sc); 3192251538Srpaulo } 3193251538Srpaulo 3194251538Srpaulo /* Restore RF_ENV control type. */ 3195251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3196251538Srpaulo reg &= ~(0x10 << off) | (type << off); 3197251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 3198251538Srpaulo 3199251538Srpaulo /* Cache RF register CHNLBW. */ 3200251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 3201251538Srpaulo } 3202251538Srpaulo 3203251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3204251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 3205251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 3206251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 3207251538Srpaulo } 3208251538Srpaulo} 3209251538Srpaulo 3210251538Srpaulostatic void 3211251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 3212251538Srpaulo{ 3213251538Srpaulo /* Invalidate all CAM entries. */ 3214251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 3215251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 3216251538Srpaulo} 3217251538Srpaulo 3218251538Srpaulostatic void 3219251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 3220251538Srpaulo{ 3221251538Srpaulo uint8_t reg; 3222251538Srpaulo int i; 3223251538Srpaulo 3224251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3225251538Srpaulo if (sc->pa_setting & (1 << i)) 3226251538Srpaulo continue; 3227251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 3228251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 3229251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 3230251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 3231251538Srpaulo } 3232251538Srpaulo if (!(sc->pa_setting & 0x10)) { 3233251538Srpaulo reg = urtwn_read_1(sc, 0x16); 3234251538Srpaulo reg = (reg & ~0xf0) | 0x90; 3235251538Srpaulo urtwn_write_1(sc, 0x16, reg); 3236251538Srpaulo } 3237251538Srpaulo} 3238251538Srpaulo 3239251538Srpaulostatic void 3240251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 3241251538Srpaulo{ 3242290564Savos struct ieee80211com *ic = &sc->sc_ic; 3243290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3244290564Savos uint32_t rcr; 3245290564Savos uint16_t filter; 3246290564Savos 3247290564Savos URTWN_ASSERT_LOCKED(sc); 3248290564Savos 3249251538Srpaulo /* Accept all multicast frames. */ 3250251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 3251251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 3252290564Savos 3253290564Savos /* Filter for management frames. */ 3254290564Savos filter = 0x7f3f; 3255290631Savos switch (vap->iv_opmode) { 3256290631Savos case IEEE80211_M_STA: 3257290564Savos filter &= ~( 3258290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 3259290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 3260290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 3261290631Savos break; 3262290631Savos case IEEE80211_M_HOSTAP: 3263290631Savos filter &= ~( 3264290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 3265290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP) | 3266290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_BEACON)); 3267290631Savos break; 3268290631Savos case IEEE80211_M_MONITOR: 3269290651Savos case IEEE80211_M_IBSS: 3270290631Savos break; 3271290631Savos default: 3272290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3273290631Savos __func__, vap->iv_opmode); 3274290631Savos break; 3275290564Savos } 3276290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 3277290564Savos 3278251538Srpaulo /* Reject all control frames. */ 3279251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 3280290564Savos 3281290564Savos /* Reject all data frames. */ 3282290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 3283290564Savos 3284290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 3285290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 3286290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 3287290564Savos 3288290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 3289290564Savos /* Accept all frames. */ 3290290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 3291290564Savos R92C_RCR_AAP; 3292290564Savos } 3293290564Savos 3294290564Savos /* Set Rx filter. */ 3295290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3296290564Savos 3297290564Savos if (ic->ic_promisc != 0) { 3298290564Savos /* Update Rx filter. */ 3299290564Savos urtwn_set_promisc(sc); 3300290564Savos } 3301251538Srpaulo} 3302251538Srpaulo 3303251538Srpaulostatic void 3304251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 3305251538Srpaulo{ 3306251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 3307251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 3308251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 3309251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 3310251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 3311251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 3312251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 3313251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 3314251538Srpaulo} 3315251538Srpaulo 3316289066Skevlostatic void 3317251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 3318251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3319251538Srpaulo{ 3320251538Srpaulo uint32_t reg; 3321251538Srpaulo 3322251538Srpaulo /* Write per-CCK rate Tx power. */ 3323251538Srpaulo if (chain == 0) { 3324251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 3325251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 3326251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 3327251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3328251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 3329251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 3330251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 3331251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3332251538Srpaulo } else { 3333251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 3334251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 3335251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 3336251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 3337251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 3338251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3339251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 3340251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3341251538Srpaulo } 3342251538Srpaulo /* Write per-OFDM rate Tx power. */ 3343251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 3344251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 3345251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 3346251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 3347251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 3348251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 3349251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 3350251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 3351251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 3352251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 3353251538Srpaulo /* Write per-MCS Tx power. */ 3354251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 3355251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 3356251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 3357251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 3358251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 3359251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 3360251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 3361251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 3362251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 3363251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 3364251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 3365251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 3366261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 3367251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 3368251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 3369251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 3370251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 3371251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 3372251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 3373251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 3374251538Srpaulo} 3375251538Srpaulo 3376289066Skevlostatic void 3377251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 3378251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3379251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3380251538Srpaulo{ 3381287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3382291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 3383251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 3384251538Srpaulo const struct urtwn_txpwr *base; 3385251538Srpaulo int ridx, chan, group; 3386251538Srpaulo 3387251538Srpaulo /* Determine channel group. */ 3388251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3389251538Srpaulo if (chan <= 3) 3390251538Srpaulo group = 0; 3391251538Srpaulo else if (chan <= 9) 3392251538Srpaulo group = 1; 3393251538Srpaulo else 3394251538Srpaulo group = 2; 3395251538Srpaulo 3396251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 3397251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 3398251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3399251538Srpaulo base = &rtl8188ru_txagc[chain]; 3400251538Srpaulo else 3401251538Srpaulo base = &rtl8192cu_txagc[chain]; 3402251538Srpaulo } else 3403251538Srpaulo base = &rtl8192cu_txagc[chain]; 3404251538Srpaulo 3405251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3406251538Srpaulo if (sc->regulatory == 0) { 3407289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3408251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3409251538Srpaulo } 3410289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3411251538Srpaulo if (sc->regulatory == 3) { 3412251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3413251538Srpaulo /* Apply vendor limits. */ 3414251538Srpaulo if (extc != NULL) 3415251538Srpaulo max = rom->ht40_max_pwr[group]; 3416251538Srpaulo else 3417251538Srpaulo max = rom->ht20_max_pwr[group]; 3418251538Srpaulo max = (max >> (chain * 4)) & 0xf; 3419251538Srpaulo if (power[ridx] > max) 3420251538Srpaulo power[ridx] = max; 3421251538Srpaulo } else if (sc->regulatory == 1) { 3422251538Srpaulo if (extc == NULL) 3423251538Srpaulo power[ridx] = base->pwr[group][ridx]; 3424251538Srpaulo } else if (sc->regulatory != 2) 3425251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3426251538Srpaulo } 3427251538Srpaulo 3428251538Srpaulo /* Compute per-CCK rate Tx power. */ 3429251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 3430289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3431251538Srpaulo power[ridx] += cckpow; 3432251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3433251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3434251538Srpaulo } 3435251538Srpaulo 3436251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 3437251538Srpaulo if (sc->ntxchains > 1) { 3438251538Srpaulo /* Apply reduction for 2 spatial streams. */ 3439251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 3440251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3441251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 3442251538Srpaulo } 3443251538Srpaulo 3444251538Srpaulo /* Compute per-OFDM rate Tx power. */ 3445251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 3446251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3447251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 3448289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3449251538Srpaulo power[ridx] += ofdmpow; 3450251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3451251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3452251538Srpaulo } 3453251538Srpaulo 3454251538Srpaulo /* Compute per-MCS Tx power. */ 3455251538Srpaulo if (extc == NULL) { 3456251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 3457251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3458251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 3459251538Srpaulo } 3460251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 3461251538Srpaulo power[ridx] += htpow; 3462251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3463251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3464251538Srpaulo } 3465251538Srpaulo#ifdef URTWN_DEBUG 3466251538Srpaulo if (urtwn_debug >= 4) { 3467251538Srpaulo /* Dump per-rate Tx power values. */ 3468251538Srpaulo printf("Tx power for chain %d:\n", chain); 3469289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 3470251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 3471251538Srpaulo } 3472251538Srpaulo#endif 3473251538Srpaulo} 3474251538Srpaulo 3475289066Skevlostatic void 3476264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 3477264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3478264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 3479264912Skevlo{ 3480287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3481264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 3482264912Skevlo const struct urtwn_r88e_txpwr *base; 3483264912Skevlo int ridx, chan, group; 3484264912Skevlo 3485264912Skevlo /* Determine channel group. */ 3486264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3487264912Skevlo if (chan <= 2) 3488264912Skevlo group = 0; 3489264912Skevlo else if (chan <= 5) 3490264912Skevlo group = 1; 3491264912Skevlo else if (chan <= 8) 3492264912Skevlo group = 2; 3493264912Skevlo else if (chan <= 11) 3494264912Skevlo group = 3; 3495264912Skevlo else if (chan <= 13) 3496264912Skevlo group = 4; 3497264912Skevlo else 3498264912Skevlo group = 5; 3499264912Skevlo 3500264912Skevlo /* Get original Tx power based on board type and RF chain. */ 3501264912Skevlo base = &rtl8188eu_txagc[chain]; 3502264912Skevlo 3503264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3504264912Skevlo if (sc->regulatory == 0) { 3505289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3506264912Skevlo power[ridx] = base->pwr[0][ridx]; 3507264912Skevlo } 3508289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3509264912Skevlo if (sc->regulatory == 3) 3510264912Skevlo power[ridx] = base->pwr[0][ridx]; 3511264912Skevlo else if (sc->regulatory == 1) { 3512264912Skevlo if (extc == NULL) 3513264912Skevlo power[ridx] = base->pwr[group][ridx]; 3514264912Skevlo } else if (sc->regulatory != 2) 3515264912Skevlo power[ridx] = base->pwr[0][ridx]; 3516264912Skevlo } 3517264912Skevlo 3518264912Skevlo /* Compute per-CCK rate Tx power. */ 3519264912Skevlo cckpow = sc->cck_tx_pwr[group]; 3520289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3521264912Skevlo power[ridx] += cckpow; 3522264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3523264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3524264912Skevlo } 3525264912Skevlo 3526264912Skevlo htpow = sc->ht40_tx_pwr[group]; 3527264912Skevlo 3528264912Skevlo /* Compute per-OFDM rate Tx power. */ 3529264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 3530289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3531264912Skevlo power[ridx] += ofdmpow; 3532264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3533264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3534264912Skevlo } 3535264912Skevlo 3536264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 3537264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 3538264912Skevlo power[ridx] += bw20pow; 3539264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3540264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3541264912Skevlo } 3542264912Skevlo} 3543264912Skevlo 3544289066Skevlostatic void 3545251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 3546251538Srpaulo struct ieee80211_channel *extc) 3547251538Srpaulo{ 3548251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 3549251538Srpaulo int i; 3550251538Srpaulo 3551251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 3552251538Srpaulo /* Compute per-rate Tx power values. */ 3553264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3554264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 3555264912Skevlo else 3556264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 3557251538Srpaulo /* Write per-rate Tx power values to hardware. */ 3558251538Srpaulo urtwn_write_txpower(sc, i, power); 3559251538Srpaulo } 3560251538Srpaulo} 3561251538Srpaulo 3562251538Srpaulostatic void 3563290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 3564290048Savos{ 3565290048Savos uint32_t reg; 3566290048Savos 3567290048Savos reg = urtwn_read_4(sc, R92C_RCR); 3568290048Savos if (enable) 3569290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 3570290048Savos else 3571290048Savos reg |= R92C_RCR_CBSSID_BCN; 3572290048Savos urtwn_write_4(sc, R92C_RCR, reg); 3573290048Savos} 3574290048Savos 3575290048Savosstatic void 3576290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 3577290048Savos{ 3578290048Savos uint32_t reg; 3579290048Savos 3580290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 3581290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 3582290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 3583290048Savos 3584290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 3585290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 3586290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 3587290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 3588290048Savos } 3589290048Savos} 3590290048Savos 3591290048Savosstatic void 3592251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 3593251538Srpaulo{ 3594290048Savos struct urtwn_softc *sc = ic->ic_softc; 3595290048Savos 3596290048Savos URTWN_LOCK(sc); 3597290048Savos /* Receive beacons / probe responses from any BSSID. */ 3598290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 3599290651Savos urtwn_set_rx_bssid_all(sc, 1); 3600290651Savos 3601290048Savos /* Set gain for scanning. */ 3602290048Savos urtwn_set_gain(sc, 0x20); 3603290048Savos URTWN_UNLOCK(sc); 3604251538Srpaulo} 3605251538Srpaulo 3606251538Srpaulostatic void 3607251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 3608251538Srpaulo{ 3609290048Savos struct urtwn_softc *sc = ic->ic_softc; 3610290048Savos 3611290048Savos URTWN_LOCK(sc); 3612290048Savos /* Restore limitations. */ 3613290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 3614290564Savos urtwn_set_rx_bssid_all(sc, 0); 3615290651Savos 3616290048Savos /* Set gain under link. */ 3617290048Savos urtwn_set_gain(sc, 0x32); 3618290048Savos URTWN_UNLOCK(sc); 3619251538Srpaulo} 3620251538Srpaulo 3621251538Srpaulostatic void 3622251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 3623251538Srpaulo{ 3624286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3625281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3626251538Srpaulo 3627251538Srpaulo URTWN_LOCK(sc); 3628281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 3629281070Srpaulo /* Make link LED blink during scan. */ 3630281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 3631281070Srpaulo } 3632251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 3633251538Srpaulo URTWN_UNLOCK(sc); 3634251538Srpaulo} 3635251538Srpaulo 3636251538Srpaulostatic void 3637290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 3638290564Savos{ 3639290564Savos struct ieee80211com *ic = &sc->sc_ic; 3640290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3641290564Savos uint32_t rcr, mask1, mask2; 3642290564Savos 3643290564Savos URTWN_ASSERT_LOCKED(sc); 3644290564Savos 3645290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 3646290564Savos return; 3647290564Savos 3648290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 3649290564Savos mask2 = R92C_RCR_APM; 3650290564Savos 3651290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 3652290564Savos switch (vap->iv_opmode) { 3653290564Savos case IEEE80211_M_STA: 3654290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 3655290631Savos /* FALLTHROUGH */ 3656290631Savos case IEEE80211_M_HOSTAP: 3657290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 3658290564Savos break; 3659290651Savos case IEEE80211_M_IBSS: 3660290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 3661290651Savos break; 3662290564Savos default: 3663290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3664290564Savos __func__, vap->iv_opmode); 3665290564Savos return; 3666290564Savos } 3667290564Savos } 3668290564Savos 3669290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 3670290564Savos if (ic->ic_promisc == 0) 3671290564Savos rcr = (rcr & ~mask1) | mask2; 3672290564Savos else 3673290564Savos rcr = (rcr & ~mask2) | mask1; 3674290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3675290564Savos} 3676290564Savos 3677290564Savosstatic void 3678290564Savosurtwn_update_promisc(struct ieee80211com *ic) 3679290564Savos{ 3680290564Savos struct urtwn_softc *sc = ic->ic_softc; 3681290564Savos 3682290564Savos URTWN_LOCK(sc); 3683290564Savos if (sc->sc_flags & URTWN_RUNNING) 3684290564Savos urtwn_set_promisc(sc); 3685290564Savos URTWN_UNLOCK(sc); 3686290564Savos} 3687290564Savos 3688290564Savosstatic void 3689283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 3690251538Srpaulo{ 3691251538Srpaulo /* XXX do nothing? */ 3692251538Srpaulo} 3693251538Srpaulo 3694251538Srpaulostatic void 3695251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 3696251538Srpaulo struct ieee80211_channel *extc) 3697251538Srpaulo{ 3698287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3699251538Srpaulo uint32_t reg; 3700251538Srpaulo u_int chan; 3701251538Srpaulo int i; 3702251538Srpaulo 3703251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3704251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 3705251538Srpaulo device_printf(sc->sc_dev, 3706251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 3707251538Srpaulo return; 3708251538Srpaulo } 3709251538Srpaulo 3710251538Srpaulo /* Set Tx power for this new channel. */ 3711251538Srpaulo urtwn_set_txpower(sc, c, extc); 3712251538Srpaulo 3713251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3714251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 3715251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 3716251538Srpaulo } 3717251538Srpaulo#ifndef IEEE80211_NO_HT 3718251538Srpaulo if (extc != NULL) { 3719251538Srpaulo /* Is secondary channel below or above primary? */ 3720251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 3721251538Srpaulo 3722251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 3723251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 3724251538Srpaulo 3725251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 3726251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 3727251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 3728251538Srpaulo 3729251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3730251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 3731251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3732251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 3733251538Srpaulo 3734251538Srpaulo /* Set CCK side band. */ 3735251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 3736251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 3737251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 3738251538Srpaulo 3739251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 3740251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 3741251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 3742251538Srpaulo 3743251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 3744251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 3745251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 3746251538Srpaulo 3747251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 3748251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 3749251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 3750251538Srpaulo 3751251538Srpaulo /* Select 40MHz bandwidth. */ 3752251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3753251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 3754251538Srpaulo } else 3755251538Srpaulo#endif 3756251538Srpaulo { 3757251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 3758251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 3759251538Srpaulo 3760251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3761251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 3762251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3763251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 3764251538Srpaulo 3765264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3766264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 3767264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 3768264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 3769264912Skevlo } 3770281069Srpaulo 3771251538Srpaulo /* Select 20MHz bandwidth. */ 3772251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3773281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 3774264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 3775264912Skevlo R92C_RF_CHNLBW_BW20)); 3776251538Srpaulo } 3777251538Srpaulo} 3778251538Srpaulo 3779251538Srpaulostatic void 3780251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 3781251538Srpaulo{ 3782251538Srpaulo /* TODO */ 3783251538Srpaulo} 3784251538Srpaulo 3785251538Srpaulostatic void 3786251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 3787251538Srpaulo{ 3788251538Srpaulo uint32_t rf_ac[2]; 3789251538Srpaulo uint8_t txmode; 3790251538Srpaulo int i; 3791251538Srpaulo 3792251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 3793251538Srpaulo if ((txmode & 0x70) != 0) { 3794251538Srpaulo /* Disable all continuous Tx. */ 3795251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 3796251538Srpaulo 3797251538Srpaulo /* Set RF mode to standby mode. */ 3798251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3799251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 3800251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 3801251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 3802251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 3803251538Srpaulo } 3804251538Srpaulo } else { 3805251538Srpaulo /* Block all Tx queues. */ 3806251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0xff); 3807251538Srpaulo } 3808251538Srpaulo /* Start calibration. */ 3809251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3810251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 3811251538Srpaulo 3812251538Srpaulo /* Give calibration the time to complete. */ 3813266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 3814251538Srpaulo 3815251538Srpaulo /* Restore configuration. */ 3816251538Srpaulo if ((txmode & 0x70) != 0) { 3817251538Srpaulo /* Restore Tx mode. */ 3818251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 3819251538Srpaulo /* Restore RF mode. */ 3820251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 3821251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 3822251538Srpaulo } else { 3823251538Srpaulo /* Unblock all Tx queues. */ 3824251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 3825251538Srpaulo } 3826251538Srpaulo} 3827251538Srpaulo 3828291698Savosstatic int 3829287197Sglebiusurtwn_init(struct urtwn_softc *sc) 3830251538Srpaulo{ 3831287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3832287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3833287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 3834251538Srpaulo uint32_t reg; 3835291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 3836251538Srpaulo int error; 3837251538Srpaulo 3838291698Savos URTWN_LOCK(sc); 3839291698Savos if (sc->sc_flags & URTWN_RUNNING) { 3840291698Savos URTWN_UNLOCK(sc); 3841291698Savos return (0); 3842291698Savos } 3843264864Skevlo 3844251538Srpaulo /* Init firmware commands ring. */ 3845251538Srpaulo sc->fwcur = 0; 3846251538Srpaulo 3847251538Srpaulo /* Allocate Tx/Rx buffers. */ 3848251538Srpaulo error = urtwn_alloc_rx_list(sc); 3849251538Srpaulo if (error != 0) 3850251538Srpaulo goto fail; 3851281069Srpaulo 3852251538Srpaulo error = urtwn_alloc_tx_list(sc); 3853251538Srpaulo if (error != 0) 3854251538Srpaulo goto fail; 3855251538Srpaulo 3856251538Srpaulo /* Power on adapter. */ 3857251538Srpaulo error = urtwn_power_on(sc); 3858251538Srpaulo if (error != 0) 3859251538Srpaulo goto fail; 3860251538Srpaulo 3861251538Srpaulo /* Initialize DMA. */ 3862251538Srpaulo error = urtwn_dma_init(sc); 3863251538Srpaulo if (error != 0) 3864251538Srpaulo goto fail; 3865251538Srpaulo 3866251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 3867251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 3868251538Srpaulo 3869251538Srpaulo /* Init interrupts. */ 3870264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3871291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 3872291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3873291698Savos goto fail; 3874291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 3875264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 3876291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3877291698Savos goto fail; 3878291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 3879264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 3880291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3881291698Savos goto fail; 3882291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 3883264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 3884264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 3885291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3886291698Savos goto fail; 3887264912Skevlo } else { 3888291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 3889291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3890291698Savos goto fail; 3891291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 3892291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3893291698Savos goto fail; 3894264912Skevlo } 3895251538Srpaulo 3896251538Srpaulo /* Set MAC address. */ 3897287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 3898291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 3899291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3900291698Savos goto fail; 3901251538Srpaulo 3902251538Srpaulo /* Set initial network type. */ 3903289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 3904251538Srpaulo 3905290564Savos /* Initialize Rx filter. */ 3906251538Srpaulo urtwn_rxfilter_init(sc); 3907251538Srpaulo 3908282623Skevlo /* Set response rate. */ 3909251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 3910251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 3911251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 3912251538Srpaulo 3913251538Srpaulo /* Set short/long retry limits. */ 3914251538Srpaulo urtwn_write_2(sc, R92C_RL, 3915251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 3916251538Srpaulo 3917251538Srpaulo /* Initialize EDCA parameters. */ 3918251538Srpaulo urtwn_edca_init(sc); 3919251538Srpaulo 3920251538Srpaulo /* Setup rate fallback. */ 3921264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3922264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 3923264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 3924264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 3925264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 3926264912Skevlo } 3927251538Srpaulo 3928251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 3929251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 3930251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 3931251538Srpaulo /* Set ACK timeout. */ 3932251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 3933251538Srpaulo 3934251538Srpaulo /* Setup USB aggregation. */ 3935251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 3936251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 3937251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 3938251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 3939251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 3940251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 3941251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 3942264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3943264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 3944282266Skevlo else { 3945264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 3946282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 3947282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 3948282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 3949282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 3950282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 3951282266Skevlo } 3952251538Srpaulo 3953251538Srpaulo /* Initialize beacon parameters. */ 3954264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 3955251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 3956251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 3957251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 3958251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 3959251538Srpaulo 3960264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3961264912Skevlo /* Setup AMPDU aggregation. */ 3962264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 3963264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 3964264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 3965251538Srpaulo 3966264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 3967264912Skevlo } 3968251538Srpaulo 3969251538Srpaulo /* Load 8051 microcode. */ 3970251538Srpaulo error = urtwn_load_firmware(sc); 3971251538Srpaulo if (error != 0) 3972251538Srpaulo goto fail; 3973251538Srpaulo 3974251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 3975291698Savos error = urtwn_mac_init(sc); 3976291698Savos if (error != 0) { 3977291698Savos device_printf(sc->sc_dev, 3978291698Savos "%s: error while initializing MAC block\n", __func__); 3979291698Savos goto fail; 3980291698Savos } 3981251538Srpaulo urtwn_bb_init(sc); 3982251538Srpaulo urtwn_rf_init(sc); 3983251538Srpaulo 3984290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 3985290564Savos urtwn_rxfilter_init(sc); 3986290564Savos 3987264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3988264912Skevlo urtwn_write_2(sc, R92C_CR, 3989264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 3990264912Skevlo R92C_CR_MACRXEN); 3991264912Skevlo } 3992264912Skevlo 3993251538Srpaulo /* Turn CCK and OFDM blocks on. */ 3994251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 3995251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 3996291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 3997291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 3998291698Savos goto fail; 3999251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4000251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 4001291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4002291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4003291698Savos goto fail; 4004251538Srpaulo 4005251538Srpaulo /* Clear per-station keys table. */ 4006251538Srpaulo urtwn_cam_init(sc); 4007251538Srpaulo 4008251538Srpaulo /* Enable hardware sequence numbering. */ 4009251538Srpaulo urtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); 4010251538Srpaulo 4011251538Srpaulo /* Perform LO and IQ calibrations. */ 4012251538Srpaulo urtwn_iq_calib(sc); 4013251538Srpaulo /* Perform LC calibration. */ 4014251538Srpaulo urtwn_lc_calib(sc); 4015251538Srpaulo 4016251538Srpaulo /* Fix USB interference issue. */ 4017264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4018264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 4019264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 4020264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 4021251538Srpaulo 4022264912Skevlo urtwn_pa_bias_init(sc); 4023264912Skevlo } 4024251538Srpaulo 4025251538Srpaulo /* Initialize GPIO setting. */ 4026251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 4027251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 4028251538Srpaulo 4029251538Srpaulo /* Fix for lower temperature. */ 4030264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4031264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4032251538Srpaulo 4033251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 4034251538Srpaulo 4035287197Sglebius sc->sc_flags |= URTWN_RUNNING; 4036251538Srpaulo 4037251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4038251538Srpaulofail: 4039291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4040291698Savos error = EIO; 4041291698Savos 4042291698Savos URTWN_UNLOCK(sc); 4043291698Savos 4044291698Savos return (error); 4045251538Srpaulo} 4046251538Srpaulo 4047251538Srpaulostatic void 4048287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 4049251538Srpaulo{ 4050251538Srpaulo 4051291698Savos URTWN_LOCK(sc); 4052291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 4053291698Savos URTWN_UNLOCK(sc); 4054291698Savos return; 4055291698Savos } 4056291698Savos 4057287197Sglebius sc->sc_flags &= ~URTWN_RUNNING; 4058251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 4059251538Srpaulo urtwn_abort_xfers(sc); 4060288353Sadrian 4061288353Sadrian urtwn_drain_mbufq(sc); 4062291698Savos URTWN_UNLOCK(sc); 4063251538Srpaulo} 4064251538Srpaulo 4065251538Srpaulostatic void 4066251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 4067251538Srpaulo{ 4068251538Srpaulo int i; 4069251538Srpaulo 4070251538Srpaulo URTWN_ASSERT_LOCKED(sc); 4071251538Srpaulo 4072251538Srpaulo /* abort any pending transfers */ 4073251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 4074251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 4075251538Srpaulo} 4076251538Srpaulo 4077251538Srpaulostatic int 4078251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 4079251538Srpaulo const struct ieee80211_bpf_params *params) 4080251538Srpaulo{ 4081251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 4082286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4083251538Srpaulo struct urtwn_data *bf; 4084290630Savos int error; 4085251538Srpaulo 4086251538Srpaulo /* prevent management frames from being sent if we're not ready */ 4087290630Savos URTWN_LOCK(sc); 4088287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 4089290630Savos error = ENETDOWN; 4090290630Savos goto end; 4091251538Srpaulo } 4092290630Savos 4093251538Srpaulo bf = urtwn_getbuf(sc); 4094251538Srpaulo if (bf == NULL) { 4095290630Savos error = ENOBUFS; 4096290630Savos goto end; 4097251538Srpaulo } 4098251538Srpaulo 4099290630Savos if ((error = urtwn_tx_data(sc, ni, m, bf)) != 0) { 4100251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 4101290630Savos goto end; 4102251538Srpaulo } 4103290630Savos 4104288353Sadrian sc->sc_txtimer = 5; 4105290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4106290630Savos 4107290630Savosend: 4108290630Savos if (error != 0) 4109290630Savos m_freem(m); 4110290630Savos 4111251538Srpaulo URTWN_UNLOCK(sc); 4112251538Srpaulo 4113290630Savos return (error); 4114251538Srpaulo} 4115251538Srpaulo 4116266472Shselaskystatic void 4117266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 4118266472Shselasky{ 4119266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 4120266472Shselasky} 4121266472Shselasky 4122251538Srpaulostatic device_method_t urtwn_methods[] = { 4123251538Srpaulo /* Device interface */ 4124251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 4125251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 4126251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 4127251538Srpaulo 4128264912Skevlo DEVMETHOD_END 4129251538Srpaulo}; 4130251538Srpaulo 4131251538Srpaulostatic driver_t urtwn_driver = { 4132251538Srpaulo "urtwn", 4133251538Srpaulo urtwn_methods, 4134251538Srpaulo sizeof(struct urtwn_softc) 4135251538Srpaulo}; 4136251538Srpaulo 4137251538Srpaulostatic devclass_t urtwn_devclass; 4138251538Srpaulo 4139251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 4140251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 4141251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 4142251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 4143251538SrpauloMODULE_VERSION(urtwn, 1); 4144