1/*-
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: stable/11/sys/dev/uart/uart.h 340145 2018-11-04 23:28:56Z mmacy $
27 */
28
29#ifndef _DEV_UART_H_
30#define _DEV_UART_H_
31
32/*
33 * Bus access structure. This structure holds the minimum information needed
34 * to access the UART. The rclk field, although not important to actually
35 * access the UART, is important for baudrate programming, delay loops and
36 * other timing related computations.
37 */
38struct uart_bas {
39	bus_space_tag_t bst;
40	bus_space_handle_t bsh;
41	u_int	chan;
42	u_int	rclk;
43	u_int	regshft;
44	u_int	regiowidth;
45	u_int	busy_detect;
46};
47
48#define	uart_regofs(bas, reg)		((reg) << (bas)->regshft)
49#define	uart_regiowidth(bas)		((bas)->regiowidth)
50
51#define	uart_getreg(bas, reg)		\
52	bus_space_read_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
53#define	uart_setreg(bas, reg, value)	\
54	bus_space_write_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
55
56/*
57 * XXX we don't know the length of the bus space address range in use by
58 * the UART. Since barriers don't use the length field currently, we put
59 * a zero there for now.
60 */
61#define uart_barrier(bas)		\
62	bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0,		\
63	    BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
64
65/*
66 * UART device classes.
67 */
68struct uart_class;
69
70extern struct uart_class uart_ns8250_class __attribute__((weak));
71extern struct uart_class uart_quicc_class __attribute__((weak));
72extern struct uart_class uart_s3c2410_class __attribute__((weak));
73extern struct uart_class uart_sab82532_class __attribute__((weak));
74extern struct uart_class uart_sbbc_class __attribute__((weak));
75extern struct uart_class uart_z8530_class __attribute__((weak));
76
77#ifdef PC98
78struct uart_class *uart_pc98_getdev(u_long port);
79#endif
80
81/*
82 * Device flags.
83 */
84#define	UART_FLAGS_CONSOLE(f)		((f) & 0x10)
85#define	UART_FLAGS_DBGPORT(f)		((f) & 0x80)
86#define	UART_FLAGS_FCR_RX_LOW(f)	((f) & 0x100)
87#define	UART_FLAGS_FCR_RX_MEDL(f)	((f) & 0x200)
88#define	UART_FLAGS_FCR_RX_MEDH(f)	((f) & 0x400)
89#define	UART_FLAGS_FCR_RX_HIGH(f)	((f) & 0x800)
90
91/*
92 * Data parity values (magical numbers related to ns8250).
93 */
94#define	UART_PARITY_NONE		0
95#define	UART_PARITY_ODD			1
96#define	UART_PARITY_EVEN		3
97#define	UART_PARITY_MARK		5
98#define	UART_PARITY_SPACE		7
99
100#endif /* _DEV_UART_H_ */
101