twe_freebsd.c revision 126080
1/*-
2 * Copyright (c) 2000 Michael Smith
3 * Copyright (c) 2003 Paul Saab
4 * Copyright (c) 2003 Vinod Kashyap
5 * Copyright (c) 2000 BSDi
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: head/sys/dev/twe/twe_freebsd.c 126080 2004-02-21 21:10:55Z phk $
30 */
31
32/*
33 * FreeBSD-specific code.
34 */
35
36#include <dev/twe/twe_compat.h>
37#include <dev/twe/twereg.h>
38#include <dev/twe/tweio.h>
39#include <dev/twe/twevar.h>
40#include <dev/twe/twe_tables.h>
41
42#include <vm/vm.h>
43
44static devclass_t	twe_devclass;
45
46#ifdef TWE_DEBUG
47static u_int32_t	twed_bio_in;
48#define TWED_BIO_IN	twed_bio_in++
49static u_int32_t	twed_bio_out;
50#define TWED_BIO_OUT	twed_bio_out++
51#else
52#define TWED_BIO_IN
53#define TWED_BIO_OUT
54#endif
55
56static void	twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
57static void	twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
58
59/********************************************************************************
60 ********************************************************************************
61                                                         Control device interface
62 ********************************************************************************
63 ********************************************************************************/
64
65static	d_open_t		twe_open;
66static	d_close_t		twe_close;
67static	d_ioctl_t		twe_ioctl_wrapper;
68
69static struct cdevsw twe_cdevsw = {
70	.d_version =	D_VERSION,
71	.d_flags =	D_NEEDGIANT,
72	.d_open =	twe_open,
73	.d_close =	twe_close,
74	.d_ioctl =	twe_ioctl_wrapper,
75	.d_name =	"twe",
76};
77
78/********************************************************************************
79 * Accept an open operation on the control device.
80 */
81static int
82twe_open(dev_t dev, int flags, int fmt, d_thread_t *td)
83{
84    int			unit = minor(dev);
85    struct twe_softc	*sc = devclass_get_softc(twe_devclass, unit);
86
87    sc->twe_state |= TWE_STATE_OPEN;
88    return(0);
89}
90
91/********************************************************************************
92 * Accept the last close on the control device.
93 */
94static int
95twe_close(dev_t dev, int flags, int fmt, d_thread_t *td)
96{
97    int			unit = minor(dev);
98    struct twe_softc	*sc = devclass_get_softc(twe_devclass, unit);
99
100    sc->twe_state &= ~TWE_STATE_OPEN;
101    return (0);
102}
103
104/********************************************************************************
105 * Handle controller-specific control operations.
106 */
107static int
108twe_ioctl_wrapper(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td)
109{
110    struct twe_softc		*sc = (struct twe_softc *)dev->si_drv1;
111
112    return(twe_ioctl(sc, cmd, addr));
113}
114
115/********************************************************************************
116 ********************************************************************************
117                                                             PCI device interface
118 ********************************************************************************
119 ********************************************************************************/
120
121static int	twe_probe(device_t dev);
122static int	twe_attach(device_t dev);
123static void	twe_free(struct twe_softc *sc);
124static int	twe_detach(device_t dev);
125static int	twe_shutdown(device_t dev);
126static int	twe_suspend(device_t dev);
127static int	twe_resume(device_t dev);
128static void	twe_pci_intr(void *arg);
129static void	twe_intrhook(void *arg);
130
131static device_method_t twe_methods[] = {
132    /* Device interface */
133    DEVMETHOD(device_probe,	twe_probe),
134    DEVMETHOD(device_attach,	twe_attach),
135    DEVMETHOD(device_detach,	twe_detach),
136    DEVMETHOD(device_shutdown,	twe_shutdown),
137    DEVMETHOD(device_suspend,	twe_suspend),
138    DEVMETHOD(device_resume,	twe_resume),
139
140    DEVMETHOD(bus_print_child,	bus_generic_print_child),
141    DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
142    { 0, 0 }
143};
144
145static driver_t twe_pci_driver = {
146	"twe",
147	twe_methods,
148	sizeof(struct twe_softc)
149};
150
151DRIVER_MODULE(twe, pci, twe_pci_driver, twe_devclass, 0, 0);
152
153/********************************************************************************
154 * Match a 3ware Escalade ATA RAID controller.
155 */
156static int
157twe_probe(device_t dev)
158{
159
160    debug_called(4);
161
162    if ((pci_get_vendor(dev) == TWE_VENDOR_ID) &&
163	((pci_get_device(dev) == TWE_DEVICE_ID) ||
164	 (pci_get_device(dev) == TWE_DEVICE_ID_ASIC))) {
165	device_set_desc_copy(dev, TWE_DEVICE_NAME ". Driver version " TWE_DRIVER_VERSION_STRING);
166	return(0);
167    }
168    return(ENXIO);
169}
170
171/********************************************************************************
172 * Allocate resources, initialise the controller.
173 */
174static int
175twe_attach(device_t dev)
176{
177    struct twe_softc	*sc;
178    int			rid, error;
179    u_int32_t		command;
180
181    debug_called(4);
182
183    /*
184     * Initialise the softc structure.
185     */
186    sc = device_get_softc(dev);
187    sc->twe_dev = dev;
188
189    sysctl_ctx_init(&sc->sysctl_ctx);
190    sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
191	SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
192	device_get_nameunit(dev), CTLFLAG_RD, 0, "");
193    if (sc->sysctl_tree == NULL) {
194	twe_printf(sc, "cannot add sysctl tree node\n");
195	return (ENXIO);
196    }
197    SYSCTL_ADD_STRING(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
198	OID_AUTO, "driver_version", CTLFLAG_RD, TWE_DRIVER_VERSION_STRING, 0,
199	"TWE driver version");
200
201    /*
202     * Make sure we are going to be able to talk to this board.
203     */
204    command = pci_read_config(dev, PCIR_COMMAND, 2);
205    if ((command & PCIM_CMD_PORTEN) == 0) {
206	twe_printf(sc, "register window not available\n");
207	return(ENXIO);
208    }
209    /*
210     * Force the busmaster enable bit on, in case the BIOS forgot.
211     */
212    command |= PCIM_CMD_BUSMASTEREN;
213    pci_write_config(dev, PCIR_COMMAND, command, 2);
214
215    /*
216     * Allocate the PCI register window.
217     */
218    rid = TWE_IO_CONFIG_REG;
219    if ((sc->twe_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE)) == NULL) {
220	twe_printf(sc, "can't allocate register window\n");
221	twe_free(sc);
222	return(ENXIO);
223    }
224    sc->twe_btag = rman_get_bustag(sc->twe_io);
225    sc->twe_bhandle = rman_get_bushandle(sc->twe_io);
226
227    /*
228     * Allocate the parent bus DMA tag appropriate for PCI.
229     */
230    if (bus_dma_tag_create(NULL, 				/* parent */
231			   1, 0, 				/* alignment, boundary */
232			   BUS_SPACE_MAXADDR_32BIT, 		/* lowaddr */
233			   BUS_SPACE_MAXADDR, 			/* highaddr */
234			   NULL, NULL, 				/* filter, filterarg */
235			   MAXBSIZE, TWE_MAX_SGL_LENGTH,	/* maxsize, nsegments */
236			   BUS_SPACE_MAXSIZE_32BIT,		/* maxsegsize */
237			   BUS_DMA_ALLOCNOW,			/* flags */
238			   NULL,				/* lockfunc */
239			   NULL,				/* lockarg */
240			   &sc->twe_parent_dmat)) {
241	twe_printf(sc, "can't allocate parent DMA tag\n");
242	twe_free(sc);
243	return(ENOMEM);
244    }
245
246    /*
247     * Allocate and connect our interrupt.
248     */
249    rid = 0;
250    if ((sc->twe_irq = bus_alloc_resource(sc->twe_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
251	twe_printf(sc, "can't allocate interrupt\n");
252	twe_free(sc);
253	return(ENXIO);
254    }
255    if (bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO | INTR_ENTROPY,  twe_pci_intr, sc, &sc->twe_intr)) {
256	twe_printf(sc, "can't set up interrupt\n");
257	twe_free(sc);
258	return(ENXIO);
259    }
260
261    /*
262     * Create DMA tag for mapping command's into controller-addressable space.
263     */
264    if (bus_dma_tag_create(sc->twe_parent_dmat, 	/* parent */
265			   1, 0, 			/* alignment, boundary */
266			   BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
267			   BUS_SPACE_MAXADDR, 		/* highaddr */
268			   NULL, NULL, 			/* filter, filterarg */
269			   sizeof(TWE_Command) *
270			   TWE_Q_LENGTH, 1,		/* maxsize, nsegments */
271			   BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
272			   BUS_DMA_ALLOCNOW,		/* flags */
273			   NULL,			/* lockfunc */
274			   NULL,			/* lockarg */
275			   &sc->twe_cmd_dmat)) {
276	twe_printf(sc, "can't allocate data buffer DMA tag\n");
277	twe_free(sc);
278	return(ENOMEM);
279    }
280    /*
281     * Allocate memory and make it available for DMA.
282     */
283    if (bus_dmamem_alloc(sc->twe_cmd_dmat, (void **)&sc->twe_cmd,
284			 BUS_DMA_NOWAIT, &sc->twe_cmdmap)) {
285	twe_printf(sc, "can't allocate command memory\n");
286	return(ENOMEM);
287    }
288    bus_dmamap_load(sc->twe_cmd_dmat, sc->twe_cmdmap, sc->twe_cmd,
289		    sizeof(TWE_Command) * TWE_Q_LENGTH,
290		    twe_setup_request_dmamap, sc, 0);
291    bzero(sc->twe_cmd, sizeof(TWE_Command) * TWE_Q_LENGTH);
292
293    /*
294     * Create DMA tag for mapping objects into controller-addressable space.
295     */
296    if (bus_dma_tag_create(sc->twe_parent_dmat, 	/* parent */
297			   1, 0, 			/* alignment, boundary */
298			   BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
299			   BUS_SPACE_MAXADDR, 		/* highaddr */
300			   NULL, NULL, 			/* filter, filterarg */
301			   MAXBSIZE, TWE_MAX_SGL_LENGTH,/* maxsize, nsegments */
302			   BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
303			   0,				/* flags */
304			   busdma_lock_mutex,		/* lockfunc */
305			   &Giant,			/* lockarg */
306			   &sc->twe_buffer_dmat)) {
307	twe_printf(sc, "can't allocate data buffer DMA tag\n");
308	twe_free(sc);
309	return(ENOMEM);
310    }
311
312    /*
313     * Create DMA tag for mapping objects into controller-addressable space.
314     */
315    if (bus_dma_tag_create(sc->twe_parent_dmat, 	/* parent */
316			   1, 0, 			/* alignment, boundary */
317			   BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
318			   BUS_SPACE_MAXADDR, 		/* highaddr */
319			   NULL, NULL, 			/* filter, filterarg */
320			   MAXBSIZE, 1,			/* maxsize, nsegments */
321			   BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
322			   BUS_DMA_ALLOCNOW,		/* flags */
323			   NULL,			/* lockfunc */
324			   NULL,			/* lockarg */
325			   &sc->twe_immediate_dmat)) {
326	twe_printf(sc, "can't allocate data buffer DMA tag\n");
327	twe_free(sc);
328	return(ENOMEM);
329    }
330    /*
331     * Allocate memory for requests which cannot sleep or support continuation.
332     */
333     if (bus_dmamem_alloc(sc->twe_immediate_dmat, (void **)&sc->twe_immediate,
334			  BUS_DMA_NOWAIT, &sc->twe_immediate_map)) {
335	twe_printf(sc, "can't allocate memory for immediate requests\n");
336	return(ENOMEM);
337     }
338
339    /*
340     * Initialise the controller and driver core.
341     */
342    if ((error = twe_setup(sc))) {
343	twe_free(sc);
344	return(error);
345    }
346
347    /*
348     * Print some information about the controller and configuration.
349     */
350    twe_describe_controller(sc);
351
352    /*
353     * Create the control device.
354     */
355    sc->twe_dev_t = make_dev(&twe_cdevsw, device_get_unit(sc->twe_dev), UID_ROOT, GID_OPERATOR,
356			     S_IRUSR | S_IWUSR, "twe%d", device_get_unit(sc->twe_dev));
357    sc->twe_dev_t->si_drv1 = sc;
358    /*
359     * Schedule ourselves to bring the controller up once interrupts are available.
360     * This isn't strictly necessary, since we disable interrupts while probing the
361     * controller, but it is more in keeping with common practice for other disk
362     * devices.
363     */
364    sc->twe_ich.ich_func = twe_intrhook;
365    sc->twe_ich.ich_arg = sc;
366    if (config_intrhook_establish(&sc->twe_ich) != 0) {
367	twe_printf(sc, "can't establish configuration hook\n");
368	twe_free(sc);
369	return(ENXIO);
370    }
371
372    return(0);
373}
374
375/********************************************************************************
376 * Free all of the resources associated with (sc).
377 *
378 * Should not be called if the controller is active.
379 */
380static void
381twe_free(struct twe_softc *sc)
382{
383    struct twe_request	*tr;
384
385    debug_called(4);
386
387    /* throw away any command buffers */
388    while ((tr = twe_dequeue_free(sc)) != NULL)
389	twe_free_request(tr);
390
391    if (sc->twe_cmd != NULL) {
392	bus_dmamap_unload(sc->twe_cmd_dmat, sc->twe_cmdmap);
393	bus_dmamem_free(sc->twe_cmd_dmat, sc->twe_cmd, sc->twe_cmdmap);
394    }
395
396    if (sc->twe_immediate != NULL) {
397	bus_dmamap_unload(sc->twe_immediate_dmat, sc->twe_immediate_map);
398	bus_dmamem_free(sc->twe_immediate_dmat, sc->twe_immediate,
399			sc->twe_immediate_map);
400    }
401
402    if (sc->twe_immediate_dmat)
403	bus_dma_tag_destroy(sc->twe_immediate_dmat);
404
405    /* destroy the data-transfer DMA tag */
406    if (sc->twe_buffer_dmat)
407	bus_dma_tag_destroy(sc->twe_buffer_dmat);
408
409    /* disconnect the interrupt handler */
410    if (sc->twe_intr)
411	bus_teardown_intr(sc->twe_dev, sc->twe_irq, sc->twe_intr);
412    if (sc->twe_irq != NULL)
413	bus_release_resource(sc->twe_dev, SYS_RES_IRQ, 0, sc->twe_irq);
414
415    /* destroy the parent DMA tag */
416    if (sc->twe_parent_dmat)
417	bus_dma_tag_destroy(sc->twe_parent_dmat);
418
419    /* release the register window mapping */
420    if (sc->twe_io != NULL)
421	bus_release_resource(sc->twe_dev, SYS_RES_IOPORT, TWE_IO_CONFIG_REG, sc->twe_io);
422
423    /* destroy control device */
424    if (sc->twe_dev_t != (dev_t)NULL)
425	destroy_dev(sc->twe_dev_t);
426
427    sysctl_ctx_free(&sc->sysctl_ctx);
428}
429
430/********************************************************************************
431 * Disconnect from the controller completely, in preparation for unload.
432 */
433static int
434twe_detach(device_t dev)
435{
436    struct twe_softc	*sc = device_get_softc(dev);
437    int			s, error;
438
439    debug_called(4);
440
441    error = EBUSY;
442    s = splbio();
443    if (sc->twe_state & TWE_STATE_OPEN)
444	goto out;
445
446    /*
447     * Shut the controller down.
448     */
449    if (twe_shutdown(dev))
450	goto out;
451
452    twe_free(sc);
453
454    error = 0;
455 out:
456    splx(s);
457    return(error);
458}
459
460/********************************************************************************
461 * Bring the controller down to a dormant state and detach all child devices.
462 *
463 * Note that we can assume that the bioq on the controller is empty, as we won't
464 * allow shutdown if any device is open.
465 */
466static int
467twe_shutdown(device_t dev)
468{
469    struct twe_softc	*sc = device_get_softc(dev);
470    int			i, s, error = 0;
471
472    debug_called(4);
473
474    s = splbio();
475
476    /*
477     * Delete all our child devices.
478     */
479    for (i = 0; i < TWE_MAX_UNITS; i++) {
480	if (sc->twe_drive[i].td_disk != 0) {
481	    if ((error = twe_detach_drive(sc, i)) != 0)
482		goto out;
483	}
484    }
485
486    /*
487     * Bring the controller down.
488     */
489    twe_deinit(sc);
490
491out:
492    splx(s);
493    return(error);
494}
495
496/********************************************************************************
497 * Bring the controller to a quiescent state, ready for system suspend.
498 */
499static int
500twe_suspend(device_t dev)
501{
502    struct twe_softc	*sc = device_get_softc(dev);
503    int			s;
504
505    debug_called(4);
506
507    s = splbio();
508    sc->twe_state |= TWE_STATE_SUSPEND;
509
510    twe_disable_interrupts(sc);
511    splx(s);
512
513    return(0);
514}
515
516/********************************************************************************
517 * Bring the controller back to a state ready for operation.
518 */
519static int
520twe_resume(device_t dev)
521{
522    struct twe_softc	*sc = device_get_softc(dev);
523
524    debug_called(4);
525
526    sc->twe_state &= ~TWE_STATE_SUSPEND;
527    twe_enable_interrupts(sc);
528
529    return(0);
530}
531
532/*******************************************************************************
533 * Take an interrupt, or be poked by other code to look for interrupt-worthy
534 * status.
535 */
536static void
537twe_pci_intr(void *arg)
538{
539    twe_intr((struct twe_softc *)arg);
540}
541
542/********************************************************************************
543 * Delayed-startup hook
544 */
545static void
546twe_intrhook(void *arg)
547{
548    struct twe_softc		*sc = (struct twe_softc *)arg;
549
550    /* pull ourselves off the intrhook chain */
551    config_intrhook_disestablish(&sc->twe_ich);
552
553    /* call core startup routine */
554    twe_init(sc);
555}
556
557/********************************************************************************
558 * Given a detected drive, attach it to the bio interface.
559 *
560 * This is called from twe_add_unit.
561 */
562int
563twe_attach_drive(struct twe_softc *sc, struct twe_drive *dr)
564{
565    char	buf[80];
566    int		error;
567
568    dr->td_disk =  device_add_child(sc->twe_dev, NULL, -1);
569    if (dr->td_disk == NULL) {
570	twe_printf(sc, "Cannot add unit\n");
571	return (EIO);
572    }
573    device_set_ivars(dr->td_disk, dr);
574
575    /*
576     * XXX It would make sense to test the online/initialising bits, but they seem to be
577     * always set...
578     */
579    sprintf(buf, "Unit %d, %s, %s",
580	    dr->td_twe_unit,
581	    twe_describe_code(twe_table_unittype, dr->td_type),
582	    twe_describe_code(twe_table_unitstate, dr->td_state & TWE_PARAM_UNITSTATUS_MASK));
583    device_set_desc_copy(dr->td_disk, buf);
584
585    if ((error = bus_generic_attach(sc->twe_dev)) != 0) {
586	twe_printf(sc, "Cannot attach unit to controller. error = %d\n", error);
587	return (EIO);
588    }
589    return (0);
590}
591
592/********************************************************************************
593 * Detach the specified unit if it exsists
594 *
595 * This is called from twe_del_unit.
596 */
597int
598twe_detach_drive(struct twe_softc *sc, int unit)
599{
600    int error = 0;
601
602    if ((error = device_delete_child(sc->twe_dev, sc->twe_drive[unit].td_disk)) != 0) {
603	twe_printf(sc, "failed to delete unit %d\n", unit);
604	return(error);
605    }
606    bzero(&sc->twe_drive[unit], sizeof(sc->twe_drive[unit]));
607    return(error);
608}
609
610/********************************************************************************
611 * Clear a PCI parity error.
612 */
613void
614twe_clear_pci_parity_error(struct twe_softc *sc)
615{
616    TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PARITY_ERROR);
617    pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2);
618}
619
620/********************************************************************************
621 * Clear a PCI abort.
622 */
623void
624twe_clear_pci_abort(struct twe_softc *sc)
625{
626    TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PCI_ABORT);
627    pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2);
628}
629
630/********************************************************************************
631 ********************************************************************************
632                                                                      Disk device
633 ********************************************************************************
634 ********************************************************************************/
635
636/*
637 * Disk device softc
638 */
639struct twed_softc
640{
641    device_t		twed_dev;
642    struct twe_softc	*twed_controller;	/* parent device softc */
643    struct twe_drive	*twed_drive;		/* drive data in parent softc */
644    struct disk		*twed_disk;		/* generic disk handle */
645};
646
647/*
648 * Disk device bus interface
649 */
650static int twed_probe(device_t dev);
651static int twed_attach(device_t dev);
652static int twed_detach(device_t dev);
653
654static device_method_t twed_methods[] = {
655    DEVMETHOD(device_probe,	twed_probe),
656    DEVMETHOD(device_attach,	twed_attach),
657    DEVMETHOD(device_detach,	twed_detach),
658    { 0, 0 }
659};
660
661static driver_t twed_driver = {
662    "twed",
663    twed_methods,
664    sizeof(struct twed_softc)
665};
666
667static devclass_t	twed_devclass;
668DRIVER_MODULE(twed, twe, twed_driver, twed_devclass, 0, 0);
669
670/*
671 * Disk device control interface.
672 */
673
674#ifdef FREEBSD_4
675static int		disks_registered = 0;
676#endif
677
678/********************************************************************************
679 * Handle open from generic layer.
680 *
681 * Note that this is typically only called by the diskslice code, and not
682 * for opens on subdevices (eg. slices, partitions).
683 */
684static int
685twed_open(struct disk *dp)
686{
687    struct twed_softc	*sc = (struct twed_softc *)dp->d_drv1;
688
689    debug_called(4);
690
691    if (sc == NULL)
692	return (ENXIO);
693
694    /* check that the controller is up and running */
695    if (sc->twed_controller->twe_state & TWE_STATE_SHUTDOWN)
696	return(ENXIO);
697
698    return (0);
699}
700
701/********************************************************************************
702 * Handle an I/O request.
703 */
704static void
705twed_strategy(twe_bio *bp)
706{
707    struct twed_softc	*sc = (struct twed_softc *)TWE_BIO_SOFTC(bp);
708
709    debug_called(4);
710
711    bp->bio_driver1 = &sc->twed_drive->td_twe_unit;
712    TWED_BIO_IN;
713
714    /* bogus disk? */
715    if (sc == NULL || sc->twed_drive->td_disk == NULL) {
716	TWE_BIO_SET_ERROR(bp, EINVAL);
717	printf("twe: bio for invalid disk!\n");
718	TWE_BIO_DONE(bp);
719	TWED_BIO_OUT;
720	return;
721    }
722
723    /* perform accounting */
724    TWE_BIO_STATS_START(bp);
725
726    /* queue the bio on the controller */
727    twe_enqueue_bio(sc->twed_controller, bp);
728
729    /* poke the controller to start I/O */
730    twe_startio(sc->twed_controller);
731    return;
732}
733
734/********************************************************************************
735 * System crashdump support
736 */
737static int
738twed_dump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t length)
739{
740    struct twed_softc	*twed_sc;
741    struct twe_softc	*twe_sc;
742    int			error;
743    struct disk		*dp;
744
745    dp = arg;
746    twed_sc = (struct twed_softc *)dp->d_drv1;
747    twe_sc  = (struct twe_softc *)twed_sc->twed_controller;
748    if (!twed_sc || !twe_sc)
749	return(ENXIO);
750
751    if (length > 0) {
752	if ((error = twe_dump_blocks(twe_sc, twed_sc->twed_drive->td_twe_unit, offset / TWE_BLOCK_SIZE, virtual, length / TWE_BLOCK_SIZE)) != 0)
753	    return(error);
754    }
755    return(0);
756}
757
758/********************************************************************************
759 * Handle completion of an I/O request.
760 */
761void
762twed_intr(twe_bio *bp)
763{
764    debug_called(4);
765
766    /* if no error, transfer completed */
767    if (!TWE_BIO_HAS_ERROR(bp))
768	TWE_BIO_RESID(bp) = 0;
769
770    TWE_BIO_STATS_END(bp);
771    TWE_BIO_DONE(bp);
772    TWED_BIO_OUT;
773}
774
775/********************************************************************************
776 * Default probe stub.
777 */
778static int
779twed_probe(device_t dev)
780{
781    return (0);
782}
783
784/********************************************************************************
785 * Attach a unit to the controller.
786 */
787static int
788twed_attach(device_t dev)
789{
790    struct twed_softc	*sc;
791    device_t		parent;
792
793    debug_called(4);
794
795    /* initialise our softc */
796    sc = device_get_softc(dev);
797    parent = device_get_parent(dev);
798    sc->twed_controller = (struct twe_softc *)device_get_softc(parent);
799    sc->twed_drive = device_get_ivars(dev);
800    sc->twed_dev = dev;
801
802    /* report the drive */
803    twed_printf(sc, "%uMB (%u sectors)\n",
804		sc->twed_drive->td_size / ((1024 * 1024) / TWE_BLOCK_SIZE),
805		sc->twed_drive->td_size);
806
807    /* attach a generic disk device to ourselves */
808
809    sc->twed_drive->td_sys_unit = device_get_unit(dev);
810
811    sc->twed_disk = disk_alloc();
812    sc->twed_disk->d_open = twed_open;
813    sc->twed_disk->d_strategy = twed_strategy;
814    sc->twed_disk->d_dump = (dumper_t *)twed_dump;
815    sc->twed_disk->d_name = "twed";
816    sc->twed_disk->d_drv1 = sc;
817    sc->twed_disk->d_maxsize = (TWE_MAX_SGL_LENGTH - 1) * PAGE_SIZE;
818    sc->twed_disk->d_sectorsize = TWE_BLOCK_SIZE;
819    sc->twed_disk->d_mediasize = TWE_BLOCK_SIZE * (off_t)sc->twed_drive->td_size;
820    sc->twed_disk->d_fwsectors = sc->twed_drive->td_sectors;
821    sc->twed_disk->d_fwheads = sc->twed_drive->td_heads;
822    sc->twed_disk->d_unit = sc->twed_drive->td_sys_unit;
823    sc->twed_disk->d_flags = DISKFLAG_NEEDSGIANT;
824
825    disk_create(sc->twed_disk, DISK_VERSION);
826
827#ifdef FREEBSD_4
828    disks_registered++;
829#endif
830
831    /* set the maximum I/O size to the theoretical maximum allowed by the S/G list size */
832
833    return (0);
834}
835
836/********************************************************************************
837 * Disconnect ourselves from the system.
838 */
839static int
840twed_detach(device_t dev)
841{
842    struct twed_softc *sc = (struct twed_softc *)device_get_softc(dev);
843
844    debug_called(4);
845
846    if (sc->twed_disk->d_flags & DISKFLAG_OPEN)
847	return(EBUSY);
848
849    disk_destroy(sc->twed_disk);
850
851#ifdef FREEBSD_4
852    if (--disks_registered == 0)
853	cdevsw_remove(&tweddisk_cdevsw);
854#endif
855    return(0);
856}
857
858/********************************************************************************
859 ********************************************************************************
860                                                                             Misc
861 ********************************************************************************
862 ********************************************************************************/
863
864/********************************************************************************
865 * Allocate a command buffer
866 */
867MALLOC_DEFINE(TWE_MALLOC_CLASS, "twe commands", "twe commands");
868
869struct twe_request *
870twe_allocate_request(struct twe_softc *sc, int tag)
871{
872    struct twe_request	*tr;
873
874    if ((tr = malloc(sizeof(struct twe_request), TWE_MALLOC_CLASS, M_WAITOK)) == NULL) {
875	twe_printf(sc, "unable to allocate memory for tag %d\n", tag);
876	return(NULL);
877    }
878    bzero(tr, sizeof(*tr));
879    tr->tr_sc = sc;
880    tr->tr_tag = tag;
881    if (bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_dmamap)) {
882	twe_free_request(tr);
883	twe_printf(sc, "unable to allocate dmamap for tag %d\n", tag);
884	return(NULL);
885    }
886    return(tr);
887}
888
889/********************************************************************************
890 * Permanently discard a command buffer.
891 */
892void
893twe_free_request(struct twe_request *tr)
894{
895    struct twe_softc	*sc = tr->tr_sc;
896
897    debug_called(4);
898
899    bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_dmamap);
900    free(tr, TWE_MALLOC_CLASS);
901}
902
903/********************************************************************************
904 * Map/unmap (tr)'s command and data in the controller's addressable space.
905 *
906 * These routines ensure that the data which the controller is going to try to
907 * access is actually visible to the controller, in a machine-independant
908 * fashion.  Due to a hardware limitation, I/O buffers must be 512-byte aligned
909 * and we take care of that here as well.
910 */
911static void
912twe_fillin_sgl(TWE_SG_Entry *sgl, bus_dma_segment_t *segs, int nsegments, int max_sgl)
913{
914    int i;
915
916    for (i = 0; i < nsegments; i++) {
917	sgl[i].address = segs[i].ds_addr;
918	sgl[i].length = segs[i].ds_len;
919    }
920    for (; i < max_sgl; i++) {				/* XXX necessary? */
921	sgl[i].address = 0;
922	sgl[i].length = 0;
923    }
924}
925
926static void
927twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
928{
929    struct twe_request	*tr = (struct twe_request *)arg;
930    struct twe_softc	*sc = tr->tr_sc;
931    TWE_Command		*cmd = TWE_FIND_COMMAND(tr);
932
933    debug_called(4);
934
935    if (tr->tr_flags & TWE_CMD_MAPPED)
936	panic("already mapped command");
937
938    tr->tr_flags |= TWE_CMD_MAPPED;
939
940    /* save base of first segment in command (applicable if there only one segment) */
941    tr->tr_dataphys = segs[0].ds_addr;
942
943    /* correct command size for s/g list size */
944    cmd->generic.size += 2 * nsegments;
945
946    /*
947     * Due to the fact that parameter and I/O commands have the scatter/gather list in
948     * different places, we need to determine which sort of command this actually is
949     * before we can populate it correctly.
950     */
951    switch(cmd->generic.opcode) {
952    case TWE_OP_GET_PARAM:
953    case TWE_OP_SET_PARAM:
954	cmd->generic.sgl_offset = 2;
955	twe_fillin_sgl(&cmd->param.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
956	break;
957    case TWE_OP_READ:
958    case TWE_OP_WRITE:
959	cmd->generic.sgl_offset = 3;
960	twe_fillin_sgl(&cmd->io.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
961	break;
962    case TWE_OP_ATA_PASSTHROUGH:
963	cmd->generic.sgl_offset = 5;
964	twe_fillin_sgl(&cmd->ata.sgl[0], segs, nsegments, TWE_MAX_ATA_SGL_LENGTH);
965	break;
966    default:
967	/*
968	 * Fall back to what the linux driver does.
969	 * Do this because the API may send an opcode
970	 * the driver knows nothing about and this will
971	 * at least stop PCIABRT's from hosing us.
972	 */
973	switch (cmd->generic.sgl_offset) {
974	case 2:
975	    twe_fillin_sgl(&cmd->param.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
976	    break;
977	case 3:
978	    twe_fillin_sgl(&cmd->io.sgl[0], segs, nsegments, TWE_MAX_SGL_LENGTH);
979	    break;
980	case 5:
981	    twe_fillin_sgl(&cmd->ata.sgl[0], segs, nsegments, TWE_MAX_ATA_SGL_LENGTH);
982	    break;
983	}
984    }
985
986    if (tr->tr_flags & TWE_CMD_DATAIN) {
987	if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
988	    bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
989			    BUS_DMASYNC_PREREAD);
990	} else {
991	    bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
992			    BUS_DMASYNC_PREREAD);
993	}
994    }
995
996    if (tr->tr_flags & TWE_CMD_DATAOUT) {
997	/*
998	 * if we're using an alignment buffer, and we're writing data
999	 * copy the real data out
1000	 */
1001	if (tr->tr_flags & TWE_CMD_ALIGNBUF)
1002	    bcopy(tr->tr_realdata, tr->tr_data, tr->tr_length);
1003
1004	if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1005	    bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1006			    BUS_DMASYNC_PREWRITE);
1007	} else {
1008	    bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1009			    BUS_DMASYNC_PREWRITE);
1010	}
1011    }
1012
1013    if (twe_start(tr) == EBUSY)
1014	twe_requeue_ready(tr);
1015}
1016
1017static void
1018twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1019{
1020    struct twe_softc	*sc = (struct twe_softc *)arg;
1021
1022    debug_called(4);
1023
1024    /* command can't cross a page boundary */
1025    sc->twe_cmdphys = segs[0].ds_addr;
1026}
1027
1028int
1029twe_map_request(struct twe_request *tr)
1030{
1031    struct twe_softc	*sc = tr->tr_sc;
1032    int			error = 0;
1033
1034    debug_called(4);
1035
1036    if (sc->twe_state & TWE_STATE_FRZN)
1037	return (EBUSY);
1038
1039    bus_dmamap_sync(sc->twe_cmd_dmat, sc->twe_cmdmap, BUS_DMASYNC_PREWRITE);
1040
1041    /*
1042     * If the command involves data, map that too.
1043     */
1044    if (tr->tr_data != NULL && ((tr->tr_flags & TWE_CMD_MAPPED) == 0)) {
1045
1046	/*
1047	 * Data must be 64-byte aligned; allocate a fixup buffer if it's not.
1048	 */
1049	if (((vm_offset_t)tr->tr_data % TWE_ALIGNMENT) != 0) {
1050	    tr->tr_realdata = tr->tr_data;				/* save pointer to 'real' data */
1051	    tr->tr_flags |= TWE_CMD_ALIGNBUF;
1052	    tr->tr_data = malloc(tr->tr_length, TWE_MALLOC_CLASS, M_NOWAIT);	/* XXX check result here */
1053	}
1054
1055	/*
1056	 * Map the data buffer into bus space and build the s/g list.
1057	*/
1058	if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1059	    bcopy(tr->tr_data, sc->twe_immediate, tr->tr_length);
1060	    bus_dmamap_load(sc->twe_immediate_dmat, sc->twe_immediate_map, sc->twe_immediate,
1061			    tr->tr_length, twe_setup_data_dmamap, tr, 0);
1062	} else {
1063	    error = bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_dmamap, tr->tr_data, tr->tr_length,
1064				    twe_setup_data_dmamap, tr, 0);
1065	}
1066	if (error == EINPROGRESS) {
1067	    sc->twe_state |= TWE_STATE_FRZN;
1068	    error = 0;
1069	}
1070    } else
1071	error = twe_start(tr);
1072
1073    return(error);
1074}
1075
1076void
1077twe_unmap_request(struct twe_request *tr)
1078{
1079    struct twe_softc	*sc = tr->tr_sc;
1080
1081    debug_called(4);
1082
1083    bus_dmamap_sync(sc->twe_cmd_dmat, sc->twe_cmdmap, BUS_DMASYNC_POSTWRITE);
1084
1085    /*
1086     * If the command involved data, unmap that too.
1087     */
1088    if (tr->tr_data != NULL) {
1089	if (tr->tr_flags & TWE_CMD_DATAIN) {
1090	    if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1091		bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1092				BUS_DMASYNC_POSTREAD);
1093	    } else {
1094		bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1095				BUS_DMASYNC_POSTREAD);
1096	    }
1097
1098	    /* if we're using an alignment buffer, and we're reading data, copy the real data in */
1099	    if (tr->tr_flags & TWE_CMD_ALIGNBUF)
1100		bcopy(tr->tr_data, tr->tr_realdata, tr->tr_length);
1101	}
1102	if (tr->tr_flags & TWE_CMD_DATAOUT) {
1103	    if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1104		bus_dmamap_sync(sc->twe_immediate_dmat, sc->twe_immediate_map,
1105				BUS_DMASYNC_POSTWRITE);
1106	    } else {
1107		bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap,
1108				BUS_DMASYNC_POSTWRITE);
1109	    }
1110	}
1111
1112	if (tr->tr_flags & TWE_CMD_IMMEDIATE) {
1113	    bcopy(sc->twe_immediate, tr->tr_data, tr->tr_length);
1114	    bus_dmamap_unload(sc->twe_immediate_dmat, sc->twe_immediate_map);
1115	} else {
1116	    bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_dmamap);
1117	}
1118    }
1119
1120    /* free alignment buffer if it was used */
1121    if (tr->tr_flags & TWE_CMD_ALIGNBUF) {
1122	free(tr->tr_data, TWE_MALLOC_CLASS);
1123	tr->tr_data = tr->tr_realdata;		/* restore 'real' data pointer */
1124    }
1125}
1126
1127#ifdef TWE_DEBUG
1128/********************************************************************************
1129 * Print current controller status, call from DDB.
1130 */
1131void
1132twe_report(void)
1133{
1134    struct twe_softc	*sc;
1135    int			i, s;
1136
1137    s = splbio();
1138    for (i = 0; (sc = devclass_get_softc(twe_devclass, i)) != NULL; i++)
1139	twe_print_controller(sc);
1140    printf("twed: total bio count in %u  out %u\n", twed_bio_in, twed_bio_out);
1141    splx(s);
1142}
1143#endif
1144