sfxge.h revision 283514 
1/*-
2 * Copyright (c) 2010-2015 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright notice,
12 *    this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 *    this list of conditions and the following disclaimer in the documentation
15 *    and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
32 *
33 * $FreeBSD: head/sys/dev/sfxge/sfxge.h 283514 2015-05-25 08:34:55Z arybchik $
34 */
35
36#ifndef _SFXGE_H
37#define	_SFXGE_H
38
39#include <sys/param.h>
40#include <sys/kernel.h>
41#include <sys/socket.h>
42#include <sys/sysctl.h>
43#include <sys/sx.h>
44#include <vm/uma.h>
45
46#include <net/ethernet.h>
47#include <net/if.h>
48#include <net/if_var.h>
49#include <net/if_media.h>
50#include <net/if_types.h>
51
52#include "sfxge_ioc.h"
53
54/*
55 * Debugging
56 */
57#if 0
58#define	DBGPRINT(dev, fmt, args...) \
59	device_printf(dev, "%s: " fmt "\n", __func__, ## args)
60#else
61#define	DBGPRINT(dev, fmt, args...)
62#endif
63
64/*
65 * Backward-compatibility
66 */
67#ifndef CACHE_LINE_SIZE
68/* This should be right on most machines the driver will be used on, and
69 * we needn't care too much about wasting a few KB per interface.
70 */
71#define	CACHE_LINE_SIZE 128
72#endif
73
74#ifndef IFCAP_LINKSTATE
75#define	IFCAP_LINKSTATE 0
76#endif
77
78#ifndef IFCAP_VLAN_HWTSO
79#define	IFCAP_VLAN_HWTSO 0
80#endif
81
82#ifndef IFM_10G_T
83#define	IFM_10G_T IFM_UNKNOWN
84#endif
85
86#ifndef IFM_10G_KX4
87#define	IFM_10G_KX4 IFM_10G_CX4
88#endif
89
90#ifndef IFM_40G_CR4
91#define	IFM_40G_CR4 IFM_UNKNOWN
92#endif
93
94#if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \
95	__FreeBSD_version >= 900003
96#define	SFXGE_HAVE_DESCRIBE_INTR
97#endif
98
99#ifdef IFM_ETH_RXPAUSE
100#define	SFXGE_HAVE_PAUSE_MEDIAOPTS
101#endif
102
103#ifndef CTLTYPE_U64
104#define	CTLTYPE_U64 CTLTYPE_QUAD
105#endif
106
107#include "sfxge_rx.h"
108#include "sfxge_tx.h"
109
110#define	ROUNDUP_POW_OF_TWO(_n)	(1ULL << flsl((_n) - 1))
111
112#define	SFXGE_IP_ALIGN	2
113
114#define	SFXGE_ETHERTYPE_LOOPBACK	0x9000	/* Xerox loopback */
115
116enum sfxge_evq_state {
117	SFXGE_EVQ_UNINITIALIZED = 0,
118	SFXGE_EVQ_INITIALIZED,
119	SFXGE_EVQ_STARTING,
120	SFXGE_EVQ_STARTED
121};
122
123#define	SFXGE_EV_BATCH	16384
124
125struct sfxge_evq {
126	/* Structure members below are sorted by usage order */
127	struct sfxge_softc	*sc;
128	struct mtx		lock;
129	unsigned int		index;
130	enum sfxge_evq_state	init_state;
131	efsys_mem_t		mem;
132	efx_evq_t		*common;
133	unsigned int		read_ptr;
134	boolean_t		exception;
135	unsigned int		rx_done;
136	unsigned int		tx_done;
137
138	/* Linked list of TX queues with completions to process */
139	struct sfxge_txq	*txq;
140	struct sfxge_txq	**txqs;
141
142	/* Structure members not used on event processing path */
143	unsigned int		buf_base_id;
144	unsigned int		entries;
145	char			lock_name[SFXGE_LOCK_NAME_MAX];
146} __aligned(CACHE_LINE_SIZE);
147
148#define	SFXGE_NDESCS	1024
149#define	SFXGE_MODERATION	30
150
151enum sfxge_intr_state {
152	SFXGE_INTR_UNINITIALIZED = 0,
153	SFXGE_INTR_INITIALIZED,
154	SFXGE_INTR_TESTING,
155	SFXGE_INTR_STARTED
156};
157
158struct sfxge_intr_hdl {
159	int			eih_rid;
160	void			*eih_tag;
161	struct resource		*eih_res;
162};
163
164struct sfxge_intr {
165	enum sfxge_intr_state	state;
166	struct resource		*msix_res;
167	struct sfxge_intr_hdl	*table;
168	int			n_alloc;
169	int			type;
170	efsys_mem_t		status;
171	uint32_t		zero_count;
172};
173
174enum sfxge_mcdi_state {
175	SFXGE_MCDI_UNINITIALIZED = 0,
176	SFXGE_MCDI_INITIALIZED,
177	SFXGE_MCDI_BUSY,
178	SFXGE_MCDI_COMPLETED
179};
180
181struct sfxge_mcdi {
182	struct mtx		lock;
183	efsys_mem_t		mem;
184	enum sfxge_mcdi_state	state;
185	efx_mcdi_transport_t	transport;
186
187	/* Only used in debugging output */
188	char			lock_name[SFXGE_LOCK_NAME_MAX];
189};
190
191struct sfxge_hw_stats {
192	clock_t			update_time;
193	efsys_mem_t		dma_buf;
194	void			*decode_buf;
195};
196
197enum sfxge_port_state {
198	SFXGE_PORT_UNINITIALIZED = 0,
199	SFXGE_PORT_INITIALIZED,
200	SFXGE_PORT_STARTED
201};
202
203struct sfxge_port {
204	struct sfxge_softc	*sc;
205	struct mtx		lock;
206	enum sfxge_port_state	init_state;
207#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
208	unsigned int		wanted_fc;
209#endif
210	struct sfxge_hw_stats	phy_stats;
211	struct sfxge_hw_stats	mac_stats;
212	efx_link_mode_t		link_mode;
213	uint8_t			mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX *
214					    EFX_MAC_ADDR_LEN];
215	unsigned int		mcast_count;
216
217	/* Only used in debugging output */
218	char			lock_name[SFXGE_LOCK_NAME_MAX];
219};
220
221enum sfxge_softc_state {
222	SFXGE_UNINITIALIZED = 0,
223	SFXGE_INITIALIZED,
224	SFXGE_REGISTERED,
225	SFXGE_STARTED
226};
227
228struct sfxge_softc {
229	device_t			dev;
230	struct sx			softc_lock;
231	char				softc_lock_name[SFXGE_LOCK_NAME_MAX];
232	enum sfxge_softc_state		init_state;
233	struct ifnet			*ifnet;
234	unsigned int			if_flags;
235	struct sysctl_oid		*stats_node;
236	struct sysctl_oid		*txqs_node;
237
238	struct task			task_reset;
239
240	efx_family_t			family;
241	caddr_t				vpd_data;
242	size_t				vpd_size;
243	efx_nic_t			*enp;
244	efsys_lock_t			enp_lock;
245
246	unsigned int			rxq_entries;
247	unsigned int			txq_entries;
248
249	bus_dma_tag_t			parent_dma_tag;
250	efsys_bar_t			bar;
251
252	struct sfxge_intr		intr;
253	struct sfxge_mcdi		mcdi;
254	struct sfxge_port		port;
255	uint32_t			buffer_table_next;
256
257	struct sfxge_evq		*evq[SFXGE_RX_SCALE_MAX];
258	unsigned int			ev_moderation;
259#if EFSYS_OPT_QSTATS
260	clock_t				ev_stats_update_time;
261	uint64_t			ev_stats[EV_NQSTATS];
262#endif
263
264	unsigned int			max_rss_channels;
265	uma_zone_t			rxq_cache;
266	struct sfxge_rxq		*rxq[SFXGE_RX_SCALE_MAX];
267	unsigned int			rx_indir_table[SFXGE_RX_SCALE_MAX];
268
269	struct sfxge_txq		*txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX];
270
271	struct ifmedia			media;
272
273	size_t				rx_prefix_size;
274	size_t				rx_buffer_size;
275	size_t				rx_buffer_align;
276	uma_zone_t			rx_buffer_zone;
277
278	unsigned int			evq_max;
279	unsigned int			evq_count;
280	unsigned int			rxq_count;
281	unsigned int			txq_count;
282
283	int				tso_fw_assisted;
284};
285
286#define	SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN)
287#define	SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING)
288
289#define	SFXGE_PARAM(_name)	"hw.sfxge." #_name
290
291SYSCTL_DECL(_hw_sfxge);
292
293/*
294 * From sfxge.c.
295 */
296extern void sfxge_schedule_reset(struct sfxge_softc *sc);
297extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n,
298				     uint32_t *idp);
299
300/*
301 * From sfxge_dma.c.
302 */
303extern int sfxge_dma_init(struct sfxge_softc *sc);
304extern void sfxge_dma_fini(struct sfxge_softc *sc);
305extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len,
306			   efsys_mem_t *esmp);
307extern void sfxge_dma_free(efsys_mem_t *esmp);
308extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map,
309				     struct mbuf **mp,
310				     bus_dma_segment_t *segs,
311				     int *nsegs, int maxsegs);
312
313/*
314 * From sfxge_ev.c.
315 */
316extern int sfxge_ev_init(struct sfxge_softc *sc);
317extern void sfxge_ev_fini(struct sfxge_softc *sc);
318extern int sfxge_ev_start(struct sfxge_softc *sc);
319extern void sfxge_ev_stop(struct sfxge_softc *sc);
320extern int sfxge_ev_qpoll(struct sfxge_evq *evq);
321
322/*
323 * From sfxge_intr.c.
324 */
325extern int sfxge_intr_init(struct sfxge_softc *sc);
326extern void sfxge_intr_fini(struct sfxge_softc *sc);
327extern int sfxge_intr_start(struct sfxge_softc *sc);
328extern void sfxge_intr_stop(struct sfxge_softc *sc);
329
330/*
331 * From sfxge_mcdi.c.
332 */
333extern int sfxge_mcdi_init(struct sfxge_softc *sc);
334extern void sfxge_mcdi_fini(struct sfxge_softc *sc);
335extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip);
336
337/*
338 * From sfxge_nvram.c.
339 */
340extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip);
341
342/*
343 * From sfxge_port.c.
344 */
345extern int sfxge_port_init(struct sfxge_softc *sc);
346extern void sfxge_port_fini(struct sfxge_softc *sc);
347extern int sfxge_port_start(struct sfxge_softc *sc);
348extern void sfxge_port_stop(struct sfxge_softc *sc);
349extern void sfxge_mac_link_update(struct sfxge_softc *sc,
350				  efx_link_mode_t mode);
351extern int sfxge_mac_filter_set(struct sfxge_softc *sc);
352extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc);
353extern uint64_t sfxge_get_counter(struct ifnet *ifp, ift_counter c);
354
355#define	SFXGE_MAX_MTU (9 * 1024)
356
357#define	SFXGE_ADAPTER_LOCK_INIT(_sc, _ifname)				\
358	do {								\
359		struct sfxge_softc *__sc = (_sc);			\
360									\
361		snprintf((__sc)->softc_lock_name,			\
362			 sizeof((__sc)->softc_lock_name),		\
363			 "%s:softc", (_ifname));			\
364		sx_init(&(__sc)->softc_lock, (__sc)->softc_lock_name);	\
365	} while (B_FALSE)
366#define	SFXGE_ADAPTER_LOCK_DESTROY(_sc)					\
367	sx_destroy(&(_sc)->softc_lock)
368#define	SFXGE_ADAPTER_LOCK(_sc)						\
369	sx_xlock(&(_sc)->softc_lock)
370#define	SFXGE_ADAPTER_UNLOCK(_sc)					\
371	sx_xunlock(&(_sc)->softc_lock)
372#define	SFXGE_ADAPTER_LOCK_ASSERT_OWNED(_sc)				\
373	sx_assert(&(_sc)->softc_lock, LA_XLOCKED)
374
375#define	SFXGE_PORT_LOCK_INIT(_port, _ifname)				\
376	do {								\
377		struct sfxge_port *__port = (_port);			\
378									\
379		snprintf((__port)->lock_name,				\
380			 sizeof((__port)->lock_name),			\
381			 "%s:port", (_ifname));				\
382		mtx_init(&(__port)->lock, (__port)->lock_name,		\
383			 NULL, MTX_DEF);				\
384	} while (B_FALSE)
385#define	SFXGE_PORT_LOCK_DESTROY(_port)					\
386	mtx_destroy(&(_port)->lock)
387#define	SFXGE_PORT_LOCK(_port)						\
388	mtx_lock(&(_port)->lock)
389#define	SFXGE_PORT_UNLOCK(_port)					\
390	mtx_unlock(&(_port)->lock)
391#define	SFXGE_PORT_LOCK_ASSERT_OWNED(_port)				\
392	mtx_assert(&(_port)->lock, MA_OWNED)
393
394#define	SFXGE_MCDI_LOCK_INIT(_mcdi, _ifname)				\
395	do {								\
396		struct sfxge_mcdi  *__mcdi = (_mcdi);			\
397									\
398		snprintf((__mcdi)->lock_name,				\
399			 sizeof((__mcdi)->lock_name),			\
400			 "%s:mcdi", (_ifname));				\
401		mtx_init(&(__mcdi)->lock, (__mcdi)->lock_name,		\
402			 NULL, MTX_DEF);				\
403	} while (B_FALSE)
404#define	SFXGE_MCDI_LOCK_DESTROY(_mcdi)					\
405	mtx_destroy(&(_mcdi)->lock)
406#define	SFXGE_MCDI_LOCK(_mcdi)						\
407	mtx_lock(&(_mcdi)->lock)
408#define	SFXGE_MCDI_UNLOCK(_mcdi)					\
409	mtx_unlock(&(_mcdi)->lock)
410#define	SFXGE_MCDI_LOCK_ASSERT_OWNED(_mcdi)				\
411	mtx_assert(&(_mcdi)->lock, MA_OWNED)
412
413#define	SFXGE_EVQ_LOCK_INIT(_evq, _ifname, _evq_index)			\
414	do {								\
415		struct sfxge_evq  *__evq = (_evq);			\
416									\
417		snprintf((__evq)->lock_name,				\
418			 sizeof((__evq)->lock_name),			\
419			 "%s:evq%u", (_ifname), (_evq_index));		\
420		mtx_init(&(__evq)->lock, (__evq)->lock_name,		\
421			 NULL, MTX_DEF);				\
422	} while (B_FALSE)
423#define	SFXGE_EVQ_LOCK_DESTROY(_evq)					\
424	mtx_destroy(&(_evq)->lock)
425#define	SFXGE_EVQ_LOCK(_evq)						\
426	mtx_lock(&(_evq)->lock)
427#define	SFXGE_EVQ_UNLOCK(_evq)						\
428	mtx_unlock(&(_evq)->lock)
429#define	SFXGE_EVQ_LOCK_ASSERT_OWNED(_evq)				\
430	mtx_assert(&(_evq)->lock, MA_OWNED)
431
432#endif /* _SFXGE_H */
433