1/*- 2 * Copyright (c) 2010-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * The views and conclusions contained in the software and documentation are 30 * those of the authors and should not be interpreted as representing official 31 * policies, either expressed or implied, of the FreeBSD Project. 32 * 33 * $FreeBSD: stable/11/sys/dev/sfxge/sfxge.h 342455 2018-12-25 07:39:34Z arybchik $ 34 */ 35 36#ifndef _SFXGE_H 37#define _SFXGE_H 38 39#include <sys/param.h> 40#include <sys/kernel.h> 41#include <sys/socket.h> 42#include <sys/sysctl.h> 43#include <sys/sx.h> 44#include <vm/uma.h> 45 46#include <net/ethernet.h> 47#include <net/if.h> 48#include <net/if_var.h> 49#include <net/if_media.h> 50#include <net/if_types.h> 51 52#include "sfxge_ioc.h" 53 54/* 55 * Debugging 56 */ 57#if 0 58#define DBGPRINT(dev, fmt, args...) \ 59 device_printf(dev, "%s: " fmt "\n", __func__, ## args) 60#else 61#define DBGPRINT(dev, fmt, args...) 62#endif 63 64/* 65 * Backward-compatibility 66 */ 67#ifndef CACHE_LINE_SIZE 68/* This should be right on most machines the driver will be used on, and 69 * we needn't care too much about wasting a few KB per interface. 70 */ 71#define CACHE_LINE_SIZE 128 72#endif 73 74#ifndef IFCAP_LINKSTATE 75#define IFCAP_LINKSTATE 0 76#endif 77 78#ifndef IFCAP_VLAN_HWTSO 79#define IFCAP_VLAN_HWTSO 0 80#endif 81 82#ifndef IFM_10G_T 83#define IFM_10G_T IFM_UNKNOWN 84#endif 85 86#ifndef IFM_10G_KX4 87#define IFM_10G_KX4 IFM_10G_CX4 88#endif 89 90#ifndef IFM_40G_CR4 91#define IFM_40G_CR4 IFM_UNKNOWN 92#endif 93 94#if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \ 95 __FreeBSD_version >= 900003 96#define SFXGE_HAVE_DESCRIBE_INTR 97#endif 98 99#ifdef IFM_ETH_RXPAUSE 100#define SFXGE_HAVE_PAUSE_MEDIAOPTS 101#endif 102 103#ifndef CTLTYPE_U64 104#define CTLTYPE_U64 CTLTYPE_QUAD 105#endif 106 107#include "sfxge_rx.h" 108#include "sfxge_tx.h" 109 110#define ROUNDUP_POW_OF_TWO(_n) (1ULL << flsl((_n) - 1)) 111 112#define SFXGE_IP_ALIGN 2 113 114#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ 115 116 117#define SFXGE_MAGIC_RESERVED 0x8000 118 119#define SFXGE_MAGIC_DMAQ_LABEL_WIDTH 6 120#define SFXGE_MAGIC_DMAQ_LABEL_MASK \ 121 ((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1) 122 123enum sfxge_sw_ev { 124 SFXGE_SW_EV_RX_QFLUSH_DONE = 1, 125 SFXGE_SW_EV_RX_QFLUSH_FAILED, 126 SFXGE_SW_EV_RX_QREFILL, 127 SFXGE_SW_EV_TX_QFLUSH_DONE, 128}; 129 130#define SFXGE_SW_EV_MAGIC(_sw_ev) \ 131 (SFXGE_MAGIC_RESERVED | ((_sw_ev) << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) 132 133static inline uint16_t 134sfxge_sw_ev_mk_magic(enum sfxge_sw_ev sw_ev, unsigned int label) 135{ 136 KASSERT((label & SFXGE_MAGIC_DMAQ_LABEL_MASK) == label, 137 ("(label & SFXGE_MAGIC_DMAQ_LABEL_MASK) != label")); 138 return SFXGE_SW_EV_MAGIC(sw_ev) | label; 139} 140 141static inline uint16_t 142sfxge_sw_ev_rxq_magic(enum sfxge_sw_ev sw_ev, struct sfxge_rxq *rxq) 143{ 144 return sfxge_sw_ev_mk_magic(sw_ev, 0); 145} 146 147static inline uint16_t 148sfxge_sw_ev_txq_magic(enum sfxge_sw_ev sw_ev, struct sfxge_txq *txq) 149{ 150 return sfxge_sw_ev_mk_magic(sw_ev, txq->type); 151} 152 153enum sfxge_evq_state { 154 SFXGE_EVQ_UNINITIALIZED = 0, 155 SFXGE_EVQ_INITIALIZED, 156 SFXGE_EVQ_STARTING, 157 SFXGE_EVQ_STARTED 158}; 159 160#define SFXGE_EV_BATCH 16384 161 162#define SFXGE_STATS_UPDATE_PERIOD_MS 1000 163 164struct sfxge_evq { 165 /* Structure members below are sorted by usage order */ 166 struct sfxge_softc *sc; 167 struct mtx lock; 168 unsigned int index; 169 enum sfxge_evq_state init_state; 170 efsys_mem_t mem; 171 efx_evq_t *common; 172 unsigned int read_ptr; 173 boolean_t exception; 174 unsigned int rx_done; 175 unsigned int tx_done; 176 177 /* Linked list of TX queues with completions to process */ 178 struct sfxge_txq *txq; 179 struct sfxge_txq **txqs; 180 181 /* Structure members not used on event processing path */ 182 unsigned int buf_base_id; 183 unsigned int entries; 184 char lock_name[SFXGE_LOCK_NAME_MAX]; 185#if EFSYS_OPT_QSTATS 186 clock_t stats_update_time; 187 uint64_t stats[EV_NQSTATS]; 188#endif 189} __aligned(CACHE_LINE_SIZE); 190 191#define SFXGE_NDESCS 1024 192#define SFXGE_MODERATION 30 193 194enum sfxge_intr_state { 195 SFXGE_INTR_UNINITIALIZED = 0, 196 SFXGE_INTR_INITIALIZED, 197 SFXGE_INTR_TESTING, 198 SFXGE_INTR_STARTED 199}; 200 201struct sfxge_intr_hdl { 202 int eih_rid; 203 void *eih_tag; 204 struct resource *eih_res; 205}; 206 207struct sfxge_intr { 208 enum sfxge_intr_state state; 209 struct resource *msix_res; 210 struct sfxge_intr_hdl *table; 211 int n_alloc; 212 int type; 213 efsys_mem_t status; 214 uint32_t zero_count; 215}; 216 217enum sfxge_mcdi_state { 218 SFXGE_MCDI_UNINITIALIZED = 0, 219 SFXGE_MCDI_INITIALIZED, 220 SFXGE_MCDI_BUSY, 221 SFXGE_MCDI_COMPLETED 222}; 223 224struct sfxge_mcdi { 225 struct mtx lock; 226 efsys_mem_t mem; 227 enum sfxge_mcdi_state state; 228 efx_mcdi_transport_t transport; 229 230 /* Only used in debugging output */ 231 char lock_name[SFXGE_LOCK_NAME_MAX]; 232}; 233 234struct sfxge_hw_stats { 235 clock_t update_time; 236 efsys_mem_t dma_buf; 237 void *decode_buf; 238}; 239 240enum sfxge_port_state { 241 SFXGE_PORT_UNINITIALIZED = 0, 242 SFXGE_PORT_INITIALIZED, 243 SFXGE_PORT_STARTED 244}; 245 246struct sfxge_port { 247 struct sfxge_softc *sc; 248 struct mtx lock; 249 enum sfxge_port_state init_state; 250#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 251 unsigned int wanted_fc; 252#endif 253 struct sfxge_hw_stats phy_stats; 254 struct sfxge_hw_stats mac_stats; 255 uint16_t stats_update_period_ms; 256 efx_link_mode_t link_mode; 257 uint8_t mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX * 258 EFX_MAC_ADDR_LEN]; 259 unsigned int mcast_count; 260 261 /* Only used in debugging output */ 262 char lock_name[SFXGE_LOCK_NAME_MAX]; 263}; 264 265enum sfxge_softc_state { 266 SFXGE_UNINITIALIZED = 0, 267 SFXGE_INITIALIZED, 268 SFXGE_REGISTERED, 269 SFXGE_STARTED 270}; 271 272struct sfxge_softc { 273 device_t dev; 274 struct sx softc_lock; 275 char softc_lock_name[SFXGE_LOCK_NAME_MAX]; 276 enum sfxge_softc_state init_state; 277 struct ifnet *ifnet; 278 unsigned int if_flags; 279 struct sysctl_oid *stats_node; 280#if EFSYS_OPT_QSTATS 281 struct sysctl_oid *evqs_stats_node; 282#endif 283 struct sysctl_oid *txqs_node; 284 285 struct task task_reset; 286 287 efx_family_t family; 288 caddr_t vpd_data; 289 size_t vpd_size; 290 efx_nic_t *enp; 291 efsys_lock_t enp_lock; 292 293 boolean_t txq_dynamic_cksum_toggle_supported; 294 295 unsigned int rxq_entries; 296 unsigned int txq_entries; 297 298 bus_dma_tag_t parent_dma_tag; 299 efsys_bar_t bar; 300 301 struct sfxge_intr intr; 302 struct sfxge_mcdi mcdi; 303 struct sfxge_port port; 304 uint32_t buffer_table_next; 305 306 struct sfxge_evq *evq[SFXGE_RX_SCALE_MAX]; 307 unsigned int ev_moderation; 308#if EFSYS_OPT_QSTATS 309 clock_t ev_stats_update_time; 310 uint64_t ev_stats[EV_NQSTATS]; 311#endif 312 313 unsigned int max_rss_channels; 314 struct sfxge_rxq *rxq[SFXGE_RX_SCALE_MAX]; 315 unsigned int rx_indir_table[EFX_RSS_TBL_SIZE]; 316 317 struct sfxge_txq *txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX]; 318 319 struct ifmedia media; 320 321 size_t rx_prefix_size; 322 size_t rx_buffer_size; 323 size_t rx_buffer_align; 324 int rx_cluster_size; 325 326 unsigned int evq_max; 327 unsigned int evq_count; 328 unsigned int rxq_count; 329 unsigned int txq_count; 330 331 unsigned int tso_fw_assisted; 332#define SFXGE_FATSOV1 (1 << 0) 333#define SFXGE_FATSOV2 (1 << 1) 334 335#if EFSYS_OPT_MCDI_LOGGING 336 int mcdi_logging; 337#endif 338}; 339 340#define SFXGE_LINK_UP(sc) \ 341 ((sc)->port.link_mode != EFX_LINK_DOWN && \ 342 (sc)->port.link_mode != EFX_LINK_UNKNOWN) 343#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING) 344 345#define SFXGE_PARAM(_name) "hw.sfxge." #_name 346 347SYSCTL_DECL(_hw_sfxge); 348 349/* 350 * From sfxge.c. 351 */ 352extern void sfxge_schedule_reset(struct sfxge_softc *sc); 353extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, 354 uint32_t *idp); 355 356/* 357 * From sfxge_dma.c. 358 */ 359extern int sfxge_dma_init(struct sfxge_softc *sc); 360extern void sfxge_dma_fini(struct sfxge_softc *sc); 361extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len, 362 efsys_mem_t *esmp); 363extern void sfxge_dma_free(efsys_mem_t *esmp); 364extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map, 365 struct mbuf **mp, 366 bus_dma_segment_t *segs, 367 int *nsegs, int maxsegs); 368 369/* 370 * From sfxge_ev.c. 371 */ 372extern int sfxge_ev_init(struct sfxge_softc *sc); 373extern void sfxge_ev_fini(struct sfxge_softc *sc); 374extern int sfxge_ev_start(struct sfxge_softc *sc); 375extern void sfxge_ev_stop(struct sfxge_softc *sc); 376extern int sfxge_ev_qpoll(struct sfxge_evq *evq); 377 378/* 379 * From sfxge_intr.c. 380 */ 381extern int sfxge_intr_init(struct sfxge_softc *sc); 382extern void sfxge_intr_fini(struct sfxge_softc *sc); 383extern int sfxge_intr_start(struct sfxge_softc *sc); 384extern void sfxge_intr_stop(struct sfxge_softc *sc); 385 386/* 387 * From sfxge_mcdi.c. 388 */ 389extern int sfxge_mcdi_init(struct sfxge_softc *sc); 390extern void sfxge_mcdi_fini(struct sfxge_softc *sc); 391extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); 392 393/* 394 * From sfxge_nvram.c. 395 */ 396extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); 397 398/* 399 * From sfxge_port.c. 400 */ 401extern int sfxge_port_init(struct sfxge_softc *sc); 402extern void sfxge_port_fini(struct sfxge_softc *sc); 403extern int sfxge_port_start(struct sfxge_softc *sc); 404extern void sfxge_port_stop(struct sfxge_softc *sc); 405extern void sfxge_mac_link_update(struct sfxge_softc *sc, 406 efx_link_mode_t mode); 407extern int sfxge_mac_filter_set(struct sfxge_softc *sc); 408extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc); 409extern uint64_t sfxge_get_counter(struct ifnet *ifp, ift_counter c); 410 411#define SFXGE_MAX_MTU (9 * 1024) 412 413#define SFXGE_ADAPTER_LOCK_INIT(_sc, _ifname) \ 414 do { \ 415 struct sfxge_softc *__sc = (_sc); \ 416 \ 417 snprintf((__sc)->softc_lock_name, \ 418 sizeof((__sc)->softc_lock_name), \ 419 "%s:softc", (_ifname)); \ 420 sx_init(&(__sc)->softc_lock, (__sc)->softc_lock_name); \ 421 } while (B_FALSE) 422#define SFXGE_ADAPTER_LOCK_DESTROY(_sc) \ 423 sx_destroy(&(_sc)->softc_lock) 424#define SFXGE_ADAPTER_LOCK(_sc) \ 425 sx_xlock(&(_sc)->softc_lock) 426#define SFXGE_ADAPTER_UNLOCK(_sc) \ 427 sx_xunlock(&(_sc)->softc_lock) 428#define SFXGE_ADAPTER_LOCK_ASSERT_OWNED(_sc) \ 429 sx_assert(&(_sc)->softc_lock, LA_XLOCKED) 430 431#define SFXGE_PORT_LOCK_INIT(_port, _ifname) \ 432 do { \ 433 struct sfxge_port *__port = (_port); \ 434 \ 435 snprintf((__port)->lock_name, \ 436 sizeof((__port)->lock_name), \ 437 "%s:port", (_ifname)); \ 438 mtx_init(&(__port)->lock, (__port)->lock_name, \ 439 NULL, MTX_DEF); \ 440 } while (B_FALSE) 441#define SFXGE_PORT_LOCK_DESTROY(_port) \ 442 mtx_destroy(&(_port)->lock) 443#define SFXGE_PORT_LOCK(_port) \ 444 mtx_lock(&(_port)->lock) 445#define SFXGE_PORT_UNLOCK(_port) \ 446 mtx_unlock(&(_port)->lock) 447#define SFXGE_PORT_LOCK_ASSERT_OWNED(_port) \ 448 mtx_assert(&(_port)->lock, MA_OWNED) 449 450#define SFXGE_MCDI_LOCK_INIT(_mcdi, _ifname) \ 451 do { \ 452 struct sfxge_mcdi *__mcdi = (_mcdi); \ 453 \ 454 snprintf((__mcdi)->lock_name, \ 455 sizeof((__mcdi)->lock_name), \ 456 "%s:mcdi", (_ifname)); \ 457 mtx_init(&(__mcdi)->lock, (__mcdi)->lock_name, \ 458 NULL, MTX_DEF); \ 459 } while (B_FALSE) 460#define SFXGE_MCDI_LOCK_DESTROY(_mcdi) \ 461 mtx_destroy(&(_mcdi)->lock) 462#define SFXGE_MCDI_LOCK(_mcdi) \ 463 mtx_lock(&(_mcdi)->lock) 464#define SFXGE_MCDI_UNLOCK(_mcdi) \ 465 mtx_unlock(&(_mcdi)->lock) 466#define SFXGE_MCDI_LOCK_ASSERT_OWNED(_mcdi) \ 467 mtx_assert(&(_mcdi)->lock, MA_OWNED) 468 469#define SFXGE_EVQ_LOCK_INIT(_evq, _ifname, _evq_index) \ 470 do { \ 471 struct sfxge_evq *__evq = (_evq); \ 472 \ 473 snprintf((__evq)->lock_name, \ 474 sizeof((__evq)->lock_name), \ 475 "%s:evq%u", (_ifname), (_evq_index)); \ 476 mtx_init(&(__evq)->lock, (__evq)->lock_name, \ 477 NULL, MTX_DEF); \ 478 } while (B_FALSE) 479#define SFXGE_EVQ_LOCK_DESTROY(_evq) \ 480 mtx_destroy(&(_evq)->lock) 481#define SFXGE_EVQ_LOCK(_evq) \ 482 mtx_lock(&(_evq)->lock) 483#define SFXGE_EVQ_UNLOCK(_evq) \ 484 mtx_unlock(&(_evq)->lock) 485#define SFXGE_EVQ_LOCK_ASSERT_OWNED(_evq) \ 486 mtx_assert(&(_evq)->lock, MA_OWNED) 487 488#endif /* _SFXGE_H */ 489