sfxge.h revision 277894
1290245Sgonzo/*- 2290245Sgonzo * Copyright (c) 2010-2011 Solarflare Communications, Inc. 3290245Sgonzo * All rights reserved. 4290245Sgonzo * 5290245Sgonzo * This software was developed in part by Philip Paeps under contract for 6290245Sgonzo * Solarflare Communications, Inc. 7290245Sgonzo * 8290245Sgonzo * Redistribution and use in source and binary forms, with or without 9290245Sgonzo * modification, are permitted provided that the following conditions 10290245Sgonzo * are met: 11290245Sgonzo * 1. Redistributions of source code must retain the above copyright 12290245Sgonzo * notice, this list of conditions and the following disclaimer. 13290245Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 14290245Sgonzo * notice, this list of conditions and the following disclaimer in the 15290245Sgonzo * documentation and/or other materials provided with the distribution. 16290245Sgonzo * 17290245Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18290245Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19290245Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20290245Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21290245Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22290245Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23290245Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24290245Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25290245Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26290245Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27290245Sgonzo * SUCH DAMAGE. 28290245Sgonzo * 29290245Sgonzo * $FreeBSD: head/sys/dev/sfxge/sfxge.h 277894 2015-01-29 19:09:14Z arybchik $ 30290245Sgonzo */ 31290245Sgonzo 32290245Sgonzo#ifndef _SFXGE_H 33290245Sgonzo#define _SFXGE_H 34290245Sgonzo 35290245Sgonzo#include <sys/param.h> 36290245Sgonzo#include <sys/kernel.h> 37290245Sgonzo#include <sys/condvar.h> 38290245Sgonzo#include <sys/socket.h> 39290245Sgonzo#include <sys/sysctl.h> 40290245Sgonzo#include <sys/sx.h> 41290245Sgonzo#include <vm/uma.h> 42290245Sgonzo 43290245Sgonzo#include <net/ethernet.h> 44290245Sgonzo#include <net/if.h> 45290245Sgonzo#include <net/if_var.h> 46290245Sgonzo#include <net/if_media.h> 47290245Sgonzo#include <net/if_types.h> 48290245Sgonzo 49290245Sgonzo/* 50290245Sgonzo * Backward-compatibility 51290245Sgonzo */ 52290245Sgonzo#ifndef CACHE_LINE_SIZE 53290245Sgonzo/* This should be right on most machines the driver will be used on, and 54290245Sgonzo * we needn't care too much about wasting a few KB per interface. 55290245Sgonzo */ 56290245Sgonzo#define CACHE_LINE_SIZE 128 57290245Sgonzo#endif 58290245Sgonzo#ifndef IFCAP_LINKSTATE 59290245Sgonzo#define IFCAP_LINKSTATE 0 60290245Sgonzo#endif 61290245Sgonzo#ifndef IFCAP_VLAN_HWTSO 62290245Sgonzo#define IFCAP_VLAN_HWTSO 0 63290245Sgonzo#endif 64290245Sgonzo#ifndef IFM_10G_T 65290245Sgonzo#define IFM_10G_T IFM_UNKNOWN 66290245Sgonzo#endif 67290245Sgonzo#ifndef IFM_10G_KX4 68290245Sgonzo#define IFM_10G_KX4 IFM_10G_CX4 69290245Sgonzo#endif 70290245Sgonzo#if __FreeBSD_version >= 800054 71290245Sgonzo/* Networking core is multiqueue aware. We can manage our own TX 72290245Sgonzo * queues and use m_pkthdr.flowid. 73 */ 74#define SFXGE_HAVE_MQ 75#endif 76#if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \ 77 __FreeBSD_version >= 900003 78#define SFXGE_HAVE_DESCRIBE_INTR 79#endif 80#ifdef IFM_ETH_RXPAUSE 81#define SFXGE_HAVE_PAUSE_MEDIAOPTS 82#endif 83#ifndef CTLTYPE_U64 84#define CTLTYPE_U64 CTLTYPE_QUAD 85#endif 86 87#include "sfxge_rx.h" 88#include "sfxge_tx.h" 89 90#define ROUNDUP_POW_OF_TWO(_n) (1ULL << flsl((_n) - 1)) 91 92#define SFXGE_IP_ALIGN 2 93 94#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ 95 96enum sfxge_evq_state { 97 SFXGE_EVQ_UNINITIALIZED = 0, 98 SFXGE_EVQ_INITIALIZED, 99 SFXGE_EVQ_STARTING, 100 SFXGE_EVQ_STARTED 101}; 102 103#define SFXGE_EV_BATCH 16384 104 105struct sfxge_evq { 106 /* Structure members below are sorted by usage order */ 107 struct sfxge_softc *sc; 108 struct mtx lock; 109 unsigned int index; 110 enum sfxge_evq_state init_state; 111 efsys_mem_t mem; 112 efx_evq_t *common; 113 unsigned int read_ptr; 114 boolean_t exception; 115 unsigned int rx_done; 116 unsigned int tx_done; 117 118 /* Linked list of TX queues with completions to process */ 119 struct sfxge_txq *txq; 120 struct sfxge_txq **txqs; 121 122 /* Structure members not used on event processing path */ 123 unsigned int buf_base_id; 124 unsigned int entries; 125} __aligned(CACHE_LINE_SIZE); 126 127#define SFXGE_NDESCS 1024 128#define SFXGE_MODERATION 30 129 130enum sfxge_intr_state { 131 SFXGE_INTR_UNINITIALIZED = 0, 132 SFXGE_INTR_INITIALIZED, 133 SFXGE_INTR_TESTING, 134 SFXGE_INTR_STARTED 135}; 136 137struct sfxge_intr_hdl { 138 int eih_rid; 139 void *eih_tag; 140 struct resource *eih_res; 141}; 142 143struct sfxge_intr { 144 enum sfxge_intr_state state; 145 struct resource *msix_res; 146 struct sfxge_intr_hdl *table; 147 int n_alloc; 148 int type; 149 efsys_mem_t status; 150 uint32_t zero_count; 151}; 152 153enum sfxge_mcdi_state { 154 SFXGE_MCDI_UNINITIALIZED = 0, 155 SFXGE_MCDI_INITIALIZED, 156 SFXGE_MCDI_BUSY, 157 SFXGE_MCDI_COMPLETED 158}; 159 160struct sfxge_mcdi { 161 struct mtx lock; 162 struct cv cv; 163 enum sfxge_mcdi_state state; 164 efx_mcdi_transport_t transport; 165}; 166 167struct sfxge_hw_stats { 168 clock_t update_time; 169 efsys_mem_t dma_buf; 170 void *decode_buf; 171}; 172 173enum sfxge_port_state { 174 SFXGE_PORT_UNINITIALIZED = 0, 175 SFXGE_PORT_INITIALIZED, 176 SFXGE_PORT_STARTED 177}; 178 179struct sfxge_port { 180 struct sfxge_softc *sc; 181 struct mtx lock; 182 enum sfxge_port_state init_state; 183#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 184 unsigned int wanted_fc; 185#endif 186 struct sfxge_hw_stats phy_stats; 187 struct sfxge_hw_stats mac_stats; 188 efx_link_mode_t link_mode; 189}; 190 191enum sfxge_softc_state { 192 SFXGE_UNINITIALIZED = 0, 193 SFXGE_INITIALIZED, 194 SFXGE_REGISTERED, 195 SFXGE_STARTED 196}; 197 198struct sfxge_softc { 199 device_t dev; 200 struct sx softc_lock; 201 enum sfxge_softc_state init_state; 202 struct ifnet *ifnet; 203 unsigned int if_flags; 204 struct sysctl_oid *stats_node; 205 struct sysctl_oid *txqs_node; 206 207 struct task task_reset; 208 209 efx_family_t family; 210 caddr_t vpd_data; 211 size_t vpd_size; 212 efx_nic_t *enp; 213 struct mtx enp_lock; 214 215 unsigned int rxq_entries; 216 unsigned int txq_entries; 217 218 bus_dma_tag_t parent_dma_tag; 219 efsys_bar_t bar; 220 221 struct sfxge_intr intr; 222 struct sfxge_mcdi mcdi; 223 struct sfxge_port port; 224 uint32_t buffer_table_next; 225 226 struct sfxge_evq *evq[SFXGE_RX_SCALE_MAX]; 227 unsigned int ev_moderation; 228#if EFSYS_OPT_QSTATS 229 clock_t ev_stats_update_time; 230 uint64_t ev_stats[EV_NQSTATS]; 231#endif 232 233 unsigned int max_rss_channels; 234 uma_zone_t rxq_cache; 235 struct sfxge_rxq *rxq[SFXGE_RX_SCALE_MAX]; 236 unsigned int rx_indir_table[SFXGE_RX_SCALE_MAX]; 237 238#ifdef SFXGE_HAVE_MQ 239 struct sfxge_txq *txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX]; 240#else 241 struct sfxge_txq *txq[SFXGE_TXQ_NTYPES]; 242#endif 243 244 struct ifmedia media; 245 246 size_t rx_prefix_size; 247 size_t rx_buffer_size; 248 uma_zone_t rx_buffer_zone; 249 250#ifndef SFXGE_HAVE_MQ 251 struct mtx tx_lock __aligned(CACHE_LINE_SIZE); 252#endif 253}; 254 255#define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN) 256#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING) 257 258#define SFXGE_PARAM(_name) "hw.sfxge." #_name 259 260SYSCTL_DECL(_hw_sfxge); 261 262/* 263 * From sfxge.c. 264 */ 265extern void sfxge_schedule_reset(struct sfxge_softc *sc); 266extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, 267 uint32_t *idp); 268 269/* 270 * From sfxge_dma.c. 271 */ 272extern int sfxge_dma_init(struct sfxge_softc *sc); 273extern void sfxge_dma_fini(struct sfxge_softc *sc); 274extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len, 275 efsys_mem_t *esmp); 276extern void sfxge_dma_free(efsys_mem_t *esmp); 277extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map, 278 struct mbuf **mp, bus_dma_segment_t *segs, int *nsegs, int maxsegs); 279 280/* 281 * From sfxge_ev.c. 282 */ 283extern int sfxge_ev_init(struct sfxge_softc *sc); 284extern void sfxge_ev_fini(struct sfxge_softc *sc); 285extern int sfxge_ev_start(struct sfxge_softc *sc); 286extern void sfxge_ev_stop(struct sfxge_softc *sc); 287extern int sfxge_ev_qpoll(struct sfxge_evq *evq); 288 289/* 290 * From sfxge_intr.c. 291 */ 292extern int sfxge_intr_init(struct sfxge_softc *sc); 293extern void sfxge_intr_fini(struct sfxge_softc *sc); 294extern int sfxge_intr_start(struct sfxge_softc *sc); 295extern void sfxge_intr_stop(struct sfxge_softc *sc); 296 297/* 298 * From sfxge_mcdi.c. 299 */ 300extern int sfxge_mcdi_init(struct sfxge_softc *sc); 301extern void sfxge_mcdi_fini(struct sfxge_softc *sc); 302 303/* 304 * From sfxge_port.c. 305 */ 306extern int sfxge_port_init(struct sfxge_softc *sc); 307extern void sfxge_port_fini(struct sfxge_softc *sc); 308extern int sfxge_port_start(struct sfxge_softc *sc); 309extern void sfxge_port_stop(struct sfxge_softc *sc); 310extern void sfxge_mac_link_update(struct sfxge_softc *sc, 311 efx_link_mode_t mode); 312extern int sfxge_mac_filter_set(struct sfxge_softc *sc); 313extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc); 314 315#define SFXGE_MAX_MTU (9 * 1024) 316 317#endif /* _SFXGE_H */ 318