1/*- 2 * Copyright (c) 2009-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/11/sys/dev/sfxge/common/siena_nvram.c 342445 2018-12-25 07:27:45Z arybchik $"); 33 34#include "efx.h" 35#include "efx_impl.h" 36 37#if EFSYS_OPT_SIENA 38 39#if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM 40 41 __checkReturn efx_rc_t 42siena_nvram_partn_size( 43 __in efx_nic_t *enp, 44 __in uint32_t partn, 45 __out size_t *sizep) 46{ 47 efx_rc_t rc; 48 49 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 50 rc = ENOTSUP; 51 goto fail1; 52 } 53 54 if ((rc = efx_mcdi_nvram_info(enp, partn, sizep, 55 NULL, NULL, NULL)) != 0) { 56 goto fail2; 57 } 58 59 return (0); 60 61fail2: 62 EFSYS_PROBE(fail2); 63fail1: 64 EFSYS_PROBE1(fail1, efx_rc_t, rc); 65 66 return (rc); 67} 68 69 __checkReturn efx_rc_t 70siena_nvram_partn_lock( 71 __in efx_nic_t *enp, 72 __in uint32_t partn) 73{ 74 efx_rc_t rc; 75 76 if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) { 77 goto fail1; 78 } 79 80 return (0); 81 82fail1: 83 EFSYS_PROBE1(fail1, efx_rc_t, rc); 84 85 return (rc); 86} 87 88 __checkReturn efx_rc_t 89siena_nvram_partn_read( 90 __in efx_nic_t *enp, 91 __in uint32_t partn, 92 __in unsigned int offset, 93 __out_bcount(size) caddr_t data, 94 __in size_t size) 95{ 96 size_t chunk; 97 efx_rc_t rc; 98 99 while (size > 0) { 100 chunk = MIN(size, SIENA_NVRAM_CHUNK); 101 102 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk, 103 MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) { 104 goto fail1; 105 } 106 107 size -= chunk; 108 data += chunk; 109 offset += chunk; 110 } 111 112 return (0); 113 114fail1: 115 EFSYS_PROBE1(fail1, efx_rc_t, rc); 116 117 return (rc); 118} 119 120 __checkReturn efx_rc_t 121siena_nvram_partn_erase( 122 __in efx_nic_t *enp, 123 __in uint32_t partn, 124 __in unsigned int offset, 125 __in size_t size) 126{ 127 efx_rc_t rc; 128 129 if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) { 130 goto fail1; 131 } 132 133 return (0); 134 135fail1: 136 EFSYS_PROBE1(fail1, efx_rc_t, rc); 137 138 return (rc); 139} 140 141 __checkReturn efx_rc_t 142siena_nvram_partn_write( 143 __in efx_nic_t *enp, 144 __in uint32_t partn, 145 __in unsigned int offset, 146 __out_bcount(size) caddr_t data, 147 __in size_t size) 148{ 149 size_t chunk; 150 efx_rc_t rc; 151 152 while (size > 0) { 153 chunk = MIN(size, SIENA_NVRAM_CHUNK); 154 155 if ((rc = efx_mcdi_nvram_write(enp, partn, offset, 156 data, chunk)) != 0) { 157 goto fail1; 158 } 159 160 size -= chunk; 161 data += chunk; 162 offset += chunk; 163 } 164 165 return (0); 166 167fail1: 168 EFSYS_PROBE1(fail1, efx_rc_t, rc); 169 170 return (rc); 171} 172 173 __checkReturn efx_rc_t 174siena_nvram_partn_unlock( 175 __in efx_nic_t *enp, 176 __in uint32_t partn) 177{ 178 boolean_t reboot; 179 efx_rc_t rc; 180 181 /* 182 * Reboot into the new image only for PHYs. The driver has to 183 * explicitly cope with an MC reboot after a firmware update. 184 */ 185 reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 || 186 partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 || 187 partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO); 188 189 rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, NULL); 190 if (rc != 0) 191 goto fail1; 192 193 return (0); 194 195fail1: 196 EFSYS_PROBE1(fail1, efx_rc_t, rc); 197 198 return (rc); 199} 200 201#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 202 203#if EFSYS_OPT_NVRAM 204 205typedef struct siena_parttbl_entry_s { 206 unsigned int partn; 207 unsigned int port; 208 efx_nvram_type_t nvtype; 209} siena_parttbl_entry_t; 210 211static siena_parttbl_entry_t siena_parttbl[] = { 212 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 1, EFX_NVRAM_NULLPHY}, 213 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 2, EFX_NVRAM_NULLPHY}, 214 {MC_CMD_NVRAM_TYPE_MC_FW, 1, EFX_NVRAM_MC_FIRMWARE}, 215 {MC_CMD_NVRAM_TYPE_MC_FW, 2, EFX_NVRAM_MC_FIRMWARE}, 216 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 1, EFX_NVRAM_MC_GOLDEN}, 217 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 2, EFX_NVRAM_MC_GOLDEN}, 218 {MC_CMD_NVRAM_TYPE_EXP_ROM, 1, EFX_NVRAM_BOOTROM}, 219 {MC_CMD_NVRAM_TYPE_EXP_ROM, 2, EFX_NVRAM_BOOTROM}, 220 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG}, 221 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG}, 222 {MC_CMD_NVRAM_TYPE_PHY_PORT0, 1, EFX_NVRAM_PHY}, 223 {MC_CMD_NVRAM_TYPE_PHY_PORT1, 2, EFX_NVRAM_PHY}, 224 {MC_CMD_NVRAM_TYPE_FPGA, 1, EFX_NVRAM_FPGA}, 225 {MC_CMD_NVRAM_TYPE_FPGA, 2, EFX_NVRAM_FPGA}, 226 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP}, 227 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP}, 228 {MC_CMD_NVRAM_TYPE_FC_FW, 1, EFX_NVRAM_FCFW}, 229 {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW}, 230 {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD}, 231 {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD}, 232 {MC_CMD_NVRAM_TYPE_LICENSE, 1, EFX_NVRAM_LICENSE}, 233 {MC_CMD_NVRAM_TYPE_LICENSE, 2, EFX_NVRAM_LICENSE} 234}; 235 236 __checkReturn efx_rc_t 237siena_nvram_type_to_partn( 238 __in efx_nic_t *enp, 239 __in efx_nvram_type_t type, 240 __out uint32_t *partnp) 241{ 242 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 243 unsigned int i; 244 245 EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES); 246 EFSYS_ASSERT(partnp != NULL); 247 248 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 249 siena_parttbl_entry_t *entry = &siena_parttbl[i]; 250 251 if (entry->port == emip->emi_port && entry->nvtype == type) { 252 *partnp = entry->partn; 253 return (0); 254 } 255 } 256 257 return (ENOTSUP); 258} 259 260 261#if EFSYS_OPT_DIAG 262 263 __checkReturn efx_rc_t 264siena_nvram_test( 265 __in efx_nic_t *enp) 266{ 267 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 268 siena_parttbl_entry_t *entry; 269 unsigned int i; 270 efx_rc_t rc; 271 272 /* 273 * Iterate over the list of supported partition types 274 * applicable to *this* port 275 */ 276 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 277 entry = &siena_parttbl[i]; 278 279 if (entry->port != emip->emi_port || 280 !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn))) 281 continue; 282 283 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) { 284 goto fail1; 285 } 286 } 287 288 return (0); 289 290fail1: 291 EFSYS_PROBE1(fail1, efx_rc_t, rc); 292 293 return (rc); 294} 295 296#endif /* EFSYS_OPT_DIAG */ 297 298 299#define SIENA_DYNAMIC_CFG_SIZE(_nitems) \ 300 (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) * \ 301 sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0]))) 302 303 __checkReturn efx_rc_t 304siena_nvram_get_dynamic_cfg( 305 __in efx_nic_t *enp, 306 __in uint32_t partn, 307 __in boolean_t vpd, 308 __out siena_mc_dynamic_config_hdr_t **dcfgp, 309 __out size_t *sizep) 310{ 311 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 312 size_t size; 313 uint8_t cksum; 314 unsigned int vpd_offset; 315 unsigned int vpd_length; 316 unsigned int hdr_length; 317 unsigned int nversions; 318 unsigned int pos; 319 unsigned int region; 320 efx_rc_t rc; 321 322 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 || 323 partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1); 324 325 /* 326 * Allocate sufficient memory for the entire dynamiccfg area, even 327 * if we're not actually going to read in the VPD. 328 */ 329 if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0) 330 goto fail1; 331 332 EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg); 333 if (dcfg == NULL) { 334 rc = ENOMEM; 335 goto fail2; 336 } 337 338 if ((rc = siena_nvram_partn_read(enp, partn, 0, 339 (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0) 340 goto fail3; 341 342 /* Verify the magic */ 343 if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0) 344 != SIENA_MC_DYNAMIC_CONFIG_MAGIC) 345 goto invalid1; 346 347 /* All future versions of the structure must be backwards compatible */ 348 EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0); 349 350 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 351 nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 352 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 353 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 354 355 /* Verify the hdr doesn't overflow the partn size */ 356 if (hdr_length > size || vpd_offset > size || vpd_length > size || 357 vpd_length + vpd_offset > size) 358 goto invalid2; 359 360 /* Verify the header has room for all it's versions */ 361 if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) || 362 hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions)) 363 goto invalid3; 364 365 /* 366 * Read the remaining portion of the dcfg, either including 367 * the whole of VPD (there is no vpd length in this structure, 368 * so we have to parse each tag), or just the dcfg header itself 369 */ 370 region = vpd ? vpd_offset + vpd_length : hdr_length; 371 if (region > SIENA_NVRAM_CHUNK) { 372 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK, 373 (caddr_t)dcfg + SIENA_NVRAM_CHUNK, 374 region - SIENA_NVRAM_CHUNK)) != 0) 375 goto fail4; 376 } 377 378 /* Verify checksum */ 379 cksum = 0; 380 for (pos = 0; pos < hdr_length; pos++) 381 cksum += ((uint8_t *)dcfg)[pos]; 382 if (cksum != 0) 383 goto invalid4; 384 385 goto done; 386 387invalid4: 388 EFSYS_PROBE(invalid4); 389invalid3: 390 EFSYS_PROBE(invalid3); 391invalid2: 392 EFSYS_PROBE(invalid2); 393invalid1: 394 EFSYS_PROBE(invalid1); 395 396 /* 397 * Construct a new "null" dcfg, with an empty version vector, 398 * and an empty VPD chunk trailing. This has the neat side effect 399 * of testing the exception paths in the write path. 400 */ 401 EFX_POPULATE_DWORD_1(dcfg->magic, 402 EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC); 403 EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg)); 404 EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0, 405 SIENA_MC_DYNAMIC_CONFIG_VERSION); 406 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 407 EFX_DWORD_0, sizeof (*dcfg)); 408 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0); 409 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0); 410 411done: 412 *dcfgp = dcfg; 413 *sizep = size; 414 415 return (0); 416 417fail4: 418 EFSYS_PROBE(fail4); 419fail3: 420 EFSYS_PROBE(fail3); 421 422 EFSYS_KMEM_FREE(enp->en_esip, size, dcfg); 423 424fail2: 425 EFSYS_PROBE(fail2); 426fail1: 427 EFSYS_PROBE1(fail1, efx_rc_t, rc); 428 429 return (rc); 430} 431 432 __checkReturn efx_rc_t 433siena_nvram_get_subtype( 434 __in efx_nic_t *enp, 435 __in uint32_t partn, 436 __out uint32_t *subtypep) 437{ 438 efx_mcdi_req_t req; 439 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN, 440 MC_CMD_GET_BOARD_CFG_OUT_LENMAX); 441 efx_word_t *fw_list; 442 efx_rc_t rc; 443 444 req.emr_cmd = MC_CMD_GET_BOARD_CFG; 445 req.emr_in_buf = payload; 446 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN; 447 req.emr_out_buf = payload; 448 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX; 449 450 efx_mcdi_execute(enp, &req); 451 452 if (req.emr_rc != 0) { 453 rc = req.emr_rc; 454 goto fail1; 455 } 456 457 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 458 rc = EMSGSIZE; 459 goto fail2; 460 } 461 462 if (req.emr_out_length_used < 463 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST + 464 (partn + 1) * sizeof (efx_word_t)) { 465 rc = ENOENT; 466 goto fail3; 467 } 468 469 fw_list = MCDI_OUT2(req, efx_word_t, 470 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 471 *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0); 472 473 return (0); 474 475fail3: 476 EFSYS_PROBE(fail3); 477fail2: 478 EFSYS_PROBE(fail2); 479fail1: 480 EFSYS_PROBE1(fail1, efx_rc_t, rc); 481 482 return (rc); 483} 484 485 __checkReturn efx_rc_t 486siena_nvram_partn_get_version( 487 __in efx_nic_t *enp, 488 __in uint32_t partn, 489 __out uint32_t *subtypep, 490 __out_ecount(4) uint16_t version[4]) 491{ 492 siena_mc_dynamic_config_hdr_t *dcfg; 493 siena_parttbl_entry_t *entry; 494 uint32_t dcfg_partn; 495 unsigned int i; 496 efx_rc_t rc; 497 498 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 499 rc = ENOTSUP; 500 goto fail1; 501 } 502 503 if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0) 504 goto fail2; 505 506 /* 507 * Some partitions are accessible from both ports (for instance BOOTROM) 508 * Find the highest version reported by all dcfg structures on ports 509 * that have access to this partition. 510 */ 511 version[0] = version[1] = version[2] = version[3] = 0; 512 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 513 siena_mc_fw_version_t *verp; 514 unsigned int nitems; 515 uint16_t temp[4]; 516 size_t length; 517 518 entry = &siena_parttbl[i]; 519 if (entry->partn != partn) 520 continue; 521 522 dcfg_partn = (entry->port == 1) 523 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 524 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 525 /* 526 * Ingore missing partitions on port 2, assuming they're due 527 * to running on a single port part. 528 */ 529 if ((1 << dcfg_partn) & ~enp->en_u.siena.enu_partn_mask) { 530 if (entry->port == 2) 531 continue; 532 } 533 534 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 535 B_FALSE, &dcfg, &length)) != 0) 536 goto fail3; 537 538 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, 539 EFX_DWORD_0); 540 if (nitems < entry->partn) 541 goto done; 542 543 verp = &dcfg->fw_version[partn]; 544 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0); 545 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0); 546 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0); 547 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0); 548 if (memcmp(version, temp, sizeof (temp)) < 0) 549 memcpy(version, temp, sizeof (temp)); 550 551done: 552 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 553 } 554 555 return (0); 556 557fail3: 558 EFSYS_PROBE(fail3); 559fail2: 560 EFSYS_PROBE(fail2); 561fail1: 562 EFSYS_PROBE1(fail1, efx_rc_t, rc); 563 564 return (rc); 565} 566 567 __checkReturn efx_rc_t 568siena_nvram_partn_rw_start( 569 __in efx_nic_t *enp, 570 __in uint32_t partn, 571 __out size_t *chunk_sizep) 572{ 573 efx_rc_t rc; 574 575 if ((rc = siena_nvram_partn_lock(enp, partn)) != 0) 576 goto fail1; 577 578 if (chunk_sizep != NULL) 579 *chunk_sizep = SIENA_NVRAM_CHUNK; 580 581 return (0); 582 583fail1: 584 EFSYS_PROBE1(fail1, efx_rc_t, rc); 585 586 return (rc); 587} 588 589 __checkReturn efx_rc_t 590siena_nvram_partn_rw_finish( 591 __in efx_nic_t *enp, 592 __in uint32_t partn) 593{ 594 efx_rc_t rc; 595 596 if ((rc = siena_nvram_partn_unlock(enp, partn)) != 0) 597 goto fail1; 598 599 return (0); 600 601fail1: 602 EFSYS_PROBE1(fail1, efx_rc_t, rc); 603 604 return (rc); 605} 606 607 __checkReturn efx_rc_t 608siena_nvram_partn_set_version( 609 __in efx_nic_t *enp, 610 __in uint32_t partn, 611 __in_ecount(4) uint16_t version[4]) 612{ 613 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 614 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 615 siena_mc_fw_version_t *fwverp; 616 uint32_t dcfg_partn; 617 size_t dcfg_size; 618 unsigned int hdr_length; 619 unsigned int vpd_length; 620 unsigned int vpd_offset; 621 unsigned int nitems; 622 unsigned int required_hdr_length; 623 unsigned int pos; 624 uint8_t cksum; 625 uint32_t subtype; 626 size_t length; 627 efx_rc_t rc; 628 629 dcfg_partn = (emip->emi_port == 1) 630 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 631 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 632 633 if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0) 634 goto fail1; 635 636 if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0) 637 goto fail2; 638 639 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 640 B_TRUE, &dcfg, &length)) != 0) 641 goto fail3; 642 643 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 644 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 645 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 646 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 647 648 /* 649 * NOTE: This function will blatt any fields trailing the version 650 * vector, or the VPD chunk. 651 */ 652 required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1); 653 if (required_hdr_length + vpd_length > length) { 654 rc = ENOSPC; 655 goto fail4; 656 } 657 658 if (vpd_offset < required_hdr_length) { 659 (void) memmove((caddr_t)dcfg + required_hdr_length, 660 (caddr_t)dcfg + vpd_offset, vpd_length); 661 vpd_offset = required_hdr_length; 662 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 663 EFX_DWORD_0, vpd_offset); 664 } 665 666 if (hdr_length < required_hdr_length) { 667 (void) memset((caddr_t)dcfg + hdr_length, 0, 668 required_hdr_length - hdr_length); 669 hdr_length = required_hdr_length; 670 EFX_POPULATE_WORD_1(dcfg->length, 671 EFX_WORD_0, hdr_length); 672 } 673 674 /* Get the subtype to insert into the fw_subtype array */ 675 if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0) 676 goto fail5; 677 678 /* Fill out the new version */ 679 fwverp = &dcfg->fw_version[partn]; 680 EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype); 681 EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]); 682 EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]); 683 EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]); 684 EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]); 685 686 /* Update the version count */ 687 if (nitems < partn + 1) { 688 nitems = partn + 1; 689 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, 690 EFX_DWORD_0, nitems); 691 } 692 693 /* Update the checksum */ 694 cksum = 0; 695 for (pos = 0; pos < hdr_length; pos++) 696 cksum += ((uint8_t *)dcfg)[pos]; 697 dcfg->csum.eb_u8[0] -= cksum; 698 699 /* Erase and write the new partition */ 700 if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0) 701 goto fail6; 702 703 /* Write out the new structure to nvram */ 704 if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0, 705 (caddr_t)dcfg, vpd_offset + vpd_length)) != 0) 706 goto fail7; 707 708 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 709 710 siena_nvram_partn_unlock(enp, dcfg_partn); 711 712 return (0); 713 714fail7: 715 EFSYS_PROBE(fail7); 716fail6: 717 EFSYS_PROBE(fail6); 718fail5: 719 EFSYS_PROBE(fail5); 720fail4: 721 EFSYS_PROBE(fail4); 722 723 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 724fail3: 725 EFSYS_PROBE(fail3); 726fail2: 727 EFSYS_PROBE(fail2); 728fail1: 729 EFSYS_PROBE1(fail1, efx_rc_t, rc); 730 731 return (rc); 732} 733 734#endif /* EFSYS_OPT_NVRAM */ 735 736#endif /* EFSYS_OPT_SIENA */ 737