1/*-
2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 *    this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 *    this list of conditions and the following disclaimer in the documentation
12 *    and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/11/sys/dev/sfxge/common/ef10_intr.c 342445 2018-12-25 07:27:45Z arybchik $");
33
34#include "efx.h"
35#include "efx_impl.h"
36
37
38#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
39
40	__checkReturn	efx_rc_t
41ef10_intr_init(
42	__in		efx_nic_t *enp,
43	__in		efx_intr_type_t type,
44	__in		efsys_mem_t *esmp)
45{
46	_NOTE(ARGUNUSED(enp, type, esmp))
47	return (0);
48}
49
50
51			void
52ef10_intr_enable(
53	__in		efx_nic_t *enp)
54{
55	_NOTE(ARGUNUSED(enp))
56}
57
58
59			void
60ef10_intr_disable(
61	__in		efx_nic_t *enp)
62{
63	_NOTE(ARGUNUSED(enp))
64}
65
66
67			void
68ef10_intr_disable_unlocked(
69	__in		efx_nic_t *enp)
70{
71	_NOTE(ARGUNUSED(enp))
72}
73
74
75static	__checkReturn	efx_rc_t
76efx_mcdi_trigger_interrupt(
77	__in		efx_nic_t *enp,
78	__in		unsigned int level)
79{
80	efx_mcdi_req_t req;
81	EFX_MCDI_DECLARE_BUF(payload, MC_CMD_TRIGGER_INTERRUPT_IN_LEN,
82		MC_CMD_TRIGGER_INTERRUPT_OUT_LEN);
83	efx_rc_t rc;
84
85	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
86		    enp->en_family == EFX_FAMILY_MEDFORD);
87
88	if (level >= enp->en_nic_cfg.enc_intr_limit) {
89		rc = EINVAL;
90		goto fail1;
91	}
92
93	req.emr_cmd = MC_CMD_TRIGGER_INTERRUPT;
94	req.emr_in_buf = payload;
95	req.emr_in_length = MC_CMD_TRIGGER_INTERRUPT_IN_LEN;
96	req.emr_out_buf = payload;
97	req.emr_out_length = MC_CMD_TRIGGER_INTERRUPT_OUT_LEN;
98
99	MCDI_IN_SET_DWORD(req, TRIGGER_INTERRUPT_IN_INTR_LEVEL, level);
100
101	efx_mcdi_execute(enp, &req);
102
103	if (req.emr_rc != 0) {
104		rc = req.emr_rc;
105		goto fail2;
106	}
107
108	return (0);
109
110fail2:
111	EFSYS_PROBE(fail2);
112
113fail1:
114	EFSYS_PROBE1(fail1, efx_rc_t, rc);
115
116	return (rc);
117}
118
119	__checkReturn	efx_rc_t
120ef10_intr_trigger(
121	__in		efx_nic_t *enp,
122	__in		unsigned int level)
123{
124	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
125	efx_rc_t rc;
126
127	if (encp->enc_bug41750_workaround) {
128		/*
129		 * bug 41750: Test interrupts don't work on Greenport
130		 * bug 50084: Test interrupts don't work on VFs
131		 */
132		rc = ENOTSUP;
133		goto fail1;
134	}
135
136	if ((rc = efx_mcdi_trigger_interrupt(enp, level)) != 0)
137		goto fail2;
138
139	return (0);
140
141fail2:
142	EFSYS_PROBE(fail2);
143fail1:
144	EFSYS_PROBE1(fail1, efx_rc_t, rc);
145
146	return (rc);
147}
148
149			void
150ef10_intr_status_line(
151	__in		efx_nic_t *enp,
152	__out		boolean_t *fatalp,
153	__out		uint32_t *qmaskp)
154{
155	efx_dword_t dword;
156
157	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
158		    enp->en_family == EFX_FAMILY_MEDFORD);
159
160	/* Read the queue mask and implicitly acknowledge the interrupt. */
161	EFX_BAR_READD(enp, ER_DZ_BIU_INT_ISR_REG, &dword, B_FALSE);
162	*qmaskp = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
163
164	EFSYS_PROBE1(qmask, uint32_t, *qmaskp);
165
166	*fatalp = B_FALSE;
167}
168
169			void
170ef10_intr_status_message(
171	__in		efx_nic_t *enp,
172	__in		unsigned int message,
173	__out		boolean_t *fatalp)
174{
175	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
176		    enp->en_family == EFX_FAMILY_MEDFORD);
177
178	_NOTE(ARGUNUSED(enp, message))
179
180	/* EF10 fatal errors are reported via events */
181	*fatalp = B_FALSE;
182}
183
184			void
185ef10_intr_fatal(
186	__in		efx_nic_t *enp)
187{
188	/* EF10 fatal errors are reported via events */
189	_NOTE(ARGUNUSED(enp))
190}
191
192			void
193ef10_intr_fini(
194	__in		efx_nic_t *enp)
195{
196	_NOTE(ARGUNUSED(enp))
197}
198
199#endif	/* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
200