ef10_impl.h revision 311481
140462Sken/*- 240462Sken * Copyright (c) 2015-2016 Solarflare Communications Inc. 340462Sken * All rights reserved. 440462Sken * 540462Sken * Redistribution and use in source and binary forms, with or without 640462Sken * modification, are permitted provided that the following conditions are met: 740462Sken * 840462Sken * 1. Redistributions of source code must retain the above copyright notice, 940462Sken * this list of conditions and the following disclaimer. 1040462Sken * 2. Redistributions in binary form must reproduce the above copyright notice, 1140462Sken * this list of conditions and the following disclaimer in the documentation 1279727Sschweikh * and/or other materials provided with the distribution. 1340462Sken * 1440462Sken * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1540462Sken * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 1640462Sken * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 1740462Sken * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 1840462Sken * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 1940462Sken * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 2040462Sken * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 2140462Sken * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 2240462Sken * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 2340462Sken * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 2450476Speter * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2540462Sken * 26159734Sbrueffer * The views and conclusions contained in the software and documentation are 2772762Sru * those of the authors and should not be interpreted as representing official 2879538Sru * policies, either expressed or implied, of the FreeBSD Project. 2940462Sken * 3040462Sken * $FreeBSD: stable/11/sys/dev/sfxge/common/ef10_impl.h 311481 2017-01-06 07:05:02Z arybchik $ 3140462Sken */ 3240462Sken 33159719Sbrueffer#ifndef _SYS_EF10_IMPL_H 34159719Sbrueffer#define _SYS_EF10_IMPL_H 35159719Sbrueffer 36159719Sbrueffer#ifdef __cplusplus 37159719Sbruefferextern "C" { 3856468Sasmodai#endif 3940462Sken 40159719Sbrueffer#if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD) 41159719Sbrueffer#define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS) 42159719Sbrueffer#elif EFSYS_OPT_HUNTINGTON 43159719Sbrueffer#define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS 44159719Sbrueffer#elif EFSYS_OPT_MEDFORD 45159719Sbrueffer#define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS 46159719Sbrueffer#endif 4756468Sasmodai 4840462Sken/* 4940462Sken * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could 5040462Sken * possibly be increased, or the write size reported by newer firmware used 51159719Sbrueffer * instead. 52159719Sbrueffer */ 53159719Sbrueffer#define EF10_NVRAM_CHUNK 0x80 54159719Sbrueffer 55159719Sbrueffer/* Alignment requirement for value written to RX WPTR: 56159719Sbrueffer * the WPTR must be aligned to an 8 descriptor boundary 57159719Sbrueffer */ 58159719Sbrueffer#define EF10_RX_WPTR_ALIGN 8 5940462Sken 6040462Sken/* 6140462Sken * Max byte offset into the packet the TCP header must start for the hardware 62131570Ssimon * to be able to parse the packet correctly. 63131570Ssimon */ 64131570Ssimon#define EF10_TCP_HEADER_OFFSET_LIMIT 208 65131570Ssimon 66131570Ssimon/* Invalid RSS context handle */ 67131570Ssimon#define EF10_RSS_CONTEXT_INVALID (0xffffffff) 68131570Ssimon 69131570Ssimon 70131570Ssimon/* EV */ 71131570Ssimon 72131570Ssimon __checkReturn efx_rc_t 73131570Ssimonef10_ev_init( 74131570Ssimon __in efx_nic_t *enp); 75131570Ssimon 76131570Ssimon void 77131570Ssimonef10_ev_fini( 78111770Sobrien __in efx_nic_t *enp); 79115188Sru 80115188Sru __checkReturn efx_rc_t 81111770Sobrienef10_ev_qcreate( 82111770Sobrien __in efx_nic_t *enp, 83111770Sobrien __in unsigned int index, 84111770Sobrien __in efsys_mem_t *esmp, 85111770Sobrien __in size_t n, 86111770Sobrien __in uint32_t id, 87111770Sobrien __in uint32_t us, 88111770Sobrien __in uint32_t flags, 89111770Sobrien __in efx_evq_t *eep); 90111770Sobrien 91111770Sobrien void 92111770Sobrienef10_ev_qdestroy( 93119104Sbmah __in efx_evq_t *eep); 94119104Sbmah 95115188Sru __checkReturn efx_rc_t 9640462Skenef10_ev_qprime( 97159734Sbrueffer __in efx_evq_t *eep, 9840462Sken __in unsigned int count); 9979727Sschweikh 10040462Sken void 10149831Smppef10_ev_qpost( 10249831Smpp __in efx_evq_t *eep, 103140561Sru __in uint16_t data); 104140561Sru 105140561Sru __checkReturn efx_rc_t 106140561Sruef10_ev_qmoderate( 107140561Sru __in efx_evq_t *eep, 10840462Sken __in unsigned int us); 10969027Sru 11040462Sken#if EFSYS_OPT_QSTATS 11140462Sken void 11240462Skenef10_ev_qstats_update( 11340462Sken __in efx_evq_t *eep, 11440462Sken __inout_ecount(EV_NQSTATS) efsys_stat_t *stat); 11540462Sken#endif /* EFSYS_OPT_QSTATS */ 116 117 void 118ef10_ev_rxlabel_init( 119 __in efx_evq_t *eep, 120 __in efx_rxq_t *erp, 121 __in unsigned int label); 122 123 void 124ef10_ev_rxlabel_fini( 125 __in efx_evq_t *eep, 126 __in unsigned int label); 127 128/* INTR */ 129 130 __checkReturn efx_rc_t 131ef10_intr_init( 132 __in efx_nic_t *enp, 133 __in efx_intr_type_t type, 134 __in efsys_mem_t *esmp); 135 136 void 137ef10_intr_enable( 138 __in efx_nic_t *enp); 139 140 void 141ef10_intr_disable( 142 __in efx_nic_t *enp); 143 144 void 145ef10_intr_disable_unlocked( 146 __in efx_nic_t *enp); 147 148 __checkReturn efx_rc_t 149ef10_intr_trigger( 150 __in efx_nic_t *enp, 151 __in unsigned int level); 152 153 void 154ef10_intr_status_line( 155 __in efx_nic_t *enp, 156 __out boolean_t *fatalp, 157 __out uint32_t *qmaskp); 158 159 void 160ef10_intr_status_message( 161 __in efx_nic_t *enp, 162 __in unsigned int message, 163 __out boolean_t *fatalp); 164 165 void 166ef10_intr_fatal( 167 __in efx_nic_t *enp); 168 void 169ef10_intr_fini( 170 __in efx_nic_t *enp); 171 172/* NIC */ 173 174extern __checkReturn efx_rc_t 175ef10_nic_probe( 176 __in efx_nic_t *enp); 177 178extern __checkReturn efx_rc_t 179ef10_nic_set_drv_limits( 180 __inout efx_nic_t *enp, 181 __in efx_drv_limits_t *edlp); 182 183extern __checkReturn efx_rc_t 184ef10_nic_get_vi_pool( 185 __in efx_nic_t *enp, 186 __out uint32_t *vi_countp); 187 188extern __checkReturn efx_rc_t 189ef10_nic_get_bar_region( 190 __in efx_nic_t *enp, 191 __in efx_nic_region_t region, 192 __out uint32_t *offsetp, 193 __out size_t *sizep); 194 195extern __checkReturn efx_rc_t 196ef10_nic_reset( 197 __in efx_nic_t *enp); 198 199extern __checkReturn efx_rc_t 200ef10_nic_init( 201 __in efx_nic_t *enp); 202 203#if EFSYS_OPT_DIAG 204 205extern __checkReturn efx_rc_t 206ef10_nic_register_test( 207 __in efx_nic_t *enp); 208 209#endif /* EFSYS_OPT_DIAG */ 210 211extern void 212ef10_nic_fini( 213 __in efx_nic_t *enp); 214 215extern void 216ef10_nic_unprobe( 217 __in efx_nic_t *enp); 218 219 220/* MAC */ 221 222extern __checkReturn efx_rc_t 223ef10_mac_poll( 224 __in efx_nic_t *enp, 225 __out efx_link_mode_t *link_modep); 226 227extern __checkReturn efx_rc_t 228ef10_mac_up( 229 __in efx_nic_t *enp, 230 __out boolean_t *mac_upp); 231 232extern __checkReturn efx_rc_t 233ef10_mac_addr_set( 234 __in efx_nic_t *enp); 235 236extern __checkReturn efx_rc_t 237ef10_mac_pdu_set( 238 __in efx_nic_t *enp); 239 240extern __checkReturn efx_rc_t 241ef10_mac_pdu_get( 242 __in efx_nic_t *enp, 243 __out size_t *pdu); 244 245extern __checkReturn efx_rc_t 246ef10_mac_reconfigure( 247 __in efx_nic_t *enp); 248 249extern __checkReturn efx_rc_t 250ef10_mac_multicast_list_set( 251 __in efx_nic_t *enp); 252 253extern __checkReturn efx_rc_t 254ef10_mac_filter_default_rxq_set( 255 __in efx_nic_t *enp, 256 __in efx_rxq_t *erp, 257 __in boolean_t using_rss); 258 259extern void 260ef10_mac_filter_default_rxq_clear( 261 __in efx_nic_t *enp); 262 263#if EFSYS_OPT_LOOPBACK 264 265extern __checkReturn efx_rc_t 266ef10_mac_loopback_set( 267 __in efx_nic_t *enp, 268 __in efx_link_mode_t link_mode, 269 __in efx_loopback_type_t loopback_type); 270 271#endif /* EFSYS_OPT_LOOPBACK */ 272 273#if EFSYS_OPT_MAC_STATS 274 275extern __checkReturn efx_rc_t 276ef10_mac_stats_get_mask( 277 __in efx_nic_t *enp, 278 __inout_bcount(mask_size) uint32_t *maskp, 279 __in size_t mask_size); 280 281extern __checkReturn efx_rc_t 282ef10_mac_stats_update( 283 __in efx_nic_t *enp, 284 __in efsys_mem_t *esmp, 285 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 286 __inout_opt uint32_t *generationp); 287 288#endif /* EFSYS_OPT_MAC_STATS */ 289 290 291/* MCDI */ 292 293#if EFSYS_OPT_MCDI 294 295extern __checkReturn efx_rc_t 296ef10_mcdi_init( 297 __in efx_nic_t *enp, 298 __in const efx_mcdi_transport_t *mtp); 299 300extern void 301ef10_mcdi_fini( 302 __in efx_nic_t *enp); 303 304extern void 305ef10_mcdi_send_request( 306 __in efx_nic_t *enp, 307 __in_bcount(hdr_len) void *hdrp, 308 __in size_t hdr_len, 309 __in_bcount(sdu_len) void *sdup, 310 __in size_t sdu_len); 311 312extern __checkReturn boolean_t 313ef10_mcdi_poll_response( 314 __in efx_nic_t *enp); 315 316extern void 317ef10_mcdi_read_response( 318 __in efx_nic_t *enp, 319 __out_bcount(length) void *bufferp, 320 __in size_t offset, 321 __in size_t length); 322 323extern efx_rc_t 324ef10_mcdi_poll_reboot( 325 __in efx_nic_t *enp); 326 327extern __checkReturn efx_rc_t 328ef10_mcdi_feature_supported( 329 __in efx_nic_t *enp, 330 __in efx_mcdi_feature_id_t id, 331 __out boolean_t *supportedp); 332 333#endif /* EFSYS_OPT_MCDI */ 334 335/* NVRAM */ 336 337#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 338 339extern __checkReturn efx_rc_t 340ef10_nvram_buf_read_tlv( 341 __in efx_nic_t *enp, 342 __in_bcount(max_seg_size) caddr_t seg_data, 343 __in size_t max_seg_size, 344 __in uint32_t tag, 345 __deref_out_bcount_opt(*sizep) caddr_t *datap, 346 __out size_t *sizep); 347 348extern __checkReturn efx_rc_t 349ef10_nvram_buf_write_tlv( 350 __inout_bcount(partn_size) caddr_t partn_data, 351 __in size_t partn_size, 352 __in uint32_t tag, 353 __in_bcount(tag_size) caddr_t tag_data, 354 __in size_t tag_size, 355 __out size_t *total_lengthp); 356 357extern __checkReturn efx_rc_t 358ef10_nvram_partn_read_tlv( 359 __in efx_nic_t *enp, 360 __in uint32_t partn, 361 __in uint32_t tag, 362 __deref_out_bcount_opt(*sizep) caddr_t *datap, 363 __out size_t *sizep); 364 365extern __checkReturn efx_rc_t 366ef10_nvram_partn_write_tlv( 367 __in efx_nic_t *enp, 368 __in uint32_t partn, 369 __in uint32_t tag, 370 __in_bcount(size) caddr_t data, 371 __in size_t size); 372 373extern __checkReturn efx_rc_t 374ef10_nvram_partn_write_segment_tlv( 375 __in efx_nic_t *enp, 376 __in uint32_t partn, 377 __in uint32_t tag, 378 __in_bcount(size) caddr_t data, 379 __in size_t size, 380 __in boolean_t all_segments); 381 382extern __checkReturn efx_rc_t 383ef10_nvram_partn_lock( 384 __in efx_nic_t *enp, 385 __in uint32_t partn); 386 387extern __checkReturn efx_rc_t 388ef10_nvram_partn_unlock( 389 __in efx_nic_t *enp, 390 __in uint32_t partn); 391 392#endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ 393 394#if EFSYS_OPT_NVRAM 395 396#if EFSYS_OPT_DIAG 397 398extern __checkReturn efx_rc_t 399ef10_nvram_test( 400 __in efx_nic_t *enp); 401 402#endif /* EFSYS_OPT_DIAG */ 403 404extern __checkReturn efx_rc_t 405ef10_nvram_type_to_partn( 406 __in efx_nic_t *enp, 407 __in efx_nvram_type_t type, 408 __out uint32_t *partnp); 409 410extern __checkReturn efx_rc_t 411ef10_nvram_partn_size( 412 __in efx_nic_t *enp, 413 __in uint32_t partn, 414 __out size_t *sizep); 415 416extern __checkReturn efx_rc_t 417ef10_nvram_partn_rw_start( 418 __in efx_nic_t *enp, 419 __in uint32_t partn, 420 __out size_t *chunk_sizep); 421 422extern __checkReturn efx_rc_t 423ef10_nvram_partn_read_mode( 424 __in efx_nic_t *enp, 425 __in uint32_t partn, 426 __in unsigned int offset, 427 __out_bcount(size) caddr_t data, 428 __in size_t size, 429 __in uint32_t mode); 430 431extern __checkReturn efx_rc_t 432ef10_nvram_partn_read( 433 __in efx_nic_t *enp, 434 __in uint32_t partn, 435 __in unsigned int offset, 436 __out_bcount(size) caddr_t data, 437 __in size_t size); 438 439extern __checkReturn efx_rc_t 440ef10_nvram_partn_erase( 441 __in efx_nic_t *enp, 442 __in uint32_t partn, 443 __in unsigned int offset, 444 __in size_t size); 445 446extern __checkReturn efx_rc_t 447ef10_nvram_partn_write( 448 __in efx_nic_t *enp, 449 __in uint32_t partn, 450 __in unsigned int offset, 451 __out_bcount(size) caddr_t data, 452 __in size_t size); 453 454extern __checkReturn efx_rc_t 455ef10_nvram_partn_rw_finish( 456 __in efx_nic_t *enp, 457 __in uint32_t partn); 458 459extern __checkReturn efx_rc_t 460ef10_nvram_partn_get_version( 461 __in efx_nic_t *enp, 462 __in uint32_t partn, 463 __out uint32_t *subtypep, 464 __out_ecount(4) uint16_t version[4]); 465 466extern __checkReturn efx_rc_t 467ef10_nvram_partn_set_version( 468 __in efx_nic_t *enp, 469 __in uint32_t partn, 470 __in_ecount(4) uint16_t version[4]); 471 472extern __checkReturn efx_rc_t 473ef10_nvram_buffer_validate( 474 __in efx_nic_t *enp, 475 __in uint32_t partn, 476 __in_bcount(buffer_size) 477 caddr_t bufferp, 478 __in size_t buffer_size); 479 480extern __checkReturn efx_rc_t 481ef10_nvram_buffer_create( 482 __in efx_nic_t *enp, 483 __in uint16_t partn_type, 484 __in_bcount(buffer_size) 485 caddr_t bufferp, 486 __in size_t buffer_size); 487 488extern __checkReturn efx_rc_t 489ef10_nvram_buffer_find_item_start( 490 __in_bcount(buffer_size) 491 caddr_t bufferp, 492 __in size_t buffer_size, 493 __out uint32_t *startp 494 ); 495 496extern __checkReturn efx_rc_t 497ef10_nvram_buffer_find_end( 498 __in_bcount(buffer_size) 499 caddr_t bufferp, 500 __in size_t buffer_size, 501 __in uint32_t offset, 502 __out uint32_t *endp 503 ); 504 505extern __checkReturn __success(return != B_FALSE) boolean_t 506ef10_nvram_buffer_find_item( 507 __in_bcount(buffer_size) 508 caddr_t bufferp, 509 __in size_t buffer_size, 510 __in uint32_t offset, 511 __out uint32_t *startp, 512 __out uint32_t *lengthp 513 ); 514 515extern __checkReturn efx_rc_t 516ef10_nvram_buffer_get_item( 517 __in_bcount(buffer_size) 518 caddr_t bufferp, 519 __in size_t buffer_size, 520 __in uint32_t offset, 521 __in uint32_t length, 522 __out_bcount_part(item_max_size, *lengthp) 523 caddr_t itemp, 524 __in size_t item_max_size, 525 __out uint32_t *lengthp 526 ); 527 528extern __checkReturn efx_rc_t 529ef10_nvram_buffer_insert_item( 530 __in_bcount(buffer_size) 531 caddr_t bufferp, 532 __in size_t buffer_size, 533 __in uint32_t offset, 534 __in_bcount(length) caddr_t keyp, 535 __in uint32_t length, 536 __out uint32_t *lengthp 537 ); 538 539extern __checkReturn efx_rc_t 540ef10_nvram_buffer_delete_item( 541 __in_bcount(buffer_size) 542 caddr_t bufferp, 543 __in size_t buffer_size, 544 __in uint32_t offset, 545 __in uint32_t length, 546 __in uint32_t end 547 ); 548 549extern __checkReturn efx_rc_t 550ef10_nvram_buffer_finish( 551 __in_bcount(buffer_size) 552 caddr_t bufferp, 553 __in size_t buffer_size 554 ); 555 556#endif /* EFSYS_OPT_NVRAM */ 557 558 559/* PHY */ 560 561typedef struct ef10_link_state_s { 562 uint32_t els_adv_cap_mask; 563 uint32_t els_lp_cap_mask; 564 unsigned int els_fcntl; 565 efx_link_mode_t els_link_mode; 566#if EFSYS_OPT_LOOPBACK 567 efx_loopback_type_t els_loopback; 568#endif 569 boolean_t els_mac_up; 570} ef10_link_state_t; 571 572extern void 573ef10_phy_link_ev( 574 __in efx_nic_t *enp, 575 __in efx_qword_t *eqp, 576 __out efx_link_mode_t *link_modep); 577 578extern __checkReturn efx_rc_t 579ef10_phy_get_link( 580 __in efx_nic_t *enp, 581 __out ef10_link_state_t *elsp); 582 583extern __checkReturn efx_rc_t 584ef10_phy_power( 585 __in efx_nic_t *enp, 586 __in boolean_t on); 587 588extern __checkReturn efx_rc_t 589ef10_phy_reconfigure( 590 __in efx_nic_t *enp); 591 592extern __checkReturn efx_rc_t 593ef10_phy_verify( 594 __in efx_nic_t *enp); 595 596extern __checkReturn efx_rc_t 597ef10_phy_oui_get( 598 __in efx_nic_t *enp, 599 __out uint32_t *ouip); 600 601#if EFSYS_OPT_PHY_STATS 602 603extern __checkReturn efx_rc_t 604ef10_phy_stats_update( 605 __in efx_nic_t *enp, 606 __in efsys_mem_t *esmp, 607 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 608 609#endif /* EFSYS_OPT_PHY_STATS */ 610 611#if EFSYS_OPT_BIST 612 613extern __checkReturn efx_rc_t 614ef10_bist_enable_offline( 615 __in efx_nic_t *enp); 616 617extern __checkReturn efx_rc_t 618ef10_bist_start( 619 __in efx_nic_t *enp, 620 __in efx_bist_type_t type); 621 622extern __checkReturn efx_rc_t 623ef10_bist_poll( 624 __in efx_nic_t *enp, 625 __in efx_bist_type_t type, 626 __out efx_bist_result_t *resultp, 627 __out_opt __drv_when(count > 0, __notnull) 628 uint32_t *value_maskp, 629 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 630 unsigned long *valuesp, 631 __in size_t count); 632 633extern void 634ef10_bist_stop( 635 __in efx_nic_t *enp, 636 __in efx_bist_type_t type); 637 638#endif /* EFSYS_OPT_BIST */ 639 640/* TX */ 641 642extern __checkReturn efx_rc_t 643ef10_tx_init( 644 __in efx_nic_t *enp); 645 646extern void 647ef10_tx_fini( 648 __in efx_nic_t *enp); 649 650extern __checkReturn efx_rc_t 651ef10_tx_qcreate( 652 __in efx_nic_t *enp, 653 __in unsigned int index, 654 __in unsigned int label, 655 __in efsys_mem_t *esmp, 656 __in size_t n, 657 __in uint32_t id, 658 __in uint16_t flags, 659 __in efx_evq_t *eep, 660 __in efx_txq_t *etp, 661 __out unsigned int *addedp); 662 663extern void 664ef10_tx_qdestroy( 665 __in efx_txq_t *etp); 666 667extern __checkReturn efx_rc_t 668ef10_tx_qpost( 669 __in efx_txq_t *etp, 670 __in_ecount(n) efx_buffer_t *eb, 671 __in unsigned int n, 672 __in unsigned int completed, 673 __inout unsigned int *addedp); 674 675extern void 676ef10_tx_qpush( 677 __in efx_txq_t *etp, 678 __in unsigned int added, 679 __in unsigned int pushed); 680 681extern __checkReturn efx_rc_t 682ef10_tx_qpace( 683 __in efx_txq_t *etp, 684 __in unsigned int ns); 685 686extern __checkReturn efx_rc_t 687ef10_tx_qflush( 688 __in efx_txq_t *etp); 689 690extern void 691ef10_tx_qenable( 692 __in efx_txq_t *etp); 693 694extern __checkReturn efx_rc_t 695ef10_tx_qpio_enable( 696 __in efx_txq_t *etp); 697 698extern void 699ef10_tx_qpio_disable( 700 __in efx_txq_t *etp); 701 702extern __checkReturn efx_rc_t 703ef10_tx_qpio_write( 704 __in efx_txq_t *etp, 705 __in_ecount(buf_length) uint8_t *buffer, 706 __in size_t buf_length, 707 __in size_t pio_buf_offset); 708 709extern __checkReturn efx_rc_t 710ef10_tx_qpio_post( 711 __in efx_txq_t *etp, 712 __in size_t pkt_length, 713 __in unsigned int completed, 714 __inout unsigned int *addedp); 715 716extern __checkReturn efx_rc_t 717ef10_tx_qdesc_post( 718 __in efx_txq_t *etp, 719 __in_ecount(n) efx_desc_t *ed, 720 __in unsigned int n, 721 __in unsigned int completed, 722 __inout unsigned int *addedp); 723 724extern void 725ef10_tx_qdesc_dma_create( 726 __in efx_txq_t *etp, 727 __in efsys_dma_addr_t addr, 728 __in size_t size, 729 __in boolean_t eop, 730 __out efx_desc_t *edp); 731 732extern void 733ef10_tx_qdesc_tso_create( 734 __in efx_txq_t *etp, 735 __in uint16_t ipv4_id, 736 __in uint32_t tcp_seq, 737 __in uint8_t tcp_flags, 738 __out efx_desc_t *edp); 739 740extern void 741ef10_tx_qdesc_tso2_create( 742 __in efx_txq_t *etp, 743 __in uint16_t ipv4_id, 744 __in uint32_t tcp_seq, 745 __in uint16_t tcp_mss, 746 __out_ecount(count) efx_desc_t *edp, 747 __in int count); 748 749extern void 750ef10_tx_qdesc_vlantci_create( 751 __in efx_txq_t *etp, 752 __in uint16_t vlan_tci, 753 __out efx_desc_t *edp); 754 755 756#if EFSYS_OPT_QSTATS 757 758extern void 759ef10_tx_qstats_update( 760 __in efx_txq_t *etp, 761 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat); 762 763#endif /* EFSYS_OPT_QSTATS */ 764 765typedef uint32_t efx_piobuf_handle_t; 766 767#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1) 768 769extern __checkReturn efx_rc_t 770ef10_nic_pio_alloc( 771 __inout efx_nic_t *enp, 772 __out uint32_t *bufnump, 773 __out efx_piobuf_handle_t *handlep, 774 __out uint32_t *blknump, 775 __out uint32_t *offsetp, 776 __out size_t *sizep); 777 778extern __checkReturn efx_rc_t 779ef10_nic_pio_free( 780 __inout efx_nic_t *enp, 781 __in uint32_t bufnum, 782 __in uint32_t blknum); 783 784extern __checkReturn efx_rc_t 785ef10_nic_pio_link( 786 __inout efx_nic_t *enp, 787 __in uint32_t vi_index, 788 __in efx_piobuf_handle_t handle); 789 790extern __checkReturn efx_rc_t 791ef10_nic_pio_unlink( 792 __inout efx_nic_t *enp, 793 __in uint32_t vi_index); 794 795 796/* VPD */ 797 798#if EFSYS_OPT_VPD 799 800extern __checkReturn efx_rc_t 801ef10_vpd_init( 802 __in efx_nic_t *enp); 803 804extern __checkReturn efx_rc_t 805ef10_vpd_size( 806 __in efx_nic_t *enp, 807 __out size_t *sizep); 808 809extern __checkReturn efx_rc_t 810ef10_vpd_read( 811 __in efx_nic_t *enp, 812 __out_bcount(size) caddr_t data, 813 __in size_t size); 814 815extern __checkReturn efx_rc_t 816ef10_vpd_verify( 817 __in efx_nic_t *enp, 818 __in_bcount(size) caddr_t data, 819 __in size_t size); 820 821extern __checkReturn efx_rc_t 822ef10_vpd_reinit( 823 __in efx_nic_t *enp, 824 __in_bcount(size) caddr_t data, 825 __in size_t size); 826 827extern __checkReturn efx_rc_t 828ef10_vpd_get( 829 __in efx_nic_t *enp, 830 __in_bcount(size) caddr_t data, 831 __in size_t size, 832 __inout efx_vpd_value_t *evvp); 833 834extern __checkReturn efx_rc_t 835ef10_vpd_set( 836 __in efx_nic_t *enp, 837 __in_bcount(size) caddr_t data, 838 __in size_t size, 839 __in efx_vpd_value_t *evvp); 840 841extern __checkReturn efx_rc_t 842ef10_vpd_next( 843 __in efx_nic_t *enp, 844 __in_bcount(size) caddr_t data, 845 __in size_t size, 846 __out efx_vpd_value_t *evvp, 847 __inout unsigned int *contp); 848 849extern __checkReturn efx_rc_t 850ef10_vpd_write( 851 __in efx_nic_t *enp, 852 __in_bcount(size) caddr_t data, 853 __in size_t size); 854 855extern void 856ef10_vpd_fini( 857 __in efx_nic_t *enp); 858 859#endif /* EFSYS_OPT_VPD */ 860 861 862/* RX */ 863 864extern __checkReturn efx_rc_t 865ef10_rx_init( 866 __in efx_nic_t *enp); 867 868#if EFSYS_OPT_RX_SCATTER 869extern __checkReturn efx_rc_t 870ef10_rx_scatter_enable( 871 __in efx_nic_t *enp, 872 __in unsigned int buf_size); 873#endif /* EFSYS_OPT_RX_SCATTER */ 874 875 876#if EFSYS_OPT_RX_SCALE 877 878extern __checkReturn efx_rc_t 879ef10_rx_scale_mode_set( 880 __in efx_nic_t *enp, 881 __in efx_rx_hash_alg_t alg, 882 __in efx_rx_hash_type_t type, 883 __in boolean_t insert); 884 885extern __checkReturn efx_rc_t 886ef10_rx_scale_key_set( 887 __in efx_nic_t *enp, 888 __in_ecount(n) uint8_t *key, 889 __in size_t n); 890 891extern __checkReturn efx_rc_t 892ef10_rx_scale_tbl_set( 893 __in efx_nic_t *enp, 894 __in_ecount(n) unsigned int *table, 895 __in size_t n); 896 897extern __checkReturn uint32_t 898ef10_rx_prefix_hash( 899 __in efx_nic_t *enp, 900 __in efx_rx_hash_alg_t func, 901 __in uint8_t *buffer); 902 903#endif /* EFSYS_OPT_RX_SCALE */ 904 905extern __checkReturn efx_rc_t 906ef10_rx_prefix_pktlen( 907 __in efx_nic_t *enp, 908 __in uint8_t *buffer, 909 __out uint16_t *lengthp); 910 911extern void 912ef10_rx_qpost( 913 __in efx_rxq_t *erp, 914 __in_ecount(n) efsys_dma_addr_t *addrp, 915 __in size_t size, 916 __in unsigned int n, 917 __in unsigned int completed, 918 __in unsigned int added); 919 920extern void 921ef10_rx_qpush( 922 __in efx_rxq_t *erp, 923 __in unsigned int added, 924 __inout unsigned int *pushedp); 925 926extern __checkReturn efx_rc_t 927ef10_rx_qflush( 928 __in efx_rxq_t *erp); 929 930extern void 931ef10_rx_qenable( 932 __in efx_rxq_t *erp); 933 934extern __checkReturn efx_rc_t 935ef10_rx_qcreate( 936 __in efx_nic_t *enp, 937 __in unsigned int index, 938 __in unsigned int label, 939 __in efx_rxq_type_t type, 940 __in efsys_mem_t *esmp, 941 __in size_t n, 942 __in uint32_t id, 943 __in efx_evq_t *eep, 944 __in efx_rxq_t *erp); 945 946extern void 947ef10_rx_qdestroy( 948 __in efx_rxq_t *erp); 949 950extern void 951ef10_rx_fini( 952 __in efx_nic_t *enp); 953 954#if EFSYS_OPT_FILTER 955 956typedef struct ef10_filter_handle_s { 957 uint32_t efh_lo; 958 uint32_t efh_hi; 959} ef10_filter_handle_t; 960 961typedef struct ef10_filter_entry_s { 962 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */ 963 ef10_filter_handle_t efe_handle; 964} ef10_filter_entry_t; 965 966/* 967 * BUSY flag indicates that an update is in progress. 968 * AUTO_OLD flag is used to mark and sweep MAC packet filters. 969 */ 970#define EFX_EF10_FILTER_FLAG_BUSY 1U 971#define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U 972#define EFX_EF10_FILTER_FLAGS 3U 973 974/* 975 * Size of the hash table used by the driver. Doesn't need to be the 976 * same size as the hardware's table. 977 */ 978#define EFX_EF10_FILTER_TBL_ROWS 8192 979 980/* Only need to allow for one directed and one unknown unicast filter */ 981#define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2 982 983/* Allow for the broadcast address to be added to the multicast list */ 984#define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1) 985 986typedef struct ef10_filter_table_s { 987 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS]; 988 efx_rxq_t *eft_default_rxq; 989 boolean_t eft_using_rss; 990 uint32_t eft_unicst_filter_indexes[ 991 EFX_EF10_FILTER_UNICAST_FILTERS_MAX]; 992 uint32_t eft_unicst_filter_count; 993 uint32_t eft_mulcst_filter_indexes[ 994 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX]; 995 uint32_t eft_mulcst_filter_count; 996 boolean_t eft_using_all_mulcst; 997} ef10_filter_table_t; 998 999 __checkReturn efx_rc_t 1000ef10_filter_init( 1001 __in efx_nic_t *enp); 1002 1003 void 1004ef10_filter_fini( 1005 __in efx_nic_t *enp); 1006 1007 __checkReturn efx_rc_t 1008ef10_filter_restore( 1009 __in efx_nic_t *enp); 1010 1011 __checkReturn efx_rc_t 1012ef10_filter_add( 1013 __in efx_nic_t *enp, 1014 __inout efx_filter_spec_t *spec, 1015 __in boolean_t may_replace); 1016 1017 __checkReturn efx_rc_t 1018ef10_filter_delete( 1019 __in efx_nic_t *enp, 1020 __inout efx_filter_spec_t *spec); 1021 1022extern __checkReturn efx_rc_t 1023ef10_filter_supported_filters( 1024 __in efx_nic_t *enp, 1025 __out uint32_t *list, 1026 __out size_t *length); 1027 1028extern __checkReturn efx_rc_t 1029ef10_filter_reconfigure( 1030 __in efx_nic_t *enp, 1031 __in_ecount(6) uint8_t const *mac_addr, 1032 __in boolean_t all_unicst, 1033 __in boolean_t mulcst, 1034 __in boolean_t all_mulcst, 1035 __in boolean_t brdcst, 1036 __in_ecount(6*count) uint8_t const *addrs, 1037 __in uint32_t count); 1038 1039extern void 1040ef10_filter_get_default_rxq( 1041 __in efx_nic_t *enp, 1042 __out efx_rxq_t **erpp, 1043 __out boolean_t *using_rss); 1044 1045extern void 1046ef10_filter_default_rxq_set( 1047 __in efx_nic_t *enp, 1048 __in efx_rxq_t *erp, 1049 __in boolean_t using_rss); 1050 1051extern void 1052ef10_filter_default_rxq_clear( 1053 __in efx_nic_t *enp); 1054 1055 1056#endif /* EFSYS_OPT_FILTER */ 1057 1058extern __checkReturn efx_rc_t 1059efx_mcdi_get_function_info( 1060 __in efx_nic_t *enp, 1061 __out uint32_t *pfp, 1062 __out_opt uint32_t *vfp); 1063 1064extern __checkReturn efx_rc_t 1065efx_mcdi_privilege_mask( 1066 __in efx_nic_t *enp, 1067 __in uint32_t pf, 1068 __in uint32_t vf, 1069 __out uint32_t *maskp); 1070 1071extern __checkReturn efx_rc_t 1072efx_mcdi_get_port_assignment( 1073 __in efx_nic_t *enp, 1074 __out uint32_t *portp); 1075 1076extern __checkReturn efx_rc_t 1077efx_mcdi_get_port_modes( 1078 __in efx_nic_t *enp, 1079 __out uint32_t *modesp, 1080 __out_opt uint32_t *current_modep); 1081 1082extern __checkReturn efx_rc_t 1083ef10_nic_get_port_mode_bandwidth( 1084 __in uint32_t port_mode, 1085 __out uint32_t *bandwidth_mbpsp); 1086 1087extern __checkReturn efx_rc_t 1088efx_mcdi_get_mac_address_pf( 1089 __in efx_nic_t *enp, 1090 __out_ecount_opt(6) uint8_t mac_addrp[6]); 1091 1092extern __checkReturn efx_rc_t 1093efx_mcdi_get_mac_address_vf( 1094 __in efx_nic_t *enp, 1095 __out_ecount_opt(6) uint8_t mac_addrp[6]); 1096 1097extern __checkReturn efx_rc_t 1098efx_mcdi_get_clock( 1099 __in efx_nic_t *enp, 1100 __out uint32_t *sys_freqp, 1101 __out uint32_t *dpcpu_freqp); 1102 1103 1104extern __checkReturn efx_rc_t 1105efx_mcdi_get_vector_cfg( 1106 __in efx_nic_t *enp, 1107 __out_opt uint32_t *vec_basep, 1108 __out_opt uint32_t *pf_nvecp, 1109 __out_opt uint32_t *vf_nvecp); 1110 1111extern __checkReturn efx_rc_t 1112ef10_get_datapath_caps( 1113 __in efx_nic_t *enp); 1114 1115extern __checkReturn efx_rc_t 1116ef10_get_privilege_mask( 1117 __in efx_nic_t *enp, 1118 __out uint32_t *maskp); 1119 1120extern __checkReturn efx_rc_t 1121ef10_external_port_mapping( 1122 __in efx_nic_t *enp, 1123 __in uint32_t port, 1124 __out uint8_t *external_portp); 1125 1126 1127#ifdef __cplusplus 1128} 1129#endif 1130 1131#endif /* _SYS_EF10_IMPL_H */ 1132