sdhci_fdt.c revision 270885 
1/*-
2 * Copyright (c) 2012 Thomas Skibo
3 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27/* Generic driver to attach sdhci controllers on simplebus.
28 * Derived mainly from sdhci_pci.c
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/sdhci/sdhci_fdt.c 270885 2014-08-31 17:56:54Z marius $");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/conf.h>
38#include <sys/kernel.h>
39#include <sys/lock.h>
40#include <sys/module.h>
41#include <sys/mutex.h>
42#include <sys/resource.h>
43#include <sys/rman.h>
44#include <sys/sysctl.h>
45#include <sys/taskqueue.h>
46
47#include <machine/bus.h>
48#include <machine/resource.h>
49#include <machine/stdarg.h>
50
51#include <dev/fdt/fdt_common.h>
52#include <dev/ofw/ofw_bus.h>
53#include <dev/ofw/ofw_bus_subr.h>
54
55#include <dev/mmc/bridge.h>
56#include <dev/mmc/mmcreg.h>
57#include <dev/mmc/mmcbrvar.h>
58#include <dev/sdhci/sdhci.h>
59
60#include "mmcbr_if.h"
61#include "sdhci_if.h"
62
63#define MAX_SLOTS	6
64
65struct sdhci_fdt_softc {
66	device_t	dev;		/* Controller device */
67	u_int		quirks;		/* Chip specific quirks */
68	u_int		caps;		/* If we override SDHCI_CAPABILITIES */
69	uint32_t	max_clk;	/* Max possible freq */
70	struct resource *irq_res;	/* IRQ resource */
71	void 		*intrhand;	/* Interrupt handle */
72
73	int		num_slots;	/* Number of slots on this controller*/
74	struct sdhci_slot slots[MAX_SLOTS];
75	struct resource	*mem_res[MAX_SLOTS];	/* Memory resource */
76};
77
78static uint8_t
79sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
80{
81	struct sdhci_fdt_softc *sc = device_get_softc(dev);
82	return (bus_read_1(sc->mem_res[slot->num], off));
83}
84
85static void
86sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
87		  uint8_t val)
88{
89	struct sdhci_fdt_softc *sc = device_get_softc(dev);
90	bus_write_1(sc->mem_res[slot->num], off, val);
91}
92
93static uint16_t
94sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
95{
96	struct sdhci_fdt_softc *sc = device_get_softc(dev);
97	return (bus_read_2(sc->mem_res[slot->num], off));
98}
99
100static void
101sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
102		  uint16_t val)
103{
104	struct sdhci_fdt_softc *sc = device_get_softc(dev);
105	bus_write_2(sc->mem_res[slot->num], off, val);
106}
107
108static uint32_t
109sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
110{
111	struct sdhci_fdt_softc *sc = device_get_softc(dev);
112	return (bus_read_4(sc->mem_res[slot->num], off));
113}
114
115static void
116sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
117		  uint32_t val)
118{
119	struct sdhci_fdt_softc *sc = device_get_softc(dev);
120	bus_write_4(sc->mem_res[slot->num], off, val);
121}
122
123static void
124sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot,
125    bus_size_t off, uint32_t *data, bus_size_t count)
126{
127	struct sdhci_fdt_softc *sc = device_get_softc(dev);
128	bus_read_multi_4(sc->mem_res[slot->num], off, data, count);
129}
130
131static void
132sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot,
133    bus_size_t off, uint32_t *data, bus_size_t count)
134{
135	struct sdhci_fdt_softc *sc = device_get_softc(dev);
136	bus_write_multi_4(sc->mem_res[slot->num], off, data, count);
137}
138
139static void
140sdhci_fdt_intr(void *arg)
141{
142	struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg;
143	int i;
144
145	for (i = 0; i < sc->num_slots; i++) {
146		struct sdhci_slot *slot = &sc->slots[i];
147		sdhci_generic_intr(slot);
148	}
149}
150
151static int
152sdhci_fdt_probe(device_t dev)
153{
154	struct sdhci_fdt_softc *sc = device_get_softc(dev);
155	phandle_t node;
156	pcell_t cid;
157
158	sc->quirks = 0;
159	sc->num_slots = 1;
160	sc->max_clk = 0;
161
162	if (!ofw_bus_status_okay(dev))
163		return (ENXIO);
164
165	if (ofw_bus_is_compatible(dev, "sdhci_generic")) {
166		device_set_desc(dev, "generic fdt SDHCI controller");
167	} else if (ofw_bus_is_compatible(dev, "xlnx,zy7_sdhci")) {
168		sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
169		device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller");
170	} else
171		return (ENXIO);
172
173	node = ofw_bus_get_node(dev);
174
175	/* Allow dts to patch quirks, slots, and max-frequency. */
176	if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0)
177		sc->quirks = cid;
178	if ((OF_getencprop(node, "num-slots", &cid, sizeof(cid))) > 0)
179		sc->num_slots = cid;
180	if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0)
181		sc->max_clk = cid;
182
183	return (0);
184}
185
186static int
187sdhci_fdt_attach(device_t dev)
188{
189	struct sdhci_fdt_softc *sc = device_get_softc(dev);
190	int err, slots, rid, i;
191
192	sc->dev = dev;
193
194	/* Allocate IRQ. */
195	rid = 0;
196	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
197					     RF_ACTIVE);
198	if (sc->irq_res == NULL) {
199		device_printf(dev, "Can't allocate IRQ\n");
200		return (ENOMEM);
201	}
202
203	/* Scan all slots. */
204	slots = sc->num_slots;	/* number of slots determined in probe(). */
205	sc->num_slots = 0;
206	for (i = 0; i < slots; i++) {
207		struct sdhci_slot *slot = &sc->slots[sc->num_slots];
208
209		/* Allocate memory. */
210		rid = 0;
211		sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
212							&rid, RF_ACTIVE);
213		if (sc->mem_res[i] == NULL) {
214			device_printf(dev, "Can't allocate memory for "
215				      "slot %d\n", i);
216			continue;
217		}
218
219		slot->quirks = sc->quirks;
220		slot->caps = sc->caps;
221		slot->max_clk = sc->max_clk;
222
223		if (sdhci_init_slot(dev, slot, i) != 0)
224			continue;
225
226		sc->num_slots++;
227	}
228	device_printf(dev, "%d slot(s) allocated\n", sc->num_slots);
229
230	/* Activate the interrupt */
231	err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
232	    NULL, sdhci_fdt_intr, sc, &sc->intrhand);
233	if (err) {
234		device_printf(dev, "Cannot setup IRQ\n");
235		return (err);
236	}
237
238	/* Process cards detection. */
239	for (i = 0; i < sc->num_slots; i++) {
240		struct sdhci_slot *slot = &sc->slots[i];
241		sdhci_start_slot(slot);
242	}
243
244	return (0);
245}
246
247static int
248sdhci_fdt_detach(device_t dev)
249{
250	struct sdhci_fdt_softc *sc = device_get_softc(dev);
251	int i;
252
253	bus_generic_detach(dev);
254	bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
255	bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res),
256			     sc->irq_res);
257
258	for (i = 0; i < sc->num_slots; i++) {
259		struct sdhci_slot *slot = &sc->slots[i];
260
261		sdhci_cleanup_slot(slot);
262		bus_release_resource(dev, SYS_RES_MEMORY,
263				     rman_get_rid(sc->mem_res[i]),
264				     sc->mem_res[i]);
265	}
266
267	return (0);
268}
269
270static device_method_t sdhci_fdt_methods[] = {
271	/* device_if */
272	DEVMETHOD(device_probe, 	sdhci_fdt_probe),
273	DEVMETHOD(device_attach, 	sdhci_fdt_attach),
274	DEVMETHOD(device_detach, 	sdhci_fdt_detach),
275
276	/* Bus interface */
277	DEVMETHOD(bus_read_ivar,	sdhci_generic_read_ivar),
278	DEVMETHOD(bus_write_ivar,	sdhci_generic_write_ivar),
279
280	/* mmcbr_if */
281	DEVMETHOD(mmcbr_update_ios, 	sdhci_generic_update_ios),
282	DEVMETHOD(mmcbr_request, 	sdhci_generic_request),
283	DEVMETHOD(mmcbr_get_ro, 	sdhci_generic_get_ro),
284	DEVMETHOD(mmcbr_acquire_host, 	sdhci_generic_acquire_host),
285	DEVMETHOD(mmcbr_release_host, 	sdhci_generic_release_host),
286
287	/* SDHCI registers accessors */
288	DEVMETHOD(sdhci_read_1,		sdhci_fdt_read_1),
289	DEVMETHOD(sdhci_read_2,		sdhci_fdt_read_2),
290	DEVMETHOD(sdhci_read_4,		sdhci_fdt_read_4),
291	DEVMETHOD(sdhci_read_multi_4,	sdhci_fdt_read_multi_4),
292	DEVMETHOD(sdhci_write_1,	sdhci_fdt_write_1),
293	DEVMETHOD(sdhci_write_2,	sdhci_fdt_write_2),
294	DEVMETHOD(sdhci_write_4,	sdhci_fdt_write_4),
295	DEVMETHOD(sdhci_write_multi_4,	sdhci_fdt_write_multi_4),
296
297	DEVMETHOD_END
298};
299
300static driver_t sdhci_fdt_driver = {
301	"sdhci_fdt",
302	sdhci_fdt_methods,
303	sizeof(struct sdhci_fdt_softc),
304};
305static devclass_t sdhci_fdt_devclass;
306
307DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass,
308    NULL, NULL);
309MODULE_DEPEND(sdhci_fdt, sdhci, 1, 1, 1);
310