1117845Ssam/*- 2117845Ssam * Copyright (c) 2003 Sam Leffler, Errno Consulting 3117845Ssam * Copyright (c) 2003 Global Technology Associates, Inc. 4117845Ssam * All rights reserved. 5117845Ssam * 6117845Ssam * Redistribution and use in source and binary forms, with or without 7117845Ssam * modification, are permitted provided that the following conditions 8117845Ssam * are met: 9117845Ssam * 1. Redistributions of source code must retain the above copyright 10117845Ssam * notice, this list of conditions and the following disclaimer. 11117845Ssam * 2. Redistributions in binary form must reproduce the above copyright 12117845Ssam * notice, this list of conditions and the following disclaimer in the 13117845Ssam * documentation and/or other materials provided with the distribution. 14117845Ssam * 15117845Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16117845Ssam * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17117845Ssam * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18117845Ssam * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19117845Ssam * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20117845Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21117845Ssam * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22117845Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23117845Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24117845Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25117845Ssam * SUCH DAMAGE. 26117845Ssam */ 27117845Ssam 28117845Ssam#include <sys/cdefs.h> 29117845Ssam__FBSDID("$FreeBSD$"); 30117845Ssam 31117845Ssam/* 32117845Ssam * SafeNet SafeXcel-1141 hardware crypto accelerator 33117845Ssam */ 34117845Ssam#include "opt_safe.h" 35117845Ssam 36117845Ssam#include <sys/param.h> 37117845Ssam#include <sys/systm.h> 38117845Ssam#include <sys/proc.h> 39117845Ssam#include <sys/errno.h> 40117845Ssam#include <sys/malloc.h> 41117845Ssam#include <sys/kernel.h> 42117845Ssam#include <sys/mbuf.h> 43129879Sphk#include <sys/module.h> 44117845Ssam#include <sys/lock.h> 45117845Ssam#include <sys/mutex.h> 46117845Ssam#include <sys/sysctl.h> 47117845Ssam#include <sys/endian.h> 48117845Ssam 49117845Ssam#include <vm/vm.h> 50117845Ssam#include <vm/pmap.h> 51117845Ssam 52117845Ssam#include <machine/bus.h> 53117845Ssam#include <machine/resource.h> 54117845Ssam#include <sys/bus.h> 55117845Ssam#include <sys/rman.h> 56117845Ssam 57117845Ssam#include <crypto/sha1.h> 58117845Ssam#include <opencrypto/cryptodev.h> 59117845Ssam#include <opencrypto/cryptosoft.h> 60117845Ssam#include <sys/md5.h> 61117845Ssam#include <sys/random.h> 62167755Ssam#include <sys/kobj.h> 63117845Ssam 64167755Ssam#include "cryptodev_if.h" 65167755Ssam 66119287Simp#include <dev/pci/pcivar.h> 67119287Simp#include <dev/pci/pcireg.h> 68117845Ssam 69117845Ssam#ifdef SAFE_RNDTEST 70117845Ssam#include <dev/rndtest/rndtest.h> 71117845Ssam#endif 72117845Ssam#include <dev/safe/safereg.h> 73117845Ssam#include <dev/safe/safevar.h> 74117845Ssam 75117845Ssam#ifndef bswap32 76117845Ssam#define bswap32 NTOHL 77117845Ssam#endif 78117845Ssam 79117845Ssam/* 80117845Ssam * Prototypes and count for the pci_device structure 81117845Ssam */ 82117845Ssamstatic int safe_probe(device_t); 83117845Ssamstatic int safe_attach(device_t); 84117845Ssamstatic int safe_detach(device_t); 85117845Ssamstatic int safe_suspend(device_t); 86117845Ssamstatic int safe_resume(device_t); 87188178Simpstatic int safe_shutdown(device_t); 88117845Ssam 89167755Ssamstatic int safe_newsession(device_t, u_int32_t *, struct cryptoini *); 90167755Ssamstatic int safe_freesession(device_t, u_int64_t); 91167755Ssamstatic int safe_process(device_t, struct cryptop *, int); 92167755Ssam 93117845Ssamstatic device_method_t safe_methods[] = { 94117845Ssam /* Device interface */ 95117845Ssam DEVMETHOD(device_probe, safe_probe), 96117845Ssam DEVMETHOD(device_attach, safe_attach), 97117845Ssam DEVMETHOD(device_detach, safe_detach), 98117845Ssam DEVMETHOD(device_suspend, safe_suspend), 99117845Ssam DEVMETHOD(device_resume, safe_resume), 100117845Ssam DEVMETHOD(device_shutdown, safe_shutdown), 101117845Ssam 102167755Ssam /* crypto device methods */ 103167755Ssam DEVMETHOD(cryptodev_newsession, safe_newsession), 104167755Ssam DEVMETHOD(cryptodev_freesession,safe_freesession), 105167755Ssam DEVMETHOD(cryptodev_process, safe_process), 106167755Ssam 107227843Smarius DEVMETHOD_END 108117845Ssam}; 109117845Ssamstatic driver_t safe_driver = { 110117845Ssam "safe", 111117845Ssam safe_methods, 112117845Ssam sizeof (struct safe_softc) 113117845Ssam}; 114117845Ssamstatic devclass_t safe_devclass; 115117845Ssam 116117845SsamDRIVER_MODULE(safe, pci, safe_driver, safe_devclass, 0, 0); 117117845SsamMODULE_DEPEND(safe, crypto, 1, 1, 1); 118117845Ssam#ifdef SAFE_RNDTEST 119117845SsamMODULE_DEPEND(safe, rndtest, 1, 1, 1); 120117845Ssam#endif 121117845Ssam 122117845Ssamstatic void safe_intr(void *); 123117845Ssamstatic void safe_callback(struct safe_softc *, struct safe_ringentry *); 124117845Ssamstatic void safe_feed(struct safe_softc *, struct safe_ringentry *); 125117845Ssamstatic void safe_mcopy(struct mbuf *, struct mbuf *, u_int); 126117845Ssam#ifndef SAFE_NO_RNG 127117845Ssamstatic void safe_rng_init(struct safe_softc *); 128117845Ssamstatic void safe_rng(void *); 129117845Ssam#endif /* SAFE_NO_RNG */ 130117845Ssamstatic int safe_dma_malloc(struct safe_softc *, bus_size_t, 131117845Ssam struct safe_dma_alloc *, int); 132117845Ssam#define safe_dma_sync(_dma, _flags) \ 133117845Ssam bus_dmamap_sync((_dma)->dma_tag, (_dma)->dma_map, (_flags)) 134117845Ssamstatic void safe_dma_free(struct safe_softc *, struct safe_dma_alloc *); 135117845Ssamstatic int safe_dmamap_aligned(const struct safe_operand *); 136117845Ssamstatic int safe_dmamap_uniform(const struct safe_operand *); 137117845Ssam 138117845Ssamstatic void safe_reset_board(struct safe_softc *); 139117845Ssamstatic void safe_init_board(struct safe_softc *); 140117845Ssamstatic void safe_init_pciregs(device_t dev); 141117845Ssamstatic void safe_cleanchip(struct safe_softc *); 142117845Ssamstatic void safe_totalreset(struct safe_softc *); 143117845Ssam 144117845Ssamstatic int safe_free_entry(struct safe_softc *, struct safe_ringentry *); 145117845Ssam 146227309Sedstatic SYSCTL_NODE(_hw, OID_AUTO, safe, CTLFLAG_RD, 0, 147227309Sed "SafeNet driver parameters"); 148117845Ssam 149117845Ssam#ifdef SAFE_DEBUG 150117845Ssamstatic void safe_dump_dmastatus(struct safe_softc *, const char *); 151117845Ssamstatic void safe_dump_ringstate(struct safe_softc *, const char *); 152117845Ssamstatic void safe_dump_intrstate(struct safe_softc *, const char *); 153117845Ssamstatic void safe_dump_request(struct safe_softc *, const char *, 154117845Ssam struct safe_ringentry *); 155117845Ssam 156117845Ssamstatic struct safe_softc *safec; /* for use by hw.safe.dump */ 157117845Ssam 158117845Ssamstatic int safe_debug = 0; 159117845SsamSYSCTL_INT(_hw_safe, OID_AUTO, debug, CTLFLAG_RW, &safe_debug, 160117845Ssam 0, "control debugging msgs"); 161117845Ssam#define DPRINTF(_x) if (safe_debug) printf _x 162117845Ssam#else 163117845Ssam#define DPRINTF(_x) 164117845Ssam#endif 165117845Ssam 166117845Ssam#define READ_REG(sc,r) \ 167117845Ssam bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r)) 168117845Ssam 169117845Ssam#define WRITE_REG(sc,reg,val) \ 170117845Ssam bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val) 171117845Ssam 172117845Ssamstruct safe_stats safestats; 173117845SsamSYSCTL_STRUCT(_hw_safe, OID_AUTO, stats, CTLFLAG_RD, &safestats, 174117845Ssam safe_stats, "driver statistics"); 175117845Ssam#ifndef SAFE_NO_RNG 176117845Ssamstatic int safe_rnginterval = 1; /* poll once a second */ 177117845SsamSYSCTL_INT(_hw_safe, OID_AUTO, rnginterval, CTLFLAG_RW, &safe_rnginterval, 178117845Ssam 0, "RNG polling interval (secs)"); 179117845Ssamstatic int safe_rngbufsize = 16; /* 64 bytes each poll */ 180117845SsamSYSCTL_INT(_hw_safe, OID_AUTO, rngbufsize, CTLFLAG_RW, &safe_rngbufsize, 181117845Ssam 0, "RNG polling buffer size (32-bit words)"); 182117845Ssamstatic int safe_rngmaxalarm = 8; /* max alarms before reset */ 183117845SsamSYSCTL_INT(_hw_safe, OID_AUTO, rngmaxalarm, CTLFLAG_RW, &safe_rngmaxalarm, 184117845Ssam 0, "RNG max alarms before reset"); 185117845Ssam#endif /* SAFE_NO_RNG */ 186117845Ssam 187117845Ssamstatic int 188117845Ssamsafe_probe(device_t dev) 189117845Ssam{ 190117845Ssam if (pci_get_vendor(dev) == PCI_VENDOR_SAFENET && 191117845Ssam pci_get_device(dev) == PCI_PRODUCT_SAFEXCEL) 192142890Simp return (BUS_PROBE_DEFAULT); 193117845Ssam return (ENXIO); 194117845Ssam} 195117845Ssam 196117845Ssamstatic const char* 197117845Ssamsafe_partname(struct safe_softc *sc) 198117845Ssam{ 199117845Ssam /* XXX sprintf numbers when not decoded */ 200117845Ssam switch (pci_get_vendor(sc->sc_dev)) { 201117845Ssam case PCI_VENDOR_SAFENET: 202117845Ssam switch (pci_get_device(sc->sc_dev)) { 203117845Ssam case PCI_PRODUCT_SAFEXCEL: return "SafeNet SafeXcel-1141"; 204117845Ssam } 205117845Ssam return "SafeNet unknown-part"; 206117845Ssam } 207117845Ssam return "Unknown-vendor unknown-part"; 208117845Ssam} 209117845Ssam 210117845Ssam#ifndef SAFE_NO_RNG 211117845Ssamstatic void 212117845Ssamdefault_harvest(struct rndtest_state *rsp, void *buf, u_int count) 213117845Ssam{ 214284959Smarkm /* MarkM: FIX!! Check that this does not swamp the harvester! */ 215284959Smarkm random_harvest_queue(buf, count, count*NBBY/2, RANDOM_PURE_SAFE); 216117845Ssam} 217117845Ssam#endif /* SAFE_NO_RNG */ 218117845Ssam 219117845Ssamstatic int 220117845Ssamsafe_attach(device_t dev) 221117845Ssam{ 222117845Ssam struct safe_softc *sc = device_get_softc(dev); 223117845Ssam u_int32_t raddr; 224254263Sscottl u_int32_t i, devinfo; 225117845Ssam int rid; 226117845Ssam 227117845Ssam bzero(sc, sizeof (*sc)); 228117845Ssam sc->sc_dev = dev; 229117845Ssam 230117845Ssam /* XXX handle power management */ 231117845Ssam 232254263Sscottl pci_enable_busmaster(dev); 233117845Ssam 234117845Ssam /* 235117845Ssam * Setup memory-mapping of PCI registers. 236117845Ssam */ 237117845Ssam rid = BS_BAR; 238127135Snjl sc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 239127135Snjl RF_ACTIVE); 240117845Ssam if (sc->sc_sr == NULL) { 241117845Ssam device_printf(dev, "cannot map register space\n"); 242117845Ssam goto bad; 243117845Ssam } 244117845Ssam sc->sc_st = rman_get_bustag(sc->sc_sr); 245117845Ssam sc->sc_sh = rman_get_bushandle(sc->sc_sr); 246117845Ssam 247117845Ssam /* 248117845Ssam * Arrange interrupt line. 249117845Ssam */ 250117845Ssam rid = 0; 251127135Snjl sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 252127135Snjl RF_SHAREABLE|RF_ACTIVE); 253117845Ssam if (sc->sc_irq == NULL) { 254117845Ssam device_printf(dev, "could not map interrupt\n"); 255117845Ssam goto bad1; 256117845Ssam } 257117845Ssam /* 258117845Ssam * NB: Network code assumes we are blocked with splimp() 259117845Ssam * so make sure the IRQ is mapped appropriately. 260117845Ssam */ 261117845Ssam if (bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 262166901Spiso NULL, safe_intr, sc, &sc->sc_ih)) { 263117845Ssam device_printf(dev, "could not establish interrupt\n"); 264117845Ssam goto bad2; 265117845Ssam } 266117845Ssam 267167755Ssam sc->sc_cid = crypto_get_driverid(dev, CRYPTOCAP_F_HARDWARE); 268117845Ssam if (sc->sc_cid < 0) { 269117845Ssam device_printf(dev, "could not get crypto driver id\n"); 270117845Ssam goto bad3; 271117845Ssam } 272117845Ssam 273117845Ssam sc->sc_chiprev = READ_REG(sc, SAFE_DEVINFO) & 274117845Ssam (SAFE_DEVINFO_REV_MAJ | SAFE_DEVINFO_REV_MIN); 275117845Ssam 276117845Ssam /* 277117845Ssam * Setup DMA descriptor area. 278117845Ssam */ 279232874Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 280117845Ssam 1, /* alignment */ 281117845Ssam SAFE_DMA_BOUNDARY, /* boundary */ 282117845Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 283117845Ssam BUS_SPACE_MAXADDR, /* highaddr */ 284117845Ssam NULL, NULL, /* filter, filterarg */ 285117845Ssam SAFE_MAX_DMA, /* maxsize */ 286117845Ssam SAFE_MAX_PART, /* nsegments */ 287117845Ssam SAFE_MAX_SSIZE, /* maxsegsize */ 288117845Ssam BUS_DMA_ALLOCNOW, /* flags */ 289117845Ssam NULL, NULL, /* locking */ 290117845Ssam &sc->sc_srcdmat)) { 291117845Ssam device_printf(dev, "cannot allocate DMA tag\n"); 292117845Ssam goto bad4; 293117845Ssam } 294232874Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 295173307Ssam 1, /* alignment */ 296117845Ssam SAFE_MAX_DSIZE, /* boundary */ 297117845Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 298117845Ssam BUS_SPACE_MAXADDR, /* highaddr */ 299117845Ssam NULL, NULL, /* filter, filterarg */ 300117845Ssam SAFE_MAX_DMA, /* maxsize */ 301117845Ssam SAFE_MAX_PART, /* nsegments */ 302117845Ssam SAFE_MAX_DSIZE, /* maxsegsize */ 303117845Ssam BUS_DMA_ALLOCNOW, /* flags */ 304117845Ssam NULL, NULL, /* locking */ 305117845Ssam &sc->sc_dstdmat)) { 306117845Ssam device_printf(dev, "cannot allocate DMA tag\n"); 307117845Ssam goto bad4; 308117845Ssam } 309117845Ssam 310117845Ssam /* 311117845Ssam * Allocate packet engine descriptors. 312117845Ssam */ 313117845Ssam if (safe_dma_malloc(sc, 314117845Ssam SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry), 315117845Ssam &sc->sc_ringalloc, 0)) { 316117845Ssam device_printf(dev, "cannot allocate PE descriptor ring\n"); 317117845Ssam bus_dma_tag_destroy(sc->sc_srcdmat); 318117845Ssam goto bad4; 319117845Ssam } 320117845Ssam /* 321117845Ssam * Hookup the static portion of all our data structures. 322117845Ssam */ 323117845Ssam sc->sc_ring = (struct safe_ringentry *) sc->sc_ringalloc.dma_vaddr; 324117845Ssam sc->sc_ringtop = sc->sc_ring + SAFE_MAX_NQUEUE; 325117845Ssam sc->sc_front = sc->sc_ring; 326117845Ssam sc->sc_back = sc->sc_ring; 327117845Ssam raddr = sc->sc_ringalloc.dma_paddr; 328117845Ssam bzero(sc->sc_ring, SAFE_MAX_NQUEUE * sizeof(struct safe_ringentry)); 329117845Ssam for (i = 0; i < SAFE_MAX_NQUEUE; i++) { 330117845Ssam struct safe_ringentry *re = &sc->sc_ring[i]; 331117845Ssam 332117845Ssam re->re_desc.d_sa = raddr + 333117845Ssam offsetof(struct safe_ringentry, re_sa); 334117845Ssam re->re_sa.sa_staterec = raddr + 335117845Ssam offsetof(struct safe_ringentry, re_sastate); 336117845Ssam 337117845Ssam raddr += sizeof (struct safe_ringentry); 338117845Ssam } 339117845Ssam mtx_init(&sc->sc_ringmtx, device_get_nameunit(dev), 340117845Ssam "packet engine ring", MTX_DEF); 341117845Ssam 342117845Ssam /* 343117845Ssam * Allocate scatter and gather particle descriptors. 344117845Ssam */ 345117845Ssam if (safe_dma_malloc(sc, SAFE_TOTAL_SPART * sizeof (struct safe_pdesc), 346117845Ssam &sc->sc_spalloc, 0)) { 347117845Ssam device_printf(dev, "cannot allocate source particle " 348117845Ssam "descriptor ring\n"); 349117845Ssam mtx_destroy(&sc->sc_ringmtx); 350117845Ssam safe_dma_free(sc, &sc->sc_ringalloc); 351117845Ssam bus_dma_tag_destroy(sc->sc_srcdmat); 352117845Ssam goto bad4; 353117845Ssam } 354117845Ssam sc->sc_spring = (struct safe_pdesc *) sc->sc_spalloc.dma_vaddr; 355117845Ssam sc->sc_springtop = sc->sc_spring + SAFE_TOTAL_SPART; 356117845Ssam sc->sc_spfree = sc->sc_spring; 357117845Ssam bzero(sc->sc_spring, SAFE_TOTAL_SPART * sizeof(struct safe_pdesc)); 358117845Ssam 359117845Ssam if (safe_dma_malloc(sc, SAFE_TOTAL_DPART * sizeof (struct safe_pdesc), 360117845Ssam &sc->sc_dpalloc, 0)) { 361117845Ssam device_printf(dev, "cannot allocate destination particle " 362117845Ssam "descriptor ring\n"); 363117845Ssam mtx_destroy(&sc->sc_ringmtx); 364117845Ssam safe_dma_free(sc, &sc->sc_spalloc); 365117845Ssam safe_dma_free(sc, &sc->sc_ringalloc); 366117845Ssam bus_dma_tag_destroy(sc->sc_dstdmat); 367117845Ssam goto bad4; 368117845Ssam } 369117845Ssam sc->sc_dpring = (struct safe_pdesc *) sc->sc_dpalloc.dma_vaddr; 370117845Ssam sc->sc_dpringtop = sc->sc_dpring + SAFE_TOTAL_DPART; 371117845Ssam sc->sc_dpfree = sc->sc_dpring; 372117845Ssam bzero(sc->sc_dpring, SAFE_TOTAL_DPART * sizeof(struct safe_pdesc)); 373117845Ssam 374117845Ssam device_printf(sc->sc_dev, "%s", safe_partname(sc)); 375117845Ssam 376117845Ssam devinfo = READ_REG(sc, SAFE_DEVINFO); 377117845Ssam if (devinfo & SAFE_DEVINFO_RNG) { 378117845Ssam sc->sc_flags |= SAFE_FLAGS_RNG; 379117845Ssam printf(" rng"); 380117845Ssam } 381117845Ssam if (devinfo & SAFE_DEVINFO_PKEY) { 382117845Ssam#if 0 383117845Ssam printf(" key"); 384117845Ssam sc->sc_flags |= SAFE_FLAGS_KEY; 385167755Ssam crypto_kregister(sc->sc_cid, CRK_MOD_EXP, 0); 386167755Ssam crypto_kregister(sc->sc_cid, CRK_MOD_EXP_CRT, 0); 387117845Ssam#endif 388117845Ssam } 389117845Ssam if (devinfo & SAFE_DEVINFO_DES) { 390117845Ssam printf(" des/3des"); 391167755Ssam crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0); 392167755Ssam crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0); 393117845Ssam } 394117845Ssam if (devinfo & SAFE_DEVINFO_AES) { 395117845Ssam printf(" aes"); 396167755Ssam crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0); 397117845Ssam } 398117845Ssam if (devinfo & SAFE_DEVINFO_MD5) { 399117845Ssam printf(" md5"); 400167755Ssam crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0); 401117845Ssam } 402117845Ssam if (devinfo & SAFE_DEVINFO_SHA1) { 403117845Ssam printf(" sha1"); 404167755Ssam crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0); 405117845Ssam } 406117845Ssam printf(" null"); 407167755Ssam crypto_register(sc->sc_cid, CRYPTO_NULL_CBC, 0, 0); 408167755Ssam crypto_register(sc->sc_cid, CRYPTO_NULL_HMAC, 0, 0); 409117845Ssam /* XXX other supported algorithms */ 410117845Ssam printf("\n"); 411117845Ssam 412117845Ssam safe_reset_board(sc); /* reset h/w */ 413117845Ssam safe_init_pciregs(dev); /* init pci settings */ 414117845Ssam safe_init_board(sc); /* init h/w */ 415117845Ssam 416117845Ssam#ifndef SAFE_NO_RNG 417117845Ssam if (sc->sc_flags & SAFE_FLAGS_RNG) { 418117845Ssam#ifdef SAFE_RNDTEST 419117845Ssam sc->sc_rndtest = rndtest_attach(dev); 420117845Ssam if (sc->sc_rndtest) 421117845Ssam sc->sc_harvest = rndtest_harvest; 422117845Ssam else 423117845Ssam sc->sc_harvest = default_harvest; 424117845Ssam#else 425117845Ssam sc->sc_harvest = default_harvest; 426117845Ssam#endif 427117845Ssam safe_rng_init(sc); 428117845Ssam 429283291Sjkim callout_init(&sc->sc_rngto, 1); 430117845Ssam callout_reset(&sc->sc_rngto, hz*safe_rnginterval, safe_rng, sc); 431117845Ssam } 432117845Ssam#endif /* SAFE_NO_RNG */ 433117845Ssam#ifdef SAFE_DEBUG 434117845Ssam safec = sc; /* for use by hw.safe.dump */ 435117845Ssam#endif 436117845Ssam return (0); 437117845Ssambad4: 438117845Ssam crypto_unregister_all(sc->sc_cid); 439117845Ssambad3: 440117845Ssam bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); 441117845Ssambad2: 442117845Ssam bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 443117845Ssambad1: 444117845Ssam bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, sc->sc_sr); 445117845Ssambad: 446117845Ssam return (ENXIO); 447117845Ssam} 448117845Ssam 449117845Ssam/* 450117845Ssam * Detach a device that successfully probed. 451117845Ssam */ 452117845Ssamstatic int 453117845Ssamsafe_detach(device_t dev) 454117845Ssam{ 455117845Ssam struct safe_softc *sc = device_get_softc(dev); 456117845Ssam 457117845Ssam /* XXX wait/abort active ops */ 458117845Ssam 459117845Ssam WRITE_REG(sc, SAFE_HI_MASK, 0); /* disable interrupts */ 460117845Ssam 461117845Ssam callout_stop(&sc->sc_rngto); 462117845Ssam 463117845Ssam crypto_unregister_all(sc->sc_cid); 464117845Ssam 465117845Ssam#ifdef SAFE_RNDTEST 466117845Ssam if (sc->sc_rndtest) 467117845Ssam rndtest_detach(sc->sc_rndtest); 468117845Ssam#endif 469117845Ssam 470117845Ssam safe_cleanchip(sc); 471117845Ssam safe_dma_free(sc, &sc->sc_dpalloc); 472117845Ssam safe_dma_free(sc, &sc->sc_spalloc); 473117845Ssam mtx_destroy(&sc->sc_ringmtx); 474117845Ssam safe_dma_free(sc, &sc->sc_ringalloc); 475117845Ssam 476117845Ssam bus_generic_detach(dev); 477117845Ssam bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); 478117845Ssam bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 479117845Ssam 480117845Ssam bus_dma_tag_destroy(sc->sc_srcdmat); 481117845Ssam bus_dma_tag_destroy(sc->sc_dstdmat); 482117845Ssam bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, sc->sc_sr); 483117845Ssam 484117845Ssam return (0); 485117845Ssam} 486117845Ssam 487117845Ssam/* 488117845Ssam * Stop all chip i/o so that the kernel's probe routines don't 489117845Ssam * get confused by errant DMAs when rebooting. 490117845Ssam */ 491188178Simpstatic int 492117845Ssamsafe_shutdown(device_t dev) 493117845Ssam{ 494117845Ssam#ifdef notyet 495117845Ssam safe_stop(device_get_softc(dev)); 496117845Ssam#endif 497188178Simp return (0); 498117845Ssam} 499117845Ssam 500117845Ssam/* 501117845Ssam * Device suspend routine. 502117845Ssam */ 503117845Ssamstatic int 504117845Ssamsafe_suspend(device_t dev) 505117845Ssam{ 506117845Ssam struct safe_softc *sc = device_get_softc(dev); 507117845Ssam 508117845Ssam#ifdef notyet 509117845Ssam /* XXX stop the device and save PCI settings */ 510117845Ssam#endif 511117845Ssam sc->sc_suspended = 1; 512117845Ssam 513117845Ssam return (0); 514117845Ssam} 515117845Ssam 516117845Ssamstatic int 517117845Ssamsafe_resume(device_t dev) 518117845Ssam{ 519117845Ssam struct safe_softc *sc = device_get_softc(dev); 520117845Ssam 521117845Ssam#ifdef notyet 522117845Ssam /* XXX retore PCI settings and start the device */ 523117845Ssam#endif 524117845Ssam sc->sc_suspended = 0; 525117845Ssam return (0); 526117845Ssam} 527117845Ssam 528117845Ssam/* 529117845Ssam * SafeXcel Interrupt routine 530117845Ssam */ 531117845Ssamstatic void 532117845Ssamsafe_intr(void *arg) 533117845Ssam{ 534117845Ssam struct safe_softc *sc = arg; 535117845Ssam volatile u_int32_t stat; 536117845Ssam 537117845Ssam stat = READ_REG(sc, SAFE_HM_STAT); 538117845Ssam if (stat == 0) /* shared irq, not for us */ 539117845Ssam return; 540117845Ssam 541117845Ssam WRITE_REG(sc, SAFE_HI_CLR, stat); /* IACK */ 542117845Ssam 543117845Ssam if ((stat & SAFE_INT_PE_DDONE)) { 544117845Ssam /* 545117845Ssam * Descriptor(s) done; scan the ring and 546117845Ssam * process completed operations. 547117845Ssam */ 548117845Ssam mtx_lock(&sc->sc_ringmtx); 549117845Ssam while (sc->sc_back != sc->sc_front) { 550117845Ssam struct safe_ringentry *re = sc->sc_back; 551117845Ssam#ifdef SAFE_DEBUG 552117845Ssam if (safe_debug) { 553117845Ssam safe_dump_ringstate(sc, __func__); 554117845Ssam safe_dump_request(sc, __func__, re); 555117845Ssam } 556117845Ssam#endif 557117845Ssam /* 558117845Ssam * safe_process marks ring entries that were allocated 559117845Ssam * but not used with a csr of zero. This insures the 560117845Ssam * ring front pointer never needs to be set backwards 561117845Ssam * in the event that an entry is allocated but not used 562117845Ssam * because of a setup error. 563117845Ssam */ 564117845Ssam if (re->re_desc.d_csr != 0) { 565117845Ssam if (!SAFE_PE_CSR_IS_DONE(re->re_desc.d_csr)) 566117845Ssam break; 567117845Ssam if (!SAFE_PE_LEN_IS_DONE(re->re_desc.d_len)) 568117845Ssam break; 569117845Ssam sc->sc_nqchip--; 570117845Ssam safe_callback(sc, re); 571117845Ssam } 572117845Ssam if (++(sc->sc_back) == sc->sc_ringtop) 573117845Ssam sc->sc_back = sc->sc_ring; 574117845Ssam } 575117845Ssam mtx_unlock(&sc->sc_ringmtx); 576117845Ssam } 577117845Ssam 578117845Ssam /* 579117845Ssam * Check to see if we got any DMA Error 580117845Ssam */ 581117845Ssam if (stat & SAFE_INT_PE_ERROR) { 582117845Ssam DPRINTF(("dmaerr dmastat %08x\n", 583117845Ssam READ_REG(sc, SAFE_PE_DMASTAT))); 584117845Ssam safestats.st_dmaerr++; 585117845Ssam safe_totalreset(sc); 586117845Ssam#if 0 587117845Ssam safe_feed(sc); 588117845Ssam#endif 589117845Ssam } 590117845Ssam 591117845Ssam if (sc->sc_needwakeup) { /* XXX check high watermark */ 592117845Ssam int wakeup = sc->sc_needwakeup & (CRYPTO_SYMQ|CRYPTO_ASYMQ); 593117845Ssam DPRINTF(("%s: wakeup crypto %x\n", __func__, 594117845Ssam sc->sc_needwakeup)); 595117845Ssam sc->sc_needwakeup &= ~wakeup; 596117845Ssam crypto_unblock(sc->sc_cid, wakeup); 597117845Ssam } 598117845Ssam} 599117845Ssam 600117845Ssam/* 601117845Ssam * safe_feed() - post a request to chip 602117845Ssam */ 603117845Ssamstatic void 604117845Ssamsafe_feed(struct safe_softc *sc, struct safe_ringentry *re) 605117845Ssam{ 606117845Ssam bus_dmamap_sync(sc->sc_srcdmat, re->re_src_map, BUS_DMASYNC_PREWRITE); 607117845Ssam if (re->re_dst_map != NULL) 608117845Ssam bus_dmamap_sync(sc->sc_dstdmat, re->re_dst_map, 609117845Ssam BUS_DMASYNC_PREREAD); 610117845Ssam /* XXX have no smaller granularity */ 611117845Ssam safe_dma_sync(&sc->sc_ringalloc, 612117845Ssam BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 613117845Ssam safe_dma_sync(&sc->sc_spalloc, BUS_DMASYNC_PREWRITE); 614117845Ssam safe_dma_sync(&sc->sc_dpalloc, BUS_DMASYNC_PREWRITE); 615117845Ssam 616117845Ssam#ifdef SAFE_DEBUG 617117845Ssam if (safe_debug) { 618117845Ssam safe_dump_ringstate(sc, __func__); 619117845Ssam safe_dump_request(sc, __func__, re); 620117845Ssam } 621117845Ssam#endif 622117845Ssam sc->sc_nqchip++; 623117845Ssam if (sc->sc_nqchip > safestats.st_maxqchip) 624117845Ssam safestats.st_maxqchip = sc->sc_nqchip; 625117845Ssam /* poke h/w to check descriptor ring, any value can be written */ 626117845Ssam WRITE_REG(sc, SAFE_HI_RD_DESCR, 0); 627117845Ssam} 628117845Ssam 629159226Spjd#define N(a) (sizeof(a) / sizeof (a[0])) 630159226Spjdstatic void 631159226Spjdsafe_setup_enckey(struct safe_session *ses, caddr_t key) 632159226Spjd{ 633159226Spjd int i; 634159226Spjd 635159226Spjd bcopy(key, ses->ses_key, ses->ses_klen / 8); 636159226Spjd 637159226Spjd /* PE is little-endian, insure proper byte order */ 638159226Spjd for (i = 0; i < N(ses->ses_key); i++) 639159226Spjd ses->ses_key[i] = htole32(ses->ses_key[i]); 640159226Spjd} 641159226Spjd 642159226Spjdstatic void 643159226Spjdsafe_setup_mackey(struct safe_session *ses, int algo, caddr_t key, int klen) 644159226Spjd{ 645159226Spjd MD5_CTX md5ctx; 646159226Spjd SHA1_CTX sha1ctx; 647159226Spjd int i; 648159226Spjd 649159226Spjd 650159226Spjd for (i = 0; i < klen; i++) 651159226Spjd key[i] ^= HMAC_IPAD_VAL; 652159226Spjd 653159226Spjd if (algo == CRYPTO_MD5_HMAC) { 654159226Spjd MD5Init(&md5ctx); 655159226Spjd MD5Update(&md5ctx, key, klen); 656159232Spjd MD5Update(&md5ctx, hmac_ipad_buffer, MD5_HMAC_BLOCK_LEN - klen); 657159226Spjd bcopy(md5ctx.state, ses->ses_hminner, sizeof(md5ctx.state)); 658159226Spjd } else { 659159226Spjd SHA1Init(&sha1ctx); 660159226Spjd SHA1Update(&sha1ctx, key, klen); 661159232Spjd SHA1Update(&sha1ctx, hmac_ipad_buffer, 662159232Spjd SHA1_HMAC_BLOCK_LEN - klen); 663159226Spjd bcopy(sha1ctx.h.b32, ses->ses_hminner, sizeof(sha1ctx.h.b32)); 664159226Spjd } 665159226Spjd 666159226Spjd for (i = 0; i < klen; i++) 667159226Spjd key[i] ^= (HMAC_IPAD_VAL ^ HMAC_OPAD_VAL); 668159226Spjd 669159226Spjd if (algo == CRYPTO_MD5_HMAC) { 670159226Spjd MD5Init(&md5ctx); 671159226Spjd MD5Update(&md5ctx, key, klen); 672159232Spjd MD5Update(&md5ctx, hmac_opad_buffer, MD5_HMAC_BLOCK_LEN - klen); 673159226Spjd bcopy(md5ctx.state, ses->ses_hmouter, sizeof(md5ctx.state)); 674159226Spjd } else { 675159226Spjd SHA1Init(&sha1ctx); 676159226Spjd SHA1Update(&sha1ctx, key, klen); 677159232Spjd SHA1Update(&sha1ctx, hmac_opad_buffer, 678159232Spjd SHA1_HMAC_BLOCK_LEN - klen); 679159226Spjd bcopy(sha1ctx.h.b32, ses->ses_hmouter, sizeof(sha1ctx.h.b32)); 680159226Spjd } 681159226Spjd 682159226Spjd for (i = 0; i < klen; i++) 683159226Spjd key[i] ^= HMAC_OPAD_VAL; 684159226Spjd 685159226Spjd /* PE is little-endian, insure proper byte order */ 686159226Spjd for (i = 0; i < N(ses->ses_hminner); i++) { 687159226Spjd ses->ses_hminner[i] = htole32(ses->ses_hminner[i]); 688159226Spjd ses->ses_hmouter[i] = htole32(ses->ses_hmouter[i]); 689159226Spjd } 690159226Spjd} 691159226Spjd#undef N 692159226Spjd 693117845Ssam/* 694117845Ssam * Allocate a new 'session' and return an encoded session id. 'sidp' 695117845Ssam * contains our registration id, and should contain an encoded session 696117845Ssam * id on successful allocation. 697117845Ssam */ 698117845Ssamstatic int 699167755Ssamsafe_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri) 700117845Ssam{ 701167755Ssam struct safe_softc *sc = device_get_softc(dev); 702117845Ssam struct cryptoini *c, *encini = NULL, *macini = NULL; 703117845Ssam struct safe_session *ses = NULL; 704159226Spjd int sesn; 705117845Ssam 706117845Ssam if (sidp == NULL || cri == NULL || sc == NULL) 707117845Ssam return (EINVAL); 708117845Ssam 709117845Ssam for (c = cri; c != NULL; c = c->cri_next) { 710117845Ssam if (c->cri_alg == CRYPTO_MD5_HMAC || 711117845Ssam c->cri_alg == CRYPTO_SHA1_HMAC || 712117845Ssam c->cri_alg == CRYPTO_NULL_HMAC) { 713117845Ssam if (macini) 714117845Ssam return (EINVAL); 715117845Ssam macini = c; 716117845Ssam } else if (c->cri_alg == CRYPTO_DES_CBC || 717117845Ssam c->cri_alg == CRYPTO_3DES_CBC || 718117845Ssam c->cri_alg == CRYPTO_AES_CBC || 719117845Ssam c->cri_alg == CRYPTO_NULL_CBC) { 720117845Ssam if (encini) 721117845Ssam return (EINVAL); 722117845Ssam encini = c; 723117845Ssam } else 724117845Ssam return (EINVAL); 725117845Ssam } 726117845Ssam if (encini == NULL && macini == NULL) 727117845Ssam return (EINVAL); 728117845Ssam if (encini) { /* validate key length */ 729117845Ssam switch (encini->cri_alg) { 730117845Ssam case CRYPTO_DES_CBC: 731117845Ssam if (encini->cri_klen != 64) 732117845Ssam return (EINVAL); 733117845Ssam break; 734117845Ssam case CRYPTO_3DES_CBC: 735117845Ssam if (encini->cri_klen != 192) 736117845Ssam return (EINVAL); 737117845Ssam break; 738117845Ssam case CRYPTO_AES_CBC: 739117845Ssam if (encini->cri_klen != 128 && 740117845Ssam encini->cri_klen != 192 && 741117845Ssam encini->cri_klen != 256) 742117845Ssam return (EINVAL); 743117845Ssam break; 744117845Ssam } 745117845Ssam } 746117845Ssam 747117845Ssam if (sc->sc_sessions == NULL) { 748117845Ssam ses = sc->sc_sessions = (struct safe_session *)malloc( 749117845Ssam sizeof(struct safe_session), M_DEVBUF, M_NOWAIT); 750117845Ssam if (ses == NULL) 751117845Ssam return (ENOMEM); 752117845Ssam sesn = 0; 753117845Ssam sc->sc_nsessions = 1; 754117845Ssam } else { 755117845Ssam for (sesn = 0; sesn < sc->sc_nsessions; sesn++) { 756117845Ssam if (sc->sc_sessions[sesn].ses_used == 0) { 757117845Ssam ses = &sc->sc_sessions[sesn]; 758117845Ssam break; 759117845Ssam } 760117845Ssam } 761117845Ssam 762117845Ssam if (ses == NULL) { 763117845Ssam sesn = sc->sc_nsessions; 764117845Ssam ses = (struct safe_session *)malloc((sesn + 1) * 765117845Ssam sizeof(struct safe_session), M_DEVBUF, M_NOWAIT); 766117845Ssam if (ses == NULL) 767117845Ssam return (ENOMEM); 768117845Ssam bcopy(sc->sc_sessions, ses, sesn * 769117845Ssam sizeof(struct safe_session)); 770117845Ssam bzero(sc->sc_sessions, sesn * 771117845Ssam sizeof(struct safe_session)); 772117845Ssam free(sc->sc_sessions, M_DEVBUF); 773117845Ssam sc->sc_sessions = ses; 774117845Ssam ses = &sc->sc_sessions[sesn]; 775117845Ssam sc->sc_nsessions++; 776117845Ssam } 777117845Ssam } 778117845Ssam 779117845Ssam bzero(ses, sizeof(struct safe_session)); 780117845Ssam ses->ses_used = 1; 781117845Ssam 782117845Ssam if (encini) { 783117845Ssam /* get an IV */ 784117845Ssam /* XXX may read fewer than requested */ 785117845Ssam read_random(ses->ses_iv, sizeof(ses->ses_iv)); 786117845Ssam 787117845Ssam ses->ses_klen = encini->cri_klen; 788159226Spjd if (encini->cri_key != NULL) 789159226Spjd safe_setup_enckey(ses, encini->cri_key); 790117845Ssam } 791117845Ssam 792117845Ssam if (macini) { 793158705Spjd ses->ses_mlen = macini->cri_mlen; 794158705Spjd if (ses->ses_mlen == 0) { 795158705Spjd if (macini->cri_alg == CRYPTO_MD5_HMAC) 796159233Spjd ses->ses_mlen = MD5_HASH_LEN; 797158705Spjd else 798159233Spjd ses->ses_mlen = SHA1_HASH_LEN; 799158705Spjd } 800158705Spjd 801159226Spjd if (macini->cri_key != NULL) { 802159226Spjd safe_setup_mackey(ses, macini->cri_alg, macini->cri_key, 803117845Ssam macini->cri_klen / 8); 804117845Ssam } 805117845Ssam } 806117845Ssam 807117845Ssam *sidp = SAFE_SID(device_get_unit(sc->sc_dev), sesn); 808117845Ssam return (0); 809117845Ssam} 810117845Ssam 811117845Ssam/* 812117845Ssam * Deallocate a session. 813117845Ssam */ 814117845Ssamstatic int 815167755Ssamsafe_freesession(device_t dev, u_int64_t tid) 816117845Ssam{ 817167755Ssam struct safe_softc *sc = device_get_softc(dev); 818117845Ssam int session, ret; 819117845Ssam u_int32_t sid = ((u_int32_t) tid) & 0xffffffff; 820117845Ssam 821117845Ssam if (sc == NULL) 822117845Ssam return (EINVAL); 823117845Ssam 824117845Ssam session = SAFE_SESSION(sid); 825117845Ssam if (session < sc->sc_nsessions) { 826117845Ssam bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session])); 827117845Ssam ret = 0; 828117845Ssam } else 829117845Ssam ret = EINVAL; 830117845Ssam return (ret); 831117845Ssam} 832117845Ssam 833117845Ssamstatic void 834117845Ssamsafe_op_cb(void *arg, bus_dma_segment_t *seg, int nsegs, bus_size_t mapsize, int error) 835117845Ssam{ 836117845Ssam struct safe_operand *op = arg; 837117845Ssam 838117845Ssam DPRINTF(("%s: mapsize %u nsegs %d error %d\n", __func__, 839117845Ssam (u_int) mapsize, nsegs, error)); 840117845Ssam if (error != 0) 841117845Ssam return; 842117845Ssam op->mapsize = mapsize; 843117845Ssam op->nsegs = nsegs; 844117845Ssam bcopy(seg, op->segs, nsegs * sizeof (seg[0])); 845117845Ssam} 846117845Ssam 847117845Ssamstatic int 848167755Ssamsafe_process(device_t dev, struct cryptop *crp, int hint) 849117845Ssam{ 850167755Ssam struct safe_softc *sc = device_get_softc(dev); 851117845Ssam int err = 0, i, nicealign, uniform; 852117845Ssam struct cryptodesc *crd1, *crd2, *maccrd, *enccrd; 853117845Ssam int bypass, oplen, ivsize; 854117845Ssam caddr_t iv; 855117845Ssam int16_t coffset; 856117845Ssam struct safe_session *ses; 857117845Ssam struct safe_ringentry *re; 858117845Ssam struct safe_sarec *sa; 859117845Ssam struct safe_pdesc *pd; 860117845Ssam u_int32_t cmd0, cmd1, staterec; 861117845Ssam 862117845Ssam if (crp == NULL || crp->crp_callback == NULL || sc == NULL) { 863117845Ssam safestats.st_invalid++; 864117845Ssam return (EINVAL); 865117845Ssam } 866117845Ssam if (SAFE_SESSION(crp->crp_sid) >= sc->sc_nsessions) { 867117845Ssam safestats.st_badsession++; 868117845Ssam return (EINVAL); 869117845Ssam } 870117845Ssam 871117845Ssam mtx_lock(&sc->sc_ringmtx); 872117845Ssam if (sc->sc_front == sc->sc_back && sc->sc_nqchip != 0) { 873117845Ssam safestats.st_ringfull++; 874117845Ssam sc->sc_needwakeup |= CRYPTO_SYMQ; 875117845Ssam mtx_unlock(&sc->sc_ringmtx); 876117845Ssam return (ERESTART); 877117845Ssam } 878117845Ssam re = sc->sc_front; 879117845Ssam 880117845Ssam staterec = re->re_sa.sa_staterec; /* save */ 881117845Ssam /* NB: zero everything but the PE descriptor */ 882117845Ssam bzero(&re->re_sa, sizeof(struct safe_ringentry) - sizeof(re->re_desc)); 883117845Ssam re->re_sa.sa_staterec = staterec; /* restore */ 884117845Ssam 885117845Ssam re->re_crp = crp; 886117845Ssam re->re_sesn = SAFE_SESSION(crp->crp_sid); 887117845Ssam 888117845Ssam if (crp->crp_flags & CRYPTO_F_IMBUF) { 889117845Ssam re->re_src_m = (struct mbuf *)crp->crp_buf; 890117845Ssam re->re_dst_m = (struct mbuf *)crp->crp_buf; 891117845Ssam } else if (crp->crp_flags & CRYPTO_F_IOV) { 892117845Ssam re->re_src_io = (struct uio *)crp->crp_buf; 893117845Ssam re->re_dst_io = (struct uio *)crp->crp_buf; 894117845Ssam } else { 895117845Ssam safestats.st_badflags++; 896117845Ssam err = EINVAL; 897117845Ssam goto errout; /* XXX we don't handle contiguous blocks! */ 898117845Ssam } 899117845Ssam 900117845Ssam sa = &re->re_sa; 901117845Ssam ses = &sc->sc_sessions[re->re_sesn]; 902117845Ssam 903117845Ssam crd1 = crp->crp_desc; 904117845Ssam if (crd1 == NULL) { 905117845Ssam safestats.st_nodesc++; 906117845Ssam err = EINVAL; 907117845Ssam goto errout; 908117845Ssam } 909117845Ssam crd2 = crd1->crd_next; 910117845Ssam 911117845Ssam cmd0 = SAFE_SA_CMD0_BASIC; /* basic group operation */ 912117845Ssam cmd1 = 0; 913117845Ssam if (crd2 == NULL) { 914117845Ssam if (crd1->crd_alg == CRYPTO_MD5_HMAC || 915117845Ssam crd1->crd_alg == CRYPTO_SHA1_HMAC || 916117845Ssam crd1->crd_alg == CRYPTO_NULL_HMAC) { 917117845Ssam maccrd = crd1; 918117845Ssam enccrd = NULL; 919117845Ssam cmd0 |= SAFE_SA_CMD0_OP_HASH; 920117845Ssam } else if (crd1->crd_alg == CRYPTO_DES_CBC || 921117845Ssam crd1->crd_alg == CRYPTO_3DES_CBC || 922117845Ssam crd1->crd_alg == CRYPTO_AES_CBC || 923117845Ssam crd1->crd_alg == CRYPTO_NULL_CBC) { 924117845Ssam maccrd = NULL; 925117845Ssam enccrd = crd1; 926117845Ssam cmd0 |= SAFE_SA_CMD0_OP_CRYPT; 927117845Ssam } else { 928117845Ssam safestats.st_badalg++; 929117845Ssam err = EINVAL; 930117845Ssam goto errout; 931117845Ssam } 932117845Ssam } else { 933117845Ssam if ((crd1->crd_alg == CRYPTO_MD5_HMAC || 934117845Ssam crd1->crd_alg == CRYPTO_SHA1_HMAC || 935117845Ssam crd1->crd_alg == CRYPTO_NULL_HMAC) && 936117845Ssam (crd2->crd_alg == CRYPTO_DES_CBC || 937117845Ssam crd2->crd_alg == CRYPTO_3DES_CBC || 938117845Ssam crd2->crd_alg == CRYPTO_AES_CBC || 939117845Ssam crd2->crd_alg == CRYPTO_NULL_CBC) && 940117845Ssam ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) { 941117845Ssam maccrd = crd1; 942117845Ssam enccrd = crd2; 943117845Ssam } else if ((crd1->crd_alg == CRYPTO_DES_CBC || 944117845Ssam crd1->crd_alg == CRYPTO_3DES_CBC || 945117845Ssam crd1->crd_alg == CRYPTO_AES_CBC || 946117845Ssam crd1->crd_alg == CRYPTO_NULL_CBC) && 947117845Ssam (crd2->crd_alg == CRYPTO_MD5_HMAC || 948117845Ssam crd2->crd_alg == CRYPTO_SHA1_HMAC || 949117845Ssam crd2->crd_alg == CRYPTO_NULL_HMAC) && 950117845Ssam (crd1->crd_flags & CRD_F_ENCRYPT)) { 951117845Ssam enccrd = crd1; 952117845Ssam maccrd = crd2; 953117845Ssam } else { 954117845Ssam safestats.st_badalg++; 955117845Ssam err = EINVAL; 956117845Ssam goto errout; 957117845Ssam } 958117845Ssam cmd0 |= SAFE_SA_CMD0_OP_BOTH; 959117845Ssam } 960117845Ssam 961117845Ssam if (enccrd) { 962159226Spjd if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) 963159226Spjd safe_setup_enckey(ses, enccrd->crd_key); 964159226Spjd 965117845Ssam if (enccrd->crd_alg == CRYPTO_DES_CBC) { 966117845Ssam cmd0 |= SAFE_SA_CMD0_DES; 967117845Ssam cmd1 |= SAFE_SA_CMD1_CBC; 968117845Ssam ivsize = 2*sizeof(u_int32_t); 969117845Ssam } else if (enccrd->crd_alg == CRYPTO_3DES_CBC) { 970117845Ssam cmd0 |= SAFE_SA_CMD0_3DES; 971117845Ssam cmd1 |= SAFE_SA_CMD1_CBC; 972117845Ssam ivsize = 2*sizeof(u_int32_t); 973117845Ssam } else if (enccrd->crd_alg == CRYPTO_AES_CBC) { 974117845Ssam cmd0 |= SAFE_SA_CMD0_AES; 975117845Ssam cmd1 |= SAFE_SA_CMD1_CBC; 976117845Ssam if (ses->ses_klen == 128) 977117845Ssam cmd1 |= SAFE_SA_CMD1_AES128; 978117845Ssam else if (ses->ses_klen == 192) 979117845Ssam cmd1 |= SAFE_SA_CMD1_AES192; 980117845Ssam else 981117845Ssam cmd1 |= SAFE_SA_CMD1_AES256; 982117845Ssam ivsize = 4*sizeof(u_int32_t); 983117845Ssam } else { 984117845Ssam cmd0 |= SAFE_SA_CMD0_CRYPT_NULL; 985117845Ssam ivsize = 0; 986117845Ssam } 987117845Ssam 988117845Ssam /* 989117845Ssam * Setup encrypt/decrypt state. When using basic ops 990117845Ssam * we can't use an inline IV because hash/crypt offset 991117845Ssam * must be from the end of the IV to the start of the 992117845Ssam * crypt data and this leaves out the preceding header 993117845Ssam * from the hash calculation. Instead we place the IV 994117845Ssam * in the state record and set the hash/crypt offset to 995117845Ssam * copy both the header+IV. 996117845Ssam */ 997117845Ssam if (enccrd->crd_flags & CRD_F_ENCRYPT) { 998117845Ssam cmd0 |= SAFE_SA_CMD0_OUTBOUND; 999117845Ssam 1000117845Ssam if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) 1001117845Ssam iv = enccrd->crd_iv; 1002117845Ssam else 1003117845Ssam iv = (caddr_t) ses->ses_iv; 1004117845Ssam if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0) { 1005159242Spjd crypto_copyback(crp->crp_flags, crp->crp_buf, 1006159242Spjd enccrd->crd_inject, ivsize, iv); 1007117845Ssam } 1008117845Ssam bcopy(iv, re->re_sastate.sa_saved_iv, ivsize); 1009117845Ssam cmd0 |= SAFE_SA_CMD0_IVLD_STATE | SAFE_SA_CMD0_SAVEIV; 1010117845Ssam re->re_flags |= SAFE_QFLAGS_COPYOUTIV; 1011117845Ssam } else { 1012117845Ssam cmd0 |= SAFE_SA_CMD0_INBOUND; 1013117845Ssam 1014159242Spjd if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) { 1015117845Ssam bcopy(enccrd->crd_iv, 1016117845Ssam re->re_sastate.sa_saved_iv, ivsize); 1017159242Spjd } else { 1018159242Spjd crypto_copydata(crp->crp_flags, crp->crp_buf, 1019159242Spjd enccrd->crd_inject, ivsize, 1020159242Spjd (caddr_t)re->re_sastate.sa_saved_iv); 1021159242Spjd } 1022117845Ssam cmd0 |= SAFE_SA_CMD0_IVLD_STATE; 1023117845Ssam } 1024117845Ssam /* 1025117845Ssam * For basic encryption use the zero pad algorithm. 1026117845Ssam * This pads results to an 8-byte boundary and 1027117845Ssam * suppresses padding verification for inbound (i.e. 1028117845Ssam * decrypt) operations. 1029117845Ssam * 1030117845Ssam * NB: Not sure if the 8-byte pad boundary is a problem. 1031117845Ssam */ 1032117845Ssam cmd0 |= SAFE_SA_CMD0_PAD_ZERO; 1033117845Ssam 1034117845Ssam /* XXX assert key bufs have the same size */ 1035117845Ssam bcopy(ses->ses_key, sa->sa_key, sizeof(sa->sa_key)); 1036117845Ssam } 1037117845Ssam 1038117845Ssam if (maccrd) { 1039159226Spjd if (maccrd->crd_flags & CRD_F_KEY_EXPLICIT) { 1040159226Spjd safe_setup_mackey(ses, maccrd->crd_alg, 1041159226Spjd maccrd->crd_key, maccrd->crd_klen / 8); 1042159226Spjd } 1043159226Spjd 1044117845Ssam if (maccrd->crd_alg == CRYPTO_MD5_HMAC) { 1045117845Ssam cmd0 |= SAFE_SA_CMD0_MD5; 1046117845Ssam cmd1 |= SAFE_SA_CMD1_HMAC; /* NB: enable HMAC */ 1047117845Ssam } else if (maccrd->crd_alg == CRYPTO_SHA1_HMAC) { 1048117845Ssam cmd0 |= SAFE_SA_CMD0_SHA1; 1049117845Ssam cmd1 |= SAFE_SA_CMD1_HMAC; /* NB: enable HMAC */ 1050117845Ssam } else { 1051117845Ssam cmd0 |= SAFE_SA_CMD0_HASH_NULL; 1052117845Ssam } 1053117845Ssam /* 1054117845Ssam * Digest data is loaded from the SA and the hash 1055117845Ssam * result is saved to the state block where we 1056117845Ssam * retrieve it for return to the caller. 1057117845Ssam */ 1058117845Ssam /* XXX assert digest bufs have the same size */ 1059117845Ssam bcopy(ses->ses_hminner, sa->sa_indigest, 1060117845Ssam sizeof(sa->sa_indigest)); 1061117845Ssam bcopy(ses->ses_hmouter, sa->sa_outdigest, 1062117845Ssam sizeof(sa->sa_outdigest)); 1063117845Ssam 1064117845Ssam cmd0 |= SAFE_SA_CMD0_HSLD_SA | SAFE_SA_CMD0_SAVEHASH; 1065117845Ssam re->re_flags |= SAFE_QFLAGS_COPYOUTICV; 1066117845Ssam } 1067117845Ssam 1068117845Ssam if (enccrd && maccrd) { 1069117845Ssam /* 1070117845Ssam * The offset from hash data to the start of 1071117845Ssam * crypt data is the difference in the skips. 1072117845Ssam */ 1073117845Ssam bypass = maccrd->crd_skip; 1074117845Ssam coffset = enccrd->crd_skip - maccrd->crd_skip; 1075117845Ssam if (coffset < 0) { 1076117845Ssam DPRINTF(("%s: hash does not precede crypt; " 1077117845Ssam "mac skip %u enc skip %u\n", 1078117845Ssam __func__, maccrd->crd_skip, enccrd->crd_skip)); 1079117845Ssam safestats.st_skipmismatch++; 1080117845Ssam err = EINVAL; 1081117845Ssam goto errout; 1082117845Ssam } 1083117845Ssam oplen = enccrd->crd_skip + enccrd->crd_len; 1084117845Ssam if (maccrd->crd_skip + maccrd->crd_len != oplen) { 1085117845Ssam DPRINTF(("%s: hash amount %u != crypt amount %u\n", 1086117845Ssam __func__, maccrd->crd_skip + maccrd->crd_len, 1087117845Ssam oplen)); 1088117845Ssam safestats.st_lenmismatch++; 1089117845Ssam err = EINVAL; 1090117845Ssam goto errout; 1091117845Ssam } 1092117845Ssam#ifdef SAFE_DEBUG 1093117845Ssam if (safe_debug) { 1094117845Ssam printf("mac: skip %d, len %d, inject %d\n", 1095117845Ssam maccrd->crd_skip, maccrd->crd_len, 1096117845Ssam maccrd->crd_inject); 1097117845Ssam printf("enc: skip %d, len %d, inject %d\n", 1098117845Ssam enccrd->crd_skip, enccrd->crd_len, 1099117845Ssam enccrd->crd_inject); 1100117845Ssam printf("bypass %d coffset %d oplen %d\n", 1101117845Ssam bypass, coffset, oplen); 1102117845Ssam } 1103117845Ssam#endif 1104117845Ssam if (coffset & 3) { /* offset must be 32-bit aligned */ 1105117845Ssam DPRINTF(("%s: coffset %u misaligned\n", 1106117845Ssam __func__, coffset)); 1107117845Ssam safestats.st_coffmisaligned++; 1108117845Ssam err = EINVAL; 1109117845Ssam goto errout; 1110117845Ssam } 1111117845Ssam coffset >>= 2; 1112117845Ssam if (coffset > 255) { /* offset must be <256 dwords */ 1113117845Ssam DPRINTF(("%s: coffset %u too big\n", 1114117845Ssam __func__, coffset)); 1115117845Ssam safestats.st_cofftoobig++; 1116117845Ssam err = EINVAL; 1117117845Ssam goto errout; 1118117845Ssam } 1119117845Ssam /* 1120117845Ssam * Tell the hardware to copy the header to the output. 1121117845Ssam * The header is defined as the data from the end of 1122117845Ssam * the bypass to the start of data to be encrypted. 1123117845Ssam * Typically this is the inline IV. Note that you need 1124117845Ssam * to do this even if src+dst are the same; it appears 1125117845Ssam * that w/o this bit the crypted data is written 1126117845Ssam * immediately after the bypass data. 1127117845Ssam */ 1128117845Ssam cmd1 |= SAFE_SA_CMD1_HDRCOPY; 1129117845Ssam /* 1130117845Ssam * Disable IP header mutable bit handling. This is 1131117845Ssam * needed to get correct HMAC calculations. 1132117845Ssam */ 1133117845Ssam cmd1 |= SAFE_SA_CMD1_MUTABLE; 1134117845Ssam } else { 1135117845Ssam if (enccrd) { 1136117845Ssam bypass = enccrd->crd_skip; 1137117845Ssam oplen = bypass + enccrd->crd_len; 1138117845Ssam } else { 1139117845Ssam bypass = maccrd->crd_skip; 1140117845Ssam oplen = bypass + maccrd->crd_len; 1141117845Ssam } 1142117845Ssam coffset = 0; 1143117845Ssam } 1144117845Ssam /* XXX verify multiple of 4 when using s/g */ 1145117845Ssam if (bypass > 96) { /* bypass offset must be <= 96 bytes */ 1146117845Ssam DPRINTF(("%s: bypass %u too big\n", __func__, bypass)); 1147117845Ssam safestats.st_bypasstoobig++; 1148117845Ssam err = EINVAL; 1149117845Ssam goto errout; 1150117845Ssam } 1151117845Ssam 1152117845Ssam if (bus_dmamap_create(sc->sc_srcdmat, BUS_DMA_NOWAIT, &re->re_src_map)) { 1153117845Ssam safestats.st_nomap++; 1154117845Ssam err = ENOMEM; 1155117845Ssam goto errout; 1156117845Ssam } 1157117845Ssam if (crp->crp_flags & CRYPTO_F_IMBUF) { 1158117845Ssam if (bus_dmamap_load_mbuf(sc->sc_srcdmat, re->re_src_map, 1159117845Ssam re->re_src_m, safe_op_cb, 1160117845Ssam &re->re_src, BUS_DMA_NOWAIT) != 0) { 1161117845Ssam bus_dmamap_destroy(sc->sc_srcdmat, re->re_src_map); 1162117845Ssam re->re_src_map = NULL; 1163117845Ssam safestats.st_noload++; 1164117845Ssam err = ENOMEM; 1165117845Ssam goto errout; 1166117845Ssam } 1167117845Ssam } else if (crp->crp_flags & CRYPTO_F_IOV) { 1168117845Ssam if (bus_dmamap_load_uio(sc->sc_srcdmat, re->re_src_map, 1169117845Ssam re->re_src_io, safe_op_cb, 1170117845Ssam &re->re_src, BUS_DMA_NOWAIT) != 0) { 1171117845Ssam bus_dmamap_destroy(sc->sc_srcdmat, re->re_src_map); 1172117845Ssam re->re_src_map = NULL; 1173117845Ssam safestats.st_noload++; 1174117845Ssam err = ENOMEM; 1175117845Ssam goto errout; 1176117845Ssam } 1177117845Ssam } 1178117845Ssam nicealign = safe_dmamap_aligned(&re->re_src); 1179117845Ssam uniform = safe_dmamap_uniform(&re->re_src); 1180117845Ssam 1181117845Ssam DPRINTF(("src nicealign %u uniform %u nsegs %u\n", 1182117845Ssam nicealign, uniform, re->re_src.nsegs)); 1183117845Ssam if (re->re_src.nsegs > 1) { 1184117845Ssam re->re_desc.d_src = sc->sc_spalloc.dma_paddr + 1185117845Ssam ((caddr_t) sc->sc_spfree - (caddr_t) sc->sc_spring); 1186117845Ssam for (i = 0; i < re->re_src_nsegs; i++) { 1187117845Ssam /* NB: no need to check if there's space */ 1188117845Ssam pd = sc->sc_spfree; 1189117845Ssam if (++(sc->sc_spfree) == sc->sc_springtop) 1190117845Ssam sc->sc_spfree = sc->sc_spring; 1191117845Ssam 1192117845Ssam KASSERT((pd->pd_flags&3) == 0 || 1193117845Ssam (pd->pd_flags&3) == SAFE_PD_DONE, 1194117845Ssam ("bogus source particle descriptor; flags %x", 1195117845Ssam pd->pd_flags)); 1196117845Ssam pd->pd_addr = re->re_src_segs[i].ds_addr; 1197117845Ssam pd->pd_size = re->re_src_segs[i].ds_len; 1198117845Ssam pd->pd_flags = SAFE_PD_READY; 1199117845Ssam } 1200117845Ssam cmd0 |= SAFE_SA_CMD0_IGATHER; 1201117845Ssam } else { 1202117845Ssam /* 1203117845Ssam * No need for gather, reference the operand directly. 1204117845Ssam */ 1205117845Ssam re->re_desc.d_src = re->re_src_segs[0].ds_addr; 1206117845Ssam } 1207117845Ssam 1208117845Ssam if (enccrd == NULL && maccrd != NULL) { 1209117845Ssam /* 1210117845Ssam * Hash op; no destination needed. 1211117845Ssam */ 1212117845Ssam } else { 1213117845Ssam if (crp->crp_flags & CRYPTO_F_IOV) { 1214117845Ssam if (!nicealign) { 1215117845Ssam safestats.st_iovmisaligned++; 1216117845Ssam err = EINVAL; 1217117845Ssam goto errout; 1218117845Ssam } 1219117845Ssam if (uniform != 1) { 1220117845Ssam /* 1221117845Ssam * Source is not suitable for direct use as 1222117845Ssam * the destination. Create a new scatter/gather 1223117845Ssam * list based on the destination requirements 1224117845Ssam * and check if that's ok. 1225117845Ssam */ 1226117845Ssam if (bus_dmamap_create(sc->sc_dstdmat, 1227117845Ssam BUS_DMA_NOWAIT, &re->re_dst_map)) { 1228117845Ssam safestats.st_nomap++; 1229117845Ssam err = ENOMEM; 1230117845Ssam goto errout; 1231117845Ssam } 1232117845Ssam if (bus_dmamap_load_uio(sc->sc_dstdmat, 1233117845Ssam re->re_dst_map, re->re_dst_io, 1234117845Ssam safe_op_cb, &re->re_dst, 1235117845Ssam BUS_DMA_NOWAIT) != 0) { 1236117845Ssam bus_dmamap_destroy(sc->sc_dstdmat, 1237117845Ssam re->re_dst_map); 1238117845Ssam re->re_dst_map = NULL; 1239117845Ssam safestats.st_noload++; 1240117845Ssam err = ENOMEM; 1241117845Ssam goto errout; 1242117845Ssam } 1243117845Ssam uniform = safe_dmamap_uniform(&re->re_dst); 1244117845Ssam if (!uniform) { 1245117845Ssam /* 1246117845Ssam * There's no way to handle the DMA 1247117845Ssam * requirements with this uio. We 1248117845Ssam * could create a separate DMA area for 1249117845Ssam * the result and then copy it back, 1250117845Ssam * but for now we just bail and return 1251117845Ssam * an error. Note that uio requests 1252117845Ssam * > SAFE_MAX_DSIZE are handled because 1253117845Ssam * the DMA map and segment list for the 1254117845Ssam * destination wil result in a 1255117845Ssam * destination particle list that does 1256117845Ssam * the necessary scatter DMA. 1257117845Ssam */ 1258117845Ssam safestats.st_iovnotuniform++; 1259117845Ssam err = EINVAL; 1260117845Ssam goto errout; 1261117845Ssam } 1262118882Ssam } else 1263118882Ssam re->re_dst = re->re_src; 1264117845Ssam } else if (crp->crp_flags & CRYPTO_F_IMBUF) { 1265117845Ssam if (nicealign && uniform == 1) { 1266117845Ssam /* 1267117845Ssam * Source layout is suitable for direct 1268117845Ssam * sharing of the DMA map and segment list. 1269117845Ssam */ 1270117845Ssam re->re_dst = re->re_src; 1271117845Ssam } else if (nicealign && uniform == 2) { 1272117845Ssam /* 1273117845Ssam * The source is properly aligned but requires a 1274117845Ssam * different particle list to handle DMA of the 1275117845Ssam * result. Create a new map and do the load to 1276117845Ssam * create the segment list. The particle 1277117845Ssam * descriptor setup code below will handle the 1278117845Ssam * rest. 1279117845Ssam */ 1280117845Ssam if (bus_dmamap_create(sc->sc_dstdmat, 1281117845Ssam BUS_DMA_NOWAIT, &re->re_dst_map)) { 1282117845Ssam safestats.st_nomap++; 1283117845Ssam err = ENOMEM; 1284117845Ssam goto errout; 1285117845Ssam } 1286117845Ssam if (bus_dmamap_load_mbuf(sc->sc_dstdmat, 1287117845Ssam re->re_dst_map, re->re_dst_m, 1288117845Ssam safe_op_cb, &re->re_dst, 1289117845Ssam BUS_DMA_NOWAIT) != 0) { 1290117845Ssam bus_dmamap_destroy(sc->sc_dstdmat, 1291117845Ssam re->re_dst_map); 1292117845Ssam re->re_dst_map = NULL; 1293117845Ssam safestats.st_noload++; 1294117845Ssam err = ENOMEM; 1295117845Ssam goto errout; 1296117845Ssam } 1297117845Ssam } else { /* !(aligned and/or uniform) */ 1298117845Ssam int totlen, len; 1299117845Ssam struct mbuf *m, *top, **mp; 1300117845Ssam 1301117845Ssam /* 1302117845Ssam * DMA constraints require that we allocate a 1303117845Ssam * new mbuf chain for the destination. We 1304117845Ssam * allocate an entire new set of mbufs of 1305117845Ssam * optimal/required size and then tell the 1306117845Ssam * hardware to copy any bits that are not 1307117845Ssam * created as a byproduct of the operation. 1308117845Ssam */ 1309117845Ssam if (!nicealign) 1310117845Ssam safestats.st_unaligned++; 1311117845Ssam if (!uniform) 1312117845Ssam safestats.st_notuniform++; 1313117845Ssam totlen = re->re_src_mapsize; 1314117845Ssam if (re->re_src_m->m_flags & M_PKTHDR) { 1315117845Ssam len = MHLEN; 1316243857Sglebius MGETHDR(m, M_NOWAIT, MT_DATA); 1317117845Ssam if (m && !m_dup_pkthdr(m, re->re_src_m, 1318243857Sglebius M_NOWAIT)) { 1319117845Ssam m_free(m); 1320117845Ssam m = NULL; 1321117845Ssam } 1322117845Ssam } else { 1323117845Ssam len = MLEN; 1324243857Sglebius MGET(m, M_NOWAIT, MT_DATA); 1325117845Ssam } 1326117845Ssam if (m == NULL) { 1327117845Ssam safestats.st_nombuf++; 1328117845Ssam err = sc->sc_nqchip ? ERESTART : ENOMEM; 1329117845Ssam goto errout; 1330117845Ssam } 1331117845Ssam if (totlen >= MINCLSIZE) { 1332276750Srwatson if (!(MCLGET(m, M_NOWAIT))) { 1333117845Ssam m_free(m); 1334117845Ssam safestats.st_nomcl++; 1335117845Ssam err = sc->sc_nqchip ? 1336117845Ssam ERESTART : ENOMEM; 1337117845Ssam goto errout; 1338117845Ssam } 1339117845Ssam len = MCLBYTES; 1340117845Ssam } 1341117845Ssam m->m_len = len; 1342117845Ssam top = NULL; 1343117845Ssam mp = ⊤ 1344117845Ssam 1345117845Ssam while (totlen > 0) { 1346117845Ssam if (top) { 1347243857Sglebius MGET(m, M_NOWAIT, MT_DATA); 1348117845Ssam if (m == NULL) { 1349117845Ssam m_freem(top); 1350117845Ssam safestats.st_nombuf++; 1351117845Ssam err = sc->sc_nqchip ? 1352117845Ssam ERESTART : ENOMEM; 1353117845Ssam goto errout; 1354117845Ssam } 1355117845Ssam len = MLEN; 1356117845Ssam } 1357117845Ssam if (top && totlen >= MINCLSIZE) { 1358276750Srwatson if (!(MCLGET(m, M_NOWAIT))) { 1359117845Ssam *mp = m; 1360117845Ssam m_freem(top); 1361117845Ssam safestats.st_nomcl++; 1362117845Ssam err = sc->sc_nqchip ? 1363117845Ssam ERESTART : ENOMEM; 1364117845Ssam goto errout; 1365117845Ssam } 1366117845Ssam len = MCLBYTES; 1367117845Ssam } 1368117845Ssam m->m_len = len = min(totlen, len); 1369117845Ssam totlen -= len; 1370117845Ssam *mp = m; 1371117845Ssam mp = &m->m_next; 1372117845Ssam } 1373117845Ssam re->re_dst_m = top; 1374117845Ssam if (bus_dmamap_create(sc->sc_dstdmat, 1375117845Ssam BUS_DMA_NOWAIT, &re->re_dst_map) != 0) { 1376117845Ssam safestats.st_nomap++; 1377117845Ssam err = ENOMEM; 1378117845Ssam goto errout; 1379117845Ssam } 1380117845Ssam if (bus_dmamap_load_mbuf(sc->sc_dstdmat, 1381117845Ssam re->re_dst_map, re->re_dst_m, 1382117845Ssam safe_op_cb, &re->re_dst, 1383117845Ssam BUS_DMA_NOWAIT) != 0) { 1384117845Ssam bus_dmamap_destroy(sc->sc_dstdmat, 1385117845Ssam re->re_dst_map); 1386117845Ssam re->re_dst_map = NULL; 1387117845Ssam safestats.st_noload++; 1388117845Ssam err = ENOMEM; 1389117845Ssam goto errout; 1390117845Ssam } 1391117845Ssam if (re->re_src.mapsize > oplen) { 1392117845Ssam /* 1393117845Ssam * There's data following what the 1394117845Ssam * hardware will copy for us. If this 1395117845Ssam * isn't just the ICV (that's going to 1396117845Ssam * be written on completion), copy it 1397117845Ssam * to the new mbufs 1398117845Ssam */ 1399117845Ssam if (!(maccrd && 1400117845Ssam (re->re_src.mapsize-oplen) == 12 && 1401117845Ssam maccrd->crd_inject == oplen)) 1402117845Ssam safe_mcopy(re->re_src_m, 1403117845Ssam re->re_dst_m, 1404117845Ssam oplen); 1405117845Ssam else 1406117845Ssam safestats.st_noicvcopy++; 1407117845Ssam } 1408117845Ssam } 1409117845Ssam } else { 1410117845Ssam safestats.st_badflags++; 1411117845Ssam err = EINVAL; 1412117845Ssam goto errout; 1413117845Ssam } 1414117845Ssam 1415117845Ssam if (re->re_dst.nsegs > 1) { 1416117845Ssam re->re_desc.d_dst = sc->sc_dpalloc.dma_paddr + 1417117845Ssam ((caddr_t) sc->sc_dpfree - (caddr_t) sc->sc_dpring); 1418117845Ssam for (i = 0; i < re->re_dst_nsegs; i++) { 1419117845Ssam pd = sc->sc_dpfree; 1420117845Ssam KASSERT((pd->pd_flags&3) == 0 || 1421117845Ssam (pd->pd_flags&3) == SAFE_PD_DONE, 1422117845Ssam ("bogus dest particle descriptor; flags %x", 1423117845Ssam pd->pd_flags)); 1424117845Ssam if (++(sc->sc_dpfree) == sc->sc_dpringtop) 1425117845Ssam sc->sc_dpfree = sc->sc_dpring; 1426117845Ssam pd->pd_addr = re->re_dst_segs[i].ds_addr; 1427117845Ssam pd->pd_flags = SAFE_PD_READY; 1428117845Ssam } 1429117845Ssam cmd0 |= SAFE_SA_CMD0_OSCATTER; 1430117845Ssam } else { 1431117845Ssam /* 1432117845Ssam * No need for scatter, reference the operand directly. 1433117845Ssam */ 1434117845Ssam re->re_desc.d_dst = re->re_dst_segs[0].ds_addr; 1435117845Ssam } 1436117845Ssam } 1437117845Ssam 1438117845Ssam /* 1439117845Ssam * All done with setup; fillin the SA command words 1440117845Ssam * and the packet engine descriptor. The operation 1441117845Ssam * is now ready for submission to the hardware. 1442117845Ssam */ 1443117845Ssam sa->sa_cmd0 = cmd0 | SAFE_SA_CMD0_IPCI | SAFE_SA_CMD0_OPCI; 1444117845Ssam sa->sa_cmd1 = cmd1 1445117845Ssam | (coffset << SAFE_SA_CMD1_OFFSET_S) 1446117845Ssam | SAFE_SA_CMD1_SAREV1 /* Rev 1 SA data structure */ 1447117845Ssam | SAFE_SA_CMD1_SRPCI 1448117845Ssam ; 1449117845Ssam /* 1450117845Ssam * NB: the order of writes is important here. In case the 1451117845Ssam * chip is scanning the ring because of an outstanding request 1452117845Ssam * it might nab this one too. In that case we need to make 1453117845Ssam * sure the setup is complete before we write the length 1454117845Ssam * field of the descriptor as it signals the descriptor is 1455117845Ssam * ready for processing. 1456117845Ssam */ 1457117845Ssam re->re_desc.d_csr = SAFE_PE_CSR_READY | SAFE_PE_CSR_SAPCI; 1458117845Ssam if (maccrd) 1459117845Ssam re->re_desc.d_csr |= SAFE_PE_CSR_LOADSA | SAFE_PE_CSR_HASHFINAL; 1460117845Ssam re->re_desc.d_len = oplen 1461117845Ssam | SAFE_PE_LEN_READY 1462117845Ssam | (bypass << SAFE_PE_LEN_BYPASS_S) 1463117845Ssam ; 1464117845Ssam 1465117845Ssam safestats.st_ipackets++; 1466117845Ssam safestats.st_ibytes += oplen; 1467117845Ssam 1468117845Ssam if (++(sc->sc_front) == sc->sc_ringtop) 1469117845Ssam sc->sc_front = sc->sc_ring; 1470117845Ssam 1471117845Ssam /* XXX honor batching */ 1472117845Ssam safe_feed(sc, re); 1473117845Ssam mtx_unlock(&sc->sc_ringmtx); 1474117845Ssam return (0); 1475117845Ssam 1476117845Ssamerrout: 1477117845Ssam if ((re->re_dst_m != NULL) && (re->re_src_m != re->re_dst_m)) 1478117845Ssam m_freem(re->re_dst_m); 1479117845Ssam 1480117845Ssam if (re->re_dst_map != NULL && re->re_dst_map != re->re_src_map) { 1481117845Ssam bus_dmamap_unload(sc->sc_dstdmat, re->re_dst_map); 1482117845Ssam bus_dmamap_destroy(sc->sc_dstdmat, re->re_dst_map); 1483117845Ssam } 1484117845Ssam if (re->re_src_map != NULL) { 1485117845Ssam bus_dmamap_unload(sc->sc_srcdmat, re->re_src_map); 1486117845Ssam bus_dmamap_destroy(sc->sc_srcdmat, re->re_src_map); 1487117845Ssam } 1488117845Ssam mtx_unlock(&sc->sc_ringmtx); 1489117845Ssam if (err != ERESTART) { 1490117845Ssam crp->crp_etype = err; 1491117845Ssam crypto_done(crp); 1492117845Ssam } else { 1493117845Ssam sc->sc_needwakeup |= CRYPTO_SYMQ; 1494117845Ssam } 1495117845Ssam return (err); 1496117845Ssam} 1497117845Ssam 1498117845Ssamstatic void 1499117845Ssamsafe_callback(struct safe_softc *sc, struct safe_ringentry *re) 1500117845Ssam{ 1501117845Ssam struct cryptop *crp = (struct cryptop *)re->re_crp; 1502117845Ssam struct cryptodesc *crd; 1503117845Ssam 1504117845Ssam safestats.st_opackets++; 1505117845Ssam safestats.st_obytes += re->re_dst.mapsize; 1506117845Ssam 1507117845Ssam safe_dma_sync(&sc->sc_ringalloc, 1508117845Ssam BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1509117845Ssam if (re->re_desc.d_csr & SAFE_PE_CSR_STATUS) { 1510117845Ssam device_printf(sc->sc_dev, "csr 0x%x cmd0 0x%x cmd1 0x%x\n", 1511117845Ssam re->re_desc.d_csr, 1512117845Ssam re->re_sa.sa_cmd0, re->re_sa.sa_cmd1); 1513117845Ssam safestats.st_peoperr++; 1514117845Ssam crp->crp_etype = EIO; /* something more meaningful? */ 1515117845Ssam } 1516117845Ssam if (re->re_dst_map != NULL && re->re_dst_map != re->re_src_map) { 1517117845Ssam bus_dmamap_sync(sc->sc_dstdmat, re->re_dst_map, 1518117845Ssam BUS_DMASYNC_POSTREAD); 1519117845Ssam bus_dmamap_unload(sc->sc_dstdmat, re->re_dst_map); 1520117845Ssam bus_dmamap_destroy(sc->sc_dstdmat, re->re_dst_map); 1521117845Ssam } 1522117845Ssam bus_dmamap_sync(sc->sc_srcdmat, re->re_src_map, BUS_DMASYNC_POSTWRITE); 1523117845Ssam bus_dmamap_unload(sc->sc_srcdmat, re->re_src_map); 1524117845Ssam bus_dmamap_destroy(sc->sc_srcdmat, re->re_src_map); 1525117845Ssam 1526117845Ssam /* 1527117845Ssam * If result was written to a differet mbuf chain, swap 1528117845Ssam * it in as the return value and reclaim the original. 1529117845Ssam */ 1530117845Ssam if ((crp->crp_flags & CRYPTO_F_IMBUF) && re->re_src_m != re->re_dst_m) { 1531117845Ssam m_freem(re->re_src_m); 1532117845Ssam crp->crp_buf = (caddr_t)re->re_dst_m; 1533117845Ssam } 1534117845Ssam 1535117845Ssam if (re->re_flags & SAFE_QFLAGS_COPYOUTIV) { 1536117845Ssam /* copy out IV for future use */ 1537117845Ssam for (crd = crp->crp_desc; crd; crd = crd->crd_next) { 1538117845Ssam int ivsize; 1539117845Ssam 1540117845Ssam if (crd->crd_alg == CRYPTO_DES_CBC || 1541117845Ssam crd->crd_alg == CRYPTO_3DES_CBC) { 1542117845Ssam ivsize = 2*sizeof(u_int32_t); 1543117845Ssam } else if (crd->crd_alg == CRYPTO_AES_CBC) { 1544117845Ssam ivsize = 4*sizeof(u_int32_t); 1545117845Ssam } else 1546117845Ssam continue; 1547159242Spjd crypto_copydata(crp->crp_flags, crp->crp_buf, 1548159242Spjd crd->crd_skip + crd->crd_len - ivsize, ivsize, 1549159242Spjd (caddr_t)sc->sc_sessions[re->re_sesn].ses_iv); 1550117845Ssam break; 1551117845Ssam } 1552117845Ssam } 1553117845Ssam 1554117845Ssam if (re->re_flags & SAFE_QFLAGS_COPYOUTICV) { 1555117845Ssam /* copy out ICV result */ 1556117845Ssam for (crd = crp->crp_desc; crd; crd = crd->crd_next) { 1557117845Ssam if (!(crd->crd_alg == CRYPTO_MD5_HMAC || 1558117845Ssam crd->crd_alg == CRYPTO_SHA1_HMAC || 1559117845Ssam crd->crd_alg == CRYPTO_NULL_HMAC)) 1560117845Ssam continue; 1561117845Ssam if (crd->crd_alg == CRYPTO_SHA1_HMAC) { 1562117845Ssam /* 1563117845Ssam * SHA-1 ICV's are byte-swapped; fix 'em up 1564117845Ssam * before copy them to their destination. 1565117845Ssam */ 1566223026Sdelphij re->re_sastate.sa_saved_indigest[0] = 1567223026Sdelphij bswap32(re->re_sastate.sa_saved_indigest[0]); 1568223026Sdelphij re->re_sastate.sa_saved_indigest[1] = 1569223026Sdelphij bswap32(re->re_sastate.sa_saved_indigest[1]); 1570223026Sdelphij re->re_sastate.sa_saved_indigest[2] = 1571223026Sdelphij bswap32(re->re_sastate.sa_saved_indigest[2]); 1572117845Ssam } 1573159242Spjd crypto_copyback(crp->crp_flags, crp->crp_buf, 1574159242Spjd crd->crd_inject, 1575159242Spjd sc->sc_sessions[re->re_sesn].ses_mlen, 1576159242Spjd (caddr_t)re->re_sastate.sa_saved_indigest); 1577117845Ssam break; 1578117845Ssam } 1579117845Ssam } 1580117845Ssam crypto_done(crp); 1581117845Ssam} 1582117845Ssam 1583117845Ssam/* 1584117845Ssam * Copy all data past offset from srcm to dstm. 1585117845Ssam */ 1586117845Ssamstatic void 1587117845Ssamsafe_mcopy(struct mbuf *srcm, struct mbuf *dstm, u_int offset) 1588117845Ssam{ 1589117845Ssam u_int j, dlen, slen; 1590117845Ssam caddr_t dptr, sptr; 1591117845Ssam 1592117845Ssam /* 1593117845Ssam * Advance src and dst to offset. 1594117845Ssam */ 1595117845Ssam j = offset; 1596117845Ssam while (j >= 0) { 1597117845Ssam if (srcm->m_len > j) 1598117845Ssam break; 1599117845Ssam j -= srcm->m_len; 1600117845Ssam srcm = srcm->m_next; 1601117845Ssam if (srcm == NULL) 1602117845Ssam return; 1603117845Ssam } 1604117845Ssam sptr = mtod(srcm, caddr_t) + j; 1605117845Ssam slen = srcm->m_len - j; 1606117845Ssam 1607117845Ssam j = offset; 1608117845Ssam while (j >= 0) { 1609117845Ssam if (dstm->m_len > j) 1610117845Ssam break; 1611117845Ssam j -= dstm->m_len; 1612117845Ssam dstm = dstm->m_next; 1613117845Ssam if (dstm == NULL) 1614117845Ssam return; 1615117845Ssam } 1616117845Ssam dptr = mtod(dstm, caddr_t) + j; 1617117845Ssam dlen = dstm->m_len - j; 1618117845Ssam 1619117845Ssam /* 1620117845Ssam * Copy everything that remains. 1621117845Ssam */ 1622117845Ssam for (;;) { 1623117845Ssam j = min(slen, dlen); 1624117845Ssam bcopy(sptr, dptr, j); 1625117845Ssam if (slen == j) { 1626117845Ssam srcm = srcm->m_next; 1627117845Ssam if (srcm == NULL) 1628117845Ssam return; 1629117845Ssam sptr = srcm->m_data; 1630117845Ssam slen = srcm->m_len; 1631117845Ssam } else 1632117845Ssam sptr += j, slen -= j; 1633117845Ssam if (dlen == j) { 1634117845Ssam dstm = dstm->m_next; 1635117845Ssam if (dstm == NULL) 1636117845Ssam return; 1637117845Ssam dptr = dstm->m_data; 1638117845Ssam dlen = dstm->m_len; 1639117845Ssam } else 1640117845Ssam dptr += j, dlen -= j; 1641117845Ssam } 1642117845Ssam} 1643117845Ssam 1644117845Ssam#ifndef SAFE_NO_RNG 1645117845Ssam#define SAFE_RNG_MAXWAIT 1000 1646117845Ssam 1647117845Ssamstatic void 1648117845Ssamsafe_rng_init(struct safe_softc *sc) 1649117845Ssam{ 1650117845Ssam u_int32_t w, v; 1651117845Ssam int i; 1652117845Ssam 1653117845Ssam WRITE_REG(sc, SAFE_RNG_CTRL, 0); 1654117845Ssam /* use default value according to the manual */ 1655117845Ssam WRITE_REG(sc, SAFE_RNG_CNFG, 0x834); /* magic from SafeNet */ 1656117845Ssam WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0); 1657117845Ssam 1658117845Ssam /* 1659117845Ssam * There is a bug in rev 1.0 of the 1140 that when the RNG 1660117845Ssam * is brought out of reset the ready status flag does not 1661117845Ssam * work until the RNG has finished its internal initialization. 1662117845Ssam * 1663117845Ssam * So in order to determine the device is through its 1664117845Ssam * initialization we must read the data register, using the 1665117845Ssam * status reg in the read in case it is initialized. Then read 1666117845Ssam * the data register until it changes from the first read. 1667117845Ssam * Once it changes read the data register until it changes 1668117845Ssam * again. At this time the RNG is considered initialized. 1669117845Ssam * This could take between 750ms - 1000ms in time. 1670117845Ssam */ 1671117845Ssam i = 0; 1672117845Ssam w = READ_REG(sc, SAFE_RNG_OUT); 1673117845Ssam do { 1674117845Ssam v = READ_REG(sc, SAFE_RNG_OUT); 1675117845Ssam if (v != w) { 1676117845Ssam w = v; 1677117845Ssam break; 1678117845Ssam } 1679117845Ssam DELAY(10); 1680117845Ssam } while (++i < SAFE_RNG_MAXWAIT); 1681117845Ssam 1682117845Ssam /* Wait Until data changes again */ 1683117845Ssam i = 0; 1684117845Ssam do { 1685117845Ssam v = READ_REG(sc, SAFE_RNG_OUT); 1686117845Ssam if (v != w) 1687117845Ssam break; 1688117845Ssam DELAY(10); 1689117845Ssam } while (++i < SAFE_RNG_MAXWAIT); 1690117845Ssam} 1691117845Ssam 1692117845Ssamstatic __inline void 1693117845Ssamsafe_rng_disable_short_cycle(struct safe_softc *sc) 1694117845Ssam{ 1695117845Ssam WRITE_REG(sc, SAFE_RNG_CTRL, 1696117845Ssam READ_REG(sc, SAFE_RNG_CTRL) &~ SAFE_RNG_CTRL_SHORTEN); 1697117845Ssam} 1698117845Ssam 1699117845Ssamstatic __inline void 1700117845Ssamsafe_rng_enable_short_cycle(struct safe_softc *sc) 1701117845Ssam{ 1702117845Ssam WRITE_REG(sc, SAFE_RNG_CTRL, 1703117845Ssam READ_REG(sc, SAFE_RNG_CTRL) | SAFE_RNG_CTRL_SHORTEN); 1704117845Ssam} 1705117845Ssam 1706117845Ssamstatic __inline u_int32_t 1707117845Ssamsafe_rng_read(struct safe_softc *sc) 1708117845Ssam{ 1709117845Ssam int i; 1710117845Ssam 1711117845Ssam i = 0; 1712117845Ssam while (READ_REG(sc, SAFE_RNG_STAT) != 0 && ++i < SAFE_RNG_MAXWAIT) 1713117845Ssam ; 1714117845Ssam return READ_REG(sc, SAFE_RNG_OUT); 1715117845Ssam} 1716117845Ssam 1717117845Ssamstatic void 1718117845Ssamsafe_rng(void *arg) 1719117845Ssam{ 1720117845Ssam struct safe_softc *sc = arg; 1721117845Ssam u_int32_t buf[SAFE_RNG_MAXBUFSIZ]; /* NB: maybe move to softc */ 1722117845Ssam u_int maxwords; 1723117845Ssam int i; 1724117845Ssam 1725117845Ssam safestats.st_rng++; 1726117845Ssam /* 1727117845Ssam * Fetch the next block of data. 1728117845Ssam */ 1729117845Ssam maxwords = safe_rngbufsize; 1730117845Ssam if (maxwords > SAFE_RNG_MAXBUFSIZ) 1731117845Ssam maxwords = SAFE_RNG_MAXBUFSIZ; 1732117845Ssamretry: 1733117845Ssam for (i = 0; i < maxwords; i++) 1734117845Ssam buf[i] = safe_rng_read(sc); 1735117845Ssam /* 1736117845Ssam * Check the comparator alarm count and reset the h/w if 1737117845Ssam * it exceeds our threshold. This guards against the 1738117845Ssam * hardware oscillators resonating with external signals. 1739117845Ssam */ 1740117845Ssam if (READ_REG(sc, SAFE_RNG_ALM_CNT) > safe_rngmaxalarm) { 1741117845Ssam u_int32_t freq_inc, w; 1742117845Ssam 1743117845Ssam DPRINTF(("%s: alarm count %u exceeds threshold %u\n", __func__, 1744117845Ssam READ_REG(sc, SAFE_RNG_ALM_CNT), safe_rngmaxalarm)); 1745117845Ssam safestats.st_rngalarm++; 1746117845Ssam safe_rng_enable_short_cycle(sc); 1747117845Ssam freq_inc = 18; 1748117845Ssam for (i = 0; i < 64; i++) { 1749117845Ssam w = READ_REG(sc, SAFE_RNG_CNFG); 1750117845Ssam freq_inc = ((w + freq_inc) & 0x3fL); 1751117845Ssam w = ((w & ~0x3fL) | freq_inc); 1752117845Ssam WRITE_REG(sc, SAFE_RNG_CNFG, w); 1753117845Ssam 1754117845Ssam WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0); 1755117845Ssam 1756117845Ssam (void) safe_rng_read(sc); 1757117845Ssam DELAY(25); 1758117845Ssam 1759117845Ssam if (READ_REG(sc, SAFE_RNG_ALM_CNT) == 0) { 1760117845Ssam safe_rng_disable_short_cycle(sc); 1761117845Ssam goto retry; 1762117845Ssam } 1763117845Ssam freq_inc = 1; 1764117845Ssam } 1765117845Ssam safe_rng_disable_short_cycle(sc); 1766117845Ssam } else 1767117845Ssam WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0); 1768117845Ssam 1769117845Ssam (*sc->sc_harvest)(sc->sc_rndtest, buf, maxwords*sizeof (u_int32_t)); 1770117845Ssam callout_reset(&sc->sc_rngto, 1771117845Ssam hz * (safe_rnginterval ? safe_rnginterval : 1), safe_rng, sc); 1772117845Ssam} 1773117845Ssam#endif /* SAFE_NO_RNG */ 1774117845Ssam 1775117845Ssamstatic void 1776117845Ssamsafe_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1777117845Ssam{ 1778117845Ssam bus_addr_t *paddr = (bus_addr_t*) arg; 1779117845Ssam *paddr = segs->ds_addr; 1780117845Ssam} 1781117845Ssam 1782117845Ssamstatic int 1783117845Ssamsafe_dma_malloc( 1784117845Ssam struct safe_softc *sc, 1785117845Ssam bus_size_t size, 1786117845Ssam struct safe_dma_alloc *dma, 1787117845Ssam int mapflags 1788117845Ssam) 1789117845Ssam{ 1790117845Ssam int r; 1791117845Ssam 1792232874Sscottl r = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), /* parent */ 1793117845Ssam sizeof(u_int32_t), 0, /* alignment, bounds */ 1794117845Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 1795117845Ssam BUS_SPACE_MAXADDR, /* highaddr */ 1796117845Ssam NULL, NULL, /* filter, filterarg */ 1797117845Ssam size, /* maxsize */ 1798117845Ssam 1, /* nsegments */ 1799117845Ssam size, /* maxsegsize */ 1800117845Ssam BUS_DMA_ALLOCNOW, /* flags */ 1801117845Ssam NULL, NULL, /* locking */ 1802117845Ssam &dma->dma_tag); 1803117845Ssam if (r != 0) { 1804117845Ssam device_printf(sc->sc_dev, "safe_dma_malloc: " 1805117845Ssam "bus_dma_tag_create failed; error %u\n", r); 1806117845Ssam goto fail_0; 1807117845Ssam } 1808117845Ssam 1809117845Ssam r = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr, 1810117845Ssam BUS_DMA_NOWAIT, &dma->dma_map); 1811117845Ssam if (r != 0) { 1812117845Ssam device_printf(sc->sc_dev, "safe_dma_malloc: " 1813273808Sjmg "bus_dmammem_alloc failed; size %ju, error %u\n", 1814273808Sjmg (uintmax_t)size, r); 1815267340Sjhb goto fail_1; 1816117845Ssam } 1817117845Ssam 1818117845Ssam r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, 1819117845Ssam size, 1820117845Ssam safe_dmamap_cb, 1821117845Ssam &dma->dma_paddr, 1822117845Ssam mapflags | BUS_DMA_NOWAIT); 1823117845Ssam if (r != 0) { 1824117845Ssam device_printf(sc->sc_dev, "safe_dma_malloc: " 1825117845Ssam "bus_dmamap_load failed; error %u\n", r); 1826267340Sjhb goto fail_2; 1827117845Ssam } 1828117845Ssam 1829117845Ssam dma->dma_size = size; 1830117845Ssam return (0); 1831117845Ssam 1832117845Ssam bus_dmamap_unload(dma->dma_tag, dma->dma_map); 1833117845Ssamfail_2: 1834117845Ssam bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 1835117845Ssamfail_1: 1836117845Ssam bus_dma_tag_destroy(dma->dma_tag); 1837117845Ssamfail_0: 1838117845Ssam dma->dma_tag = NULL; 1839117845Ssam return (r); 1840117845Ssam} 1841117845Ssam 1842117845Ssamstatic void 1843117845Ssamsafe_dma_free(struct safe_softc *sc, struct safe_dma_alloc *dma) 1844117845Ssam{ 1845117845Ssam bus_dmamap_unload(dma->dma_tag, dma->dma_map); 1846117845Ssam bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 1847117845Ssam bus_dma_tag_destroy(dma->dma_tag); 1848117845Ssam} 1849117845Ssam 1850117845Ssam/* 1851117845Ssam * Resets the board. Values in the regesters are left as is 1852117845Ssam * from the reset (i.e. initial values are assigned elsewhere). 1853117845Ssam */ 1854117845Ssamstatic void 1855117845Ssamsafe_reset_board(struct safe_softc *sc) 1856117845Ssam{ 1857117845Ssam u_int32_t v; 1858117845Ssam /* 1859117845Ssam * Reset the device. The manual says no delay 1860117845Ssam * is needed between marking and clearing reset. 1861117845Ssam */ 1862117845Ssam v = READ_REG(sc, SAFE_PE_DMACFG) &~ 1863117845Ssam (SAFE_PE_DMACFG_PERESET | SAFE_PE_DMACFG_PDRRESET | 1864117845Ssam SAFE_PE_DMACFG_SGRESET); 1865117845Ssam WRITE_REG(sc, SAFE_PE_DMACFG, v 1866117845Ssam | SAFE_PE_DMACFG_PERESET 1867117845Ssam | SAFE_PE_DMACFG_PDRRESET 1868117845Ssam | SAFE_PE_DMACFG_SGRESET); 1869117845Ssam WRITE_REG(sc, SAFE_PE_DMACFG, v); 1870117845Ssam} 1871117845Ssam 1872117845Ssam/* 1873117845Ssam * Initialize registers we need to touch only once. 1874117845Ssam */ 1875117845Ssamstatic void 1876117845Ssamsafe_init_board(struct safe_softc *sc) 1877117845Ssam{ 1878117845Ssam u_int32_t v, dwords; 1879117845Ssam 1880201758Smbr v = READ_REG(sc, SAFE_PE_DMACFG); 1881117845Ssam v &=~ SAFE_PE_DMACFG_PEMODE; 1882117845Ssam v |= SAFE_PE_DMACFG_FSENA /* failsafe enable */ 1883117845Ssam | SAFE_PE_DMACFG_GPRPCI /* gather ring on PCI */ 1884117845Ssam | SAFE_PE_DMACFG_SPRPCI /* scatter ring on PCI */ 1885117845Ssam | SAFE_PE_DMACFG_ESDESC /* endian-swap descriptors */ 1886117845Ssam | SAFE_PE_DMACFG_ESSA /* endian-swap SA's */ 1887117845Ssam | SAFE_PE_DMACFG_ESPDESC /* endian-swap part. desc's */ 1888117845Ssam ; 1889117845Ssam WRITE_REG(sc, SAFE_PE_DMACFG, v); 1890117845Ssam#if 0 1891117845Ssam /* XXX select byte swap based on host byte order */ 1892117845Ssam WRITE_REG(sc, SAFE_ENDIAN, 0x1b); 1893117845Ssam#endif 1894117845Ssam if (sc->sc_chiprev == SAFE_REV(1,0)) { 1895117845Ssam /* 1896117845Ssam * Avoid large PCI DMA transfers. Rev 1.0 has a bug where 1897117845Ssam * "target mode transfers" done while the chip is DMA'ing 1898117845Ssam * >1020 bytes cause the hardware to lockup. To avoid this 1899117845Ssam * we reduce the max PCI transfer size and use small source 1900117845Ssam * particle descriptors (<= 256 bytes). 1901117845Ssam */ 1902117845Ssam WRITE_REG(sc, SAFE_DMA_CFG, 256); 1903117845Ssam device_printf(sc->sc_dev, 1904117845Ssam "Reduce max DMA size to %u words for rev %u.%u WAR\n", 1905117845Ssam (READ_REG(sc, SAFE_DMA_CFG)>>2) & 0xff, 1906117845Ssam SAFE_REV_MAJ(sc->sc_chiprev), 1907117845Ssam SAFE_REV_MIN(sc->sc_chiprev)); 1908117845Ssam } 1909117845Ssam 1910117845Ssam /* NB: operands+results are overlaid */ 1911117845Ssam WRITE_REG(sc, SAFE_PE_PDRBASE, sc->sc_ringalloc.dma_paddr); 1912117845Ssam WRITE_REG(sc, SAFE_PE_RDRBASE, sc->sc_ringalloc.dma_paddr); 1913117845Ssam /* 1914117845Ssam * Configure ring entry size and number of items in the ring. 1915117845Ssam */ 1916117845Ssam KASSERT((sizeof(struct safe_ringentry) % sizeof(u_int32_t)) == 0, 1917117845Ssam ("PE ring entry not 32-bit aligned!")); 1918117845Ssam dwords = sizeof(struct safe_ringentry) / sizeof(u_int32_t); 1919117845Ssam WRITE_REG(sc, SAFE_PE_RINGCFG, 1920117845Ssam (dwords << SAFE_PE_RINGCFG_OFFSET_S) | SAFE_MAX_NQUEUE); 1921117845Ssam WRITE_REG(sc, SAFE_PE_RINGPOLL, 0); /* disable polling */ 1922117845Ssam 1923117845Ssam WRITE_REG(sc, SAFE_PE_GRNGBASE, sc->sc_spalloc.dma_paddr); 1924117845Ssam WRITE_REG(sc, SAFE_PE_SRNGBASE, sc->sc_dpalloc.dma_paddr); 1925117845Ssam WRITE_REG(sc, SAFE_PE_PARTSIZE, 1926117845Ssam (SAFE_TOTAL_DPART<<16) | SAFE_TOTAL_SPART); 1927117845Ssam /* 1928117845Ssam * NB: destination particles are fixed size. We use 1929117845Ssam * an mbuf cluster and require all results go to 1930117845Ssam * clusters or smaller. 1931117845Ssam */ 1932117845Ssam WRITE_REG(sc, SAFE_PE_PARTCFG, SAFE_MAX_DSIZE); 1933117845Ssam 1934117845Ssam /* it's now safe to enable PE mode, do it */ 1935117845Ssam WRITE_REG(sc, SAFE_PE_DMACFG, v | SAFE_PE_DMACFG_PEMODE); 1936117845Ssam 1937117845Ssam /* 1938117845Ssam * Configure hardware to use level-triggered interrupts and 1939117845Ssam * to interrupt after each descriptor is processed. 1940117845Ssam */ 1941117845Ssam WRITE_REG(sc, SAFE_HI_CFG, SAFE_HI_CFG_LEVEL); 1942117845Ssam WRITE_REG(sc, SAFE_HI_DESC_CNT, 1); 1943117845Ssam WRITE_REG(sc, SAFE_HI_MASK, SAFE_INT_PE_DDONE | SAFE_INT_PE_ERROR); 1944117845Ssam} 1945117845Ssam 1946117845Ssam/* 1947117845Ssam * Init PCI registers 1948117845Ssam */ 1949117845Ssamstatic void 1950117845Ssamsafe_init_pciregs(device_t dev) 1951117845Ssam{ 1952117845Ssam} 1953117845Ssam 1954117845Ssam/* 1955117845Ssam * Clean up after a chip crash. 1956117845Ssam * It is assumed that the caller in splimp() 1957117845Ssam */ 1958117845Ssamstatic void 1959117845Ssamsafe_cleanchip(struct safe_softc *sc) 1960117845Ssam{ 1961117845Ssam 1962117845Ssam if (sc->sc_nqchip != 0) { 1963117845Ssam struct safe_ringentry *re = sc->sc_back; 1964117845Ssam 1965117845Ssam while (re != sc->sc_front) { 1966117845Ssam if (re->re_desc.d_csr != 0) 1967117845Ssam safe_free_entry(sc, re); 1968117845Ssam if (++re == sc->sc_ringtop) 1969117845Ssam re = sc->sc_ring; 1970117845Ssam } 1971117845Ssam sc->sc_back = re; 1972117845Ssam sc->sc_nqchip = 0; 1973117845Ssam } 1974117845Ssam} 1975117845Ssam 1976117845Ssam/* 1977117845Ssam * free a safe_q 1978117845Ssam * It is assumed that the caller is within splimp(). 1979117845Ssam */ 1980117845Ssamstatic int 1981117845Ssamsafe_free_entry(struct safe_softc *sc, struct safe_ringentry *re) 1982117845Ssam{ 1983117845Ssam struct cryptop *crp; 1984117845Ssam 1985117845Ssam /* 1986117845Ssam * Free header MCR 1987117845Ssam */ 1988117845Ssam if ((re->re_dst_m != NULL) && (re->re_src_m != re->re_dst_m)) 1989117845Ssam m_freem(re->re_dst_m); 1990117845Ssam 1991117845Ssam crp = (struct cryptop *)re->re_crp; 1992117845Ssam 1993117845Ssam re->re_desc.d_csr = 0; 1994117845Ssam 1995117845Ssam crp->crp_etype = EFAULT; 1996117845Ssam crypto_done(crp); 1997117845Ssam return(0); 1998117845Ssam} 1999117845Ssam 2000117845Ssam/* 2001117845Ssam * Routine to reset the chip and clean up. 2002117845Ssam * It is assumed that the caller is in splimp() 2003117845Ssam */ 2004117845Ssamstatic void 2005117845Ssamsafe_totalreset(struct safe_softc *sc) 2006117845Ssam{ 2007117845Ssam safe_reset_board(sc); 2008117845Ssam safe_init_board(sc); 2009117845Ssam safe_cleanchip(sc); 2010117845Ssam} 2011117845Ssam 2012117845Ssam/* 2013117845Ssam * Is the operand suitable aligned for direct DMA. Each 2014117845Ssam * segment must be aligned on a 32-bit boundary and all 2015117845Ssam * but the last segment must be a multiple of 4 bytes. 2016117845Ssam */ 2017117845Ssamstatic int 2018117845Ssamsafe_dmamap_aligned(const struct safe_operand *op) 2019117845Ssam{ 2020117845Ssam int i; 2021117845Ssam 2022117845Ssam for (i = 0; i < op->nsegs; i++) { 2023117845Ssam if (op->segs[i].ds_addr & 3) 2024117845Ssam return (0); 2025117845Ssam if (i != (op->nsegs - 1) && (op->segs[i].ds_len & 3)) 2026117845Ssam return (0); 2027117845Ssam } 2028117845Ssam return (1); 2029117845Ssam} 2030117845Ssam 2031117845Ssam/* 2032117845Ssam * Is the operand suitable for direct DMA as the destination 2033117845Ssam * of an operation. The hardware requires that each ``particle'' 2034117845Ssam * but the last in an operation result have the same size. We 2035117845Ssam * fix that size at SAFE_MAX_DSIZE bytes. This routine returns 2036117845Ssam * 0 if some segment is not a multiple of of this size, 1 if all 2037117845Ssam * segments are exactly this size, or 2 if segments are at worst 2038117845Ssam * a multple of this size. 2039117845Ssam */ 2040117845Ssamstatic int 2041117845Ssamsafe_dmamap_uniform(const struct safe_operand *op) 2042117845Ssam{ 2043117845Ssam int result = 1; 2044117845Ssam 2045117845Ssam if (op->nsegs > 0) { 2046117845Ssam int i; 2047117845Ssam 2048118882Ssam for (i = 0; i < op->nsegs-1; i++) { 2049117845Ssam if (op->segs[i].ds_len % SAFE_MAX_DSIZE) 2050117845Ssam return (0); 2051117845Ssam if (op->segs[i].ds_len != SAFE_MAX_DSIZE) 2052117845Ssam result = 2; 2053118882Ssam } 2054117845Ssam } 2055117845Ssam return (result); 2056117845Ssam} 2057117845Ssam 2058117845Ssam#ifdef SAFE_DEBUG 2059117845Ssamstatic void 2060117845Ssamsafe_dump_dmastatus(struct safe_softc *sc, const char *tag) 2061117845Ssam{ 2062117845Ssam printf("%s: ENDIAN 0x%x SRC 0x%x DST 0x%x STAT 0x%x\n" 2063117845Ssam , tag 2064117845Ssam , READ_REG(sc, SAFE_DMA_ENDIAN) 2065117845Ssam , READ_REG(sc, SAFE_DMA_SRCADDR) 2066117845Ssam , READ_REG(sc, SAFE_DMA_DSTADDR) 2067117845Ssam , READ_REG(sc, SAFE_DMA_STAT) 2068117845Ssam ); 2069117845Ssam} 2070117845Ssam 2071117845Ssamstatic void 2072117845Ssamsafe_dump_intrstate(struct safe_softc *sc, const char *tag) 2073117845Ssam{ 2074117845Ssam printf("%s: HI_CFG 0x%x HI_MASK 0x%x HI_DESC_CNT 0x%x HU_STAT 0x%x HM_STAT 0x%x\n" 2075117845Ssam , tag 2076117845Ssam , READ_REG(sc, SAFE_HI_CFG) 2077117845Ssam , READ_REG(sc, SAFE_HI_MASK) 2078117845Ssam , READ_REG(sc, SAFE_HI_DESC_CNT) 2079117845Ssam , READ_REG(sc, SAFE_HU_STAT) 2080117845Ssam , READ_REG(sc, SAFE_HM_STAT) 2081117845Ssam ); 2082117845Ssam} 2083117845Ssam 2084117845Ssamstatic void 2085117845Ssamsafe_dump_ringstate(struct safe_softc *sc, const char *tag) 2086117845Ssam{ 2087117845Ssam u_int32_t estat = READ_REG(sc, SAFE_PE_ERNGSTAT); 2088117845Ssam 2089117845Ssam /* NB: assume caller has lock on ring */ 2090125466Speter printf("%s: ERNGSTAT %x (next %u) back %lu front %lu\n", 2091117845Ssam tag, 2092117845Ssam estat, (estat >> SAFE_PE_ERNGSTAT_NEXT_S), 2093125466Speter (unsigned long)(sc->sc_back - sc->sc_ring), 2094125466Speter (unsigned long)(sc->sc_front - sc->sc_ring)); 2095117845Ssam} 2096117845Ssam 2097117845Ssamstatic void 2098117845Ssamsafe_dump_request(struct safe_softc *sc, const char* tag, struct safe_ringentry *re) 2099117845Ssam{ 2100117845Ssam int ix, nsegs; 2101117845Ssam 2102117845Ssam ix = re - sc->sc_ring; 2103117845Ssam printf("%s: %p (%u): csr %x src %x dst %x sa %x len %x\n" 2104117845Ssam , tag 2105117845Ssam , re, ix 2106117845Ssam , re->re_desc.d_csr 2107117845Ssam , re->re_desc.d_src 2108117845Ssam , re->re_desc.d_dst 2109117845Ssam , re->re_desc.d_sa 2110117845Ssam , re->re_desc.d_len 2111117845Ssam ); 2112117845Ssam if (re->re_src.nsegs > 1) { 2113117845Ssam ix = (re->re_desc.d_src - sc->sc_spalloc.dma_paddr) / 2114117845Ssam sizeof(struct safe_pdesc); 2115117845Ssam for (nsegs = re->re_src.nsegs; nsegs; nsegs--) { 2116117845Ssam printf(" spd[%u] %p: %p size %u flags %x" 2117117845Ssam , ix, &sc->sc_spring[ix] 2118125466Speter , (caddr_t)(uintptr_t) sc->sc_spring[ix].pd_addr 2119117845Ssam , sc->sc_spring[ix].pd_size 2120117845Ssam , sc->sc_spring[ix].pd_flags 2121117845Ssam ); 2122117845Ssam if (sc->sc_spring[ix].pd_size == 0) 2123117845Ssam printf(" (zero!)"); 2124117845Ssam printf("\n"); 2125117845Ssam if (++ix == SAFE_TOTAL_SPART) 2126117845Ssam ix = 0; 2127117845Ssam } 2128117845Ssam } 2129117845Ssam if (re->re_dst.nsegs > 1) { 2130117845Ssam ix = (re->re_desc.d_dst - sc->sc_dpalloc.dma_paddr) / 2131117845Ssam sizeof(struct safe_pdesc); 2132117845Ssam for (nsegs = re->re_dst.nsegs; nsegs; nsegs--) { 2133117845Ssam printf(" dpd[%u] %p: %p flags %x\n" 2134117845Ssam , ix, &sc->sc_dpring[ix] 2135125466Speter , (caddr_t)(uintptr_t) sc->sc_dpring[ix].pd_addr 2136117845Ssam , sc->sc_dpring[ix].pd_flags 2137117845Ssam ); 2138117845Ssam if (++ix == SAFE_TOTAL_DPART) 2139117845Ssam ix = 0; 2140117845Ssam } 2141117845Ssam } 2142117845Ssam printf("sa: cmd0 %08x cmd1 %08x staterec %x\n", 2143117845Ssam re->re_sa.sa_cmd0, re->re_sa.sa_cmd1, re->re_sa.sa_staterec); 2144117845Ssam printf("sa: key %x %x %x %x %x %x %x %x\n" 2145117845Ssam , re->re_sa.sa_key[0] 2146117845Ssam , re->re_sa.sa_key[1] 2147117845Ssam , re->re_sa.sa_key[2] 2148117845Ssam , re->re_sa.sa_key[3] 2149117845Ssam , re->re_sa.sa_key[4] 2150117845Ssam , re->re_sa.sa_key[5] 2151117845Ssam , re->re_sa.sa_key[6] 2152117845Ssam , re->re_sa.sa_key[7] 2153117845Ssam ); 2154117845Ssam printf("sa: indigest %x %x %x %x %x\n" 2155117845Ssam , re->re_sa.sa_indigest[0] 2156117845Ssam , re->re_sa.sa_indigest[1] 2157117845Ssam , re->re_sa.sa_indigest[2] 2158117845Ssam , re->re_sa.sa_indigest[3] 2159117845Ssam , re->re_sa.sa_indigest[4] 2160117845Ssam ); 2161117845Ssam printf("sa: outdigest %x %x %x %x %x\n" 2162117845Ssam , re->re_sa.sa_outdigest[0] 2163117845Ssam , re->re_sa.sa_outdigest[1] 2164117845Ssam , re->re_sa.sa_outdigest[2] 2165117845Ssam , re->re_sa.sa_outdigest[3] 2166117845Ssam , re->re_sa.sa_outdigest[4] 2167117845Ssam ); 2168117845Ssam printf("sr: iv %x %x %x %x\n" 2169117845Ssam , re->re_sastate.sa_saved_iv[0] 2170117845Ssam , re->re_sastate.sa_saved_iv[1] 2171117845Ssam , re->re_sastate.sa_saved_iv[2] 2172117845Ssam , re->re_sastate.sa_saved_iv[3] 2173117845Ssam ); 2174117845Ssam printf("sr: hashbc %u indigest %x %x %x %x %x\n" 2175117845Ssam , re->re_sastate.sa_saved_hashbc 2176117845Ssam , re->re_sastate.sa_saved_indigest[0] 2177117845Ssam , re->re_sastate.sa_saved_indigest[1] 2178117845Ssam , re->re_sastate.sa_saved_indigest[2] 2179117845Ssam , re->re_sastate.sa_saved_indigest[3] 2180117845Ssam , re->re_sastate.sa_saved_indigest[4] 2181117845Ssam ); 2182117845Ssam} 2183117845Ssam 2184117845Ssamstatic void 2185117845Ssamsafe_dump_ring(struct safe_softc *sc, const char *tag) 2186117845Ssam{ 2187117845Ssam mtx_lock(&sc->sc_ringmtx); 2188117845Ssam printf("\nSafeNet Ring State:\n"); 2189117845Ssam safe_dump_intrstate(sc, tag); 2190117845Ssam safe_dump_dmastatus(sc, tag); 2191117845Ssam safe_dump_ringstate(sc, tag); 2192117845Ssam if (sc->sc_nqchip) { 2193117845Ssam struct safe_ringentry *re = sc->sc_back; 2194117845Ssam do { 2195117845Ssam safe_dump_request(sc, tag, re); 2196117845Ssam if (++re == sc->sc_ringtop) 2197117845Ssam re = sc->sc_ring; 2198117845Ssam } while (re != sc->sc_front); 2199117845Ssam } 2200117845Ssam mtx_unlock(&sc->sc_ringmtx); 2201117845Ssam} 2202117845Ssam 2203117845Ssamstatic int 2204117845Ssamsysctl_hw_safe_dump(SYSCTL_HANDLER_ARGS) 2205117845Ssam{ 2206117845Ssam char dmode[64]; 2207117845Ssam int error; 2208117845Ssam 2209117845Ssam strncpy(dmode, "", sizeof(dmode) - 1); 2210117845Ssam dmode[sizeof(dmode) - 1] = '\0'; 2211117845Ssam error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 2212117845Ssam 2213117845Ssam if (error == 0 && req->newptr != NULL) { 2214117845Ssam struct safe_softc *sc = safec; 2215117845Ssam 2216117845Ssam if (!sc) 2217117845Ssam return EINVAL; 2218117845Ssam if (strncmp(dmode, "dma", 3) == 0) 2219117845Ssam safe_dump_dmastatus(sc, "safe0"); 2220117845Ssam else if (strncmp(dmode, "int", 3) == 0) 2221117845Ssam safe_dump_intrstate(sc, "safe0"); 2222117845Ssam else if (strncmp(dmode, "ring", 4) == 0) 2223117845Ssam safe_dump_ring(sc, "safe0"); 2224117845Ssam else 2225117845Ssam return EINVAL; 2226117845Ssam } 2227117845Ssam return error; 2228117845Ssam} 2229117845SsamSYSCTL_PROC(_hw_safe, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 2230117845Ssam 0, 0, sysctl_hw_safe_dump, "A", "Dump driver state"); 2231117845Ssam#endif /* SAFE_DEBUG */ 2232