1/*- 2 * Copyright (c) 2007 Damien Bergamini <damien.bergamini@free.fr> 3 * Copyright (c) 2012 Bernhard Schmidt <bschmidt@FreeBSD.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $OpenBSD: rt2860reg.h,v 1.30 2010/05/10 18:17:10 damien Exp $ 18 * $FreeBSD$ 19 */ 20 21#define RT2860_NOISE_FLOOR -95 22 23/* PCI registers */ 24#define RT2860_PCI_CFG 0x0000 25#define RT2860_PCI_EECTRL 0x0004 26#define RT2860_PCI_MCUCTRL 0x0008 27#define RT2860_PCI_SYSCTRL 0x000c 28#define RT2860_PCIE_JTAG 0x0010 29 30#define RT3090_AUX_CTRL 0x010c 31 32#define RT3070_OPT_14 0x0114 33 34/* SCH/DMA registers */ 35#define RT2860_INT_STATUS 0x0200 36#define RT2860_INT_MASK 0x0204 37#define RT2860_WPDMA_GLO_CFG 0x0208 38#define RT2860_WPDMA_RST_IDX 0x020c 39#define RT2860_DELAY_INT_CFG 0x0210 40#define RT2860_WMM_AIFSN_CFG 0x0214 41#define RT2860_WMM_CWMIN_CFG 0x0218 42#define RT2860_WMM_CWMAX_CFG 0x021c 43#define RT2860_WMM_TXOP0_CFG 0x0220 44#define RT2860_WMM_TXOP1_CFG 0x0224 45#define RT2860_GPIO_CTRL 0x0228 46#define RT2860_MCU_CMD_REG 0x022c 47#define RT2860_TX_BASE_PTR(qid) (0x0230 + (qid) * 16) 48#define RT2860_TX_MAX_CNT(qid) (0x0234 + (qid) * 16) 49#define RT2860_TX_CTX_IDX(qid) (0x0238 + (qid) * 16) 50#define RT2860_TX_DTX_IDX(qid) (0x023c + (qid) * 16) 51#define RT2860_RX_BASE_PTR 0x0290 52#define RT2860_RX_MAX_CNT 0x0294 53#define RT2860_RX_CALC_IDX 0x0298 54#define RT2860_FS_DRX_IDX 0x029c 55#define RT2860_USB_DMA_CFG 0x02a0 /* RT2870 only */ 56#define RT2860_US_CYC_CNT 0x02a4 57 58/* PBF registers */ 59#define RT2860_SYS_CTRL 0x0400 60#define RT2860_HOST_CMD 0x0404 61#define RT2860_PBF_CFG 0x0408 62#define RT2860_MAX_PCNT 0x040c 63#define RT2860_BUF_CTRL 0x0410 64#define RT2860_MCU_INT_STA 0x0414 65#define RT2860_MCU_INT_ENA 0x0418 66#define RT2860_TXQ_IO(qid) (0x041c + (qid) * 4) 67#define RT2860_RX0Q_IO 0x0424 68#define RT2860_BCN_OFFSET0 0x042c 69#define RT2860_BCN_OFFSET1 0x0430 70#define RT2860_TXRXQ_STA 0x0434 71#define RT2860_TXRXQ_PCNT 0x0438 72#define RT2860_PBF_DBG 0x043c 73#define RT2860_CAP_CTRL 0x0440 74 75/* RT3070 registers */ 76#define RT3070_RF_CSR_CFG 0x0500 77#define RT3070_EFUSE_CTRL 0x0580 78#define RT3070_EFUSE_DATA0 0x0590 79#define RT3070_EFUSE_DATA1 0x0594 80#define RT3070_EFUSE_DATA2 0x0598 81#define RT3070_EFUSE_DATA3 0x059c 82#define RT3090_OSC_CTRL 0x05a4 83#define RT3070_LDO_CFG0 0x05d4 84#define RT3070_GPIO_SWITCH 0x05dc 85 86/* MAC registers */ 87#define RT2860_ASIC_VER_ID 0x1000 88#define RT2860_MAC_SYS_CTRL 0x1004 89#define RT2860_MAC_ADDR_DW0 0x1008 90#define RT2860_MAC_ADDR_DW1 0x100c 91#define RT2860_MAC_BSSID_DW0 0x1010 92#define RT2860_MAC_BSSID_DW1 0x1014 93#define RT2860_MAX_LEN_CFG 0x1018 94#define RT2860_BBP_CSR_CFG 0x101c 95#define RT2860_RF_CSR_CFG0 0x1020 96#define RT2860_RF_CSR_CFG1 0x1024 97#define RT2860_RF_CSR_CFG2 0x1028 98#define RT2860_LED_CFG 0x102c 99 100/* undocumented registers */ 101#define RT2860_DEBUG 0x10f4 102 103/* MAC Timing control registers */ 104#define RT2860_XIFS_TIME_CFG 0x1100 105#define RT2860_BKOFF_SLOT_CFG 0x1104 106#define RT2860_NAV_TIME_CFG 0x1108 107#define RT2860_CH_TIME_CFG 0x110c 108#define RT2860_PBF_LIFE_TIMER 0x1110 109#define RT2860_BCN_TIME_CFG 0x1114 110#define RT2860_TBTT_SYNC_CFG 0x1118 111#define RT2860_TSF_TIMER_DW0 0x111c 112#define RT2860_TSF_TIMER_DW1 0x1120 113#define RT2860_TBTT_TIMER 0x1124 114#define RT2860_INT_TIMER_CFG 0x1128 115#define RT2860_INT_TIMER_EN 0x112c 116#define RT2860_CH_IDLE_TIME 0x1130 117 118/* MAC Power Save configuration registers */ 119#define RT2860_MAC_STATUS_REG 0x1200 120#define RT2860_PWR_PIN_CFG 0x1204 121#define RT2860_AUTO_WAKEUP_CFG 0x1208 122 123/* MAC TX configuration registers */ 124#define RT2860_EDCA_AC_CFG(aci) (0x1300 + (aci) * 4) 125#define RT2860_EDCA_TID_AC_MAP 0x1310 126#define RT2860_TX_PWR_CFG(ridx) (0x1314 + (ridx) * 4) 127#define RT2860_TX_PIN_CFG 0x1328 128#define RT2860_TX_BAND_CFG 0x132c 129#define RT2860_TX_SW_CFG0 0x1330 130#define RT2860_TX_SW_CFG1 0x1334 131#define RT2860_TX_SW_CFG2 0x1338 132#define RT2860_TXOP_THRES_CFG 0x133c 133#define RT2860_TXOP_CTRL_CFG 0x1340 134#define RT2860_TX_RTS_CFG 0x1344 135#define RT2860_TX_TIMEOUT_CFG 0x1348 136#define RT2860_TX_RTY_CFG 0x134c 137#define RT2860_TX_LINK_CFG 0x1350 138#define RT2860_HT_FBK_CFG0 0x1354 139#define RT2860_HT_FBK_CFG1 0x1358 140#define RT2860_LG_FBK_CFG0 0x135c 141#define RT2860_LG_FBK_CFG1 0x1360 142#define RT2860_CCK_PROT_CFG 0x1364 143#define RT2860_OFDM_PROT_CFG 0x1368 144#define RT2860_MM20_PROT_CFG 0x136c 145#define RT2860_MM40_PROT_CFG 0x1370 146#define RT2860_GF20_PROT_CFG 0x1374 147#define RT2860_GF40_PROT_CFG 0x1378 148#define RT2860_EXP_CTS_TIME 0x137c 149#define RT2860_EXP_ACK_TIME 0x1380 150 151/* MAC RX configuration registers */ 152#define RT2860_RX_FILTR_CFG 0x1400 153#define RT2860_AUTO_RSP_CFG 0x1404 154#define RT2860_LEGACY_BASIC_RATE 0x1408 155#define RT2860_HT_BASIC_RATE 0x140c 156#define RT2860_HT_CTRL_CFG 0x1410 157#define RT2860_SIFS_COST_CFG 0x1414 158#define RT2860_RX_PARSER_CFG 0x1418 159 160/* MAC Security configuration registers */ 161#define RT2860_TX_SEC_CNT0 0x1500 162#define RT2860_RX_SEC_CNT0 0x1504 163#define RT2860_CCMP_FC_MUTE 0x1508 164 165/* MAC HCCA/PSMP configuration registers */ 166#define RT2860_TXOP_HLDR_ADDR0 0x1600 167#define RT2860_TXOP_HLDR_ADDR1 0x1604 168#define RT2860_TXOP_HLDR_ET 0x1608 169#define RT2860_QOS_CFPOLL_RA_DW0 0x160c 170#define RT2860_QOS_CFPOLL_A1_DW1 0x1610 171#define RT2860_QOS_CFPOLL_QC 0x1614 172 173/* MAC Statistics Counters */ 174#define RT2860_RX_STA_CNT0 0x1700 175#define RT2860_RX_STA_CNT1 0x1704 176#define RT2860_RX_STA_CNT2 0x1708 177#define RT2860_TX_STA_CNT0 0x170c 178#define RT2860_TX_STA_CNT1 0x1710 179#define RT2860_TX_STA_CNT2 0x1714 180#define RT2860_TX_STAT_FIFO 0x1718 181 182/* RX WCID search table */ 183#define RT2860_WCID_ENTRY(wcid) (0x1800 + (wcid) * 8) 184 185#define RT2860_FW_BASE 0x2000 186#define RT2870_FW_BASE 0x3000 187 188/* Pair-wise key table */ 189#define RT2860_PKEY(wcid) (0x4000 + (wcid) * 32) 190 191/* IV/EIV table */ 192#define RT2860_IVEIV(wcid) (0x6000 + (wcid) * 8) 193 194/* WCID attribute table */ 195#define RT2860_WCID_ATTR(wcid) (0x6800 + (wcid) * 4) 196 197/* Shared Key Table */ 198#define RT2860_SKEY(vap, kidx) (0x6c00 + (vap) * 128 + (kidx) * 32) 199 200/* Shared Key Mode */ 201#define RT2860_SKEY_MODE_0_7 0x7000 202#define RT2860_SKEY_MODE_8_15 0x7004 203#define RT2860_SKEY_MODE_16_23 0x7008 204#define RT2860_SKEY_MODE_24_31 0x700c 205 206/* Shared Memory between MCU and host */ 207#define RT2860_H2M_MAILBOX 0x7010 208#define RT2860_H2M_MAILBOX_CID 0x7014 209#define RT2860_H2M_MAILBOX_STATUS 0x701c 210#define RT2860_H2M_BBPAGENT 0x7028 211#define RT2860_BCN_BASE(vap) (0x7800 + (vap) * 512) 212 213 214/* possible flags for RT2860_PCI_CFG */ 215#define RT2860_PCI_CFG_USB (1 << 17) 216#define RT2860_PCI_CFG_PCI (1 << 16) 217 218/* possible flags for register RT2860_PCI_EECTRL */ 219#define RT2860_C (1 << 0) 220#define RT2860_S (1 << 1) 221#define RT2860_D (1 << 2) 222#define RT2860_SHIFT_D 2 223#define RT2860_Q (1 << 3) 224#define RT2860_SHIFT_Q 3 225 226/* possible flags for registers INT_STATUS/INT_MASK */ 227#define RT2860_TX_COHERENT (1 << 17) 228#define RT2860_RX_COHERENT (1 << 16) 229#define RT2860_MAC_INT_4 (1 << 15) 230#define RT2860_MAC_INT_3 (1 << 14) 231#define RT2860_MAC_INT_2 (1 << 13) 232#define RT2860_MAC_INT_1 (1 << 12) 233#define RT2860_MAC_INT_0 (1 << 11) 234#define RT2860_TX_RX_COHERENT (1 << 10) 235#define RT2860_MCU_CMD_INT (1 << 9) 236#define RT2860_TX_DONE_INT5 (1 << 8) 237#define RT2860_TX_DONE_INT4 (1 << 7) 238#define RT2860_TX_DONE_INT3 (1 << 6) 239#define RT2860_TX_DONE_INT2 (1 << 5) 240#define RT2860_TX_DONE_INT1 (1 << 4) 241#define RT2860_TX_DONE_INT0 (1 << 3) 242#define RT2860_RX_DONE_INT (1 << 2) 243#define RT2860_TX_DLY_INT (1 << 1) 244#define RT2860_RX_DLY_INT (1 << 0) 245 246/* possible flags for register WPDMA_GLO_CFG */ 247#define RT2860_HDR_SEG_LEN_SHIFT 8 248#define RT2860_BIG_ENDIAN (1 << 7) 249#define RT2860_TX_WB_DDONE (1 << 6) 250#define RT2860_WPDMA_BT_SIZE_SHIFT 4 251#define RT2860_WPDMA_BT_SIZE16 0 252#define RT2860_WPDMA_BT_SIZE32 1 253#define RT2860_WPDMA_BT_SIZE64 2 254#define RT2860_WPDMA_BT_SIZE128 3 255#define RT2860_RX_DMA_BUSY (1 << 3) 256#define RT2860_RX_DMA_EN (1 << 2) 257#define RT2860_TX_DMA_BUSY (1 << 1) 258#define RT2860_TX_DMA_EN (1 << 0) 259 260/* flags for register WPDMA_RST_IDX */ 261#define RT2860_RST_DRX_IDX0 (1 << 16) 262#define RT2860_RST_DTX_IDX5 (1 << 5) 263#define RT2860_RST_DTX_IDX4 (1 << 4) 264#define RT2860_RST_DTX_IDX3 (1 << 3) 265#define RT2860_RST_DTX_IDX2 (1 << 2) 266#define RT2860_RST_DTX_IDX1 (1 << 1) 267#define RT2860_RST_DTX_IDX0 (1 << 0) 268 269/* possible flags for register DELAY_INT_CFG */ 270#define RT2860_TXDLY_INT_EN (1U << 31) 271#define RT2860_TXMAX_PINT_SHIFT 24 272#define RT2860_TXMAX_PTIME_SHIFT 16 273#define RT2860_RXDLY_INT_EN (1 << 15) 274#define RT2860_RXMAX_PINT_SHIFT 8 275#define RT2860_RXMAX_PTIME_SHIFT 0 276 277/* possible flags for register GPIO_CTRL */ 278#define RT2860_GPIO_D_SHIFT 8 279#define RT2860_GPIO_O_SHIFT 0 280 281/* possible flags for register USB_DMA_CFG */ 282#define RT2860_USB_TX_BUSY (1U << 31) 283#define RT2860_USB_RX_BUSY (1 << 30) 284#define RT2860_USB_EPOUT_VLD_SHIFT 24 285#define RT2860_USB_TX_EN (1 << 23) 286#define RT2860_USB_RX_EN (1 << 22) 287#define RT2860_USB_RX_AGG_EN (1 << 21) 288#define RT2860_USB_TXOP_HALT (1 << 20) 289#define RT2860_USB_TX_CLEAR (1 << 19) 290#define RT2860_USB_PHY_WD_EN (1 << 16) 291#define RT2860_USB_PHY_MAN_RST (1 << 15) 292#define RT2860_USB_RX_AGG_LMT(x) ((x) << 8) /* in unit of 1KB */ 293#define RT2860_USB_RX_AGG_TO(x) ((x) & 0xff) /* in unit of 33ns */ 294 295/* possible flags for register US_CYC_CNT */ 296#define RT2860_TEST_EN (1 << 24) 297#define RT2860_TEST_SEL_SHIFT 16 298#define RT2860_BT_MODE_EN (1 << 8) 299#define RT2860_US_CYC_CNT_SHIFT 0 300 301/* possible flags for register SYS_CTRL */ 302#define RT2860_HST_PM_SEL (1 << 16) 303#define RT2860_CAP_MODE (1 << 14) 304#define RT2860_PME_OEN (1 << 13) 305#define RT2860_CLKSELECT (1 << 12) 306#define RT2860_PBF_CLK_EN (1 << 11) 307#define RT2860_MAC_CLK_EN (1 << 10) 308#define RT2860_DMA_CLK_EN (1 << 9) 309#define RT2860_MCU_READY (1 << 7) 310#define RT2860_ASY_RESET (1 << 4) 311#define RT2860_PBF_RESET (1 << 3) 312#define RT2860_MAC_RESET (1 << 2) 313#define RT2860_DMA_RESET (1 << 1) 314#define RT2860_MCU_RESET (1 << 0) 315 316/* possible values for register HOST_CMD */ 317#define RT2860_MCU_CMD_SLEEP 0x30 318#define RT2860_MCU_CMD_WAKEUP 0x31 319#define RT2860_MCU_CMD_LEDS 0x50 320#define RT2860_MCU_CMD_LED_RSSI 0x51 321#define RT2860_MCU_CMD_LED1 0x52 322#define RT2860_MCU_CMD_LED2 0x53 323#define RT2860_MCU_CMD_LED3 0x54 324#define RT2860_MCU_CMD_RFRESET 0x72 325#define RT2860_MCU_CMD_ANTSEL 0x73 326#define RT2860_MCU_CMD_BBP 0x80 327#define RT2860_MCU_CMD_PSLEVEL 0x83 328 329/* possible flags for register PBF_CFG */ 330#define RT2860_TX1Q_NUM_SHIFT 21 331#define RT2860_TX2Q_NUM_SHIFT 16 332#define RT2860_NULL0_MODE (1 << 15) 333#define RT2860_NULL1_MODE (1 << 14) 334#define RT2860_RX_DROP_MODE (1 << 13) 335#define RT2860_TX0Q_MANUAL (1 << 12) 336#define RT2860_TX1Q_MANUAL (1 << 11) 337#define RT2860_TX2Q_MANUAL (1 << 10) 338#define RT2860_RX0Q_MANUAL (1 << 9) 339#define RT2860_HCCA_EN (1 << 8) 340#define RT2860_TX0Q_EN (1 << 4) 341#define RT2860_TX1Q_EN (1 << 3) 342#define RT2860_TX2Q_EN (1 << 2) 343#define RT2860_RX0Q_EN (1 << 1) 344 345/* possible flags for register BUF_CTRL */ 346#define RT2860_WRITE_TXQ(qid) (1 << (11 - (qid))) 347#define RT2860_NULL0_KICK (1 << 7) 348#define RT2860_NULL1_KICK (1 << 6) 349#define RT2860_BUF_RESET (1 << 5) 350#define RT2860_READ_TXQ(qid) (1 << (3 - (qid)) 351#define RT2860_READ_RX0Q (1 << 0) 352 353/* possible flags for registers MCU_INT_STA/MCU_INT_ENA */ 354#define RT2860_MCU_MAC_INT_8 (1 << 24) 355#define RT2860_MCU_MAC_INT_7 (1 << 23) 356#define RT2860_MCU_MAC_INT_6 (1 << 22) 357#define RT2860_MCU_MAC_INT_4 (1 << 20) 358#define RT2860_MCU_MAC_INT_3 (1 << 19) 359#define RT2860_MCU_MAC_INT_2 (1 << 18) 360#define RT2860_MCU_MAC_INT_1 (1 << 17) 361#define RT2860_MCU_MAC_INT_0 (1 << 16) 362#define RT2860_DTX0_INT (1 << 11) 363#define RT2860_DTX1_INT (1 << 10) 364#define RT2860_DTX2_INT (1 << 9) 365#define RT2860_DRX0_INT (1 << 8) 366#define RT2860_HCMD_INT (1 << 7) 367#define RT2860_N0TX_INT (1 << 6) 368#define RT2860_N1TX_INT (1 << 5) 369#define RT2860_BCNTX_INT (1 << 4) 370#define RT2860_MTX0_INT (1 << 3) 371#define RT2860_MTX1_INT (1 << 2) 372#define RT2860_MTX2_INT (1 << 1) 373#define RT2860_MRX0_INT (1 << 0) 374 375/* possible flags for register TXRXQ_PCNT */ 376#define RT2860_RX0Q_PCNT_MASK 0xff000000 377#define RT2860_TX2Q_PCNT_MASK 0x00ff0000 378#define RT2860_TX1Q_PCNT_MASK 0x0000ff00 379#define RT2860_TX0Q_PCNT_MASK 0x000000ff 380 381/* possible flags for register CAP_CTRL */ 382#define RT2860_CAP_ADC_FEQ (1U << 31) 383#define RT2860_CAP_START (1 << 30) 384#define RT2860_MAN_TRIG (1 << 29) 385#define RT2860_TRIG_OFFSET_SHIFT 16 386#define RT2860_START_ADDR_SHIFT 0 387 388/* possible flags for register RF_CSR_CFG */ 389#define RT3070_RF_KICK (1 << 17) 390#define RT3070_RF_WRITE (1 << 16) 391 392/* possible flags for register EFUSE_CTRL */ 393#define RT3070_SEL_EFUSE (1U << 31) 394#define RT3070_EFSROM_KICK (1 << 30) 395#define RT3070_EFSROM_AIN_MASK 0x03ff0000 396#define RT3070_EFSROM_AIN_SHIFT 16 397#define RT3070_EFSROM_MODE_MASK 0x000000c0 398#define RT3070_EFUSE_AOUT_MASK 0x0000003f 399 400/* possible flags for register MAC_SYS_CTRL */ 401#define RT2860_RX_TS_EN (1 << 7) 402#define RT2860_WLAN_HALT_EN (1 << 6) 403#define RT2860_PBF_LOOP_EN (1 << 5) 404#define RT2860_CONT_TX_TEST (1 << 4) 405#define RT2860_MAC_RX_EN (1 << 3) 406#define RT2860_MAC_TX_EN (1 << 2) 407#define RT2860_BBP_HRST (1 << 1) 408#define RT2860_MAC_SRST (1 << 0) 409 410/* possible flags for register MAC_BSSID_DW1 */ 411#define RT2860_MULTI_BCN_NUM_SHIFT 18 412#define RT2860_MULTI_BSSID_MODE_SHIFT 16 413 414/* possible flags for register MAX_LEN_CFG */ 415#define RT2860_MIN_MPDU_LEN_SHIFT 16 416#define RT2860_MAX_PSDU_LEN_SHIFT 12 417#define RT2860_MAX_PSDU_LEN8K 0 418#define RT2860_MAX_PSDU_LEN16K 1 419#define RT2860_MAX_PSDU_LEN32K 2 420#define RT2860_MAX_PSDU_LEN64K 3 421#define RT2860_MAX_MPDU_LEN_SHIFT 0 422 423/* possible flags for registers BBP_CSR_CFG/H2M_BBPAGENT */ 424#define RT2860_BBP_RW_PARALLEL (1 << 19) 425#define RT2860_BBP_PAR_DUR_112_5 (1 << 18) 426#define RT2860_BBP_CSR_KICK (1 << 17) 427#define RT2860_BBP_CSR_READ (1 << 16) 428#define RT2860_BBP_ADDR_SHIFT 8 429#define RT2860_BBP_DATA_SHIFT 0 430 431/* possible flags for register RF_CSR_CFG0 */ 432#define RT2860_RF_REG_CTRL (1U << 31) 433#define RT2860_RF_LE_SEL1 (1 << 30) 434#define RT2860_RF_LE_STBY (1 << 29) 435#define RT2860_RF_REG_WIDTH_SHIFT 24 436#define RT2860_RF_REG_0_SHIFT 0 437 438/* possible flags for register RF_CSR_CFG1 */ 439#define RT2860_RF_DUR_5 (1 << 24) 440#define RT2860_RF_REG_1_SHIFT 0 441 442/* possible flags for register LED_CFG */ 443#define RT2860_LED_POL (1 << 30) 444#define RT2860_Y_LED_MODE_SHIFT 28 445#define RT2860_G_LED_MODE_SHIFT 26 446#define RT2860_R_LED_MODE_SHIFT 24 447#define RT2860_LED_MODE_OFF 0 448#define RT2860_LED_MODE_BLINK_TX 1 449#define RT2860_LED_MODE_SLOW_BLINK 2 450#define RT2860_LED_MODE_ON 3 451#define RT2860_SLOW_BLK_TIME_SHIFT 16 452#define RT2860_LED_OFF_TIME_SHIFT 8 453#define RT2860_LED_ON_TIME_SHIFT 0 454 455/* possible flags for register XIFS_TIME_CFG */ 456#define RT2860_BB_RXEND_EN (1 << 29) 457#define RT2860_EIFS_TIME_SHIFT 20 458#define RT2860_OFDM_XIFS_TIME_SHIFT 16 459#define RT2860_OFDM_SIFS_TIME_SHIFT 8 460#define RT2860_CCK_SIFS_TIME_SHIFT 0 461 462/* possible flags for register BKOFF_SLOT_CFG */ 463#define RT2860_CC_DELAY_TIME_SHIFT 8 464#define RT2860_SLOT_TIME 0 465 466/* possible flags for register NAV_TIME_CFG */ 467#define RT2860_NAV_UPD (1U << 31) 468#define RT2860_NAV_UPD_VAL_SHIFT 16 469#define RT2860_NAV_CLR_EN (1 << 15) 470#define RT2860_NAV_TIMER_SHIFT 0 471 472/* possible flags for register CH_TIME_CFG */ 473#define RT2860_EIFS_AS_CH_BUSY (1 << 4) 474#define RT2860_NAV_AS_CH_BUSY (1 << 3) 475#define RT2860_RX_AS_CH_BUSY (1 << 2) 476#define RT2860_TX_AS_CH_BUSY (1 << 1) 477#define RT2860_CH_STA_TIMER_EN (1 << 0) 478 479/* possible values for register BCN_TIME_CFG */ 480#define RT2860_TSF_INS_COMP_SHIFT 24 481#define RT2860_BCN_TX_EN (1 << 20) 482#define RT2860_TBTT_TIMER_EN (1 << 19) 483#define RT2860_TSF_SYNC_MODE_SHIFT 17 484#define RT2860_TSF_SYNC_MODE_DIS 0 485#define RT2860_TSF_SYNC_MODE_STA 1 486#define RT2860_TSF_SYNC_MODE_IBSS 2 487#define RT2860_TSF_SYNC_MODE_HOSTAP 3 488#define RT2860_TSF_TIMER_EN (1 << 16) 489#define RT2860_BCN_INTVAL_SHIFT 0 490 491/* possible flags for register TBTT_SYNC_CFG */ 492#define RT2860_BCN_CWMIN_SHIFT 20 493#define RT2860_BCN_AIFSN_SHIFT 16 494#define RT2860_BCN_EXP_WIN_SHIFT 8 495#define RT2860_TBTT_ADJUST_SHIFT 0 496 497/* possible flags for register INT_TIMER_CFG */ 498#define RT2860_GP_TIMER_SHIFT 16 499#define RT2860_PRE_TBTT_TIMER_SHIFT 0 500 501/* possible flags for register INT_TIMER_EN */ 502#define RT2860_GP_TIMER_EN (1 << 1) 503#define RT2860_PRE_TBTT_INT_EN (1 << 0) 504 505/* possible flags for register MAC_STATUS_REG */ 506#define RT2860_RX_STATUS_BUSY (1 << 1) 507#define RT2860_TX_STATUS_BUSY (1 << 0) 508 509/* possible flags for register PWR_PIN_CFG */ 510#define RT2860_IO_ADDA_PD (1 << 3) 511#define RT2860_IO_PLL_PD (1 << 2) 512#define RT2860_IO_RA_PE (1 << 1) 513#define RT2860_IO_RF_PE (1 << 0) 514 515/* possible flags for register AUTO_WAKEUP_CFG */ 516#define RT2860_AUTO_WAKEUP_EN (1 << 15) 517#define RT2860_SLEEP_TBTT_NUM_SHIFT 8 518#define RT2860_WAKEUP_LEAD_TIME_SHIFT 0 519 520/* possible flags for register TX_PIN_CFG */ 521#define RT3593_LNA_PE_G2_POL (1U << 31) 522#define RT3593_LNA_PE_A2_POL (1 << 30) 523#define RT3593_LNA_PE_G2_EN (1 << 29) 524#define RT3593_LNA_PE_A2_EN (1 << 28) 525#define RT3593_LNA_PE2_EN (RT3593_LNA_PE_A2_EN | RT3593_LNA_PE_G2_EN) 526#define RT3593_PA_PE_G2_POL (1 << 27) 527#define RT3593_PA_PE_A2_POL (1 << 26) 528#define RT3593_PA_PE_G2_EN (1 << 25) 529#define RT3593_PA_PE_A2_EN (1 << 24) 530#define RT2860_TRSW_POL (1 << 19) 531#define RT2860_TRSW_EN (1 << 18) 532#define RT2860_RFTR_POL (1 << 17) 533#define RT2860_RFTR_EN (1 << 16) 534#define RT2860_LNA_PE_G1_POL (1 << 15) 535#define RT2860_LNA_PE_A1_POL (1 << 14) 536#define RT2860_LNA_PE_G0_POL (1 << 13) 537#define RT2860_LNA_PE_A0_POL (1 << 12) 538#define RT2860_LNA_PE_G1_EN (1 << 11) 539#define RT2860_LNA_PE_A1_EN (1 << 10) 540#define RT2860_LNA_PE1_EN (RT2860_LNA_PE_A1_EN | RT2860_LNA_PE_G1_EN) 541#define RT2860_LNA_PE_G0_EN (1 << 9) 542#define RT2860_LNA_PE_A0_EN (1 << 8) 543#define RT2860_LNA_PE0_EN (RT2860_LNA_PE_A0_EN | RT2860_LNA_PE_G0_EN) 544#define RT2860_PA_PE_G1_POL (1 << 7) 545#define RT2860_PA_PE_A1_POL (1 << 6) 546#define RT2860_PA_PE_G0_POL (1 << 5) 547#define RT2860_PA_PE_A0_POL (1 << 4) 548#define RT2860_PA_PE_G1_EN (1 << 3) 549#define RT2860_PA_PE_A1_EN (1 << 2) 550#define RT2860_PA_PE_G0_EN (1 << 1) 551#define RT2860_PA_PE_A0_EN (1 << 0) 552 553/* possible flags for register TX_BAND_CFG */ 554#define RT2860_5G_BAND_SEL_N (1 << 2) 555#define RT2860_5G_BAND_SEL_P (1 << 1) 556#define RT2860_TX_BAND_SEL (1 << 0) 557 558/* possible flags for register TX_SW_CFG0 */ 559#define RT2860_DLY_RFTR_EN_SHIFT 24 560#define RT2860_DLY_TRSW_EN_SHIFT 16 561#define RT2860_DLY_PAPE_EN_SHIFT 8 562#define RT2860_DLY_TXPE_EN_SHIFT 0 563 564/* possible flags for register TX_SW_CFG1 */ 565#define RT2860_DLY_RFTR_DIS_SHIFT 16 566#define RT2860_DLY_TRSW_DIS_SHIFT 8 567#define RT2860_DLY_PAPE_DIS SHIFT 0 568 569/* possible flags for register TX_SW_CFG2 */ 570#define RT2860_DLY_LNA_EN_SHIFT 24 571#define RT2860_DLY_LNA_DIS_SHIFT 16 572#define RT2860_DLY_DAC_EN_SHIFT 8 573#define RT2860_DLY_DAC_DIS_SHIFT 0 574 575/* possible flags for register TXOP_THRES_CFG */ 576#define RT2860_TXOP_REM_THRES_SHIFT 24 577#define RT2860_CF_END_THRES_SHIFT 16 578#define RT2860_RDG_IN_THRES 8 579#define RT2860_RDG_OUT_THRES 0 580 581/* possible flags for register TXOP_CTRL_CFG */ 582#define RT2860_EXT_CW_MIN_SHIFT 16 583#define RT2860_EXT_CCA_DLY_SHIFT 8 584#define RT2860_EXT_CCA_EN (1 << 7) 585#define RT2860_LSIG_TXOP_EN (1 << 6) 586#define RT2860_TXOP_TRUN_EN_MIMOPS (1 << 4) 587#define RT2860_TXOP_TRUN_EN_TXOP (1 << 3) 588#define RT2860_TXOP_TRUN_EN_RATE (1 << 2) 589#define RT2860_TXOP_TRUN_EN_AC (1 << 1) 590#define RT2860_TXOP_TRUN_EN_TIMEOUT (1 << 0) 591 592/* possible flags for register TX_RTS_CFG */ 593#define RT2860_RTS_FBK_EN (1 << 24) 594#define RT2860_RTS_THRES_SHIFT 8 595#define RT2860_RTS_RTY_LIMIT_SHIFT 0 596 597/* possible flags for register TX_TIMEOUT_CFG */ 598#define RT2860_TXOP_TIMEOUT_SHIFT 16 599#define RT2860_RX_ACK_TIMEOUT_SHIFT 8 600#define RT2860_MPDU_LIFE_TIME_SHIFT 4 601 602/* possible flags for register TX_RTY_CFG */ 603#define RT2860_TX_AUTOFB_EN (1 << 30) 604#define RT2860_AGG_RTY_MODE_TIMER (1 << 29) 605#define RT2860_NAG_RTY_MODE_TIMER (1 << 28) 606#define RT2860_LONG_RTY_THRES_SHIFT 16 607#define RT2860_LONG_RTY_LIMIT_SHIFT 8 608#define RT2860_SHORT_RTY_LIMIT_SHIFT 0 609 610/* possible flags for register TX_LINK_CFG */ 611#define RT2860_REMOTE_MFS_SHIFT 24 612#define RT2860_REMOTE_MFB_SHIFT 16 613#define RT2860_TX_CFACK_EN (1 << 12) 614#define RT2860_TX_RDG_EN (1 << 11) 615#define RT2860_TX_MRQ_EN (1 << 10) 616#define RT2860_REMOTE_UMFS_EN (1 << 9) 617#define RT2860_TX_MFB_EN (1 << 8) 618#define RT2860_REMOTE_MFB_LT_SHIFT 0 619 620/* possible flags for registers *_PROT_CFG */ 621#define RT2860_RTSTH_EN (1 << 26) 622#define RT2860_TXOP_ALLOW_GF40 (1 << 25) 623#define RT2860_TXOP_ALLOW_GF20 (1 << 24) 624#define RT2860_TXOP_ALLOW_MM40 (1 << 23) 625#define RT2860_TXOP_ALLOW_MM20 (1 << 22) 626#define RT2860_TXOP_ALLOW_OFDM (1 << 21) 627#define RT2860_TXOP_ALLOW_CCK (1 << 20) 628#define RT2860_TXOP_ALLOW_ALL (0x3f << 20) 629#define RT2860_PROT_NAV_SHORT (1 << 18) 630#define RT2860_PROT_NAV_LONG (2 << 18) 631#define RT2860_PROT_CTRL_RTS_CTS (1 << 16) 632#define RT2860_PROT_CTRL_CTS (2 << 16) 633 634/* possible flags for registers EXP_{CTS,ACK}_TIME */ 635#define RT2860_EXP_OFDM_TIME_SHIFT 16 636#define RT2860_EXP_CCK_TIME_SHIFT 0 637 638/* possible flags for register RX_FILTR_CFG */ 639#define RT2860_DROP_CTRL_RSV (1 << 16) 640#define RT2860_DROP_BAR (1 << 15) 641#define RT2860_DROP_BA (1 << 14) 642#define RT2860_DROP_PSPOLL (1 << 13) 643#define RT2860_DROP_RTS (1 << 12) 644#define RT2860_DROP_CTS (1 << 11) 645#define RT2860_DROP_ACK (1 << 10) 646#define RT2860_DROP_CFEND (1 << 9) 647#define RT2860_DROP_CFACK (1 << 8) 648#define RT2860_DROP_DUPL (1 << 7) 649#define RT2860_DROP_BC (1 << 6) 650#define RT2860_DROP_MC (1 << 5) 651#define RT2860_DROP_VER_ERR (1 << 4) 652#define RT2860_DROP_NOT_MYBSS (1 << 3) 653#define RT2860_DROP_UC_NOME (1 << 2) 654#define RT2860_DROP_PHY_ERR (1 << 1) 655#define RT2860_DROP_CRC_ERR (1 << 0) 656 657/* possible flags for register AUTO_RSP_CFG */ 658#define RT2860_CTRL_PWR_BIT (1 << 7) 659#define RT2860_BAC_ACK_POLICY (1 << 6) 660#define RT2860_CCK_SHORT_EN (1 << 4) 661#define RT2860_CTS_40M_REF_EN (1 << 3) 662#define RT2860_CTS_40M_MODE_EN (1 << 2) 663#define RT2860_BAC_ACKPOLICY_EN (1 << 1) 664#define RT2860_AUTO_RSP_EN (1 << 0) 665 666/* possible flags for register SIFS_COST_CFG */ 667#define RT2860_OFDM_SIFS_COST_SHIFT 8 668#define RT2860_CCK_SIFS_COST_SHIFT 0 669 670/* possible flags for register TXOP_HLDR_ET */ 671#define RT2860_TXOP_ETM1_EN (1 << 25) 672#define RT2860_TXOP_ETM0_EN (1 << 24) 673#define RT2860_TXOP_ETM_THRES_SHIFT 16 674#define RT2860_TXOP_ETO_EN (1 << 8) 675#define RT2860_TXOP_ETO_THRES_SHIFT 1 676#define RT2860_PER_RX_RST_EN (1 << 0) 677 678/* possible flags for register TX_STAT_FIFO */ 679#define RT2860_TXQ_MCS_SHIFT 16 680#define RT2860_TXQ_WCID_SHIFT 8 681#define RT2860_TXQ_ACKREQ (1 << 7) 682#define RT2860_TXQ_AGG (1 << 6) 683#define RT2860_TXQ_OK (1 << 5) 684#define RT2860_TXQ_PID_SHIFT 1 685#define RT2860_TXQ_VLD (1 << 0) 686 687/* possible flags for register WCID_ATTR */ 688#define RT2860_MODE_NOSEC 0 689#define RT2860_MODE_WEP40 1 690#define RT2860_MODE_WEP104 2 691#define RT2860_MODE_TKIP 3 692#define RT2860_MODE_AES_CCMP 4 693#define RT2860_MODE_CKIP40 5 694#define RT2860_MODE_CKIP104 6 695#define RT2860_MODE_CKIP128 7 696#define RT2860_RX_PKEY_EN (1 << 0) 697 698/* possible flags for register H2M_MAILBOX */ 699#define RT2860_H2M_BUSY (1 << 24) 700#define RT2860_TOKEN_NO_INTR 0xff 701 702 703/* possible flags for MCU command RT2860_MCU_CMD_LEDS */ 704#define RT2860_LED_RADIO (1 << 13) 705#define RT2860_LED_LINK_2GHZ (1 << 14) 706#define RT2860_LED_LINK_5GHZ (1 << 15) 707 708 709/* possible flags for RT3020 RF register 1 */ 710#define RT3070_RF_BLOCK (1 << 0) 711#define RT3070_PLL_PD (1 << 1) 712#define RT3070_RX0_PD (1 << 2) 713#define RT3070_TX0_PD (1 << 3) 714#define RT3070_RX1_PD (1 << 4) 715#define RT3070_TX1_PD (1 << 5) 716#define RT3070_RX2_PD (1 << 6) 717#define RT3070_TX2_PD (1 << 7) 718 719/* possible flags for RT3020 RF register 7 */ 720#define RT3070_TUNE (1 << 0) 721 722/* possible flags for RT3020 RF register 15 */ 723#define RT3070_TX_LO2 (1 << 3) 724 725/* possible flags for RT3020 RF register 17 */ 726#define RT3070_TX_LO1 (1 << 3) 727 728/* possible flags for RT3020 RF register 20 */ 729#define RT3070_RX_LO1 (1 << 3) 730 731/* possible flags for RT3020 RF register 21 */ 732#define RT3070_RX_LO2 (1 << 3) 733#define RT3070_RX_CTB (1 << 7) 734 735/* possible flags for RT3020 RF register 22 */ 736#define RT3070_BB_LOOPBACK (1 << 0) 737 738/* possible flags for RT3053 RF register 1 */ 739#define RT3593_VCO (1 << 0) 740 741/* possible flags for RT3053 RF register 2 */ 742#define RT3593_RESCAL (1 << 7) 743 744/* possible flags for RT3053 RF register 3 */ 745#define RT3593_VCOCAL (1 << 7) 746 747/* possible flags for RT3053 RF register 6 */ 748#define RT3593_VCO_IC (1 << 6) 749 750/* possible flags for RT3053 RF register 20 */ 751#define RT3593_LDO_PLL_VC_MASK 0x0e 752#define RT3593_LDO_RF_VC_MASK 0xe0 753 754/* possible flags for RT3053 RF register 22 */ 755#define RT3593_CP_IC_MASK 0xe0 756#define RT3593_CP_IC_SHIFT 5 757 758/* possible flags for RT3053 RF register 46 */ 759#define RT3593_RX_CTB (1 << 5) 760 761#define RT3090_DEF_LNA 10 762 763/* possible flags for RT5390 RF register 38 */ 764#define RT5390_RX_LO1 (1 << 5) 765 766/* possible flags for RT5390 RF register 39 */ 767#define RT5390_RX_LO2 (1 << 7) 768 769/* possible flags for RT5390 RF register 42 */ 770#define RT5390_RX_CTB (1 << 6) 771 772/* possible flags for RT5390 BBP register 4 */ 773#define RT5390_MAC_IF_CTRL (1 << 6) 774 775/* possible flags for RT5390 BBP register 105 */ 776#define RT5390_MLD (1 << 2) 777#define RT5390_SIG_MODULATION (1 << 3) 778 779/* RT2860 TX descriptor */ 780struct rt2860_txd { 781 uint32_t sdp0; /* Segment Data Pointer 0 */ 782 uint16_t sdl1; /* Segment Data Length 1 */ 783#define RT2860_TX_BURST (1 << 15) 784#define RT2860_TX_LS1 (1 << 14) /* SDP1 is the last segment */ 785 786 uint16_t sdl0; /* Segment Data Length 0 */ 787#define RT2860_TX_DDONE (1 << 15) 788#define RT2860_TX_LS0 (1 << 14) /* SDP0 is the last segment */ 789 790 uint32_t sdp1; /* Segment Data Pointer 1 */ 791 uint8_t reserved[3]; 792 uint8_t flags; 793#define RT2860_TX_QSEL_SHIFT 1 794#define RT2860_TX_QSEL_MGMT (0 << 1) 795#define RT2860_TX_QSEL_HCCA (1 << 1) 796#define RT2860_TX_QSEL_EDCA (2 << 1) 797#define RT2860_TX_WIV (1 << 0) 798} __packed; 799 800/* RT2870 TX descriptor */ 801struct rt2870_txd { 802 uint16_t len; 803 uint8_t pad; 804 uint8_t flags; 805} __packed; 806 807/* TX Wireless Information */ 808struct rt2860_txwi { 809 uint8_t flags; 810#define RT2860_TX_MPDU_DSITY_SHIFT 5 811#define RT2860_TX_AMPDU (1 << 4) 812#define RT2860_TX_TS (1 << 3) 813#define RT2860_TX_CFACK (1 << 2) 814#define RT2860_TX_MMPS (1 << 1) 815#define RT2860_TX_FRAG (1 << 0) 816 817 uint8_t txop; 818#define RT2860_TX_TXOP_HT 0 819#define RT2860_TX_TXOP_PIFS 1 820#define RT2860_TX_TXOP_SIFS 2 821#define RT2860_TX_TXOP_BACKOFF 3 822 823 uint16_t phy; 824#define RT2860_PHY_MODE 0xc000 825#define RT2860_PHY_CCK (0 << 14) 826#define RT2860_PHY_OFDM (1 << 14) 827#define RT2860_PHY_HT (2 << 14) 828#define RT2860_PHY_HT_GF (3 << 14) 829#define RT2860_PHY_SGI (1 << 8) 830#define RT2860_PHY_BW40 (1 << 7) 831#define RT2860_PHY_MCS 0x7f 832#define RT2860_PHY_SHPRE (1 << 3) 833 834 uint8_t xflags; 835#define RT2860_TX_BAWINSIZE_SHIFT 2 836#define RT2860_TX_NSEQ (1 << 1) 837#define RT2860_TX_ACK (1 << 0) 838 839 uint8_t wcid; /* Wireless Client ID */ 840 uint16_t len; 841#define RT2860_TX_PID_SHIFT 12 842 843 uint32_t iv; 844 uint32_t eiv; 845} __packed; 846 847/* RT2860 RX descriptor */ 848struct rt2860_rxd { 849 uint32_t sdp0; 850 uint16_t sdl1; /* unused */ 851 uint16_t sdl0; 852#define RT2860_RX_DDONE (1 << 15) 853#define RT2860_RX_LS0 (1 << 14) 854 855 uint32_t sdp1; /* unused */ 856 uint32_t flags; 857#define RT2860_RX_DEC (1 << 16) 858#define RT2860_RX_AMPDU (1 << 15) 859#define RT2860_RX_L2PAD (1 << 14) 860#define RT2860_RX_RSSI (1 << 13) 861#define RT2860_RX_HTC (1 << 12) 862#define RT2860_RX_AMSDU (1 << 11) 863#define RT2860_RX_MICERR (1 << 10) 864#define RT2860_RX_ICVERR (1 << 9) 865#define RT2860_RX_CRCERR (1 << 8) 866#define RT2860_RX_MYBSS (1 << 7) 867#define RT2860_RX_BC (1 << 6) 868#define RT2860_RX_MC (1 << 5) 869#define RT2860_RX_UC2ME (1 << 4) 870#define RT2860_RX_FRAG (1 << 3) 871#define RT2860_RX_NULL (1 << 2) 872#define RT2860_RX_DATA (1 << 1) 873#define RT2860_RX_BA (1 << 0) 874} __packed; 875 876/* RT2870 RX descriptor */ 877struct rt2870_rxd { 878 /* single 32-bit field */ 879 uint32_t flags; 880} __packed; 881 882/* RX Wireless Information */ 883struct rt2860_rxwi { 884 uint8_t wcid; 885 uint8_t keyidx; 886#define RT2860_RX_UDF_SHIFT 5 887#define RT2860_RX_BSS_IDX_SHIFT 2 888 889 uint16_t len; 890#define RT2860_RX_TID_SHIFT 12 891 892 uint16_t seq; 893 uint16_t phy; 894 uint8_t rssi[3]; 895 uint8_t reserved1; 896 uint8_t snr[2]; 897 uint16_t reserved2; 898} __packed; 899 900 901/* first DMA segment contains TXWI + 802.11 header + 32-bit padding */ 902#define RT2860_TXWI_DMASZ \ 903 (sizeof (struct rt2860_txwi) + \ 904 sizeof (struct ieee80211_frame) + 6 + \ 905 sizeof (uint16_t)) 906 907#define RT2860_RF1 0 908#define RT2860_RF2 2 909#define RT2860_RF3 1 910#define RT2860_RF4 3 911 912#define RT2860_RF_2820 0x0001 /* 2T3R */ 913#define RT2860_RF_2850 0x0002 /* dual-band 2T3R */ 914#define RT2860_RF_2720 0x0003 /* 1T2R */ 915#define RT2860_RF_2750 0x0004 /* dual-band 1T2R */ 916#define RT3070_RF_3020 0x0005 /* 1T1R */ 917#define RT3070_RF_2020 0x0006 /* b/g */ 918#define RT3070_RF_3021 0x0007 /* 1T2R */ 919#define RT3070_RF_3022 0x0008 /* 2T2R */ 920#define RT3070_RF_3052 0x0009 /* dual-band 2T2R */ 921#define RT3070_RF_3320 0x000b /* 1T1R */ 922#define RT3070_RF_3053 0x000d /* dual-band 3T3R */ 923#define RT5390_RF_5360 0x5360 /* 1T1R */ 924#define RT5390_RF_5390 0x5390 /* 1T1R */ 925 926/* USB commands for RT2870 only */ 927#define RT2870_RESET 1 928#define RT2870_WRITE_2 2 929#define RT2870_WRITE_REGION_1 6 930#define RT2870_READ_REGION_1 7 931#define RT2870_EEPROM_READ 9 932 933#define RT2860_EEPROM_DELAY 1 /* minimum hold time (microsecond) */ 934 935#define RT2860_EEPROM_CHIPID 0x00 936#define RT2860_EEPROM_VERSION 0x01 937#define RT2860_EEPROM_MAC01 0x02 938#define RT2860_EEPROM_MAC23 0x03 939#define RT2860_EEPROM_MAC45 0x04 940#define RT2860_EEPROM_PCIE_PSLEVEL 0x11 941#define RT2860_EEPROM_REV 0x12 942#define RT2860_EEPROM_ANTENNA 0x1a 943#define RT2860_EEPROM_CONFIG 0x1b 944#define RT2860_EEPROM_COUNTRY 0x1c 945#define RT2860_EEPROM_FREQ_LEDS 0x1d 946#define RT2860_EEPROM_LED1 0x1e 947#define RT2860_EEPROM_LED2 0x1f 948#define RT2860_EEPROM_LED3 0x20 949#define RT2860_EEPROM_LNA 0x22 950#define RT2860_EEPROM_RSSI1_2GHZ 0x23 951#define RT2860_EEPROM_RSSI2_2GHZ 0x24 952#define RT2860_EEPROM_RSSI1_5GHZ 0x25 953#define RT2860_EEPROM_RSSI2_5GHZ 0x26 954#define RT2860_EEPROM_DELTAPWR 0x28 955#define RT2860_EEPROM_PWR2GHZ_BASE1 0x29 956#define RT2860_EEPROM_PWR2GHZ_BASE2 0x30 957#define RT2860_EEPROM_TSSI1_2GHZ 0x37 958#define RT2860_EEPROM_TSSI2_2GHZ 0x38 959#define RT2860_EEPROM_TSSI3_2GHZ 0x39 960#define RT2860_EEPROM_TSSI4_2GHZ 0x3a 961#define RT2860_EEPROM_TSSI5_2GHZ 0x3b 962#define RT2860_EEPROM_PWR5GHZ_BASE1 0x3c 963#define RT2860_EEPROM_PWR5GHZ_BASE2 0x53 964#define RT2860_EEPROM_TSSI1_5GHZ 0x6a 965#define RT2860_EEPROM_TSSI2_5GHZ 0x6b 966#define RT2860_EEPROM_TSSI3_5GHZ 0x6c 967#define RT2860_EEPROM_TSSI4_5GHZ 0x6d 968#define RT2860_EEPROM_TSSI5_5GHZ 0x6e 969#define RT2860_EEPROM_RPWR 0x6f 970#define RT2860_EEPROM_BBP_BASE 0x78 971#define RT3071_EEPROM_RF_BASE 0x82 972 973#define RT2860_RIDX_CCK1 0 974#define RT2860_RIDX_CCK11 3 975#define RT2860_RIDX_OFDM6 4 976#define RT2860_RIDX_MAX 11 977static const struct rt2860_rate { 978 uint8_t rate; 979 uint8_t mcs; 980 enum ieee80211_phytype phy; 981 uint8_t ctl_ridx; 982 uint16_t sp_ack_dur; 983 uint16_t lp_ack_dur; 984} rt2860_rates[] = { 985 { 2, 0, IEEE80211_T_DS, 0, 314, 314 }, 986 { 4, 1, IEEE80211_T_DS, 1, 258, 162 }, 987 { 11, 2, IEEE80211_T_DS, 2, 223, 127 }, 988 { 22, 3, IEEE80211_T_DS, 3, 213, 117 }, 989 { 12, 0, IEEE80211_T_OFDM, 4, 60, 60 }, 990 { 18, 1, IEEE80211_T_OFDM, 4, 52, 52 }, 991 { 24, 2, IEEE80211_T_OFDM, 6, 48, 48 }, 992 { 36, 3, IEEE80211_T_OFDM, 6, 44, 44 }, 993 { 48, 4, IEEE80211_T_OFDM, 8, 44, 44 }, 994 { 72, 5, IEEE80211_T_OFDM, 8, 40, 40 }, 995 { 96, 6, IEEE80211_T_OFDM, 8, 40, 40 }, 996 { 108, 7, IEEE80211_T_OFDM, 8, 40, 40 } 997}; 998 999/* 1000 * Control and status registers access macros. 1001 */ 1002#define RAL_READ(sc, reg) \ 1003 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 1004 1005#define RAL_WRITE(sc, reg, val) \ 1006 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 1007 1008#define RAL_BARRIER_WRITE(sc) \ 1009 bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \ 1010 BUS_SPACE_BARRIER_WRITE) 1011 1012#define RAL_BARRIER_READ_WRITE(sc) \ 1013 bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \ 1014 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 1015 1016#define RAL_WRITE_REGION_1(sc, offset, datap, count) \ 1017 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \ 1018 (datap), (count)) 1019 1020#define RAL_SET_REGION_4(sc, offset, val, count) \ 1021 bus_space_set_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 1022 (val), (count)) 1023 1024/* 1025 * EEPROM access macro. 1026 */ 1027#define RT2860_EEPROM_CTL(sc, val) do { \ 1028 RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \ 1029 RAL_BARRIER_READ_WRITE((sc)); \ 1030 DELAY(RT2860_EEPROM_DELAY); \ 1031} while (/* CONSTCOND */0) 1032 1033/* 1034 * Default values for MAC registers; values taken from the reference driver. 1035 */ 1036#define RT2860_DEF_MAC \ 1037 { RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \ 1038 { RT2860_BCN_OFFSET1, 0x6f77d0c8 }, \ 1039 { RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \ 1040 { RT2860_HT_BASIC_RATE, 0x00008003 }, \ 1041 { RT2860_MAC_SYS_CTRL, 0x00000000 }, \ 1042 { RT2860_RX_FILTR_CFG, 0x00017f97 }, \ 1043 { RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \ 1044 { RT2860_TX_SW_CFG0, 0x00000000 }, \ 1045 { RT2860_TX_SW_CFG1, 0x00080606 }, \ 1046 { RT2860_TX_LINK_CFG, 0x00001020 }, \ 1047 { RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \ 1048 { RT2860_MAX_LEN_CFG, 0x00001f00 }, \ 1049 { RT2860_LED_CFG, 0x7f031e46 }, \ 1050 { RT2860_WMM_AIFSN_CFG, 0x00002273 }, \ 1051 { RT2860_WMM_CWMIN_CFG, 0x00002344 }, \ 1052 { RT2860_WMM_CWMAX_CFG, 0x000034aa }, \ 1053 { RT2860_MAX_PCNT, 0x1f3fbf9f }, \ 1054 { RT2860_TX_RTY_CFG, 0x47d01f0f }, \ 1055 { RT2860_AUTO_RSP_CFG, 0x00000013 }, \ 1056 { RT2860_CCK_PROT_CFG, 0x05740003 }, \ 1057 { RT2860_OFDM_PROT_CFG, 0x05740003 }, \ 1058 { RT2860_GF20_PROT_CFG, 0x01744004 }, \ 1059 { RT2860_GF40_PROT_CFG, 0x03f44084 }, \ 1060 { RT2860_MM20_PROT_CFG, 0x01744004 }, \ 1061 { RT2860_MM40_PROT_CFG, 0x03f54084 }, \ 1062 { RT2860_TXOP_CTRL_CFG, 0x0000583f }, \ 1063 { RT2860_TX_RTS_CFG, 0x00092b20 }, \ 1064 { RT2860_EXP_ACK_TIME, 0x002400ca }, \ 1065 { RT2860_TXOP_HLDR_ET, 0x00000002 }, \ 1066 { RT2860_XIFS_TIME_CFG, 0x33a41010 }, \ 1067 { RT2860_PWR_PIN_CFG, 0x00000003 } 1068 1069/* 1070 * Default values for BBP registers; values taken from the reference driver. 1071 */ 1072#define RT2860_DEF_BBP \ 1073 { 65, 0x2c }, \ 1074 { 66, 0x38 }, \ 1075 { 68, 0x0b }, \ 1076 { 69, 0x12 }, \ 1077 { 70, 0x0a }, \ 1078 { 73, 0x10 }, \ 1079 { 81, 0x37 }, \ 1080 { 82, 0x62 }, \ 1081 { 83, 0x6a }, \ 1082 { 84, 0x99 }, \ 1083 { 86, 0x00 }, \ 1084 { 91, 0x04 }, \ 1085 { 92, 0x00 }, \ 1086 { 103, 0x00 }, \ 1087 { 105, 0x05 }, \ 1088 { 106, 0x35 } 1089 1090#define RT5390_DEF_BBP \ 1091 { 31, 0x08 }, \ 1092 { 65, 0x2c }, \ 1093 { 66, 0x38 }, \ 1094 { 68, 0x0b }, \ 1095 { 69, 0x12 }, \ 1096 { 70, 0x0a }, \ 1097 { 73, 0x13 }, \ 1098 { 75, 0x46 }, \ 1099 { 76, 0x28 }, \ 1100 { 77, 0x59 }, \ 1101 { 81, 0x37 }, \ 1102 { 82, 0x62 }, \ 1103 { 83, 0x7a }, \ 1104 { 84, 0x19 }, \ 1105 { 86, 0x38 }, \ 1106 { 91, 0x04 }, \ 1107 { 92, 0x02 }, \ 1108 { 103, 0xc0 }, \ 1109 { 104, 0x92 }, \ 1110 { 105, 0x3c }, \ 1111 { 106, 0x03 }, \ 1112 { 128, 0x12 }, \ 1113 1114/* 1115 * Default settings for RF registers; values derived from the reference driver. 1116 */ 1117#define RT2860_RF2850 \ 1118 { 1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 }, \ 1119 { 2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 }, \ 1120 { 3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 }, \ 1121 { 4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 }, \ 1122 { 5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 }, \ 1123 { 6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 }, \ 1124 { 7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 }, \ 1125 { 8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 }, \ 1126 { 9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 }, \ 1127 { 10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 }, \ 1128 { 11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 }, \ 1129 { 12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 }, \ 1130 { 13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 }, \ 1131 { 14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 }, \ 1132 { 36, 0x100bb3, 0x130266, 0x056014, 0x001408 }, \ 1133 { 38, 0x100bb3, 0x130267, 0x056014, 0x001404 }, \ 1134 { 40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 }, \ 1135 { 44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 }, \ 1136 { 46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 }, \ 1137 { 48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 }, \ 1138 { 52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 }, \ 1139 { 54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 }, \ 1140 { 56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 }, \ 1141 { 60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 }, \ 1142 { 62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 }, \ 1143 { 64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 }, \ 1144 { 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 }, \ 1145 { 102, 0x100bb2, 0x1701ac, 0x15e014, 0x001404 }, \ 1146 { 104, 0x100bb2, 0x1701ac, 0x15e014, 0x001408 }, \ 1147 { 108, 0x100bb3, 0x17028c, 0x15e014, 0x001404 }, \ 1148 { 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 }, \ 1149 { 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 }, \ 1150 { 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 }, \ 1151 { 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 }, \ 1152 { 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 }, \ 1153 { 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 }, \ 1154 { 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 }, \ 1155 { 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 }, \ 1156 { 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 }, \ 1157 { 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 }, \ 1158 { 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 }, \ 1159 { 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 }, \ 1160 { 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 }, \ 1161 { 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 }, \ 1162 { 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 }, \ 1163 { 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 }, \ 1164 { 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 }, \ 1165 { 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 }, \ 1166 { 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 }, \ 1167 { 167, 0x100bb1, 0x1300f4, 0x05e014, 0x001407 }, \ 1168 { 169, 0x100bb1, 0x1300f4, 0x05e014, 0x001409 }, \ 1169 { 171, 0x100bb1, 0x1300f5, 0x05e014, 0x001401 }, \ 1170 { 173, 0x100bb1, 0x1300f5, 0x05e014, 0x001403 } 1171 1172#define RT3070_RF3052 \ 1173 { 0xf1, 2, 2 }, \ 1174 { 0xf1, 2, 7 }, \ 1175 { 0xf2, 2, 2 }, \ 1176 { 0xf2, 2, 7 }, \ 1177 { 0xf3, 2, 2 }, \ 1178 { 0xf3, 2, 7 }, \ 1179 { 0xf4, 2, 2 }, \ 1180 { 0xf4, 2, 7 }, \ 1181 { 0xf5, 2, 2 }, \ 1182 { 0xf5, 2, 7 }, \ 1183 { 0xf6, 2, 2 }, \ 1184 { 0xf6, 2, 7 }, \ 1185 { 0xf7, 2, 2 }, \ 1186 { 0xf8, 2, 4 }, \ 1187 { 0x56, 0, 4 }, \ 1188 { 0x56, 0, 6 }, \ 1189 { 0x56, 0, 8 }, \ 1190 { 0x57, 0, 0 }, \ 1191 { 0x57, 0, 2 }, \ 1192 { 0x57, 0, 4 }, \ 1193 { 0x57, 0, 8 }, \ 1194 { 0x57, 0, 10 }, \ 1195 { 0x58, 0, 0 }, \ 1196 { 0x58, 0, 4 }, \ 1197 { 0x58, 0, 6 }, \ 1198 { 0x58, 0, 8 }, \ 1199 { 0x5b, 0, 8 }, \ 1200 { 0x5b, 0, 10 }, \ 1201 { 0x5c, 0, 0 }, \ 1202 { 0x5c, 0, 4 }, \ 1203 { 0x5c, 0, 6 }, \ 1204 { 0x5c, 0, 8 }, \ 1205 { 0x5d, 0, 0 }, \ 1206 { 0x5d, 0, 2 }, \ 1207 { 0x5d, 0, 4 }, \ 1208 { 0x5d, 0, 8 }, \ 1209 { 0x5d, 0, 10 }, \ 1210 { 0x5e, 0, 0 }, \ 1211 { 0x5e, 0, 4 }, \ 1212 { 0x5e, 0, 6 }, \ 1213 { 0x5e, 0, 8 }, \ 1214 { 0x5f, 0, 0 }, \ 1215 { 0x5f, 0, 9 }, \ 1216 { 0x5f, 0, 11 }, \ 1217 { 0x60, 0, 1 }, \ 1218 { 0x60, 0, 5 }, \ 1219 { 0x60, 0, 7 }, \ 1220 { 0x60, 0, 9 }, \ 1221 { 0x61, 0, 1 }, \ 1222 { 0x61, 0, 3 }, \ 1223 { 0x61, 0, 5 }, \ 1224 { 0x61, 0, 7 }, \ 1225 { 0x61, 0, 9 } 1226 1227#define RT3070_DEF_RF \ 1228 { 4, 0x40 }, \ 1229 { 5, 0x03 }, \ 1230 { 6, 0x02 }, \ 1231 { 7, 0x60 }, \ 1232 { 9, 0x0f }, \ 1233 { 10, 0x41 }, \ 1234 { 11, 0x21 }, \ 1235 { 12, 0x7b }, \ 1236 { 14, 0x90 }, \ 1237 { 15, 0x58 }, \ 1238 { 16, 0xb3 }, \ 1239 { 17, 0x92 }, \ 1240 { 18, 0x2c }, \ 1241 { 19, 0x02 }, \ 1242 { 20, 0xba }, \ 1243 { 21, 0xdb }, \ 1244 { 24, 0x16 }, \ 1245 { 25, 0x03 }, \ 1246 { 29, 0x1f } 1247 1248#define RT5390_DEF_RF \ 1249 { 1, 0x0f }, \ 1250 { 2, 0x80 }, \ 1251 { 3, 0x88 }, \ 1252 { 5, 0x10 }, \ 1253 { 6, 0xe0 }, \ 1254 { 7, 0x00 }, \ 1255 { 10, 0x53 }, \ 1256 { 11, 0x4a }, \ 1257 { 12, 0x46 }, \ 1258 { 13, 0x9f }, \ 1259 { 14, 0x00 }, \ 1260 { 15, 0x00 }, \ 1261 { 16, 0x00 }, \ 1262 { 18, 0x03 }, \ 1263 { 19, 0x00 }, \ 1264 { 20, 0x00 }, \ 1265 { 21, 0x00 }, \ 1266 { 22, 0x20 }, \ 1267 { 23, 0x00 }, \ 1268 { 24, 0x00 }, \ 1269 { 25, 0x80 }, \ 1270 { 26, 0x00 }, \ 1271 { 27, 0x09 }, \ 1272 { 28, 0x00 }, \ 1273 { 29, 0x10 }, \ 1274 { 30, 0x10 }, \ 1275 { 31, 0x80 }, \ 1276 { 32, 0x80 }, \ 1277 { 33, 0x00 }, \ 1278 { 34, 0x07 }, \ 1279 { 35, 0x12 }, \ 1280 { 36, 0x00 }, \ 1281 { 37, 0x08 }, \ 1282 { 38, 0x85 }, \ 1283 { 39, 0x1b }, \ 1284 { 40, 0x0b }, \ 1285 { 41, 0xbb }, \ 1286 { 42, 0xd2 }, \ 1287 { 43, 0x9a }, \ 1288 { 44, 0x0e }, \ 1289 { 45, 0xa2 }, \ 1290 { 46, 0x73 }, \ 1291 { 47, 0x00 }, \ 1292 { 48, 0x10 }, \ 1293 { 49, 0x94 }, \ 1294 { 52, 0x38 }, \ 1295 { 53, 0x00 }, \ 1296 { 54, 0x78 }, \ 1297 { 55, 0x23 }, \ 1298 { 56, 0x22 }, \ 1299 { 57, 0x80 }, \ 1300 { 58, 0x7f }, \ 1301 { 59, 0x07 }, \ 1302 { 60, 0x45 }, \ 1303 { 61, 0xd1 }, \ 1304 { 62, 0x00 }, \ 1305 { 63, 0x00 } 1306 1307#define RT5392_DEF_RF \ 1308 { 1, 0x17 }, \ 1309 { 2, 0x80 }, \ 1310 { 3, 0x88 }, \ 1311 { 5, 0x10 }, \ 1312 { 6, 0xe0 }, \ 1313 { 7, 0x00 }, \ 1314 { 10, 0x53 }, \ 1315 { 11, 0x4a }, \ 1316 { 12, 0x46 }, \ 1317 { 13, 0x9f }, \ 1318 { 14, 0x00 }, \ 1319 { 15, 0x00 }, \ 1320 { 16, 0x00 }, \ 1321 { 18, 0x03 }, \ 1322 { 19, 0x4d }, \ 1323 { 20, 0x00 }, \ 1324 { 21, 0x8d }, \ 1325 { 22, 0x20 }, \ 1326 { 23, 0x0b }, \ 1327 { 24, 0x44 }, \ 1328 { 25, 0x80 }, \ 1329 { 26, 0x82 }, \ 1330 { 27, 0x09 }, \ 1331 { 28, 0x00 }, \ 1332 { 29, 0x10 }, \ 1333 { 30, 0x10 }, \ 1334 { 31, 0x80 }, \ 1335 { 32, 0x80 }, \ 1336 { 33, 0xc0 }, \ 1337 { 34, 0x07 }, \ 1338 { 35, 0x12 }, \ 1339 { 36, 0x00 }, \ 1340 { 37, 0x08 }, \ 1341 { 38, 0x89 }, \ 1342 { 39, 0x1b }, \ 1343 { 40, 0x0f }, \ 1344 { 41, 0xbb }, \ 1345 { 42, 0xd5 }, \ 1346 { 43, 0x9b }, \ 1347 { 44, 0x0e }, \ 1348 { 45, 0xa2 }, \ 1349 { 46, 0x73 }, \ 1350 { 47, 0x0c }, \ 1351 { 48, 0x10 }, \ 1352 { 49, 0x94 }, \ 1353 { 50, 0x94 }, \ 1354 { 51, 0x3a }, \ 1355 { 52, 0x48 }, \ 1356 { 53, 0x44 }, \ 1357 { 54, 0x38 }, \ 1358 { 55, 0x43 }, \ 1359 { 56, 0xa1 }, \ 1360 { 57, 0x00 }, \ 1361 { 58, 0x39 }, \ 1362 { 59, 0x07 }, \ 1363 { 60, 0x45 }, \ 1364 { 61, 0x91 }, \ 1365 { 62, 0x39 }, \ 1366 { 63, 0x00 } 1367