rt2661.c revision 300759
1156321Sdamien/* $FreeBSD: head/sys/dev/ral/rt2661.c 300759 2016-05-26 17:06:43Z avos $ */ 2156321Sdamien 3156321Sdamien/*- 4156321Sdamien * Copyright (c) 2006 5156321Sdamien * Damien Bergamini <damien.bergamini@free.fr> 6156321Sdamien * 7156321Sdamien * Permission to use, copy, modify, and distribute this software for any 8156321Sdamien * purpose with or without fee is hereby granted, provided that the above 9156321Sdamien * copyright notice and this permission notice appear in all copies. 10156321Sdamien * 11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18156321Sdamien */ 19156321Sdamien 20156321Sdamien#include <sys/cdefs.h> 21156321Sdamien__FBSDID("$FreeBSD: head/sys/dev/ral/rt2661.c 300759 2016-05-26 17:06:43Z avos $"); 22156321Sdamien 23156321Sdamien/*- 24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 25156321Sdamien * http://www.ralinktech.com/ 26156321Sdamien */ 27156321Sdamien 28156321Sdamien#include <sys/param.h> 29156321Sdamien#include <sys/sysctl.h> 30156321Sdamien#include <sys/sockio.h> 31156321Sdamien#include <sys/mbuf.h> 32156321Sdamien#include <sys/kernel.h> 33156321Sdamien#include <sys/socket.h> 34156321Sdamien#include <sys/systm.h> 35156321Sdamien#include <sys/malloc.h> 36164982Skevlo#include <sys/lock.h> 37164982Skevlo#include <sys/mutex.h> 38156321Sdamien#include <sys/module.h> 39156321Sdamien#include <sys/bus.h> 40156321Sdamien#include <sys/endian.h> 41178354Ssam#include <sys/firmware.h> 42156321Sdamien 43156321Sdamien#include <machine/bus.h> 44156321Sdamien#include <machine/resource.h> 45156321Sdamien#include <sys/rman.h> 46156321Sdamien 47156321Sdamien#include <net/bpf.h> 48156321Sdamien#include <net/if.h> 49257176Sglebius#include <net/if_var.h> 50156321Sdamien#include <net/if_arp.h> 51156321Sdamien#include <net/ethernet.h> 52156321Sdamien#include <net/if_dl.h> 53156321Sdamien#include <net/if_media.h> 54156321Sdamien#include <net/if_types.h> 55156321Sdamien 56156321Sdamien#include <net80211/ieee80211_var.h> 57156321Sdamien#include <net80211/ieee80211_radiotap.h> 58170530Ssam#include <net80211/ieee80211_regdomain.h> 59206358Srpaulo#include <net80211/ieee80211_ratectl.h> 60156321Sdamien 61156321Sdamien#include <netinet/in.h> 62156321Sdamien#include <netinet/in_systm.h> 63156321Sdamien#include <netinet/in_var.h> 64156321Sdamien#include <netinet/ip.h> 65156321Sdamien#include <netinet/if_ether.h> 66156321Sdamien 67156327Ssilby#include <dev/ral/rt2661reg.h> 68156327Ssilby#include <dev/ral/rt2661var.h> 69156321Sdamien 70178354Ssam#define RAL_DEBUG 71156321Sdamien#ifdef RAL_DEBUG 72178354Ssam#define DPRINTF(sc, fmt, ...) do { \ 73178354Ssam if (sc->sc_debug > 0) \ 74178354Ssam printf(fmt, __VA_ARGS__); \ 75178354Ssam} while (0) 76178354Ssam#define DPRINTFN(sc, n, fmt, ...) do { \ 77178354Ssam if (sc->sc_debug >= (n)) \ 78178354Ssam printf(fmt, __VA_ARGS__); \ 79178354Ssam} while (0) 80156321Sdamien#else 81178354Ssam#define DPRINTF(sc, fmt, ...) 82178354Ssam#define DPRINTFN(sc, n, fmt, ...) 83156321Sdamien#endif 84156321Sdamien 85178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 86228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, 87228621Sbschmidt int, const uint8_t [IEEE80211_ADDR_LEN], 88228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 89178354Ssamstatic void rt2661_vap_delete(struct ieee80211vap *); 90156321Sdamienstatic void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 91156321Sdamien int); 92156321Sdamienstatic int rt2661_alloc_tx_ring(struct rt2661_softc *, 93156321Sdamien struct rt2661_tx_ring *, int); 94156321Sdamienstatic void rt2661_reset_tx_ring(struct rt2661_softc *, 95156321Sdamien struct rt2661_tx_ring *); 96156321Sdamienstatic void rt2661_free_tx_ring(struct rt2661_softc *, 97156321Sdamien struct rt2661_tx_ring *); 98156321Sdamienstatic int rt2661_alloc_rx_ring(struct rt2661_softc *, 99156321Sdamien struct rt2661_rx_ring *, int); 100156321Sdamienstatic void rt2661_reset_rx_ring(struct rt2661_softc *, 101156321Sdamien struct rt2661_rx_ring *); 102156321Sdamienstatic void rt2661_free_rx_ring(struct rt2661_softc *, 103156321Sdamien struct rt2661_rx_ring *); 104178354Ssamstatic int rt2661_newstate(struct ieee80211vap *, 105156321Sdamien enum ieee80211_state, int); 106156321Sdamienstatic uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 107156321Sdamienstatic void rt2661_rx_intr(struct rt2661_softc *); 108156321Sdamienstatic void rt2661_tx_intr(struct rt2661_softc *); 109156321Sdamienstatic void rt2661_tx_dma_intr(struct rt2661_softc *, 110156321Sdamien struct rt2661_tx_ring *); 111156321Sdamienstatic void rt2661_mcu_beacon_expire(struct rt2661_softc *); 112156321Sdamienstatic void rt2661_mcu_wakeup(struct rt2661_softc *); 113156321Sdamienstatic void rt2661_mcu_cmd_intr(struct rt2661_softc *); 114170530Ssamstatic void rt2661_scan_start(struct ieee80211com *); 115170530Ssamstatic void rt2661_scan_end(struct ieee80211com *); 116300752Savosstatic void rt2661_getradiocaps(struct ieee80211com *, int, int *, 117300752Savos struct ieee80211_channel[]); 118170530Ssamstatic void rt2661_set_channel(struct ieee80211com *); 119156321Sdamienstatic void rt2661_setup_tx_desc(struct rt2661_softc *, 120156321Sdamien struct rt2661_tx_desc *, uint32_t, uint16_t, int, 121156321Sdamien int, const bus_dma_segment_t *, int, int); 122156321Sdamienstatic int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 123156321Sdamien struct ieee80211_node *, int); 124156321Sdamienstatic int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 125156321Sdamien struct ieee80211_node *); 126287197Sglebiusstatic int rt2661_transmit(struct ieee80211com *, struct mbuf *); 127287197Sglebiusstatic void rt2661_start(struct rt2661_softc *); 128178354Ssamstatic int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 129178354Ssam const struct ieee80211_bpf_params *); 130165352Sbmsstatic void rt2661_watchdog(void *); 131287197Sglebiusstatic void rt2661_parent(struct ieee80211com *); 132156321Sdamienstatic void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 133156321Sdamien uint8_t); 134156321Sdamienstatic uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 135156321Sdamienstatic void rt2661_rf_write(struct rt2661_softc *, uint8_t, 136156321Sdamien uint32_t); 137156321Sdamienstatic int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 138156321Sdamien uint16_t); 139156321Sdamienstatic void rt2661_select_antenna(struct rt2661_softc *); 140156321Sdamienstatic void rt2661_enable_mrr(struct rt2661_softc *); 141156321Sdamienstatic void rt2661_set_txpreamble(struct rt2661_softc *); 142156321Sdamienstatic void rt2661_set_basicrates(struct rt2661_softc *, 143156321Sdamien const struct ieee80211_rateset *); 144156321Sdamienstatic void rt2661_select_band(struct rt2661_softc *, 145156321Sdamien struct ieee80211_channel *); 146156321Sdamienstatic void rt2661_set_chan(struct rt2661_softc *, 147156321Sdamien struct ieee80211_channel *); 148156321Sdamienstatic void rt2661_set_bssid(struct rt2661_softc *, 149156321Sdamien const uint8_t *); 150156321Sdamienstatic void rt2661_set_macaddr(struct rt2661_softc *, 151156321Sdamien const uint8_t *); 152283540Sglebiusstatic void rt2661_update_promisc(struct ieee80211com *); 153156321Sdamienstatic int rt2661_wme_update(struct ieee80211com *) __unused; 154283540Sglebiusstatic void rt2661_update_slot(struct ieee80211com *); 155156321Sdamienstatic const char *rt2661_get_rf(int); 156178354Ssamstatic void rt2661_read_eeprom(struct rt2661_softc *, 157190526Ssam uint8_t macaddr[IEEE80211_ADDR_LEN]); 158156321Sdamienstatic int rt2661_bbp_init(struct rt2661_softc *); 159178354Ssamstatic void rt2661_init_locked(struct rt2661_softc *); 160156321Sdamienstatic void rt2661_init(void *); 161178354Ssamstatic void rt2661_stop_locked(struct rt2661_softc *); 162156321Sdamienstatic void rt2661_stop(void *); 163178354Ssamstatic int rt2661_load_microcode(struct rt2661_softc *); 164156321Sdamien#ifdef notyet 165156321Sdamienstatic void rt2661_rx_tune(struct rt2661_softc *); 166156321Sdamienstatic void rt2661_radar_start(struct rt2661_softc *); 167156321Sdamienstatic int rt2661_radar_stop(struct rt2661_softc *); 168156321Sdamien#endif 169178354Ssamstatic int rt2661_prepare_beacon(struct rt2661_softc *, 170178354Ssam struct ieee80211vap *); 171156321Sdamienstatic void rt2661_enable_tsf_sync(struct rt2661_softc *); 172192468Ssamstatic void rt2661_enable_tsf(struct rt2661_softc *); 173156321Sdamienstatic int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 174156321Sdamien 175156321Sdamienstatic const struct { 176156321Sdamien uint32_t reg; 177156321Sdamien uint32_t val; 178156321Sdamien} rt2661_def_mac[] = { 179156321Sdamien RT2661_DEF_MAC 180156321Sdamien}; 181156321Sdamien 182156321Sdamienstatic const struct { 183156321Sdamien uint8_t reg; 184156321Sdamien uint8_t val; 185156321Sdamien} rt2661_def_bbp[] = { 186156321Sdamien RT2661_DEF_BBP 187156321Sdamien}; 188156321Sdamien 189156321Sdamienstatic const struct rfprog { 190156321Sdamien uint8_t chan; 191156321Sdamien uint32_t r1, r2, r3, r4; 192156321Sdamien} rt2661_rf5225_1[] = { 193156321Sdamien RT2661_RF5225_1 194156321Sdamien}, rt2661_rf5225_2[] = { 195156321Sdamien RT2661_RF5225_2 196156321Sdamien}; 197156321Sdamien 198300752Savosstatic const uint8_t rt2661_chan_2ghz[] = 199300752Savos { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 200300752Savosstatic const uint8_t rt2661_chan_5ghz[] = 201300752Savos { 36, 40, 44, 48, 52, 56, 60, 64, 202300752Savos 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 203300752Savos 149, 153, 157, 161, 165 }; 204300752Savos 205156321Sdamienint 206156321Sdamienrt2661_attach(device_t dev, int id) 207156321Sdamien{ 208156321Sdamien struct rt2661_softc *sc = device_get_softc(dev); 209287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 210156321Sdamien uint32_t val; 211178354Ssam int error, ac, ntries; 212156321Sdamien 213178354Ssam sc->sc_id = id; 214156321Sdamien sc->sc_dev = dev; 215156321Sdamien 216156321Sdamien mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 217156321Sdamien MTX_DEF | MTX_RECURSE); 218156321Sdamien 219165352Sbms callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 220287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 221156321Sdamien 222156321Sdamien /* wait for NIC to initialize */ 223156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 224156321Sdamien if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 225156321Sdamien break; 226156321Sdamien DELAY(1000); 227156321Sdamien } 228156321Sdamien if (ntries == 1000) { 229156321Sdamien device_printf(sc->sc_dev, 230156321Sdamien "timeout waiting for NIC to initialize\n"); 231156321Sdamien error = EIO; 232156321Sdamien goto fail1; 233156321Sdamien } 234156321Sdamien 235156321Sdamien /* retrieve RF rev. no and various other things from EEPROM */ 236287197Sglebius rt2661_read_eeprom(sc, ic->ic_macaddr); 237156321Sdamien 238156321Sdamien device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 239156321Sdamien rt2661_get_rf(sc->rf_rev)); 240156321Sdamien 241156321Sdamien /* 242156321Sdamien * Allocate Tx and Rx rings. 243156321Sdamien */ 244156321Sdamien for (ac = 0; ac < 4; ac++) { 245156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 246156321Sdamien RT2661_TX_RING_COUNT); 247156321Sdamien if (error != 0) { 248156321Sdamien device_printf(sc->sc_dev, 249156321Sdamien "could not allocate Tx ring %d\n", ac); 250156321Sdamien goto fail2; 251156321Sdamien } 252156321Sdamien } 253156321Sdamien 254156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 255156321Sdamien if (error != 0) { 256156321Sdamien device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 257156321Sdamien goto fail2; 258156321Sdamien } 259156321Sdamien 260156321Sdamien error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 261156321Sdamien if (error != 0) { 262156321Sdamien device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 263156321Sdamien goto fail3; 264156321Sdamien } 265156321Sdamien 266283537Sglebius ic->ic_softc = sc; 267283527Sglebius ic->ic_name = device_get_nameunit(dev); 268178354Ssam ic->ic_opmode = IEEE80211_M_STA; 269156321Sdamien ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 270156321Sdamien 271156321Sdamien /* set device capabilities */ 272156321Sdamien ic->ic_caps = 273178957Ssam IEEE80211_C_STA /* station mode */ 274178957Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 275178354Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 276178354Ssam | IEEE80211_C_MONITOR /* monitor mode */ 277178354Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 278178354Ssam | IEEE80211_C_WDS /* 4-address traffic works */ 279195618Srpaulo | IEEE80211_C_MBSS /* mesh point link mode */ 280178354Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 281178354Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 282178354Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 283178354Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 284156407Sdamien#ifdef notyet 285178354Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 286178354Ssam | IEEE80211_C_WME /* 802.11e */ 287156407Sdamien#endif 288178354Ssam ; 289156321Sdamien 290300752Savos rt2661_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 291300752Savos ic->ic_channels); 292156321Sdamien 293287197Sglebius ieee80211_ifattach(ic); 294178354Ssam#if 0 295178354Ssam ic->ic_wme.wme_update = rt2661_wme_update; 296178354Ssam#endif 297170530Ssam ic->ic_scan_start = rt2661_scan_start; 298170530Ssam ic->ic_scan_end = rt2661_scan_end; 299300759Savos ic->ic_getradiocaps = rt2661_getradiocaps; 300170530Ssam ic->ic_set_channel = rt2661_set_channel; 301156321Sdamien ic->ic_updateslot = rt2661_update_slot; 302178354Ssam ic->ic_update_promisc = rt2661_update_promisc; 303178354Ssam ic->ic_raw_xmit = rt2661_raw_xmit; 304287197Sglebius ic->ic_transmit = rt2661_transmit; 305287197Sglebius ic->ic_parent = rt2661_parent; 306178354Ssam ic->ic_vap_create = rt2661_vap_create; 307178354Ssam ic->ic_vap_delete = rt2661_vap_delete; 308156321Sdamien 309192468Ssam ieee80211_radiotap_attach(ic, 310192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 311192468Ssam RT2661_TX_RADIOTAP_PRESENT, 312192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 313192468Ssam RT2661_RX_RADIOTAP_PRESENT); 314178354Ssam 315178354Ssam#ifdef RAL_DEBUG 316156321Sdamien SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 317178354Ssam SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 318178354Ssam "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 319178354Ssam#endif 320156321Sdamien if (bootverbose) 321156321Sdamien ieee80211_announce(ic); 322156321Sdamien 323156321Sdamien return 0; 324156321Sdamien 325156321Sdamienfail3: rt2661_free_tx_ring(sc, &sc->mgtq); 326156321Sdamienfail2: while (--ac >= 0) 327156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[ac]); 328156321Sdamienfail1: mtx_destroy(&sc->sc_mtx); 329156321Sdamien return error; 330156321Sdamien} 331156321Sdamien 332156321Sdamienint 333156321Sdamienrt2661_detach(void *xsc) 334156321Sdamien{ 335156321Sdamien struct rt2661_softc *sc = xsc; 336287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 337170530Ssam 338178038Ssam RAL_LOCK(sc); 339178038Ssam rt2661_stop_locked(sc); 340178038Ssam RAL_UNLOCK(sc); 341156321Sdamien 342156321Sdamien ieee80211_ifdetach(ic); 343287197Sglebius mbufq_drain(&sc->sc_snd); 344156321Sdamien 345156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[0]); 346156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[1]); 347156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[2]); 348156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[3]); 349156321Sdamien rt2661_free_tx_ring(sc, &sc->mgtq); 350156321Sdamien rt2661_free_rx_ring(sc, &sc->rxq); 351156321Sdamien 352156321Sdamien mtx_destroy(&sc->sc_mtx); 353156321Sdamien 354156321Sdamien return 0; 355156321Sdamien} 356156321Sdamien 357178354Ssamstatic struct ieee80211vap * 358228621Sbschmidtrt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 359228621Sbschmidt enum ieee80211_opmode opmode, int flags, 360228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 361228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 362178354Ssam{ 363287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 364178354Ssam struct rt2661_vap *rvp; 365178354Ssam struct ieee80211vap *vap; 366178354Ssam 367178354Ssam switch (opmode) { 368178354Ssam case IEEE80211_M_STA: 369178354Ssam case IEEE80211_M_IBSS: 370178354Ssam case IEEE80211_M_AHDEMO: 371178354Ssam case IEEE80211_M_MONITOR: 372178354Ssam case IEEE80211_M_HOSTAP: 373195618Srpaulo case IEEE80211_M_MBSS: 374195618Srpaulo /* XXXRP: TBD */ 375178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 376287197Sglebius device_printf(sc->sc_dev, "only 1 vap supported\n"); 377178354Ssam return NULL; 378178354Ssam } 379178354Ssam if (opmode == IEEE80211_M_STA) 380178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 381178354Ssam break; 382178354Ssam case IEEE80211_M_WDS: 383178354Ssam if (TAILQ_EMPTY(&ic->ic_vaps) || 384178354Ssam ic->ic_opmode != IEEE80211_M_HOSTAP) { 385287197Sglebius device_printf(sc->sc_dev, 386287197Sglebius "wds only supported in ap mode\n"); 387178354Ssam return NULL; 388178354Ssam } 389178354Ssam /* 390178354Ssam * Silently remove any request for a unique 391178354Ssam * bssid; WDS vap's always share the local 392178354Ssam * mac address. 393178354Ssam */ 394178354Ssam flags &= ~IEEE80211_CLONE_BSSID; 395178354Ssam break; 396178354Ssam default: 397287197Sglebius device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 398178354Ssam return NULL; 399178354Ssam } 400287197Sglebius rvp = malloc(sizeof(struct rt2661_vap), M_80211_VAP, M_WAITOK | M_ZERO); 401178354Ssam vap = &rvp->ral_vap; 402287197Sglebius ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 403178354Ssam 404178354Ssam /* override state transition machine */ 405178354Ssam rvp->ral_newstate = vap->iv_newstate; 406178354Ssam vap->iv_newstate = rt2661_newstate; 407178354Ssam#if 0 408178354Ssam vap->iv_update_beacon = rt2661_beacon_update; 409178354Ssam#endif 410178354Ssam 411206358Srpaulo ieee80211_ratectl_init(vap); 412178354Ssam /* complete setup */ 413287197Sglebius ieee80211_vap_attach(vap, ieee80211_media_change, 414287197Sglebius ieee80211_media_status, mac); 415178354Ssam if (TAILQ_FIRST(&ic->ic_vaps) == vap) 416178354Ssam ic->ic_opmode = opmode; 417178354Ssam return vap; 418178354Ssam} 419178354Ssam 420178354Ssamstatic void 421178354Ssamrt2661_vap_delete(struct ieee80211vap *vap) 422178354Ssam{ 423178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 424178354Ssam 425206358Srpaulo ieee80211_ratectl_deinit(vap); 426178354Ssam ieee80211_vap_detach(vap); 427178354Ssam free(rvp, M_80211_VAP); 428178354Ssam} 429178354Ssam 430156321Sdamienvoid 431156321Sdamienrt2661_shutdown(void *xsc) 432156321Sdamien{ 433156321Sdamien struct rt2661_softc *sc = xsc; 434156321Sdamien 435156321Sdamien rt2661_stop(sc); 436156321Sdamien} 437156321Sdamien 438156321Sdamienvoid 439156321Sdamienrt2661_suspend(void *xsc) 440156321Sdamien{ 441156321Sdamien struct rt2661_softc *sc = xsc; 442156321Sdamien 443156321Sdamien rt2661_stop(sc); 444156321Sdamien} 445156321Sdamien 446156321Sdamienvoid 447156321Sdamienrt2661_resume(void *xsc) 448156321Sdamien{ 449156321Sdamien struct rt2661_softc *sc = xsc; 450156321Sdamien 451287197Sglebius if (sc->sc_ic.ic_nrunning > 0) 452178354Ssam rt2661_init(sc); 453156321Sdamien} 454156321Sdamien 455156321Sdamienstatic void 456156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 457156321Sdamien{ 458156321Sdamien if (error != 0) 459156321Sdamien return; 460156321Sdamien 461156321Sdamien KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 462156321Sdamien 463156321Sdamien *(bus_addr_t *)arg = segs[0].ds_addr; 464156321Sdamien} 465156321Sdamien 466156321Sdamienstatic int 467156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 468156321Sdamien int count) 469156321Sdamien{ 470156321Sdamien int i, error; 471156321Sdamien 472156321Sdamien ring->count = count; 473156321Sdamien ring->queued = 0; 474156321Sdamien ring->cur = ring->next = ring->stat = 0; 475156321Sdamien 476171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 477171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 478171535Skevlo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 479171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 480156321Sdamien if (error != 0) { 481156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 482156321Sdamien goto fail; 483156321Sdamien } 484156321Sdamien 485156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 486156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 487156321Sdamien if (error != 0) { 488156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 489156321Sdamien goto fail; 490156321Sdamien } 491156321Sdamien 492156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 493156321Sdamien count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 494156321Sdamien 0); 495156321Sdamien if (error != 0) { 496156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 497156321Sdamien goto fail; 498156321Sdamien } 499156321Sdamien 500156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 501156321Sdamien M_NOWAIT | M_ZERO); 502156321Sdamien if (ring->data == NULL) { 503156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 504156321Sdamien error = ENOMEM; 505156321Sdamien goto fail; 506156321Sdamien } 507156321Sdamien 508171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 509171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 510171535Skevlo RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 511156321Sdamien if (error != 0) { 512156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 513156321Sdamien goto fail; 514156321Sdamien } 515156321Sdamien 516156321Sdamien for (i = 0; i < count; i++) { 517156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, 518156321Sdamien &ring->data[i].map); 519156321Sdamien if (error != 0) { 520156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 521156321Sdamien goto fail; 522156321Sdamien } 523156321Sdamien } 524156321Sdamien 525156321Sdamien return 0; 526156321Sdamien 527156321Sdamienfail: rt2661_free_tx_ring(sc, ring); 528156321Sdamien return error; 529156321Sdamien} 530156321Sdamien 531156321Sdamienstatic void 532156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 533156321Sdamien{ 534156321Sdamien struct rt2661_tx_desc *desc; 535156321Sdamien struct rt2661_tx_data *data; 536156321Sdamien int i; 537156321Sdamien 538156321Sdamien for (i = 0; i < ring->count; i++) { 539156321Sdamien desc = &ring->desc[i]; 540156321Sdamien data = &ring->data[i]; 541156321Sdamien 542156321Sdamien if (data->m != NULL) { 543156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 544156321Sdamien BUS_DMASYNC_POSTWRITE); 545156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 546156321Sdamien m_freem(data->m); 547156321Sdamien data->m = NULL; 548156321Sdamien } 549156321Sdamien 550156321Sdamien if (data->ni != NULL) { 551156321Sdamien ieee80211_free_node(data->ni); 552156321Sdamien data->ni = NULL; 553156321Sdamien } 554156321Sdamien 555156321Sdamien desc->flags = 0; 556156321Sdamien } 557156321Sdamien 558156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 559156321Sdamien 560156321Sdamien ring->queued = 0; 561156321Sdamien ring->cur = ring->next = ring->stat = 0; 562156321Sdamien} 563156321Sdamien 564156321Sdamienstatic void 565156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 566156321Sdamien{ 567156321Sdamien struct rt2661_tx_data *data; 568156321Sdamien int i; 569156321Sdamien 570156321Sdamien if (ring->desc != NULL) { 571156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 572156321Sdamien BUS_DMASYNC_POSTWRITE); 573156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 574156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 575156321Sdamien } 576156321Sdamien 577156321Sdamien if (ring->desc_dmat != NULL) 578156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 579156321Sdamien 580156321Sdamien if (ring->data != NULL) { 581156321Sdamien for (i = 0; i < ring->count; i++) { 582156321Sdamien data = &ring->data[i]; 583156321Sdamien 584156321Sdamien if (data->m != NULL) { 585156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 586156321Sdamien BUS_DMASYNC_POSTWRITE); 587156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 588156321Sdamien m_freem(data->m); 589156321Sdamien } 590156321Sdamien 591156321Sdamien if (data->ni != NULL) 592156321Sdamien ieee80211_free_node(data->ni); 593156321Sdamien 594156321Sdamien if (data->map != NULL) 595156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 596156321Sdamien } 597156321Sdamien 598156321Sdamien free(ring->data, M_DEVBUF); 599156321Sdamien } 600156321Sdamien 601156321Sdamien if (ring->data_dmat != NULL) 602156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 603156321Sdamien} 604156321Sdamien 605156321Sdamienstatic int 606156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 607156321Sdamien int count) 608156321Sdamien{ 609156321Sdamien struct rt2661_rx_desc *desc; 610156321Sdamien struct rt2661_rx_data *data; 611156321Sdamien bus_addr_t physaddr; 612156321Sdamien int i, error; 613156321Sdamien 614156321Sdamien ring->count = count; 615156321Sdamien ring->cur = ring->next = 0; 616156321Sdamien 617171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 618171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 619171535Skevlo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 620171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 621156321Sdamien if (error != 0) { 622156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 623156321Sdamien goto fail; 624156321Sdamien } 625156321Sdamien 626156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 627156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 628156321Sdamien if (error != 0) { 629156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 630156321Sdamien goto fail; 631156321Sdamien } 632156321Sdamien 633156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 634156321Sdamien count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 635156321Sdamien 0); 636156321Sdamien if (error != 0) { 637156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 638156321Sdamien goto fail; 639156321Sdamien } 640156321Sdamien 641156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 642156321Sdamien M_NOWAIT | M_ZERO); 643156321Sdamien if (ring->data == NULL) { 644156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 645156321Sdamien error = ENOMEM; 646156321Sdamien goto fail; 647156321Sdamien } 648156321Sdamien 649156321Sdamien /* 650156321Sdamien * Pre-allocate Rx buffers and populate Rx ring. 651156321Sdamien */ 652171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 653171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 654171535Skevlo 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 655156321Sdamien if (error != 0) { 656156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 657156321Sdamien goto fail; 658156321Sdamien } 659156321Sdamien 660156321Sdamien for (i = 0; i < count; i++) { 661156321Sdamien desc = &sc->rxq.desc[i]; 662156321Sdamien data = &sc->rxq.data[i]; 663156321Sdamien 664156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 665156321Sdamien if (error != 0) { 666156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 667156321Sdamien goto fail; 668156321Sdamien } 669156321Sdamien 670243857Sglebius data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 671156321Sdamien if (data->m == NULL) { 672156321Sdamien device_printf(sc->sc_dev, 673156321Sdamien "could not allocate rx mbuf\n"); 674156321Sdamien error = ENOMEM; 675156321Sdamien goto fail; 676156321Sdamien } 677156321Sdamien 678156321Sdamien error = bus_dmamap_load(ring->data_dmat, data->map, 679156321Sdamien mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 680156321Sdamien &physaddr, 0); 681156321Sdamien if (error != 0) { 682156321Sdamien device_printf(sc->sc_dev, 683156321Sdamien "could not load rx buf DMA map"); 684156321Sdamien goto fail; 685156321Sdamien } 686156321Sdamien 687156321Sdamien desc->flags = htole32(RT2661_RX_BUSY); 688156321Sdamien desc->physaddr = htole32(physaddr); 689156321Sdamien } 690156321Sdamien 691156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 692156321Sdamien 693156321Sdamien return 0; 694156321Sdamien 695156321Sdamienfail: rt2661_free_rx_ring(sc, ring); 696156321Sdamien return error; 697156321Sdamien} 698156321Sdamien 699156321Sdamienstatic void 700156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 701156321Sdamien{ 702156321Sdamien int i; 703156321Sdamien 704156321Sdamien for (i = 0; i < ring->count; i++) 705156321Sdamien ring->desc[i].flags = htole32(RT2661_RX_BUSY); 706156321Sdamien 707156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 708156321Sdamien 709156321Sdamien ring->cur = ring->next = 0; 710156321Sdamien} 711156321Sdamien 712156321Sdamienstatic void 713156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 714156321Sdamien{ 715156321Sdamien struct rt2661_rx_data *data; 716156321Sdamien int i; 717156321Sdamien 718156321Sdamien if (ring->desc != NULL) { 719156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 720156321Sdamien BUS_DMASYNC_POSTWRITE); 721156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 722156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 723156321Sdamien } 724156321Sdamien 725156321Sdamien if (ring->desc_dmat != NULL) 726156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 727156321Sdamien 728156321Sdamien if (ring->data != NULL) { 729156321Sdamien for (i = 0; i < ring->count; i++) { 730156321Sdamien data = &ring->data[i]; 731156321Sdamien 732156321Sdamien if (data->m != NULL) { 733156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 734156321Sdamien BUS_DMASYNC_POSTREAD); 735156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 736156321Sdamien m_freem(data->m); 737156321Sdamien } 738156321Sdamien 739156321Sdamien if (data->map != NULL) 740156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 741156321Sdamien } 742156321Sdamien 743156321Sdamien free(ring->data, M_DEVBUF); 744156321Sdamien } 745156321Sdamien 746156321Sdamien if (ring->data_dmat != NULL) 747156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 748156321Sdamien} 749156321Sdamien 750156321Sdamienstatic int 751178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 752156321Sdamien{ 753178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 754178354Ssam struct ieee80211com *ic = vap->iv_ic; 755287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 756178354Ssam int error; 757156321Sdamien 758178354Ssam if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 759178354Ssam uint32_t tmp; 760156321Sdamien 761178354Ssam /* abort TSF synchronization */ 762178354Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 763178354Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 764178354Ssam } 765156321Sdamien 766178354Ssam error = rvp->ral_newstate(vap, nstate, arg); 767156321Sdamien 768178354Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 769178354Ssam struct ieee80211_node *ni = vap->iv_bss; 770178354Ssam 771178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 772156321Sdamien rt2661_enable_mrr(sc); 773156321Sdamien rt2661_set_txpreamble(sc); 774156321Sdamien rt2661_set_basicrates(sc, &ni->ni_rates); 775156321Sdamien rt2661_set_bssid(sc, ni->ni_bssid); 776156321Sdamien } 777156321Sdamien 778178354Ssam if (vap->iv_opmode == IEEE80211_M_HOSTAP || 779195618Srpaulo vap->iv_opmode == IEEE80211_M_IBSS || 780195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) { 781178354Ssam error = rt2661_prepare_beacon(sc, vap); 782178354Ssam if (error != 0) 783178354Ssam return error; 784156321Sdamien } 785184345Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) 786156321Sdamien rt2661_enable_tsf_sync(sc); 787192468Ssam else 788192468Ssam rt2661_enable_tsf(sc); 789178354Ssam } 790178354Ssam return error; 791156321Sdamien} 792156321Sdamien 793156321Sdamien/* 794156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 795156321Sdamien * 93C66). 796156321Sdamien */ 797156321Sdamienstatic uint16_t 798156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 799156321Sdamien{ 800156321Sdamien uint32_t tmp; 801156321Sdamien uint16_t val; 802156321Sdamien int n; 803156321Sdamien 804156321Sdamien /* clock C once before the first command */ 805156321Sdamien RT2661_EEPROM_CTL(sc, 0); 806156321Sdamien 807156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 808156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 809156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 810156321Sdamien 811156321Sdamien /* write start bit (1) */ 812156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 813156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 814156321Sdamien 815156321Sdamien /* write READ opcode (10) */ 816156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 817156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 818156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 819156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 820156321Sdamien 821156321Sdamien /* write address (A5-A0 or A7-A0) */ 822156321Sdamien n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 823156321Sdamien for (; n >= 0; n--) { 824156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 825156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D)); 826156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 827156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 828156321Sdamien } 829156321Sdamien 830156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 831156321Sdamien 832156321Sdamien /* read data Q15-Q0 */ 833156321Sdamien val = 0; 834156321Sdamien for (n = 15; n >= 0; n--) { 835156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 836156321Sdamien tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 837156321Sdamien val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 838156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 839156321Sdamien } 840156321Sdamien 841156321Sdamien RT2661_EEPROM_CTL(sc, 0); 842156321Sdamien 843156321Sdamien /* clear Chip Select and clock C */ 844156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 845156321Sdamien RT2661_EEPROM_CTL(sc, 0); 846156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_C); 847156321Sdamien 848156321Sdamien return val; 849156321Sdamien} 850156321Sdamien 851156321Sdamienstatic void 852156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc) 853156321Sdamien{ 854156321Sdamien struct rt2661_tx_ring *txq; 855156321Sdamien struct rt2661_tx_data *data; 856156321Sdamien uint32_t val; 857287197Sglebius int error, qid, retrycnt; 858206358Srpaulo struct ieee80211vap *vap; 859156321Sdamien 860156321Sdamien for (;;) { 861170530Ssam struct ieee80211_node *ni; 862170530Ssam struct mbuf *m; 863170530Ssam 864156321Sdamien val = RAL_READ(sc, RT2661_STA_CSR4); 865156321Sdamien if (!(val & RT2661_TX_STAT_VALID)) 866156321Sdamien break; 867156321Sdamien 868156321Sdamien /* retrieve the queue in which this frame was sent */ 869156321Sdamien qid = RT2661_TX_QID(val); 870156321Sdamien txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 871156321Sdamien 872156321Sdamien /* retrieve rate control algorithm context */ 873156321Sdamien data = &txq->data[txq->stat]; 874170530Ssam m = data->m; 875170530Ssam data->m = NULL; 876170530Ssam ni = data->ni; 877170530Ssam data->ni = NULL; 878156321Sdamien 879159301Sfjoe /* if no frame has been sent, ignore */ 880170530Ssam if (ni == NULL) 881159301Sfjoe continue; 882206371Srpaulo else 883206371Srpaulo vap = ni->ni_vap; 884159301Sfjoe 885156321Sdamien switch (RT2661_TX_RESULT(val)) { 886156321Sdamien case RT2661_TX_SUCCESS: 887156321Sdamien retrycnt = RT2661_TX_RETRYCNT(val); 888156321Sdamien 889178354Ssam DPRINTFN(sc, 10, "data frame sent successfully after " 890178354Ssam "%d retries\n", retrycnt); 891178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 892206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 893206358Srpaulo IEEE80211_RATECTL_TX_SUCCESS, 894206358Srpaulo &retrycnt, NULL); 895287197Sglebius error = 0; 896156321Sdamien break; 897156321Sdamien 898156321Sdamien case RT2661_TX_RETRY_FAIL: 899178354Ssam retrycnt = RT2661_TX_RETRYCNT(val); 900178354Ssam 901178354Ssam DPRINTFN(sc, 9, "%s\n", 902178354Ssam "sending data frame failed (too much retries)"); 903178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 904206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 905206358Srpaulo IEEE80211_RATECTL_TX_FAILURE, 906206358Srpaulo &retrycnt, NULL); 907287197Sglebius error = 1; 908156321Sdamien break; 909156321Sdamien 910156321Sdamien default: 911156321Sdamien /* other failure */ 912156321Sdamien device_printf(sc->sc_dev, 913156321Sdamien "sending data frame failed 0x%08x\n", val); 914287197Sglebius error = 1; 915156321Sdamien } 916156321Sdamien 917178354Ssam DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 918156321Sdamien 919156321Sdamien txq->queued--; 920156321Sdamien if (++txq->stat >= txq->count) /* faster than % count */ 921156321Sdamien txq->stat = 0; 922170530Ssam 923287197Sglebius ieee80211_tx_complete(ni, m, error); 924156321Sdamien } 925156321Sdamien 926156321Sdamien sc->sc_tx_timer = 0; 927178354Ssam 928287197Sglebius rt2661_start(sc); 929156321Sdamien} 930156321Sdamien 931156321Sdamienstatic void 932156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 933156321Sdamien{ 934156321Sdamien struct rt2661_tx_desc *desc; 935156321Sdamien struct rt2661_tx_data *data; 936156321Sdamien 937156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 938156321Sdamien 939156321Sdamien for (;;) { 940156321Sdamien desc = &txq->desc[txq->next]; 941156321Sdamien data = &txq->data[txq->next]; 942156321Sdamien 943156321Sdamien if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 944156321Sdamien !(le32toh(desc->flags) & RT2661_TX_VALID)) 945156321Sdamien break; 946156321Sdamien 947156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, 948156321Sdamien BUS_DMASYNC_POSTWRITE); 949156321Sdamien bus_dmamap_unload(txq->data_dmat, data->map); 950156321Sdamien 951156321Sdamien /* descriptor is no longer valid */ 952156321Sdamien desc->flags &= ~htole32(RT2661_TX_VALID); 953156321Sdamien 954178354Ssam DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 955156321Sdamien 956156321Sdamien if (++txq->next >= txq->count) /* faster than % count */ 957156321Sdamien txq->next = 0; 958156321Sdamien } 959156321Sdamien 960156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 961156321Sdamien} 962156321Sdamien 963156321Sdamienstatic void 964156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc) 965156321Sdamien{ 966287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 967156321Sdamien struct rt2661_rx_desc *desc; 968156321Sdamien struct rt2661_rx_data *data; 969156321Sdamien bus_addr_t physaddr; 970156321Sdamien struct ieee80211_frame *wh; 971156321Sdamien struct ieee80211_node *ni; 972156321Sdamien struct mbuf *mnew, *m; 973156321Sdamien int error; 974156321Sdamien 975156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 976156321Sdamien BUS_DMASYNC_POSTREAD); 977156321Sdamien 978156321Sdamien for (;;) { 979192468Ssam int8_t rssi, nf; 980170530Ssam 981156321Sdamien desc = &sc->rxq.desc[sc->rxq.cur]; 982156321Sdamien data = &sc->rxq.data[sc->rxq.cur]; 983156321Sdamien 984156321Sdamien if (le32toh(desc->flags) & RT2661_RX_BUSY) 985156321Sdamien break; 986156321Sdamien 987156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 988156321Sdamien (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 989156321Sdamien /* 990156321Sdamien * This should not happen since we did not request 991156321Sdamien * to receive those frames when we filled TXRX_CSR0. 992156321Sdamien */ 993178354Ssam DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 994178354Ssam le32toh(desc->flags)); 995287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 996156321Sdamien goto skip; 997156321Sdamien } 998156321Sdamien 999156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1000287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1001156321Sdamien goto skip; 1002156321Sdamien } 1003156321Sdamien 1004156321Sdamien /* 1005156321Sdamien * Try to allocate a new mbuf for this ring element and load it 1006156321Sdamien * before processing the current mbuf. If the ring element 1007156321Sdamien * cannot be loaded, drop the received packet and reuse the old 1008156321Sdamien * mbuf. In the unlikely case that the old mbuf can't be 1009156321Sdamien * reloaded either, explicitly panic. 1010156321Sdamien */ 1011243857Sglebius mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1012156321Sdamien if (mnew == NULL) { 1013287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1014156321Sdamien goto skip; 1015156321Sdamien } 1016156321Sdamien 1017156321Sdamien bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1018156321Sdamien BUS_DMASYNC_POSTREAD); 1019156321Sdamien bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1020156321Sdamien 1021156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1022156321Sdamien mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1023156321Sdamien &physaddr, 0); 1024156321Sdamien if (error != 0) { 1025156321Sdamien m_freem(mnew); 1026156321Sdamien 1027156321Sdamien /* try to reload the old mbuf */ 1028156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1029156321Sdamien mtod(data->m, void *), MCLBYTES, 1030156321Sdamien rt2661_dma_map_addr, &physaddr, 0); 1031156321Sdamien if (error != 0) { 1032156321Sdamien /* very unlikely that it will fail... */ 1033156321Sdamien panic("%s: could not load old rx mbuf", 1034156321Sdamien device_get_name(sc->sc_dev)); 1035156321Sdamien } 1036287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1037156321Sdamien goto skip; 1038156321Sdamien } 1039156321Sdamien 1040156321Sdamien /* 1041156321Sdamien * New mbuf successfully loaded, update Rx ring and continue 1042156321Sdamien * processing. 1043156321Sdamien */ 1044156321Sdamien m = data->m; 1045156321Sdamien data->m = mnew; 1046156321Sdamien desc->physaddr = htole32(physaddr); 1047156321Sdamien 1048156321Sdamien /* finalize mbuf */ 1049156321Sdamien m->m_pkthdr.len = m->m_len = 1050156321Sdamien (le32toh(desc->flags) >> 16) & 0xfff; 1051156321Sdamien 1052170530Ssam rssi = rt2661_get_rssi(sc, desc->rssi); 1053192468Ssam /* Error happened during RSSI conversion. */ 1054192468Ssam if (rssi < 0) 1055192468Ssam rssi = -30; /* XXX ignored by net80211 */ 1056192468Ssam nf = RT2661_NOISE_FLOOR; 1057170530Ssam 1058192468Ssam if (ieee80211_radiotap_active(ic)) { 1059156321Sdamien struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1060156321Sdamien uint32_t tsf_lo, tsf_hi; 1061156321Sdamien 1062156321Sdamien /* get timestamp (low and high 32 bits) */ 1063156321Sdamien tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1064156321Sdamien tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1065156321Sdamien 1066156321Sdamien tap->wr_tsf = 1067156321Sdamien htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1068156321Sdamien tap->wr_flags = 0; 1069178354Ssam tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1070178958Ssam (desc->flags & htole32(RT2661_RX_OFDM)) ? 1071178958Ssam IEEE80211_T_OFDM : IEEE80211_T_CCK); 1072192468Ssam tap->wr_antsignal = nf + rssi; 1073192468Ssam tap->wr_antnoise = nf; 1074156321Sdamien } 1075170530Ssam sc->sc_flags |= RAL_INPUT_RUNNING; 1076170530Ssam RAL_UNLOCK(sc); 1077156321Sdamien wh = mtod(m, struct ieee80211_frame *); 1078178354Ssam 1079178354Ssam /* send the frame to the 802.11 layer */ 1080156321Sdamien ni = ieee80211_find_rxnode(ic, 1081156321Sdamien (struct ieee80211_frame_min *)wh); 1082178354Ssam if (ni != NULL) { 1083192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 1084178354Ssam ieee80211_free_node(ni); 1085178354Ssam } else 1086192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 1087170530Ssam 1088170530Ssam RAL_LOCK(sc); 1089170530Ssam sc->sc_flags &= ~RAL_INPUT_RUNNING; 1090156321Sdamien 1091156321Sdamienskip: desc->flags |= htole32(RT2661_RX_BUSY); 1092156321Sdamien 1093178354Ssam DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1094156321Sdamien 1095156321Sdamien sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1096156321Sdamien } 1097156321Sdamien 1098156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1099156321Sdamien BUS_DMASYNC_PREWRITE); 1100156321Sdamien} 1101156321Sdamien 1102156321Sdamien/* ARGSUSED */ 1103156321Sdamienstatic void 1104156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1105156321Sdamien{ 1106156321Sdamien /* do nothing */ 1107156321Sdamien} 1108156321Sdamien 1109156321Sdamienstatic void 1110156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc) 1111156321Sdamien{ 1112156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1113156321Sdamien 1114156321Sdamien RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1115156321Sdamien RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1116156321Sdamien RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1117156321Sdamien 1118156321Sdamien /* send wakeup command to MCU */ 1119156321Sdamien rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1120156321Sdamien} 1121156321Sdamien 1122156321Sdamienstatic void 1123156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1124156321Sdamien{ 1125156321Sdamien RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1126156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1127156321Sdamien} 1128156321Sdamien 1129156321Sdamienvoid 1130156321Sdamienrt2661_intr(void *arg) 1131156321Sdamien{ 1132156321Sdamien struct rt2661_softc *sc = arg; 1133156321Sdamien uint32_t r1, r2; 1134156321Sdamien 1135156321Sdamien RAL_LOCK(sc); 1136156321Sdamien 1137156321Sdamien /* disable MAC and MCU interrupts */ 1138156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1139156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1140156321Sdamien 1141156975Sdamien /* don't re-enable interrupts if we're shutting down */ 1142287197Sglebius if (!(sc->sc_flags & RAL_RUNNING)) { 1143156975Sdamien RAL_UNLOCK(sc); 1144156975Sdamien return; 1145156975Sdamien } 1146156975Sdamien 1147156321Sdamien r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1148156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1149156321Sdamien 1150156321Sdamien r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1151156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1152156321Sdamien 1153156321Sdamien if (r1 & RT2661_MGT_DONE) 1154156321Sdamien rt2661_tx_dma_intr(sc, &sc->mgtq); 1155156321Sdamien 1156156321Sdamien if (r1 & RT2661_RX_DONE) 1157156321Sdamien rt2661_rx_intr(sc); 1158156321Sdamien 1159156321Sdamien if (r1 & RT2661_TX0_DMA_DONE) 1160156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[0]); 1161156321Sdamien 1162156321Sdamien if (r1 & RT2661_TX1_DMA_DONE) 1163156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[1]); 1164156321Sdamien 1165156321Sdamien if (r1 & RT2661_TX2_DMA_DONE) 1166156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[2]); 1167156321Sdamien 1168156321Sdamien if (r1 & RT2661_TX3_DMA_DONE) 1169156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[3]); 1170156321Sdamien 1171156321Sdamien if (r1 & RT2661_TX_DONE) 1172156321Sdamien rt2661_tx_intr(sc); 1173156321Sdamien 1174156321Sdamien if (r2 & RT2661_MCU_CMD_DONE) 1175156321Sdamien rt2661_mcu_cmd_intr(sc); 1176156321Sdamien 1177156321Sdamien if (r2 & RT2661_MCU_BEACON_EXPIRE) 1178156321Sdamien rt2661_mcu_beacon_expire(sc); 1179156321Sdamien 1180156321Sdamien if (r2 & RT2661_MCU_WAKEUP) 1181156321Sdamien rt2661_mcu_wakeup(sc); 1182156321Sdamien 1183156321Sdamien /* re-enable MAC and MCU interrupts */ 1184156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1185156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1186156321Sdamien 1187156321Sdamien RAL_UNLOCK(sc); 1188156321Sdamien} 1189156321Sdamien 1190178958Ssamstatic uint8_t 1191178958Ssamrt2661_plcp_signal(int rate) 1192178958Ssam{ 1193178958Ssam switch (rate) { 1194178958Ssam /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1195178958Ssam case 12: return 0xb; 1196178958Ssam case 18: return 0xf; 1197178958Ssam case 24: return 0xa; 1198178958Ssam case 36: return 0xe; 1199178958Ssam case 48: return 0x9; 1200178958Ssam case 72: return 0xd; 1201178958Ssam case 96: return 0x8; 1202178958Ssam case 108: return 0xc; 1203178958Ssam 1204178958Ssam /* CCK rates (NB: not IEEE std, device-specific) */ 1205178958Ssam case 2: return 0x0; 1206178958Ssam case 4: return 0x1; 1207178958Ssam case 11: return 0x2; 1208178958Ssam case 22: return 0x3; 1209178958Ssam } 1210178958Ssam return 0xff; /* XXX unsupported/unknown rate */ 1211178958Ssam} 1212178958Ssam 1213156321Sdamienstatic void 1214156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1215156321Sdamien uint32_t flags, uint16_t xflags, int len, int rate, 1216156321Sdamien const bus_dma_segment_t *segs, int nsegs, int ac) 1217156321Sdamien{ 1218287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1219156321Sdamien uint16_t plcp_length; 1220156321Sdamien int i, remainder; 1221156321Sdamien 1222156321Sdamien desc->flags = htole32(flags); 1223156321Sdamien desc->flags |= htole32(len << 16); 1224156321Sdamien desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1225156321Sdamien 1226156321Sdamien desc->xflags = htole16(xflags); 1227156321Sdamien desc->xflags |= htole16(nsegs << 13); 1228156321Sdamien 1229156321Sdamien desc->wme = htole16( 1230156321Sdamien RT2661_QID(ac) | 1231156321Sdamien RT2661_AIFSN(2) | 1232156321Sdamien RT2661_LOGCWMIN(4) | 1233156321Sdamien RT2661_LOGCWMAX(10)); 1234156321Sdamien 1235156321Sdamien /* 1236156321Sdamien * Remember in which queue this frame was sent. This field is driver 1237156321Sdamien * private data only. It will be made available by the NIC in STA_CSR4 1238156321Sdamien * on Tx interrupts. 1239156321Sdamien */ 1240156321Sdamien desc->qid = ac; 1241156321Sdamien 1242156321Sdamien /* setup PLCP fields */ 1243178958Ssam desc->plcp_signal = rt2661_plcp_signal(rate); 1244156321Sdamien desc->plcp_service = 4; 1245156321Sdamien 1246156321Sdamien len += IEEE80211_CRC_LEN; 1247190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1248156321Sdamien desc->flags |= htole32(RT2661_TX_OFDM); 1249156321Sdamien 1250156321Sdamien plcp_length = len & 0xfff; 1251156321Sdamien desc->plcp_length_hi = plcp_length >> 6; 1252156321Sdamien desc->plcp_length_lo = plcp_length & 0x3f; 1253156321Sdamien } else { 1254298646Spfg plcp_length = howmany(16 * len, rate); 1255156321Sdamien if (rate == 22) { 1256156321Sdamien remainder = (16 * len) % 22; 1257156321Sdamien if (remainder != 0 && remainder < 7) 1258156321Sdamien desc->plcp_service |= RT2661_PLCP_LENGEXT; 1259156321Sdamien } 1260156321Sdamien desc->plcp_length_hi = plcp_length >> 8; 1261156321Sdamien desc->plcp_length_lo = plcp_length & 0xff; 1262156321Sdamien 1263156321Sdamien if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1264156321Sdamien desc->plcp_signal |= 0x08; 1265156321Sdamien } 1266156321Sdamien 1267156321Sdamien /* RT2x61 supports scatter with up to 5 segments */ 1268156321Sdamien for (i = 0; i < nsegs; i++) { 1269156321Sdamien desc->addr[i] = htole32(segs[i].ds_addr); 1270156321Sdamien desc->len [i] = htole16(segs[i].ds_len); 1271156321Sdamien } 1272156321Sdamien} 1273156321Sdamien 1274156321Sdamienstatic int 1275156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1276156321Sdamien struct ieee80211_node *ni) 1277156321Sdamien{ 1278178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1279178354Ssam struct ieee80211com *ic = ni->ni_ic; 1280156321Sdamien struct rt2661_tx_desc *desc; 1281156321Sdamien struct rt2661_tx_data *data; 1282156321Sdamien struct ieee80211_frame *wh; 1283173386Skevlo struct ieee80211_key *k; 1284156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1285156321Sdamien uint16_t dur; 1286156321Sdamien uint32_t flags = 0; /* XXX HWSEQ */ 1287156321Sdamien int nsegs, rate, error; 1288156321Sdamien 1289156321Sdamien desc = &sc->mgtq.desc[sc->mgtq.cur]; 1290156321Sdamien data = &sc->mgtq.data[sc->mgtq.cur]; 1291156321Sdamien 1292178354Ssam rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1293156321Sdamien 1294173386Skevlo wh = mtod(m0, struct ieee80211_frame *); 1295173386Skevlo 1296260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1297178354Ssam k = ieee80211_crypto_encap(ni, m0); 1298173386Skevlo if (k == NULL) { 1299173386Skevlo m_freem(m0); 1300173386Skevlo return ENOBUFS; 1301173386Skevlo } 1302173386Skevlo } 1303173386Skevlo 1304156321Sdamien error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0, 1305156321Sdamien segs, &nsegs, 0); 1306156321Sdamien if (error != 0) { 1307156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1308156321Sdamien error); 1309156321Sdamien m_freem(m0); 1310156321Sdamien return error; 1311156321Sdamien } 1312156321Sdamien 1313192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1314156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1315156321Sdamien 1316156321Sdamien tap->wt_flags = 0; 1317156321Sdamien tap->wt_rate = rate; 1318156321Sdamien 1319192468Ssam ieee80211_radiotap_tx(vap, m0); 1320156321Sdamien } 1321156321Sdamien 1322156321Sdamien data->m = m0; 1323156321Sdamien data->ni = ni; 1324178354Ssam /* management frames are not taken into account for amrr */ 1325178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1326156321Sdamien 1327156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1328156321Sdamien 1329156321Sdamien if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1330156321Sdamien flags |= RT2661_TX_NEED_ACK; 1331156321Sdamien 1332190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1333178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1334156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1335156321Sdamien 1336156321Sdamien /* tell hardware to add timestamp in probe responses */ 1337156321Sdamien if ((wh->i_fc[0] & 1338156321Sdamien (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1339156321Sdamien (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1340156321Sdamien flags |= RT2661_TX_TIMESTAMP; 1341156321Sdamien } 1342156321Sdamien 1343156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1344156321Sdamien m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1345156321Sdamien 1346156321Sdamien bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1347156321Sdamien bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1348156321Sdamien BUS_DMASYNC_PREWRITE); 1349156321Sdamien 1350178354Ssam DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1351178354Ssam m0->m_pkthdr.len, sc->mgtq.cur, rate); 1352156321Sdamien 1353156321Sdamien /* kick mgt */ 1354156321Sdamien sc->mgtq.queued++; 1355156321Sdamien sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1356156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1357156321Sdamien 1358156321Sdamien return 0; 1359156321Sdamien} 1360156321Sdamien 1361178354Ssamstatic int 1362178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac, 1363178354Ssam const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1364156321Sdamien{ 1365178354Ssam struct ieee80211com *ic = ni->ni_ic; 1366178354Ssam struct rt2661_tx_ring *txq = &sc->txq[ac]; 1367178354Ssam const struct ieee80211_frame *wh; 1368178354Ssam struct rt2661_tx_desc *desc; 1369178354Ssam struct rt2661_tx_data *data; 1370178354Ssam struct mbuf *mprot; 1371178354Ssam int protrate, ackrate, pktlen, flags, isshort, error; 1372178354Ssam uint16_t dur; 1373178354Ssam bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1374178354Ssam int nsegs; 1375156321Sdamien 1376178354Ssam KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1377178354Ssam ("protection %d", prot)); 1378178354Ssam 1379178354Ssam wh = mtod(m, const struct ieee80211_frame *); 1380178354Ssam pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1381178354Ssam 1382190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1383190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1384178354Ssam 1385178354Ssam isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1386190532Ssam dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1387190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1388178354Ssam flags = RT2661_TX_MORE_FRAG; 1389178354Ssam if (prot == IEEE80211_PROT_RTSCTS) { 1390178354Ssam /* NB: CTS is the same size as an ACK */ 1391190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1392178354Ssam flags |= RT2661_TX_NEED_ACK; 1393178354Ssam mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1394178354Ssam } else { 1395178354Ssam mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1396156321Sdamien } 1397178354Ssam if (mprot == NULL) { 1398178354Ssam /* XXX stat + msg */ 1399178354Ssam return ENOBUFS; 1400178354Ssam } 1401156321Sdamien 1402178354Ssam data = &txq->data[txq->cur]; 1403178354Ssam desc = &txq->desc[txq->cur]; 1404156321Sdamien 1405178354Ssam error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs, 1406178354Ssam &nsegs, 0); 1407178354Ssam if (error != 0) { 1408178354Ssam device_printf(sc->sc_dev, 1409178354Ssam "could not map mbuf (error %d)\n", error); 1410178354Ssam m_freem(mprot); 1411178354Ssam return error; 1412178354Ssam } 1413156321Sdamien 1414178354Ssam data->m = mprot; 1415178354Ssam data->ni = ieee80211_ref_node(ni); 1416178354Ssam /* ctl frames are not taken into account for amrr */ 1417178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1418156321Sdamien 1419178354Ssam rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1420178354Ssam protrate, segs, 1, ac); 1421178354Ssam 1422178354Ssam bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1423178354Ssam bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1424178354Ssam 1425178354Ssam txq->queued++; 1426178354Ssam txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1427178354Ssam 1428178354Ssam return 0; 1429156321Sdamien} 1430156321Sdamien 1431156321Sdamienstatic int 1432156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1433156321Sdamien struct ieee80211_node *ni, int ac) 1434156321Sdamien{ 1435178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1436287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1437156321Sdamien struct rt2661_tx_ring *txq = &sc->txq[ac]; 1438156321Sdamien struct rt2661_tx_desc *desc; 1439156321Sdamien struct rt2661_tx_data *data; 1440156321Sdamien struct ieee80211_frame *wh; 1441178354Ssam const struct ieee80211_txparam *tp; 1442156321Sdamien struct ieee80211_key *k; 1443156321Sdamien const struct chanAccParams *cap; 1444156321Sdamien struct mbuf *mnew; 1445156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1446156321Sdamien uint16_t dur; 1447178354Ssam uint32_t flags; 1448156321Sdamien int error, nsegs, rate, noack = 0; 1449156321Sdamien 1450156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1451156321Sdamien 1452178354Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1453178354Ssam if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1454178354Ssam rate = tp->mcastrate; 1455178354Ssam } else if (m0->m_flags & M_EAPOL) { 1456178354Ssam rate = tp->mgmtrate; 1457178354Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1458178354Ssam rate = tp->ucastrate; 1459156321Sdamien } else { 1460206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 1461178354Ssam rate = ni->ni_txrate; 1462156321Sdamien } 1463156321Sdamien rate &= IEEE80211_RATE_VAL; 1464156321Sdamien 1465156321Sdamien if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1466156321Sdamien cap = &ic->ic_wme.wme_chanParams; 1467156321Sdamien noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1468156321Sdamien } 1469156321Sdamien 1470260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1471178354Ssam k = ieee80211_crypto_encap(ni, m0); 1472156321Sdamien if (k == NULL) { 1473156321Sdamien m_freem(m0); 1474156321Sdamien return ENOBUFS; 1475156321Sdamien } 1476156321Sdamien 1477156321Sdamien /* packet header may have moved, reset our local pointer */ 1478156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1479156321Sdamien } 1480156321Sdamien 1481178354Ssam flags = 0; 1482178354Ssam if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1483178354Ssam int prot = IEEE80211_PROT_NONE; 1484178354Ssam if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1485178354Ssam prot = IEEE80211_PROT_RTSCTS; 1486178354Ssam else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1487190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1488178354Ssam prot = ic->ic_protmode; 1489178354Ssam if (prot != IEEE80211_PROT_NONE) { 1490178354Ssam error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1491178354Ssam if (error) { 1492178354Ssam m_freem(m0); 1493178354Ssam return error; 1494178354Ssam } 1495178354Ssam flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1496156321Sdamien } 1497156321Sdamien } 1498156321Sdamien 1499156321Sdamien data = &txq->data[txq->cur]; 1500156321Sdamien desc = &txq->desc[txq->cur]; 1501156321Sdamien 1502156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs, 1503156321Sdamien &nsegs, 0); 1504156321Sdamien if (error != 0 && error != EFBIG) { 1505156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1506156321Sdamien error); 1507156321Sdamien m_freem(m0); 1508156321Sdamien return error; 1509156321Sdamien } 1510156321Sdamien if (error != 0) { 1511243857Sglebius mnew = m_defrag(m0, M_NOWAIT); 1512156321Sdamien if (mnew == NULL) { 1513156321Sdamien device_printf(sc->sc_dev, 1514156321Sdamien "could not defragment mbuf\n"); 1515156321Sdamien m_freem(m0); 1516156321Sdamien return ENOBUFS; 1517156321Sdamien } 1518156321Sdamien m0 = mnew; 1519156321Sdamien 1520156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, 1521156321Sdamien segs, &nsegs, 0); 1522156321Sdamien if (error != 0) { 1523156321Sdamien device_printf(sc->sc_dev, 1524156321Sdamien "could not map mbuf (error %d)\n", error); 1525156321Sdamien m_freem(m0); 1526156321Sdamien return error; 1527156321Sdamien } 1528156321Sdamien 1529156321Sdamien /* packet header have moved, reset our local pointer */ 1530156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1531156321Sdamien } 1532156321Sdamien 1533192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1534156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1535156321Sdamien 1536156321Sdamien tap->wt_flags = 0; 1537156321Sdamien tap->wt_rate = rate; 1538156321Sdamien 1539192468Ssam ieee80211_radiotap_tx(vap, m0); 1540156321Sdamien } 1541156321Sdamien 1542156321Sdamien data->m = m0; 1543156321Sdamien data->ni = ni; 1544156321Sdamien 1545156321Sdamien /* remember link conditions for rate adaptation algorithm */ 1546178354Ssam if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1547178354Ssam data->rix = ni->ni_txrate; 1548178354Ssam /* XXX probably need last rssi value and not avg */ 1549178354Ssam data->rssi = ic->ic_node_getrssi(ni); 1550156321Sdamien } else 1551178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1552156321Sdamien 1553156321Sdamien if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1554156321Sdamien flags |= RT2661_TX_NEED_ACK; 1555156321Sdamien 1556190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1557178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1558156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1559156321Sdamien } 1560156321Sdamien 1561156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1562156321Sdamien nsegs, ac); 1563156321Sdamien 1564156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1565156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1566156321Sdamien 1567178354Ssam DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1568178354Ssam m0->m_pkthdr.len, txq->cur, rate); 1569156321Sdamien 1570156321Sdamien /* kick Tx */ 1571156321Sdamien txq->queued++; 1572156321Sdamien txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1573156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1574156321Sdamien 1575156321Sdamien return 0; 1576156321Sdamien} 1577156321Sdamien 1578287197Sglebiusstatic int 1579287197Sglebiusrt2661_transmit(struct ieee80211com *ic, struct mbuf *m) 1580287197Sglebius{ 1581287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1582287197Sglebius int error; 1583287197Sglebius 1584287197Sglebius RAL_LOCK(sc); 1585287197Sglebius if ((sc->sc_flags & RAL_RUNNING) == 0) { 1586287197Sglebius RAL_UNLOCK(sc); 1587287197Sglebius return (ENXIO); 1588287197Sglebius } 1589287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 1590287197Sglebius if (error) { 1591287197Sglebius RAL_UNLOCK(sc); 1592287197Sglebius return (error); 1593287197Sglebius } 1594287197Sglebius rt2661_start(sc); 1595287197Sglebius RAL_UNLOCK(sc); 1596287197Sglebius 1597287197Sglebius return (0); 1598287197Sglebius} 1599287197Sglebius 1600156321Sdamienstatic void 1601287197Sglebiusrt2661_start(struct rt2661_softc *sc) 1602156321Sdamien{ 1603178354Ssam struct mbuf *m; 1604156321Sdamien struct ieee80211_node *ni; 1605156321Sdamien int ac; 1606156321Sdamien 1607178354Ssam RAL_LOCK_ASSERT(sc); 1608156321Sdamien 1609156975Sdamien /* prevent management frames from being sent if we're not ready */ 1610287197Sglebius if (!(sc->sc_flags & RAL_RUNNING) || sc->sc_invalid) 1611156975Sdamien return; 1612156975Sdamien 1613287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1614178354Ssam ac = M_WME_GETAC(m); 1615178354Ssam if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1616178354Ssam /* there is no place left in this ring */ 1617287197Sglebius mbufq_prepend(&sc->sc_snd, m); 1618178354Ssam break; 1619178354Ssam } 1620178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1621178354Ssam if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1622178354Ssam ieee80211_free_node(ni); 1623287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 1624287197Sglebius IFCOUNTER_OERRORS, 1); 1625178354Ssam break; 1626178354Ssam } 1627178354Ssam sc->sc_tx_timer = 5; 1628178354Ssam } 1629178354Ssam} 1630156321Sdamien 1631178354Ssamstatic int 1632178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1633178354Ssam const struct ieee80211_bpf_params *params) 1634178354Ssam{ 1635178354Ssam struct ieee80211com *ic = ni->ni_ic; 1636287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1637156321Sdamien 1638178354Ssam RAL_LOCK(sc); 1639156321Sdamien 1640178354Ssam /* prevent management frames from being sent if we're not ready */ 1641287197Sglebius if (!(sc->sc_flags & RAL_RUNNING)) { 1642178354Ssam RAL_UNLOCK(sc); 1643178354Ssam m_freem(m); 1644178354Ssam return ENETDOWN; 1645178354Ssam } 1646178354Ssam if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1647178354Ssam RAL_UNLOCK(sc); 1648178354Ssam m_freem(m); 1649178354Ssam return ENOBUFS; /* XXX */ 1650178354Ssam } 1651156321Sdamien 1652178354Ssam /* 1653178354Ssam * Legacy path; interpret frame contents to decide 1654178354Ssam * precisely how to send the frame. 1655178354Ssam * XXX raw path 1656178354Ssam */ 1657178354Ssam if (rt2661_tx_mgt(sc, m, ni) != 0) 1658178354Ssam goto bad; 1659178354Ssam sc->sc_tx_timer = 5; 1660156321Sdamien 1661178354Ssam RAL_UNLOCK(sc); 1662156321Sdamien 1663178354Ssam return 0; 1664178354Ssambad: 1665156321Sdamien RAL_UNLOCK(sc); 1666178354Ssam return EIO; /* XXX */ 1667156321Sdamien} 1668156321Sdamien 1669156321Sdamienstatic void 1670165352Sbmsrt2661_watchdog(void *arg) 1671156321Sdamien{ 1672165352Sbms struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1673156321Sdamien 1674178354Ssam RAL_LOCK_ASSERT(sc); 1675156321Sdamien 1676287197Sglebius KASSERT(sc->sc_flags & RAL_RUNNING, ("not running")); 1677156321Sdamien 1678178354Ssam if (sc->sc_invalid) /* card ejected */ 1679178354Ssam return; 1680156321Sdamien 1681178354Ssam if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1682287197Sglebius device_printf(sc->sc_dev, "device timeout\n"); 1683178354Ssam rt2661_init_locked(sc); 1684287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1685178354Ssam /* NB: callout is reset in rt2661_init() */ 1686178354Ssam return; 1687178354Ssam } 1688178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 1689156321Sdamien} 1690156321Sdamien 1691287197Sglebiusstatic void 1692287197Sglebiusrt2661_parent(struct ieee80211com *ic) 1693156321Sdamien{ 1694287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1695287197Sglebius int startall = 0; 1696156321Sdamien 1697287197Sglebius RAL_LOCK(sc); 1698287197Sglebius if (ic->ic_nrunning > 0) { 1699287197Sglebius if ((sc->sc_flags & RAL_RUNNING) == 0) { 1700287197Sglebius rt2661_init_locked(sc); 1701287197Sglebius startall = 1; 1702287197Sglebius } else 1703287197Sglebius rt2661_update_promisc(ic); 1704287197Sglebius } else if (sc->sc_flags & RAL_RUNNING) 1705287197Sglebius rt2661_stop_locked(sc); 1706287197Sglebius RAL_UNLOCK(sc); 1707287197Sglebius if (startall) 1708287197Sglebius ieee80211_start_all(ic); 1709156321Sdamien} 1710156321Sdamien 1711156321Sdamienstatic void 1712156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1713156321Sdamien{ 1714156321Sdamien uint32_t tmp; 1715156321Sdamien int ntries; 1716156321Sdamien 1717156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1718156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1719156321Sdamien break; 1720156321Sdamien DELAY(1); 1721156321Sdamien } 1722156321Sdamien if (ntries == 100) { 1723156321Sdamien device_printf(sc->sc_dev, "could not write to BBP\n"); 1724156321Sdamien return; 1725156321Sdamien } 1726156321Sdamien 1727156321Sdamien tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1728156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1729156321Sdamien 1730178354Ssam DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1731156321Sdamien} 1732156321Sdamien 1733156321Sdamienstatic uint8_t 1734156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1735156321Sdamien{ 1736156321Sdamien uint32_t val; 1737156321Sdamien int ntries; 1738156321Sdamien 1739156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1740156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1741156321Sdamien break; 1742156321Sdamien DELAY(1); 1743156321Sdamien } 1744156321Sdamien if (ntries == 100) { 1745156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1746156321Sdamien return 0; 1747156321Sdamien } 1748156321Sdamien 1749156321Sdamien val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1750156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1751156321Sdamien 1752156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1753156321Sdamien val = RAL_READ(sc, RT2661_PHY_CSR3); 1754156321Sdamien if (!(val & RT2661_BBP_BUSY)) 1755156321Sdamien return val & 0xff; 1756156321Sdamien DELAY(1); 1757156321Sdamien } 1758156321Sdamien 1759156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1760156321Sdamien return 0; 1761156321Sdamien} 1762156321Sdamien 1763156321Sdamienstatic void 1764156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1765156321Sdamien{ 1766156321Sdamien uint32_t tmp; 1767156321Sdamien int ntries; 1768156321Sdamien 1769156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1770156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1771156321Sdamien break; 1772156321Sdamien DELAY(1); 1773156321Sdamien } 1774156321Sdamien if (ntries == 100) { 1775156321Sdamien device_printf(sc->sc_dev, "could not write to RF\n"); 1776156321Sdamien return; 1777156321Sdamien } 1778156321Sdamien 1779156321Sdamien tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1780156321Sdamien (reg & 3); 1781156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1782156321Sdamien 1783156321Sdamien /* remember last written value in sc */ 1784156321Sdamien sc->rf_regs[reg] = val; 1785156321Sdamien 1786178354Ssam DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1787156321Sdamien} 1788156321Sdamien 1789156321Sdamienstatic int 1790156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1791156321Sdamien{ 1792156321Sdamien if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1793156321Sdamien return EIO; /* there is already a command pending */ 1794156321Sdamien 1795156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1796156321Sdamien RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1797156321Sdamien 1798156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1799156321Sdamien 1800156321Sdamien return 0; 1801156321Sdamien} 1802156321Sdamien 1803156321Sdamienstatic void 1804156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc) 1805156321Sdamien{ 1806156321Sdamien uint8_t bbp4, bbp77; 1807156321Sdamien uint32_t tmp; 1808156321Sdamien 1809156321Sdamien bbp4 = rt2661_bbp_read(sc, 4); 1810156321Sdamien bbp77 = rt2661_bbp_read(sc, 77); 1811156321Sdamien 1812156321Sdamien /* TBD */ 1813156321Sdamien 1814156321Sdamien /* make sure Rx is disabled before switching antenna */ 1815156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1816156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1817156321Sdamien 1818156321Sdamien rt2661_bbp_write(sc, 4, bbp4); 1819156321Sdamien rt2661_bbp_write(sc, 77, bbp77); 1820156321Sdamien 1821156321Sdamien /* restore Rx filter */ 1822156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1823156321Sdamien} 1824156321Sdamien 1825156321Sdamien/* 1826156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates. 1827156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates. 1828156321Sdamien */ 1829156321Sdamienstatic void 1830156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc) 1831156321Sdamien{ 1832287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1833156321Sdamien uint32_t tmp; 1834156321Sdamien 1835156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1836156321Sdamien 1837156321Sdamien tmp &= ~RT2661_MRR_CCK_FALLBACK; 1838178354Ssam if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1839156321Sdamien tmp |= RT2661_MRR_CCK_FALLBACK; 1840156321Sdamien tmp |= RT2661_MRR_ENABLED; 1841156321Sdamien 1842156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1843156321Sdamien} 1844156321Sdamien 1845156321Sdamienstatic void 1846156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc) 1847156321Sdamien{ 1848287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1849156321Sdamien uint32_t tmp; 1850156321Sdamien 1851156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1852156321Sdamien 1853156321Sdamien tmp &= ~RT2661_SHORT_PREAMBLE; 1854178354Ssam if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1855156321Sdamien tmp |= RT2661_SHORT_PREAMBLE; 1856156321Sdamien 1857156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1858156321Sdamien} 1859156321Sdamien 1860156321Sdamienstatic void 1861156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc, 1862156321Sdamien const struct ieee80211_rateset *rs) 1863156321Sdamien{ 1864287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1865156321Sdamien uint32_t mask = 0; 1866156321Sdamien uint8_t rate; 1867220502Sbschmidt int i; 1868156321Sdamien 1869156321Sdamien for (i = 0; i < rs->rs_nrates; i++) { 1870156321Sdamien rate = rs->rs_rates[i]; 1871156321Sdamien 1872156321Sdamien if (!(rate & IEEE80211_RATE_BASIC)) 1873156321Sdamien continue; 1874156321Sdamien 1875288087Sadrian mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, 1876288087Sadrian IEEE80211_RV(rate)); 1877156321Sdamien } 1878156321Sdamien 1879156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1880156321Sdamien 1881178354Ssam DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1882156321Sdamien} 1883156321Sdamien 1884156321Sdamien/* 1885156321Sdamien * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1886156321Sdamien * driver. 1887156321Sdamien */ 1888156321Sdamienstatic void 1889156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1890156321Sdamien{ 1891156321Sdamien uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1892156321Sdamien uint32_t tmp; 1893156321Sdamien 1894156321Sdamien /* update all BBP registers that depend on the band */ 1895156321Sdamien bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1896156321Sdamien bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1897156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) { 1898156321Sdamien bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1899156321Sdamien bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1900156321Sdamien } 1901156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1902156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1903156321Sdamien bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1904156321Sdamien } 1905156321Sdamien 1906156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 1907156321Sdamien rt2661_bbp_write(sc, 96, bbp96); 1908156321Sdamien rt2661_bbp_write(sc, 104, bbp104); 1909156321Sdamien 1910156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1911156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1912156321Sdamien rt2661_bbp_write(sc, 75, 0x80); 1913156321Sdamien rt2661_bbp_write(sc, 86, 0x80); 1914156321Sdamien rt2661_bbp_write(sc, 88, 0x80); 1915156321Sdamien } 1916156321Sdamien 1917156321Sdamien rt2661_bbp_write(sc, 35, bbp35); 1918156321Sdamien rt2661_bbp_write(sc, 97, bbp97); 1919156321Sdamien rt2661_bbp_write(sc, 98, bbp98); 1920156321Sdamien 1921156321Sdamien tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1922156321Sdamien tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1923156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(c)) 1924156321Sdamien tmp |= RT2661_PA_PE_2GHZ; 1925156321Sdamien else 1926156321Sdamien tmp |= RT2661_PA_PE_5GHZ; 1927156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1928156321Sdamien} 1929156321Sdamien 1930156321Sdamienstatic void 1931156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1932156321Sdamien{ 1933287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1934156321Sdamien const struct rfprog *rfprog; 1935156321Sdamien uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1936156321Sdamien int8_t power; 1937156321Sdamien u_int i, chan; 1938156321Sdamien 1939156321Sdamien chan = ieee80211_chan2ieee(ic, c); 1940178354Ssam KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1941156321Sdamien 1942156321Sdamien /* select the appropriate RF settings based on what EEPROM says */ 1943156321Sdamien rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1944156321Sdamien 1945156321Sdamien /* find the settings for this channel (we know it exists) */ 1946156321Sdamien for (i = 0; rfprog[i].chan != chan; i++); 1947156321Sdamien 1948156321Sdamien power = sc->txpow[i]; 1949156321Sdamien if (power < 0) { 1950156321Sdamien bbp94 += power; 1951156321Sdamien power = 0; 1952156321Sdamien } else if (power > 31) { 1953156321Sdamien bbp94 += power - 31; 1954156321Sdamien power = 31; 1955156321Sdamien } 1956156321Sdamien 1957156321Sdamien /* 1958156321Sdamien * If we are switching from the 2GHz band to the 5GHz band or 1959156321Sdamien * vice-versa, BBP registers need to be reprogrammed. 1960156321Sdamien */ 1961156321Sdamien if (c->ic_flags != sc->sc_curchan->ic_flags) { 1962156321Sdamien rt2661_select_band(sc, c); 1963156321Sdamien rt2661_select_antenna(sc); 1964156321Sdamien } 1965156321Sdamien sc->sc_curchan = c; 1966156321Sdamien 1967156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1968156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1969156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 1970156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1971156321Sdamien 1972156321Sdamien DELAY(200); 1973156321Sdamien 1974156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1975156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1976156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 1977156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1978156321Sdamien 1979156321Sdamien DELAY(200); 1980156321Sdamien 1981156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1982156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1983156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 1984156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1985156321Sdamien 1986156321Sdamien /* enable smart mode for MIMO-capable RFs */ 1987156321Sdamien bbp3 = rt2661_bbp_read(sc, 3); 1988156321Sdamien 1989156321Sdamien bbp3 &= ~RT2661_SMART_MODE; 1990156321Sdamien if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 1991156321Sdamien bbp3 |= RT2661_SMART_MODE; 1992156321Sdamien 1993156321Sdamien rt2661_bbp_write(sc, 3, bbp3); 1994156321Sdamien 1995156321Sdamien if (bbp94 != RT2661_BBPR94_DEFAULT) 1996156321Sdamien rt2661_bbp_write(sc, 94, bbp94); 1997156321Sdamien 1998156321Sdamien /* 5GHz radio needs a 1ms delay here */ 1999156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) 2000156321Sdamien DELAY(1000); 2001156321Sdamien} 2002156321Sdamien 2003156321Sdamienstatic void 2004156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2005156321Sdamien{ 2006156321Sdamien uint32_t tmp; 2007156321Sdamien 2008156321Sdamien tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2009156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2010156321Sdamien 2011156321Sdamien tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2012156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2013156321Sdamien} 2014156321Sdamien 2015156321Sdamienstatic void 2016156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2017156321Sdamien{ 2018156321Sdamien uint32_t tmp; 2019156321Sdamien 2020156321Sdamien tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2021156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2022156321Sdamien 2023156321Sdamien tmp = addr[4] | addr[5] << 8; 2024156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2025156321Sdamien} 2026156321Sdamien 2027156321Sdamienstatic void 2028283540Sglebiusrt2661_update_promisc(struct ieee80211com *ic) 2029156321Sdamien{ 2030283540Sglebius struct rt2661_softc *sc = ic->ic_softc; 2031156321Sdamien uint32_t tmp; 2032156321Sdamien 2033156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2034156321Sdamien 2035156321Sdamien tmp &= ~RT2661_DROP_NOT_TO_ME; 2036287197Sglebius if (ic->ic_promisc == 0) 2037156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2038156321Sdamien 2039156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2040156321Sdamien 2041283540Sglebius DPRINTF(sc, "%s promiscuous mode\n", 2042287197Sglebius (ic->ic_promisc > 0) ? "entering" : "leaving"); 2043156321Sdamien} 2044156321Sdamien 2045156321Sdamien/* 2046156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring. 2047156321Sdamien */ 2048156321Sdamienstatic int 2049156321Sdamienrt2661_wme_update(struct ieee80211com *ic) 2050156321Sdamien{ 2051287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2052156321Sdamien const struct wmeParams *wmep; 2053156321Sdamien 2054156321Sdamien wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2055156321Sdamien 2056156321Sdamien /* XXX: not sure about shifts. */ 2057156321Sdamien /* XXX: the reference driver plays with AC_VI settings too. */ 2058156321Sdamien 2059156321Sdamien /* update TxOp */ 2060156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2061156321Sdamien wmep[WME_AC_BE].wmep_txopLimit << 16 | 2062156321Sdamien wmep[WME_AC_BK].wmep_txopLimit); 2063156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2064156321Sdamien wmep[WME_AC_VI].wmep_txopLimit << 16 | 2065156321Sdamien wmep[WME_AC_VO].wmep_txopLimit); 2066156321Sdamien 2067156321Sdamien /* update CWmin */ 2068156321Sdamien RAL_WRITE(sc, RT2661_CWMIN_CSR, 2069156321Sdamien wmep[WME_AC_BE].wmep_logcwmin << 12 | 2070156321Sdamien wmep[WME_AC_BK].wmep_logcwmin << 8 | 2071156321Sdamien wmep[WME_AC_VI].wmep_logcwmin << 4 | 2072156321Sdamien wmep[WME_AC_VO].wmep_logcwmin); 2073156321Sdamien 2074156321Sdamien /* update CWmax */ 2075156321Sdamien RAL_WRITE(sc, RT2661_CWMAX_CSR, 2076156321Sdamien wmep[WME_AC_BE].wmep_logcwmax << 12 | 2077156321Sdamien wmep[WME_AC_BK].wmep_logcwmax << 8 | 2078156321Sdamien wmep[WME_AC_VI].wmep_logcwmax << 4 | 2079156321Sdamien wmep[WME_AC_VO].wmep_logcwmax); 2080156321Sdamien 2081156321Sdamien /* update Aifsn */ 2082156321Sdamien RAL_WRITE(sc, RT2661_AIFSN_CSR, 2083156321Sdamien wmep[WME_AC_BE].wmep_aifsn << 12 | 2084156321Sdamien wmep[WME_AC_BK].wmep_aifsn << 8 | 2085156321Sdamien wmep[WME_AC_VI].wmep_aifsn << 4 | 2086156321Sdamien wmep[WME_AC_VO].wmep_aifsn); 2087156321Sdamien 2088156321Sdamien return 0; 2089156321Sdamien} 2090156321Sdamien 2091156321Sdamienstatic void 2092283540Sglebiusrt2661_update_slot(struct ieee80211com *ic) 2093156321Sdamien{ 2094283540Sglebius struct rt2661_softc *sc = ic->ic_softc; 2095156321Sdamien uint8_t slottime; 2096156321Sdamien uint32_t tmp; 2097156321Sdamien 2098292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 2099156321Sdamien 2100156321Sdamien tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2101156321Sdamien tmp = (tmp & ~0xff) | slottime; 2102156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2103156321Sdamien} 2104156321Sdamien 2105156321Sdamienstatic const char * 2106156321Sdamienrt2661_get_rf(int rev) 2107156321Sdamien{ 2108156321Sdamien switch (rev) { 2109156321Sdamien case RT2661_RF_5225: return "RT5225"; 2110156321Sdamien case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2111156321Sdamien case RT2661_RF_2527: return "RT2527"; 2112156321Sdamien case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2113156321Sdamien default: return "unknown"; 2114156321Sdamien } 2115156321Sdamien} 2116156321Sdamien 2117156321Sdamienstatic void 2118190526Ssamrt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2119156321Sdamien{ 2120156321Sdamien uint16_t val; 2121156321Sdamien int i; 2122156321Sdamien 2123156321Sdamien /* read MAC address */ 2124156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2125190526Ssam macaddr[0] = val & 0xff; 2126190526Ssam macaddr[1] = val >> 8; 2127156321Sdamien 2128156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2129190526Ssam macaddr[2] = val & 0xff; 2130190526Ssam macaddr[3] = val >> 8; 2131156321Sdamien 2132156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2133190526Ssam macaddr[4] = val & 0xff; 2134190526Ssam macaddr[5] = val >> 8; 2135156321Sdamien 2136156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2137156321Sdamien /* XXX: test if different from 0xffff? */ 2138156321Sdamien sc->rf_rev = (val >> 11) & 0x1f; 2139156321Sdamien sc->hw_radio = (val >> 10) & 0x1; 2140156321Sdamien sc->rx_ant = (val >> 4) & 0x3; 2141156321Sdamien sc->tx_ant = (val >> 2) & 0x3; 2142156321Sdamien sc->nb_ant = val & 0x3; 2143156321Sdamien 2144178354Ssam DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2145156321Sdamien 2146156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2147156321Sdamien sc->ext_5ghz_lna = (val >> 6) & 0x1; 2148156321Sdamien sc->ext_2ghz_lna = (val >> 4) & 0x1; 2149156321Sdamien 2150178354Ssam DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2151178354Ssam sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2152156321Sdamien 2153156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2154156321Sdamien if ((val & 0xff) != 0xff) 2155156321Sdamien sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2156156321Sdamien 2157170530Ssam /* Only [-10, 10] is valid */ 2158170530Ssam if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2159170530Ssam sc->rssi_2ghz_corr = 0; 2160170530Ssam 2161156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2162156321Sdamien if ((val & 0xff) != 0xff) 2163156321Sdamien sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2164156321Sdamien 2165170530Ssam /* Only [-10, 10] is valid */ 2166170530Ssam if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2167170530Ssam sc->rssi_5ghz_corr = 0; 2168170530Ssam 2169156321Sdamien /* adjust RSSI correction for external low-noise amplifier */ 2170156321Sdamien if (sc->ext_2ghz_lna) 2171156321Sdamien sc->rssi_2ghz_corr -= 14; 2172156321Sdamien if (sc->ext_5ghz_lna) 2173156321Sdamien sc->rssi_5ghz_corr -= 14; 2174156321Sdamien 2175178354Ssam DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2176178354Ssam sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2177156321Sdamien 2178156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2179156321Sdamien if ((val >> 8) != 0xff) 2180156321Sdamien sc->rfprog = (val >> 8) & 0x3; 2181156321Sdamien if ((val & 0xff) != 0xff) 2182156321Sdamien sc->rffreq = val & 0xff; 2183156321Sdamien 2184178354Ssam DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2185156321Sdamien 2186156321Sdamien /* read Tx power for all a/b/g channels */ 2187156321Sdamien for (i = 0; i < 19; i++) { 2188156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2189156321Sdamien sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2190178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2191178354Ssam rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2192156321Sdamien sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2193178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2194178354Ssam rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2195156321Sdamien } 2196156321Sdamien 2197156321Sdamien /* read vendor-specific BBP values */ 2198156321Sdamien for (i = 0; i < 16; i++) { 2199156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2200156321Sdamien if (val == 0 || val == 0xffff) 2201156321Sdamien continue; /* skip invalid entries */ 2202156321Sdamien sc->bbp_prom[i].reg = val >> 8; 2203156321Sdamien sc->bbp_prom[i].val = val & 0xff; 2204178354Ssam DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2205178354Ssam sc->bbp_prom[i].val); 2206156321Sdamien } 2207156321Sdamien} 2208156321Sdamien 2209156321Sdamienstatic int 2210156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc) 2211156321Sdamien{ 2212156321Sdamien int i, ntries; 2213156321Sdamien uint8_t val; 2214156321Sdamien 2215156321Sdamien /* wait for BBP to be ready */ 2216156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 2217156321Sdamien val = rt2661_bbp_read(sc, 0); 2218156321Sdamien if (val != 0 && val != 0xff) 2219156321Sdamien break; 2220156321Sdamien DELAY(100); 2221156321Sdamien } 2222156321Sdamien if (ntries == 100) { 2223156321Sdamien device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2224156321Sdamien return EIO; 2225156321Sdamien } 2226156321Sdamien 2227156321Sdamien /* initialize BBP registers to default values */ 2228288087Sadrian for (i = 0; i < nitems(rt2661_def_bbp); i++) { 2229156321Sdamien rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2230156321Sdamien rt2661_def_bbp[i].val); 2231156321Sdamien } 2232156321Sdamien 2233156321Sdamien /* write vendor-specific BBP values (from EEPROM) */ 2234156321Sdamien for (i = 0; i < 16; i++) { 2235156321Sdamien if (sc->bbp_prom[i].reg == 0) 2236156321Sdamien continue; 2237156321Sdamien rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2238156321Sdamien } 2239156321Sdamien 2240156321Sdamien return 0; 2241156321Sdamien} 2242156321Sdamien 2243156321Sdamienstatic void 2244178354Ssamrt2661_init_locked(struct rt2661_softc *sc) 2245156321Sdamien{ 2246287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2247287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2248156321Sdamien uint32_t tmp, sta[3]; 2249178354Ssam int i, error, ntries; 2250156321Sdamien 2251178354Ssam RAL_LOCK_ASSERT(sc); 2252156975Sdamien 2253178354Ssam if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2254178354Ssam error = rt2661_load_microcode(sc); 2255178354Ssam if (error != 0) { 2256287197Sglebius device_printf(sc->sc_dev, 2257178354Ssam "%s: could not load 8051 microcode, error %d\n", 2258178354Ssam __func__, error); 2259178354Ssam return; 2260178354Ssam } 2261178354Ssam sc->sc_flags |= RAL_FW_LOADED; 2262178354Ssam } 2263178354Ssam 2264170530Ssam rt2661_stop_locked(sc); 2265156321Sdamien 2266156321Sdamien /* initialize Tx rings */ 2267156321Sdamien RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2268156321Sdamien RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2269156321Sdamien RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2270156321Sdamien RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2271156321Sdamien 2272156321Sdamien /* initialize Mgt ring */ 2273156321Sdamien RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2274156321Sdamien 2275156321Sdamien /* initialize Rx ring */ 2276156321Sdamien RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2277156321Sdamien 2278156321Sdamien /* initialize Tx rings sizes */ 2279156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2280156321Sdamien RT2661_TX_RING_COUNT << 24 | 2281156321Sdamien RT2661_TX_RING_COUNT << 16 | 2282156321Sdamien RT2661_TX_RING_COUNT << 8 | 2283156321Sdamien RT2661_TX_RING_COUNT); 2284156321Sdamien 2285156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2286156321Sdamien RT2661_TX_DESC_WSIZE << 16 | 2287156321Sdamien RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2288156321Sdamien RT2661_MGT_RING_COUNT); 2289156321Sdamien 2290156321Sdamien /* initialize Rx rings */ 2291156321Sdamien RAL_WRITE(sc, RT2661_RX_RING_CSR, 2292156321Sdamien RT2661_RX_DESC_BACK << 16 | 2293156321Sdamien RT2661_RX_DESC_WSIZE << 8 | 2294156321Sdamien RT2661_RX_RING_COUNT); 2295156321Sdamien 2296156321Sdamien /* XXX: some magic here */ 2297156321Sdamien RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2298156321Sdamien 2299156321Sdamien /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2300156321Sdamien RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2301156321Sdamien 2302156321Sdamien /* load base address of Rx ring */ 2303156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2304156321Sdamien 2305156321Sdamien /* initialize MAC registers to default values */ 2306288087Sadrian for (i = 0; i < nitems(rt2661_def_mac); i++) 2307156321Sdamien RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2308156321Sdamien 2309287197Sglebius rt2661_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2310156321Sdamien 2311156321Sdamien /* set host ready */ 2312156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2313156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2314156321Sdamien 2315156321Sdamien /* wait for BBP/RF to wakeup */ 2316156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 2317156321Sdamien if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2318156321Sdamien break; 2319156321Sdamien DELAY(1000); 2320156321Sdamien } 2321156321Sdamien if (ntries == 1000) { 2322156321Sdamien printf("timeout waiting for BBP/RF to wakeup\n"); 2323170530Ssam rt2661_stop_locked(sc); 2324156321Sdamien return; 2325156321Sdamien } 2326156321Sdamien 2327156321Sdamien if (rt2661_bbp_init(sc) != 0) { 2328170530Ssam rt2661_stop_locked(sc); 2329156321Sdamien return; 2330156321Sdamien } 2331156321Sdamien 2332156321Sdamien /* select default channel */ 2333156321Sdamien sc->sc_curchan = ic->ic_curchan; 2334156321Sdamien rt2661_select_band(sc, sc->sc_curchan); 2335156321Sdamien rt2661_select_antenna(sc); 2336156321Sdamien rt2661_set_chan(sc, sc->sc_curchan); 2337156321Sdamien 2338156321Sdamien /* update Rx filter */ 2339156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2340156321Sdamien 2341156321Sdamien tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2342156321Sdamien if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2343156321Sdamien tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2344156321Sdamien RT2661_DROP_ACKCTS; 2345195618Srpaulo if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2346195618Srpaulo ic->ic_opmode != IEEE80211_M_MBSS) 2347156321Sdamien tmp |= RT2661_DROP_TODS; 2348287197Sglebius if (ic->ic_promisc == 0) 2349156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2350156321Sdamien } 2351156321Sdamien 2352156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2353156321Sdamien 2354156321Sdamien /* clear STA registers */ 2355288087Sadrian RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, nitems(sta)); 2356156321Sdamien 2357156321Sdamien /* initialize ASIC */ 2358156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2359156321Sdamien 2360156321Sdamien /* clear any pending interrupt */ 2361156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2362156321Sdamien 2363156321Sdamien /* enable interrupts */ 2364156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2365156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2366156321Sdamien 2367156321Sdamien /* kick Rx */ 2368156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2369156321Sdamien 2370287197Sglebius sc->sc_flags |= RAL_RUNNING; 2371156321Sdamien 2372178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 2373156321Sdamien} 2374156321Sdamien 2375178354Ssamstatic void 2376178354Ssamrt2661_init(void *priv) 2377156321Sdamien{ 2378156321Sdamien struct rt2661_softc *sc = priv; 2379287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2380170530Ssam 2381170530Ssam RAL_LOCK(sc); 2382178354Ssam rt2661_init_locked(sc); 2383170530Ssam RAL_UNLOCK(sc); 2384178354Ssam 2385287197Sglebius if (sc->sc_flags & RAL_RUNNING) 2386178931Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2387170530Ssam} 2388170530Ssam 2389170530Ssamvoid 2390170530Ssamrt2661_stop_locked(struct rt2661_softc *sc) 2391170530Ssam{ 2392287197Sglebius volatile int *flags = &sc->sc_flags; 2393286437Sadrian uint32_t tmp; 2394156321Sdamien 2395178354Ssam while (*flags & RAL_INPUT_RUNNING) 2396170530Ssam msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2397156321Sdamien 2398178354Ssam callout_stop(&sc->watchdog_ch); 2399178354Ssam sc->sc_tx_timer = 0; 2400178354Ssam 2401287197Sglebius if (sc->sc_flags & RAL_RUNNING) { 2402287197Sglebius sc->sc_flags &= ~RAL_RUNNING; 2403178354Ssam 2404170530Ssam /* abort Tx (for all 5 Tx rings) */ 2405170530Ssam RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2406170530Ssam 2407170530Ssam /* disable Rx (value remains after reset!) */ 2408170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2409170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2410170530Ssam 2411170530Ssam /* reset ASIC */ 2412170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2413170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2414170530Ssam 2415170530Ssam /* disable interrupts */ 2416170530Ssam RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2417170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2418170530Ssam 2419170530Ssam /* clear any pending interrupt */ 2420170530Ssam RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2421170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2422170530Ssam 2423170530Ssam /* reset Tx and Rx rings */ 2424170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[0]); 2425170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[1]); 2426170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[2]); 2427170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[3]); 2428170530Ssam rt2661_reset_tx_ring(sc, &sc->mgtq); 2429170530Ssam rt2661_reset_rx_ring(sc, &sc->rxq); 2430170530Ssam } 2431156321Sdamien} 2432156321Sdamien 2433178354Ssamvoid 2434178354Ssamrt2661_stop(void *priv) 2435178354Ssam{ 2436178354Ssam struct rt2661_softc *sc = priv; 2437178354Ssam 2438178354Ssam RAL_LOCK(sc); 2439178354Ssam rt2661_stop_locked(sc); 2440178354Ssam RAL_UNLOCK(sc); 2441178354Ssam} 2442178354Ssam 2443156321Sdamienstatic int 2444178354Ssamrt2661_load_microcode(struct rt2661_softc *sc) 2445156321Sdamien{ 2446178354Ssam const struct firmware *fp; 2447178354Ssam const char *imagename; 2448178354Ssam int ntries, error; 2449156321Sdamien 2450178354Ssam RAL_LOCK_ASSERT(sc); 2451178354Ssam 2452178354Ssam switch (sc->sc_id) { 2453178354Ssam case 0x0301: imagename = "rt2561sfw"; break; 2454178354Ssam case 0x0302: imagename = "rt2561fw"; break; 2455178354Ssam case 0x0401: imagename = "rt2661fw"; break; 2456178354Ssam default: 2457287197Sglebius device_printf(sc->sc_dev, "%s: unexpected pci device id 0x%x, " 2458178354Ssam "don't know how to retrieve firmware\n", 2459178354Ssam __func__, sc->sc_id); 2460178354Ssam return EINVAL; 2461178354Ssam } 2462178354Ssam RAL_UNLOCK(sc); 2463178354Ssam fp = firmware_get(imagename); 2464178354Ssam RAL_LOCK(sc); 2465178354Ssam if (fp == NULL) { 2466287197Sglebius device_printf(sc->sc_dev, 2467287197Sglebius "%s: unable to retrieve firmware image %s\n", 2468178354Ssam __func__, imagename); 2469178354Ssam return EINVAL; 2470178354Ssam } 2471178354Ssam 2472178354Ssam /* 2473178354Ssam * Load 8051 microcode into NIC. 2474178354Ssam */ 2475156321Sdamien /* reset 8051 */ 2476156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2477156321Sdamien 2478156321Sdamien /* cancel any pending Host to MCU command */ 2479156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2480156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2481156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2482156321Sdamien 2483156321Sdamien /* write 8051's microcode */ 2484156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2485178354Ssam RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2486156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2487156321Sdamien 2488156321Sdamien /* kick 8051's ass */ 2489156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2490156321Sdamien 2491156321Sdamien /* wait for 8051 to initialize */ 2492156321Sdamien for (ntries = 0; ntries < 500; ntries++) { 2493156321Sdamien if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2494156321Sdamien break; 2495156321Sdamien DELAY(100); 2496156321Sdamien } 2497156321Sdamien if (ntries == 500) { 2498287197Sglebius device_printf(sc->sc_dev, 2499287197Sglebius "%s: timeout waiting for MCU to initialize\n", __func__); 2500178354Ssam error = EIO; 2501178354Ssam } else 2502178354Ssam error = 0; 2503178354Ssam 2504178354Ssam firmware_put(fp, FIRMWARE_UNLOAD); 2505178354Ssam return error; 2506156321Sdamien} 2507156321Sdamien 2508156321Sdamien#ifdef notyet 2509156321Sdamien/* 2510156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2511156321Sdamien * false CCA count. This function is called periodically (every seconds) when 2512156321Sdamien * in the RUN state. Values taken from the reference driver. 2513156321Sdamien */ 2514156321Sdamienstatic void 2515156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc) 2516156321Sdamien{ 2517156321Sdamien uint8_t bbp17; 2518156321Sdamien uint16_t cca; 2519156321Sdamien int lo, hi, dbm; 2520156321Sdamien 2521156321Sdamien /* 2522156321Sdamien * Tuning range depends on operating band and on the presence of an 2523156321Sdamien * external low-noise amplifier. 2524156321Sdamien */ 2525156321Sdamien lo = 0x20; 2526156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2527156321Sdamien lo += 0x08; 2528156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2529156321Sdamien (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2530156321Sdamien lo += 0x10; 2531156321Sdamien hi = lo + 0x20; 2532156321Sdamien 2533156321Sdamien /* retrieve false CCA count since last call (clear on read) */ 2534156321Sdamien cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2535156321Sdamien 2536156321Sdamien if (dbm >= -35) { 2537156321Sdamien bbp17 = 0x60; 2538156321Sdamien } else if (dbm >= -58) { 2539156321Sdamien bbp17 = hi; 2540156321Sdamien } else if (dbm >= -66) { 2541156321Sdamien bbp17 = lo + 0x10; 2542156321Sdamien } else if (dbm >= -74) { 2543156321Sdamien bbp17 = lo + 0x08; 2544156321Sdamien } else { 2545156321Sdamien /* RSSI < -74dBm, tune using false CCA count */ 2546156321Sdamien 2547156321Sdamien bbp17 = sc->bbp17; /* current value */ 2548156321Sdamien 2549156321Sdamien hi -= 2 * (-74 - dbm); 2550156321Sdamien if (hi < lo) 2551156321Sdamien hi = lo; 2552156321Sdamien 2553156321Sdamien if (bbp17 > hi) { 2554156321Sdamien bbp17 = hi; 2555156321Sdamien 2556156321Sdamien } else if (cca > 512) { 2557156321Sdamien if (++bbp17 > hi) 2558156321Sdamien bbp17 = hi; 2559156321Sdamien } else if (cca < 100) { 2560156321Sdamien if (--bbp17 < lo) 2561156321Sdamien bbp17 = lo; 2562156321Sdamien } 2563156321Sdamien } 2564156321Sdamien 2565156321Sdamien if (bbp17 != sc->bbp17) { 2566156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2567156321Sdamien sc->bbp17 = bbp17; 2568156321Sdamien } 2569156321Sdamien} 2570156321Sdamien 2571156321Sdamien/* 2572156321Sdamien * Enter/Leave radar detection mode. 2573156321Sdamien * This is for 802.11h additional regulatory domains. 2574156321Sdamien */ 2575156321Sdamienstatic void 2576156321Sdamienrt2661_radar_start(struct rt2661_softc *sc) 2577156321Sdamien{ 2578156321Sdamien uint32_t tmp; 2579156321Sdamien 2580156321Sdamien /* disable Rx */ 2581156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2582156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2583156321Sdamien 2584156321Sdamien rt2661_bbp_write(sc, 82, 0x20); 2585156321Sdamien rt2661_bbp_write(sc, 83, 0x00); 2586156321Sdamien rt2661_bbp_write(sc, 84, 0x40); 2587156321Sdamien 2588156321Sdamien /* save current BBP registers values */ 2589156321Sdamien sc->bbp18 = rt2661_bbp_read(sc, 18); 2590156321Sdamien sc->bbp21 = rt2661_bbp_read(sc, 21); 2591156321Sdamien sc->bbp22 = rt2661_bbp_read(sc, 22); 2592156321Sdamien sc->bbp16 = rt2661_bbp_read(sc, 16); 2593156321Sdamien sc->bbp17 = rt2661_bbp_read(sc, 17); 2594156321Sdamien sc->bbp64 = rt2661_bbp_read(sc, 64); 2595156321Sdamien 2596156321Sdamien rt2661_bbp_write(sc, 18, 0xff); 2597156321Sdamien rt2661_bbp_write(sc, 21, 0x3f); 2598156321Sdamien rt2661_bbp_write(sc, 22, 0x3f); 2599156321Sdamien rt2661_bbp_write(sc, 16, 0xbd); 2600156321Sdamien rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2601156321Sdamien rt2661_bbp_write(sc, 64, 0x21); 2602156321Sdamien 2603156321Sdamien /* restore Rx filter */ 2604156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2605156321Sdamien} 2606156321Sdamien 2607156321Sdamienstatic int 2608156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc) 2609156321Sdamien{ 2610156321Sdamien uint8_t bbp66; 2611156321Sdamien 2612156321Sdamien /* read radar detection result */ 2613156321Sdamien bbp66 = rt2661_bbp_read(sc, 66); 2614156321Sdamien 2615156321Sdamien /* restore BBP registers values */ 2616156321Sdamien rt2661_bbp_write(sc, 16, sc->bbp16); 2617156321Sdamien rt2661_bbp_write(sc, 17, sc->bbp17); 2618156321Sdamien rt2661_bbp_write(sc, 18, sc->bbp18); 2619156321Sdamien rt2661_bbp_write(sc, 21, sc->bbp21); 2620156321Sdamien rt2661_bbp_write(sc, 22, sc->bbp22); 2621156321Sdamien rt2661_bbp_write(sc, 64, sc->bbp64); 2622156321Sdamien 2623156321Sdamien return bbp66 == 1; 2624156321Sdamien} 2625156321Sdamien#endif 2626156321Sdamien 2627156321Sdamienstatic int 2628178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2629156321Sdamien{ 2630178354Ssam struct ieee80211com *ic = vap->iv_ic; 2631156321Sdamien struct rt2661_tx_desc desc; 2632156321Sdamien struct mbuf *m0; 2633156321Sdamien int rate; 2634156321Sdamien 2635288636Sadrian if ((m0 = ieee80211_beacon_alloc(vap->iv_bss))== NULL) { 2636156321Sdamien device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2637156321Sdamien return ENOBUFS; 2638156321Sdamien } 2639156321Sdamien 2640156321Sdamien /* send beacons at the lowest available rate */ 2641178354Ssam rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2642156321Sdamien 2643156321Sdamien rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2644156321Sdamien m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2645156321Sdamien 2646156321Sdamien /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2647156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2648156321Sdamien 2649156321Sdamien /* copy beacon header and payload into NIC memory */ 2650156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2651156321Sdamien mtod(m0, uint8_t *), m0->m_pkthdr.len); 2652156321Sdamien 2653156321Sdamien m_freem(m0); 2654156321Sdamien 2655156321Sdamien return 0; 2656156321Sdamien} 2657156321Sdamien 2658156321Sdamien/* 2659156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2660156321Sdamien * and HostAP operating modes. 2661156321Sdamien */ 2662156321Sdamienstatic void 2663156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc) 2664156321Sdamien{ 2665287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2666178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2667156321Sdamien uint32_t tmp; 2668156321Sdamien 2669178354Ssam if (vap->iv_opmode != IEEE80211_M_STA) { 2670156321Sdamien /* 2671156321Sdamien * Change default 16ms TBTT adjustment to 8ms. 2672156321Sdamien * Must be done before enabling beacon generation. 2673156321Sdamien */ 2674156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2675156321Sdamien } 2676156321Sdamien 2677156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2678156321Sdamien 2679156321Sdamien /* set beacon interval (in 1/16ms unit) */ 2680178354Ssam tmp |= vap->iv_bss->ni_intval * 16; 2681156321Sdamien 2682156321Sdamien tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2683178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2684156321Sdamien tmp |= RT2661_TSF_MODE(1); 2685156321Sdamien else 2686156321Sdamien tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2687156321Sdamien 2688156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2689156321Sdamien} 2690156321Sdamien 2691192468Ssamstatic void 2692192468Ssamrt2661_enable_tsf(struct rt2661_softc *sc) 2693192468Ssam{ 2694192468Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, 2695192468Ssam (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2696192468Ssam | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2697192468Ssam} 2698192468Ssam 2699156321Sdamien/* 2700156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values 2701156321Sdamien * contained in Rx descriptors. The computation depends on which band the 2702156321Sdamien * frame was received. Correction values taken from the reference driver. 2703156321Sdamien */ 2704156321Sdamienstatic int 2705156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2706156321Sdamien{ 2707156321Sdamien int lna, agc, rssi; 2708156321Sdamien 2709156321Sdamien lna = (raw >> 5) & 0x3; 2710156321Sdamien agc = raw & 0x1f; 2711156321Sdamien 2712170530Ssam if (lna == 0) { 2713170530Ssam /* 2714170530Ssam * No mapping available. 2715170530Ssam * 2716170530Ssam * NB: Since RSSI is relative to noise floor, -1 is 2717170530Ssam * adequate for caller to know error happened. 2718170530Ssam */ 2719170530Ssam return -1; 2720170530Ssam } 2721156321Sdamien 2722170530Ssam rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2723170530Ssam 2724156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2725156321Sdamien rssi += sc->rssi_2ghz_corr; 2726156321Sdamien 2727156321Sdamien if (lna == 1) 2728156321Sdamien rssi -= 64; 2729156321Sdamien else if (lna == 2) 2730156321Sdamien rssi -= 74; 2731156321Sdamien else if (lna == 3) 2732156321Sdamien rssi -= 90; 2733156321Sdamien } else { 2734156321Sdamien rssi += sc->rssi_5ghz_corr; 2735156321Sdamien 2736156321Sdamien if (lna == 1) 2737156321Sdamien rssi -= 64; 2738156321Sdamien else if (lna == 2) 2739156321Sdamien rssi -= 86; 2740156321Sdamien else if (lna == 3) 2741156321Sdamien rssi -= 100; 2742156321Sdamien } 2743156321Sdamien return rssi; 2744156321Sdamien} 2745170530Ssam 2746170530Ssamstatic void 2747170530Ssamrt2661_scan_start(struct ieee80211com *ic) 2748170530Ssam{ 2749287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2750170530Ssam uint32_t tmp; 2751170530Ssam 2752170530Ssam /* abort TSF synchronization */ 2753170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2754170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2755287197Sglebius rt2661_set_bssid(sc, ieee80211broadcastaddr); 2756170530Ssam} 2757170530Ssam 2758170530Ssamstatic void 2759170530Ssamrt2661_scan_end(struct ieee80211com *ic) 2760170530Ssam{ 2761287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2762178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2763170530Ssam 2764170530Ssam rt2661_enable_tsf_sync(sc); 2765170530Ssam /* XXX keep local copy */ 2766178354Ssam rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2767170530Ssam} 2768170530Ssam 2769170530Ssamstatic void 2770300752Savosrt2661_getradiocaps(struct ieee80211com *ic, 2771300752Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 2772300752Savos{ 2773300752Savos struct rt2661_softc *sc = ic->ic_softc; 2774300752Savos uint8_t bands[IEEE80211_MODE_BYTES]; 2775300752Savos 2776300752Savos memset(bands, 0, sizeof(bands)); 2777300752Savos setbit(bands, IEEE80211_MODE_11B); 2778300752Savos setbit(bands, IEEE80211_MODE_11G); 2779300752Savos ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 2780300752Savos rt2661_chan_2ghz, nitems(rt2661_chan_2ghz), bands, 0); 2781300752Savos 2782300752Savos if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) { 2783300752Savos setbit(bands, IEEE80211_MODE_11A); 2784300752Savos ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, 2785300752Savos rt2661_chan_5ghz, nitems(rt2661_chan_5ghz), bands, 0); 2786300752Savos } 2787300752Savos} 2788300752Savos 2789300752Savosstatic void 2790170530Ssamrt2661_set_channel(struct ieee80211com *ic) 2791170530Ssam{ 2792287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2793170530Ssam 2794170530Ssam RAL_LOCK(sc); 2795170530Ssam rt2661_set_chan(sc, ic->ic_curchan); 2796170530Ssam RAL_UNLOCK(sc); 2797170530Ssam 2798170530Ssam} 2799