rt2661.c revision 288087
1156321Sdamien/* $FreeBSD: head/sys/dev/ral/rt2661.c 288087 2015-09-22 02:44:59Z adrian $ */ 2156321Sdamien 3156321Sdamien/*- 4156321Sdamien * Copyright (c) 2006 5156321Sdamien * Damien Bergamini <damien.bergamini@free.fr> 6156321Sdamien * 7156321Sdamien * Permission to use, copy, modify, and distribute this software for any 8156321Sdamien * purpose with or without fee is hereby granted, provided that the above 9156321Sdamien * copyright notice and this permission notice appear in all copies. 10156321Sdamien * 11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18156321Sdamien */ 19156321Sdamien 20156321Sdamien#include <sys/cdefs.h> 21156321Sdamien__FBSDID("$FreeBSD: head/sys/dev/ral/rt2661.c 288087 2015-09-22 02:44:59Z adrian $"); 22156321Sdamien 23156321Sdamien/*- 24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 25156321Sdamien * http://www.ralinktech.com/ 26156321Sdamien */ 27156321Sdamien 28156321Sdamien#include <sys/param.h> 29156321Sdamien#include <sys/sysctl.h> 30156321Sdamien#include <sys/sockio.h> 31156321Sdamien#include <sys/mbuf.h> 32156321Sdamien#include <sys/kernel.h> 33156321Sdamien#include <sys/socket.h> 34156321Sdamien#include <sys/systm.h> 35156321Sdamien#include <sys/malloc.h> 36164982Skevlo#include <sys/lock.h> 37164982Skevlo#include <sys/mutex.h> 38156321Sdamien#include <sys/module.h> 39156321Sdamien#include <sys/bus.h> 40156321Sdamien#include <sys/endian.h> 41178354Ssam#include <sys/firmware.h> 42156321Sdamien 43156321Sdamien#include <machine/bus.h> 44156321Sdamien#include <machine/resource.h> 45156321Sdamien#include <sys/rman.h> 46156321Sdamien 47156321Sdamien#include <net/bpf.h> 48156321Sdamien#include <net/if.h> 49257176Sglebius#include <net/if_var.h> 50156321Sdamien#include <net/if_arp.h> 51156321Sdamien#include <net/ethernet.h> 52156321Sdamien#include <net/if_dl.h> 53156321Sdamien#include <net/if_media.h> 54156321Sdamien#include <net/if_types.h> 55156321Sdamien 56156321Sdamien#include <net80211/ieee80211_var.h> 57156321Sdamien#include <net80211/ieee80211_radiotap.h> 58170530Ssam#include <net80211/ieee80211_regdomain.h> 59206358Srpaulo#include <net80211/ieee80211_ratectl.h> 60156321Sdamien 61156321Sdamien#include <netinet/in.h> 62156321Sdamien#include <netinet/in_systm.h> 63156321Sdamien#include <netinet/in_var.h> 64156321Sdamien#include <netinet/ip.h> 65156321Sdamien#include <netinet/if_ether.h> 66156321Sdamien 67156327Ssilby#include <dev/ral/rt2661reg.h> 68156327Ssilby#include <dev/ral/rt2661var.h> 69156321Sdamien 70178354Ssam#define RAL_DEBUG 71156321Sdamien#ifdef RAL_DEBUG 72178354Ssam#define DPRINTF(sc, fmt, ...) do { \ 73178354Ssam if (sc->sc_debug > 0) \ 74178354Ssam printf(fmt, __VA_ARGS__); \ 75178354Ssam} while (0) 76178354Ssam#define DPRINTFN(sc, n, fmt, ...) do { \ 77178354Ssam if (sc->sc_debug >= (n)) \ 78178354Ssam printf(fmt, __VA_ARGS__); \ 79178354Ssam} while (0) 80156321Sdamien#else 81178354Ssam#define DPRINTF(sc, fmt, ...) 82178354Ssam#define DPRINTFN(sc, n, fmt, ...) 83156321Sdamien#endif 84156321Sdamien 85178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 86228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, 87228621Sbschmidt int, const uint8_t [IEEE80211_ADDR_LEN], 88228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 89178354Ssamstatic void rt2661_vap_delete(struct ieee80211vap *); 90156321Sdamienstatic void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 91156321Sdamien int); 92156321Sdamienstatic int rt2661_alloc_tx_ring(struct rt2661_softc *, 93156321Sdamien struct rt2661_tx_ring *, int); 94156321Sdamienstatic void rt2661_reset_tx_ring(struct rt2661_softc *, 95156321Sdamien struct rt2661_tx_ring *); 96156321Sdamienstatic void rt2661_free_tx_ring(struct rt2661_softc *, 97156321Sdamien struct rt2661_tx_ring *); 98156321Sdamienstatic int rt2661_alloc_rx_ring(struct rt2661_softc *, 99156321Sdamien struct rt2661_rx_ring *, int); 100156321Sdamienstatic void rt2661_reset_rx_ring(struct rt2661_softc *, 101156321Sdamien struct rt2661_rx_ring *); 102156321Sdamienstatic void rt2661_free_rx_ring(struct rt2661_softc *, 103156321Sdamien struct rt2661_rx_ring *); 104178354Ssamstatic int rt2661_newstate(struct ieee80211vap *, 105156321Sdamien enum ieee80211_state, int); 106156321Sdamienstatic uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 107156321Sdamienstatic void rt2661_rx_intr(struct rt2661_softc *); 108156321Sdamienstatic void rt2661_tx_intr(struct rt2661_softc *); 109156321Sdamienstatic void rt2661_tx_dma_intr(struct rt2661_softc *, 110156321Sdamien struct rt2661_tx_ring *); 111156321Sdamienstatic void rt2661_mcu_beacon_expire(struct rt2661_softc *); 112156321Sdamienstatic void rt2661_mcu_wakeup(struct rt2661_softc *); 113156321Sdamienstatic void rt2661_mcu_cmd_intr(struct rt2661_softc *); 114170530Ssamstatic void rt2661_scan_start(struct ieee80211com *); 115170530Ssamstatic void rt2661_scan_end(struct ieee80211com *); 116170530Ssamstatic void rt2661_set_channel(struct ieee80211com *); 117156321Sdamienstatic void rt2661_setup_tx_desc(struct rt2661_softc *, 118156321Sdamien struct rt2661_tx_desc *, uint32_t, uint16_t, int, 119156321Sdamien int, const bus_dma_segment_t *, int, int); 120156321Sdamienstatic int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 121156321Sdamien struct ieee80211_node *, int); 122156321Sdamienstatic int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 123156321Sdamien struct ieee80211_node *); 124287197Sglebiusstatic int rt2661_transmit(struct ieee80211com *, struct mbuf *); 125287197Sglebiusstatic void rt2661_start(struct rt2661_softc *); 126178354Ssamstatic int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 127178354Ssam const struct ieee80211_bpf_params *); 128165352Sbmsstatic void rt2661_watchdog(void *); 129287197Sglebiusstatic void rt2661_parent(struct ieee80211com *); 130156321Sdamienstatic void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 131156321Sdamien uint8_t); 132156321Sdamienstatic uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 133156321Sdamienstatic void rt2661_rf_write(struct rt2661_softc *, uint8_t, 134156321Sdamien uint32_t); 135156321Sdamienstatic int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 136156321Sdamien uint16_t); 137156321Sdamienstatic void rt2661_select_antenna(struct rt2661_softc *); 138156321Sdamienstatic void rt2661_enable_mrr(struct rt2661_softc *); 139156321Sdamienstatic void rt2661_set_txpreamble(struct rt2661_softc *); 140156321Sdamienstatic void rt2661_set_basicrates(struct rt2661_softc *, 141156321Sdamien const struct ieee80211_rateset *); 142156321Sdamienstatic void rt2661_select_band(struct rt2661_softc *, 143156321Sdamien struct ieee80211_channel *); 144156321Sdamienstatic void rt2661_set_chan(struct rt2661_softc *, 145156321Sdamien struct ieee80211_channel *); 146156321Sdamienstatic void rt2661_set_bssid(struct rt2661_softc *, 147156321Sdamien const uint8_t *); 148156321Sdamienstatic void rt2661_set_macaddr(struct rt2661_softc *, 149156321Sdamien const uint8_t *); 150283540Sglebiusstatic void rt2661_update_promisc(struct ieee80211com *); 151156321Sdamienstatic int rt2661_wme_update(struct ieee80211com *) __unused; 152283540Sglebiusstatic void rt2661_update_slot(struct ieee80211com *); 153156321Sdamienstatic const char *rt2661_get_rf(int); 154178354Ssamstatic void rt2661_read_eeprom(struct rt2661_softc *, 155190526Ssam uint8_t macaddr[IEEE80211_ADDR_LEN]); 156156321Sdamienstatic int rt2661_bbp_init(struct rt2661_softc *); 157178354Ssamstatic void rt2661_init_locked(struct rt2661_softc *); 158156321Sdamienstatic void rt2661_init(void *); 159178354Ssamstatic void rt2661_stop_locked(struct rt2661_softc *); 160156321Sdamienstatic void rt2661_stop(void *); 161178354Ssamstatic int rt2661_load_microcode(struct rt2661_softc *); 162156321Sdamien#ifdef notyet 163156321Sdamienstatic void rt2661_rx_tune(struct rt2661_softc *); 164156321Sdamienstatic void rt2661_radar_start(struct rt2661_softc *); 165156321Sdamienstatic int rt2661_radar_stop(struct rt2661_softc *); 166156321Sdamien#endif 167178354Ssamstatic int rt2661_prepare_beacon(struct rt2661_softc *, 168178354Ssam struct ieee80211vap *); 169156321Sdamienstatic void rt2661_enable_tsf_sync(struct rt2661_softc *); 170192468Ssamstatic void rt2661_enable_tsf(struct rt2661_softc *); 171156321Sdamienstatic int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 172156321Sdamien 173156321Sdamienstatic const struct { 174156321Sdamien uint32_t reg; 175156321Sdamien uint32_t val; 176156321Sdamien} rt2661_def_mac[] = { 177156321Sdamien RT2661_DEF_MAC 178156321Sdamien}; 179156321Sdamien 180156321Sdamienstatic const struct { 181156321Sdamien uint8_t reg; 182156321Sdamien uint8_t val; 183156321Sdamien} rt2661_def_bbp[] = { 184156321Sdamien RT2661_DEF_BBP 185156321Sdamien}; 186156321Sdamien 187156321Sdamienstatic const struct rfprog { 188156321Sdamien uint8_t chan; 189156321Sdamien uint32_t r1, r2, r3, r4; 190156321Sdamien} rt2661_rf5225_1[] = { 191156321Sdamien RT2661_RF5225_1 192156321Sdamien}, rt2661_rf5225_2[] = { 193156321Sdamien RT2661_RF5225_2 194156321Sdamien}; 195156321Sdamien 196156321Sdamienint 197156321Sdamienrt2661_attach(device_t dev, int id) 198156321Sdamien{ 199156321Sdamien struct rt2661_softc *sc = device_get_softc(dev); 200287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 201156321Sdamien uint32_t val; 202178354Ssam int error, ac, ntries; 203178354Ssam uint8_t bands; 204156321Sdamien 205178354Ssam sc->sc_id = id; 206156321Sdamien sc->sc_dev = dev; 207156321Sdamien 208156321Sdamien mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 209156321Sdamien MTX_DEF | MTX_RECURSE); 210156321Sdamien 211165352Sbms callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 212287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 213156321Sdamien 214156321Sdamien /* wait for NIC to initialize */ 215156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 216156321Sdamien if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 217156321Sdamien break; 218156321Sdamien DELAY(1000); 219156321Sdamien } 220156321Sdamien if (ntries == 1000) { 221156321Sdamien device_printf(sc->sc_dev, 222156321Sdamien "timeout waiting for NIC to initialize\n"); 223156321Sdamien error = EIO; 224156321Sdamien goto fail1; 225156321Sdamien } 226156321Sdamien 227156321Sdamien /* retrieve RF rev. no and various other things from EEPROM */ 228287197Sglebius rt2661_read_eeprom(sc, ic->ic_macaddr); 229156321Sdamien 230156321Sdamien device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 231156321Sdamien rt2661_get_rf(sc->rf_rev)); 232156321Sdamien 233156321Sdamien /* 234156321Sdamien * Allocate Tx and Rx rings. 235156321Sdamien */ 236156321Sdamien for (ac = 0; ac < 4; ac++) { 237156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 238156321Sdamien RT2661_TX_RING_COUNT); 239156321Sdamien if (error != 0) { 240156321Sdamien device_printf(sc->sc_dev, 241156321Sdamien "could not allocate Tx ring %d\n", ac); 242156321Sdamien goto fail2; 243156321Sdamien } 244156321Sdamien } 245156321Sdamien 246156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 247156321Sdamien if (error != 0) { 248156321Sdamien device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 249156321Sdamien goto fail2; 250156321Sdamien } 251156321Sdamien 252156321Sdamien error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 253156321Sdamien if (error != 0) { 254156321Sdamien device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 255156321Sdamien goto fail3; 256156321Sdamien } 257156321Sdamien 258283537Sglebius ic->ic_softc = sc; 259283527Sglebius ic->ic_name = device_get_nameunit(dev); 260178354Ssam ic->ic_opmode = IEEE80211_M_STA; 261156321Sdamien ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 262156321Sdamien 263156321Sdamien /* set device capabilities */ 264156321Sdamien ic->ic_caps = 265178957Ssam IEEE80211_C_STA /* station mode */ 266178957Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 267178354Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 268178354Ssam | IEEE80211_C_MONITOR /* monitor mode */ 269178354Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 270178354Ssam | IEEE80211_C_WDS /* 4-address traffic works */ 271195618Srpaulo | IEEE80211_C_MBSS /* mesh point link mode */ 272178354Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 273178354Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 274178354Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 275178354Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 276156407Sdamien#ifdef notyet 277178354Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 278178354Ssam | IEEE80211_C_WME /* 802.11e */ 279156407Sdamien#endif 280178354Ssam ; 281156321Sdamien 282170530Ssam bands = 0; 283170530Ssam setbit(&bands, IEEE80211_MODE_11B); 284170530Ssam setbit(&bands, IEEE80211_MODE_11G); 285170530Ssam if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 286170530Ssam setbit(&bands, IEEE80211_MODE_11A); 287178354Ssam ieee80211_init_channels(ic, NULL, &bands); 288156321Sdamien 289287197Sglebius ieee80211_ifattach(ic); 290178354Ssam#if 0 291178354Ssam ic->ic_wme.wme_update = rt2661_wme_update; 292178354Ssam#endif 293170530Ssam ic->ic_scan_start = rt2661_scan_start; 294170530Ssam ic->ic_scan_end = rt2661_scan_end; 295170530Ssam ic->ic_set_channel = rt2661_set_channel; 296156321Sdamien ic->ic_updateslot = rt2661_update_slot; 297178354Ssam ic->ic_update_promisc = rt2661_update_promisc; 298178354Ssam ic->ic_raw_xmit = rt2661_raw_xmit; 299287197Sglebius ic->ic_transmit = rt2661_transmit; 300287197Sglebius ic->ic_parent = rt2661_parent; 301178354Ssam ic->ic_vap_create = rt2661_vap_create; 302178354Ssam ic->ic_vap_delete = rt2661_vap_delete; 303156321Sdamien 304192468Ssam ieee80211_radiotap_attach(ic, 305192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 306192468Ssam RT2661_TX_RADIOTAP_PRESENT, 307192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 308192468Ssam RT2661_RX_RADIOTAP_PRESENT); 309178354Ssam 310178354Ssam#ifdef RAL_DEBUG 311156321Sdamien SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 312178354Ssam SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 313178354Ssam "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 314178354Ssam#endif 315156321Sdamien if (bootverbose) 316156321Sdamien ieee80211_announce(ic); 317156321Sdamien 318156321Sdamien return 0; 319156321Sdamien 320156321Sdamienfail3: rt2661_free_tx_ring(sc, &sc->mgtq); 321156321Sdamienfail2: while (--ac >= 0) 322156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[ac]); 323156321Sdamienfail1: mtx_destroy(&sc->sc_mtx); 324156321Sdamien return error; 325156321Sdamien} 326156321Sdamien 327156321Sdamienint 328156321Sdamienrt2661_detach(void *xsc) 329156321Sdamien{ 330156321Sdamien struct rt2661_softc *sc = xsc; 331287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 332170530Ssam 333178038Ssam RAL_LOCK(sc); 334178038Ssam rt2661_stop_locked(sc); 335178038Ssam RAL_UNLOCK(sc); 336156321Sdamien 337156321Sdamien ieee80211_ifdetach(ic); 338287197Sglebius mbufq_drain(&sc->sc_snd); 339156321Sdamien 340156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[0]); 341156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[1]); 342156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[2]); 343156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[3]); 344156321Sdamien rt2661_free_tx_ring(sc, &sc->mgtq); 345156321Sdamien rt2661_free_rx_ring(sc, &sc->rxq); 346156321Sdamien 347156321Sdamien mtx_destroy(&sc->sc_mtx); 348156321Sdamien 349156321Sdamien return 0; 350156321Sdamien} 351156321Sdamien 352178354Ssamstatic struct ieee80211vap * 353228621Sbschmidtrt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 354228621Sbschmidt enum ieee80211_opmode opmode, int flags, 355228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 356228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 357178354Ssam{ 358287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 359178354Ssam struct rt2661_vap *rvp; 360178354Ssam struct ieee80211vap *vap; 361178354Ssam 362178354Ssam switch (opmode) { 363178354Ssam case IEEE80211_M_STA: 364178354Ssam case IEEE80211_M_IBSS: 365178354Ssam case IEEE80211_M_AHDEMO: 366178354Ssam case IEEE80211_M_MONITOR: 367178354Ssam case IEEE80211_M_HOSTAP: 368195618Srpaulo case IEEE80211_M_MBSS: 369195618Srpaulo /* XXXRP: TBD */ 370178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 371287197Sglebius device_printf(sc->sc_dev, "only 1 vap supported\n"); 372178354Ssam return NULL; 373178354Ssam } 374178354Ssam if (opmode == IEEE80211_M_STA) 375178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 376178354Ssam break; 377178354Ssam case IEEE80211_M_WDS: 378178354Ssam if (TAILQ_EMPTY(&ic->ic_vaps) || 379178354Ssam ic->ic_opmode != IEEE80211_M_HOSTAP) { 380287197Sglebius device_printf(sc->sc_dev, 381287197Sglebius "wds only supported in ap mode\n"); 382178354Ssam return NULL; 383178354Ssam } 384178354Ssam /* 385178354Ssam * Silently remove any request for a unique 386178354Ssam * bssid; WDS vap's always share the local 387178354Ssam * mac address. 388178354Ssam */ 389178354Ssam flags &= ~IEEE80211_CLONE_BSSID; 390178354Ssam break; 391178354Ssam default: 392287197Sglebius device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 393178354Ssam return NULL; 394178354Ssam } 395287197Sglebius rvp = malloc(sizeof(struct rt2661_vap), M_80211_VAP, M_WAITOK | M_ZERO); 396178354Ssam vap = &rvp->ral_vap; 397287197Sglebius ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 398178354Ssam 399178354Ssam /* override state transition machine */ 400178354Ssam rvp->ral_newstate = vap->iv_newstate; 401178354Ssam vap->iv_newstate = rt2661_newstate; 402178354Ssam#if 0 403178354Ssam vap->iv_update_beacon = rt2661_beacon_update; 404178354Ssam#endif 405178354Ssam 406206358Srpaulo ieee80211_ratectl_init(vap); 407178354Ssam /* complete setup */ 408287197Sglebius ieee80211_vap_attach(vap, ieee80211_media_change, 409287197Sglebius ieee80211_media_status, mac); 410178354Ssam if (TAILQ_FIRST(&ic->ic_vaps) == vap) 411178354Ssam ic->ic_opmode = opmode; 412178354Ssam return vap; 413178354Ssam} 414178354Ssam 415178354Ssamstatic void 416178354Ssamrt2661_vap_delete(struct ieee80211vap *vap) 417178354Ssam{ 418178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 419178354Ssam 420206358Srpaulo ieee80211_ratectl_deinit(vap); 421178354Ssam ieee80211_vap_detach(vap); 422178354Ssam free(rvp, M_80211_VAP); 423178354Ssam} 424178354Ssam 425156321Sdamienvoid 426156321Sdamienrt2661_shutdown(void *xsc) 427156321Sdamien{ 428156321Sdamien struct rt2661_softc *sc = xsc; 429156321Sdamien 430156321Sdamien rt2661_stop(sc); 431156321Sdamien} 432156321Sdamien 433156321Sdamienvoid 434156321Sdamienrt2661_suspend(void *xsc) 435156321Sdamien{ 436156321Sdamien struct rt2661_softc *sc = xsc; 437156321Sdamien 438156321Sdamien rt2661_stop(sc); 439156321Sdamien} 440156321Sdamien 441156321Sdamienvoid 442156321Sdamienrt2661_resume(void *xsc) 443156321Sdamien{ 444156321Sdamien struct rt2661_softc *sc = xsc; 445156321Sdamien 446287197Sglebius if (sc->sc_ic.ic_nrunning > 0) 447178354Ssam rt2661_init(sc); 448156321Sdamien} 449156321Sdamien 450156321Sdamienstatic void 451156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 452156321Sdamien{ 453156321Sdamien if (error != 0) 454156321Sdamien return; 455156321Sdamien 456156321Sdamien KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 457156321Sdamien 458156321Sdamien *(bus_addr_t *)arg = segs[0].ds_addr; 459156321Sdamien} 460156321Sdamien 461156321Sdamienstatic int 462156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 463156321Sdamien int count) 464156321Sdamien{ 465156321Sdamien int i, error; 466156321Sdamien 467156321Sdamien ring->count = count; 468156321Sdamien ring->queued = 0; 469156321Sdamien ring->cur = ring->next = ring->stat = 0; 470156321Sdamien 471171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 472171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 473171535Skevlo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 474171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 475156321Sdamien if (error != 0) { 476156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 477156321Sdamien goto fail; 478156321Sdamien } 479156321Sdamien 480156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 481156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 482156321Sdamien if (error != 0) { 483156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 484156321Sdamien goto fail; 485156321Sdamien } 486156321Sdamien 487156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 488156321Sdamien count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 489156321Sdamien 0); 490156321Sdamien if (error != 0) { 491156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 492156321Sdamien goto fail; 493156321Sdamien } 494156321Sdamien 495156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 496156321Sdamien M_NOWAIT | M_ZERO); 497156321Sdamien if (ring->data == NULL) { 498156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 499156321Sdamien error = ENOMEM; 500156321Sdamien goto fail; 501156321Sdamien } 502156321Sdamien 503171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 504171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 505171535Skevlo RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 506156321Sdamien if (error != 0) { 507156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 508156321Sdamien goto fail; 509156321Sdamien } 510156321Sdamien 511156321Sdamien for (i = 0; i < count; i++) { 512156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, 513156321Sdamien &ring->data[i].map); 514156321Sdamien if (error != 0) { 515156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 516156321Sdamien goto fail; 517156321Sdamien } 518156321Sdamien } 519156321Sdamien 520156321Sdamien return 0; 521156321Sdamien 522156321Sdamienfail: rt2661_free_tx_ring(sc, ring); 523156321Sdamien return error; 524156321Sdamien} 525156321Sdamien 526156321Sdamienstatic void 527156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 528156321Sdamien{ 529156321Sdamien struct rt2661_tx_desc *desc; 530156321Sdamien struct rt2661_tx_data *data; 531156321Sdamien int i; 532156321Sdamien 533156321Sdamien for (i = 0; i < ring->count; i++) { 534156321Sdamien desc = &ring->desc[i]; 535156321Sdamien data = &ring->data[i]; 536156321Sdamien 537156321Sdamien if (data->m != NULL) { 538156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 539156321Sdamien BUS_DMASYNC_POSTWRITE); 540156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 541156321Sdamien m_freem(data->m); 542156321Sdamien data->m = NULL; 543156321Sdamien } 544156321Sdamien 545156321Sdamien if (data->ni != NULL) { 546156321Sdamien ieee80211_free_node(data->ni); 547156321Sdamien data->ni = NULL; 548156321Sdamien } 549156321Sdamien 550156321Sdamien desc->flags = 0; 551156321Sdamien } 552156321Sdamien 553156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 554156321Sdamien 555156321Sdamien ring->queued = 0; 556156321Sdamien ring->cur = ring->next = ring->stat = 0; 557156321Sdamien} 558156321Sdamien 559156321Sdamienstatic void 560156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 561156321Sdamien{ 562156321Sdamien struct rt2661_tx_data *data; 563156321Sdamien int i; 564156321Sdamien 565156321Sdamien if (ring->desc != NULL) { 566156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 567156321Sdamien BUS_DMASYNC_POSTWRITE); 568156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 569156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 570156321Sdamien } 571156321Sdamien 572156321Sdamien if (ring->desc_dmat != NULL) 573156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 574156321Sdamien 575156321Sdamien if (ring->data != NULL) { 576156321Sdamien for (i = 0; i < ring->count; i++) { 577156321Sdamien data = &ring->data[i]; 578156321Sdamien 579156321Sdamien if (data->m != NULL) { 580156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 581156321Sdamien BUS_DMASYNC_POSTWRITE); 582156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 583156321Sdamien m_freem(data->m); 584156321Sdamien } 585156321Sdamien 586156321Sdamien if (data->ni != NULL) 587156321Sdamien ieee80211_free_node(data->ni); 588156321Sdamien 589156321Sdamien if (data->map != NULL) 590156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 591156321Sdamien } 592156321Sdamien 593156321Sdamien free(ring->data, M_DEVBUF); 594156321Sdamien } 595156321Sdamien 596156321Sdamien if (ring->data_dmat != NULL) 597156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 598156321Sdamien} 599156321Sdamien 600156321Sdamienstatic int 601156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 602156321Sdamien int count) 603156321Sdamien{ 604156321Sdamien struct rt2661_rx_desc *desc; 605156321Sdamien struct rt2661_rx_data *data; 606156321Sdamien bus_addr_t physaddr; 607156321Sdamien int i, error; 608156321Sdamien 609156321Sdamien ring->count = count; 610156321Sdamien ring->cur = ring->next = 0; 611156321Sdamien 612171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 613171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 614171535Skevlo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 615171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 616156321Sdamien if (error != 0) { 617156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 618156321Sdamien goto fail; 619156321Sdamien } 620156321Sdamien 621156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 622156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 623156321Sdamien if (error != 0) { 624156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 625156321Sdamien goto fail; 626156321Sdamien } 627156321Sdamien 628156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 629156321Sdamien count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 630156321Sdamien 0); 631156321Sdamien if (error != 0) { 632156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 633156321Sdamien goto fail; 634156321Sdamien } 635156321Sdamien 636156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 637156321Sdamien M_NOWAIT | M_ZERO); 638156321Sdamien if (ring->data == NULL) { 639156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 640156321Sdamien error = ENOMEM; 641156321Sdamien goto fail; 642156321Sdamien } 643156321Sdamien 644156321Sdamien /* 645156321Sdamien * Pre-allocate Rx buffers and populate Rx ring. 646156321Sdamien */ 647171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 648171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 649171535Skevlo 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 650156321Sdamien if (error != 0) { 651156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 652156321Sdamien goto fail; 653156321Sdamien } 654156321Sdamien 655156321Sdamien for (i = 0; i < count; i++) { 656156321Sdamien desc = &sc->rxq.desc[i]; 657156321Sdamien data = &sc->rxq.data[i]; 658156321Sdamien 659156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 660156321Sdamien if (error != 0) { 661156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 662156321Sdamien goto fail; 663156321Sdamien } 664156321Sdamien 665243857Sglebius data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 666156321Sdamien if (data->m == NULL) { 667156321Sdamien device_printf(sc->sc_dev, 668156321Sdamien "could not allocate rx mbuf\n"); 669156321Sdamien error = ENOMEM; 670156321Sdamien goto fail; 671156321Sdamien } 672156321Sdamien 673156321Sdamien error = bus_dmamap_load(ring->data_dmat, data->map, 674156321Sdamien mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 675156321Sdamien &physaddr, 0); 676156321Sdamien if (error != 0) { 677156321Sdamien device_printf(sc->sc_dev, 678156321Sdamien "could not load rx buf DMA map"); 679156321Sdamien goto fail; 680156321Sdamien } 681156321Sdamien 682156321Sdamien desc->flags = htole32(RT2661_RX_BUSY); 683156321Sdamien desc->physaddr = htole32(physaddr); 684156321Sdamien } 685156321Sdamien 686156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 687156321Sdamien 688156321Sdamien return 0; 689156321Sdamien 690156321Sdamienfail: rt2661_free_rx_ring(sc, ring); 691156321Sdamien return error; 692156321Sdamien} 693156321Sdamien 694156321Sdamienstatic void 695156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 696156321Sdamien{ 697156321Sdamien int i; 698156321Sdamien 699156321Sdamien for (i = 0; i < ring->count; i++) 700156321Sdamien ring->desc[i].flags = htole32(RT2661_RX_BUSY); 701156321Sdamien 702156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 703156321Sdamien 704156321Sdamien ring->cur = ring->next = 0; 705156321Sdamien} 706156321Sdamien 707156321Sdamienstatic void 708156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 709156321Sdamien{ 710156321Sdamien struct rt2661_rx_data *data; 711156321Sdamien int i; 712156321Sdamien 713156321Sdamien if (ring->desc != NULL) { 714156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 715156321Sdamien BUS_DMASYNC_POSTWRITE); 716156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 717156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 718156321Sdamien } 719156321Sdamien 720156321Sdamien if (ring->desc_dmat != NULL) 721156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 722156321Sdamien 723156321Sdamien if (ring->data != NULL) { 724156321Sdamien for (i = 0; i < ring->count; i++) { 725156321Sdamien data = &ring->data[i]; 726156321Sdamien 727156321Sdamien if (data->m != NULL) { 728156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 729156321Sdamien BUS_DMASYNC_POSTREAD); 730156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 731156321Sdamien m_freem(data->m); 732156321Sdamien } 733156321Sdamien 734156321Sdamien if (data->map != NULL) 735156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 736156321Sdamien } 737156321Sdamien 738156321Sdamien free(ring->data, M_DEVBUF); 739156321Sdamien } 740156321Sdamien 741156321Sdamien if (ring->data_dmat != NULL) 742156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 743156321Sdamien} 744156321Sdamien 745156321Sdamienstatic int 746178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 747156321Sdamien{ 748178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 749178354Ssam struct ieee80211com *ic = vap->iv_ic; 750287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 751178354Ssam int error; 752156321Sdamien 753178354Ssam if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 754178354Ssam uint32_t tmp; 755156321Sdamien 756178354Ssam /* abort TSF synchronization */ 757178354Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 758178354Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 759178354Ssam } 760156321Sdamien 761178354Ssam error = rvp->ral_newstate(vap, nstate, arg); 762156321Sdamien 763178354Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 764178354Ssam struct ieee80211_node *ni = vap->iv_bss; 765178354Ssam 766178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 767156321Sdamien rt2661_enable_mrr(sc); 768156321Sdamien rt2661_set_txpreamble(sc); 769156321Sdamien rt2661_set_basicrates(sc, &ni->ni_rates); 770156321Sdamien rt2661_set_bssid(sc, ni->ni_bssid); 771156321Sdamien } 772156321Sdamien 773178354Ssam if (vap->iv_opmode == IEEE80211_M_HOSTAP || 774195618Srpaulo vap->iv_opmode == IEEE80211_M_IBSS || 775195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) { 776178354Ssam error = rt2661_prepare_beacon(sc, vap); 777178354Ssam if (error != 0) 778178354Ssam return error; 779156321Sdamien } 780184345Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) 781156321Sdamien rt2661_enable_tsf_sync(sc); 782192468Ssam else 783192468Ssam rt2661_enable_tsf(sc); 784178354Ssam } 785178354Ssam return error; 786156321Sdamien} 787156321Sdamien 788156321Sdamien/* 789156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 790156321Sdamien * 93C66). 791156321Sdamien */ 792156321Sdamienstatic uint16_t 793156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 794156321Sdamien{ 795156321Sdamien uint32_t tmp; 796156321Sdamien uint16_t val; 797156321Sdamien int n; 798156321Sdamien 799156321Sdamien /* clock C once before the first command */ 800156321Sdamien RT2661_EEPROM_CTL(sc, 0); 801156321Sdamien 802156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 803156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 804156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 805156321Sdamien 806156321Sdamien /* write start bit (1) */ 807156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 808156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 809156321Sdamien 810156321Sdamien /* write READ opcode (10) */ 811156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 812156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 813156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 814156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 815156321Sdamien 816156321Sdamien /* write address (A5-A0 or A7-A0) */ 817156321Sdamien n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 818156321Sdamien for (; n >= 0; n--) { 819156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 820156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D)); 821156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 822156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 823156321Sdamien } 824156321Sdamien 825156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 826156321Sdamien 827156321Sdamien /* read data Q15-Q0 */ 828156321Sdamien val = 0; 829156321Sdamien for (n = 15; n >= 0; n--) { 830156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 831156321Sdamien tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 832156321Sdamien val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 833156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 834156321Sdamien } 835156321Sdamien 836156321Sdamien RT2661_EEPROM_CTL(sc, 0); 837156321Sdamien 838156321Sdamien /* clear Chip Select and clock C */ 839156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 840156321Sdamien RT2661_EEPROM_CTL(sc, 0); 841156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_C); 842156321Sdamien 843156321Sdamien return val; 844156321Sdamien} 845156321Sdamien 846156321Sdamienstatic void 847156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc) 848156321Sdamien{ 849156321Sdamien struct rt2661_tx_ring *txq; 850156321Sdamien struct rt2661_tx_data *data; 851156321Sdamien uint32_t val; 852287197Sglebius int error, qid, retrycnt; 853206358Srpaulo struct ieee80211vap *vap; 854156321Sdamien 855156321Sdamien for (;;) { 856170530Ssam struct ieee80211_node *ni; 857170530Ssam struct mbuf *m; 858170530Ssam 859156321Sdamien val = RAL_READ(sc, RT2661_STA_CSR4); 860156321Sdamien if (!(val & RT2661_TX_STAT_VALID)) 861156321Sdamien break; 862156321Sdamien 863156321Sdamien /* retrieve the queue in which this frame was sent */ 864156321Sdamien qid = RT2661_TX_QID(val); 865156321Sdamien txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 866156321Sdamien 867156321Sdamien /* retrieve rate control algorithm context */ 868156321Sdamien data = &txq->data[txq->stat]; 869170530Ssam m = data->m; 870170530Ssam data->m = NULL; 871170530Ssam ni = data->ni; 872170530Ssam data->ni = NULL; 873156321Sdamien 874159301Sfjoe /* if no frame has been sent, ignore */ 875170530Ssam if (ni == NULL) 876159301Sfjoe continue; 877206371Srpaulo else 878206371Srpaulo vap = ni->ni_vap; 879159301Sfjoe 880156321Sdamien switch (RT2661_TX_RESULT(val)) { 881156321Sdamien case RT2661_TX_SUCCESS: 882156321Sdamien retrycnt = RT2661_TX_RETRYCNT(val); 883156321Sdamien 884178354Ssam DPRINTFN(sc, 10, "data frame sent successfully after " 885178354Ssam "%d retries\n", retrycnt); 886178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 887206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 888206358Srpaulo IEEE80211_RATECTL_TX_SUCCESS, 889206358Srpaulo &retrycnt, NULL); 890287197Sglebius error = 0; 891156321Sdamien break; 892156321Sdamien 893156321Sdamien case RT2661_TX_RETRY_FAIL: 894178354Ssam retrycnt = RT2661_TX_RETRYCNT(val); 895178354Ssam 896178354Ssam DPRINTFN(sc, 9, "%s\n", 897178354Ssam "sending data frame failed (too much retries)"); 898178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 899206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 900206358Srpaulo IEEE80211_RATECTL_TX_FAILURE, 901206358Srpaulo &retrycnt, NULL); 902287197Sglebius error = 1; 903156321Sdamien break; 904156321Sdamien 905156321Sdamien default: 906156321Sdamien /* other failure */ 907156321Sdamien device_printf(sc->sc_dev, 908156321Sdamien "sending data frame failed 0x%08x\n", val); 909287197Sglebius error = 1; 910156321Sdamien } 911156321Sdamien 912178354Ssam DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 913156321Sdamien 914156321Sdamien txq->queued--; 915156321Sdamien if (++txq->stat >= txq->count) /* faster than % count */ 916156321Sdamien txq->stat = 0; 917170530Ssam 918287197Sglebius ieee80211_tx_complete(ni, m, error); 919156321Sdamien } 920156321Sdamien 921156321Sdamien sc->sc_tx_timer = 0; 922178354Ssam 923287197Sglebius rt2661_start(sc); 924156321Sdamien} 925156321Sdamien 926156321Sdamienstatic void 927156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 928156321Sdamien{ 929156321Sdamien struct rt2661_tx_desc *desc; 930156321Sdamien struct rt2661_tx_data *data; 931156321Sdamien 932156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 933156321Sdamien 934156321Sdamien for (;;) { 935156321Sdamien desc = &txq->desc[txq->next]; 936156321Sdamien data = &txq->data[txq->next]; 937156321Sdamien 938156321Sdamien if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 939156321Sdamien !(le32toh(desc->flags) & RT2661_TX_VALID)) 940156321Sdamien break; 941156321Sdamien 942156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, 943156321Sdamien BUS_DMASYNC_POSTWRITE); 944156321Sdamien bus_dmamap_unload(txq->data_dmat, data->map); 945156321Sdamien 946156321Sdamien /* descriptor is no longer valid */ 947156321Sdamien desc->flags &= ~htole32(RT2661_TX_VALID); 948156321Sdamien 949178354Ssam DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 950156321Sdamien 951156321Sdamien if (++txq->next >= txq->count) /* faster than % count */ 952156321Sdamien txq->next = 0; 953156321Sdamien } 954156321Sdamien 955156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 956156321Sdamien} 957156321Sdamien 958156321Sdamienstatic void 959156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc) 960156321Sdamien{ 961287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 962156321Sdamien struct rt2661_rx_desc *desc; 963156321Sdamien struct rt2661_rx_data *data; 964156321Sdamien bus_addr_t physaddr; 965156321Sdamien struct ieee80211_frame *wh; 966156321Sdamien struct ieee80211_node *ni; 967156321Sdamien struct mbuf *mnew, *m; 968156321Sdamien int error; 969156321Sdamien 970156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 971156321Sdamien BUS_DMASYNC_POSTREAD); 972156321Sdamien 973156321Sdamien for (;;) { 974192468Ssam int8_t rssi, nf; 975170530Ssam 976156321Sdamien desc = &sc->rxq.desc[sc->rxq.cur]; 977156321Sdamien data = &sc->rxq.data[sc->rxq.cur]; 978156321Sdamien 979156321Sdamien if (le32toh(desc->flags) & RT2661_RX_BUSY) 980156321Sdamien break; 981156321Sdamien 982156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 983156321Sdamien (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 984156321Sdamien /* 985156321Sdamien * This should not happen since we did not request 986156321Sdamien * to receive those frames when we filled TXRX_CSR0. 987156321Sdamien */ 988178354Ssam DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 989178354Ssam le32toh(desc->flags)); 990287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 991156321Sdamien goto skip; 992156321Sdamien } 993156321Sdamien 994156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 995287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 996156321Sdamien goto skip; 997156321Sdamien } 998156321Sdamien 999156321Sdamien /* 1000156321Sdamien * Try to allocate a new mbuf for this ring element and load it 1001156321Sdamien * before processing the current mbuf. If the ring element 1002156321Sdamien * cannot be loaded, drop the received packet and reuse the old 1003156321Sdamien * mbuf. In the unlikely case that the old mbuf can't be 1004156321Sdamien * reloaded either, explicitly panic. 1005156321Sdamien */ 1006243857Sglebius mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1007156321Sdamien if (mnew == NULL) { 1008287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1009156321Sdamien goto skip; 1010156321Sdamien } 1011156321Sdamien 1012156321Sdamien bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1013156321Sdamien BUS_DMASYNC_POSTREAD); 1014156321Sdamien bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1015156321Sdamien 1016156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1017156321Sdamien mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1018156321Sdamien &physaddr, 0); 1019156321Sdamien if (error != 0) { 1020156321Sdamien m_freem(mnew); 1021156321Sdamien 1022156321Sdamien /* try to reload the old mbuf */ 1023156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1024156321Sdamien mtod(data->m, void *), MCLBYTES, 1025156321Sdamien rt2661_dma_map_addr, &physaddr, 0); 1026156321Sdamien if (error != 0) { 1027156321Sdamien /* very unlikely that it will fail... */ 1028156321Sdamien panic("%s: could not load old rx mbuf", 1029156321Sdamien device_get_name(sc->sc_dev)); 1030156321Sdamien } 1031287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1032156321Sdamien goto skip; 1033156321Sdamien } 1034156321Sdamien 1035156321Sdamien /* 1036156321Sdamien * New mbuf successfully loaded, update Rx ring and continue 1037156321Sdamien * processing. 1038156321Sdamien */ 1039156321Sdamien m = data->m; 1040156321Sdamien data->m = mnew; 1041156321Sdamien desc->physaddr = htole32(physaddr); 1042156321Sdamien 1043156321Sdamien /* finalize mbuf */ 1044156321Sdamien m->m_pkthdr.len = m->m_len = 1045156321Sdamien (le32toh(desc->flags) >> 16) & 0xfff; 1046156321Sdamien 1047170530Ssam rssi = rt2661_get_rssi(sc, desc->rssi); 1048192468Ssam /* Error happened during RSSI conversion. */ 1049192468Ssam if (rssi < 0) 1050192468Ssam rssi = -30; /* XXX ignored by net80211 */ 1051192468Ssam nf = RT2661_NOISE_FLOOR; 1052170530Ssam 1053192468Ssam if (ieee80211_radiotap_active(ic)) { 1054156321Sdamien struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1055156321Sdamien uint32_t tsf_lo, tsf_hi; 1056156321Sdamien 1057156321Sdamien /* get timestamp (low and high 32 bits) */ 1058156321Sdamien tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1059156321Sdamien tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1060156321Sdamien 1061156321Sdamien tap->wr_tsf = 1062156321Sdamien htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1063156321Sdamien tap->wr_flags = 0; 1064178354Ssam tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1065178958Ssam (desc->flags & htole32(RT2661_RX_OFDM)) ? 1066178958Ssam IEEE80211_T_OFDM : IEEE80211_T_CCK); 1067192468Ssam tap->wr_antsignal = nf + rssi; 1068192468Ssam tap->wr_antnoise = nf; 1069156321Sdamien } 1070170530Ssam sc->sc_flags |= RAL_INPUT_RUNNING; 1071170530Ssam RAL_UNLOCK(sc); 1072156321Sdamien wh = mtod(m, struct ieee80211_frame *); 1073178354Ssam 1074178354Ssam /* send the frame to the 802.11 layer */ 1075156321Sdamien ni = ieee80211_find_rxnode(ic, 1076156321Sdamien (struct ieee80211_frame_min *)wh); 1077178354Ssam if (ni != NULL) { 1078192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 1079178354Ssam ieee80211_free_node(ni); 1080178354Ssam } else 1081192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 1082170530Ssam 1083170530Ssam RAL_LOCK(sc); 1084170530Ssam sc->sc_flags &= ~RAL_INPUT_RUNNING; 1085156321Sdamien 1086156321Sdamienskip: desc->flags |= htole32(RT2661_RX_BUSY); 1087156321Sdamien 1088178354Ssam DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1089156321Sdamien 1090156321Sdamien sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1091156321Sdamien } 1092156321Sdamien 1093156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1094156321Sdamien BUS_DMASYNC_PREWRITE); 1095156321Sdamien} 1096156321Sdamien 1097156321Sdamien/* ARGSUSED */ 1098156321Sdamienstatic void 1099156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1100156321Sdamien{ 1101156321Sdamien /* do nothing */ 1102156321Sdamien} 1103156321Sdamien 1104156321Sdamienstatic void 1105156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc) 1106156321Sdamien{ 1107156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1108156321Sdamien 1109156321Sdamien RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1110156321Sdamien RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1111156321Sdamien RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1112156321Sdamien 1113156321Sdamien /* send wakeup command to MCU */ 1114156321Sdamien rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1115156321Sdamien} 1116156321Sdamien 1117156321Sdamienstatic void 1118156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1119156321Sdamien{ 1120156321Sdamien RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1121156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1122156321Sdamien} 1123156321Sdamien 1124156321Sdamienvoid 1125156321Sdamienrt2661_intr(void *arg) 1126156321Sdamien{ 1127156321Sdamien struct rt2661_softc *sc = arg; 1128156321Sdamien uint32_t r1, r2; 1129156321Sdamien 1130156321Sdamien RAL_LOCK(sc); 1131156321Sdamien 1132156321Sdamien /* disable MAC and MCU interrupts */ 1133156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1134156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1135156321Sdamien 1136156975Sdamien /* don't re-enable interrupts if we're shutting down */ 1137287197Sglebius if (!(sc->sc_flags & RAL_RUNNING)) { 1138156975Sdamien RAL_UNLOCK(sc); 1139156975Sdamien return; 1140156975Sdamien } 1141156975Sdamien 1142156321Sdamien r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1143156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1144156321Sdamien 1145156321Sdamien r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1146156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1147156321Sdamien 1148156321Sdamien if (r1 & RT2661_MGT_DONE) 1149156321Sdamien rt2661_tx_dma_intr(sc, &sc->mgtq); 1150156321Sdamien 1151156321Sdamien if (r1 & RT2661_RX_DONE) 1152156321Sdamien rt2661_rx_intr(sc); 1153156321Sdamien 1154156321Sdamien if (r1 & RT2661_TX0_DMA_DONE) 1155156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[0]); 1156156321Sdamien 1157156321Sdamien if (r1 & RT2661_TX1_DMA_DONE) 1158156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[1]); 1159156321Sdamien 1160156321Sdamien if (r1 & RT2661_TX2_DMA_DONE) 1161156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[2]); 1162156321Sdamien 1163156321Sdamien if (r1 & RT2661_TX3_DMA_DONE) 1164156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[3]); 1165156321Sdamien 1166156321Sdamien if (r1 & RT2661_TX_DONE) 1167156321Sdamien rt2661_tx_intr(sc); 1168156321Sdamien 1169156321Sdamien if (r2 & RT2661_MCU_CMD_DONE) 1170156321Sdamien rt2661_mcu_cmd_intr(sc); 1171156321Sdamien 1172156321Sdamien if (r2 & RT2661_MCU_BEACON_EXPIRE) 1173156321Sdamien rt2661_mcu_beacon_expire(sc); 1174156321Sdamien 1175156321Sdamien if (r2 & RT2661_MCU_WAKEUP) 1176156321Sdamien rt2661_mcu_wakeup(sc); 1177156321Sdamien 1178156321Sdamien /* re-enable MAC and MCU interrupts */ 1179156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1180156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1181156321Sdamien 1182156321Sdamien RAL_UNLOCK(sc); 1183156321Sdamien} 1184156321Sdamien 1185178958Ssamstatic uint8_t 1186178958Ssamrt2661_plcp_signal(int rate) 1187178958Ssam{ 1188178958Ssam switch (rate) { 1189178958Ssam /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1190178958Ssam case 12: return 0xb; 1191178958Ssam case 18: return 0xf; 1192178958Ssam case 24: return 0xa; 1193178958Ssam case 36: return 0xe; 1194178958Ssam case 48: return 0x9; 1195178958Ssam case 72: return 0xd; 1196178958Ssam case 96: return 0x8; 1197178958Ssam case 108: return 0xc; 1198178958Ssam 1199178958Ssam /* CCK rates (NB: not IEEE std, device-specific) */ 1200178958Ssam case 2: return 0x0; 1201178958Ssam case 4: return 0x1; 1202178958Ssam case 11: return 0x2; 1203178958Ssam case 22: return 0x3; 1204178958Ssam } 1205178958Ssam return 0xff; /* XXX unsupported/unknown rate */ 1206178958Ssam} 1207178958Ssam 1208156321Sdamienstatic void 1209156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1210156321Sdamien uint32_t flags, uint16_t xflags, int len, int rate, 1211156321Sdamien const bus_dma_segment_t *segs, int nsegs, int ac) 1212156321Sdamien{ 1213287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1214156321Sdamien uint16_t plcp_length; 1215156321Sdamien int i, remainder; 1216156321Sdamien 1217156321Sdamien desc->flags = htole32(flags); 1218156321Sdamien desc->flags |= htole32(len << 16); 1219156321Sdamien desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1220156321Sdamien 1221156321Sdamien desc->xflags = htole16(xflags); 1222156321Sdamien desc->xflags |= htole16(nsegs << 13); 1223156321Sdamien 1224156321Sdamien desc->wme = htole16( 1225156321Sdamien RT2661_QID(ac) | 1226156321Sdamien RT2661_AIFSN(2) | 1227156321Sdamien RT2661_LOGCWMIN(4) | 1228156321Sdamien RT2661_LOGCWMAX(10)); 1229156321Sdamien 1230156321Sdamien /* 1231156321Sdamien * Remember in which queue this frame was sent. This field is driver 1232156321Sdamien * private data only. It will be made available by the NIC in STA_CSR4 1233156321Sdamien * on Tx interrupts. 1234156321Sdamien */ 1235156321Sdamien desc->qid = ac; 1236156321Sdamien 1237156321Sdamien /* setup PLCP fields */ 1238178958Ssam desc->plcp_signal = rt2661_plcp_signal(rate); 1239156321Sdamien desc->plcp_service = 4; 1240156321Sdamien 1241156321Sdamien len += IEEE80211_CRC_LEN; 1242190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1243156321Sdamien desc->flags |= htole32(RT2661_TX_OFDM); 1244156321Sdamien 1245156321Sdamien plcp_length = len & 0xfff; 1246156321Sdamien desc->plcp_length_hi = plcp_length >> 6; 1247156321Sdamien desc->plcp_length_lo = plcp_length & 0x3f; 1248156321Sdamien } else { 1249156321Sdamien plcp_length = (16 * len + rate - 1) / rate; 1250156321Sdamien if (rate == 22) { 1251156321Sdamien remainder = (16 * len) % 22; 1252156321Sdamien if (remainder != 0 && remainder < 7) 1253156321Sdamien desc->plcp_service |= RT2661_PLCP_LENGEXT; 1254156321Sdamien } 1255156321Sdamien desc->plcp_length_hi = plcp_length >> 8; 1256156321Sdamien desc->plcp_length_lo = plcp_length & 0xff; 1257156321Sdamien 1258156321Sdamien if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1259156321Sdamien desc->plcp_signal |= 0x08; 1260156321Sdamien } 1261156321Sdamien 1262156321Sdamien /* RT2x61 supports scatter with up to 5 segments */ 1263156321Sdamien for (i = 0; i < nsegs; i++) { 1264156321Sdamien desc->addr[i] = htole32(segs[i].ds_addr); 1265156321Sdamien desc->len [i] = htole16(segs[i].ds_len); 1266156321Sdamien } 1267156321Sdamien} 1268156321Sdamien 1269156321Sdamienstatic int 1270156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1271156321Sdamien struct ieee80211_node *ni) 1272156321Sdamien{ 1273178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1274178354Ssam struct ieee80211com *ic = ni->ni_ic; 1275156321Sdamien struct rt2661_tx_desc *desc; 1276156321Sdamien struct rt2661_tx_data *data; 1277156321Sdamien struct ieee80211_frame *wh; 1278173386Skevlo struct ieee80211_key *k; 1279156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1280156321Sdamien uint16_t dur; 1281156321Sdamien uint32_t flags = 0; /* XXX HWSEQ */ 1282156321Sdamien int nsegs, rate, error; 1283156321Sdamien 1284156321Sdamien desc = &sc->mgtq.desc[sc->mgtq.cur]; 1285156321Sdamien data = &sc->mgtq.data[sc->mgtq.cur]; 1286156321Sdamien 1287178354Ssam rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1288156321Sdamien 1289173386Skevlo wh = mtod(m0, struct ieee80211_frame *); 1290173386Skevlo 1291260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1292178354Ssam k = ieee80211_crypto_encap(ni, m0); 1293173386Skevlo if (k == NULL) { 1294173386Skevlo m_freem(m0); 1295173386Skevlo return ENOBUFS; 1296173386Skevlo } 1297173386Skevlo } 1298173386Skevlo 1299156321Sdamien error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0, 1300156321Sdamien segs, &nsegs, 0); 1301156321Sdamien if (error != 0) { 1302156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1303156321Sdamien error); 1304156321Sdamien m_freem(m0); 1305156321Sdamien return error; 1306156321Sdamien } 1307156321Sdamien 1308192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1309156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1310156321Sdamien 1311156321Sdamien tap->wt_flags = 0; 1312156321Sdamien tap->wt_rate = rate; 1313156321Sdamien 1314192468Ssam ieee80211_radiotap_tx(vap, m0); 1315156321Sdamien } 1316156321Sdamien 1317156321Sdamien data->m = m0; 1318156321Sdamien data->ni = ni; 1319178354Ssam /* management frames are not taken into account for amrr */ 1320178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1321156321Sdamien 1322156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1323156321Sdamien 1324156321Sdamien if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1325156321Sdamien flags |= RT2661_TX_NEED_ACK; 1326156321Sdamien 1327190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1328178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1329156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1330156321Sdamien 1331156321Sdamien /* tell hardware to add timestamp in probe responses */ 1332156321Sdamien if ((wh->i_fc[0] & 1333156321Sdamien (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1334156321Sdamien (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1335156321Sdamien flags |= RT2661_TX_TIMESTAMP; 1336156321Sdamien } 1337156321Sdamien 1338156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1339156321Sdamien m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1340156321Sdamien 1341156321Sdamien bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1342156321Sdamien bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1343156321Sdamien BUS_DMASYNC_PREWRITE); 1344156321Sdamien 1345178354Ssam DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1346178354Ssam m0->m_pkthdr.len, sc->mgtq.cur, rate); 1347156321Sdamien 1348156321Sdamien /* kick mgt */ 1349156321Sdamien sc->mgtq.queued++; 1350156321Sdamien sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1351156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1352156321Sdamien 1353156321Sdamien return 0; 1354156321Sdamien} 1355156321Sdamien 1356178354Ssamstatic int 1357178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac, 1358178354Ssam const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1359156321Sdamien{ 1360178354Ssam struct ieee80211com *ic = ni->ni_ic; 1361178354Ssam struct rt2661_tx_ring *txq = &sc->txq[ac]; 1362178354Ssam const struct ieee80211_frame *wh; 1363178354Ssam struct rt2661_tx_desc *desc; 1364178354Ssam struct rt2661_tx_data *data; 1365178354Ssam struct mbuf *mprot; 1366178354Ssam int protrate, ackrate, pktlen, flags, isshort, error; 1367178354Ssam uint16_t dur; 1368178354Ssam bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1369178354Ssam int nsegs; 1370156321Sdamien 1371178354Ssam KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1372178354Ssam ("protection %d", prot)); 1373178354Ssam 1374178354Ssam wh = mtod(m, const struct ieee80211_frame *); 1375178354Ssam pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1376178354Ssam 1377190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1378190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1379178354Ssam 1380178354Ssam isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1381190532Ssam dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1382190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1383178354Ssam flags = RT2661_TX_MORE_FRAG; 1384178354Ssam if (prot == IEEE80211_PROT_RTSCTS) { 1385178354Ssam /* NB: CTS is the same size as an ACK */ 1386190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1387178354Ssam flags |= RT2661_TX_NEED_ACK; 1388178354Ssam mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1389178354Ssam } else { 1390178354Ssam mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1391156321Sdamien } 1392178354Ssam if (mprot == NULL) { 1393178354Ssam /* XXX stat + msg */ 1394178354Ssam return ENOBUFS; 1395178354Ssam } 1396156321Sdamien 1397178354Ssam data = &txq->data[txq->cur]; 1398178354Ssam desc = &txq->desc[txq->cur]; 1399156321Sdamien 1400178354Ssam error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs, 1401178354Ssam &nsegs, 0); 1402178354Ssam if (error != 0) { 1403178354Ssam device_printf(sc->sc_dev, 1404178354Ssam "could not map mbuf (error %d)\n", error); 1405178354Ssam m_freem(mprot); 1406178354Ssam return error; 1407178354Ssam } 1408156321Sdamien 1409178354Ssam data->m = mprot; 1410178354Ssam data->ni = ieee80211_ref_node(ni); 1411178354Ssam /* ctl frames are not taken into account for amrr */ 1412178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1413156321Sdamien 1414178354Ssam rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1415178354Ssam protrate, segs, 1, ac); 1416178354Ssam 1417178354Ssam bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1418178354Ssam bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1419178354Ssam 1420178354Ssam txq->queued++; 1421178354Ssam txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1422178354Ssam 1423178354Ssam return 0; 1424156321Sdamien} 1425156321Sdamien 1426156321Sdamienstatic int 1427156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1428156321Sdamien struct ieee80211_node *ni, int ac) 1429156321Sdamien{ 1430178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1431287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1432156321Sdamien struct rt2661_tx_ring *txq = &sc->txq[ac]; 1433156321Sdamien struct rt2661_tx_desc *desc; 1434156321Sdamien struct rt2661_tx_data *data; 1435156321Sdamien struct ieee80211_frame *wh; 1436178354Ssam const struct ieee80211_txparam *tp; 1437156321Sdamien struct ieee80211_key *k; 1438156321Sdamien const struct chanAccParams *cap; 1439156321Sdamien struct mbuf *mnew; 1440156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1441156321Sdamien uint16_t dur; 1442178354Ssam uint32_t flags; 1443156321Sdamien int error, nsegs, rate, noack = 0; 1444156321Sdamien 1445156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1446156321Sdamien 1447178354Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1448178354Ssam if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1449178354Ssam rate = tp->mcastrate; 1450178354Ssam } else if (m0->m_flags & M_EAPOL) { 1451178354Ssam rate = tp->mgmtrate; 1452178354Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1453178354Ssam rate = tp->ucastrate; 1454156321Sdamien } else { 1455206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 1456178354Ssam rate = ni->ni_txrate; 1457156321Sdamien } 1458156321Sdamien rate &= IEEE80211_RATE_VAL; 1459156321Sdamien 1460156321Sdamien if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1461156321Sdamien cap = &ic->ic_wme.wme_chanParams; 1462156321Sdamien noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1463156321Sdamien } 1464156321Sdamien 1465260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1466178354Ssam k = ieee80211_crypto_encap(ni, m0); 1467156321Sdamien if (k == NULL) { 1468156321Sdamien m_freem(m0); 1469156321Sdamien return ENOBUFS; 1470156321Sdamien } 1471156321Sdamien 1472156321Sdamien /* packet header may have moved, reset our local pointer */ 1473156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1474156321Sdamien } 1475156321Sdamien 1476178354Ssam flags = 0; 1477178354Ssam if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1478178354Ssam int prot = IEEE80211_PROT_NONE; 1479178354Ssam if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1480178354Ssam prot = IEEE80211_PROT_RTSCTS; 1481178354Ssam else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1482190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1483178354Ssam prot = ic->ic_protmode; 1484178354Ssam if (prot != IEEE80211_PROT_NONE) { 1485178354Ssam error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1486178354Ssam if (error) { 1487178354Ssam m_freem(m0); 1488178354Ssam return error; 1489178354Ssam } 1490178354Ssam flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1491156321Sdamien } 1492156321Sdamien } 1493156321Sdamien 1494156321Sdamien data = &txq->data[txq->cur]; 1495156321Sdamien desc = &txq->desc[txq->cur]; 1496156321Sdamien 1497156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs, 1498156321Sdamien &nsegs, 0); 1499156321Sdamien if (error != 0 && error != EFBIG) { 1500156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1501156321Sdamien error); 1502156321Sdamien m_freem(m0); 1503156321Sdamien return error; 1504156321Sdamien } 1505156321Sdamien if (error != 0) { 1506243857Sglebius mnew = m_defrag(m0, M_NOWAIT); 1507156321Sdamien if (mnew == NULL) { 1508156321Sdamien device_printf(sc->sc_dev, 1509156321Sdamien "could not defragment mbuf\n"); 1510156321Sdamien m_freem(m0); 1511156321Sdamien return ENOBUFS; 1512156321Sdamien } 1513156321Sdamien m0 = mnew; 1514156321Sdamien 1515156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, 1516156321Sdamien segs, &nsegs, 0); 1517156321Sdamien if (error != 0) { 1518156321Sdamien device_printf(sc->sc_dev, 1519156321Sdamien "could not map mbuf (error %d)\n", error); 1520156321Sdamien m_freem(m0); 1521156321Sdamien return error; 1522156321Sdamien } 1523156321Sdamien 1524156321Sdamien /* packet header have moved, reset our local pointer */ 1525156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1526156321Sdamien } 1527156321Sdamien 1528192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1529156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1530156321Sdamien 1531156321Sdamien tap->wt_flags = 0; 1532156321Sdamien tap->wt_rate = rate; 1533156321Sdamien 1534192468Ssam ieee80211_radiotap_tx(vap, m0); 1535156321Sdamien } 1536156321Sdamien 1537156321Sdamien data->m = m0; 1538156321Sdamien data->ni = ni; 1539156321Sdamien 1540156321Sdamien /* remember link conditions for rate adaptation algorithm */ 1541178354Ssam if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1542178354Ssam data->rix = ni->ni_txrate; 1543178354Ssam /* XXX probably need last rssi value and not avg */ 1544178354Ssam data->rssi = ic->ic_node_getrssi(ni); 1545156321Sdamien } else 1546178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1547156321Sdamien 1548156321Sdamien if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1549156321Sdamien flags |= RT2661_TX_NEED_ACK; 1550156321Sdamien 1551190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1552178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1553156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1554156321Sdamien } 1555156321Sdamien 1556156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1557156321Sdamien nsegs, ac); 1558156321Sdamien 1559156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1560156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1561156321Sdamien 1562178354Ssam DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1563178354Ssam m0->m_pkthdr.len, txq->cur, rate); 1564156321Sdamien 1565156321Sdamien /* kick Tx */ 1566156321Sdamien txq->queued++; 1567156321Sdamien txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1568156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1569156321Sdamien 1570156321Sdamien return 0; 1571156321Sdamien} 1572156321Sdamien 1573287197Sglebiusstatic int 1574287197Sglebiusrt2661_transmit(struct ieee80211com *ic, struct mbuf *m) 1575287197Sglebius{ 1576287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1577287197Sglebius int error; 1578287197Sglebius 1579287197Sglebius RAL_LOCK(sc); 1580287197Sglebius if ((sc->sc_flags & RAL_RUNNING) == 0) { 1581287197Sglebius RAL_UNLOCK(sc); 1582287197Sglebius return (ENXIO); 1583287197Sglebius } 1584287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 1585287197Sglebius if (error) { 1586287197Sglebius RAL_UNLOCK(sc); 1587287197Sglebius return (error); 1588287197Sglebius } 1589287197Sglebius rt2661_start(sc); 1590287197Sglebius RAL_UNLOCK(sc); 1591287197Sglebius 1592287197Sglebius return (0); 1593287197Sglebius} 1594287197Sglebius 1595156321Sdamienstatic void 1596287197Sglebiusrt2661_start(struct rt2661_softc *sc) 1597156321Sdamien{ 1598178354Ssam struct mbuf *m; 1599156321Sdamien struct ieee80211_node *ni; 1600156321Sdamien int ac; 1601156321Sdamien 1602178354Ssam RAL_LOCK_ASSERT(sc); 1603156321Sdamien 1604156975Sdamien /* prevent management frames from being sent if we're not ready */ 1605287197Sglebius if (!(sc->sc_flags & RAL_RUNNING) || sc->sc_invalid) 1606156975Sdamien return; 1607156975Sdamien 1608287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1609178354Ssam ac = M_WME_GETAC(m); 1610178354Ssam if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1611178354Ssam /* there is no place left in this ring */ 1612287197Sglebius mbufq_prepend(&sc->sc_snd, m); 1613178354Ssam break; 1614178354Ssam } 1615178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1616178354Ssam if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1617178354Ssam ieee80211_free_node(ni); 1618287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 1619287197Sglebius IFCOUNTER_OERRORS, 1); 1620178354Ssam break; 1621178354Ssam } 1622178354Ssam sc->sc_tx_timer = 5; 1623178354Ssam } 1624178354Ssam} 1625156321Sdamien 1626178354Ssamstatic int 1627178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1628178354Ssam const struct ieee80211_bpf_params *params) 1629178354Ssam{ 1630178354Ssam struct ieee80211com *ic = ni->ni_ic; 1631287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1632156321Sdamien 1633178354Ssam RAL_LOCK(sc); 1634156321Sdamien 1635178354Ssam /* prevent management frames from being sent if we're not ready */ 1636287197Sglebius if (!(sc->sc_flags & RAL_RUNNING)) { 1637178354Ssam RAL_UNLOCK(sc); 1638178354Ssam m_freem(m); 1639178354Ssam ieee80211_free_node(ni); 1640178354Ssam return ENETDOWN; 1641178354Ssam } 1642178354Ssam if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1643178354Ssam RAL_UNLOCK(sc); 1644178354Ssam m_freem(m); 1645178354Ssam ieee80211_free_node(ni); 1646178354Ssam return ENOBUFS; /* XXX */ 1647178354Ssam } 1648156321Sdamien 1649178354Ssam /* 1650178354Ssam * Legacy path; interpret frame contents to decide 1651178354Ssam * precisely how to send the frame. 1652178354Ssam * XXX raw path 1653178354Ssam */ 1654178354Ssam if (rt2661_tx_mgt(sc, m, ni) != 0) 1655178354Ssam goto bad; 1656178354Ssam sc->sc_tx_timer = 5; 1657156321Sdamien 1658178354Ssam RAL_UNLOCK(sc); 1659156321Sdamien 1660178354Ssam return 0; 1661178354Ssambad: 1662178354Ssam ieee80211_free_node(ni); 1663156321Sdamien RAL_UNLOCK(sc); 1664178354Ssam return EIO; /* XXX */ 1665156321Sdamien} 1666156321Sdamien 1667156321Sdamienstatic void 1668165352Sbmsrt2661_watchdog(void *arg) 1669156321Sdamien{ 1670165352Sbms struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1671156321Sdamien 1672178354Ssam RAL_LOCK_ASSERT(sc); 1673156321Sdamien 1674287197Sglebius KASSERT(sc->sc_flags & RAL_RUNNING, ("not running")); 1675156321Sdamien 1676178354Ssam if (sc->sc_invalid) /* card ejected */ 1677178354Ssam return; 1678156321Sdamien 1679178354Ssam if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1680287197Sglebius device_printf(sc->sc_dev, "device timeout\n"); 1681178354Ssam rt2661_init_locked(sc); 1682287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1683178354Ssam /* NB: callout is reset in rt2661_init() */ 1684178354Ssam return; 1685178354Ssam } 1686178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 1687156321Sdamien} 1688156321Sdamien 1689287197Sglebiusstatic void 1690287197Sglebiusrt2661_parent(struct ieee80211com *ic) 1691156321Sdamien{ 1692287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1693287197Sglebius int startall = 0; 1694156321Sdamien 1695287197Sglebius RAL_LOCK(sc); 1696287197Sglebius if (ic->ic_nrunning > 0) { 1697287197Sglebius if ((sc->sc_flags & RAL_RUNNING) == 0) { 1698287197Sglebius rt2661_init_locked(sc); 1699287197Sglebius startall = 1; 1700287197Sglebius } else 1701287197Sglebius rt2661_update_promisc(ic); 1702287197Sglebius } else if (sc->sc_flags & RAL_RUNNING) 1703287197Sglebius rt2661_stop_locked(sc); 1704287197Sglebius RAL_UNLOCK(sc); 1705287197Sglebius if (startall) 1706287197Sglebius ieee80211_start_all(ic); 1707156321Sdamien} 1708156321Sdamien 1709156321Sdamienstatic void 1710156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1711156321Sdamien{ 1712156321Sdamien uint32_t tmp; 1713156321Sdamien int ntries; 1714156321Sdamien 1715156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1716156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1717156321Sdamien break; 1718156321Sdamien DELAY(1); 1719156321Sdamien } 1720156321Sdamien if (ntries == 100) { 1721156321Sdamien device_printf(sc->sc_dev, "could not write to BBP\n"); 1722156321Sdamien return; 1723156321Sdamien } 1724156321Sdamien 1725156321Sdamien tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1726156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1727156321Sdamien 1728178354Ssam DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1729156321Sdamien} 1730156321Sdamien 1731156321Sdamienstatic uint8_t 1732156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1733156321Sdamien{ 1734156321Sdamien uint32_t val; 1735156321Sdamien int ntries; 1736156321Sdamien 1737156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1738156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1739156321Sdamien break; 1740156321Sdamien DELAY(1); 1741156321Sdamien } 1742156321Sdamien if (ntries == 100) { 1743156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1744156321Sdamien return 0; 1745156321Sdamien } 1746156321Sdamien 1747156321Sdamien val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1748156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1749156321Sdamien 1750156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1751156321Sdamien val = RAL_READ(sc, RT2661_PHY_CSR3); 1752156321Sdamien if (!(val & RT2661_BBP_BUSY)) 1753156321Sdamien return val & 0xff; 1754156321Sdamien DELAY(1); 1755156321Sdamien } 1756156321Sdamien 1757156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1758156321Sdamien return 0; 1759156321Sdamien} 1760156321Sdamien 1761156321Sdamienstatic void 1762156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1763156321Sdamien{ 1764156321Sdamien uint32_t tmp; 1765156321Sdamien int ntries; 1766156321Sdamien 1767156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1768156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1769156321Sdamien break; 1770156321Sdamien DELAY(1); 1771156321Sdamien } 1772156321Sdamien if (ntries == 100) { 1773156321Sdamien device_printf(sc->sc_dev, "could not write to RF\n"); 1774156321Sdamien return; 1775156321Sdamien } 1776156321Sdamien 1777156321Sdamien tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1778156321Sdamien (reg & 3); 1779156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1780156321Sdamien 1781156321Sdamien /* remember last written value in sc */ 1782156321Sdamien sc->rf_regs[reg] = val; 1783156321Sdamien 1784178354Ssam DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1785156321Sdamien} 1786156321Sdamien 1787156321Sdamienstatic int 1788156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1789156321Sdamien{ 1790156321Sdamien if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1791156321Sdamien return EIO; /* there is already a command pending */ 1792156321Sdamien 1793156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1794156321Sdamien RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1795156321Sdamien 1796156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1797156321Sdamien 1798156321Sdamien return 0; 1799156321Sdamien} 1800156321Sdamien 1801156321Sdamienstatic void 1802156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc) 1803156321Sdamien{ 1804156321Sdamien uint8_t bbp4, bbp77; 1805156321Sdamien uint32_t tmp; 1806156321Sdamien 1807156321Sdamien bbp4 = rt2661_bbp_read(sc, 4); 1808156321Sdamien bbp77 = rt2661_bbp_read(sc, 77); 1809156321Sdamien 1810156321Sdamien /* TBD */ 1811156321Sdamien 1812156321Sdamien /* make sure Rx is disabled before switching antenna */ 1813156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1814156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1815156321Sdamien 1816156321Sdamien rt2661_bbp_write(sc, 4, bbp4); 1817156321Sdamien rt2661_bbp_write(sc, 77, bbp77); 1818156321Sdamien 1819156321Sdamien /* restore Rx filter */ 1820156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1821156321Sdamien} 1822156321Sdamien 1823156321Sdamien/* 1824156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates. 1825156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates. 1826156321Sdamien */ 1827156321Sdamienstatic void 1828156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc) 1829156321Sdamien{ 1830287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1831156321Sdamien uint32_t tmp; 1832156321Sdamien 1833156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1834156321Sdamien 1835156321Sdamien tmp &= ~RT2661_MRR_CCK_FALLBACK; 1836178354Ssam if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1837156321Sdamien tmp |= RT2661_MRR_CCK_FALLBACK; 1838156321Sdamien tmp |= RT2661_MRR_ENABLED; 1839156321Sdamien 1840156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1841156321Sdamien} 1842156321Sdamien 1843156321Sdamienstatic void 1844156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc) 1845156321Sdamien{ 1846287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1847156321Sdamien uint32_t tmp; 1848156321Sdamien 1849156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1850156321Sdamien 1851156321Sdamien tmp &= ~RT2661_SHORT_PREAMBLE; 1852178354Ssam if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1853156321Sdamien tmp |= RT2661_SHORT_PREAMBLE; 1854156321Sdamien 1855156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1856156321Sdamien} 1857156321Sdamien 1858156321Sdamienstatic void 1859156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc, 1860156321Sdamien const struct ieee80211_rateset *rs) 1861156321Sdamien{ 1862287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1863156321Sdamien uint32_t mask = 0; 1864156321Sdamien uint8_t rate; 1865220502Sbschmidt int i; 1866156321Sdamien 1867156321Sdamien for (i = 0; i < rs->rs_nrates; i++) { 1868156321Sdamien rate = rs->rs_rates[i]; 1869156321Sdamien 1870156321Sdamien if (!(rate & IEEE80211_RATE_BASIC)) 1871156321Sdamien continue; 1872156321Sdamien 1873288087Sadrian mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, 1874288087Sadrian IEEE80211_RV(rate)); 1875156321Sdamien } 1876156321Sdamien 1877156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1878156321Sdamien 1879178354Ssam DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1880156321Sdamien} 1881156321Sdamien 1882156321Sdamien/* 1883156321Sdamien * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1884156321Sdamien * driver. 1885156321Sdamien */ 1886156321Sdamienstatic void 1887156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1888156321Sdamien{ 1889156321Sdamien uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1890156321Sdamien uint32_t tmp; 1891156321Sdamien 1892156321Sdamien /* update all BBP registers that depend on the band */ 1893156321Sdamien bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1894156321Sdamien bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1895156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) { 1896156321Sdamien bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1897156321Sdamien bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1898156321Sdamien } 1899156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1900156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1901156321Sdamien bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1902156321Sdamien } 1903156321Sdamien 1904156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 1905156321Sdamien rt2661_bbp_write(sc, 96, bbp96); 1906156321Sdamien rt2661_bbp_write(sc, 104, bbp104); 1907156321Sdamien 1908156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1909156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1910156321Sdamien rt2661_bbp_write(sc, 75, 0x80); 1911156321Sdamien rt2661_bbp_write(sc, 86, 0x80); 1912156321Sdamien rt2661_bbp_write(sc, 88, 0x80); 1913156321Sdamien } 1914156321Sdamien 1915156321Sdamien rt2661_bbp_write(sc, 35, bbp35); 1916156321Sdamien rt2661_bbp_write(sc, 97, bbp97); 1917156321Sdamien rt2661_bbp_write(sc, 98, bbp98); 1918156321Sdamien 1919156321Sdamien tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1920156321Sdamien tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1921156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(c)) 1922156321Sdamien tmp |= RT2661_PA_PE_2GHZ; 1923156321Sdamien else 1924156321Sdamien tmp |= RT2661_PA_PE_5GHZ; 1925156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1926156321Sdamien} 1927156321Sdamien 1928156321Sdamienstatic void 1929156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1930156321Sdamien{ 1931287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1932156321Sdamien const struct rfprog *rfprog; 1933156321Sdamien uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1934156321Sdamien int8_t power; 1935156321Sdamien u_int i, chan; 1936156321Sdamien 1937156321Sdamien chan = ieee80211_chan2ieee(ic, c); 1938178354Ssam KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1939156321Sdamien 1940156321Sdamien /* select the appropriate RF settings based on what EEPROM says */ 1941156321Sdamien rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1942156321Sdamien 1943156321Sdamien /* find the settings for this channel (we know it exists) */ 1944156321Sdamien for (i = 0; rfprog[i].chan != chan; i++); 1945156321Sdamien 1946156321Sdamien power = sc->txpow[i]; 1947156321Sdamien if (power < 0) { 1948156321Sdamien bbp94 += power; 1949156321Sdamien power = 0; 1950156321Sdamien } else if (power > 31) { 1951156321Sdamien bbp94 += power - 31; 1952156321Sdamien power = 31; 1953156321Sdamien } 1954156321Sdamien 1955156321Sdamien /* 1956156321Sdamien * If we are switching from the 2GHz band to the 5GHz band or 1957156321Sdamien * vice-versa, BBP registers need to be reprogrammed. 1958156321Sdamien */ 1959156321Sdamien if (c->ic_flags != sc->sc_curchan->ic_flags) { 1960156321Sdamien rt2661_select_band(sc, c); 1961156321Sdamien rt2661_select_antenna(sc); 1962156321Sdamien } 1963156321Sdamien sc->sc_curchan = c; 1964156321Sdamien 1965156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1966156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1967156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 1968156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1969156321Sdamien 1970156321Sdamien DELAY(200); 1971156321Sdamien 1972156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1973156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1974156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 1975156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1976156321Sdamien 1977156321Sdamien DELAY(200); 1978156321Sdamien 1979156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1980156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1981156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 1982156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1983156321Sdamien 1984156321Sdamien /* enable smart mode for MIMO-capable RFs */ 1985156321Sdamien bbp3 = rt2661_bbp_read(sc, 3); 1986156321Sdamien 1987156321Sdamien bbp3 &= ~RT2661_SMART_MODE; 1988156321Sdamien if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 1989156321Sdamien bbp3 |= RT2661_SMART_MODE; 1990156321Sdamien 1991156321Sdamien rt2661_bbp_write(sc, 3, bbp3); 1992156321Sdamien 1993156321Sdamien if (bbp94 != RT2661_BBPR94_DEFAULT) 1994156321Sdamien rt2661_bbp_write(sc, 94, bbp94); 1995156321Sdamien 1996156321Sdamien /* 5GHz radio needs a 1ms delay here */ 1997156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) 1998156321Sdamien DELAY(1000); 1999156321Sdamien} 2000156321Sdamien 2001156321Sdamienstatic void 2002156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2003156321Sdamien{ 2004156321Sdamien uint32_t tmp; 2005156321Sdamien 2006156321Sdamien tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2007156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2008156321Sdamien 2009156321Sdamien tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2010156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2011156321Sdamien} 2012156321Sdamien 2013156321Sdamienstatic void 2014156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2015156321Sdamien{ 2016156321Sdamien uint32_t tmp; 2017156321Sdamien 2018156321Sdamien tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2019156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2020156321Sdamien 2021156321Sdamien tmp = addr[4] | addr[5] << 8; 2022156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2023156321Sdamien} 2024156321Sdamien 2025156321Sdamienstatic void 2026283540Sglebiusrt2661_update_promisc(struct ieee80211com *ic) 2027156321Sdamien{ 2028283540Sglebius struct rt2661_softc *sc = ic->ic_softc; 2029156321Sdamien uint32_t tmp; 2030156321Sdamien 2031156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2032156321Sdamien 2033156321Sdamien tmp &= ~RT2661_DROP_NOT_TO_ME; 2034287197Sglebius if (ic->ic_promisc == 0) 2035156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2036156321Sdamien 2037156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2038156321Sdamien 2039283540Sglebius DPRINTF(sc, "%s promiscuous mode\n", 2040287197Sglebius (ic->ic_promisc > 0) ? "entering" : "leaving"); 2041156321Sdamien} 2042156321Sdamien 2043156321Sdamien/* 2044156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring. 2045156321Sdamien */ 2046156321Sdamienstatic int 2047156321Sdamienrt2661_wme_update(struct ieee80211com *ic) 2048156321Sdamien{ 2049287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2050156321Sdamien const struct wmeParams *wmep; 2051156321Sdamien 2052156321Sdamien wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2053156321Sdamien 2054156321Sdamien /* XXX: not sure about shifts. */ 2055156321Sdamien /* XXX: the reference driver plays with AC_VI settings too. */ 2056156321Sdamien 2057156321Sdamien /* update TxOp */ 2058156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2059156321Sdamien wmep[WME_AC_BE].wmep_txopLimit << 16 | 2060156321Sdamien wmep[WME_AC_BK].wmep_txopLimit); 2061156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2062156321Sdamien wmep[WME_AC_VI].wmep_txopLimit << 16 | 2063156321Sdamien wmep[WME_AC_VO].wmep_txopLimit); 2064156321Sdamien 2065156321Sdamien /* update CWmin */ 2066156321Sdamien RAL_WRITE(sc, RT2661_CWMIN_CSR, 2067156321Sdamien wmep[WME_AC_BE].wmep_logcwmin << 12 | 2068156321Sdamien wmep[WME_AC_BK].wmep_logcwmin << 8 | 2069156321Sdamien wmep[WME_AC_VI].wmep_logcwmin << 4 | 2070156321Sdamien wmep[WME_AC_VO].wmep_logcwmin); 2071156321Sdamien 2072156321Sdamien /* update CWmax */ 2073156321Sdamien RAL_WRITE(sc, RT2661_CWMAX_CSR, 2074156321Sdamien wmep[WME_AC_BE].wmep_logcwmax << 12 | 2075156321Sdamien wmep[WME_AC_BK].wmep_logcwmax << 8 | 2076156321Sdamien wmep[WME_AC_VI].wmep_logcwmax << 4 | 2077156321Sdamien wmep[WME_AC_VO].wmep_logcwmax); 2078156321Sdamien 2079156321Sdamien /* update Aifsn */ 2080156321Sdamien RAL_WRITE(sc, RT2661_AIFSN_CSR, 2081156321Sdamien wmep[WME_AC_BE].wmep_aifsn << 12 | 2082156321Sdamien wmep[WME_AC_BK].wmep_aifsn << 8 | 2083156321Sdamien wmep[WME_AC_VI].wmep_aifsn << 4 | 2084156321Sdamien wmep[WME_AC_VO].wmep_aifsn); 2085156321Sdamien 2086156321Sdamien return 0; 2087156321Sdamien} 2088156321Sdamien 2089156321Sdamienstatic void 2090283540Sglebiusrt2661_update_slot(struct ieee80211com *ic) 2091156321Sdamien{ 2092283540Sglebius struct rt2661_softc *sc = ic->ic_softc; 2093156321Sdamien uint8_t slottime; 2094156321Sdamien uint32_t tmp; 2095156321Sdamien 2096156321Sdamien slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2097156321Sdamien 2098156321Sdamien tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2099156321Sdamien tmp = (tmp & ~0xff) | slottime; 2100156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2101156321Sdamien} 2102156321Sdamien 2103156321Sdamienstatic const char * 2104156321Sdamienrt2661_get_rf(int rev) 2105156321Sdamien{ 2106156321Sdamien switch (rev) { 2107156321Sdamien case RT2661_RF_5225: return "RT5225"; 2108156321Sdamien case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2109156321Sdamien case RT2661_RF_2527: return "RT2527"; 2110156321Sdamien case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2111156321Sdamien default: return "unknown"; 2112156321Sdamien } 2113156321Sdamien} 2114156321Sdamien 2115156321Sdamienstatic void 2116190526Ssamrt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2117156321Sdamien{ 2118156321Sdamien uint16_t val; 2119156321Sdamien int i; 2120156321Sdamien 2121156321Sdamien /* read MAC address */ 2122156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2123190526Ssam macaddr[0] = val & 0xff; 2124190526Ssam macaddr[1] = val >> 8; 2125156321Sdamien 2126156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2127190526Ssam macaddr[2] = val & 0xff; 2128190526Ssam macaddr[3] = val >> 8; 2129156321Sdamien 2130156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2131190526Ssam macaddr[4] = val & 0xff; 2132190526Ssam macaddr[5] = val >> 8; 2133156321Sdamien 2134156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2135156321Sdamien /* XXX: test if different from 0xffff? */ 2136156321Sdamien sc->rf_rev = (val >> 11) & 0x1f; 2137156321Sdamien sc->hw_radio = (val >> 10) & 0x1; 2138156321Sdamien sc->rx_ant = (val >> 4) & 0x3; 2139156321Sdamien sc->tx_ant = (val >> 2) & 0x3; 2140156321Sdamien sc->nb_ant = val & 0x3; 2141156321Sdamien 2142178354Ssam DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2143156321Sdamien 2144156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2145156321Sdamien sc->ext_5ghz_lna = (val >> 6) & 0x1; 2146156321Sdamien sc->ext_2ghz_lna = (val >> 4) & 0x1; 2147156321Sdamien 2148178354Ssam DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2149178354Ssam sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2150156321Sdamien 2151156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2152156321Sdamien if ((val & 0xff) != 0xff) 2153156321Sdamien sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2154156321Sdamien 2155170530Ssam /* Only [-10, 10] is valid */ 2156170530Ssam if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2157170530Ssam sc->rssi_2ghz_corr = 0; 2158170530Ssam 2159156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2160156321Sdamien if ((val & 0xff) != 0xff) 2161156321Sdamien sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2162156321Sdamien 2163170530Ssam /* Only [-10, 10] is valid */ 2164170530Ssam if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2165170530Ssam sc->rssi_5ghz_corr = 0; 2166170530Ssam 2167156321Sdamien /* adjust RSSI correction for external low-noise amplifier */ 2168156321Sdamien if (sc->ext_2ghz_lna) 2169156321Sdamien sc->rssi_2ghz_corr -= 14; 2170156321Sdamien if (sc->ext_5ghz_lna) 2171156321Sdamien sc->rssi_5ghz_corr -= 14; 2172156321Sdamien 2173178354Ssam DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2174178354Ssam sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2175156321Sdamien 2176156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2177156321Sdamien if ((val >> 8) != 0xff) 2178156321Sdamien sc->rfprog = (val >> 8) & 0x3; 2179156321Sdamien if ((val & 0xff) != 0xff) 2180156321Sdamien sc->rffreq = val & 0xff; 2181156321Sdamien 2182178354Ssam DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2183156321Sdamien 2184156321Sdamien /* read Tx power for all a/b/g channels */ 2185156321Sdamien for (i = 0; i < 19; i++) { 2186156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2187156321Sdamien sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2188178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2189178354Ssam rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2190156321Sdamien sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2191178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2192178354Ssam rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2193156321Sdamien } 2194156321Sdamien 2195156321Sdamien /* read vendor-specific BBP values */ 2196156321Sdamien for (i = 0; i < 16; i++) { 2197156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2198156321Sdamien if (val == 0 || val == 0xffff) 2199156321Sdamien continue; /* skip invalid entries */ 2200156321Sdamien sc->bbp_prom[i].reg = val >> 8; 2201156321Sdamien sc->bbp_prom[i].val = val & 0xff; 2202178354Ssam DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2203178354Ssam sc->bbp_prom[i].val); 2204156321Sdamien } 2205156321Sdamien} 2206156321Sdamien 2207156321Sdamienstatic int 2208156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc) 2209156321Sdamien{ 2210156321Sdamien int i, ntries; 2211156321Sdamien uint8_t val; 2212156321Sdamien 2213156321Sdamien /* wait for BBP to be ready */ 2214156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 2215156321Sdamien val = rt2661_bbp_read(sc, 0); 2216156321Sdamien if (val != 0 && val != 0xff) 2217156321Sdamien break; 2218156321Sdamien DELAY(100); 2219156321Sdamien } 2220156321Sdamien if (ntries == 100) { 2221156321Sdamien device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2222156321Sdamien return EIO; 2223156321Sdamien } 2224156321Sdamien 2225156321Sdamien /* initialize BBP registers to default values */ 2226288087Sadrian for (i = 0; i < nitems(rt2661_def_bbp); i++) { 2227156321Sdamien rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2228156321Sdamien rt2661_def_bbp[i].val); 2229156321Sdamien } 2230156321Sdamien 2231156321Sdamien /* write vendor-specific BBP values (from EEPROM) */ 2232156321Sdamien for (i = 0; i < 16; i++) { 2233156321Sdamien if (sc->bbp_prom[i].reg == 0) 2234156321Sdamien continue; 2235156321Sdamien rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2236156321Sdamien } 2237156321Sdamien 2238156321Sdamien return 0; 2239156321Sdamien} 2240156321Sdamien 2241156321Sdamienstatic void 2242178354Ssamrt2661_init_locked(struct rt2661_softc *sc) 2243156321Sdamien{ 2244287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2245287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2246156321Sdamien uint32_t tmp, sta[3]; 2247178354Ssam int i, error, ntries; 2248156321Sdamien 2249178354Ssam RAL_LOCK_ASSERT(sc); 2250156975Sdamien 2251178354Ssam if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2252178354Ssam error = rt2661_load_microcode(sc); 2253178354Ssam if (error != 0) { 2254287197Sglebius device_printf(sc->sc_dev, 2255178354Ssam "%s: could not load 8051 microcode, error %d\n", 2256178354Ssam __func__, error); 2257178354Ssam return; 2258178354Ssam } 2259178354Ssam sc->sc_flags |= RAL_FW_LOADED; 2260178354Ssam } 2261178354Ssam 2262170530Ssam rt2661_stop_locked(sc); 2263156321Sdamien 2264156321Sdamien /* initialize Tx rings */ 2265156321Sdamien RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2266156321Sdamien RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2267156321Sdamien RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2268156321Sdamien RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2269156321Sdamien 2270156321Sdamien /* initialize Mgt ring */ 2271156321Sdamien RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2272156321Sdamien 2273156321Sdamien /* initialize Rx ring */ 2274156321Sdamien RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2275156321Sdamien 2276156321Sdamien /* initialize Tx rings sizes */ 2277156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2278156321Sdamien RT2661_TX_RING_COUNT << 24 | 2279156321Sdamien RT2661_TX_RING_COUNT << 16 | 2280156321Sdamien RT2661_TX_RING_COUNT << 8 | 2281156321Sdamien RT2661_TX_RING_COUNT); 2282156321Sdamien 2283156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2284156321Sdamien RT2661_TX_DESC_WSIZE << 16 | 2285156321Sdamien RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2286156321Sdamien RT2661_MGT_RING_COUNT); 2287156321Sdamien 2288156321Sdamien /* initialize Rx rings */ 2289156321Sdamien RAL_WRITE(sc, RT2661_RX_RING_CSR, 2290156321Sdamien RT2661_RX_DESC_BACK << 16 | 2291156321Sdamien RT2661_RX_DESC_WSIZE << 8 | 2292156321Sdamien RT2661_RX_RING_COUNT); 2293156321Sdamien 2294156321Sdamien /* XXX: some magic here */ 2295156321Sdamien RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2296156321Sdamien 2297156321Sdamien /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2298156321Sdamien RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2299156321Sdamien 2300156321Sdamien /* load base address of Rx ring */ 2301156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2302156321Sdamien 2303156321Sdamien /* initialize MAC registers to default values */ 2304288087Sadrian for (i = 0; i < nitems(rt2661_def_mac); i++) 2305156321Sdamien RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2306156321Sdamien 2307287197Sglebius rt2661_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2308156321Sdamien 2309156321Sdamien /* set host ready */ 2310156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2311156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2312156321Sdamien 2313156321Sdamien /* wait for BBP/RF to wakeup */ 2314156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 2315156321Sdamien if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2316156321Sdamien break; 2317156321Sdamien DELAY(1000); 2318156321Sdamien } 2319156321Sdamien if (ntries == 1000) { 2320156321Sdamien printf("timeout waiting for BBP/RF to wakeup\n"); 2321170530Ssam rt2661_stop_locked(sc); 2322156321Sdamien return; 2323156321Sdamien } 2324156321Sdamien 2325156321Sdamien if (rt2661_bbp_init(sc) != 0) { 2326170530Ssam rt2661_stop_locked(sc); 2327156321Sdamien return; 2328156321Sdamien } 2329156321Sdamien 2330156321Sdamien /* select default channel */ 2331156321Sdamien sc->sc_curchan = ic->ic_curchan; 2332156321Sdamien rt2661_select_band(sc, sc->sc_curchan); 2333156321Sdamien rt2661_select_antenna(sc); 2334156321Sdamien rt2661_set_chan(sc, sc->sc_curchan); 2335156321Sdamien 2336156321Sdamien /* update Rx filter */ 2337156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2338156321Sdamien 2339156321Sdamien tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2340156321Sdamien if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2341156321Sdamien tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2342156321Sdamien RT2661_DROP_ACKCTS; 2343195618Srpaulo if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2344195618Srpaulo ic->ic_opmode != IEEE80211_M_MBSS) 2345156321Sdamien tmp |= RT2661_DROP_TODS; 2346287197Sglebius if (ic->ic_promisc == 0) 2347156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2348156321Sdamien } 2349156321Sdamien 2350156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2351156321Sdamien 2352156321Sdamien /* clear STA registers */ 2353288087Sadrian RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, nitems(sta)); 2354156321Sdamien 2355156321Sdamien /* initialize ASIC */ 2356156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2357156321Sdamien 2358156321Sdamien /* clear any pending interrupt */ 2359156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2360156321Sdamien 2361156321Sdamien /* enable interrupts */ 2362156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2363156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2364156321Sdamien 2365156321Sdamien /* kick Rx */ 2366156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2367156321Sdamien 2368287197Sglebius sc->sc_flags |= RAL_RUNNING; 2369156321Sdamien 2370178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 2371156321Sdamien} 2372156321Sdamien 2373178354Ssamstatic void 2374178354Ssamrt2661_init(void *priv) 2375156321Sdamien{ 2376156321Sdamien struct rt2661_softc *sc = priv; 2377287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2378170530Ssam 2379170530Ssam RAL_LOCK(sc); 2380178354Ssam rt2661_init_locked(sc); 2381170530Ssam RAL_UNLOCK(sc); 2382178354Ssam 2383287197Sglebius if (sc->sc_flags & RAL_RUNNING) 2384178931Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2385170530Ssam} 2386170530Ssam 2387170530Ssamvoid 2388170530Ssamrt2661_stop_locked(struct rt2661_softc *sc) 2389170530Ssam{ 2390287197Sglebius volatile int *flags = &sc->sc_flags; 2391286437Sadrian uint32_t tmp; 2392156321Sdamien 2393178354Ssam while (*flags & RAL_INPUT_RUNNING) 2394170530Ssam msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2395156321Sdamien 2396178354Ssam callout_stop(&sc->watchdog_ch); 2397178354Ssam sc->sc_tx_timer = 0; 2398178354Ssam 2399287197Sglebius if (sc->sc_flags & RAL_RUNNING) { 2400287197Sglebius sc->sc_flags &= ~RAL_RUNNING; 2401178354Ssam 2402170530Ssam /* abort Tx (for all 5 Tx rings) */ 2403170530Ssam RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2404170530Ssam 2405170530Ssam /* disable Rx (value remains after reset!) */ 2406170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2407170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2408170530Ssam 2409170530Ssam /* reset ASIC */ 2410170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2411170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2412170530Ssam 2413170530Ssam /* disable interrupts */ 2414170530Ssam RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2415170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2416170530Ssam 2417170530Ssam /* clear any pending interrupt */ 2418170530Ssam RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2419170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2420170530Ssam 2421170530Ssam /* reset Tx and Rx rings */ 2422170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[0]); 2423170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[1]); 2424170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[2]); 2425170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[3]); 2426170530Ssam rt2661_reset_tx_ring(sc, &sc->mgtq); 2427170530Ssam rt2661_reset_rx_ring(sc, &sc->rxq); 2428170530Ssam } 2429156321Sdamien} 2430156321Sdamien 2431178354Ssamvoid 2432178354Ssamrt2661_stop(void *priv) 2433178354Ssam{ 2434178354Ssam struct rt2661_softc *sc = priv; 2435178354Ssam 2436178354Ssam RAL_LOCK(sc); 2437178354Ssam rt2661_stop_locked(sc); 2438178354Ssam RAL_UNLOCK(sc); 2439178354Ssam} 2440178354Ssam 2441156321Sdamienstatic int 2442178354Ssamrt2661_load_microcode(struct rt2661_softc *sc) 2443156321Sdamien{ 2444178354Ssam const struct firmware *fp; 2445178354Ssam const char *imagename; 2446178354Ssam int ntries, error; 2447156321Sdamien 2448178354Ssam RAL_LOCK_ASSERT(sc); 2449178354Ssam 2450178354Ssam switch (sc->sc_id) { 2451178354Ssam case 0x0301: imagename = "rt2561sfw"; break; 2452178354Ssam case 0x0302: imagename = "rt2561fw"; break; 2453178354Ssam case 0x0401: imagename = "rt2661fw"; break; 2454178354Ssam default: 2455287197Sglebius device_printf(sc->sc_dev, "%s: unexpected pci device id 0x%x, " 2456178354Ssam "don't know how to retrieve firmware\n", 2457178354Ssam __func__, sc->sc_id); 2458178354Ssam return EINVAL; 2459178354Ssam } 2460178354Ssam RAL_UNLOCK(sc); 2461178354Ssam fp = firmware_get(imagename); 2462178354Ssam RAL_LOCK(sc); 2463178354Ssam if (fp == NULL) { 2464287197Sglebius device_printf(sc->sc_dev, 2465287197Sglebius "%s: unable to retrieve firmware image %s\n", 2466178354Ssam __func__, imagename); 2467178354Ssam return EINVAL; 2468178354Ssam } 2469178354Ssam 2470178354Ssam /* 2471178354Ssam * Load 8051 microcode into NIC. 2472178354Ssam */ 2473156321Sdamien /* reset 8051 */ 2474156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2475156321Sdamien 2476156321Sdamien /* cancel any pending Host to MCU command */ 2477156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2478156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2479156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2480156321Sdamien 2481156321Sdamien /* write 8051's microcode */ 2482156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2483178354Ssam RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2484156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2485156321Sdamien 2486156321Sdamien /* kick 8051's ass */ 2487156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2488156321Sdamien 2489156321Sdamien /* wait for 8051 to initialize */ 2490156321Sdamien for (ntries = 0; ntries < 500; ntries++) { 2491156321Sdamien if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2492156321Sdamien break; 2493156321Sdamien DELAY(100); 2494156321Sdamien } 2495156321Sdamien if (ntries == 500) { 2496287197Sglebius device_printf(sc->sc_dev, 2497287197Sglebius "%s: timeout waiting for MCU to initialize\n", __func__); 2498178354Ssam error = EIO; 2499178354Ssam } else 2500178354Ssam error = 0; 2501178354Ssam 2502178354Ssam firmware_put(fp, FIRMWARE_UNLOAD); 2503178354Ssam return error; 2504156321Sdamien} 2505156321Sdamien 2506156321Sdamien#ifdef notyet 2507156321Sdamien/* 2508156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2509156321Sdamien * false CCA count. This function is called periodically (every seconds) when 2510156321Sdamien * in the RUN state. Values taken from the reference driver. 2511156321Sdamien */ 2512156321Sdamienstatic void 2513156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc) 2514156321Sdamien{ 2515156321Sdamien uint8_t bbp17; 2516156321Sdamien uint16_t cca; 2517156321Sdamien int lo, hi, dbm; 2518156321Sdamien 2519156321Sdamien /* 2520156321Sdamien * Tuning range depends on operating band and on the presence of an 2521156321Sdamien * external low-noise amplifier. 2522156321Sdamien */ 2523156321Sdamien lo = 0x20; 2524156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2525156321Sdamien lo += 0x08; 2526156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2527156321Sdamien (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2528156321Sdamien lo += 0x10; 2529156321Sdamien hi = lo + 0x20; 2530156321Sdamien 2531156321Sdamien /* retrieve false CCA count since last call (clear on read) */ 2532156321Sdamien cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2533156321Sdamien 2534156321Sdamien if (dbm >= -35) { 2535156321Sdamien bbp17 = 0x60; 2536156321Sdamien } else if (dbm >= -58) { 2537156321Sdamien bbp17 = hi; 2538156321Sdamien } else if (dbm >= -66) { 2539156321Sdamien bbp17 = lo + 0x10; 2540156321Sdamien } else if (dbm >= -74) { 2541156321Sdamien bbp17 = lo + 0x08; 2542156321Sdamien } else { 2543156321Sdamien /* RSSI < -74dBm, tune using false CCA count */ 2544156321Sdamien 2545156321Sdamien bbp17 = sc->bbp17; /* current value */ 2546156321Sdamien 2547156321Sdamien hi -= 2 * (-74 - dbm); 2548156321Sdamien if (hi < lo) 2549156321Sdamien hi = lo; 2550156321Sdamien 2551156321Sdamien if (bbp17 > hi) { 2552156321Sdamien bbp17 = hi; 2553156321Sdamien 2554156321Sdamien } else if (cca > 512) { 2555156321Sdamien if (++bbp17 > hi) 2556156321Sdamien bbp17 = hi; 2557156321Sdamien } else if (cca < 100) { 2558156321Sdamien if (--bbp17 < lo) 2559156321Sdamien bbp17 = lo; 2560156321Sdamien } 2561156321Sdamien } 2562156321Sdamien 2563156321Sdamien if (bbp17 != sc->bbp17) { 2564156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2565156321Sdamien sc->bbp17 = bbp17; 2566156321Sdamien } 2567156321Sdamien} 2568156321Sdamien 2569156321Sdamien/* 2570156321Sdamien * Enter/Leave radar detection mode. 2571156321Sdamien * This is for 802.11h additional regulatory domains. 2572156321Sdamien */ 2573156321Sdamienstatic void 2574156321Sdamienrt2661_radar_start(struct rt2661_softc *sc) 2575156321Sdamien{ 2576156321Sdamien uint32_t tmp; 2577156321Sdamien 2578156321Sdamien /* disable Rx */ 2579156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2580156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2581156321Sdamien 2582156321Sdamien rt2661_bbp_write(sc, 82, 0x20); 2583156321Sdamien rt2661_bbp_write(sc, 83, 0x00); 2584156321Sdamien rt2661_bbp_write(sc, 84, 0x40); 2585156321Sdamien 2586156321Sdamien /* save current BBP registers values */ 2587156321Sdamien sc->bbp18 = rt2661_bbp_read(sc, 18); 2588156321Sdamien sc->bbp21 = rt2661_bbp_read(sc, 21); 2589156321Sdamien sc->bbp22 = rt2661_bbp_read(sc, 22); 2590156321Sdamien sc->bbp16 = rt2661_bbp_read(sc, 16); 2591156321Sdamien sc->bbp17 = rt2661_bbp_read(sc, 17); 2592156321Sdamien sc->bbp64 = rt2661_bbp_read(sc, 64); 2593156321Sdamien 2594156321Sdamien rt2661_bbp_write(sc, 18, 0xff); 2595156321Sdamien rt2661_bbp_write(sc, 21, 0x3f); 2596156321Sdamien rt2661_bbp_write(sc, 22, 0x3f); 2597156321Sdamien rt2661_bbp_write(sc, 16, 0xbd); 2598156321Sdamien rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2599156321Sdamien rt2661_bbp_write(sc, 64, 0x21); 2600156321Sdamien 2601156321Sdamien /* restore Rx filter */ 2602156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2603156321Sdamien} 2604156321Sdamien 2605156321Sdamienstatic int 2606156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc) 2607156321Sdamien{ 2608156321Sdamien uint8_t bbp66; 2609156321Sdamien 2610156321Sdamien /* read radar detection result */ 2611156321Sdamien bbp66 = rt2661_bbp_read(sc, 66); 2612156321Sdamien 2613156321Sdamien /* restore BBP registers values */ 2614156321Sdamien rt2661_bbp_write(sc, 16, sc->bbp16); 2615156321Sdamien rt2661_bbp_write(sc, 17, sc->bbp17); 2616156321Sdamien rt2661_bbp_write(sc, 18, sc->bbp18); 2617156321Sdamien rt2661_bbp_write(sc, 21, sc->bbp21); 2618156321Sdamien rt2661_bbp_write(sc, 22, sc->bbp22); 2619156321Sdamien rt2661_bbp_write(sc, 64, sc->bbp64); 2620156321Sdamien 2621156321Sdamien return bbp66 == 1; 2622156321Sdamien} 2623156321Sdamien#endif 2624156321Sdamien 2625156321Sdamienstatic int 2626178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2627156321Sdamien{ 2628178354Ssam struct ieee80211com *ic = vap->iv_ic; 2629156321Sdamien struct ieee80211_beacon_offsets bo; 2630156321Sdamien struct rt2661_tx_desc desc; 2631156321Sdamien struct mbuf *m0; 2632156321Sdamien int rate; 2633156321Sdamien 2634178354Ssam m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2635156321Sdamien if (m0 == NULL) { 2636156321Sdamien device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2637156321Sdamien return ENOBUFS; 2638156321Sdamien } 2639156321Sdamien 2640156321Sdamien /* send beacons at the lowest available rate */ 2641178354Ssam rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2642156321Sdamien 2643156321Sdamien rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2644156321Sdamien m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2645156321Sdamien 2646156321Sdamien /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2647156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2648156321Sdamien 2649156321Sdamien /* copy beacon header and payload into NIC memory */ 2650156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2651156321Sdamien mtod(m0, uint8_t *), m0->m_pkthdr.len); 2652156321Sdamien 2653156321Sdamien m_freem(m0); 2654156321Sdamien 2655156321Sdamien return 0; 2656156321Sdamien} 2657156321Sdamien 2658156321Sdamien/* 2659156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2660156321Sdamien * and HostAP operating modes. 2661156321Sdamien */ 2662156321Sdamienstatic void 2663156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc) 2664156321Sdamien{ 2665287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2666178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2667156321Sdamien uint32_t tmp; 2668156321Sdamien 2669178354Ssam if (vap->iv_opmode != IEEE80211_M_STA) { 2670156321Sdamien /* 2671156321Sdamien * Change default 16ms TBTT adjustment to 8ms. 2672156321Sdamien * Must be done before enabling beacon generation. 2673156321Sdamien */ 2674156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2675156321Sdamien } 2676156321Sdamien 2677156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2678156321Sdamien 2679156321Sdamien /* set beacon interval (in 1/16ms unit) */ 2680178354Ssam tmp |= vap->iv_bss->ni_intval * 16; 2681156321Sdamien 2682156321Sdamien tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2683178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2684156321Sdamien tmp |= RT2661_TSF_MODE(1); 2685156321Sdamien else 2686156321Sdamien tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2687156321Sdamien 2688156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2689156321Sdamien} 2690156321Sdamien 2691192468Ssamstatic void 2692192468Ssamrt2661_enable_tsf(struct rt2661_softc *sc) 2693192468Ssam{ 2694192468Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, 2695192468Ssam (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2696192468Ssam | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2697192468Ssam} 2698192468Ssam 2699156321Sdamien/* 2700156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values 2701156321Sdamien * contained in Rx descriptors. The computation depends on which band the 2702156321Sdamien * frame was received. Correction values taken from the reference driver. 2703156321Sdamien */ 2704156321Sdamienstatic int 2705156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2706156321Sdamien{ 2707156321Sdamien int lna, agc, rssi; 2708156321Sdamien 2709156321Sdamien lna = (raw >> 5) & 0x3; 2710156321Sdamien agc = raw & 0x1f; 2711156321Sdamien 2712170530Ssam if (lna == 0) { 2713170530Ssam /* 2714170530Ssam * No mapping available. 2715170530Ssam * 2716170530Ssam * NB: Since RSSI is relative to noise floor, -1 is 2717170530Ssam * adequate for caller to know error happened. 2718170530Ssam */ 2719170530Ssam return -1; 2720170530Ssam } 2721156321Sdamien 2722170530Ssam rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2723170530Ssam 2724156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2725156321Sdamien rssi += sc->rssi_2ghz_corr; 2726156321Sdamien 2727156321Sdamien if (lna == 1) 2728156321Sdamien rssi -= 64; 2729156321Sdamien else if (lna == 2) 2730156321Sdamien rssi -= 74; 2731156321Sdamien else if (lna == 3) 2732156321Sdamien rssi -= 90; 2733156321Sdamien } else { 2734156321Sdamien rssi += sc->rssi_5ghz_corr; 2735156321Sdamien 2736156321Sdamien if (lna == 1) 2737156321Sdamien rssi -= 64; 2738156321Sdamien else if (lna == 2) 2739156321Sdamien rssi -= 86; 2740156321Sdamien else if (lna == 3) 2741156321Sdamien rssi -= 100; 2742156321Sdamien } 2743156321Sdamien return rssi; 2744156321Sdamien} 2745170530Ssam 2746170530Ssamstatic void 2747170530Ssamrt2661_scan_start(struct ieee80211com *ic) 2748170530Ssam{ 2749287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2750170530Ssam uint32_t tmp; 2751170530Ssam 2752170530Ssam /* abort TSF synchronization */ 2753170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2754170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2755287197Sglebius rt2661_set_bssid(sc, ieee80211broadcastaddr); 2756170530Ssam} 2757170530Ssam 2758170530Ssamstatic void 2759170530Ssamrt2661_scan_end(struct ieee80211com *ic) 2760170530Ssam{ 2761287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2762178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2763170530Ssam 2764170530Ssam rt2661_enable_tsf_sync(sc); 2765170530Ssam /* XXX keep local copy */ 2766178354Ssam rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2767170530Ssam} 2768170530Ssam 2769170530Ssamstatic void 2770170530Ssamrt2661_set_channel(struct ieee80211com *ic) 2771170530Ssam{ 2772287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2773170530Ssam 2774170530Ssam RAL_LOCK(sc); 2775170530Ssam rt2661_set_chan(sc, ic->ic_curchan); 2776170530Ssam RAL_UNLOCK(sc); 2777170530Ssam 2778170530Ssam} 2779