rt2661.c revision 178931
1156321Sdamien/* $FreeBSD: head/sys/dev/ral/rt2661.c 178931 2008-05-10 20:25:59Z thompsa $ */ 2156321Sdamien 3156321Sdamien/*- 4156321Sdamien * Copyright (c) 2006 5156321Sdamien * Damien Bergamini <damien.bergamini@free.fr> 6156321Sdamien * 7156321Sdamien * Permission to use, copy, modify, and distribute this software for any 8156321Sdamien * purpose with or without fee is hereby granted, provided that the above 9156321Sdamien * copyright notice and this permission notice appear in all copies. 10156321Sdamien * 11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18156321Sdamien */ 19156321Sdamien 20156321Sdamien#include <sys/cdefs.h> 21156321Sdamien__FBSDID("$FreeBSD: head/sys/dev/ral/rt2661.c 178931 2008-05-10 20:25:59Z thompsa $"); 22156321Sdamien 23156321Sdamien/*- 24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 25156321Sdamien * http://www.ralinktech.com/ 26156321Sdamien */ 27156321Sdamien 28156321Sdamien#include <sys/param.h> 29156321Sdamien#include <sys/sysctl.h> 30156321Sdamien#include <sys/sockio.h> 31156321Sdamien#include <sys/mbuf.h> 32156321Sdamien#include <sys/kernel.h> 33156321Sdamien#include <sys/socket.h> 34156321Sdamien#include <sys/systm.h> 35156321Sdamien#include <sys/malloc.h> 36164982Skevlo#include <sys/lock.h> 37164982Skevlo#include <sys/mutex.h> 38156321Sdamien#include <sys/module.h> 39156321Sdamien#include <sys/bus.h> 40156321Sdamien#include <sys/endian.h> 41178354Ssam#include <sys/firmware.h> 42156321Sdamien 43156321Sdamien#include <machine/bus.h> 44156321Sdamien#include <machine/resource.h> 45156321Sdamien#include <sys/rman.h> 46156321Sdamien 47156321Sdamien#include <net/bpf.h> 48156321Sdamien#include <net/if.h> 49156321Sdamien#include <net/if_arp.h> 50156321Sdamien#include <net/ethernet.h> 51156321Sdamien#include <net/if_dl.h> 52156321Sdamien#include <net/if_media.h> 53156321Sdamien#include <net/if_types.h> 54156321Sdamien 55156321Sdamien#include <net80211/ieee80211_var.h> 56178354Ssam#include <net80211/ieee80211_phy.h> 57156321Sdamien#include <net80211/ieee80211_radiotap.h> 58170530Ssam#include <net80211/ieee80211_regdomain.h> 59178354Ssam#include <net80211/ieee80211_amrr.h> 60156321Sdamien 61156321Sdamien#include <netinet/in.h> 62156321Sdamien#include <netinet/in_systm.h> 63156321Sdamien#include <netinet/in_var.h> 64156321Sdamien#include <netinet/ip.h> 65156321Sdamien#include <netinet/if_ether.h> 66156321Sdamien 67156327Ssilby#include <dev/ral/rt2661reg.h> 68156327Ssilby#include <dev/ral/rt2661var.h> 69156321Sdamien 70178354Ssam#define RAL_DEBUG 71156321Sdamien#ifdef RAL_DEBUG 72178354Ssam#define DPRINTF(sc, fmt, ...) do { \ 73178354Ssam if (sc->sc_debug > 0) \ 74178354Ssam printf(fmt, __VA_ARGS__); \ 75178354Ssam} while (0) 76178354Ssam#define DPRINTFN(sc, n, fmt, ...) do { \ 77178354Ssam if (sc->sc_debug >= (n)) \ 78178354Ssam printf(fmt, __VA_ARGS__); \ 79178354Ssam} while (0) 80156321Sdamien#else 81178354Ssam#define DPRINTF(sc, fmt, ...) 82178354Ssam#define DPRINTFN(sc, n, fmt, ...) 83156321Sdamien#endif 84156321Sdamien 85178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 86178354Ssam const char name[IFNAMSIZ], int unit, int opmode, 87178354Ssam int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 88178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]); 89178354Ssamstatic void rt2661_vap_delete(struct ieee80211vap *); 90156321Sdamienstatic void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 91156321Sdamien int); 92156321Sdamienstatic int rt2661_alloc_tx_ring(struct rt2661_softc *, 93156321Sdamien struct rt2661_tx_ring *, int); 94156321Sdamienstatic void rt2661_reset_tx_ring(struct rt2661_softc *, 95156321Sdamien struct rt2661_tx_ring *); 96156321Sdamienstatic void rt2661_free_tx_ring(struct rt2661_softc *, 97156321Sdamien struct rt2661_tx_ring *); 98156321Sdamienstatic int rt2661_alloc_rx_ring(struct rt2661_softc *, 99156321Sdamien struct rt2661_rx_ring *, int); 100156321Sdamienstatic void rt2661_reset_rx_ring(struct rt2661_softc *, 101156321Sdamien struct rt2661_rx_ring *); 102156321Sdamienstatic void rt2661_free_rx_ring(struct rt2661_softc *, 103156321Sdamien struct rt2661_rx_ring *); 104156321Sdamienstatic struct ieee80211_node *rt2661_node_alloc( 105156321Sdamien struct ieee80211_node_table *); 106178354Ssamstatic void rt2661_newassoc(struct ieee80211_node *, int); 107178354Ssamstatic int rt2661_newstate(struct ieee80211vap *, 108156321Sdamien enum ieee80211_state, int); 109156321Sdamienstatic uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 110156321Sdamienstatic void rt2661_rx_intr(struct rt2661_softc *); 111156321Sdamienstatic void rt2661_tx_intr(struct rt2661_softc *); 112156321Sdamienstatic void rt2661_tx_dma_intr(struct rt2661_softc *, 113156321Sdamien struct rt2661_tx_ring *); 114156321Sdamienstatic void rt2661_mcu_beacon_expire(struct rt2661_softc *); 115156321Sdamienstatic void rt2661_mcu_wakeup(struct rt2661_softc *); 116156321Sdamienstatic void rt2661_mcu_cmd_intr(struct rt2661_softc *); 117170530Ssamstatic void rt2661_scan_start(struct ieee80211com *); 118170530Ssamstatic void rt2661_scan_end(struct ieee80211com *); 119170530Ssamstatic void rt2661_set_channel(struct ieee80211com *); 120156321Sdamienstatic void rt2661_setup_tx_desc(struct rt2661_softc *, 121156321Sdamien struct rt2661_tx_desc *, uint32_t, uint16_t, int, 122156321Sdamien int, const bus_dma_segment_t *, int, int); 123156321Sdamienstatic int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 124156321Sdamien struct ieee80211_node *, int); 125156321Sdamienstatic int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 126156321Sdamien struct ieee80211_node *); 127178354Ssamstatic void rt2661_start_locked(struct ifnet *); 128156321Sdamienstatic void rt2661_start(struct ifnet *); 129178354Ssamstatic int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 130178354Ssam const struct ieee80211_bpf_params *); 131165352Sbmsstatic void rt2661_watchdog(void *); 132156321Sdamienstatic int rt2661_ioctl(struct ifnet *, u_long, caddr_t); 133156321Sdamienstatic void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 134156321Sdamien uint8_t); 135156321Sdamienstatic uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 136156321Sdamienstatic void rt2661_rf_write(struct rt2661_softc *, uint8_t, 137156321Sdamien uint32_t); 138156321Sdamienstatic int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 139156321Sdamien uint16_t); 140156321Sdamienstatic void rt2661_select_antenna(struct rt2661_softc *); 141156321Sdamienstatic void rt2661_enable_mrr(struct rt2661_softc *); 142156321Sdamienstatic void rt2661_set_txpreamble(struct rt2661_softc *); 143156321Sdamienstatic void rt2661_set_basicrates(struct rt2661_softc *, 144156321Sdamien const struct ieee80211_rateset *); 145156321Sdamienstatic void rt2661_select_band(struct rt2661_softc *, 146156321Sdamien struct ieee80211_channel *); 147156321Sdamienstatic void rt2661_set_chan(struct rt2661_softc *, 148156321Sdamien struct ieee80211_channel *); 149156321Sdamienstatic void rt2661_set_bssid(struct rt2661_softc *, 150156321Sdamien const uint8_t *); 151156321Sdamienstatic void rt2661_set_macaddr(struct rt2661_softc *, 152156321Sdamien const uint8_t *); 153178354Ssamstatic void rt2661_update_promisc(struct ifnet *); 154156321Sdamienstatic int rt2661_wme_update(struct ieee80211com *) __unused; 155156321Sdamienstatic void rt2661_update_slot(struct ifnet *); 156156321Sdamienstatic const char *rt2661_get_rf(int); 157178354Ssamstatic void rt2661_read_eeprom(struct rt2661_softc *, 158178354Ssam struct ieee80211com *); 159156321Sdamienstatic int rt2661_bbp_init(struct rt2661_softc *); 160178354Ssamstatic void rt2661_init_locked(struct rt2661_softc *); 161156321Sdamienstatic void rt2661_init(void *); 162178354Ssamstatic void rt2661_stop_locked(struct rt2661_softc *); 163156321Sdamienstatic void rt2661_stop(void *); 164178354Ssamstatic int rt2661_load_microcode(struct rt2661_softc *); 165156321Sdamien#ifdef notyet 166156321Sdamienstatic void rt2661_rx_tune(struct rt2661_softc *); 167156321Sdamienstatic void rt2661_radar_start(struct rt2661_softc *); 168156321Sdamienstatic int rt2661_radar_stop(struct rt2661_softc *); 169156321Sdamien#endif 170178354Ssamstatic int rt2661_prepare_beacon(struct rt2661_softc *, 171178354Ssam struct ieee80211vap *); 172156321Sdamienstatic void rt2661_enable_tsf_sync(struct rt2661_softc *); 173156321Sdamienstatic int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 174156321Sdamien 175156321Sdamienstatic const struct { 176156321Sdamien uint32_t reg; 177156321Sdamien uint32_t val; 178156321Sdamien} rt2661_def_mac[] = { 179156321Sdamien RT2661_DEF_MAC 180156321Sdamien}; 181156321Sdamien 182156321Sdamienstatic const struct { 183156321Sdamien uint8_t reg; 184156321Sdamien uint8_t val; 185156321Sdamien} rt2661_def_bbp[] = { 186156321Sdamien RT2661_DEF_BBP 187156321Sdamien}; 188156321Sdamien 189156321Sdamienstatic const struct rfprog { 190156321Sdamien uint8_t chan; 191156321Sdamien uint32_t r1, r2, r3, r4; 192156321Sdamien} rt2661_rf5225_1[] = { 193156321Sdamien RT2661_RF5225_1 194156321Sdamien}, rt2661_rf5225_2[] = { 195156321Sdamien RT2661_RF5225_2 196156321Sdamien}; 197156321Sdamien 198156321Sdamienint 199156321Sdamienrt2661_attach(device_t dev, int id) 200156321Sdamien{ 201156321Sdamien struct rt2661_softc *sc = device_get_softc(dev); 202178354Ssam struct ieee80211com *ic; 203156321Sdamien struct ifnet *ifp; 204156321Sdamien uint32_t val; 205178354Ssam int error, ac, ntries; 206178354Ssam uint8_t bands; 207156321Sdamien 208178354Ssam sc->sc_id = id; 209156321Sdamien sc->sc_dev = dev; 210156321Sdamien 211178354Ssam ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 212178354Ssam if (ifp == NULL) { 213178354Ssam device_printf(sc->sc_dev, "can not if_alloc()\n"); 214178354Ssam return ENOMEM; 215178354Ssam } 216178354Ssam ic = ifp->if_l2com; 217178354Ssam 218156321Sdamien mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 219156321Sdamien MTX_DEF | MTX_RECURSE); 220156321Sdamien 221165352Sbms callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 222156321Sdamien 223156321Sdamien /* wait for NIC to initialize */ 224156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 225156321Sdamien if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 226156321Sdamien break; 227156321Sdamien DELAY(1000); 228156321Sdamien } 229156321Sdamien if (ntries == 1000) { 230156321Sdamien device_printf(sc->sc_dev, 231156321Sdamien "timeout waiting for NIC to initialize\n"); 232156321Sdamien error = EIO; 233156321Sdamien goto fail1; 234156321Sdamien } 235156321Sdamien 236156321Sdamien /* retrieve RF rev. no and various other things from EEPROM */ 237178354Ssam rt2661_read_eeprom(sc, ic); 238156321Sdamien 239156321Sdamien device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 240156321Sdamien rt2661_get_rf(sc->rf_rev)); 241156321Sdamien 242156321Sdamien /* 243156321Sdamien * Allocate Tx and Rx rings. 244156321Sdamien */ 245156321Sdamien for (ac = 0; ac < 4; ac++) { 246156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 247156321Sdamien RT2661_TX_RING_COUNT); 248156321Sdamien if (error != 0) { 249156321Sdamien device_printf(sc->sc_dev, 250156321Sdamien "could not allocate Tx ring %d\n", ac); 251156321Sdamien goto fail2; 252156321Sdamien } 253156321Sdamien } 254156321Sdamien 255156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 256156321Sdamien if (error != 0) { 257156321Sdamien device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 258156321Sdamien goto fail2; 259156321Sdamien } 260156321Sdamien 261156321Sdamien error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 262156321Sdamien if (error != 0) { 263156321Sdamien device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 264156321Sdamien goto fail3; 265156321Sdamien } 266156321Sdamien 267156321Sdamien ifp->if_softc = sc; 268156321Sdamien if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 269156321Sdamien ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 270156321Sdamien ifp->if_init = rt2661_init; 271156321Sdamien ifp->if_ioctl = rt2661_ioctl; 272156321Sdamien ifp->if_start = rt2661_start; 273156321Sdamien IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 274156321Sdamien ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 275156321Sdamien IFQ_SET_READY(&ifp->if_snd); 276156321Sdamien 277156321Sdamien ic->ic_ifp = ifp; 278178354Ssam ic->ic_opmode = IEEE80211_M_STA; 279156321Sdamien ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 280156321Sdamien 281156321Sdamien /* set device capabilities */ 282156321Sdamien ic->ic_caps = 283178354Ssam IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 284178354Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 285178354Ssam | IEEE80211_C_MONITOR /* monitor mode */ 286178354Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 287178354Ssam | IEEE80211_C_WDS /* 4-address traffic works */ 288178354Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 289178354Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 290178354Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 291178354Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 292156407Sdamien#ifdef notyet 293178354Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 294178354Ssam | IEEE80211_C_WME /* 802.11e */ 295156407Sdamien#endif 296178354Ssam ; 297156321Sdamien 298170530Ssam bands = 0; 299170530Ssam setbit(&bands, IEEE80211_MODE_11B); 300170530Ssam setbit(&bands, IEEE80211_MODE_11G); 301170530Ssam if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) 302170530Ssam setbit(&bands, IEEE80211_MODE_11A); 303178354Ssam ieee80211_init_channels(ic, NULL, &bands); 304156321Sdamien 305156321Sdamien ieee80211_ifattach(ic); 306178354Ssam ic->ic_newassoc = rt2661_newassoc; 307156321Sdamien ic->ic_node_alloc = rt2661_node_alloc; 308178354Ssam#if 0 309178354Ssam ic->ic_wme.wme_update = rt2661_wme_update; 310178354Ssam#endif 311170530Ssam ic->ic_scan_start = rt2661_scan_start; 312170530Ssam ic->ic_scan_end = rt2661_scan_end; 313170530Ssam ic->ic_set_channel = rt2661_set_channel; 314156321Sdamien ic->ic_updateslot = rt2661_update_slot; 315178354Ssam ic->ic_update_promisc = rt2661_update_promisc; 316178354Ssam ic->ic_raw_xmit = rt2661_raw_xmit; 317156321Sdamien 318178354Ssam ic->ic_vap_create = rt2661_vap_create; 319178354Ssam ic->ic_vap_delete = rt2661_vap_delete; 320156321Sdamien 321178354Ssam sc->sc_rates = ieee80211_get_ratetable(ic->ic_curchan); 322156321Sdamien 323178354Ssam bpfattach(ifp, DLT_IEEE802_11_RADIO, 324178354Ssam sizeof (struct ieee80211_frame) + sizeof (sc->sc_txtap)); 325178354Ssam 326171086Skevlo sc->sc_rxtap_len = sizeof sc->sc_rxtap; 327156321Sdamien sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 328156321Sdamien sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT); 329156321Sdamien 330171086Skevlo sc->sc_txtap_len = sizeof sc->sc_txtap; 331156321Sdamien sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 332156321Sdamien sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT); 333156321Sdamien 334178354Ssam#ifdef RAL_DEBUG 335156321Sdamien SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 336178354Ssam SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 337178354Ssam "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 338178354Ssam#endif 339156321Sdamien if (bootverbose) 340156321Sdamien ieee80211_announce(ic); 341156321Sdamien 342156321Sdamien return 0; 343156321Sdamien 344156321Sdamienfail3: rt2661_free_tx_ring(sc, &sc->mgtq); 345156321Sdamienfail2: while (--ac >= 0) 346156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[ac]); 347156321Sdamienfail1: mtx_destroy(&sc->sc_mtx); 348178354Ssam if_free(ifp); 349156321Sdamien return error; 350156321Sdamien} 351156321Sdamien 352156321Sdamienint 353156321Sdamienrt2661_detach(void *xsc) 354156321Sdamien{ 355156321Sdamien struct rt2661_softc *sc = xsc; 356178354Ssam struct ifnet *ifp = sc->sc_ifp; 357178354Ssam struct ieee80211com *ic = ifp->if_l2com; 358170530Ssam 359178038Ssam RAL_LOCK(sc); 360178038Ssam rt2661_stop_locked(sc); 361178038Ssam RAL_UNLOCK(sc); 362156321Sdamien 363156321Sdamien bpfdetach(ifp); 364156321Sdamien ieee80211_ifdetach(ic); 365156321Sdamien 366156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[0]); 367156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[1]); 368156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[2]); 369156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[3]); 370156321Sdamien rt2661_free_tx_ring(sc, &sc->mgtq); 371156321Sdamien rt2661_free_rx_ring(sc, &sc->rxq); 372156321Sdamien 373156321Sdamien if_free(ifp); 374156321Sdamien 375156321Sdamien mtx_destroy(&sc->sc_mtx); 376156321Sdamien 377156321Sdamien return 0; 378156321Sdamien} 379156321Sdamien 380178354Ssamstatic struct ieee80211vap * 381178354Ssamrt2661_vap_create(struct ieee80211com *ic, 382178354Ssam const char name[IFNAMSIZ], int unit, int opmode, int flags, 383178354Ssam const uint8_t bssid[IEEE80211_ADDR_LEN], 384178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]) 385178354Ssam{ 386178354Ssam struct ifnet *ifp = ic->ic_ifp; 387178354Ssam struct rt2661_vap *rvp; 388178354Ssam struct ieee80211vap *vap; 389178354Ssam 390178354Ssam switch (opmode) { 391178354Ssam case IEEE80211_M_STA: 392178354Ssam case IEEE80211_M_IBSS: 393178354Ssam case IEEE80211_M_AHDEMO: 394178354Ssam case IEEE80211_M_MONITOR: 395178354Ssam case IEEE80211_M_HOSTAP: 396178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 397178354Ssam if_printf(ifp, "only 1 vap supported\n"); 398178354Ssam return NULL; 399178354Ssam } 400178354Ssam if (opmode == IEEE80211_M_STA) 401178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 402178354Ssam break; 403178354Ssam case IEEE80211_M_WDS: 404178354Ssam if (TAILQ_EMPTY(&ic->ic_vaps) || 405178354Ssam ic->ic_opmode != IEEE80211_M_HOSTAP) { 406178354Ssam if_printf(ifp, "wds only supported in ap mode\n"); 407178354Ssam return NULL; 408178354Ssam } 409178354Ssam /* 410178354Ssam * Silently remove any request for a unique 411178354Ssam * bssid; WDS vap's always share the local 412178354Ssam * mac address. 413178354Ssam */ 414178354Ssam flags &= ~IEEE80211_CLONE_BSSID; 415178354Ssam break; 416178354Ssam default: 417178354Ssam if_printf(ifp, "unknown opmode %d\n", opmode); 418178354Ssam return NULL; 419178354Ssam } 420178354Ssam rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap), 421178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 422178354Ssam if (rvp == NULL) 423178354Ssam return NULL; 424178354Ssam vap = &rvp->ral_vap; 425178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 426178354Ssam 427178354Ssam /* override state transition machine */ 428178354Ssam rvp->ral_newstate = vap->iv_newstate; 429178354Ssam vap->iv_newstate = rt2661_newstate; 430178354Ssam#if 0 431178354Ssam vap->iv_update_beacon = rt2661_beacon_update; 432178354Ssam#endif 433178354Ssam 434178354Ssam ieee80211_amrr_init(&rvp->amrr, vap, 435178354Ssam IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD, 436178354Ssam IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD, 437178354Ssam 500 /* ms */); 438178354Ssam 439178354Ssam /* complete setup */ 440178354Ssam ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 441178354Ssam if (TAILQ_FIRST(&ic->ic_vaps) == vap) 442178354Ssam ic->ic_opmode = opmode; 443178354Ssam return vap; 444178354Ssam} 445178354Ssam 446178354Ssamstatic void 447178354Ssamrt2661_vap_delete(struct ieee80211vap *vap) 448178354Ssam{ 449178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 450178354Ssam 451178354Ssam ieee80211_amrr_cleanup(&rvp->amrr); 452178354Ssam ieee80211_vap_detach(vap); 453178354Ssam free(rvp, M_80211_VAP); 454178354Ssam} 455178354Ssam 456156321Sdamienvoid 457156321Sdamienrt2661_shutdown(void *xsc) 458156321Sdamien{ 459156321Sdamien struct rt2661_softc *sc = xsc; 460156321Sdamien 461156321Sdamien rt2661_stop(sc); 462156321Sdamien} 463156321Sdamien 464156321Sdamienvoid 465156321Sdamienrt2661_suspend(void *xsc) 466156321Sdamien{ 467156321Sdamien struct rt2661_softc *sc = xsc; 468156321Sdamien 469156321Sdamien rt2661_stop(sc); 470156321Sdamien} 471156321Sdamien 472156321Sdamienvoid 473156321Sdamienrt2661_resume(void *xsc) 474156321Sdamien{ 475156321Sdamien struct rt2661_softc *sc = xsc; 476178354Ssam struct ifnet *ifp = sc->sc_ifp; 477156321Sdamien 478178354Ssam if (ifp->if_flags & IFF_UP) 479178354Ssam rt2661_init(sc); 480156321Sdamien} 481156321Sdamien 482156321Sdamienstatic void 483156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 484156321Sdamien{ 485156321Sdamien if (error != 0) 486156321Sdamien return; 487156321Sdamien 488156321Sdamien KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 489156321Sdamien 490156321Sdamien *(bus_addr_t *)arg = segs[0].ds_addr; 491156321Sdamien} 492156321Sdamien 493156321Sdamienstatic int 494156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 495156321Sdamien int count) 496156321Sdamien{ 497156321Sdamien int i, error; 498156321Sdamien 499156321Sdamien ring->count = count; 500156321Sdamien ring->queued = 0; 501156321Sdamien ring->cur = ring->next = ring->stat = 0; 502156321Sdamien 503171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 504171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 505171535Skevlo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 506171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 507156321Sdamien if (error != 0) { 508156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 509156321Sdamien goto fail; 510156321Sdamien } 511156321Sdamien 512156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 513156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 514156321Sdamien if (error != 0) { 515156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 516156321Sdamien goto fail; 517156321Sdamien } 518156321Sdamien 519156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 520156321Sdamien count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 521156321Sdamien 0); 522156321Sdamien if (error != 0) { 523156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 524156321Sdamien goto fail; 525156321Sdamien } 526156321Sdamien 527156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 528156321Sdamien M_NOWAIT | M_ZERO); 529156321Sdamien if (ring->data == NULL) { 530156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 531156321Sdamien error = ENOMEM; 532156321Sdamien goto fail; 533156321Sdamien } 534156321Sdamien 535171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 536171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 537171535Skevlo RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 538156321Sdamien if (error != 0) { 539156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 540156321Sdamien goto fail; 541156321Sdamien } 542156321Sdamien 543156321Sdamien for (i = 0; i < count; i++) { 544156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, 545156321Sdamien &ring->data[i].map); 546156321Sdamien if (error != 0) { 547156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 548156321Sdamien goto fail; 549156321Sdamien } 550156321Sdamien } 551156321Sdamien 552156321Sdamien return 0; 553156321Sdamien 554156321Sdamienfail: rt2661_free_tx_ring(sc, ring); 555156321Sdamien return error; 556156321Sdamien} 557156321Sdamien 558156321Sdamienstatic void 559156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 560156321Sdamien{ 561156321Sdamien struct rt2661_tx_desc *desc; 562156321Sdamien struct rt2661_tx_data *data; 563156321Sdamien int i; 564156321Sdamien 565156321Sdamien for (i = 0; i < ring->count; i++) { 566156321Sdamien desc = &ring->desc[i]; 567156321Sdamien data = &ring->data[i]; 568156321Sdamien 569156321Sdamien if (data->m != NULL) { 570156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 571156321Sdamien BUS_DMASYNC_POSTWRITE); 572156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 573156321Sdamien m_freem(data->m); 574156321Sdamien data->m = NULL; 575156321Sdamien } 576156321Sdamien 577156321Sdamien if (data->ni != NULL) { 578156321Sdamien ieee80211_free_node(data->ni); 579156321Sdamien data->ni = NULL; 580156321Sdamien } 581156321Sdamien 582156321Sdamien desc->flags = 0; 583156321Sdamien } 584156321Sdamien 585156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 586156321Sdamien 587156321Sdamien ring->queued = 0; 588156321Sdamien ring->cur = ring->next = ring->stat = 0; 589156321Sdamien} 590156321Sdamien 591156321Sdamienstatic void 592156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 593156321Sdamien{ 594156321Sdamien struct rt2661_tx_data *data; 595156321Sdamien int i; 596156321Sdamien 597156321Sdamien if (ring->desc != NULL) { 598156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 599156321Sdamien BUS_DMASYNC_POSTWRITE); 600156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 601156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 602156321Sdamien } 603156321Sdamien 604156321Sdamien if (ring->desc_dmat != NULL) 605156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 606156321Sdamien 607156321Sdamien if (ring->data != NULL) { 608156321Sdamien for (i = 0; i < ring->count; i++) { 609156321Sdamien data = &ring->data[i]; 610156321Sdamien 611156321Sdamien if (data->m != NULL) { 612156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 613156321Sdamien BUS_DMASYNC_POSTWRITE); 614156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 615156321Sdamien m_freem(data->m); 616156321Sdamien } 617156321Sdamien 618156321Sdamien if (data->ni != NULL) 619156321Sdamien ieee80211_free_node(data->ni); 620156321Sdamien 621156321Sdamien if (data->map != NULL) 622156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 623156321Sdamien } 624156321Sdamien 625156321Sdamien free(ring->data, M_DEVBUF); 626156321Sdamien } 627156321Sdamien 628156321Sdamien if (ring->data_dmat != NULL) 629156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 630156321Sdamien} 631156321Sdamien 632156321Sdamienstatic int 633156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 634156321Sdamien int count) 635156321Sdamien{ 636156321Sdamien struct rt2661_rx_desc *desc; 637156321Sdamien struct rt2661_rx_data *data; 638156321Sdamien bus_addr_t physaddr; 639156321Sdamien int i, error; 640156321Sdamien 641156321Sdamien ring->count = count; 642156321Sdamien ring->cur = ring->next = 0; 643156321Sdamien 644171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 645171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 646171535Skevlo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 647171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 648156321Sdamien if (error != 0) { 649156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 650156321Sdamien goto fail; 651156321Sdamien } 652156321Sdamien 653156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 654156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 655156321Sdamien if (error != 0) { 656156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 657156321Sdamien goto fail; 658156321Sdamien } 659156321Sdamien 660156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 661156321Sdamien count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 662156321Sdamien 0); 663156321Sdamien if (error != 0) { 664156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 665156321Sdamien goto fail; 666156321Sdamien } 667156321Sdamien 668156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 669156321Sdamien M_NOWAIT | M_ZERO); 670156321Sdamien if (ring->data == NULL) { 671156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 672156321Sdamien error = ENOMEM; 673156321Sdamien goto fail; 674156321Sdamien } 675156321Sdamien 676156321Sdamien /* 677156321Sdamien * Pre-allocate Rx buffers and populate Rx ring. 678156321Sdamien */ 679171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 680171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 681171535Skevlo 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 682156321Sdamien if (error != 0) { 683156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 684156321Sdamien goto fail; 685156321Sdamien } 686156321Sdamien 687156321Sdamien for (i = 0; i < count; i++) { 688156321Sdamien desc = &sc->rxq.desc[i]; 689156321Sdamien data = &sc->rxq.data[i]; 690156321Sdamien 691156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 692156321Sdamien if (error != 0) { 693156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 694156321Sdamien goto fail; 695156321Sdamien } 696156321Sdamien 697156321Sdamien data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 698156321Sdamien if (data->m == NULL) { 699156321Sdamien device_printf(sc->sc_dev, 700156321Sdamien "could not allocate rx mbuf\n"); 701156321Sdamien error = ENOMEM; 702156321Sdamien goto fail; 703156321Sdamien } 704156321Sdamien 705156321Sdamien error = bus_dmamap_load(ring->data_dmat, data->map, 706156321Sdamien mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 707156321Sdamien &physaddr, 0); 708156321Sdamien if (error != 0) { 709156321Sdamien device_printf(sc->sc_dev, 710156321Sdamien "could not load rx buf DMA map"); 711156321Sdamien goto fail; 712156321Sdamien } 713156321Sdamien 714156321Sdamien desc->flags = htole32(RT2661_RX_BUSY); 715156321Sdamien desc->physaddr = htole32(physaddr); 716156321Sdamien } 717156321Sdamien 718156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 719156321Sdamien 720156321Sdamien return 0; 721156321Sdamien 722156321Sdamienfail: rt2661_free_rx_ring(sc, ring); 723156321Sdamien return error; 724156321Sdamien} 725156321Sdamien 726156321Sdamienstatic void 727156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 728156321Sdamien{ 729156321Sdamien int i; 730156321Sdamien 731156321Sdamien for (i = 0; i < ring->count; i++) 732156321Sdamien ring->desc[i].flags = htole32(RT2661_RX_BUSY); 733156321Sdamien 734156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 735156321Sdamien 736156321Sdamien ring->cur = ring->next = 0; 737156321Sdamien} 738156321Sdamien 739156321Sdamienstatic void 740156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 741156321Sdamien{ 742156321Sdamien struct rt2661_rx_data *data; 743156321Sdamien int i; 744156321Sdamien 745156321Sdamien if (ring->desc != NULL) { 746156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 747156321Sdamien BUS_DMASYNC_POSTWRITE); 748156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 749156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 750156321Sdamien } 751156321Sdamien 752156321Sdamien if (ring->desc_dmat != NULL) 753156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 754156321Sdamien 755156321Sdamien if (ring->data != NULL) { 756156321Sdamien for (i = 0; i < ring->count; i++) { 757156321Sdamien data = &ring->data[i]; 758156321Sdamien 759156321Sdamien if (data->m != NULL) { 760156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 761156321Sdamien BUS_DMASYNC_POSTREAD); 762156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 763156321Sdamien m_freem(data->m); 764156321Sdamien } 765156321Sdamien 766156321Sdamien if (data->map != NULL) 767156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 768156321Sdamien } 769156321Sdamien 770156321Sdamien free(ring->data, M_DEVBUF); 771156321Sdamien } 772156321Sdamien 773156321Sdamien if (ring->data_dmat != NULL) 774156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 775156321Sdamien} 776156321Sdamien 777156321Sdamienstatic struct ieee80211_node * 778156321Sdamienrt2661_node_alloc(struct ieee80211_node_table *nt) 779156321Sdamien{ 780156321Sdamien struct rt2661_node *rn; 781156321Sdamien 782156321Sdamien rn = malloc(sizeof (struct rt2661_node), M_80211_NODE, 783156321Sdamien M_NOWAIT | M_ZERO); 784156321Sdamien 785156321Sdamien return (rn != NULL) ? &rn->ni : NULL; 786156321Sdamien} 787156321Sdamien 788156321Sdamienstatic void 789178354Ssamrt2661_newassoc(struct ieee80211_node *ni, int isnew) 790156321Sdamien{ 791178354Ssam struct ieee80211vap *vap = ni->ni_vap; 792156321Sdamien 793178354Ssam ieee80211_amrr_node_init(&RT2661_VAP(vap)->amrr, 794178354Ssam &RT2661_NODE(ni)->amrr, ni); 795156321Sdamien} 796156321Sdamien 797156321Sdamienstatic int 798178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 799156321Sdamien{ 800178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 801178354Ssam struct ieee80211com *ic = vap->iv_ic; 802156321Sdamien struct rt2661_softc *sc = ic->ic_ifp->if_softc; 803178354Ssam int error; 804156321Sdamien 805178354Ssam if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 806178354Ssam uint32_t tmp; 807156321Sdamien 808178354Ssam /* abort TSF synchronization */ 809178354Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 810178354Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 811178354Ssam } 812156321Sdamien 813178354Ssam error = rvp->ral_newstate(vap, nstate, arg); 814156321Sdamien 815178354Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 816178354Ssam struct ieee80211_node *ni = vap->iv_bss; 817178354Ssam 818178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 819156321Sdamien rt2661_enable_mrr(sc); 820156321Sdamien rt2661_set_txpreamble(sc); 821156321Sdamien rt2661_set_basicrates(sc, &ni->ni_rates); 822156321Sdamien rt2661_set_bssid(sc, ni->ni_bssid); 823156321Sdamien } 824156321Sdamien 825178354Ssam if (vap->iv_opmode == IEEE80211_M_HOSTAP || 826178354Ssam vap->iv_opmode == IEEE80211_M_IBSS) { 827178354Ssam error = rt2661_prepare_beacon(sc, vap); 828178354Ssam if (error != 0) 829178354Ssam return error; 830156321Sdamien } 831178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 832178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) { 833178354Ssam /* fake a join to init the tx rate */ 834178354Ssam rt2661_newassoc(ni, 1); 835178354Ssam } 836156321Sdamien rt2661_enable_tsf_sync(sc); 837156321Sdamien } 838178354Ssam } 839178354Ssam return error; 840156321Sdamien} 841156321Sdamien 842156321Sdamien/* 843156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 844156321Sdamien * 93C66). 845156321Sdamien */ 846156321Sdamienstatic uint16_t 847156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 848156321Sdamien{ 849156321Sdamien uint32_t tmp; 850156321Sdamien uint16_t val; 851156321Sdamien int n; 852156321Sdamien 853156321Sdamien /* clock C once before the first command */ 854156321Sdamien RT2661_EEPROM_CTL(sc, 0); 855156321Sdamien 856156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 857156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 858156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 859156321Sdamien 860156321Sdamien /* write start bit (1) */ 861156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 862156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 863156321Sdamien 864156321Sdamien /* write READ opcode (10) */ 865156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 866156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 867156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 868156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 869156321Sdamien 870156321Sdamien /* write address (A5-A0 or A7-A0) */ 871156321Sdamien n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 872156321Sdamien for (; n >= 0; n--) { 873156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 874156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D)); 875156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 876156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 877156321Sdamien } 878156321Sdamien 879156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 880156321Sdamien 881156321Sdamien /* read data Q15-Q0 */ 882156321Sdamien val = 0; 883156321Sdamien for (n = 15; n >= 0; n--) { 884156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 885156321Sdamien tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 886156321Sdamien val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 887156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 888156321Sdamien } 889156321Sdamien 890156321Sdamien RT2661_EEPROM_CTL(sc, 0); 891156321Sdamien 892156321Sdamien /* clear Chip Select and clock C */ 893156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 894156321Sdamien RT2661_EEPROM_CTL(sc, 0); 895156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_C); 896156321Sdamien 897156321Sdamien return val; 898156321Sdamien} 899156321Sdamien 900156321Sdamienstatic void 901156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc) 902156321Sdamien{ 903178354Ssam struct ifnet *ifp = sc->sc_ifp; 904156321Sdamien struct rt2661_tx_ring *txq; 905156321Sdamien struct rt2661_tx_data *data; 906156321Sdamien struct rt2661_node *rn; 907156321Sdamien uint32_t val; 908156321Sdamien int qid, retrycnt; 909156321Sdamien 910156321Sdamien for (;;) { 911170530Ssam struct ieee80211_node *ni; 912170530Ssam struct mbuf *m; 913170530Ssam 914156321Sdamien val = RAL_READ(sc, RT2661_STA_CSR4); 915156321Sdamien if (!(val & RT2661_TX_STAT_VALID)) 916156321Sdamien break; 917156321Sdamien 918156321Sdamien /* retrieve the queue in which this frame was sent */ 919156321Sdamien qid = RT2661_TX_QID(val); 920156321Sdamien txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 921156321Sdamien 922156321Sdamien /* retrieve rate control algorithm context */ 923156321Sdamien data = &txq->data[txq->stat]; 924170530Ssam m = data->m; 925170530Ssam data->m = NULL; 926170530Ssam ni = data->ni; 927170530Ssam data->ni = NULL; 928156321Sdamien 929159301Sfjoe /* if no frame has been sent, ignore */ 930170530Ssam if (ni == NULL) 931159301Sfjoe continue; 932159301Sfjoe 933178354Ssam rn = RT2661_NODE(ni); 934170530Ssam 935156321Sdamien switch (RT2661_TX_RESULT(val)) { 936156321Sdamien case RT2661_TX_SUCCESS: 937156321Sdamien retrycnt = RT2661_TX_RETRYCNT(val); 938156321Sdamien 939178354Ssam DPRINTFN(sc, 10, "data frame sent successfully after " 940178354Ssam "%d retries\n", retrycnt); 941178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 942178354Ssam ieee80211_amrr_tx_complete(&rn->amrr, 943178354Ssam IEEE80211_AMRR_SUCCESS, retrycnt); 944156321Sdamien ifp->if_opackets++; 945156321Sdamien break; 946156321Sdamien 947156321Sdamien case RT2661_TX_RETRY_FAIL: 948178354Ssam retrycnt = RT2661_TX_RETRYCNT(val); 949178354Ssam 950178354Ssam DPRINTFN(sc, 9, "%s\n", 951178354Ssam "sending data frame failed (too much retries)"); 952178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 953178354Ssam ieee80211_amrr_tx_complete(&rn->amrr, 954178354Ssam IEEE80211_AMRR_FAILURE, retrycnt); 955156321Sdamien ifp->if_oerrors++; 956156321Sdamien break; 957156321Sdamien 958156321Sdamien default: 959156321Sdamien /* other failure */ 960156321Sdamien device_printf(sc->sc_dev, 961156321Sdamien "sending data frame failed 0x%08x\n", val); 962156321Sdamien ifp->if_oerrors++; 963156321Sdamien } 964156321Sdamien 965178354Ssam DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 966156321Sdamien 967156321Sdamien txq->queued--; 968156321Sdamien if (++txq->stat >= txq->count) /* faster than % count */ 969156321Sdamien txq->stat = 0; 970170530Ssam 971170530Ssam if (m->m_flags & M_TXCB) 972170530Ssam ieee80211_process_callback(ni, m, 973170530Ssam RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS); 974170530Ssam m_freem(m); 975170530Ssam ieee80211_free_node(ni); 976156321Sdamien } 977156321Sdamien 978156321Sdamien sc->sc_tx_timer = 0; 979156321Sdamien ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 980178354Ssam 981178354Ssam rt2661_start_locked(ifp); 982156321Sdamien} 983156321Sdamien 984156321Sdamienstatic void 985156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 986156321Sdamien{ 987156321Sdamien struct rt2661_tx_desc *desc; 988156321Sdamien struct rt2661_tx_data *data; 989156321Sdamien 990156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 991156321Sdamien 992156321Sdamien for (;;) { 993156321Sdamien desc = &txq->desc[txq->next]; 994156321Sdamien data = &txq->data[txq->next]; 995156321Sdamien 996156321Sdamien if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 997156321Sdamien !(le32toh(desc->flags) & RT2661_TX_VALID)) 998156321Sdamien break; 999156321Sdamien 1000156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, 1001156321Sdamien BUS_DMASYNC_POSTWRITE); 1002156321Sdamien bus_dmamap_unload(txq->data_dmat, data->map); 1003156321Sdamien 1004156321Sdamien /* descriptor is no longer valid */ 1005156321Sdamien desc->flags &= ~htole32(RT2661_TX_VALID); 1006156321Sdamien 1007178354Ssam DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 1008156321Sdamien 1009156321Sdamien if (++txq->next >= txq->count) /* faster than % count */ 1010156321Sdamien txq->next = 0; 1011156321Sdamien } 1012156321Sdamien 1013156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1014156321Sdamien} 1015156321Sdamien 1016156321Sdamienstatic void 1017156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc) 1018156321Sdamien{ 1019178354Ssam struct ifnet *ifp = sc->sc_ifp; 1020178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1021156321Sdamien struct rt2661_rx_desc *desc; 1022156321Sdamien struct rt2661_rx_data *data; 1023156321Sdamien bus_addr_t physaddr; 1024156321Sdamien struct ieee80211_frame *wh; 1025156321Sdamien struct ieee80211_node *ni; 1026156321Sdamien struct mbuf *mnew, *m; 1027156321Sdamien int error; 1028156321Sdamien 1029156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1030156321Sdamien BUS_DMASYNC_POSTREAD); 1031156321Sdamien 1032156321Sdamien for (;;) { 1033170530Ssam int rssi; 1034170530Ssam 1035156321Sdamien desc = &sc->rxq.desc[sc->rxq.cur]; 1036156321Sdamien data = &sc->rxq.data[sc->rxq.cur]; 1037156321Sdamien 1038156321Sdamien if (le32toh(desc->flags) & RT2661_RX_BUSY) 1039156321Sdamien break; 1040156321Sdamien 1041156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 1042156321Sdamien (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 1043156321Sdamien /* 1044156321Sdamien * This should not happen since we did not request 1045156321Sdamien * to receive those frames when we filled TXRX_CSR0. 1046156321Sdamien */ 1047178354Ssam DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1048178354Ssam le32toh(desc->flags)); 1049156321Sdamien ifp->if_ierrors++; 1050156321Sdamien goto skip; 1051156321Sdamien } 1052156321Sdamien 1053156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 1054156321Sdamien ifp->if_ierrors++; 1055156321Sdamien goto skip; 1056156321Sdamien } 1057156321Sdamien 1058156321Sdamien /* 1059156321Sdamien * Try to allocate a new mbuf for this ring element and load it 1060156321Sdamien * before processing the current mbuf. If the ring element 1061156321Sdamien * cannot be loaded, drop the received packet and reuse the old 1062156321Sdamien * mbuf. In the unlikely case that the old mbuf can't be 1063156321Sdamien * reloaded either, explicitly panic. 1064156321Sdamien */ 1065156321Sdamien mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1066156321Sdamien if (mnew == NULL) { 1067156321Sdamien ifp->if_ierrors++; 1068156321Sdamien goto skip; 1069156321Sdamien } 1070156321Sdamien 1071156321Sdamien bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1072156321Sdamien BUS_DMASYNC_POSTREAD); 1073156321Sdamien bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1074156321Sdamien 1075156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1076156321Sdamien mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1077156321Sdamien &physaddr, 0); 1078156321Sdamien if (error != 0) { 1079156321Sdamien m_freem(mnew); 1080156321Sdamien 1081156321Sdamien /* try to reload the old mbuf */ 1082156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1083156321Sdamien mtod(data->m, void *), MCLBYTES, 1084156321Sdamien rt2661_dma_map_addr, &physaddr, 0); 1085156321Sdamien if (error != 0) { 1086156321Sdamien /* very unlikely that it will fail... */ 1087156321Sdamien panic("%s: could not load old rx mbuf", 1088156321Sdamien device_get_name(sc->sc_dev)); 1089156321Sdamien } 1090156321Sdamien ifp->if_ierrors++; 1091156321Sdamien goto skip; 1092156321Sdamien } 1093156321Sdamien 1094156321Sdamien /* 1095156321Sdamien * New mbuf successfully loaded, update Rx ring and continue 1096156321Sdamien * processing. 1097156321Sdamien */ 1098156321Sdamien m = data->m; 1099156321Sdamien data->m = mnew; 1100156321Sdamien desc->physaddr = htole32(physaddr); 1101156321Sdamien 1102156321Sdamien /* finalize mbuf */ 1103156321Sdamien m->m_pkthdr.rcvif = ifp; 1104156321Sdamien m->m_pkthdr.len = m->m_len = 1105156321Sdamien (le32toh(desc->flags) >> 16) & 0xfff; 1106156321Sdamien 1107170530Ssam rssi = rt2661_get_rssi(sc, desc->rssi); 1108170530Ssam 1109178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1110156321Sdamien struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1111156321Sdamien uint32_t tsf_lo, tsf_hi; 1112156321Sdamien 1113156321Sdamien /* get timestamp (low and high 32 bits) */ 1114156321Sdamien tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1115156321Sdamien tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1116156321Sdamien 1117156321Sdamien tap->wr_tsf = 1118156321Sdamien htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1119156321Sdamien tap->wr_flags = 0; 1120178354Ssam tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1121178354Ssam le32toh(desc->flags) & RT2661_RX_OFDM); 1122170530Ssam tap->wr_antsignal = rssi < 0 ? 0 : rssi; 1123156321Sdamien 1124178354Ssam bpf_mtap2(ifp->if_bpf, tap, sc->sc_rxtap_len, m); 1125156321Sdamien } 1126170530Ssam sc->sc_flags |= RAL_INPUT_RUNNING; 1127170530Ssam RAL_UNLOCK(sc); 1128156321Sdamien wh = mtod(m, struct ieee80211_frame *); 1129178354Ssam 1130178354Ssam /* send the frame to the 802.11 layer */ 1131156321Sdamien ni = ieee80211_find_rxnode(ic, 1132156321Sdamien (struct ieee80211_frame_min *)wh); 1133178354Ssam if (ni != NULL) { 1134178354Ssam /* Error happened during RSSI conversion. */ 1135178354Ssam if (rssi < 0) 1136178354Ssam rssi = -30; /* XXX ignored by net80211 */ 1137156321Sdamien 1138178354Ssam (void) ieee80211_input(ni, m, rssi, 1139178354Ssam RT2661_NOISE_FLOOR, 0); 1140178354Ssam ieee80211_free_node(ni); 1141178354Ssam } else 1142178354Ssam (void) ieee80211_input_all(ic, m, rssi, 1143178354Ssam RT2661_NOISE_FLOOR, 0); 1144170530Ssam 1145170530Ssam RAL_LOCK(sc); 1146170530Ssam sc->sc_flags &= ~RAL_INPUT_RUNNING; 1147156321Sdamien 1148156321Sdamienskip: desc->flags |= htole32(RT2661_RX_BUSY); 1149156321Sdamien 1150178354Ssam DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1151156321Sdamien 1152156321Sdamien sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1153156321Sdamien } 1154156321Sdamien 1155156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1156156321Sdamien BUS_DMASYNC_PREWRITE); 1157156321Sdamien} 1158156321Sdamien 1159156321Sdamien/* ARGSUSED */ 1160156321Sdamienstatic void 1161156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1162156321Sdamien{ 1163156321Sdamien /* do nothing */ 1164156321Sdamien} 1165156321Sdamien 1166156321Sdamienstatic void 1167156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc) 1168156321Sdamien{ 1169156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1170156321Sdamien 1171156321Sdamien RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1172156321Sdamien RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1173156321Sdamien RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1174156321Sdamien 1175156321Sdamien /* send wakeup command to MCU */ 1176156321Sdamien rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1177156321Sdamien} 1178156321Sdamien 1179156321Sdamienstatic void 1180156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1181156321Sdamien{ 1182156321Sdamien RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1183156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1184156321Sdamien} 1185156321Sdamien 1186156321Sdamienvoid 1187156321Sdamienrt2661_intr(void *arg) 1188156321Sdamien{ 1189156321Sdamien struct rt2661_softc *sc = arg; 1190156975Sdamien struct ifnet *ifp = sc->sc_ifp; 1191156321Sdamien uint32_t r1, r2; 1192156321Sdamien 1193156321Sdamien RAL_LOCK(sc); 1194156321Sdamien 1195156321Sdamien /* disable MAC and MCU interrupts */ 1196156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1197156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1198156321Sdamien 1199156975Sdamien /* don't re-enable interrupts if we're shutting down */ 1200156975Sdamien if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1201156975Sdamien RAL_UNLOCK(sc); 1202156975Sdamien return; 1203156975Sdamien } 1204156975Sdamien 1205156321Sdamien r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1206156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1207156321Sdamien 1208156321Sdamien r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1209156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1210156321Sdamien 1211156321Sdamien if (r1 & RT2661_MGT_DONE) 1212156321Sdamien rt2661_tx_dma_intr(sc, &sc->mgtq); 1213156321Sdamien 1214156321Sdamien if (r1 & RT2661_RX_DONE) 1215156321Sdamien rt2661_rx_intr(sc); 1216156321Sdamien 1217156321Sdamien if (r1 & RT2661_TX0_DMA_DONE) 1218156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[0]); 1219156321Sdamien 1220156321Sdamien if (r1 & RT2661_TX1_DMA_DONE) 1221156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[1]); 1222156321Sdamien 1223156321Sdamien if (r1 & RT2661_TX2_DMA_DONE) 1224156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[2]); 1225156321Sdamien 1226156321Sdamien if (r1 & RT2661_TX3_DMA_DONE) 1227156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[3]); 1228156321Sdamien 1229156321Sdamien if (r1 & RT2661_TX_DONE) 1230156321Sdamien rt2661_tx_intr(sc); 1231156321Sdamien 1232156321Sdamien if (r2 & RT2661_MCU_CMD_DONE) 1233156321Sdamien rt2661_mcu_cmd_intr(sc); 1234156321Sdamien 1235156321Sdamien if (r2 & RT2661_MCU_BEACON_EXPIRE) 1236156321Sdamien rt2661_mcu_beacon_expire(sc); 1237156321Sdamien 1238156321Sdamien if (r2 & RT2661_MCU_WAKEUP) 1239156321Sdamien rt2661_mcu_wakeup(sc); 1240156321Sdamien 1241156321Sdamien /* re-enable MAC and MCU interrupts */ 1242156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1243156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1244156321Sdamien 1245156321Sdamien RAL_UNLOCK(sc); 1246156321Sdamien} 1247156321Sdamien 1248156321Sdamienstatic void 1249156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1250156321Sdamien uint32_t flags, uint16_t xflags, int len, int rate, 1251156321Sdamien const bus_dma_segment_t *segs, int nsegs, int ac) 1252156321Sdamien{ 1253178354Ssam struct ifnet *ifp = sc->sc_ifp; 1254178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1255156321Sdamien uint16_t plcp_length; 1256156321Sdamien int i, remainder; 1257156321Sdamien 1258156321Sdamien desc->flags = htole32(flags); 1259156321Sdamien desc->flags |= htole32(len << 16); 1260156321Sdamien desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1261156321Sdamien 1262156321Sdamien desc->xflags = htole16(xflags); 1263156321Sdamien desc->xflags |= htole16(nsegs << 13); 1264156321Sdamien 1265156321Sdamien desc->wme = htole16( 1266156321Sdamien RT2661_QID(ac) | 1267156321Sdamien RT2661_AIFSN(2) | 1268156321Sdamien RT2661_LOGCWMIN(4) | 1269156321Sdamien RT2661_LOGCWMAX(10)); 1270156321Sdamien 1271156321Sdamien /* 1272156321Sdamien * Remember in which queue this frame was sent. This field is driver 1273156321Sdamien * private data only. It will be made available by the NIC in STA_CSR4 1274156321Sdamien * on Tx interrupts. 1275156321Sdamien */ 1276156321Sdamien desc->qid = ac; 1277156321Sdamien 1278156321Sdamien /* setup PLCP fields */ 1279178354Ssam desc->plcp_signal = ieee80211_rate2plcp(rate); 1280156321Sdamien desc->plcp_service = 4; 1281156321Sdamien 1282156321Sdamien len += IEEE80211_CRC_LEN; 1283178354Ssam if (ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM) { 1284156321Sdamien desc->flags |= htole32(RT2661_TX_OFDM); 1285156321Sdamien 1286156321Sdamien plcp_length = len & 0xfff; 1287156321Sdamien desc->plcp_length_hi = plcp_length >> 6; 1288156321Sdamien desc->plcp_length_lo = plcp_length & 0x3f; 1289156321Sdamien } else { 1290156321Sdamien plcp_length = (16 * len + rate - 1) / rate; 1291156321Sdamien if (rate == 22) { 1292156321Sdamien remainder = (16 * len) % 22; 1293156321Sdamien if (remainder != 0 && remainder < 7) 1294156321Sdamien desc->plcp_service |= RT2661_PLCP_LENGEXT; 1295156321Sdamien } 1296156321Sdamien desc->plcp_length_hi = plcp_length >> 8; 1297156321Sdamien desc->plcp_length_lo = plcp_length & 0xff; 1298156321Sdamien 1299156321Sdamien if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1300156321Sdamien desc->plcp_signal |= 0x08; 1301156321Sdamien } 1302156321Sdamien 1303156321Sdamien /* RT2x61 supports scatter with up to 5 segments */ 1304156321Sdamien for (i = 0; i < nsegs; i++) { 1305156321Sdamien desc->addr[i] = htole32(segs[i].ds_addr); 1306156321Sdamien desc->len [i] = htole16(segs[i].ds_len); 1307156321Sdamien } 1308156321Sdamien} 1309156321Sdamien 1310156321Sdamienstatic int 1311156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1312156321Sdamien struct ieee80211_node *ni) 1313156321Sdamien{ 1314178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1315178354Ssam struct ieee80211com *ic = ni->ni_ic; 1316178354Ssam struct ifnet *ifp = sc->sc_ifp; 1317156321Sdamien struct rt2661_tx_desc *desc; 1318156321Sdamien struct rt2661_tx_data *data; 1319156321Sdamien struct ieee80211_frame *wh; 1320173386Skevlo struct ieee80211_key *k; 1321156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1322156321Sdamien uint16_t dur; 1323156321Sdamien uint32_t flags = 0; /* XXX HWSEQ */ 1324156321Sdamien int nsegs, rate, error; 1325156321Sdamien 1326156321Sdamien desc = &sc->mgtq.desc[sc->mgtq.cur]; 1327156321Sdamien data = &sc->mgtq.data[sc->mgtq.cur]; 1328156321Sdamien 1329178354Ssam rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1330156321Sdamien 1331173386Skevlo wh = mtod(m0, struct ieee80211_frame *); 1332173386Skevlo 1333173386Skevlo if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1334178354Ssam k = ieee80211_crypto_encap(ni, m0); 1335173386Skevlo if (k == NULL) { 1336173386Skevlo m_freem(m0); 1337173386Skevlo return ENOBUFS; 1338173386Skevlo } 1339173386Skevlo } 1340173386Skevlo 1341156321Sdamien error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0, 1342156321Sdamien segs, &nsegs, 0); 1343156321Sdamien if (error != 0) { 1344156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1345156321Sdamien error); 1346156321Sdamien m_freem(m0); 1347156321Sdamien return error; 1348156321Sdamien } 1349156321Sdamien 1350178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1351156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1352156321Sdamien 1353156321Sdamien tap->wt_flags = 0; 1354156321Sdamien tap->wt_rate = rate; 1355156321Sdamien 1356178354Ssam bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m0); 1357156321Sdamien } 1358156321Sdamien 1359156321Sdamien data->m = m0; 1360156321Sdamien data->ni = ni; 1361178354Ssam /* management frames are not taken into account for amrr */ 1362178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1363156321Sdamien 1364156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1365156321Sdamien 1366156321Sdamien if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1367156321Sdamien flags |= RT2661_TX_NEED_ACK; 1368156321Sdamien 1369178354Ssam dur = ieee80211_ack_duration(sc->sc_rates, 1370178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1371156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1372156321Sdamien 1373156321Sdamien /* tell hardware to add timestamp in probe responses */ 1374156321Sdamien if ((wh->i_fc[0] & 1375156321Sdamien (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1376156321Sdamien (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1377156321Sdamien flags |= RT2661_TX_TIMESTAMP; 1378156321Sdamien } 1379156321Sdamien 1380156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1381156321Sdamien m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1382156321Sdamien 1383156321Sdamien bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1384156321Sdamien bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1385156321Sdamien BUS_DMASYNC_PREWRITE); 1386156321Sdamien 1387178354Ssam DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1388178354Ssam m0->m_pkthdr.len, sc->mgtq.cur, rate); 1389156321Sdamien 1390156321Sdamien /* kick mgt */ 1391156321Sdamien sc->mgtq.queued++; 1392156321Sdamien sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1393156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1394156321Sdamien 1395156321Sdamien return 0; 1396156321Sdamien} 1397156321Sdamien 1398178354Ssamstatic int 1399178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac, 1400178354Ssam const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1401156321Sdamien{ 1402178354Ssam struct ieee80211com *ic = ni->ni_ic; 1403178354Ssam struct rt2661_tx_ring *txq = &sc->txq[ac]; 1404178354Ssam const struct ieee80211_frame *wh; 1405178354Ssam struct rt2661_tx_desc *desc; 1406178354Ssam struct rt2661_tx_data *data; 1407178354Ssam struct mbuf *mprot; 1408178354Ssam int protrate, ackrate, pktlen, flags, isshort, error; 1409178354Ssam uint16_t dur; 1410178354Ssam bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1411178354Ssam int nsegs; 1412156321Sdamien 1413178354Ssam KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1414178354Ssam ("protection %d", prot)); 1415178354Ssam 1416178354Ssam wh = mtod(m, const struct ieee80211_frame *); 1417178354Ssam pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1418178354Ssam 1419178354Ssam protrate = ieee80211_ctl_rate(sc->sc_rates, rate); 1420178354Ssam ackrate = ieee80211_ack_rate(sc->sc_rates, rate); 1421178354Ssam 1422178354Ssam isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1423178354Ssam dur = ieee80211_compute_duration(sc->sc_rates, pktlen, rate, isshort); 1424178354Ssam + ieee80211_ack_duration(sc->sc_rates, rate, isshort); 1425178354Ssam flags = RT2661_TX_MORE_FRAG; 1426178354Ssam if (prot == IEEE80211_PROT_RTSCTS) { 1427178354Ssam /* NB: CTS is the same size as an ACK */ 1428178354Ssam dur += ieee80211_ack_duration(sc->sc_rates, rate, isshort); 1429178354Ssam flags |= RT2661_TX_NEED_ACK; 1430178354Ssam mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1431178354Ssam } else { 1432178354Ssam mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1433156321Sdamien } 1434178354Ssam if (mprot == NULL) { 1435178354Ssam /* XXX stat + msg */ 1436178354Ssam return ENOBUFS; 1437178354Ssam } 1438156321Sdamien 1439178354Ssam data = &txq->data[txq->cur]; 1440178354Ssam desc = &txq->desc[txq->cur]; 1441156321Sdamien 1442178354Ssam error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs, 1443178354Ssam &nsegs, 0); 1444178354Ssam if (error != 0) { 1445178354Ssam device_printf(sc->sc_dev, 1446178354Ssam "could not map mbuf (error %d)\n", error); 1447178354Ssam m_freem(mprot); 1448178354Ssam return error; 1449178354Ssam } 1450156321Sdamien 1451178354Ssam data->m = mprot; 1452178354Ssam data->ni = ieee80211_ref_node(ni); 1453178354Ssam /* ctl frames are not taken into account for amrr */ 1454178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1455156321Sdamien 1456178354Ssam rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1457178354Ssam protrate, segs, 1, ac); 1458178354Ssam 1459178354Ssam bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1460178354Ssam bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1461178354Ssam 1462178354Ssam txq->queued++; 1463178354Ssam txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1464178354Ssam 1465178354Ssam return 0; 1466156321Sdamien} 1467156321Sdamien 1468156321Sdamienstatic int 1469156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1470156321Sdamien struct ieee80211_node *ni, int ac) 1471156321Sdamien{ 1472178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1473178354Ssam struct ifnet *ifp = sc->sc_ifp; 1474178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1475156321Sdamien struct rt2661_tx_ring *txq = &sc->txq[ac]; 1476156321Sdamien struct rt2661_tx_desc *desc; 1477156321Sdamien struct rt2661_tx_data *data; 1478156321Sdamien struct ieee80211_frame *wh; 1479178354Ssam const struct ieee80211_txparam *tp; 1480156321Sdamien struct ieee80211_key *k; 1481156321Sdamien const struct chanAccParams *cap; 1482156321Sdamien struct mbuf *mnew; 1483156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1484156321Sdamien uint16_t dur; 1485178354Ssam uint32_t flags; 1486156321Sdamien int error, nsegs, rate, noack = 0; 1487156321Sdamien 1488156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1489156321Sdamien 1490178354Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1491178354Ssam if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1492178354Ssam rate = tp->mcastrate; 1493178354Ssam } else if (m0->m_flags & M_EAPOL) { 1494178354Ssam rate = tp->mgmtrate; 1495178354Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1496178354Ssam rate = tp->ucastrate; 1497156321Sdamien } else { 1498178354Ssam (void) ieee80211_amrr_choose(ni, &RT2661_NODE(ni)->amrr); 1499178354Ssam rate = ni->ni_txrate; 1500156321Sdamien } 1501156321Sdamien rate &= IEEE80211_RATE_VAL; 1502156321Sdamien 1503156321Sdamien if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1504156321Sdamien cap = &ic->ic_wme.wme_chanParams; 1505156321Sdamien noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1506156321Sdamien } 1507156321Sdamien 1508156321Sdamien if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1509178354Ssam k = ieee80211_crypto_encap(ni, m0); 1510156321Sdamien if (k == NULL) { 1511156321Sdamien m_freem(m0); 1512156321Sdamien return ENOBUFS; 1513156321Sdamien } 1514156321Sdamien 1515156321Sdamien /* packet header may have moved, reset our local pointer */ 1516156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1517156321Sdamien } 1518156321Sdamien 1519178354Ssam flags = 0; 1520178354Ssam if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1521178354Ssam int prot = IEEE80211_PROT_NONE; 1522178354Ssam if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1523178354Ssam prot = IEEE80211_PROT_RTSCTS; 1524178354Ssam else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1525178354Ssam ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM) 1526178354Ssam prot = ic->ic_protmode; 1527178354Ssam if (prot != IEEE80211_PROT_NONE) { 1528178354Ssam error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1529178354Ssam if (error) { 1530178354Ssam m_freem(m0); 1531178354Ssam return error; 1532178354Ssam } 1533178354Ssam flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1534156321Sdamien } 1535156321Sdamien } 1536156321Sdamien 1537156321Sdamien data = &txq->data[txq->cur]; 1538156321Sdamien desc = &txq->desc[txq->cur]; 1539156321Sdamien 1540156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs, 1541156321Sdamien &nsegs, 0); 1542156321Sdamien if (error != 0 && error != EFBIG) { 1543156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1544156321Sdamien error); 1545156321Sdamien m_freem(m0); 1546156321Sdamien return error; 1547156321Sdamien } 1548156321Sdamien if (error != 0) { 1549156321Sdamien mnew = m_defrag(m0, M_DONTWAIT); 1550156321Sdamien if (mnew == NULL) { 1551156321Sdamien device_printf(sc->sc_dev, 1552156321Sdamien "could not defragment mbuf\n"); 1553156321Sdamien m_freem(m0); 1554156321Sdamien return ENOBUFS; 1555156321Sdamien } 1556156321Sdamien m0 = mnew; 1557156321Sdamien 1558156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, 1559156321Sdamien segs, &nsegs, 0); 1560156321Sdamien if (error != 0) { 1561156321Sdamien device_printf(sc->sc_dev, 1562156321Sdamien "could not map mbuf (error %d)\n", error); 1563156321Sdamien m_freem(m0); 1564156321Sdamien return error; 1565156321Sdamien } 1566156321Sdamien 1567156321Sdamien /* packet header have moved, reset our local pointer */ 1568156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1569156321Sdamien } 1570156321Sdamien 1571178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1572156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1573156321Sdamien 1574156321Sdamien tap->wt_flags = 0; 1575156321Sdamien tap->wt_rate = rate; 1576156321Sdamien tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1577156321Sdamien tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1578156321Sdamien 1579178354Ssam bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m0); 1580156321Sdamien } 1581156321Sdamien 1582156321Sdamien data->m = m0; 1583156321Sdamien data->ni = ni; 1584156321Sdamien 1585156321Sdamien /* remember link conditions for rate adaptation algorithm */ 1586178354Ssam if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1587178354Ssam data->rix = ni->ni_txrate; 1588178354Ssam /* XXX probably need last rssi value and not avg */ 1589178354Ssam data->rssi = ic->ic_node_getrssi(ni); 1590156321Sdamien } else 1591178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1592156321Sdamien 1593156321Sdamien if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1594156321Sdamien flags |= RT2661_TX_NEED_ACK; 1595156321Sdamien 1596178354Ssam dur = ieee80211_ack_duration(sc->sc_rates, 1597178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1598156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1599156321Sdamien } 1600156321Sdamien 1601156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1602156321Sdamien nsegs, ac); 1603156321Sdamien 1604156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1605156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1606156321Sdamien 1607178354Ssam DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1608178354Ssam m0->m_pkthdr.len, txq->cur, rate); 1609156321Sdamien 1610156321Sdamien /* kick Tx */ 1611156321Sdamien txq->queued++; 1612156321Sdamien txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1613156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1614156321Sdamien 1615156321Sdamien return 0; 1616156321Sdamien} 1617156321Sdamien 1618156321Sdamienstatic void 1619178354Ssamrt2661_start_locked(struct ifnet *ifp) 1620156321Sdamien{ 1621156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 1622178354Ssam struct mbuf *m; 1623156321Sdamien struct ieee80211_node *ni; 1624156321Sdamien int ac; 1625156321Sdamien 1626178354Ssam RAL_LOCK_ASSERT(sc); 1627156321Sdamien 1628156975Sdamien /* prevent management frames from being sent if we're not ready */ 1629178354Ssam if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid) 1630156975Sdamien return; 1631156975Sdamien 1632156321Sdamien for (;;) { 1633178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1634178354Ssam if (m == NULL) 1635178354Ssam break; 1636156321Sdamien 1637178354Ssam ac = M_WME_GETAC(m); 1638178354Ssam if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1639178354Ssam /* there is no place left in this ring */ 1640178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1641178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1642178354Ssam break; 1643178354Ssam } 1644156321Sdamien 1645178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1646178354Ssam m = ieee80211_encap(ni, m); 1647178354Ssam if (m == NULL) { 1648178354Ssam ieee80211_free_node(ni); 1649178354Ssam ifp->if_oerrors++; 1650178354Ssam continue; 1651178354Ssam } 1652156321Sdamien 1653178354Ssam if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1654178354Ssam ieee80211_free_node(ni); 1655178354Ssam ifp->if_oerrors++; 1656178354Ssam break; 1657178354Ssam } 1658156321Sdamien 1659178354Ssam sc->sc_tx_timer = 5; 1660178354Ssam } 1661178354Ssam} 1662156321Sdamien 1663178354Ssamstatic void 1664178354Ssamrt2661_start(struct ifnet *ifp) 1665178354Ssam{ 1666178354Ssam struct rt2661_softc *sc = ifp->if_softc; 1667156321Sdamien 1668178354Ssam RAL_LOCK(sc); 1669178354Ssam rt2661_start_locked(ifp); 1670178354Ssam RAL_UNLOCK(sc); 1671178354Ssam} 1672156321Sdamien 1673178354Ssamstatic int 1674178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1675178354Ssam const struct ieee80211_bpf_params *params) 1676178354Ssam{ 1677178354Ssam struct ieee80211com *ic = ni->ni_ic; 1678178354Ssam struct ifnet *ifp = ic->ic_ifp; 1679178354Ssam struct rt2661_softc *sc = ifp->if_softc; 1680156321Sdamien 1681178354Ssam RAL_LOCK(sc); 1682156321Sdamien 1683178354Ssam /* prevent management frames from being sent if we're not ready */ 1684178354Ssam if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1685178354Ssam RAL_UNLOCK(sc); 1686178354Ssam m_freem(m); 1687178354Ssam ieee80211_free_node(ni); 1688178354Ssam return ENETDOWN; 1689178354Ssam } 1690178354Ssam if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1691178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1692178354Ssam RAL_UNLOCK(sc); 1693178354Ssam m_freem(m); 1694178354Ssam ieee80211_free_node(ni); 1695178354Ssam return ENOBUFS; /* XXX */ 1696178354Ssam } 1697156321Sdamien 1698178354Ssam ifp->if_opackets++; 1699156321Sdamien 1700178354Ssam /* 1701178354Ssam * Legacy path; interpret frame contents to decide 1702178354Ssam * precisely how to send the frame. 1703178354Ssam * XXX raw path 1704178354Ssam */ 1705178354Ssam if (rt2661_tx_mgt(sc, m, ni) != 0) 1706178354Ssam goto bad; 1707178354Ssam sc->sc_tx_timer = 5; 1708156321Sdamien 1709178354Ssam RAL_UNLOCK(sc); 1710156321Sdamien 1711178354Ssam return 0; 1712178354Ssambad: 1713178354Ssam ifp->if_oerrors++; 1714178354Ssam ieee80211_free_node(ni); 1715156321Sdamien RAL_UNLOCK(sc); 1716178354Ssam return EIO; /* XXX */ 1717156321Sdamien} 1718156321Sdamien 1719156321Sdamienstatic void 1720165352Sbmsrt2661_watchdog(void *arg) 1721156321Sdamien{ 1722165352Sbms struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1723178354Ssam struct ifnet *ifp = sc->sc_ifp; 1724156321Sdamien 1725178354Ssam RAL_LOCK_ASSERT(sc); 1726156321Sdamien 1727178354Ssam KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running")); 1728156321Sdamien 1729178354Ssam if (sc->sc_invalid) /* card ejected */ 1730178354Ssam return; 1731156321Sdamien 1732178354Ssam if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1733178354Ssam if_printf(ifp, "device timeout\n"); 1734178354Ssam rt2661_init_locked(sc); 1735178354Ssam ifp->if_oerrors++; 1736178354Ssam /* NB: callout is reset in rt2661_init() */ 1737178354Ssam return; 1738178354Ssam } 1739178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 1740156321Sdamien} 1741156321Sdamien 1742156321Sdamienstatic int 1743156321Sdamienrt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1744156321Sdamien{ 1745156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 1746178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1747178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1748178354Ssam int error = 0, startall = 0; 1749156321Sdamien 1750156321Sdamien switch (cmd) { 1751156321Sdamien case SIOCSIFFLAGS: 1752178704Sthompsa RAL_LOCK(sc); 1753156321Sdamien if (ifp->if_flags & IFF_UP) { 1754178354Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1755178354Ssam rt2661_init_locked(sc); 1756178354Ssam startall = 1; 1757178354Ssam } else 1758178354Ssam rt2661_update_promisc(ifp); 1759156321Sdamien } else { 1760156321Sdamien if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1761178354Ssam rt2661_stop_locked(sc); 1762156321Sdamien } 1763178704Sthompsa RAL_UNLOCK(sc); 1764178704Sthompsa if (startall) 1765178704Sthompsa ieee80211_start_all(ic); 1766156321Sdamien break; 1767178354Ssam case SIOCGIFMEDIA: 1768178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1769178354Ssam break; 1770178704Sthompsa case SIOCGIFADDR: 1771178354Ssam error = ether_ioctl(ifp, cmd, data); 1772178354Ssam break; 1773178704Sthompsa default: 1774178704Sthompsa error = EINVAL; 1775178704Sthompsa break; 1776156321Sdamien } 1777156321Sdamien return error; 1778156321Sdamien} 1779156321Sdamien 1780156321Sdamienstatic void 1781156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1782156321Sdamien{ 1783156321Sdamien uint32_t tmp; 1784156321Sdamien int ntries; 1785156321Sdamien 1786156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1787156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1788156321Sdamien break; 1789156321Sdamien DELAY(1); 1790156321Sdamien } 1791156321Sdamien if (ntries == 100) { 1792156321Sdamien device_printf(sc->sc_dev, "could not write to BBP\n"); 1793156321Sdamien return; 1794156321Sdamien } 1795156321Sdamien 1796156321Sdamien tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1797156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1798156321Sdamien 1799178354Ssam DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1800156321Sdamien} 1801156321Sdamien 1802156321Sdamienstatic uint8_t 1803156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1804156321Sdamien{ 1805156321Sdamien uint32_t val; 1806156321Sdamien int ntries; 1807156321Sdamien 1808156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1809156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1810156321Sdamien break; 1811156321Sdamien DELAY(1); 1812156321Sdamien } 1813156321Sdamien if (ntries == 100) { 1814156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1815156321Sdamien return 0; 1816156321Sdamien } 1817156321Sdamien 1818156321Sdamien val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1819156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1820156321Sdamien 1821156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1822156321Sdamien val = RAL_READ(sc, RT2661_PHY_CSR3); 1823156321Sdamien if (!(val & RT2661_BBP_BUSY)) 1824156321Sdamien return val & 0xff; 1825156321Sdamien DELAY(1); 1826156321Sdamien } 1827156321Sdamien 1828156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1829156321Sdamien return 0; 1830156321Sdamien} 1831156321Sdamien 1832156321Sdamienstatic void 1833156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1834156321Sdamien{ 1835156321Sdamien uint32_t tmp; 1836156321Sdamien int ntries; 1837156321Sdamien 1838156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1839156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1840156321Sdamien break; 1841156321Sdamien DELAY(1); 1842156321Sdamien } 1843156321Sdamien if (ntries == 100) { 1844156321Sdamien device_printf(sc->sc_dev, "could not write to RF\n"); 1845156321Sdamien return; 1846156321Sdamien } 1847156321Sdamien 1848156321Sdamien tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1849156321Sdamien (reg & 3); 1850156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1851156321Sdamien 1852156321Sdamien /* remember last written value in sc */ 1853156321Sdamien sc->rf_regs[reg] = val; 1854156321Sdamien 1855178354Ssam DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1856156321Sdamien} 1857156321Sdamien 1858156321Sdamienstatic int 1859156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1860156321Sdamien{ 1861156321Sdamien if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1862156321Sdamien return EIO; /* there is already a command pending */ 1863156321Sdamien 1864156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1865156321Sdamien RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1866156321Sdamien 1867156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1868156321Sdamien 1869156321Sdamien return 0; 1870156321Sdamien} 1871156321Sdamien 1872156321Sdamienstatic void 1873156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc) 1874156321Sdamien{ 1875156321Sdamien uint8_t bbp4, bbp77; 1876156321Sdamien uint32_t tmp; 1877156321Sdamien 1878156321Sdamien bbp4 = rt2661_bbp_read(sc, 4); 1879156321Sdamien bbp77 = rt2661_bbp_read(sc, 77); 1880156321Sdamien 1881156321Sdamien /* TBD */ 1882156321Sdamien 1883156321Sdamien /* make sure Rx is disabled before switching antenna */ 1884156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1885156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1886156321Sdamien 1887156321Sdamien rt2661_bbp_write(sc, 4, bbp4); 1888156321Sdamien rt2661_bbp_write(sc, 77, bbp77); 1889156321Sdamien 1890156321Sdamien /* restore Rx filter */ 1891156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1892156321Sdamien} 1893156321Sdamien 1894156321Sdamien/* 1895156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates. 1896156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates. 1897156321Sdamien */ 1898156321Sdamienstatic void 1899156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc) 1900156321Sdamien{ 1901178354Ssam struct ifnet *ifp = sc->sc_ifp; 1902178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1903156321Sdamien uint32_t tmp; 1904156321Sdamien 1905156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1906156321Sdamien 1907156321Sdamien tmp &= ~RT2661_MRR_CCK_FALLBACK; 1908178354Ssam if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1909156321Sdamien tmp |= RT2661_MRR_CCK_FALLBACK; 1910156321Sdamien tmp |= RT2661_MRR_ENABLED; 1911156321Sdamien 1912156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1913156321Sdamien} 1914156321Sdamien 1915156321Sdamienstatic void 1916156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc) 1917156321Sdamien{ 1918178354Ssam struct ifnet *ifp = sc->sc_ifp; 1919178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1920156321Sdamien uint32_t tmp; 1921156321Sdamien 1922156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1923156321Sdamien 1924156321Sdamien tmp &= ~RT2661_SHORT_PREAMBLE; 1925178354Ssam if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1926156321Sdamien tmp |= RT2661_SHORT_PREAMBLE; 1927156321Sdamien 1928156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1929156321Sdamien} 1930156321Sdamien 1931156321Sdamienstatic void 1932156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc, 1933156321Sdamien const struct ieee80211_rateset *rs) 1934156321Sdamien{ 1935156321Sdamien#define RV(r) ((r) & IEEE80211_RATE_VAL) 1936178354Ssam struct ifnet *ifp = sc->sc_ifp; 1937178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1938156321Sdamien uint32_t mask = 0; 1939156321Sdamien uint8_t rate; 1940156321Sdamien int i, j; 1941156321Sdamien 1942156321Sdamien for (i = 0; i < rs->rs_nrates; i++) { 1943156321Sdamien rate = rs->rs_rates[i]; 1944156321Sdamien 1945156321Sdamien if (!(rate & IEEE80211_RATE_BASIC)) 1946156321Sdamien continue; 1947156321Sdamien 1948156321Sdamien /* 1949156321Sdamien * Find h/w rate index. We know it exists because the rate 1950156321Sdamien * set has already been negotiated. 1951156321Sdamien */ 1952167470Ssam for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++); 1953156321Sdamien 1954156321Sdamien mask |= 1 << j; 1955156321Sdamien } 1956156321Sdamien 1957156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1958156321Sdamien 1959178354Ssam DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1960156321Sdamien#undef RV 1961156321Sdamien} 1962156321Sdamien 1963156321Sdamien/* 1964156321Sdamien * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1965156321Sdamien * driver. 1966156321Sdamien */ 1967156321Sdamienstatic void 1968156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1969156321Sdamien{ 1970156321Sdamien uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1971156321Sdamien uint32_t tmp; 1972156321Sdamien 1973156321Sdamien /* update all BBP registers that depend on the band */ 1974156321Sdamien bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1975156321Sdamien bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1976156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) { 1977156321Sdamien bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1978156321Sdamien bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1979156321Sdamien } 1980156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1981156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1982156321Sdamien bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1983156321Sdamien } 1984156321Sdamien 1985156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 1986156321Sdamien rt2661_bbp_write(sc, 96, bbp96); 1987156321Sdamien rt2661_bbp_write(sc, 104, bbp104); 1988156321Sdamien 1989156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1990156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1991156321Sdamien rt2661_bbp_write(sc, 75, 0x80); 1992156321Sdamien rt2661_bbp_write(sc, 86, 0x80); 1993156321Sdamien rt2661_bbp_write(sc, 88, 0x80); 1994156321Sdamien } 1995156321Sdamien 1996156321Sdamien rt2661_bbp_write(sc, 35, bbp35); 1997156321Sdamien rt2661_bbp_write(sc, 97, bbp97); 1998156321Sdamien rt2661_bbp_write(sc, 98, bbp98); 1999156321Sdamien 2000156321Sdamien tmp = RAL_READ(sc, RT2661_PHY_CSR0); 2001156321Sdamien tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 2002156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(c)) 2003156321Sdamien tmp |= RT2661_PA_PE_2GHZ; 2004156321Sdamien else 2005156321Sdamien tmp |= RT2661_PA_PE_5GHZ; 2006156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 2007156321Sdamien} 2008156321Sdamien 2009156321Sdamienstatic void 2010156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 2011156321Sdamien{ 2012178354Ssam struct ifnet *ifp = sc->sc_ifp; 2013178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2014156321Sdamien const struct rfprog *rfprog; 2015156321Sdamien uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 2016156321Sdamien int8_t power; 2017156321Sdamien u_int i, chan; 2018156321Sdamien 2019156321Sdamien chan = ieee80211_chan2ieee(ic, c); 2020178354Ssam KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 2021156321Sdamien 2022178354Ssam sc->sc_rates = ieee80211_get_ratetable(c); 2023178354Ssam 2024156321Sdamien /* select the appropriate RF settings based on what EEPROM says */ 2025156321Sdamien rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 2026156321Sdamien 2027156321Sdamien /* find the settings for this channel (we know it exists) */ 2028156321Sdamien for (i = 0; rfprog[i].chan != chan; i++); 2029156321Sdamien 2030156321Sdamien power = sc->txpow[i]; 2031156321Sdamien if (power < 0) { 2032156321Sdamien bbp94 += power; 2033156321Sdamien power = 0; 2034156321Sdamien } else if (power > 31) { 2035156321Sdamien bbp94 += power - 31; 2036156321Sdamien power = 31; 2037156321Sdamien } 2038156321Sdamien 2039156321Sdamien /* 2040156321Sdamien * If we are switching from the 2GHz band to the 5GHz band or 2041156321Sdamien * vice-versa, BBP registers need to be reprogrammed. 2042156321Sdamien */ 2043156321Sdamien if (c->ic_flags != sc->sc_curchan->ic_flags) { 2044156321Sdamien rt2661_select_band(sc, c); 2045156321Sdamien rt2661_select_antenna(sc); 2046156321Sdamien } 2047156321Sdamien sc->sc_curchan = c; 2048156321Sdamien 2049156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2050156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2051156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2052156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2053156321Sdamien 2054156321Sdamien DELAY(200); 2055156321Sdamien 2056156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2057156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2058156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 2059156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2060156321Sdamien 2061156321Sdamien DELAY(200); 2062156321Sdamien 2063156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 2064156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 2065156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 2066156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 2067156321Sdamien 2068156321Sdamien /* enable smart mode for MIMO-capable RFs */ 2069156321Sdamien bbp3 = rt2661_bbp_read(sc, 3); 2070156321Sdamien 2071156321Sdamien bbp3 &= ~RT2661_SMART_MODE; 2072156321Sdamien if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 2073156321Sdamien bbp3 |= RT2661_SMART_MODE; 2074156321Sdamien 2075156321Sdamien rt2661_bbp_write(sc, 3, bbp3); 2076156321Sdamien 2077156321Sdamien if (bbp94 != RT2661_BBPR94_DEFAULT) 2078156321Sdamien rt2661_bbp_write(sc, 94, bbp94); 2079156321Sdamien 2080156321Sdamien /* 5GHz radio needs a 1ms delay here */ 2081156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) 2082156321Sdamien DELAY(1000); 2083156321Sdamien} 2084156321Sdamien 2085156321Sdamienstatic void 2086156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2087156321Sdamien{ 2088156321Sdamien uint32_t tmp; 2089156321Sdamien 2090156321Sdamien tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2091156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2092156321Sdamien 2093156321Sdamien tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2094156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2095156321Sdamien} 2096156321Sdamien 2097156321Sdamienstatic void 2098156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2099156321Sdamien{ 2100156321Sdamien uint32_t tmp; 2101156321Sdamien 2102156321Sdamien tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2103156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2104156321Sdamien 2105156321Sdamien tmp = addr[4] | addr[5] << 8; 2106156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2107156321Sdamien} 2108156321Sdamien 2109156321Sdamienstatic void 2110178354Ssamrt2661_update_promisc(struct ifnet *ifp) 2111156321Sdamien{ 2112178354Ssam struct rt2661_softc *sc = ifp->if_softc; 2113156321Sdamien uint32_t tmp; 2114156321Sdamien 2115156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2116156321Sdamien 2117156321Sdamien tmp &= ~RT2661_DROP_NOT_TO_ME; 2118156321Sdamien if (!(ifp->if_flags & IFF_PROMISC)) 2119156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2120156321Sdamien 2121156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2122156321Sdamien 2123178354Ssam DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2124178354Ssam "entering" : "leaving"); 2125156321Sdamien} 2126156321Sdamien 2127156321Sdamien/* 2128156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring. 2129156321Sdamien */ 2130156321Sdamienstatic int 2131156321Sdamienrt2661_wme_update(struct ieee80211com *ic) 2132156321Sdamien{ 2133156321Sdamien struct rt2661_softc *sc = ic->ic_ifp->if_softc; 2134156321Sdamien const struct wmeParams *wmep; 2135156321Sdamien 2136156321Sdamien wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2137156321Sdamien 2138156321Sdamien /* XXX: not sure about shifts. */ 2139156321Sdamien /* XXX: the reference driver plays with AC_VI settings too. */ 2140156321Sdamien 2141156321Sdamien /* update TxOp */ 2142156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2143156321Sdamien wmep[WME_AC_BE].wmep_txopLimit << 16 | 2144156321Sdamien wmep[WME_AC_BK].wmep_txopLimit); 2145156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2146156321Sdamien wmep[WME_AC_VI].wmep_txopLimit << 16 | 2147156321Sdamien wmep[WME_AC_VO].wmep_txopLimit); 2148156321Sdamien 2149156321Sdamien /* update CWmin */ 2150156321Sdamien RAL_WRITE(sc, RT2661_CWMIN_CSR, 2151156321Sdamien wmep[WME_AC_BE].wmep_logcwmin << 12 | 2152156321Sdamien wmep[WME_AC_BK].wmep_logcwmin << 8 | 2153156321Sdamien wmep[WME_AC_VI].wmep_logcwmin << 4 | 2154156321Sdamien wmep[WME_AC_VO].wmep_logcwmin); 2155156321Sdamien 2156156321Sdamien /* update CWmax */ 2157156321Sdamien RAL_WRITE(sc, RT2661_CWMAX_CSR, 2158156321Sdamien wmep[WME_AC_BE].wmep_logcwmax << 12 | 2159156321Sdamien wmep[WME_AC_BK].wmep_logcwmax << 8 | 2160156321Sdamien wmep[WME_AC_VI].wmep_logcwmax << 4 | 2161156321Sdamien wmep[WME_AC_VO].wmep_logcwmax); 2162156321Sdamien 2163156321Sdamien /* update Aifsn */ 2164156321Sdamien RAL_WRITE(sc, RT2661_AIFSN_CSR, 2165156321Sdamien wmep[WME_AC_BE].wmep_aifsn << 12 | 2166156321Sdamien wmep[WME_AC_BK].wmep_aifsn << 8 | 2167156321Sdamien wmep[WME_AC_VI].wmep_aifsn << 4 | 2168156321Sdamien wmep[WME_AC_VO].wmep_aifsn); 2169156321Sdamien 2170156321Sdamien return 0; 2171156321Sdamien} 2172156321Sdamien 2173156321Sdamienstatic void 2174156321Sdamienrt2661_update_slot(struct ifnet *ifp) 2175156321Sdamien{ 2176156321Sdamien struct rt2661_softc *sc = ifp->if_softc; 2177178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2178156321Sdamien uint8_t slottime; 2179156321Sdamien uint32_t tmp; 2180156321Sdamien 2181156321Sdamien slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2182156321Sdamien 2183156321Sdamien tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2184156321Sdamien tmp = (tmp & ~0xff) | slottime; 2185156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2186156321Sdamien} 2187156321Sdamien 2188156321Sdamienstatic const char * 2189156321Sdamienrt2661_get_rf(int rev) 2190156321Sdamien{ 2191156321Sdamien switch (rev) { 2192156321Sdamien case RT2661_RF_5225: return "RT5225"; 2193156321Sdamien case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2194156321Sdamien case RT2661_RF_2527: return "RT2527"; 2195156321Sdamien case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2196156321Sdamien default: return "unknown"; 2197156321Sdamien } 2198156321Sdamien} 2199156321Sdamien 2200156321Sdamienstatic void 2201178354Ssamrt2661_read_eeprom(struct rt2661_softc *sc, struct ieee80211com *ic) 2202156321Sdamien{ 2203156321Sdamien uint16_t val; 2204156321Sdamien int i; 2205156321Sdamien 2206156321Sdamien /* read MAC address */ 2207156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2208156321Sdamien ic->ic_myaddr[0] = val & 0xff; 2209156321Sdamien ic->ic_myaddr[1] = val >> 8; 2210156321Sdamien 2211156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2212156321Sdamien ic->ic_myaddr[2] = val & 0xff; 2213156321Sdamien ic->ic_myaddr[3] = val >> 8; 2214156321Sdamien 2215156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2216156321Sdamien ic->ic_myaddr[4] = val & 0xff; 2217156321Sdamien ic->ic_myaddr[5] = val >> 8; 2218156321Sdamien 2219156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2220156321Sdamien /* XXX: test if different from 0xffff? */ 2221156321Sdamien sc->rf_rev = (val >> 11) & 0x1f; 2222156321Sdamien sc->hw_radio = (val >> 10) & 0x1; 2223156321Sdamien sc->rx_ant = (val >> 4) & 0x3; 2224156321Sdamien sc->tx_ant = (val >> 2) & 0x3; 2225156321Sdamien sc->nb_ant = val & 0x3; 2226156321Sdamien 2227178354Ssam DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2228156321Sdamien 2229156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2230156321Sdamien sc->ext_5ghz_lna = (val >> 6) & 0x1; 2231156321Sdamien sc->ext_2ghz_lna = (val >> 4) & 0x1; 2232156321Sdamien 2233178354Ssam DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2234178354Ssam sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2235156321Sdamien 2236156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2237156321Sdamien if ((val & 0xff) != 0xff) 2238156321Sdamien sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2239156321Sdamien 2240170530Ssam /* Only [-10, 10] is valid */ 2241170530Ssam if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2242170530Ssam sc->rssi_2ghz_corr = 0; 2243170530Ssam 2244156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2245156321Sdamien if ((val & 0xff) != 0xff) 2246156321Sdamien sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2247156321Sdamien 2248170530Ssam /* Only [-10, 10] is valid */ 2249170530Ssam if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2250170530Ssam sc->rssi_5ghz_corr = 0; 2251170530Ssam 2252156321Sdamien /* adjust RSSI correction for external low-noise amplifier */ 2253156321Sdamien if (sc->ext_2ghz_lna) 2254156321Sdamien sc->rssi_2ghz_corr -= 14; 2255156321Sdamien if (sc->ext_5ghz_lna) 2256156321Sdamien sc->rssi_5ghz_corr -= 14; 2257156321Sdamien 2258178354Ssam DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2259178354Ssam sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2260156321Sdamien 2261156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2262156321Sdamien if ((val >> 8) != 0xff) 2263156321Sdamien sc->rfprog = (val >> 8) & 0x3; 2264156321Sdamien if ((val & 0xff) != 0xff) 2265156321Sdamien sc->rffreq = val & 0xff; 2266156321Sdamien 2267178354Ssam DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2268156321Sdamien 2269156321Sdamien /* read Tx power for all a/b/g channels */ 2270156321Sdamien for (i = 0; i < 19; i++) { 2271156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2272156321Sdamien sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2273178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2274178354Ssam rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2275156321Sdamien sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2276178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2277178354Ssam rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2278156321Sdamien } 2279156321Sdamien 2280156321Sdamien /* read vendor-specific BBP values */ 2281156321Sdamien for (i = 0; i < 16; i++) { 2282156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2283156321Sdamien if (val == 0 || val == 0xffff) 2284156321Sdamien continue; /* skip invalid entries */ 2285156321Sdamien sc->bbp_prom[i].reg = val >> 8; 2286156321Sdamien sc->bbp_prom[i].val = val & 0xff; 2287178354Ssam DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2288178354Ssam sc->bbp_prom[i].val); 2289156321Sdamien } 2290156321Sdamien} 2291156321Sdamien 2292156321Sdamienstatic int 2293156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc) 2294156321Sdamien{ 2295156321Sdamien#define N(a) (sizeof (a) / sizeof ((a)[0])) 2296156321Sdamien int i, ntries; 2297156321Sdamien uint8_t val; 2298156321Sdamien 2299156321Sdamien /* wait for BBP to be ready */ 2300156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 2301156321Sdamien val = rt2661_bbp_read(sc, 0); 2302156321Sdamien if (val != 0 && val != 0xff) 2303156321Sdamien break; 2304156321Sdamien DELAY(100); 2305156321Sdamien } 2306156321Sdamien if (ntries == 100) { 2307156321Sdamien device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2308156321Sdamien return EIO; 2309156321Sdamien } 2310156321Sdamien 2311156321Sdamien /* initialize BBP registers to default values */ 2312156321Sdamien for (i = 0; i < N(rt2661_def_bbp); i++) { 2313156321Sdamien rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2314156321Sdamien rt2661_def_bbp[i].val); 2315156321Sdamien } 2316156321Sdamien 2317156321Sdamien /* write vendor-specific BBP values (from EEPROM) */ 2318156321Sdamien for (i = 0; i < 16; i++) { 2319156321Sdamien if (sc->bbp_prom[i].reg == 0) 2320156321Sdamien continue; 2321156321Sdamien rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2322156321Sdamien } 2323156321Sdamien 2324156321Sdamien return 0; 2325156321Sdamien#undef N 2326156321Sdamien} 2327156321Sdamien 2328156321Sdamienstatic void 2329178354Ssamrt2661_init_locked(struct rt2661_softc *sc) 2330156321Sdamien{ 2331156321Sdamien#define N(a) (sizeof (a) / sizeof ((a)[0])) 2332178354Ssam struct ifnet *ifp = sc->sc_ifp; 2333178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2334156321Sdamien uint32_t tmp, sta[3]; 2335178354Ssam int i, error, ntries; 2336156321Sdamien 2337178354Ssam RAL_LOCK_ASSERT(sc); 2338156975Sdamien 2339178354Ssam if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2340178354Ssam error = rt2661_load_microcode(sc); 2341178354Ssam if (error != 0) { 2342178354Ssam if_printf(ifp, 2343178354Ssam "%s: could not load 8051 microcode, error %d\n", 2344178354Ssam __func__, error); 2345178354Ssam return; 2346178354Ssam } 2347178354Ssam sc->sc_flags |= RAL_FW_LOADED; 2348178354Ssam } 2349178354Ssam 2350170530Ssam rt2661_stop_locked(sc); 2351156321Sdamien 2352156321Sdamien /* initialize Tx rings */ 2353156321Sdamien RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2354156321Sdamien RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2355156321Sdamien RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2356156321Sdamien RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2357156321Sdamien 2358156321Sdamien /* initialize Mgt ring */ 2359156321Sdamien RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2360156321Sdamien 2361156321Sdamien /* initialize Rx ring */ 2362156321Sdamien RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2363156321Sdamien 2364156321Sdamien /* initialize Tx rings sizes */ 2365156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2366156321Sdamien RT2661_TX_RING_COUNT << 24 | 2367156321Sdamien RT2661_TX_RING_COUNT << 16 | 2368156321Sdamien RT2661_TX_RING_COUNT << 8 | 2369156321Sdamien RT2661_TX_RING_COUNT); 2370156321Sdamien 2371156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2372156321Sdamien RT2661_TX_DESC_WSIZE << 16 | 2373156321Sdamien RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2374156321Sdamien RT2661_MGT_RING_COUNT); 2375156321Sdamien 2376156321Sdamien /* initialize Rx rings */ 2377156321Sdamien RAL_WRITE(sc, RT2661_RX_RING_CSR, 2378156321Sdamien RT2661_RX_DESC_BACK << 16 | 2379156321Sdamien RT2661_RX_DESC_WSIZE << 8 | 2380156321Sdamien RT2661_RX_RING_COUNT); 2381156321Sdamien 2382156321Sdamien /* XXX: some magic here */ 2383156321Sdamien RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2384156321Sdamien 2385156321Sdamien /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2386156321Sdamien RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2387156321Sdamien 2388156321Sdamien /* load base address of Rx ring */ 2389156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2390156321Sdamien 2391156321Sdamien /* initialize MAC registers to default values */ 2392156321Sdamien for (i = 0; i < N(rt2661_def_mac); i++) 2393156321Sdamien RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2394156321Sdamien 2395156321Sdamien IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 2396156321Sdamien rt2661_set_macaddr(sc, ic->ic_myaddr); 2397156321Sdamien 2398156321Sdamien /* set host ready */ 2399156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2400156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2401156321Sdamien 2402156321Sdamien /* wait for BBP/RF to wakeup */ 2403156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 2404156321Sdamien if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2405156321Sdamien break; 2406156321Sdamien DELAY(1000); 2407156321Sdamien } 2408156321Sdamien if (ntries == 1000) { 2409156321Sdamien printf("timeout waiting for BBP/RF to wakeup\n"); 2410170530Ssam rt2661_stop_locked(sc); 2411156321Sdamien return; 2412156321Sdamien } 2413156321Sdamien 2414156321Sdamien if (rt2661_bbp_init(sc) != 0) { 2415170530Ssam rt2661_stop_locked(sc); 2416156321Sdamien return; 2417156321Sdamien } 2418156321Sdamien 2419156321Sdamien /* select default channel */ 2420156321Sdamien sc->sc_curchan = ic->ic_curchan; 2421156321Sdamien rt2661_select_band(sc, sc->sc_curchan); 2422156321Sdamien rt2661_select_antenna(sc); 2423156321Sdamien rt2661_set_chan(sc, sc->sc_curchan); 2424156321Sdamien 2425156321Sdamien /* update Rx filter */ 2426156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2427156321Sdamien 2428156321Sdamien tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2429156321Sdamien if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2430156321Sdamien tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2431156321Sdamien RT2661_DROP_ACKCTS; 2432156321Sdamien if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2433156321Sdamien tmp |= RT2661_DROP_TODS; 2434156321Sdamien if (!(ifp->if_flags & IFF_PROMISC)) 2435156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2436156321Sdamien } 2437156321Sdamien 2438156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2439156321Sdamien 2440156321Sdamien /* clear STA registers */ 2441156321Sdamien RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta)); 2442156321Sdamien 2443156321Sdamien /* initialize ASIC */ 2444156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2445156321Sdamien 2446156321Sdamien /* clear any pending interrupt */ 2447156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2448156321Sdamien 2449156321Sdamien /* enable interrupts */ 2450156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2451156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2452156321Sdamien 2453156321Sdamien /* kick Rx */ 2454156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2455156321Sdamien 2456156321Sdamien ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2457156321Sdamien ifp->if_drv_flags |= IFF_DRV_RUNNING; 2458156321Sdamien 2459178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 2460156975Sdamien#undef N 2461156321Sdamien} 2462156321Sdamien 2463178354Ssamstatic void 2464178354Ssamrt2661_init(void *priv) 2465156321Sdamien{ 2466156321Sdamien struct rt2661_softc *sc = priv; 2467178354Ssam struct ifnet *ifp = sc->sc_ifp; 2468178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2469170530Ssam 2470170530Ssam RAL_LOCK(sc); 2471178354Ssam rt2661_init_locked(sc); 2472170530Ssam RAL_UNLOCK(sc); 2473178354Ssam 2474178931Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2475178931Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2476170530Ssam} 2477170530Ssam 2478170530Ssamvoid 2479170530Ssamrt2661_stop_locked(struct rt2661_softc *sc) 2480170530Ssam{ 2481178354Ssam struct ifnet *ifp = sc->sc_ifp; 2482156321Sdamien uint32_t tmp; 2483170530Ssam volatile int *flags = &sc->sc_flags; 2484156321Sdamien 2485178354Ssam while (*flags & RAL_INPUT_RUNNING) 2486170530Ssam msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2487156321Sdamien 2488178354Ssam callout_stop(&sc->watchdog_ch); 2489178354Ssam sc->sc_tx_timer = 0; 2490178354Ssam 2491170530Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2492170530Ssam ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2493178354Ssam 2494170530Ssam /* abort Tx (for all 5 Tx rings) */ 2495170530Ssam RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2496170530Ssam 2497170530Ssam /* disable Rx (value remains after reset!) */ 2498170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2499170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2500170530Ssam 2501170530Ssam /* reset ASIC */ 2502170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2503170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2504170530Ssam 2505170530Ssam /* disable interrupts */ 2506170530Ssam RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2507170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2508170530Ssam 2509170530Ssam /* clear any pending interrupt */ 2510170530Ssam RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2511170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2512170530Ssam 2513170530Ssam /* reset Tx and Rx rings */ 2514170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[0]); 2515170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[1]); 2516170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[2]); 2517170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[3]); 2518170530Ssam rt2661_reset_tx_ring(sc, &sc->mgtq); 2519170530Ssam rt2661_reset_rx_ring(sc, &sc->rxq); 2520170530Ssam } 2521156321Sdamien} 2522156321Sdamien 2523178354Ssamvoid 2524178354Ssamrt2661_stop(void *priv) 2525178354Ssam{ 2526178354Ssam struct rt2661_softc *sc = priv; 2527178354Ssam 2528178354Ssam RAL_LOCK(sc); 2529178354Ssam rt2661_stop_locked(sc); 2530178354Ssam RAL_UNLOCK(sc); 2531178354Ssam} 2532178354Ssam 2533156321Sdamienstatic int 2534178354Ssamrt2661_load_microcode(struct rt2661_softc *sc) 2535156321Sdamien{ 2536178354Ssam struct ifnet *ifp = sc->sc_ifp; 2537178354Ssam const struct firmware *fp; 2538178354Ssam const char *imagename; 2539178354Ssam int ntries, error; 2540156321Sdamien 2541178354Ssam RAL_LOCK_ASSERT(sc); 2542178354Ssam 2543178354Ssam switch (sc->sc_id) { 2544178354Ssam case 0x0301: imagename = "rt2561sfw"; break; 2545178354Ssam case 0x0302: imagename = "rt2561fw"; break; 2546178354Ssam case 0x0401: imagename = "rt2661fw"; break; 2547178354Ssam default: 2548178354Ssam if_printf(ifp, "%s: unexpected pci device id 0x%x, " 2549178354Ssam "don't know how to retrieve firmware\n", 2550178354Ssam __func__, sc->sc_id); 2551178354Ssam return EINVAL; 2552178354Ssam } 2553178354Ssam RAL_UNLOCK(sc); 2554178354Ssam fp = firmware_get(imagename); 2555178354Ssam RAL_LOCK(sc); 2556178354Ssam if (fp == NULL) { 2557178354Ssam if_printf(ifp, "%s: unable to retrieve firmware image %s\n", 2558178354Ssam __func__, imagename); 2559178354Ssam return EINVAL; 2560178354Ssam } 2561178354Ssam 2562178354Ssam /* 2563178354Ssam * Load 8051 microcode into NIC. 2564178354Ssam */ 2565156321Sdamien /* reset 8051 */ 2566156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2567156321Sdamien 2568156321Sdamien /* cancel any pending Host to MCU command */ 2569156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2570156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2571156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2572156321Sdamien 2573156321Sdamien /* write 8051's microcode */ 2574156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2575178354Ssam RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2576156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2577156321Sdamien 2578156321Sdamien /* kick 8051's ass */ 2579156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2580156321Sdamien 2581156321Sdamien /* wait for 8051 to initialize */ 2582156321Sdamien for (ntries = 0; ntries < 500; ntries++) { 2583156321Sdamien if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2584156321Sdamien break; 2585156321Sdamien DELAY(100); 2586156321Sdamien } 2587156321Sdamien if (ntries == 500) { 2588178354Ssam if_printf(ifp, "%s: timeout waiting for MCU to initialize\n", 2589178354Ssam __func__); 2590178354Ssam error = EIO; 2591178354Ssam } else 2592178354Ssam error = 0; 2593178354Ssam 2594178354Ssam firmware_put(fp, FIRMWARE_UNLOAD); 2595178354Ssam return error; 2596156321Sdamien} 2597156321Sdamien 2598156321Sdamien#ifdef notyet 2599156321Sdamien/* 2600156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2601156321Sdamien * false CCA count. This function is called periodically (every seconds) when 2602156321Sdamien * in the RUN state. Values taken from the reference driver. 2603156321Sdamien */ 2604156321Sdamienstatic void 2605156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc) 2606156321Sdamien{ 2607156321Sdamien uint8_t bbp17; 2608156321Sdamien uint16_t cca; 2609156321Sdamien int lo, hi, dbm; 2610156321Sdamien 2611156321Sdamien /* 2612156321Sdamien * Tuning range depends on operating band and on the presence of an 2613156321Sdamien * external low-noise amplifier. 2614156321Sdamien */ 2615156321Sdamien lo = 0x20; 2616156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2617156321Sdamien lo += 0x08; 2618156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2619156321Sdamien (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2620156321Sdamien lo += 0x10; 2621156321Sdamien hi = lo + 0x20; 2622156321Sdamien 2623156321Sdamien /* retrieve false CCA count since last call (clear on read) */ 2624156321Sdamien cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2625156321Sdamien 2626156321Sdamien if (dbm >= -35) { 2627156321Sdamien bbp17 = 0x60; 2628156321Sdamien } else if (dbm >= -58) { 2629156321Sdamien bbp17 = hi; 2630156321Sdamien } else if (dbm >= -66) { 2631156321Sdamien bbp17 = lo + 0x10; 2632156321Sdamien } else if (dbm >= -74) { 2633156321Sdamien bbp17 = lo + 0x08; 2634156321Sdamien } else { 2635156321Sdamien /* RSSI < -74dBm, tune using false CCA count */ 2636156321Sdamien 2637156321Sdamien bbp17 = sc->bbp17; /* current value */ 2638156321Sdamien 2639156321Sdamien hi -= 2 * (-74 - dbm); 2640156321Sdamien if (hi < lo) 2641156321Sdamien hi = lo; 2642156321Sdamien 2643156321Sdamien if (bbp17 > hi) { 2644156321Sdamien bbp17 = hi; 2645156321Sdamien 2646156321Sdamien } else if (cca > 512) { 2647156321Sdamien if (++bbp17 > hi) 2648156321Sdamien bbp17 = hi; 2649156321Sdamien } else if (cca < 100) { 2650156321Sdamien if (--bbp17 < lo) 2651156321Sdamien bbp17 = lo; 2652156321Sdamien } 2653156321Sdamien } 2654156321Sdamien 2655156321Sdamien if (bbp17 != sc->bbp17) { 2656156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2657156321Sdamien sc->bbp17 = bbp17; 2658156321Sdamien } 2659156321Sdamien} 2660156321Sdamien 2661156321Sdamien/* 2662156321Sdamien * Enter/Leave radar detection mode. 2663156321Sdamien * This is for 802.11h additional regulatory domains. 2664156321Sdamien */ 2665156321Sdamienstatic void 2666156321Sdamienrt2661_radar_start(struct rt2661_softc *sc) 2667156321Sdamien{ 2668156321Sdamien uint32_t tmp; 2669156321Sdamien 2670156321Sdamien /* disable Rx */ 2671156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2672156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2673156321Sdamien 2674156321Sdamien rt2661_bbp_write(sc, 82, 0x20); 2675156321Sdamien rt2661_bbp_write(sc, 83, 0x00); 2676156321Sdamien rt2661_bbp_write(sc, 84, 0x40); 2677156321Sdamien 2678156321Sdamien /* save current BBP registers values */ 2679156321Sdamien sc->bbp18 = rt2661_bbp_read(sc, 18); 2680156321Sdamien sc->bbp21 = rt2661_bbp_read(sc, 21); 2681156321Sdamien sc->bbp22 = rt2661_bbp_read(sc, 22); 2682156321Sdamien sc->bbp16 = rt2661_bbp_read(sc, 16); 2683156321Sdamien sc->bbp17 = rt2661_bbp_read(sc, 17); 2684156321Sdamien sc->bbp64 = rt2661_bbp_read(sc, 64); 2685156321Sdamien 2686156321Sdamien rt2661_bbp_write(sc, 18, 0xff); 2687156321Sdamien rt2661_bbp_write(sc, 21, 0x3f); 2688156321Sdamien rt2661_bbp_write(sc, 22, 0x3f); 2689156321Sdamien rt2661_bbp_write(sc, 16, 0xbd); 2690156321Sdamien rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2691156321Sdamien rt2661_bbp_write(sc, 64, 0x21); 2692156321Sdamien 2693156321Sdamien /* restore Rx filter */ 2694156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2695156321Sdamien} 2696156321Sdamien 2697156321Sdamienstatic int 2698156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc) 2699156321Sdamien{ 2700156321Sdamien uint8_t bbp66; 2701156321Sdamien 2702156321Sdamien /* read radar detection result */ 2703156321Sdamien bbp66 = rt2661_bbp_read(sc, 66); 2704156321Sdamien 2705156321Sdamien /* restore BBP registers values */ 2706156321Sdamien rt2661_bbp_write(sc, 16, sc->bbp16); 2707156321Sdamien rt2661_bbp_write(sc, 17, sc->bbp17); 2708156321Sdamien rt2661_bbp_write(sc, 18, sc->bbp18); 2709156321Sdamien rt2661_bbp_write(sc, 21, sc->bbp21); 2710156321Sdamien rt2661_bbp_write(sc, 22, sc->bbp22); 2711156321Sdamien rt2661_bbp_write(sc, 64, sc->bbp64); 2712156321Sdamien 2713156321Sdamien return bbp66 == 1; 2714156321Sdamien} 2715156321Sdamien#endif 2716156321Sdamien 2717156321Sdamienstatic int 2718178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2719156321Sdamien{ 2720178354Ssam struct ieee80211com *ic = vap->iv_ic; 2721156321Sdamien struct ieee80211_beacon_offsets bo; 2722156321Sdamien struct rt2661_tx_desc desc; 2723156321Sdamien struct mbuf *m0; 2724156321Sdamien int rate; 2725156321Sdamien 2726178354Ssam m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo); 2727156321Sdamien if (m0 == NULL) { 2728156321Sdamien device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2729156321Sdamien return ENOBUFS; 2730156321Sdamien } 2731156321Sdamien 2732156321Sdamien /* send beacons at the lowest available rate */ 2733178354Ssam rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2734156321Sdamien 2735156321Sdamien rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2736156321Sdamien m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2737156321Sdamien 2738156321Sdamien /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2739156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2740156321Sdamien 2741156321Sdamien /* copy beacon header and payload into NIC memory */ 2742156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2743156321Sdamien mtod(m0, uint8_t *), m0->m_pkthdr.len); 2744156321Sdamien 2745156321Sdamien m_freem(m0); 2746156321Sdamien 2747156321Sdamien return 0; 2748156321Sdamien} 2749156321Sdamien 2750156321Sdamien/* 2751156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2752156321Sdamien * and HostAP operating modes. 2753156321Sdamien */ 2754156321Sdamienstatic void 2755156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc) 2756156321Sdamien{ 2757178354Ssam struct ifnet *ifp = sc->sc_ifp; 2758178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2759178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2760156321Sdamien uint32_t tmp; 2761156321Sdamien 2762178354Ssam if (vap->iv_opmode != IEEE80211_M_STA) { 2763156321Sdamien /* 2764156321Sdamien * Change default 16ms TBTT adjustment to 8ms. 2765156321Sdamien * Must be done before enabling beacon generation. 2766156321Sdamien */ 2767156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2768156321Sdamien } 2769156321Sdamien 2770156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2771156321Sdamien 2772156321Sdamien /* set beacon interval (in 1/16ms unit) */ 2773178354Ssam tmp |= vap->iv_bss->ni_intval * 16; 2774156321Sdamien 2775156321Sdamien tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2776178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2777156321Sdamien tmp |= RT2661_TSF_MODE(1); 2778156321Sdamien else 2779156321Sdamien tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2780156321Sdamien 2781156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2782156321Sdamien} 2783156321Sdamien 2784156321Sdamien/* 2785156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values 2786156321Sdamien * contained in Rx descriptors. The computation depends on which band the 2787156321Sdamien * frame was received. Correction values taken from the reference driver. 2788156321Sdamien */ 2789156321Sdamienstatic int 2790156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2791156321Sdamien{ 2792156321Sdamien int lna, agc, rssi; 2793156321Sdamien 2794156321Sdamien lna = (raw >> 5) & 0x3; 2795156321Sdamien agc = raw & 0x1f; 2796156321Sdamien 2797170530Ssam if (lna == 0) { 2798170530Ssam /* 2799170530Ssam * No mapping available. 2800170530Ssam * 2801170530Ssam * NB: Since RSSI is relative to noise floor, -1 is 2802170530Ssam * adequate for caller to know error happened. 2803170530Ssam */ 2804170530Ssam return -1; 2805170530Ssam } 2806156321Sdamien 2807170530Ssam rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2808170530Ssam 2809156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2810156321Sdamien rssi += sc->rssi_2ghz_corr; 2811156321Sdamien 2812156321Sdamien if (lna == 1) 2813156321Sdamien rssi -= 64; 2814156321Sdamien else if (lna == 2) 2815156321Sdamien rssi -= 74; 2816156321Sdamien else if (lna == 3) 2817156321Sdamien rssi -= 90; 2818156321Sdamien } else { 2819156321Sdamien rssi += sc->rssi_5ghz_corr; 2820156321Sdamien 2821156321Sdamien if (lna == 1) 2822156321Sdamien rssi -= 64; 2823156321Sdamien else if (lna == 2) 2824156321Sdamien rssi -= 86; 2825156321Sdamien else if (lna == 3) 2826156321Sdamien rssi -= 100; 2827156321Sdamien } 2828156321Sdamien return rssi; 2829156321Sdamien} 2830170530Ssam 2831170530Ssamstatic void 2832170530Ssamrt2661_scan_start(struct ieee80211com *ic) 2833170530Ssam{ 2834170530Ssam struct ifnet *ifp = ic->ic_ifp; 2835170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2836170530Ssam uint32_t tmp; 2837170530Ssam 2838170530Ssam /* abort TSF synchronization */ 2839170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2840170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2841170530Ssam rt2661_set_bssid(sc, ifp->if_broadcastaddr); 2842170530Ssam} 2843170530Ssam 2844170530Ssamstatic void 2845170530Ssamrt2661_scan_end(struct ieee80211com *ic) 2846170530Ssam{ 2847170530Ssam struct ifnet *ifp = ic->ic_ifp; 2848170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2849178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2850170530Ssam 2851170530Ssam rt2661_enable_tsf_sync(sc); 2852170530Ssam /* XXX keep local copy */ 2853178354Ssam rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2854170530Ssam} 2855170530Ssam 2856170530Ssamstatic void 2857170530Ssamrt2661_set_channel(struct ieee80211com *ic) 2858170530Ssam{ 2859170530Ssam struct ifnet *ifp = ic->ic_ifp; 2860170530Ssam struct rt2661_softc *sc = ifp->if_softc; 2861170530Ssam 2862170530Ssam RAL_LOCK(sc); 2863170530Ssam rt2661_set_chan(sc, ic->ic_curchan); 2864178354Ssam 2865178354Ssam sc->sc_txtap.wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2866178354Ssam sc->sc_txtap.wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2867178354Ssam sc->sc_rxtap.wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2868178354Ssam sc->sc_rxtap.wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2869170530Ssam RAL_UNLOCK(sc); 2870170530Ssam 2871170530Ssam} 2872