1156321Sdamien/* $FreeBSD: stable/11/sys/dev/ral/rt2661.c 343976 2019-02-10 21:00:02Z avos $ */ 2156321Sdamien 3156321Sdamien/*- 4156321Sdamien * Copyright (c) 2006 5156321Sdamien * Damien Bergamini <damien.bergamini@free.fr> 6156321Sdamien * 7156321Sdamien * Permission to use, copy, modify, and distribute this software for any 8156321Sdamien * purpose with or without fee is hereby granted, provided that the above 9156321Sdamien * copyright notice and this permission notice appear in all copies. 10156321Sdamien * 11156321Sdamien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12156321Sdamien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13156321Sdamien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14156321Sdamien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15156321Sdamien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16156321Sdamien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17156321Sdamien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18156321Sdamien */ 19156321Sdamien 20156321Sdamien#include <sys/cdefs.h> 21156321Sdamien__FBSDID("$FreeBSD: stable/11/sys/dev/ral/rt2661.c 343976 2019-02-10 21:00:02Z avos $"); 22156321Sdamien 23156321Sdamien/*- 24156321Sdamien * Ralink Technology RT2561, RT2561S and RT2661 chipset driver 25156321Sdamien * http://www.ralinktech.com/ 26156321Sdamien */ 27156321Sdamien 28156321Sdamien#include <sys/param.h> 29156321Sdamien#include <sys/sysctl.h> 30156321Sdamien#include <sys/sockio.h> 31156321Sdamien#include <sys/mbuf.h> 32156321Sdamien#include <sys/kernel.h> 33156321Sdamien#include <sys/socket.h> 34156321Sdamien#include <sys/systm.h> 35156321Sdamien#include <sys/malloc.h> 36164982Skevlo#include <sys/lock.h> 37164982Skevlo#include <sys/mutex.h> 38156321Sdamien#include <sys/module.h> 39156321Sdamien#include <sys/bus.h> 40156321Sdamien#include <sys/endian.h> 41178354Ssam#include <sys/firmware.h> 42156321Sdamien 43156321Sdamien#include <machine/bus.h> 44156321Sdamien#include <machine/resource.h> 45156321Sdamien#include <sys/rman.h> 46156321Sdamien 47156321Sdamien#include <net/bpf.h> 48156321Sdamien#include <net/if.h> 49257176Sglebius#include <net/if_var.h> 50156321Sdamien#include <net/if_arp.h> 51156321Sdamien#include <net/ethernet.h> 52156321Sdamien#include <net/if_dl.h> 53156321Sdamien#include <net/if_media.h> 54156321Sdamien#include <net/if_types.h> 55156321Sdamien 56156321Sdamien#include <net80211/ieee80211_var.h> 57156321Sdamien#include <net80211/ieee80211_radiotap.h> 58170530Ssam#include <net80211/ieee80211_regdomain.h> 59206358Srpaulo#include <net80211/ieee80211_ratectl.h> 60156321Sdamien 61156321Sdamien#include <netinet/in.h> 62156321Sdamien#include <netinet/in_systm.h> 63156321Sdamien#include <netinet/in_var.h> 64156321Sdamien#include <netinet/ip.h> 65156321Sdamien#include <netinet/if_ether.h> 66156321Sdamien 67156327Ssilby#include <dev/ral/rt2661reg.h> 68156327Ssilby#include <dev/ral/rt2661var.h> 69156321Sdamien 70178354Ssam#define RAL_DEBUG 71156321Sdamien#ifdef RAL_DEBUG 72178354Ssam#define DPRINTF(sc, fmt, ...) do { \ 73178354Ssam if (sc->sc_debug > 0) \ 74178354Ssam printf(fmt, __VA_ARGS__); \ 75178354Ssam} while (0) 76178354Ssam#define DPRINTFN(sc, n, fmt, ...) do { \ 77178354Ssam if (sc->sc_debug >= (n)) \ 78178354Ssam printf(fmt, __VA_ARGS__); \ 79178354Ssam} while (0) 80156321Sdamien#else 81178354Ssam#define DPRINTF(sc, fmt, ...) 82178354Ssam#define DPRINTFN(sc, n, fmt, ...) 83156321Sdamien#endif 84156321Sdamien 85178354Ssamstatic struct ieee80211vap *rt2661_vap_create(struct ieee80211com *, 86228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, 87228621Sbschmidt int, const uint8_t [IEEE80211_ADDR_LEN], 88228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 89178354Ssamstatic void rt2661_vap_delete(struct ieee80211vap *); 90156321Sdamienstatic void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int, 91156321Sdamien int); 92156321Sdamienstatic int rt2661_alloc_tx_ring(struct rt2661_softc *, 93156321Sdamien struct rt2661_tx_ring *, int); 94156321Sdamienstatic void rt2661_reset_tx_ring(struct rt2661_softc *, 95156321Sdamien struct rt2661_tx_ring *); 96156321Sdamienstatic void rt2661_free_tx_ring(struct rt2661_softc *, 97156321Sdamien struct rt2661_tx_ring *); 98156321Sdamienstatic int rt2661_alloc_rx_ring(struct rt2661_softc *, 99156321Sdamien struct rt2661_rx_ring *, int); 100156321Sdamienstatic void rt2661_reset_rx_ring(struct rt2661_softc *, 101156321Sdamien struct rt2661_rx_ring *); 102156321Sdamienstatic void rt2661_free_rx_ring(struct rt2661_softc *, 103156321Sdamien struct rt2661_rx_ring *); 104178354Ssamstatic int rt2661_newstate(struct ieee80211vap *, 105156321Sdamien enum ieee80211_state, int); 106156321Sdamienstatic uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t); 107156321Sdamienstatic void rt2661_rx_intr(struct rt2661_softc *); 108156321Sdamienstatic void rt2661_tx_intr(struct rt2661_softc *); 109156321Sdamienstatic void rt2661_tx_dma_intr(struct rt2661_softc *, 110156321Sdamien struct rt2661_tx_ring *); 111156321Sdamienstatic void rt2661_mcu_beacon_expire(struct rt2661_softc *); 112156321Sdamienstatic void rt2661_mcu_wakeup(struct rt2661_softc *); 113156321Sdamienstatic void rt2661_mcu_cmd_intr(struct rt2661_softc *); 114170530Ssamstatic void rt2661_scan_start(struct ieee80211com *); 115170530Ssamstatic void rt2661_scan_end(struct ieee80211com *); 116300752Savosstatic void rt2661_getradiocaps(struct ieee80211com *, int, int *, 117300752Savos struct ieee80211_channel[]); 118170530Ssamstatic void rt2661_set_channel(struct ieee80211com *); 119156321Sdamienstatic void rt2661_setup_tx_desc(struct rt2661_softc *, 120156321Sdamien struct rt2661_tx_desc *, uint32_t, uint16_t, int, 121156321Sdamien int, const bus_dma_segment_t *, int, int); 122156321Sdamienstatic int rt2661_tx_data(struct rt2661_softc *, struct mbuf *, 123156321Sdamien struct ieee80211_node *, int); 124156321Sdamienstatic int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *, 125156321Sdamien struct ieee80211_node *); 126287197Sglebiusstatic int rt2661_transmit(struct ieee80211com *, struct mbuf *); 127287197Sglebiusstatic void rt2661_start(struct rt2661_softc *); 128178354Ssamstatic int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *, 129178354Ssam const struct ieee80211_bpf_params *); 130165352Sbmsstatic void rt2661_watchdog(void *); 131287197Sglebiusstatic void rt2661_parent(struct ieee80211com *); 132156321Sdamienstatic void rt2661_bbp_write(struct rt2661_softc *, uint8_t, 133156321Sdamien uint8_t); 134156321Sdamienstatic uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t); 135156321Sdamienstatic void rt2661_rf_write(struct rt2661_softc *, uint8_t, 136156321Sdamien uint32_t); 137156321Sdamienstatic int rt2661_tx_cmd(struct rt2661_softc *, uint8_t, 138156321Sdamien uint16_t); 139156321Sdamienstatic void rt2661_select_antenna(struct rt2661_softc *); 140156321Sdamienstatic void rt2661_enable_mrr(struct rt2661_softc *); 141156321Sdamienstatic void rt2661_set_txpreamble(struct rt2661_softc *); 142156321Sdamienstatic void rt2661_set_basicrates(struct rt2661_softc *, 143156321Sdamien const struct ieee80211_rateset *); 144156321Sdamienstatic void rt2661_select_band(struct rt2661_softc *, 145156321Sdamien struct ieee80211_channel *); 146156321Sdamienstatic void rt2661_set_chan(struct rt2661_softc *, 147156321Sdamien struct ieee80211_channel *); 148156321Sdamienstatic void rt2661_set_bssid(struct rt2661_softc *, 149156321Sdamien const uint8_t *); 150156321Sdamienstatic void rt2661_set_macaddr(struct rt2661_softc *, 151156321Sdamien const uint8_t *); 152283540Sglebiusstatic void rt2661_update_promisc(struct ieee80211com *); 153156321Sdamienstatic int rt2661_wme_update(struct ieee80211com *) __unused; 154283540Sglebiusstatic void rt2661_update_slot(struct ieee80211com *); 155156321Sdamienstatic const char *rt2661_get_rf(int); 156178354Ssamstatic void rt2661_read_eeprom(struct rt2661_softc *, 157190526Ssam uint8_t macaddr[IEEE80211_ADDR_LEN]); 158156321Sdamienstatic int rt2661_bbp_init(struct rt2661_softc *); 159178354Ssamstatic void rt2661_init_locked(struct rt2661_softc *); 160156321Sdamienstatic void rt2661_init(void *); 161178354Ssamstatic void rt2661_stop_locked(struct rt2661_softc *); 162156321Sdamienstatic void rt2661_stop(void *); 163178354Ssamstatic int rt2661_load_microcode(struct rt2661_softc *); 164156321Sdamien#ifdef notyet 165156321Sdamienstatic void rt2661_rx_tune(struct rt2661_softc *); 166156321Sdamienstatic void rt2661_radar_start(struct rt2661_softc *); 167156321Sdamienstatic int rt2661_radar_stop(struct rt2661_softc *); 168156321Sdamien#endif 169178354Ssamstatic int rt2661_prepare_beacon(struct rt2661_softc *, 170178354Ssam struct ieee80211vap *); 171156321Sdamienstatic void rt2661_enable_tsf_sync(struct rt2661_softc *); 172192468Ssamstatic void rt2661_enable_tsf(struct rt2661_softc *); 173156321Sdamienstatic int rt2661_get_rssi(struct rt2661_softc *, uint8_t); 174156321Sdamien 175156321Sdamienstatic const struct { 176156321Sdamien uint32_t reg; 177156321Sdamien uint32_t val; 178156321Sdamien} rt2661_def_mac[] = { 179156321Sdamien RT2661_DEF_MAC 180156321Sdamien}; 181156321Sdamien 182156321Sdamienstatic const struct { 183156321Sdamien uint8_t reg; 184156321Sdamien uint8_t val; 185156321Sdamien} rt2661_def_bbp[] = { 186156321Sdamien RT2661_DEF_BBP 187156321Sdamien}; 188156321Sdamien 189156321Sdamienstatic const struct rfprog { 190156321Sdamien uint8_t chan; 191156321Sdamien uint32_t r1, r2, r3, r4; 192156321Sdamien} rt2661_rf5225_1[] = { 193156321Sdamien RT2661_RF5225_1 194156321Sdamien}, rt2661_rf5225_2[] = { 195156321Sdamien RT2661_RF5225_2 196156321Sdamien}; 197156321Sdamien 198300752Savosstatic const uint8_t rt2661_chan_5ghz[] = 199300752Savos { 36, 40, 44, 48, 52, 56, 60, 64, 200300752Savos 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 201300752Savos 149, 153, 157, 161, 165 }; 202300752Savos 203156321Sdamienint 204156321Sdamienrt2661_attach(device_t dev, int id) 205156321Sdamien{ 206156321Sdamien struct rt2661_softc *sc = device_get_softc(dev); 207287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 208156321Sdamien uint32_t val; 209178354Ssam int error, ac, ntries; 210156321Sdamien 211178354Ssam sc->sc_id = id; 212156321Sdamien sc->sc_dev = dev; 213156321Sdamien 214156321Sdamien mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 215156321Sdamien MTX_DEF | MTX_RECURSE); 216156321Sdamien 217165352Sbms callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 218287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 219156321Sdamien 220156321Sdamien /* wait for NIC to initialize */ 221156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 222156321Sdamien if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0) 223156321Sdamien break; 224156321Sdamien DELAY(1000); 225156321Sdamien } 226156321Sdamien if (ntries == 1000) { 227156321Sdamien device_printf(sc->sc_dev, 228156321Sdamien "timeout waiting for NIC to initialize\n"); 229156321Sdamien error = EIO; 230156321Sdamien goto fail1; 231156321Sdamien } 232156321Sdamien 233156321Sdamien /* retrieve RF rev. no and various other things from EEPROM */ 234287197Sglebius rt2661_read_eeprom(sc, ic->ic_macaddr); 235156321Sdamien 236156321Sdamien device_printf(dev, "MAC/BBP RT%X, RF %s\n", val, 237156321Sdamien rt2661_get_rf(sc->rf_rev)); 238156321Sdamien 239156321Sdamien /* 240156321Sdamien * Allocate Tx and Rx rings. 241156321Sdamien */ 242156321Sdamien for (ac = 0; ac < 4; ac++) { 243156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->txq[ac], 244156321Sdamien RT2661_TX_RING_COUNT); 245156321Sdamien if (error != 0) { 246156321Sdamien device_printf(sc->sc_dev, 247156321Sdamien "could not allocate Tx ring %d\n", ac); 248156321Sdamien goto fail2; 249156321Sdamien } 250156321Sdamien } 251156321Sdamien 252156321Sdamien error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); 253156321Sdamien if (error != 0) { 254156321Sdamien device_printf(sc->sc_dev, "could not allocate Mgt ring\n"); 255156321Sdamien goto fail2; 256156321Sdamien } 257156321Sdamien 258156321Sdamien error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); 259156321Sdamien if (error != 0) { 260156321Sdamien device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 261156321Sdamien goto fail3; 262156321Sdamien } 263156321Sdamien 264283537Sglebius ic->ic_softc = sc; 265283527Sglebius ic->ic_name = device_get_nameunit(dev); 266178354Ssam ic->ic_opmode = IEEE80211_M_STA; 267156321Sdamien ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 268156321Sdamien 269156321Sdamien /* set device capabilities */ 270156321Sdamien ic->ic_caps = 271178957Ssam IEEE80211_C_STA /* station mode */ 272178957Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 273178354Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 274178354Ssam | IEEE80211_C_MONITOR /* monitor mode */ 275178354Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 276178354Ssam | IEEE80211_C_WDS /* 4-address traffic works */ 277195618Srpaulo | IEEE80211_C_MBSS /* mesh point link mode */ 278178354Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 279178354Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 280178354Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 281178354Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 282156407Sdamien#ifdef notyet 283178354Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 284178354Ssam | IEEE80211_C_WME /* 802.11e */ 285156407Sdamien#endif 286178354Ssam ; 287156321Sdamien 288300752Savos rt2661_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 289300752Savos ic->ic_channels); 290156321Sdamien 291287197Sglebius ieee80211_ifattach(ic); 292178354Ssam#if 0 293178354Ssam ic->ic_wme.wme_update = rt2661_wme_update; 294178354Ssam#endif 295170530Ssam ic->ic_scan_start = rt2661_scan_start; 296170530Ssam ic->ic_scan_end = rt2661_scan_end; 297300759Savos ic->ic_getradiocaps = rt2661_getradiocaps; 298170530Ssam ic->ic_set_channel = rt2661_set_channel; 299156321Sdamien ic->ic_updateslot = rt2661_update_slot; 300178354Ssam ic->ic_update_promisc = rt2661_update_promisc; 301178354Ssam ic->ic_raw_xmit = rt2661_raw_xmit; 302287197Sglebius ic->ic_transmit = rt2661_transmit; 303287197Sglebius ic->ic_parent = rt2661_parent; 304178354Ssam ic->ic_vap_create = rt2661_vap_create; 305178354Ssam ic->ic_vap_delete = rt2661_vap_delete; 306156321Sdamien 307192468Ssam ieee80211_radiotap_attach(ic, 308192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 309192468Ssam RT2661_TX_RADIOTAP_PRESENT, 310192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 311192468Ssam RT2661_RX_RADIOTAP_PRESENT); 312178354Ssam 313178354Ssam#ifdef RAL_DEBUG 314156321Sdamien SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 315178354Ssam SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 316178354Ssam "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 317178354Ssam#endif 318156321Sdamien if (bootverbose) 319156321Sdamien ieee80211_announce(ic); 320156321Sdamien 321156321Sdamien return 0; 322156321Sdamien 323156321Sdamienfail3: rt2661_free_tx_ring(sc, &sc->mgtq); 324156321Sdamienfail2: while (--ac >= 0) 325156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[ac]); 326156321Sdamienfail1: mtx_destroy(&sc->sc_mtx); 327156321Sdamien return error; 328156321Sdamien} 329156321Sdamien 330156321Sdamienint 331156321Sdamienrt2661_detach(void *xsc) 332156321Sdamien{ 333156321Sdamien struct rt2661_softc *sc = xsc; 334287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 335170530Ssam 336178038Ssam RAL_LOCK(sc); 337178038Ssam rt2661_stop_locked(sc); 338178038Ssam RAL_UNLOCK(sc); 339156321Sdamien 340156321Sdamien ieee80211_ifdetach(ic); 341287197Sglebius mbufq_drain(&sc->sc_snd); 342156321Sdamien 343156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[0]); 344156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[1]); 345156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[2]); 346156321Sdamien rt2661_free_tx_ring(sc, &sc->txq[3]); 347156321Sdamien rt2661_free_tx_ring(sc, &sc->mgtq); 348156321Sdamien rt2661_free_rx_ring(sc, &sc->rxq); 349156321Sdamien 350156321Sdamien mtx_destroy(&sc->sc_mtx); 351156321Sdamien 352156321Sdamien return 0; 353156321Sdamien} 354156321Sdamien 355178354Ssamstatic struct ieee80211vap * 356228621Sbschmidtrt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 357228621Sbschmidt enum ieee80211_opmode opmode, int flags, 358228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 359228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 360178354Ssam{ 361287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 362178354Ssam struct rt2661_vap *rvp; 363178354Ssam struct ieee80211vap *vap; 364178354Ssam 365178354Ssam switch (opmode) { 366178354Ssam case IEEE80211_M_STA: 367178354Ssam case IEEE80211_M_IBSS: 368178354Ssam case IEEE80211_M_AHDEMO: 369178354Ssam case IEEE80211_M_MONITOR: 370178354Ssam case IEEE80211_M_HOSTAP: 371195618Srpaulo case IEEE80211_M_MBSS: 372195618Srpaulo /* XXXRP: TBD */ 373178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 374287197Sglebius device_printf(sc->sc_dev, "only 1 vap supported\n"); 375178354Ssam return NULL; 376178354Ssam } 377178354Ssam if (opmode == IEEE80211_M_STA) 378178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 379178354Ssam break; 380178354Ssam case IEEE80211_M_WDS: 381178354Ssam if (TAILQ_EMPTY(&ic->ic_vaps) || 382178354Ssam ic->ic_opmode != IEEE80211_M_HOSTAP) { 383287197Sglebius device_printf(sc->sc_dev, 384287197Sglebius "wds only supported in ap mode\n"); 385178354Ssam return NULL; 386178354Ssam } 387178354Ssam /* 388178354Ssam * Silently remove any request for a unique 389178354Ssam * bssid; WDS vap's always share the local 390178354Ssam * mac address. 391178354Ssam */ 392178354Ssam flags &= ~IEEE80211_CLONE_BSSID; 393178354Ssam break; 394178354Ssam default: 395287197Sglebius device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 396178354Ssam return NULL; 397178354Ssam } 398287197Sglebius rvp = malloc(sizeof(struct rt2661_vap), M_80211_VAP, M_WAITOK | M_ZERO); 399178354Ssam vap = &rvp->ral_vap; 400287197Sglebius ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 401178354Ssam 402178354Ssam /* override state transition machine */ 403178354Ssam rvp->ral_newstate = vap->iv_newstate; 404178354Ssam vap->iv_newstate = rt2661_newstate; 405178354Ssam#if 0 406178354Ssam vap->iv_update_beacon = rt2661_beacon_update; 407178354Ssam#endif 408178354Ssam 409206358Srpaulo ieee80211_ratectl_init(vap); 410178354Ssam /* complete setup */ 411287197Sglebius ieee80211_vap_attach(vap, ieee80211_media_change, 412287197Sglebius ieee80211_media_status, mac); 413178354Ssam if (TAILQ_FIRST(&ic->ic_vaps) == vap) 414178354Ssam ic->ic_opmode = opmode; 415178354Ssam return vap; 416178354Ssam} 417178354Ssam 418178354Ssamstatic void 419178354Ssamrt2661_vap_delete(struct ieee80211vap *vap) 420178354Ssam{ 421178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 422178354Ssam 423206358Srpaulo ieee80211_ratectl_deinit(vap); 424178354Ssam ieee80211_vap_detach(vap); 425178354Ssam free(rvp, M_80211_VAP); 426178354Ssam} 427178354Ssam 428156321Sdamienvoid 429156321Sdamienrt2661_shutdown(void *xsc) 430156321Sdamien{ 431156321Sdamien struct rt2661_softc *sc = xsc; 432156321Sdamien 433156321Sdamien rt2661_stop(sc); 434156321Sdamien} 435156321Sdamien 436156321Sdamienvoid 437156321Sdamienrt2661_suspend(void *xsc) 438156321Sdamien{ 439156321Sdamien struct rt2661_softc *sc = xsc; 440156321Sdamien 441156321Sdamien rt2661_stop(sc); 442156321Sdamien} 443156321Sdamien 444156321Sdamienvoid 445156321Sdamienrt2661_resume(void *xsc) 446156321Sdamien{ 447156321Sdamien struct rt2661_softc *sc = xsc; 448156321Sdamien 449287197Sglebius if (sc->sc_ic.ic_nrunning > 0) 450178354Ssam rt2661_init(sc); 451156321Sdamien} 452156321Sdamien 453156321Sdamienstatic void 454156321Sdamienrt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 455156321Sdamien{ 456156321Sdamien if (error != 0) 457156321Sdamien return; 458156321Sdamien 459156321Sdamien KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 460156321Sdamien 461156321Sdamien *(bus_addr_t *)arg = segs[0].ds_addr; 462156321Sdamien} 463156321Sdamien 464156321Sdamienstatic int 465156321Sdamienrt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring, 466156321Sdamien int count) 467156321Sdamien{ 468156321Sdamien int i, error; 469156321Sdamien 470156321Sdamien ring->count = count; 471156321Sdamien ring->queued = 0; 472156321Sdamien ring->cur = ring->next = ring->stat = 0; 473156321Sdamien 474171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 475171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 476171535Skevlo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE, 477171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 478156321Sdamien if (error != 0) { 479156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 480156321Sdamien goto fail; 481156321Sdamien } 482156321Sdamien 483156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 484156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 485156321Sdamien if (error != 0) { 486156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 487156321Sdamien goto fail; 488156321Sdamien } 489156321Sdamien 490156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 491156321Sdamien count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 492156321Sdamien 0); 493156321Sdamien if (error != 0) { 494156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 495156321Sdamien goto fail; 496156321Sdamien } 497156321Sdamien 498156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF, 499156321Sdamien M_NOWAIT | M_ZERO); 500156321Sdamien if (ring->data == NULL) { 501156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 502156321Sdamien error = ENOMEM; 503156321Sdamien goto fail; 504156321Sdamien } 505156321Sdamien 506171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 507171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 508171535Skevlo RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 509156321Sdamien if (error != 0) { 510156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 511156321Sdamien goto fail; 512156321Sdamien } 513156321Sdamien 514156321Sdamien for (i = 0; i < count; i++) { 515156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, 516156321Sdamien &ring->data[i].map); 517156321Sdamien if (error != 0) { 518156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 519156321Sdamien goto fail; 520156321Sdamien } 521156321Sdamien } 522156321Sdamien 523156321Sdamien return 0; 524156321Sdamien 525156321Sdamienfail: rt2661_free_tx_ring(sc, ring); 526156321Sdamien return error; 527156321Sdamien} 528156321Sdamien 529156321Sdamienstatic void 530156321Sdamienrt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 531156321Sdamien{ 532156321Sdamien struct rt2661_tx_desc *desc; 533156321Sdamien struct rt2661_tx_data *data; 534156321Sdamien int i; 535156321Sdamien 536156321Sdamien for (i = 0; i < ring->count; i++) { 537156321Sdamien desc = &ring->desc[i]; 538156321Sdamien data = &ring->data[i]; 539156321Sdamien 540156321Sdamien if (data->m != NULL) { 541156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 542156321Sdamien BUS_DMASYNC_POSTWRITE); 543156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 544156321Sdamien m_freem(data->m); 545156321Sdamien data->m = NULL; 546156321Sdamien } 547156321Sdamien 548156321Sdamien if (data->ni != NULL) { 549156321Sdamien ieee80211_free_node(data->ni); 550156321Sdamien data->ni = NULL; 551156321Sdamien } 552156321Sdamien 553156321Sdamien desc->flags = 0; 554156321Sdamien } 555156321Sdamien 556156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 557156321Sdamien 558156321Sdamien ring->queued = 0; 559156321Sdamien ring->cur = ring->next = ring->stat = 0; 560156321Sdamien} 561156321Sdamien 562156321Sdamienstatic void 563156321Sdamienrt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) 564156321Sdamien{ 565156321Sdamien struct rt2661_tx_data *data; 566156321Sdamien int i; 567156321Sdamien 568156321Sdamien if (ring->desc != NULL) { 569156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 570156321Sdamien BUS_DMASYNC_POSTWRITE); 571156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 572156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 573156321Sdamien } 574156321Sdamien 575156321Sdamien if (ring->desc_dmat != NULL) 576156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 577156321Sdamien 578156321Sdamien if (ring->data != NULL) { 579156321Sdamien for (i = 0; i < ring->count; i++) { 580156321Sdamien data = &ring->data[i]; 581156321Sdamien 582156321Sdamien if (data->m != NULL) { 583156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 584156321Sdamien BUS_DMASYNC_POSTWRITE); 585156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 586156321Sdamien m_freem(data->m); 587156321Sdamien } 588156321Sdamien 589156321Sdamien if (data->ni != NULL) 590156321Sdamien ieee80211_free_node(data->ni); 591156321Sdamien 592156321Sdamien if (data->map != NULL) 593156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 594156321Sdamien } 595156321Sdamien 596156321Sdamien free(ring->data, M_DEVBUF); 597156321Sdamien } 598156321Sdamien 599156321Sdamien if (ring->data_dmat != NULL) 600156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 601156321Sdamien} 602156321Sdamien 603156321Sdamienstatic int 604156321Sdamienrt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring, 605156321Sdamien int count) 606156321Sdamien{ 607156321Sdamien struct rt2661_rx_desc *desc; 608156321Sdamien struct rt2661_rx_data *data; 609156321Sdamien bus_addr_t physaddr; 610156321Sdamien int i, error; 611156321Sdamien 612156321Sdamien ring->count = count; 613156321Sdamien ring->cur = ring->next = 0; 614156321Sdamien 615171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 616171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 617171535Skevlo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE, 618171535Skevlo 0, NULL, NULL, &ring->desc_dmat); 619156321Sdamien if (error != 0) { 620156321Sdamien device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 621156321Sdamien goto fail; 622156321Sdamien } 623156321Sdamien 624156321Sdamien error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 625156321Sdamien BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 626156321Sdamien if (error != 0) { 627156321Sdamien device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 628156321Sdamien goto fail; 629156321Sdamien } 630156321Sdamien 631156321Sdamien error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 632156321Sdamien count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr, 633156321Sdamien 0); 634156321Sdamien if (error != 0) { 635156321Sdamien device_printf(sc->sc_dev, "could not load desc DMA map\n"); 636156321Sdamien goto fail; 637156321Sdamien } 638156321Sdamien 639156321Sdamien ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF, 640156321Sdamien M_NOWAIT | M_ZERO); 641156321Sdamien if (ring->data == NULL) { 642156321Sdamien device_printf(sc->sc_dev, "could not allocate soft data\n"); 643156321Sdamien error = ENOMEM; 644156321Sdamien goto fail; 645156321Sdamien } 646156321Sdamien 647156321Sdamien /* 648156321Sdamien * Pre-allocate Rx buffers and populate Rx ring. 649156321Sdamien */ 650171535Skevlo error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 651171535Skevlo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 652171535Skevlo 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 653156321Sdamien if (error != 0) { 654156321Sdamien device_printf(sc->sc_dev, "could not create data DMA tag\n"); 655156321Sdamien goto fail; 656156321Sdamien } 657156321Sdamien 658156321Sdamien for (i = 0; i < count; i++) { 659156321Sdamien desc = &sc->rxq.desc[i]; 660156321Sdamien data = &sc->rxq.data[i]; 661156321Sdamien 662156321Sdamien error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 663156321Sdamien if (error != 0) { 664156321Sdamien device_printf(sc->sc_dev, "could not create DMA map\n"); 665156321Sdamien goto fail; 666156321Sdamien } 667156321Sdamien 668243857Sglebius data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 669156321Sdamien if (data->m == NULL) { 670156321Sdamien device_printf(sc->sc_dev, 671156321Sdamien "could not allocate rx mbuf\n"); 672156321Sdamien error = ENOMEM; 673156321Sdamien goto fail; 674156321Sdamien } 675156321Sdamien 676156321Sdamien error = bus_dmamap_load(ring->data_dmat, data->map, 677156321Sdamien mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr, 678156321Sdamien &physaddr, 0); 679156321Sdamien if (error != 0) { 680156321Sdamien device_printf(sc->sc_dev, 681156321Sdamien "could not load rx buf DMA map"); 682156321Sdamien goto fail; 683156321Sdamien } 684156321Sdamien 685156321Sdamien desc->flags = htole32(RT2661_RX_BUSY); 686156321Sdamien desc->physaddr = htole32(physaddr); 687156321Sdamien } 688156321Sdamien 689156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 690156321Sdamien 691156321Sdamien return 0; 692156321Sdamien 693156321Sdamienfail: rt2661_free_rx_ring(sc, ring); 694156321Sdamien return error; 695156321Sdamien} 696156321Sdamien 697156321Sdamienstatic void 698156321Sdamienrt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 699156321Sdamien{ 700156321Sdamien int i; 701156321Sdamien 702156321Sdamien for (i = 0; i < ring->count; i++) 703156321Sdamien ring->desc[i].flags = htole32(RT2661_RX_BUSY); 704156321Sdamien 705156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 706156321Sdamien 707156321Sdamien ring->cur = ring->next = 0; 708156321Sdamien} 709156321Sdamien 710156321Sdamienstatic void 711156321Sdamienrt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) 712156321Sdamien{ 713156321Sdamien struct rt2661_rx_data *data; 714156321Sdamien int i; 715156321Sdamien 716156321Sdamien if (ring->desc != NULL) { 717156321Sdamien bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 718156321Sdamien BUS_DMASYNC_POSTWRITE); 719156321Sdamien bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 720156321Sdamien bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 721156321Sdamien } 722156321Sdamien 723156321Sdamien if (ring->desc_dmat != NULL) 724156321Sdamien bus_dma_tag_destroy(ring->desc_dmat); 725156321Sdamien 726156321Sdamien if (ring->data != NULL) { 727156321Sdamien for (i = 0; i < ring->count; i++) { 728156321Sdamien data = &ring->data[i]; 729156321Sdamien 730156321Sdamien if (data->m != NULL) { 731156321Sdamien bus_dmamap_sync(ring->data_dmat, data->map, 732156321Sdamien BUS_DMASYNC_POSTREAD); 733156321Sdamien bus_dmamap_unload(ring->data_dmat, data->map); 734156321Sdamien m_freem(data->m); 735156321Sdamien } 736156321Sdamien 737156321Sdamien if (data->map != NULL) 738156321Sdamien bus_dmamap_destroy(ring->data_dmat, data->map); 739156321Sdamien } 740156321Sdamien 741156321Sdamien free(ring->data, M_DEVBUF); 742156321Sdamien } 743156321Sdamien 744156321Sdamien if (ring->data_dmat != NULL) 745156321Sdamien bus_dma_tag_destroy(ring->data_dmat); 746156321Sdamien} 747156321Sdamien 748156321Sdamienstatic int 749178354Ssamrt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 750156321Sdamien{ 751178354Ssam struct rt2661_vap *rvp = RT2661_VAP(vap); 752178354Ssam struct ieee80211com *ic = vap->iv_ic; 753287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 754178354Ssam int error; 755156321Sdamien 756178354Ssam if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 757178354Ssam uint32_t tmp; 758156321Sdamien 759178354Ssam /* abort TSF synchronization */ 760178354Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 761178354Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); 762178354Ssam } 763156321Sdamien 764178354Ssam error = rvp->ral_newstate(vap, nstate, arg); 765156321Sdamien 766178354Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 767178354Ssam struct ieee80211_node *ni = vap->iv_bss; 768178354Ssam 769178354Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) { 770156321Sdamien rt2661_enable_mrr(sc); 771156321Sdamien rt2661_set_txpreamble(sc); 772156321Sdamien rt2661_set_basicrates(sc, &ni->ni_rates); 773156321Sdamien rt2661_set_bssid(sc, ni->ni_bssid); 774156321Sdamien } 775156321Sdamien 776178354Ssam if (vap->iv_opmode == IEEE80211_M_HOSTAP || 777195618Srpaulo vap->iv_opmode == IEEE80211_M_IBSS || 778195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) { 779178354Ssam error = rt2661_prepare_beacon(sc, vap); 780178354Ssam if (error != 0) 781178354Ssam return error; 782156321Sdamien } 783184345Ssam if (vap->iv_opmode != IEEE80211_M_MONITOR) 784156321Sdamien rt2661_enable_tsf_sync(sc); 785192468Ssam else 786192468Ssam rt2661_enable_tsf(sc); 787178354Ssam } 788178354Ssam return error; 789156321Sdamien} 790156321Sdamien 791156321Sdamien/* 792156321Sdamien * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 793156321Sdamien * 93C66). 794156321Sdamien */ 795156321Sdamienstatic uint16_t 796156321Sdamienrt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) 797156321Sdamien{ 798156321Sdamien uint32_t tmp; 799156321Sdamien uint16_t val; 800156321Sdamien int n; 801156321Sdamien 802156321Sdamien /* clock C once before the first command */ 803156321Sdamien RT2661_EEPROM_CTL(sc, 0); 804156321Sdamien 805156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 806156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 807156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 808156321Sdamien 809156321Sdamien /* write start bit (1) */ 810156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 811156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 812156321Sdamien 813156321Sdamien /* write READ opcode (10) */ 814156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); 815156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); 816156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 817156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 818156321Sdamien 819156321Sdamien /* write address (A5-A0 or A7-A0) */ 820156321Sdamien n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; 821156321Sdamien for (; n >= 0; n--) { 822156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 823156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D)); 824156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | 825156321Sdamien (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C); 826156321Sdamien } 827156321Sdamien 828156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 829156321Sdamien 830156321Sdamien /* read data Q15-Q0 */ 831156321Sdamien val = 0; 832156321Sdamien for (n = 15; n >= 0; n--) { 833156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); 834156321Sdamien tmp = RAL_READ(sc, RT2661_E2PROM_CSR); 835156321Sdamien val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n; 836156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 837156321Sdamien } 838156321Sdamien 839156321Sdamien RT2661_EEPROM_CTL(sc, 0); 840156321Sdamien 841156321Sdamien /* clear Chip Select and clock C */ 842156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_S); 843156321Sdamien RT2661_EEPROM_CTL(sc, 0); 844156321Sdamien RT2661_EEPROM_CTL(sc, RT2661_C); 845156321Sdamien 846156321Sdamien return val; 847156321Sdamien} 848156321Sdamien 849156321Sdamienstatic void 850156321Sdamienrt2661_tx_intr(struct rt2661_softc *sc) 851156321Sdamien{ 852156321Sdamien struct rt2661_tx_ring *txq; 853156321Sdamien struct rt2661_tx_data *data; 854156321Sdamien uint32_t val; 855287197Sglebius int error, qid, retrycnt; 856206358Srpaulo struct ieee80211vap *vap; 857156321Sdamien 858156321Sdamien for (;;) { 859170530Ssam struct ieee80211_node *ni; 860170530Ssam struct mbuf *m; 861170530Ssam 862156321Sdamien val = RAL_READ(sc, RT2661_STA_CSR4); 863156321Sdamien if (!(val & RT2661_TX_STAT_VALID)) 864156321Sdamien break; 865156321Sdamien 866156321Sdamien /* retrieve the queue in which this frame was sent */ 867156321Sdamien qid = RT2661_TX_QID(val); 868156321Sdamien txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; 869156321Sdamien 870156321Sdamien /* retrieve rate control algorithm context */ 871156321Sdamien data = &txq->data[txq->stat]; 872170530Ssam m = data->m; 873170530Ssam data->m = NULL; 874170530Ssam ni = data->ni; 875170530Ssam data->ni = NULL; 876156321Sdamien 877159301Sfjoe /* if no frame has been sent, ignore */ 878170530Ssam if (ni == NULL) 879159301Sfjoe continue; 880206371Srpaulo else 881206371Srpaulo vap = ni->ni_vap; 882159301Sfjoe 883156321Sdamien switch (RT2661_TX_RESULT(val)) { 884156321Sdamien case RT2661_TX_SUCCESS: 885156321Sdamien retrycnt = RT2661_TX_RETRYCNT(val); 886156321Sdamien 887178354Ssam DPRINTFN(sc, 10, "data frame sent successfully after " 888178354Ssam "%d retries\n", retrycnt); 889178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 890206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 891206358Srpaulo IEEE80211_RATECTL_TX_SUCCESS, 892206358Srpaulo &retrycnt, NULL); 893287197Sglebius error = 0; 894156321Sdamien break; 895156321Sdamien 896156321Sdamien case RT2661_TX_RETRY_FAIL: 897178354Ssam retrycnt = RT2661_TX_RETRYCNT(val); 898178354Ssam 899178354Ssam DPRINTFN(sc, 9, "%s\n", 900178354Ssam "sending data frame failed (too much retries)"); 901178354Ssam if (data->rix != IEEE80211_FIXED_RATE_NONE) 902206358Srpaulo ieee80211_ratectl_tx_complete(vap, ni, 903206358Srpaulo IEEE80211_RATECTL_TX_FAILURE, 904206358Srpaulo &retrycnt, NULL); 905287197Sglebius error = 1; 906156321Sdamien break; 907156321Sdamien 908156321Sdamien default: 909156321Sdamien /* other failure */ 910156321Sdamien device_printf(sc->sc_dev, 911156321Sdamien "sending data frame failed 0x%08x\n", val); 912287197Sglebius error = 1; 913156321Sdamien } 914156321Sdamien 915178354Ssam DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat); 916156321Sdamien 917156321Sdamien txq->queued--; 918156321Sdamien if (++txq->stat >= txq->count) /* faster than % count */ 919156321Sdamien txq->stat = 0; 920170530Ssam 921287197Sglebius ieee80211_tx_complete(ni, m, error); 922156321Sdamien } 923156321Sdamien 924156321Sdamien sc->sc_tx_timer = 0; 925178354Ssam 926287197Sglebius rt2661_start(sc); 927156321Sdamien} 928156321Sdamien 929156321Sdamienstatic void 930156321Sdamienrt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq) 931156321Sdamien{ 932156321Sdamien struct rt2661_tx_desc *desc; 933156321Sdamien struct rt2661_tx_data *data; 934156321Sdamien 935156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD); 936156321Sdamien 937156321Sdamien for (;;) { 938156321Sdamien desc = &txq->desc[txq->next]; 939156321Sdamien data = &txq->data[txq->next]; 940156321Sdamien 941156321Sdamien if ((le32toh(desc->flags) & RT2661_TX_BUSY) || 942156321Sdamien !(le32toh(desc->flags) & RT2661_TX_VALID)) 943156321Sdamien break; 944156321Sdamien 945156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, 946156321Sdamien BUS_DMASYNC_POSTWRITE); 947156321Sdamien bus_dmamap_unload(txq->data_dmat, data->map); 948156321Sdamien 949156321Sdamien /* descriptor is no longer valid */ 950156321Sdamien desc->flags &= ~htole32(RT2661_TX_VALID); 951156321Sdamien 952178354Ssam DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next); 953156321Sdamien 954156321Sdamien if (++txq->next >= txq->count) /* faster than % count */ 955156321Sdamien txq->next = 0; 956156321Sdamien } 957156321Sdamien 958156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 959156321Sdamien} 960156321Sdamien 961156321Sdamienstatic void 962156321Sdamienrt2661_rx_intr(struct rt2661_softc *sc) 963156321Sdamien{ 964287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 965156321Sdamien struct rt2661_rx_desc *desc; 966156321Sdamien struct rt2661_rx_data *data; 967156321Sdamien bus_addr_t physaddr; 968156321Sdamien struct ieee80211_frame *wh; 969156321Sdamien struct ieee80211_node *ni; 970156321Sdamien struct mbuf *mnew, *m; 971156321Sdamien int error; 972156321Sdamien 973156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 974156321Sdamien BUS_DMASYNC_POSTREAD); 975156321Sdamien 976156321Sdamien for (;;) { 977192468Ssam int8_t rssi, nf; 978170530Ssam 979156321Sdamien desc = &sc->rxq.desc[sc->rxq.cur]; 980156321Sdamien data = &sc->rxq.data[sc->rxq.cur]; 981156321Sdamien 982156321Sdamien if (le32toh(desc->flags) & RT2661_RX_BUSY) 983156321Sdamien break; 984156321Sdamien 985156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) || 986156321Sdamien (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) { 987156321Sdamien /* 988156321Sdamien * This should not happen since we did not request 989156321Sdamien * to receive those frames when we filled TXRX_CSR0. 990156321Sdamien */ 991178354Ssam DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 992178354Ssam le32toh(desc->flags)); 993287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 994156321Sdamien goto skip; 995156321Sdamien } 996156321Sdamien 997156321Sdamien if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) { 998287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 999156321Sdamien goto skip; 1000156321Sdamien } 1001156321Sdamien 1002156321Sdamien /* 1003156321Sdamien * Try to allocate a new mbuf for this ring element and load it 1004156321Sdamien * before processing the current mbuf. If the ring element 1005156321Sdamien * cannot be loaded, drop the received packet and reuse the old 1006156321Sdamien * mbuf. In the unlikely case that the old mbuf can't be 1007156321Sdamien * reloaded either, explicitly panic. 1008156321Sdamien */ 1009243857Sglebius mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1010156321Sdamien if (mnew == NULL) { 1011287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1012156321Sdamien goto skip; 1013156321Sdamien } 1014156321Sdamien 1015156321Sdamien bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1016156321Sdamien BUS_DMASYNC_POSTREAD); 1017156321Sdamien bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1018156321Sdamien 1019156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1020156321Sdamien mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr, 1021156321Sdamien &physaddr, 0); 1022156321Sdamien if (error != 0) { 1023156321Sdamien m_freem(mnew); 1024156321Sdamien 1025156321Sdamien /* try to reload the old mbuf */ 1026156321Sdamien error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1027156321Sdamien mtod(data->m, void *), MCLBYTES, 1028156321Sdamien rt2661_dma_map_addr, &physaddr, 0); 1029156321Sdamien if (error != 0) { 1030156321Sdamien /* very unlikely that it will fail... */ 1031156321Sdamien panic("%s: could not load old rx mbuf", 1032156321Sdamien device_get_name(sc->sc_dev)); 1033156321Sdamien } 1034287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1035156321Sdamien goto skip; 1036156321Sdamien } 1037156321Sdamien 1038156321Sdamien /* 1039156321Sdamien * New mbuf successfully loaded, update Rx ring and continue 1040156321Sdamien * processing. 1041156321Sdamien */ 1042156321Sdamien m = data->m; 1043156321Sdamien data->m = mnew; 1044156321Sdamien desc->physaddr = htole32(physaddr); 1045156321Sdamien 1046156321Sdamien /* finalize mbuf */ 1047156321Sdamien m->m_pkthdr.len = m->m_len = 1048156321Sdamien (le32toh(desc->flags) >> 16) & 0xfff; 1049156321Sdamien 1050170530Ssam rssi = rt2661_get_rssi(sc, desc->rssi); 1051192468Ssam /* Error happened during RSSI conversion. */ 1052192468Ssam if (rssi < 0) 1053192468Ssam rssi = -30; /* XXX ignored by net80211 */ 1054192468Ssam nf = RT2661_NOISE_FLOOR; 1055170530Ssam 1056192468Ssam if (ieee80211_radiotap_active(ic)) { 1057156321Sdamien struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap; 1058156321Sdamien uint32_t tsf_lo, tsf_hi; 1059156321Sdamien 1060156321Sdamien /* get timestamp (low and high 32 bits) */ 1061156321Sdamien tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13); 1062156321Sdamien tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12); 1063156321Sdamien 1064156321Sdamien tap->wr_tsf = 1065156321Sdamien htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1066156321Sdamien tap->wr_flags = 0; 1067178354Ssam tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1068178958Ssam (desc->flags & htole32(RT2661_RX_OFDM)) ? 1069178958Ssam IEEE80211_T_OFDM : IEEE80211_T_CCK); 1070192468Ssam tap->wr_antsignal = nf + rssi; 1071192468Ssam tap->wr_antnoise = nf; 1072156321Sdamien } 1073170530Ssam sc->sc_flags |= RAL_INPUT_RUNNING; 1074170530Ssam RAL_UNLOCK(sc); 1075156321Sdamien wh = mtod(m, struct ieee80211_frame *); 1076178354Ssam 1077178354Ssam /* send the frame to the 802.11 layer */ 1078156321Sdamien ni = ieee80211_find_rxnode(ic, 1079156321Sdamien (struct ieee80211_frame_min *)wh); 1080178354Ssam if (ni != NULL) { 1081192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 1082178354Ssam ieee80211_free_node(ni); 1083178354Ssam } else 1084192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 1085170530Ssam 1086170530Ssam RAL_LOCK(sc); 1087170530Ssam sc->sc_flags &= ~RAL_INPUT_RUNNING; 1088156321Sdamien 1089156321Sdamienskip: desc->flags |= htole32(RT2661_RX_BUSY); 1090156321Sdamien 1091178354Ssam DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur); 1092156321Sdamien 1093156321Sdamien sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT; 1094156321Sdamien } 1095156321Sdamien 1096156321Sdamien bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1097156321Sdamien BUS_DMASYNC_PREWRITE); 1098156321Sdamien} 1099156321Sdamien 1100156321Sdamien/* ARGSUSED */ 1101156321Sdamienstatic void 1102156321Sdamienrt2661_mcu_beacon_expire(struct rt2661_softc *sc) 1103156321Sdamien{ 1104156321Sdamien /* do nothing */ 1105156321Sdamien} 1106156321Sdamien 1107156321Sdamienstatic void 1108156321Sdamienrt2661_mcu_wakeup(struct rt2661_softc *sc) 1109156321Sdamien{ 1110156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); 1111156321Sdamien 1112156321Sdamien RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); 1113156321Sdamien RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); 1114156321Sdamien RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); 1115156321Sdamien 1116156321Sdamien /* send wakeup command to MCU */ 1117156321Sdamien rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); 1118156321Sdamien} 1119156321Sdamien 1120156321Sdamienstatic void 1121156321Sdamienrt2661_mcu_cmd_intr(struct rt2661_softc *sc) 1122156321Sdamien{ 1123156321Sdamien RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR); 1124156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 1125156321Sdamien} 1126156321Sdamien 1127156321Sdamienvoid 1128156321Sdamienrt2661_intr(void *arg) 1129156321Sdamien{ 1130156321Sdamien struct rt2661_softc *sc = arg; 1131156321Sdamien uint32_t r1, r2; 1132156321Sdamien 1133156321Sdamien RAL_LOCK(sc); 1134156321Sdamien 1135156321Sdamien /* disable MAC and MCU interrupts */ 1136156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); 1137156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 1138156321Sdamien 1139156975Sdamien /* don't re-enable interrupts if we're shutting down */ 1140287197Sglebius if (!(sc->sc_flags & RAL_RUNNING)) { 1141156975Sdamien RAL_UNLOCK(sc); 1142156975Sdamien return; 1143156975Sdamien } 1144156975Sdamien 1145156321Sdamien r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR); 1146156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); 1147156321Sdamien 1148156321Sdamien r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR); 1149156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); 1150156321Sdamien 1151156321Sdamien if (r1 & RT2661_MGT_DONE) 1152156321Sdamien rt2661_tx_dma_intr(sc, &sc->mgtq); 1153156321Sdamien 1154156321Sdamien if (r1 & RT2661_RX_DONE) 1155156321Sdamien rt2661_rx_intr(sc); 1156156321Sdamien 1157156321Sdamien if (r1 & RT2661_TX0_DMA_DONE) 1158156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[0]); 1159156321Sdamien 1160156321Sdamien if (r1 & RT2661_TX1_DMA_DONE) 1161156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[1]); 1162156321Sdamien 1163156321Sdamien if (r1 & RT2661_TX2_DMA_DONE) 1164156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[2]); 1165156321Sdamien 1166156321Sdamien if (r1 & RT2661_TX3_DMA_DONE) 1167156321Sdamien rt2661_tx_dma_intr(sc, &sc->txq[3]); 1168156321Sdamien 1169156321Sdamien if (r1 & RT2661_TX_DONE) 1170156321Sdamien rt2661_tx_intr(sc); 1171156321Sdamien 1172156321Sdamien if (r2 & RT2661_MCU_CMD_DONE) 1173156321Sdamien rt2661_mcu_cmd_intr(sc); 1174156321Sdamien 1175156321Sdamien if (r2 & RT2661_MCU_BEACON_EXPIRE) 1176156321Sdamien rt2661_mcu_beacon_expire(sc); 1177156321Sdamien 1178156321Sdamien if (r2 & RT2661_MCU_WAKEUP) 1179156321Sdamien rt2661_mcu_wakeup(sc); 1180156321Sdamien 1181156321Sdamien /* re-enable MAC and MCU interrupts */ 1182156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 1183156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 1184156321Sdamien 1185156321Sdamien RAL_UNLOCK(sc); 1186156321Sdamien} 1187156321Sdamien 1188178958Ssamstatic uint8_t 1189178958Ssamrt2661_plcp_signal(int rate) 1190178958Ssam{ 1191178958Ssam switch (rate) { 1192178958Ssam /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1193178958Ssam case 12: return 0xb; 1194178958Ssam case 18: return 0xf; 1195178958Ssam case 24: return 0xa; 1196178958Ssam case 36: return 0xe; 1197178958Ssam case 48: return 0x9; 1198178958Ssam case 72: return 0xd; 1199178958Ssam case 96: return 0x8; 1200178958Ssam case 108: return 0xc; 1201178958Ssam 1202178958Ssam /* CCK rates (NB: not IEEE std, device-specific) */ 1203178958Ssam case 2: return 0x0; 1204178958Ssam case 4: return 0x1; 1205178958Ssam case 11: return 0x2; 1206178958Ssam case 22: return 0x3; 1207178958Ssam } 1208178958Ssam return 0xff; /* XXX unsupported/unknown rate */ 1209178958Ssam} 1210178958Ssam 1211156321Sdamienstatic void 1212156321Sdamienrt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, 1213156321Sdamien uint32_t flags, uint16_t xflags, int len, int rate, 1214156321Sdamien const bus_dma_segment_t *segs, int nsegs, int ac) 1215156321Sdamien{ 1216287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1217156321Sdamien uint16_t plcp_length; 1218156321Sdamien int i, remainder; 1219156321Sdamien 1220156321Sdamien desc->flags = htole32(flags); 1221156321Sdamien desc->flags |= htole32(len << 16); 1222156321Sdamien desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID); 1223156321Sdamien 1224156321Sdamien desc->xflags = htole16(xflags); 1225156321Sdamien desc->xflags |= htole16(nsegs << 13); 1226156321Sdamien 1227156321Sdamien desc->wme = htole16( 1228156321Sdamien RT2661_QID(ac) | 1229156321Sdamien RT2661_AIFSN(2) | 1230156321Sdamien RT2661_LOGCWMIN(4) | 1231156321Sdamien RT2661_LOGCWMAX(10)); 1232156321Sdamien 1233156321Sdamien /* 1234156321Sdamien * Remember in which queue this frame was sent. This field is driver 1235156321Sdamien * private data only. It will be made available by the NIC in STA_CSR4 1236156321Sdamien * on Tx interrupts. 1237156321Sdamien */ 1238156321Sdamien desc->qid = ac; 1239156321Sdamien 1240156321Sdamien /* setup PLCP fields */ 1241178958Ssam desc->plcp_signal = rt2661_plcp_signal(rate); 1242156321Sdamien desc->plcp_service = 4; 1243156321Sdamien 1244156321Sdamien len += IEEE80211_CRC_LEN; 1245190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1246156321Sdamien desc->flags |= htole32(RT2661_TX_OFDM); 1247156321Sdamien 1248156321Sdamien plcp_length = len & 0xfff; 1249156321Sdamien desc->plcp_length_hi = plcp_length >> 6; 1250156321Sdamien desc->plcp_length_lo = plcp_length & 0x3f; 1251156321Sdamien } else { 1252298646Spfg plcp_length = howmany(16 * len, rate); 1253156321Sdamien if (rate == 22) { 1254156321Sdamien remainder = (16 * len) % 22; 1255156321Sdamien if (remainder != 0 && remainder < 7) 1256156321Sdamien desc->plcp_service |= RT2661_PLCP_LENGEXT; 1257156321Sdamien } 1258156321Sdamien desc->plcp_length_hi = plcp_length >> 8; 1259156321Sdamien desc->plcp_length_lo = plcp_length & 0xff; 1260156321Sdamien 1261156321Sdamien if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1262156321Sdamien desc->plcp_signal |= 0x08; 1263156321Sdamien } 1264156321Sdamien 1265156321Sdamien /* RT2x61 supports scatter with up to 5 segments */ 1266156321Sdamien for (i = 0; i < nsegs; i++) { 1267156321Sdamien desc->addr[i] = htole32(segs[i].ds_addr); 1268156321Sdamien desc->len [i] = htole16(segs[i].ds_len); 1269156321Sdamien } 1270156321Sdamien} 1271156321Sdamien 1272156321Sdamienstatic int 1273156321Sdamienrt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0, 1274156321Sdamien struct ieee80211_node *ni) 1275156321Sdamien{ 1276178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1277178354Ssam struct ieee80211com *ic = ni->ni_ic; 1278156321Sdamien struct rt2661_tx_desc *desc; 1279156321Sdamien struct rt2661_tx_data *data; 1280156321Sdamien struct ieee80211_frame *wh; 1281173386Skevlo struct ieee80211_key *k; 1282156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1283156321Sdamien uint16_t dur; 1284156321Sdamien uint32_t flags = 0; /* XXX HWSEQ */ 1285156321Sdamien int nsegs, rate, error; 1286156321Sdamien 1287156321Sdamien desc = &sc->mgtq.desc[sc->mgtq.cur]; 1288156321Sdamien data = &sc->mgtq.data[sc->mgtq.cur]; 1289156321Sdamien 1290178354Ssam rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1291156321Sdamien 1292173386Skevlo wh = mtod(m0, struct ieee80211_frame *); 1293173386Skevlo 1294260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1295178354Ssam k = ieee80211_crypto_encap(ni, m0); 1296173386Skevlo if (k == NULL) { 1297173386Skevlo m_freem(m0); 1298173386Skevlo return ENOBUFS; 1299173386Skevlo } 1300173386Skevlo } 1301173386Skevlo 1302156321Sdamien error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0, 1303156321Sdamien segs, &nsegs, 0); 1304156321Sdamien if (error != 0) { 1305156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1306156321Sdamien error); 1307156321Sdamien m_freem(m0); 1308156321Sdamien return error; 1309156321Sdamien } 1310156321Sdamien 1311192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1312156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1313156321Sdamien 1314156321Sdamien tap->wt_flags = 0; 1315156321Sdamien tap->wt_rate = rate; 1316156321Sdamien 1317192468Ssam ieee80211_radiotap_tx(vap, m0); 1318156321Sdamien } 1319156321Sdamien 1320156321Sdamien data->m = m0; 1321156321Sdamien data->ni = ni; 1322178354Ssam /* management frames are not taken into account for amrr */ 1323178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1324156321Sdamien 1325156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1326156321Sdamien 1327156321Sdamien if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1328156321Sdamien flags |= RT2661_TX_NEED_ACK; 1329156321Sdamien 1330190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1331178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1332156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1333156321Sdamien 1334156321Sdamien /* tell hardware to add timestamp in probe responses */ 1335156321Sdamien if ((wh->i_fc[0] & 1336156321Sdamien (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1337156321Sdamien (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1338156321Sdamien flags |= RT2661_TX_TIMESTAMP; 1339156321Sdamien } 1340156321Sdamien 1341156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */, 1342156321Sdamien m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT); 1343156321Sdamien 1344156321Sdamien bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1345156321Sdamien bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map, 1346156321Sdamien BUS_DMASYNC_PREWRITE); 1347156321Sdamien 1348178354Ssam DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1349178354Ssam m0->m_pkthdr.len, sc->mgtq.cur, rate); 1350156321Sdamien 1351156321Sdamien /* kick mgt */ 1352156321Sdamien sc->mgtq.queued++; 1353156321Sdamien sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT; 1354156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); 1355156321Sdamien 1356156321Sdamien return 0; 1357156321Sdamien} 1358156321Sdamien 1359178354Ssamstatic int 1360178354Ssamrt2661_sendprot(struct rt2661_softc *sc, int ac, 1361178354Ssam const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1362156321Sdamien{ 1363178354Ssam struct ieee80211com *ic = ni->ni_ic; 1364178354Ssam struct rt2661_tx_ring *txq = &sc->txq[ac]; 1365178354Ssam const struct ieee80211_frame *wh; 1366178354Ssam struct rt2661_tx_desc *desc; 1367178354Ssam struct rt2661_tx_data *data; 1368178354Ssam struct mbuf *mprot; 1369178354Ssam int protrate, ackrate, pktlen, flags, isshort, error; 1370178354Ssam uint16_t dur; 1371178354Ssam bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1372178354Ssam int nsegs; 1373156321Sdamien 1374178354Ssam KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1375178354Ssam ("protection %d", prot)); 1376178354Ssam 1377178354Ssam wh = mtod(m, const struct ieee80211_frame *); 1378178354Ssam pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1379178354Ssam 1380190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1381190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1382178354Ssam 1383178354Ssam isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1384190532Ssam dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1385190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1386178354Ssam flags = RT2661_TX_MORE_FRAG; 1387178354Ssam if (prot == IEEE80211_PROT_RTSCTS) { 1388178354Ssam /* NB: CTS is the same size as an ACK */ 1389190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1390178354Ssam flags |= RT2661_TX_NEED_ACK; 1391178354Ssam mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1392178354Ssam } else { 1393178354Ssam mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1394156321Sdamien } 1395178354Ssam if (mprot == NULL) { 1396178354Ssam /* XXX stat + msg */ 1397178354Ssam return ENOBUFS; 1398178354Ssam } 1399156321Sdamien 1400178354Ssam data = &txq->data[txq->cur]; 1401178354Ssam desc = &txq->desc[txq->cur]; 1402156321Sdamien 1403178354Ssam error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs, 1404178354Ssam &nsegs, 0); 1405178354Ssam if (error != 0) { 1406178354Ssam device_printf(sc->sc_dev, 1407178354Ssam "could not map mbuf (error %d)\n", error); 1408178354Ssam m_freem(mprot); 1409178354Ssam return error; 1410178354Ssam } 1411156321Sdamien 1412178354Ssam data->m = mprot; 1413178354Ssam data->ni = ieee80211_ref_node(ni); 1414178354Ssam /* ctl frames are not taken into account for amrr */ 1415178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1416156321Sdamien 1417178354Ssam rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len, 1418178354Ssam protrate, segs, 1, ac); 1419178354Ssam 1420178354Ssam bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1421178354Ssam bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1422178354Ssam 1423178354Ssam txq->queued++; 1424178354Ssam txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1425178354Ssam 1426178354Ssam return 0; 1427156321Sdamien} 1428156321Sdamien 1429156321Sdamienstatic int 1430156321Sdamienrt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0, 1431156321Sdamien struct ieee80211_node *ni, int ac) 1432156321Sdamien{ 1433178354Ssam struct ieee80211vap *vap = ni->ni_vap; 1434287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1435156321Sdamien struct rt2661_tx_ring *txq = &sc->txq[ac]; 1436156321Sdamien struct rt2661_tx_desc *desc; 1437156321Sdamien struct rt2661_tx_data *data; 1438156321Sdamien struct ieee80211_frame *wh; 1439178354Ssam const struct ieee80211_txparam *tp; 1440156321Sdamien struct ieee80211_key *k; 1441156321Sdamien const struct chanAccParams *cap; 1442156321Sdamien struct mbuf *mnew; 1443156321Sdamien bus_dma_segment_t segs[RT2661_MAX_SCATTER]; 1444156321Sdamien uint16_t dur; 1445178354Ssam uint32_t flags; 1446156321Sdamien int error, nsegs, rate, noack = 0; 1447156321Sdamien 1448156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1449156321Sdamien 1450178354Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1451178354Ssam if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1452178354Ssam rate = tp->mcastrate; 1453178354Ssam } else if (m0->m_flags & M_EAPOL) { 1454178354Ssam rate = tp->mgmtrate; 1455178354Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1456178354Ssam rate = tp->ucastrate; 1457156321Sdamien } else { 1458206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 1459178354Ssam rate = ni->ni_txrate; 1460156321Sdamien } 1461156321Sdamien rate &= IEEE80211_RATE_VAL; 1462156321Sdamien 1463156321Sdamien if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) { 1464156321Sdamien cap = &ic->ic_wme.wme_chanParams; 1465156321Sdamien noack = cap->cap_wmeParams[ac].wmep_noackPolicy; 1466156321Sdamien } 1467156321Sdamien 1468260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1469178354Ssam k = ieee80211_crypto_encap(ni, m0); 1470156321Sdamien if (k == NULL) { 1471156321Sdamien m_freem(m0); 1472156321Sdamien return ENOBUFS; 1473156321Sdamien } 1474156321Sdamien 1475156321Sdamien /* packet header may have moved, reset our local pointer */ 1476156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1477156321Sdamien } 1478156321Sdamien 1479178354Ssam flags = 0; 1480178354Ssam if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1481178354Ssam int prot = IEEE80211_PROT_NONE; 1482178354Ssam if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1483178354Ssam prot = IEEE80211_PROT_RTSCTS; 1484178354Ssam else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1485190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1486178354Ssam prot = ic->ic_protmode; 1487178354Ssam if (prot != IEEE80211_PROT_NONE) { 1488178354Ssam error = rt2661_sendprot(sc, ac, m0, ni, prot, rate); 1489178354Ssam if (error) { 1490178354Ssam m_freem(m0); 1491178354Ssam return error; 1492178354Ssam } 1493178354Ssam flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS; 1494156321Sdamien } 1495156321Sdamien } 1496156321Sdamien 1497156321Sdamien data = &txq->data[txq->cur]; 1498156321Sdamien desc = &txq->desc[txq->cur]; 1499156321Sdamien 1500156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs, 1501156321Sdamien &nsegs, 0); 1502156321Sdamien if (error != 0 && error != EFBIG) { 1503156321Sdamien device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1504156321Sdamien error); 1505156321Sdamien m_freem(m0); 1506156321Sdamien return error; 1507156321Sdamien } 1508156321Sdamien if (error != 0) { 1509243857Sglebius mnew = m_defrag(m0, M_NOWAIT); 1510156321Sdamien if (mnew == NULL) { 1511156321Sdamien device_printf(sc->sc_dev, 1512156321Sdamien "could not defragment mbuf\n"); 1513156321Sdamien m_freem(m0); 1514156321Sdamien return ENOBUFS; 1515156321Sdamien } 1516156321Sdamien m0 = mnew; 1517156321Sdamien 1518156321Sdamien error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, 1519156321Sdamien segs, &nsegs, 0); 1520156321Sdamien if (error != 0) { 1521156321Sdamien device_printf(sc->sc_dev, 1522156321Sdamien "could not map mbuf (error %d)\n", error); 1523156321Sdamien m_freem(m0); 1524156321Sdamien return error; 1525156321Sdamien } 1526156321Sdamien 1527156321Sdamien /* packet header have moved, reset our local pointer */ 1528156321Sdamien wh = mtod(m0, struct ieee80211_frame *); 1529156321Sdamien } 1530156321Sdamien 1531192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1532156321Sdamien struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap; 1533156321Sdamien 1534156321Sdamien tap->wt_flags = 0; 1535156321Sdamien tap->wt_rate = rate; 1536156321Sdamien 1537192468Ssam ieee80211_radiotap_tx(vap, m0); 1538156321Sdamien } 1539156321Sdamien 1540156321Sdamien data->m = m0; 1541156321Sdamien data->ni = ni; 1542156321Sdamien 1543156321Sdamien /* remember link conditions for rate adaptation algorithm */ 1544178354Ssam if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1545178354Ssam data->rix = ni->ni_txrate; 1546178354Ssam /* XXX probably need last rssi value and not avg */ 1547178354Ssam data->rssi = ic->ic_node_getrssi(ni); 1548156321Sdamien } else 1549178354Ssam data->rix = IEEE80211_FIXED_RATE_NONE; 1550156321Sdamien 1551156321Sdamien if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1552156321Sdamien flags |= RT2661_TX_NEED_ACK; 1553156321Sdamien 1554190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, 1555178354Ssam rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1556156321Sdamien *(uint16_t *)wh->i_dur = htole16(dur); 1557156321Sdamien } 1558156321Sdamien 1559156321Sdamien rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs, 1560156321Sdamien nsegs, ac); 1561156321Sdamien 1562156321Sdamien bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1563156321Sdamien bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE); 1564156321Sdamien 1565178354Ssam DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1566178354Ssam m0->m_pkthdr.len, txq->cur, rate); 1567156321Sdamien 1568156321Sdamien /* kick Tx */ 1569156321Sdamien txq->queued++; 1570156321Sdamien txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT; 1571156321Sdamien RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac); 1572156321Sdamien 1573156321Sdamien return 0; 1574156321Sdamien} 1575156321Sdamien 1576287197Sglebiusstatic int 1577287197Sglebiusrt2661_transmit(struct ieee80211com *ic, struct mbuf *m) 1578287197Sglebius{ 1579287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1580287197Sglebius int error; 1581287197Sglebius 1582287197Sglebius RAL_LOCK(sc); 1583287197Sglebius if ((sc->sc_flags & RAL_RUNNING) == 0) { 1584287197Sglebius RAL_UNLOCK(sc); 1585287197Sglebius return (ENXIO); 1586287197Sglebius } 1587287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 1588287197Sglebius if (error) { 1589287197Sglebius RAL_UNLOCK(sc); 1590287197Sglebius return (error); 1591287197Sglebius } 1592287197Sglebius rt2661_start(sc); 1593287197Sglebius RAL_UNLOCK(sc); 1594287197Sglebius 1595287197Sglebius return (0); 1596287197Sglebius} 1597287197Sglebius 1598156321Sdamienstatic void 1599287197Sglebiusrt2661_start(struct rt2661_softc *sc) 1600156321Sdamien{ 1601178354Ssam struct mbuf *m; 1602156321Sdamien struct ieee80211_node *ni; 1603156321Sdamien int ac; 1604156321Sdamien 1605178354Ssam RAL_LOCK_ASSERT(sc); 1606156321Sdamien 1607156975Sdamien /* prevent management frames from being sent if we're not ready */ 1608287197Sglebius if (!(sc->sc_flags & RAL_RUNNING) || sc->sc_invalid) 1609156975Sdamien return; 1610156975Sdamien 1611287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1612178354Ssam ac = M_WME_GETAC(m); 1613178354Ssam if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) { 1614178354Ssam /* there is no place left in this ring */ 1615287197Sglebius mbufq_prepend(&sc->sc_snd, m); 1616178354Ssam break; 1617178354Ssam } 1618178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1619178354Ssam if (rt2661_tx_data(sc, m, ni, ac) != 0) { 1620287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 1621287197Sglebius IFCOUNTER_OERRORS, 1); 1622314222Savos ieee80211_free_node(ni); 1623178354Ssam break; 1624178354Ssam } 1625178354Ssam sc->sc_tx_timer = 5; 1626178354Ssam } 1627178354Ssam} 1628156321Sdamien 1629178354Ssamstatic int 1630178354Ssamrt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1631178354Ssam const struct ieee80211_bpf_params *params) 1632178354Ssam{ 1633178354Ssam struct ieee80211com *ic = ni->ni_ic; 1634287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1635156321Sdamien 1636178354Ssam RAL_LOCK(sc); 1637156321Sdamien 1638178354Ssam /* prevent management frames from being sent if we're not ready */ 1639287197Sglebius if (!(sc->sc_flags & RAL_RUNNING)) { 1640178354Ssam RAL_UNLOCK(sc); 1641178354Ssam m_freem(m); 1642178354Ssam return ENETDOWN; 1643178354Ssam } 1644178354Ssam if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) { 1645178354Ssam RAL_UNLOCK(sc); 1646178354Ssam m_freem(m); 1647178354Ssam return ENOBUFS; /* XXX */ 1648178354Ssam } 1649156321Sdamien 1650178354Ssam /* 1651178354Ssam * Legacy path; interpret frame contents to decide 1652178354Ssam * precisely how to send the frame. 1653178354Ssam * XXX raw path 1654178354Ssam */ 1655178354Ssam if (rt2661_tx_mgt(sc, m, ni) != 0) 1656178354Ssam goto bad; 1657178354Ssam sc->sc_tx_timer = 5; 1658156321Sdamien 1659178354Ssam RAL_UNLOCK(sc); 1660156321Sdamien 1661178354Ssam return 0; 1662178354Ssambad: 1663156321Sdamien RAL_UNLOCK(sc); 1664178354Ssam return EIO; /* XXX */ 1665156321Sdamien} 1666156321Sdamien 1667156321Sdamienstatic void 1668165352Sbmsrt2661_watchdog(void *arg) 1669156321Sdamien{ 1670165352Sbms struct rt2661_softc *sc = (struct rt2661_softc *)arg; 1671156321Sdamien 1672178354Ssam RAL_LOCK_ASSERT(sc); 1673156321Sdamien 1674287197Sglebius KASSERT(sc->sc_flags & RAL_RUNNING, ("not running")); 1675156321Sdamien 1676178354Ssam if (sc->sc_invalid) /* card ejected */ 1677178354Ssam return; 1678156321Sdamien 1679178354Ssam if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1680287197Sglebius device_printf(sc->sc_dev, "device timeout\n"); 1681178354Ssam rt2661_init_locked(sc); 1682287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1683178354Ssam /* NB: callout is reset in rt2661_init() */ 1684178354Ssam return; 1685178354Ssam } 1686178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 1687156321Sdamien} 1688156321Sdamien 1689287197Sglebiusstatic void 1690287197Sglebiusrt2661_parent(struct ieee80211com *ic) 1691156321Sdamien{ 1692287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 1693287197Sglebius int startall = 0; 1694156321Sdamien 1695287197Sglebius RAL_LOCK(sc); 1696287197Sglebius if (ic->ic_nrunning > 0) { 1697287197Sglebius if ((sc->sc_flags & RAL_RUNNING) == 0) { 1698287197Sglebius rt2661_init_locked(sc); 1699287197Sglebius startall = 1; 1700287197Sglebius } else 1701287197Sglebius rt2661_update_promisc(ic); 1702287197Sglebius } else if (sc->sc_flags & RAL_RUNNING) 1703287197Sglebius rt2661_stop_locked(sc); 1704287197Sglebius RAL_UNLOCK(sc); 1705287197Sglebius if (startall) 1706287197Sglebius ieee80211_start_all(ic); 1707156321Sdamien} 1708156321Sdamien 1709156321Sdamienstatic void 1710156321Sdamienrt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) 1711156321Sdamien{ 1712156321Sdamien uint32_t tmp; 1713156321Sdamien int ntries; 1714156321Sdamien 1715156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1716156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1717156321Sdamien break; 1718156321Sdamien DELAY(1); 1719156321Sdamien } 1720156321Sdamien if (ntries == 100) { 1721156321Sdamien device_printf(sc->sc_dev, "could not write to BBP\n"); 1722156321Sdamien return; 1723156321Sdamien } 1724156321Sdamien 1725156321Sdamien tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val; 1726156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); 1727156321Sdamien 1728178354Ssam DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1729156321Sdamien} 1730156321Sdamien 1731156321Sdamienstatic uint8_t 1732156321Sdamienrt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) 1733156321Sdamien{ 1734156321Sdamien uint32_t val; 1735156321Sdamien int ntries; 1736156321Sdamien 1737156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1738156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) 1739156321Sdamien break; 1740156321Sdamien DELAY(1); 1741156321Sdamien } 1742156321Sdamien if (ntries == 100) { 1743156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1744156321Sdamien return 0; 1745156321Sdamien } 1746156321Sdamien 1747156321Sdamien val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8; 1748156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR3, val); 1749156321Sdamien 1750156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1751156321Sdamien val = RAL_READ(sc, RT2661_PHY_CSR3); 1752156321Sdamien if (!(val & RT2661_BBP_BUSY)) 1753156321Sdamien return val & 0xff; 1754156321Sdamien DELAY(1); 1755156321Sdamien } 1756156321Sdamien 1757156321Sdamien device_printf(sc->sc_dev, "could not read from BBP\n"); 1758156321Sdamien return 0; 1759156321Sdamien} 1760156321Sdamien 1761156321Sdamienstatic void 1762156321Sdamienrt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) 1763156321Sdamien{ 1764156321Sdamien uint32_t tmp; 1765156321Sdamien int ntries; 1766156321Sdamien 1767156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 1768156321Sdamien if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) 1769156321Sdamien break; 1770156321Sdamien DELAY(1); 1771156321Sdamien } 1772156321Sdamien if (ntries == 100) { 1773156321Sdamien device_printf(sc->sc_dev, "could not write to RF\n"); 1774156321Sdamien return; 1775156321Sdamien } 1776156321Sdamien 1777156321Sdamien tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 | 1778156321Sdamien (reg & 3); 1779156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); 1780156321Sdamien 1781156321Sdamien /* remember last written value in sc */ 1782156321Sdamien sc->rf_regs[reg] = val; 1783156321Sdamien 1784178354Ssam DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff); 1785156321Sdamien} 1786156321Sdamien 1787156321Sdamienstatic int 1788156321Sdamienrt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) 1789156321Sdamien{ 1790156321Sdamien if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) 1791156321Sdamien return EIO; /* there is already a command pending */ 1792156321Sdamien 1793156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 1794156321Sdamien RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg); 1795156321Sdamien 1796156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); 1797156321Sdamien 1798156321Sdamien return 0; 1799156321Sdamien} 1800156321Sdamien 1801156321Sdamienstatic void 1802156321Sdamienrt2661_select_antenna(struct rt2661_softc *sc) 1803156321Sdamien{ 1804156321Sdamien uint8_t bbp4, bbp77; 1805156321Sdamien uint32_t tmp; 1806156321Sdamien 1807156321Sdamien bbp4 = rt2661_bbp_read(sc, 4); 1808156321Sdamien bbp77 = rt2661_bbp_read(sc, 77); 1809156321Sdamien 1810156321Sdamien /* TBD */ 1811156321Sdamien 1812156321Sdamien /* make sure Rx is disabled before switching antenna */ 1813156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 1814156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 1815156321Sdamien 1816156321Sdamien rt2661_bbp_write(sc, 4, bbp4); 1817156321Sdamien rt2661_bbp_write(sc, 77, bbp77); 1818156321Sdamien 1819156321Sdamien /* restore Rx filter */ 1820156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 1821156321Sdamien} 1822156321Sdamien 1823156321Sdamien/* 1824156321Sdamien * Enable multi-rate retries for frames sent at OFDM rates. 1825156321Sdamien * In 802.11b/g mode, allow fallback to CCK rates. 1826156321Sdamien */ 1827156321Sdamienstatic void 1828156321Sdamienrt2661_enable_mrr(struct rt2661_softc *sc) 1829156321Sdamien{ 1830287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1831156321Sdamien uint32_t tmp; 1832156321Sdamien 1833156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1834156321Sdamien 1835156321Sdamien tmp &= ~RT2661_MRR_CCK_FALLBACK; 1836178354Ssam if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 1837156321Sdamien tmp |= RT2661_MRR_CCK_FALLBACK; 1838156321Sdamien tmp |= RT2661_MRR_ENABLED; 1839156321Sdamien 1840156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1841156321Sdamien} 1842156321Sdamien 1843156321Sdamienstatic void 1844156321Sdamienrt2661_set_txpreamble(struct rt2661_softc *sc) 1845156321Sdamien{ 1846287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1847156321Sdamien uint32_t tmp; 1848156321Sdamien 1849156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR4); 1850156321Sdamien 1851156321Sdamien tmp &= ~RT2661_SHORT_PREAMBLE; 1852178354Ssam if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1853156321Sdamien tmp |= RT2661_SHORT_PREAMBLE; 1854156321Sdamien 1855156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); 1856156321Sdamien} 1857156321Sdamien 1858156321Sdamienstatic void 1859156321Sdamienrt2661_set_basicrates(struct rt2661_softc *sc, 1860156321Sdamien const struct ieee80211_rateset *rs) 1861156321Sdamien{ 1862287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1863156321Sdamien uint32_t mask = 0; 1864156321Sdamien uint8_t rate; 1865220502Sbschmidt int i; 1866156321Sdamien 1867156321Sdamien for (i = 0; i < rs->rs_nrates; i++) { 1868156321Sdamien rate = rs->rs_rates[i]; 1869156321Sdamien 1870156321Sdamien if (!(rate & IEEE80211_RATE_BASIC)) 1871156321Sdamien continue; 1872156321Sdamien 1873288087Sadrian mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, 1874288087Sadrian IEEE80211_RV(rate)); 1875156321Sdamien } 1876156321Sdamien 1877156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); 1878156321Sdamien 1879178354Ssam DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 1880156321Sdamien} 1881156321Sdamien 1882156321Sdamien/* 1883156321Sdamien * Reprogram MAC/BBP to switch to a new band. Values taken from the reference 1884156321Sdamien * driver. 1885156321Sdamien */ 1886156321Sdamienstatic void 1887156321Sdamienrt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) 1888156321Sdamien{ 1889156321Sdamien uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104; 1890156321Sdamien uint32_t tmp; 1891156321Sdamien 1892156321Sdamien /* update all BBP registers that depend on the band */ 1893156321Sdamien bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c; 1894156321Sdamien bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48; 1895156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) { 1896156321Sdamien bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c; 1897156321Sdamien bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10; 1898156321Sdamien } 1899156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1900156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1901156321Sdamien bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10; 1902156321Sdamien } 1903156321Sdamien 1904156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 1905156321Sdamien rt2661_bbp_write(sc, 96, bbp96); 1906156321Sdamien rt2661_bbp_write(sc, 104, bbp104); 1907156321Sdamien 1908156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || 1909156321Sdamien (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { 1910156321Sdamien rt2661_bbp_write(sc, 75, 0x80); 1911156321Sdamien rt2661_bbp_write(sc, 86, 0x80); 1912156321Sdamien rt2661_bbp_write(sc, 88, 0x80); 1913156321Sdamien } 1914156321Sdamien 1915156321Sdamien rt2661_bbp_write(sc, 35, bbp35); 1916156321Sdamien rt2661_bbp_write(sc, 97, bbp97); 1917156321Sdamien rt2661_bbp_write(sc, 98, bbp98); 1918156321Sdamien 1919156321Sdamien tmp = RAL_READ(sc, RT2661_PHY_CSR0); 1920156321Sdamien tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ); 1921156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(c)) 1922156321Sdamien tmp |= RT2661_PA_PE_2GHZ; 1923156321Sdamien else 1924156321Sdamien tmp |= RT2661_PA_PE_5GHZ; 1925156321Sdamien RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); 1926156321Sdamien} 1927156321Sdamien 1928156321Sdamienstatic void 1929156321Sdamienrt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) 1930156321Sdamien{ 1931287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1932156321Sdamien const struct rfprog *rfprog; 1933156321Sdamien uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT; 1934156321Sdamien int8_t power; 1935156321Sdamien u_int i, chan; 1936156321Sdamien 1937156321Sdamien chan = ieee80211_chan2ieee(ic, c); 1938178354Ssam KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 1939156321Sdamien 1940156321Sdamien /* select the appropriate RF settings based on what EEPROM says */ 1941156321Sdamien rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; 1942156321Sdamien 1943156321Sdamien /* find the settings for this channel (we know it exists) */ 1944156321Sdamien for (i = 0; rfprog[i].chan != chan; i++); 1945156321Sdamien 1946156321Sdamien power = sc->txpow[i]; 1947156321Sdamien if (power < 0) { 1948156321Sdamien bbp94 += power; 1949156321Sdamien power = 0; 1950156321Sdamien } else if (power > 31) { 1951156321Sdamien bbp94 += power - 31; 1952156321Sdamien power = 31; 1953156321Sdamien } 1954156321Sdamien 1955156321Sdamien /* 1956156321Sdamien * If we are switching from the 2GHz band to the 5GHz band or 1957156321Sdamien * vice-versa, BBP registers need to be reprogrammed. 1958156321Sdamien */ 1959156321Sdamien if (c->ic_flags != sc->sc_curchan->ic_flags) { 1960156321Sdamien rt2661_select_band(sc, c); 1961156321Sdamien rt2661_select_antenna(sc); 1962156321Sdamien } 1963156321Sdamien sc->sc_curchan = c; 1964156321Sdamien 1965156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1966156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1967156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 1968156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1969156321Sdamien 1970156321Sdamien DELAY(200); 1971156321Sdamien 1972156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1973156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1974156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1); 1975156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1976156321Sdamien 1977156321Sdamien DELAY(200); 1978156321Sdamien 1979156321Sdamien rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1); 1980156321Sdamien rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2); 1981156321Sdamien rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7); 1982156321Sdamien rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10); 1983156321Sdamien 1984156321Sdamien /* enable smart mode for MIMO-capable RFs */ 1985156321Sdamien bbp3 = rt2661_bbp_read(sc, 3); 1986156321Sdamien 1987156321Sdamien bbp3 &= ~RT2661_SMART_MODE; 1988156321Sdamien if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) 1989156321Sdamien bbp3 |= RT2661_SMART_MODE; 1990156321Sdamien 1991156321Sdamien rt2661_bbp_write(sc, 3, bbp3); 1992156321Sdamien 1993156321Sdamien if (bbp94 != RT2661_BBPR94_DEFAULT) 1994156321Sdamien rt2661_bbp_write(sc, 94, bbp94); 1995156321Sdamien 1996156321Sdamien /* 5GHz radio needs a 1ms delay here */ 1997156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(c)) 1998156321Sdamien DELAY(1000); 1999156321Sdamien} 2000156321Sdamien 2001156321Sdamienstatic void 2002156321Sdamienrt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) 2003156321Sdamien{ 2004156321Sdamien uint32_t tmp; 2005156321Sdamien 2006156321Sdamien tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2007156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); 2008156321Sdamien 2009156321Sdamien tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16; 2010156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); 2011156321Sdamien} 2012156321Sdamien 2013156321Sdamienstatic void 2014156321Sdamienrt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) 2015156321Sdamien{ 2016156321Sdamien uint32_t tmp; 2017156321Sdamien 2018156321Sdamien tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2019156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); 2020156321Sdamien 2021156321Sdamien tmp = addr[4] | addr[5] << 8; 2022156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); 2023156321Sdamien} 2024156321Sdamien 2025156321Sdamienstatic void 2026283540Sglebiusrt2661_update_promisc(struct ieee80211com *ic) 2027156321Sdamien{ 2028283540Sglebius struct rt2661_softc *sc = ic->ic_softc; 2029156321Sdamien uint32_t tmp; 2030156321Sdamien 2031156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2032156321Sdamien 2033156321Sdamien tmp &= ~RT2661_DROP_NOT_TO_ME; 2034287197Sglebius if (ic->ic_promisc == 0) 2035156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2036156321Sdamien 2037156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2038156321Sdamien 2039283540Sglebius DPRINTF(sc, "%s promiscuous mode\n", 2040287197Sglebius (ic->ic_promisc > 0) ? "entering" : "leaving"); 2041156321Sdamien} 2042156321Sdamien 2043156321Sdamien/* 2044156321Sdamien * Update QoS (802.11e) settings for each h/w Tx ring. 2045156321Sdamien */ 2046156321Sdamienstatic int 2047156321Sdamienrt2661_wme_update(struct ieee80211com *ic) 2048156321Sdamien{ 2049287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2050156321Sdamien const struct wmeParams *wmep; 2051156321Sdamien 2052156321Sdamien wmep = ic->ic_wme.wme_chanParams.cap_wmeParams; 2053156321Sdamien 2054156321Sdamien /* XXX: not sure about shifts. */ 2055156321Sdamien /* XXX: the reference driver plays with AC_VI settings too. */ 2056156321Sdamien 2057156321Sdamien /* update TxOp */ 2058156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR0, 2059156321Sdamien wmep[WME_AC_BE].wmep_txopLimit << 16 | 2060156321Sdamien wmep[WME_AC_BK].wmep_txopLimit); 2061156321Sdamien RAL_WRITE(sc, RT2661_AC_TXOP_CSR1, 2062156321Sdamien wmep[WME_AC_VI].wmep_txopLimit << 16 | 2063156321Sdamien wmep[WME_AC_VO].wmep_txopLimit); 2064156321Sdamien 2065156321Sdamien /* update CWmin */ 2066156321Sdamien RAL_WRITE(sc, RT2661_CWMIN_CSR, 2067156321Sdamien wmep[WME_AC_BE].wmep_logcwmin << 12 | 2068156321Sdamien wmep[WME_AC_BK].wmep_logcwmin << 8 | 2069156321Sdamien wmep[WME_AC_VI].wmep_logcwmin << 4 | 2070156321Sdamien wmep[WME_AC_VO].wmep_logcwmin); 2071156321Sdamien 2072156321Sdamien /* update CWmax */ 2073156321Sdamien RAL_WRITE(sc, RT2661_CWMAX_CSR, 2074156321Sdamien wmep[WME_AC_BE].wmep_logcwmax << 12 | 2075156321Sdamien wmep[WME_AC_BK].wmep_logcwmax << 8 | 2076156321Sdamien wmep[WME_AC_VI].wmep_logcwmax << 4 | 2077156321Sdamien wmep[WME_AC_VO].wmep_logcwmax); 2078156321Sdamien 2079156321Sdamien /* update Aifsn */ 2080156321Sdamien RAL_WRITE(sc, RT2661_AIFSN_CSR, 2081156321Sdamien wmep[WME_AC_BE].wmep_aifsn << 12 | 2082156321Sdamien wmep[WME_AC_BK].wmep_aifsn << 8 | 2083156321Sdamien wmep[WME_AC_VI].wmep_aifsn << 4 | 2084156321Sdamien wmep[WME_AC_VO].wmep_aifsn); 2085156321Sdamien 2086156321Sdamien return 0; 2087156321Sdamien} 2088156321Sdamien 2089156321Sdamienstatic void 2090283540Sglebiusrt2661_update_slot(struct ieee80211com *ic) 2091156321Sdamien{ 2092283540Sglebius struct rt2661_softc *sc = ic->ic_softc; 2093156321Sdamien uint8_t slottime; 2094156321Sdamien uint32_t tmp; 2095156321Sdamien 2096292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 2097156321Sdamien 2098156321Sdamien tmp = RAL_READ(sc, RT2661_MAC_CSR9); 2099156321Sdamien tmp = (tmp & ~0xff) | slottime; 2100156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); 2101156321Sdamien} 2102156321Sdamien 2103156321Sdamienstatic const char * 2104156321Sdamienrt2661_get_rf(int rev) 2105156321Sdamien{ 2106156321Sdamien switch (rev) { 2107156321Sdamien case RT2661_RF_5225: return "RT5225"; 2108156321Sdamien case RT2661_RF_5325: return "RT5325 (MIMO XR)"; 2109156321Sdamien case RT2661_RF_2527: return "RT2527"; 2110156321Sdamien case RT2661_RF_2529: return "RT2529 (MIMO XR)"; 2111156321Sdamien default: return "unknown"; 2112156321Sdamien } 2113156321Sdamien} 2114156321Sdamien 2115156321Sdamienstatic void 2116190526Ssamrt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN]) 2117156321Sdamien{ 2118156321Sdamien uint16_t val; 2119156321Sdamien int i; 2120156321Sdamien 2121156321Sdamien /* read MAC address */ 2122156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); 2123190526Ssam macaddr[0] = val & 0xff; 2124190526Ssam macaddr[1] = val >> 8; 2125156321Sdamien 2126156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); 2127190526Ssam macaddr[2] = val & 0xff; 2128190526Ssam macaddr[3] = val >> 8; 2129156321Sdamien 2130156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); 2131190526Ssam macaddr[4] = val & 0xff; 2132190526Ssam macaddr[5] = val >> 8; 2133156321Sdamien 2134156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); 2135156321Sdamien /* XXX: test if different from 0xffff? */ 2136156321Sdamien sc->rf_rev = (val >> 11) & 0x1f; 2137156321Sdamien sc->hw_radio = (val >> 10) & 0x1; 2138156321Sdamien sc->rx_ant = (val >> 4) & 0x3; 2139156321Sdamien sc->tx_ant = (val >> 2) & 0x3; 2140156321Sdamien sc->nb_ant = val & 0x3; 2141156321Sdamien 2142178354Ssam DPRINTF(sc, "RF revision=%d\n", sc->rf_rev); 2143156321Sdamien 2144156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); 2145156321Sdamien sc->ext_5ghz_lna = (val >> 6) & 0x1; 2146156321Sdamien sc->ext_2ghz_lna = (val >> 4) & 0x1; 2147156321Sdamien 2148178354Ssam DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n", 2149178354Ssam sc->ext_2ghz_lna, sc->ext_5ghz_lna); 2150156321Sdamien 2151156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); 2152156321Sdamien if ((val & 0xff) != 0xff) 2153156321Sdamien sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */ 2154156321Sdamien 2155170530Ssam /* Only [-10, 10] is valid */ 2156170530Ssam if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10) 2157170530Ssam sc->rssi_2ghz_corr = 0; 2158170530Ssam 2159156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); 2160156321Sdamien if ((val & 0xff) != 0xff) 2161156321Sdamien sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */ 2162156321Sdamien 2163170530Ssam /* Only [-10, 10] is valid */ 2164170530Ssam if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10) 2165170530Ssam sc->rssi_5ghz_corr = 0; 2166170530Ssam 2167156321Sdamien /* adjust RSSI correction for external low-noise amplifier */ 2168156321Sdamien if (sc->ext_2ghz_lna) 2169156321Sdamien sc->rssi_2ghz_corr -= 14; 2170156321Sdamien if (sc->ext_5ghz_lna) 2171156321Sdamien sc->rssi_5ghz_corr -= 14; 2172156321Sdamien 2173178354Ssam DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n", 2174178354Ssam sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); 2175156321Sdamien 2176156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); 2177156321Sdamien if ((val >> 8) != 0xff) 2178156321Sdamien sc->rfprog = (val >> 8) & 0x3; 2179156321Sdamien if ((val & 0xff) != 0xff) 2180156321Sdamien sc->rffreq = val & 0xff; 2181156321Sdamien 2182178354Ssam DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); 2183156321Sdamien 2184156321Sdamien /* read Tx power for all a/b/g channels */ 2185156321Sdamien for (i = 0; i < 19; i++) { 2186156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); 2187156321Sdamien sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */ 2188178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2189178354Ssam rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); 2190156321Sdamien sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */ 2191178354Ssam DPRINTF(sc, "Channel=%d Tx power=%d\n", 2192178354Ssam rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); 2193156321Sdamien } 2194156321Sdamien 2195156321Sdamien /* read vendor-specific BBP values */ 2196156321Sdamien for (i = 0; i < 16; i++) { 2197156321Sdamien val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); 2198156321Sdamien if (val == 0 || val == 0xffff) 2199156321Sdamien continue; /* skip invalid entries */ 2200156321Sdamien sc->bbp_prom[i].reg = val >> 8; 2201156321Sdamien sc->bbp_prom[i].val = val & 0xff; 2202178354Ssam DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg, 2203178354Ssam sc->bbp_prom[i].val); 2204156321Sdamien } 2205156321Sdamien} 2206156321Sdamien 2207156321Sdamienstatic int 2208156321Sdamienrt2661_bbp_init(struct rt2661_softc *sc) 2209156321Sdamien{ 2210156321Sdamien int i, ntries; 2211156321Sdamien uint8_t val; 2212156321Sdamien 2213156321Sdamien /* wait for BBP to be ready */ 2214156321Sdamien for (ntries = 0; ntries < 100; ntries++) { 2215156321Sdamien val = rt2661_bbp_read(sc, 0); 2216156321Sdamien if (val != 0 && val != 0xff) 2217156321Sdamien break; 2218156321Sdamien DELAY(100); 2219156321Sdamien } 2220156321Sdamien if (ntries == 100) { 2221156321Sdamien device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2222156321Sdamien return EIO; 2223156321Sdamien } 2224156321Sdamien 2225156321Sdamien /* initialize BBP registers to default values */ 2226288087Sadrian for (i = 0; i < nitems(rt2661_def_bbp); i++) { 2227156321Sdamien rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, 2228156321Sdamien rt2661_def_bbp[i].val); 2229156321Sdamien } 2230156321Sdamien 2231156321Sdamien /* write vendor-specific BBP values (from EEPROM) */ 2232156321Sdamien for (i = 0; i < 16; i++) { 2233156321Sdamien if (sc->bbp_prom[i].reg == 0) 2234156321Sdamien continue; 2235156321Sdamien rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2236156321Sdamien } 2237156321Sdamien 2238156321Sdamien return 0; 2239156321Sdamien} 2240156321Sdamien 2241156321Sdamienstatic void 2242178354Ssamrt2661_init_locked(struct rt2661_softc *sc) 2243156321Sdamien{ 2244287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2245287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2246156321Sdamien uint32_t tmp, sta[3]; 2247178354Ssam int i, error, ntries; 2248156321Sdamien 2249178354Ssam RAL_LOCK_ASSERT(sc); 2250156975Sdamien 2251178354Ssam if ((sc->sc_flags & RAL_FW_LOADED) == 0) { 2252178354Ssam error = rt2661_load_microcode(sc); 2253178354Ssam if (error != 0) { 2254287197Sglebius device_printf(sc->sc_dev, 2255178354Ssam "%s: could not load 8051 microcode, error %d\n", 2256178354Ssam __func__, error); 2257178354Ssam return; 2258178354Ssam } 2259178354Ssam sc->sc_flags |= RAL_FW_LOADED; 2260178354Ssam } 2261178354Ssam 2262170530Ssam rt2661_stop_locked(sc); 2263156321Sdamien 2264156321Sdamien /* initialize Tx rings */ 2265156321Sdamien RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); 2266156321Sdamien RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); 2267156321Sdamien RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); 2268156321Sdamien RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); 2269156321Sdamien 2270156321Sdamien /* initialize Mgt ring */ 2271156321Sdamien RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); 2272156321Sdamien 2273156321Sdamien /* initialize Rx ring */ 2274156321Sdamien RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); 2275156321Sdamien 2276156321Sdamien /* initialize Tx rings sizes */ 2277156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR0, 2278156321Sdamien RT2661_TX_RING_COUNT << 24 | 2279156321Sdamien RT2661_TX_RING_COUNT << 16 | 2280156321Sdamien RT2661_TX_RING_COUNT << 8 | 2281156321Sdamien RT2661_TX_RING_COUNT); 2282156321Sdamien 2283156321Sdamien RAL_WRITE(sc, RT2661_TX_RING_CSR1, 2284156321Sdamien RT2661_TX_DESC_WSIZE << 16 | 2285156321Sdamien RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */ 2286156321Sdamien RT2661_MGT_RING_COUNT); 2287156321Sdamien 2288156321Sdamien /* initialize Rx rings */ 2289156321Sdamien RAL_WRITE(sc, RT2661_RX_RING_CSR, 2290156321Sdamien RT2661_RX_DESC_BACK << 16 | 2291156321Sdamien RT2661_RX_DESC_WSIZE << 8 | 2292156321Sdamien RT2661_RX_RING_COUNT); 2293156321Sdamien 2294156321Sdamien /* XXX: some magic here */ 2295156321Sdamien RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); 2296156321Sdamien 2297156321Sdamien /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */ 2298156321Sdamien RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); 2299156321Sdamien 2300156321Sdamien /* load base address of Rx ring */ 2301156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); 2302156321Sdamien 2303156321Sdamien /* initialize MAC registers to default values */ 2304288087Sadrian for (i = 0; i < nitems(rt2661_def_mac); i++) 2305156321Sdamien RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); 2306156321Sdamien 2307287197Sglebius rt2661_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2308156321Sdamien 2309156321Sdamien /* set host ready */ 2310156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2311156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2312156321Sdamien 2313156321Sdamien /* wait for BBP/RF to wakeup */ 2314156321Sdamien for (ntries = 0; ntries < 1000; ntries++) { 2315156321Sdamien if (RAL_READ(sc, RT2661_MAC_CSR12) & 8) 2316156321Sdamien break; 2317156321Sdamien DELAY(1000); 2318156321Sdamien } 2319156321Sdamien if (ntries == 1000) { 2320156321Sdamien printf("timeout waiting for BBP/RF to wakeup\n"); 2321170530Ssam rt2661_stop_locked(sc); 2322156321Sdamien return; 2323156321Sdamien } 2324156321Sdamien 2325156321Sdamien if (rt2661_bbp_init(sc) != 0) { 2326170530Ssam rt2661_stop_locked(sc); 2327156321Sdamien return; 2328156321Sdamien } 2329156321Sdamien 2330156321Sdamien /* select default channel */ 2331156321Sdamien sc->sc_curchan = ic->ic_curchan; 2332156321Sdamien rt2661_select_band(sc, sc->sc_curchan); 2333156321Sdamien rt2661_select_antenna(sc); 2334156321Sdamien rt2661_set_chan(sc, sc->sc_curchan); 2335156321Sdamien 2336156321Sdamien /* update Rx filter */ 2337156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff; 2338156321Sdamien 2339156321Sdamien tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR; 2340156321Sdamien if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2341156321Sdamien tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR | 2342156321Sdamien RT2661_DROP_ACKCTS; 2343195618Srpaulo if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2344195618Srpaulo ic->ic_opmode != IEEE80211_M_MBSS) 2345156321Sdamien tmp |= RT2661_DROP_TODS; 2346287197Sglebius if (ic->ic_promisc == 0) 2347156321Sdamien tmp |= RT2661_DROP_NOT_TO_ME; 2348156321Sdamien } 2349156321Sdamien 2350156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2351156321Sdamien 2352156321Sdamien /* clear STA registers */ 2353288087Sadrian RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, nitems(sta)); 2354156321Sdamien 2355156321Sdamien /* initialize ASIC */ 2356156321Sdamien RAL_WRITE(sc, RT2661_MAC_CSR1, 4); 2357156321Sdamien 2358156321Sdamien /* clear any pending interrupt */ 2359156321Sdamien RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2360156321Sdamien 2361156321Sdamien /* enable interrupts */ 2362156321Sdamien RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); 2363156321Sdamien RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); 2364156321Sdamien 2365156321Sdamien /* kick Rx */ 2366156321Sdamien RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); 2367156321Sdamien 2368287197Sglebius sc->sc_flags |= RAL_RUNNING; 2369156321Sdamien 2370178354Ssam callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc); 2371156321Sdamien} 2372156321Sdamien 2373178354Ssamstatic void 2374178354Ssamrt2661_init(void *priv) 2375156321Sdamien{ 2376156321Sdamien struct rt2661_softc *sc = priv; 2377287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2378170530Ssam 2379170530Ssam RAL_LOCK(sc); 2380178354Ssam rt2661_init_locked(sc); 2381170530Ssam RAL_UNLOCK(sc); 2382178354Ssam 2383287197Sglebius if (sc->sc_flags & RAL_RUNNING) 2384178931Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2385170530Ssam} 2386170530Ssam 2387170530Ssamvoid 2388170530Ssamrt2661_stop_locked(struct rt2661_softc *sc) 2389170530Ssam{ 2390287197Sglebius volatile int *flags = &sc->sc_flags; 2391286437Sadrian uint32_t tmp; 2392156321Sdamien 2393178354Ssam while (*flags & RAL_INPUT_RUNNING) 2394170530Ssam msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2395156321Sdamien 2396178354Ssam callout_stop(&sc->watchdog_ch); 2397178354Ssam sc->sc_tx_timer = 0; 2398178354Ssam 2399287197Sglebius if (sc->sc_flags & RAL_RUNNING) { 2400287197Sglebius sc->sc_flags &= ~RAL_RUNNING; 2401178354Ssam 2402170530Ssam /* abort Tx (for all 5 Tx rings) */ 2403170530Ssam RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); 2404170530Ssam 2405170530Ssam /* disable Rx (value remains after reset!) */ 2406170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2407170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2408170530Ssam 2409170530Ssam /* reset ASIC */ 2410170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 3); 2411170530Ssam RAL_WRITE(sc, RT2661_MAC_CSR1, 0); 2412170530Ssam 2413170530Ssam /* disable interrupts */ 2414170530Ssam RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff); 2415170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); 2416170530Ssam 2417170530Ssam /* clear any pending interrupt */ 2418170530Ssam RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); 2419170530Ssam RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); 2420170530Ssam 2421170530Ssam /* reset Tx and Rx rings */ 2422170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[0]); 2423170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[1]); 2424170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[2]); 2425170530Ssam rt2661_reset_tx_ring(sc, &sc->txq[3]); 2426170530Ssam rt2661_reset_tx_ring(sc, &sc->mgtq); 2427170530Ssam rt2661_reset_rx_ring(sc, &sc->rxq); 2428170530Ssam } 2429156321Sdamien} 2430156321Sdamien 2431178354Ssamvoid 2432178354Ssamrt2661_stop(void *priv) 2433178354Ssam{ 2434178354Ssam struct rt2661_softc *sc = priv; 2435178354Ssam 2436178354Ssam RAL_LOCK(sc); 2437178354Ssam rt2661_stop_locked(sc); 2438178354Ssam RAL_UNLOCK(sc); 2439178354Ssam} 2440178354Ssam 2441156321Sdamienstatic int 2442178354Ssamrt2661_load_microcode(struct rt2661_softc *sc) 2443156321Sdamien{ 2444178354Ssam const struct firmware *fp; 2445178354Ssam const char *imagename; 2446178354Ssam int ntries, error; 2447156321Sdamien 2448178354Ssam RAL_LOCK_ASSERT(sc); 2449178354Ssam 2450178354Ssam switch (sc->sc_id) { 2451178354Ssam case 0x0301: imagename = "rt2561sfw"; break; 2452178354Ssam case 0x0302: imagename = "rt2561fw"; break; 2453178354Ssam case 0x0401: imagename = "rt2661fw"; break; 2454178354Ssam default: 2455287197Sglebius device_printf(sc->sc_dev, "%s: unexpected pci device id 0x%x, " 2456178354Ssam "don't know how to retrieve firmware\n", 2457178354Ssam __func__, sc->sc_id); 2458178354Ssam return EINVAL; 2459178354Ssam } 2460178354Ssam RAL_UNLOCK(sc); 2461178354Ssam fp = firmware_get(imagename); 2462178354Ssam RAL_LOCK(sc); 2463178354Ssam if (fp == NULL) { 2464287197Sglebius device_printf(sc->sc_dev, 2465287197Sglebius "%s: unable to retrieve firmware image %s\n", 2466178354Ssam __func__, imagename); 2467178354Ssam return EINVAL; 2468178354Ssam } 2469178354Ssam 2470178354Ssam /* 2471178354Ssam * Load 8051 microcode into NIC. 2472178354Ssam */ 2473156321Sdamien /* reset 8051 */ 2474156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2475156321Sdamien 2476156321Sdamien /* cancel any pending Host to MCU command */ 2477156321Sdamien RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); 2478156321Sdamien RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); 2479156321Sdamien RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); 2480156321Sdamien 2481156321Sdamien /* write 8051's microcode */ 2482156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); 2483178354Ssam RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize); 2484156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); 2485156321Sdamien 2486156321Sdamien /* kick 8051's ass */ 2487156321Sdamien RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); 2488156321Sdamien 2489156321Sdamien /* wait for 8051 to initialize */ 2490156321Sdamien for (ntries = 0; ntries < 500; ntries++) { 2491156321Sdamien if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) 2492156321Sdamien break; 2493156321Sdamien DELAY(100); 2494156321Sdamien } 2495156321Sdamien if (ntries == 500) { 2496287197Sglebius device_printf(sc->sc_dev, 2497287197Sglebius "%s: timeout waiting for MCU to initialize\n", __func__); 2498178354Ssam error = EIO; 2499178354Ssam } else 2500178354Ssam error = 0; 2501178354Ssam 2502178354Ssam firmware_put(fp, FIRMWARE_UNLOAD); 2503178354Ssam return error; 2504156321Sdamien} 2505156321Sdamien 2506156321Sdamien#ifdef notyet 2507156321Sdamien/* 2508156321Sdamien * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and 2509156321Sdamien * false CCA count. This function is called periodically (every seconds) when 2510156321Sdamien * in the RUN state. Values taken from the reference driver. 2511156321Sdamien */ 2512156321Sdamienstatic void 2513156321Sdamienrt2661_rx_tune(struct rt2661_softc *sc) 2514156321Sdamien{ 2515156321Sdamien uint8_t bbp17; 2516156321Sdamien uint16_t cca; 2517156321Sdamien int lo, hi, dbm; 2518156321Sdamien 2519156321Sdamien /* 2520156321Sdamien * Tuning range depends on operating band and on the presence of an 2521156321Sdamien * external low-noise amplifier. 2522156321Sdamien */ 2523156321Sdamien lo = 0x20; 2524156321Sdamien if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) 2525156321Sdamien lo += 0x08; 2526156321Sdamien if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || 2527156321Sdamien (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) 2528156321Sdamien lo += 0x10; 2529156321Sdamien hi = lo + 0x20; 2530156321Sdamien 2531156321Sdamien /* retrieve false CCA count since last call (clear on read) */ 2532156321Sdamien cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff; 2533156321Sdamien 2534156321Sdamien if (dbm >= -35) { 2535156321Sdamien bbp17 = 0x60; 2536156321Sdamien } else if (dbm >= -58) { 2537156321Sdamien bbp17 = hi; 2538156321Sdamien } else if (dbm >= -66) { 2539156321Sdamien bbp17 = lo + 0x10; 2540156321Sdamien } else if (dbm >= -74) { 2541156321Sdamien bbp17 = lo + 0x08; 2542156321Sdamien } else { 2543156321Sdamien /* RSSI < -74dBm, tune using false CCA count */ 2544156321Sdamien 2545156321Sdamien bbp17 = sc->bbp17; /* current value */ 2546156321Sdamien 2547156321Sdamien hi -= 2 * (-74 - dbm); 2548156321Sdamien if (hi < lo) 2549156321Sdamien hi = lo; 2550156321Sdamien 2551156321Sdamien if (bbp17 > hi) { 2552156321Sdamien bbp17 = hi; 2553156321Sdamien 2554156321Sdamien } else if (cca > 512) { 2555156321Sdamien if (++bbp17 > hi) 2556156321Sdamien bbp17 = hi; 2557156321Sdamien } else if (cca < 100) { 2558156321Sdamien if (--bbp17 < lo) 2559156321Sdamien bbp17 = lo; 2560156321Sdamien } 2561156321Sdamien } 2562156321Sdamien 2563156321Sdamien if (bbp17 != sc->bbp17) { 2564156321Sdamien rt2661_bbp_write(sc, 17, bbp17); 2565156321Sdamien sc->bbp17 = bbp17; 2566156321Sdamien } 2567156321Sdamien} 2568156321Sdamien 2569156321Sdamien/* 2570156321Sdamien * Enter/Leave radar detection mode. 2571156321Sdamien * This is for 802.11h additional regulatory domains. 2572156321Sdamien */ 2573156321Sdamienstatic void 2574156321Sdamienrt2661_radar_start(struct rt2661_softc *sc) 2575156321Sdamien{ 2576156321Sdamien uint32_t tmp; 2577156321Sdamien 2578156321Sdamien /* disable Rx */ 2579156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR0); 2580156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); 2581156321Sdamien 2582156321Sdamien rt2661_bbp_write(sc, 82, 0x20); 2583156321Sdamien rt2661_bbp_write(sc, 83, 0x00); 2584156321Sdamien rt2661_bbp_write(sc, 84, 0x40); 2585156321Sdamien 2586156321Sdamien /* save current BBP registers values */ 2587156321Sdamien sc->bbp18 = rt2661_bbp_read(sc, 18); 2588156321Sdamien sc->bbp21 = rt2661_bbp_read(sc, 21); 2589156321Sdamien sc->bbp22 = rt2661_bbp_read(sc, 22); 2590156321Sdamien sc->bbp16 = rt2661_bbp_read(sc, 16); 2591156321Sdamien sc->bbp17 = rt2661_bbp_read(sc, 17); 2592156321Sdamien sc->bbp64 = rt2661_bbp_read(sc, 64); 2593156321Sdamien 2594156321Sdamien rt2661_bbp_write(sc, 18, 0xff); 2595156321Sdamien rt2661_bbp_write(sc, 21, 0x3f); 2596156321Sdamien rt2661_bbp_write(sc, 22, 0x3f); 2597156321Sdamien rt2661_bbp_write(sc, 16, 0xbd); 2598156321Sdamien rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34); 2599156321Sdamien rt2661_bbp_write(sc, 64, 0x21); 2600156321Sdamien 2601156321Sdamien /* restore Rx filter */ 2602156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); 2603156321Sdamien} 2604156321Sdamien 2605156321Sdamienstatic int 2606156321Sdamienrt2661_radar_stop(struct rt2661_softc *sc) 2607156321Sdamien{ 2608156321Sdamien uint8_t bbp66; 2609156321Sdamien 2610156321Sdamien /* read radar detection result */ 2611156321Sdamien bbp66 = rt2661_bbp_read(sc, 66); 2612156321Sdamien 2613156321Sdamien /* restore BBP registers values */ 2614156321Sdamien rt2661_bbp_write(sc, 16, sc->bbp16); 2615156321Sdamien rt2661_bbp_write(sc, 17, sc->bbp17); 2616156321Sdamien rt2661_bbp_write(sc, 18, sc->bbp18); 2617156321Sdamien rt2661_bbp_write(sc, 21, sc->bbp21); 2618156321Sdamien rt2661_bbp_write(sc, 22, sc->bbp22); 2619156321Sdamien rt2661_bbp_write(sc, 64, sc->bbp64); 2620156321Sdamien 2621156321Sdamien return bbp66 == 1; 2622156321Sdamien} 2623156321Sdamien#endif 2624156321Sdamien 2625156321Sdamienstatic int 2626178354Ssamrt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap) 2627156321Sdamien{ 2628178354Ssam struct ieee80211com *ic = vap->iv_ic; 2629156321Sdamien struct rt2661_tx_desc desc; 2630156321Sdamien struct mbuf *m0; 2631156321Sdamien int rate; 2632156321Sdamien 2633288636Sadrian if ((m0 = ieee80211_beacon_alloc(vap->iv_bss))== NULL) { 2634156321Sdamien device_printf(sc->sc_dev, "could not allocate beacon frame\n"); 2635156321Sdamien return ENOBUFS; 2636156321Sdamien } 2637156321Sdamien 2638156321Sdamien /* send beacons at the lowest available rate */ 2639178354Ssam rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2; 2640156321Sdamien 2641156321Sdamien rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ, 2642156321Sdamien m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT); 2643156321Sdamien 2644156321Sdamien /* copy the first 24 bytes of Tx descriptor into NIC memory */ 2645156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24); 2646156321Sdamien 2647156321Sdamien /* copy beacon header and payload into NIC memory */ 2648156321Sdamien RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24, 2649156321Sdamien mtod(m0, uint8_t *), m0->m_pkthdr.len); 2650156321Sdamien 2651156321Sdamien m_freem(m0); 2652156321Sdamien 2653156321Sdamien return 0; 2654156321Sdamien} 2655156321Sdamien 2656156321Sdamien/* 2657156321Sdamien * Enable TSF synchronization and tell h/w to start sending beacons for IBSS 2658156321Sdamien * and HostAP operating modes. 2659156321Sdamien */ 2660156321Sdamienstatic void 2661156321Sdamienrt2661_enable_tsf_sync(struct rt2661_softc *sc) 2662156321Sdamien{ 2663287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2664178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2665156321Sdamien uint32_t tmp; 2666156321Sdamien 2667178354Ssam if (vap->iv_opmode != IEEE80211_M_STA) { 2668156321Sdamien /* 2669156321Sdamien * Change default 16ms TBTT adjustment to 8ms. 2670156321Sdamien * Must be done before enabling beacon generation. 2671156321Sdamien */ 2672156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); 2673156321Sdamien } 2674156321Sdamien 2675156321Sdamien tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; 2676156321Sdamien 2677156321Sdamien /* set beacon interval (in 1/16ms unit) */ 2678178354Ssam tmp |= vap->iv_bss->ni_intval * 16; 2679156321Sdamien 2680156321Sdamien tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT; 2681178354Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2682156321Sdamien tmp |= RT2661_TSF_MODE(1); 2683156321Sdamien else 2684156321Sdamien tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON; 2685156321Sdamien 2686156321Sdamien RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); 2687156321Sdamien} 2688156321Sdamien 2689192468Ssamstatic void 2690192468Ssamrt2661_enable_tsf(struct rt2661_softc *sc) 2691192468Ssam{ 2692192468Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, 2693192468Ssam (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000) 2694192468Ssam | RT2661_TSF_TICKING | RT2661_TSF_MODE(2)); 2695192468Ssam} 2696192468Ssam 2697156321Sdamien/* 2698156321Sdamien * Retrieve the "Received Signal Strength Indicator" from the raw values 2699156321Sdamien * contained in Rx descriptors. The computation depends on which band the 2700156321Sdamien * frame was received. Correction values taken from the reference driver. 2701156321Sdamien */ 2702156321Sdamienstatic int 2703156321Sdamienrt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) 2704156321Sdamien{ 2705156321Sdamien int lna, agc, rssi; 2706156321Sdamien 2707156321Sdamien lna = (raw >> 5) & 0x3; 2708156321Sdamien agc = raw & 0x1f; 2709156321Sdamien 2710170530Ssam if (lna == 0) { 2711170530Ssam /* 2712170530Ssam * No mapping available. 2713170530Ssam * 2714170530Ssam * NB: Since RSSI is relative to noise floor, -1 is 2715170530Ssam * adequate for caller to know error happened. 2716170530Ssam */ 2717170530Ssam return -1; 2718170530Ssam } 2719156321Sdamien 2720170530Ssam rssi = (2 * agc) - RT2661_NOISE_FLOOR; 2721170530Ssam 2722156321Sdamien if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { 2723156321Sdamien rssi += sc->rssi_2ghz_corr; 2724156321Sdamien 2725156321Sdamien if (lna == 1) 2726156321Sdamien rssi -= 64; 2727156321Sdamien else if (lna == 2) 2728156321Sdamien rssi -= 74; 2729156321Sdamien else if (lna == 3) 2730156321Sdamien rssi -= 90; 2731156321Sdamien } else { 2732156321Sdamien rssi += sc->rssi_5ghz_corr; 2733156321Sdamien 2734156321Sdamien if (lna == 1) 2735156321Sdamien rssi -= 64; 2736156321Sdamien else if (lna == 2) 2737156321Sdamien rssi -= 86; 2738156321Sdamien else if (lna == 3) 2739156321Sdamien rssi -= 100; 2740156321Sdamien } 2741156321Sdamien return rssi; 2742156321Sdamien} 2743170530Ssam 2744170530Ssamstatic void 2745170530Ssamrt2661_scan_start(struct ieee80211com *ic) 2746170530Ssam{ 2747287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2748170530Ssam uint32_t tmp; 2749170530Ssam 2750170530Ssam /* abort TSF synchronization */ 2751170530Ssam tmp = RAL_READ(sc, RT2661_TXRX_CSR9); 2752170530Ssam RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff); 2753287197Sglebius rt2661_set_bssid(sc, ieee80211broadcastaddr); 2754170530Ssam} 2755170530Ssam 2756170530Ssamstatic void 2757170530Ssamrt2661_scan_end(struct ieee80211com *ic) 2758170530Ssam{ 2759287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2760178354Ssam struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2761170530Ssam 2762170530Ssam rt2661_enable_tsf_sync(sc); 2763170530Ssam /* XXX keep local copy */ 2764178354Ssam rt2661_set_bssid(sc, vap->iv_bss->ni_bssid); 2765170530Ssam} 2766170530Ssam 2767170530Ssamstatic void 2768300752Savosrt2661_getradiocaps(struct ieee80211com *ic, 2769300752Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 2770300752Savos{ 2771300752Savos struct rt2661_softc *sc = ic->ic_softc; 2772300752Savos uint8_t bands[IEEE80211_MODE_BYTES]; 2773300752Savos 2774300752Savos memset(bands, 0, sizeof(bands)); 2775300752Savos setbit(bands, IEEE80211_MODE_11B); 2776300752Savos setbit(bands, IEEE80211_MODE_11G); 2777343976Savos ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 2778300752Savos 2779300752Savos if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) { 2780300752Savos setbit(bands, IEEE80211_MODE_11A); 2781300752Savos ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, 2782300752Savos rt2661_chan_5ghz, nitems(rt2661_chan_5ghz), bands, 0); 2783300752Savos } 2784300752Savos} 2785300752Savos 2786300752Savosstatic void 2787170530Ssamrt2661_set_channel(struct ieee80211com *ic) 2788170530Ssam{ 2789287197Sglebius struct rt2661_softc *sc = ic->ic_softc; 2790170530Ssam 2791170530Ssam RAL_LOCK(sc); 2792170530Ssam rt2661_set_chan(sc, ic->ic_curchan); 2793170530Ssam RAL_UNLOCK(sc); 2794170530Ssam 2795170530Ssam} 2796