ql_os.c revision 263102 
1/*
2 * Copyright (c) 2013-2014 Qlogic Corporation
3 * All rights reserved.
4 *
5 *  Redistribution and use in source and binary forms, with or without
6 *  modification, are permitted provided that the following conditions
7 *  are met:
8 *
9 *  1. Redistributions of source code must retain the above copyright
10 *     notice, this list of conditions and the following disclaimer.
11 *  2. Redistributions in binary form must reproduce the above copyright
12 *     notice, this list of conditions and the following disclaimer in the
13 *     documentation and/or other materials provided with the distribution.
14 *
15 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 *  and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 *  POSSIBILITY OF SUCH DAMAGE.
26 */
27
28/*
29 * File: ql_os.c
30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/qlxgbe/ql_os.c 263102 2014-03-13 03:42:24Z glebius $");
35
36
37#include "ql_os.h"
38#include "ql_hw.h"
39#include "ql_def.h"
40#include "ql_inline.h"
41#include "ql_ver.h"
42#include "ql_glbl.h"
43#include "ql_dbg.h"
44#include <sys/smp.h>
45
46/*
47 * Some PCI Configuration Space Related Defines
48 */
49
50#ifndef PCI_VENDOR_QLOGIC
51#define PCI_VENDOR_QLOGIC	0x1077
52#endif
53
54#ifndef PCI_PRODUCT_QLOGIC_ISP8030
55#define PCI_PRODUCT_QLOGIC_ISP8030	0x8030
56#endif
57
58#define PCI_QLOGIC_ISP8030 \
59	((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC)
60
61/*
62 * static functions
63 */
64static int qla_alloc_parent_dma_tag(qla_host_t *ha);
65static void qla_free_parent_dma_tag(qla_host_t *ha);
66static int qla_alloc_xmt_bufs(qla_host_t *ha);
67static void qla_free_xmt_bufs(qla_host_t *ha);
68static int qla_alloc_rcv_bufs(qla_host_t *ha);
69static void qla_free_rcv_bufs(qla_host_t *ha);
70static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb);
71
72static void qla_init_ifnet(device_t dev, qla_host_t *ha);
73static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS);
74static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS);
75static void qla_release(qla_host_t *ha);
76static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs,
77		int error);
78static void qla_stop(qla_host_t *ha);
79static int qla_send(qla_host_t *ha, struct mbuf **m_headp);
80static void qla_tx_done(void *context, int pending);
81static void qla_get_peer(qla_host_t *ha);
82static void qla_error_recovery(void *context, int pending);
83
84/*
85 * Hooks to the Operating Systems
86 */
87static int qla_pci_probe (device_t);
88static int qla_pci_attach (device_t);
89static int qla_pci_detach (device_t);
90
91static void qla_init(void *arg);
92static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
93static int qla_media_change(struct ifnet *ifp);
94static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr);
95static void qla_start(struct ifnet *ifp);
96
97static device_method_t qla_pci_methods[] = {
98	/* Device interface */
99	DEVMETHOD(device_probe, qla_pci_probe),
100	DEVMETHOD(device_attach, qla_pci_attach),
101	DEVMETHOD(device_detach, qla_pci_detach),
102	{ 0, 0 }
103};
104
105static driver_t qla_pci_driver = {
106	"ql", qla_pci_methods, sizeof (qla_host_t),
107};
108
109static devclass_t qla83xx_devclass;
110
111DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0);
112
113MODULE_DEPEND(qla83xx, pci, 1, 1, 1);
114MODULE_DEPEND(qla83xx, ether, 1, 1, 1);
115
116MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver");
117
118#define QL_STD_REPLENISH_THRES		0
119#define QL_JUMBO_REPLENISH_THRES	32
120
121
122static char dev_str[64];
123
124/*
125 * Name:	qla_pci_probe
126 * Function:	Validate the PCI device to be a QLA80XX device
127 */
128static int
129qla_pci_probe(device_t dev)
130{
131        switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
132        case PCI_QLOGIC_ISP8030:
133		snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d",
134			"Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function",
135			QLA_VERSION_MAJOR, QLA_VERSION_MINOR,
136			QLA_VERSION_BUILD);
137                device_set_desc(dev, dev_str);
138                break;
139        default:
140                return (ENXIO);
141        }
142
143        if (bootverbose)
144                printf("%s: %s\n ", __func__, dev_str);
145
146        return (BUS_PROBE_DEFAULT);
147}
148
149static void
150qla_add_sysctls(qla_host_t *ha)
151{
152        device_t dev = ha->pci_dev;
153
154        SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
155                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
156                OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW,
157                (void *)ha, 0,
158                qla_sysctl_get_stats, "I", "Statistics");
159
160        SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
161                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
162                OID_AUTO, "fw_version", CTLFLAG_RD,
163                &ha->fw_ver_str, 0, "firmware version");
164
165        SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
166                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
167                OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW,
168                (void *)ha, 0,
169                qla_sysctl_get_link_status, "I", "Link Status");
170
171	ha->dbg_level = 0;
172        SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
173                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
174                OID_AUTO, "debug", CTLFLAG_RW,
175                &ha->dbg_level, ha->dbg_level, "Debug Level");
176
177	ha->std_replenish = QL_STD_REPLENISH_THRES;
178        SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
179                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
180                OID_AUTO, "std_replenish", CTLFLAG_RW,
181                &ha->std_replenish, ha->std_replenish,
182                "Threshold for Replenishing Standard Frames");
183
184        SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
185                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
186                OID_AUTO, "ipv4_lro",
187                CTLFLAG_RD, &ha->ipv4_lro,
188                "number of ipv4 lro completions");
189
190        SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
191                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
192                OID_AUTO, "ipv6_lro",
193                CTLFLAG_RD, &ha->ipv6_lro,
194                "number of ipv6 lro completions");
195
196	SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
197		SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
198		OID_AUTO, "tx_tso_frames",
199		CTLFLAG_RD, &ha->tx_tso_frames,
200		"number of Tx TSO Frames");
201
202	SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
203                SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
204		OID_AUTO, "hw_vlan_tx_frames",
205		CTLFLAG_RD, &ha->hw_vlan_tx_frames,
206		"number of Tx VLAN Frames");
207
208        return;
209}
210
211static void
212qla_watchdog(void *arg)
213{
214	qla_host_t *ha = arg;
215	qla_hw_t *hw;
216	struct ifnet *ifp;
217	uint32_t i;
218	qla_hw_tx_cntxt_t *hw_tx_cntxt;
219
220	hw = &ha->hw;
221	ifp = ha->ifp;
222
223        if (ha->flags.qla_watchdog_exit) {
224		ha->qla_watchdog_exited = 1;
225		return;
226	}
227	ha->qla_watchdog_exited = 0;
228
229	if (!ha->flags.qla_watchdog_pause) {
230		if (ql_hw_check_health(ha) || ha->qla_initiate_recovery ||
231			(ha->msg_from_peer == QL_PEER_MSG_RESET)) {
232			ha->qla_watchdog_paused = 1;
233			ha->flags.qla_watchdog_pause = 1;
234			ha->qla_initiate_recovery = 0;
235			ha->err_inject = 0;
236			taskqueue_enqueue(ha->err_tq, &ha->err_task);
237		} else {
238			for (i = 0; i < ha->hw.num_tx_rings; i++) {
239				hw_tx_cntxt = &hw->tx_cntxt[i];
240				if (qla_le32_to_host(*(hw_tx_cntxt->tx_cons)) !=
241					hw_tx_cntxt->txr_comp) {
242					taskqueue_enqueue(ha->tx_tq,
243						&ha->tx_task);
244					break;
245				}
246			}
247
248			if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) {
249				taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
250			}
251			ha->qla_watchdog_paused = 0;
252		}
253
254	} else {
255		ha->qla_watchdog_paused = 1;
256	}
257
258	ha->watchdog_ticks = ha->watchdog_ticks++ % 1000;
259	callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS,
260		qla_watchdog, ha);
261}
262
263/*
264 * Name:	qla_pci_attach
265 * Function:	attaches the device to the operating system
266 */
267static int
268qla_pci_attach(device_t dev)
269{
270	qla_host_t *ha = NULL;
271	uint32_t rsrc_len;
272	int i;
273
274	QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
275
276        if ((ha = device_get_softc(dev)) == NULL) {
277                device_printf(dev, "cannot get softc\n");
278                return (ENOMEM);
279        }
280
281        memset(ha, 0, sizeof (qla_host_t));
282
283        if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) {
284                device_printf(dev, "device is not ISP8030\n");
285                return (ENXIO);
286	}
287
288        ha->pci_func = pci_get_function(dev);
289
290        ha->pci_dev = dev;
291
292	pci_enable_busmaster(dev);
293
294	ha->reg_rid = PCIR_BAR(0);
295	ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid,
296				RF_ACTIVE);
297
298        if (ha->pci_reg == NULL) {
299                device_printf(dev, "unable to map any ports\n");
300                goto qla_pci_attach_err;
301        }
302
303	rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY,
304					ha->reg_rid);
305
306	mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF);
307
308	mtx_init(&ha->tx_lock, "qla83xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF);
309
310	qla_add_sysctls(ha);
311	ql_hw_add_sysctls(ha);
312
313	ha->flags.lock_init = 1;
314
315	ha->reg_rid1 = PCIR_BAR(2);
316	ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
317			&ha->reg_rid1, RF_ACTIVE);
318
319	ha->msix_count = pci_msix_count(dev);
320
321	if (ha->msix_count < (ha->hw.num_sds_rings + 1)) {
322		device_printf(dev, "%s: msix_count[%d] not enough\n", __func__,
323			ha->msix_count);
324		goto qla_pci_attach_err;
325	}
326
327	QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x"
328		" msix_count 0x%x pci_reg %p\n", __func__, ha,
329		ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg));
330
331	ha->msix_count = ha->hw.num_sds_rings + 1;
332
333	if (pci_alloc_msix(dev, &ha->msix_count)) {
334		device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__,
335			ha->msix_count);
336		ha->msix_count = 0;
337		goto qla_pci_attach_err;
338	}
339
340	ha->mbx_irq_rid = 1;
341	ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
342				&ha->mbx_irq_rid,
343				(RF_ACTIVE | RF_SHAREABLE));
344	if (ha->mbx_irq == NULL) {
345		device_printf(dev, "could not allocate mbx interrupt\n");
346		goto qla_pci_attach_err;
347	}
348	if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE),
349		NULL, ql_mbx_isr, ha, &ha->mbx_handle)) {
350		device_printf(dev, "could not setup mbx interrupt\n");
351		goto qla_pci_attach_err;
352	}
353
354
355	for (i = 0; i < ha->hw.num_sds_rings; i++) {
356		ha->irq_vec[i].sds_idx = i;
357                ha->irq_vec[i].ha = ha;
358                ha->irq_vec[i].irq_rid = 2 + i;
359
360		ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
361				&ha->irq_vec[i].irq_rid,
362				(RF_ACTIVE | RF_SHAREABLE));
363
364		if (ha->irq_vec[i].irq == NULL) {
365			device_printf(dev, "could not allocate interrupt\n");
366			goto qla_pci_attach_err;
367		}
368		if (bus_setup_intr(dev, ha->irq_vec[i].irq,
369			(INTR_TYPE_NET | INTR_MPSAFE),
370			NULL, ql_isr, &ha->irq_vec[i],
371			&ha->irq_vec[i].handle)) {
372			device_printf(dev, "could not setup interrupt\n");
373			goto qla_pci_attach_err;
374		}
375	}
376
377	printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus,
378		ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count);
379
380	/* initialize hardware */
381	if (ql_init_hw(ha)) {
382		device_printf(dev, "%s: ql_init_hw failed\n", __func__);
383		goto qla_pci_attach_err;
384	}
385
386	device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__,
387		ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
388		ha->fw_ver_build);
389        snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d",
390                        ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
391                        ha->fw_ver_build);
392
393	ql_read_mac_addr(ha);
394
395	/* allocate parent dma tag */
396	if (qla_alloc_parent_dma_tag(ha)) {
397		device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n",
398			__func__);
399		goto qla_pci_attach_err;
400	}
401
402	/* alloc all dma buffers */
403	if (ql_alloc_dma(ha)) {
404		device_printf(dev, "%s: ql_alloc_dma failed\n", __func__);
405		goto qla_pci_attach_err;
406	}
407	qla_get_peer(ha);
408
409	/* create the o.s ethernet interface */
410	qla_init_ifnet(dev, ha);
411
412	ha->flags.qla_watchdog_active = 1;
413	ha->flags.qla_watchdog_pause = 1;
414
415
416	TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha);
417	ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT,
418			taskqueue_thread_enqueue, &ha->tx_tq);
419	taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq",
420		device_get_nameunit(ha->pci_dev));
421
422	callout_init(&ha->tx_callout, TRUE);
423	ha->flags.qla_callout_init = 1;
424
425	/* create ioctl device interface */
426	if (ql_make_cdev(ha)) {
427		device_printf(dev, "%s: ql_make_cdev failed\n", __func__);
428		goto qla_pci_attach_err;
429	}
430
431	callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS,
432		qla_watchdog, ha);
433
434	TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha);
435	ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT,
436			taskqueue_thread_enqueue, &ha->err_tq);
437	taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq",
438		device_get_nameunit(ha->pci_dev));
439
440	QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__));
441        return (0);
442
443qla_pci_attach_err:
444
445	qla_release(ha);
446
447	QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__));
448        return (ENXIO);
449}
450
451/*
452 * Name:	qla_pci_detach
453 * Function:	Unhooks the device from the operating system
454 */
455static int
456qla_pci_detach(device_t dev)
457{
458	qla_host_t *ha = NULL;
459	struct ifnet *ifp;
460
461	QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
462
463        if ((ha = device_get_softc(dev)) == NULL) {
464                device_printf(dev, "cannot get softc\n");
465                return (ENOMEM);
466        }
467
468	ifp = ha->ifp;
469
470	(void)QLA_LOCK(ha, __func__, 0);
471	qla_stop(ha);
472	QLA_UNLOCK(ha, __func__);
473
474	qla_release(ha);
475
476	QL_DPRINT2(ha, (dev, "%s: exit\n", __func__));
477
478        return (0);
479}
480
481/*
482 * SYSCTL Related Callbacks
483 */
484static int
485qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS)
486{
487	int err, ret = 0;
488	qla_host_t *ha;
489
490	err = sysctl_handle_int(oidp, &ret, 0, req);
491
492	if (err || !req->newptr)
493		return (err);
494
495	if (ret == 1) {
496		ha = (qla_host_t *)arg1;
497		ql_get_stats(ha);
498	}
499	return (err);
500}
501static int
502qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS)
503{
504	int err, ret = 0;
505	qla_host_t *ha;
506
507	err = sysctl_handle_int(oidp, &ret, 0, req);
508
509	if (err || !req->newptr)
510		return (err);
511
512	if (ret == 1) {
513		ha = (qla_host_t *)arg1;
514		ql_hw_link_status(ha);
515	}
516	return (err);
517}
518
519/*
520 * Name:	qla_release
521 * Function:	Releases the resources allocated for the device
522 */
523static void
524qla_release(qla_host_t *ha)
525{
526	device_t dev;
527	int i;
528
529	dev = ha->pci_dev;
530
531	if (ha->err_tq) {
532		taskqueue_drain(ha->err_tq, &ha->err_task);
533		taskqueue_free(ha->err_tq);
534	}
535
536	if (ha->tx_tq) {
537		taskqueue_drain(ha->tx_tq, &ha->tx_task);
538		taskqueue_free(ha->tx_tq);
539	}
540
541	ql_del_cdev(ha);
542
543	if (ha->flags.qla_watchdog_active) {
544		ha->flags.qla_watchdog_exit = 1;
545
546		while (ha->qla_watchdog_exited == 0)
547			qla_mdelay(__func__, 1);
548	}
549
550	if (ha->flags.qla_callout_init)
551		callout_stop(&ha->tx_callout);
552
553	if (ha->ifp != NULL)
554		ether_ifdetach(ha->ifp);
555
556	ql_free_dma(ha);
557	qla_free_parent_dma_tag(ha);
558
559	if (ha->mbx_handle)
560		(void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle);
561
562	if (ha->mbx_irq)
563		(void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid,
564				ha->mbx_irq);
565
566	for (i = 0; i < ha->hw.num_sds_rings; i++) {
567
568		if (ha->irq_vec[i].handle) {
569			(void)bus_teardown_intr(dev, ha->irq_vec[i].irq,
570					ha->irq_vec[i].handle);
571		}
572
573		if (ha->irq_vec[i].irq) {
574			(void)bus_release_resource(dev, SYS_RES_IRQ,
575				ha->irq_vec[i].irq_rid,
576				ha->irq_vec[i].irq);
577		}
578	}
579
580	if (ha->msix_count)
581		pci_release_msi(dev);
582
583	if (ha->flags.lock_init) {
584		mtx_destroy(&ha->tx_lock);
585		mtx_destroy(&ha->hw_lock);
586	}
587
588        if (ha->pci_reg)
589                (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid,
590				ha->pci_reg);
591
592        if (ha->pci_reg1)
593                (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1,
594				ha->pci_reg1);
595}
596
597/*
598 * DMA Related Functions
599 */
600
601static void
602qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
603{
604        *((bus_addr_t *)arg) = 0;
605
606        if (error) {
607                printf("%s: bus_dmamap_load failed (%d)\n", __func__, error);
608                return;
609	}
610
611        *((bus_addr_t *)arg) = segs[0].ds_addr;
612
613	return;
614}
615
616int
617ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf)
618{
619        int             ret = 0;
620        device_t        dev;
621        bus_addr_t      b_addr;
622
623        dev = ha->pci_dev;
624
625        QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
626
627        ret = bus_dma_tag_create(
628                        ha->parent_tag,/* parent */
629                        dma_buf->alignment,
630                        ((bus_size_t)(1ULL << 32)),/* boundary */
631                        BUS_SPACE_MAXADDR,      /* lowaddr */
632                        BUS_SPACE_MAXADDR,      /* highaddr */
633                        NULL, NULL,             /* filter, filterarg */
634                        dma_buf->size,          /* maxsize */
635                        1,                      /* nsegments */
636                        dma_buf->size,          /* maxsegsize */
637                        0,                      /* flags */
638                        NULL, NULL,             /* lockfunc, lockarg */
639                        &dma_buf->dma_tag);
640
641        if (ret) {
642                device_printf(dev, "%s: could not create dma tag\n", __func__);
643                goto ql_alloc_dmabuf_exit;
644        }
645        ret = bus_dmamem_alloc(dma_buf->dma_tag,
646                        (void **)&dma_buf->dma_b,
647                        (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT),
648                        &dma_buf->dma_map);
649        if (ret) {
650                bus_dma_tag_destroy(dma_buf->dma_tag);
651                device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__);
652                goto ql_alloc_dmabuf_exit;
653        }
654
655        ret = bus_dmamap_load(dma_buf->dma_tag,
656                        dma_buf->dma_map,
657                        dma_buf->dma_b,
658                        dma_buf->size,
659                        qla_dmamap_callback,
660                        &b_addr, BUS_DMA_NOWAIT);
661
662        if (ret || !b_addr) {
663                bus_dma_tag_destroy(dma_buf->dma_tag);
664                bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b,
665                        dma_buf->dma_map);
666                ret = -1;
667                goto ql_alloc_dmabuf_exit;
668        }
669
670        dma_buf->dma_addr = b_addr;
671
672ql_alloc_dmabuf_exit:
673        QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n",
674                __func__, ret, (void *)dma_buf->dma_tag,
675                (void *)dma_buf->dma_map, (void *)dma_buf->dma_b,
676		dma_buf->size));
677
678        return ret;
679}
680
681void
682ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf)
683{
684        bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map);
685        bus_dma_tag_destroy(dma_buf->dma_tag);
686}
687
688static int
689qla_alloc_parent_dma_tag(qla_host_t *ha)
690{
691	int		ret;
692	device_t	dev;
693
694	dev = ha->pci_dev;
695
696        /*
697         * Allocate parent DMA Tag
698         */
699        ret = bus_dma_tag_create(
700                        bus_get_dma_tag(dev),   /* parent */
701                        1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */
702                        BUS_SPACE_MAXADDR,      /* lowaddr */
703                        BUS_SPACE_MAXADDR,      /* highaddr */
704                        NULL, NULL,             /* filter, filterarg */
705                        BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
706                        0,                      /* nsegments */
707                        BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
708                        0,                      /* flags */
709                        NULL, NULL,             /* lockfunc, lockarg */
710                        &ha->parent_tag);
711
712        if (ret) {
713                device_printf(dev, "%s: could not create parent dma tag\n",
714                        __func__);
715		return (-1);
716        }
717
718        ha->flags.parent_tag = 1;
719
720	return (0);
721}
722
723static void
724qla_free_parent_dma_tag(qla_host_t *ha)
725{
726        if (ha->flags.parent_tag) {
727                bus_dma_tag_destroy(ha->parent_tag);
728                ha->flags.parent_tag = 0;
729        }
730}
731
732/*
733 * Name: qla_init_ifnet
734 * Function: Creates the Network Device Interface and Registers it with the O.S
735 */
736
737static void
738qla_init_ifnet(device_t dev, qla_host_t *ha)
739{
740	struct ifnet *ifp;
741
742	QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
743
744	ifp = ha->ifp = if_alloc(IFT_ETHER);
745
746	if (ifp == NULL)
747		panic("%s: cannot if_alloc()\n", device_get_nameunit(dev));
748
749	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
750
751	ifp->if_baudrate = IF_Gbps(10);
752	ifp->if_capabilities = IFCAP_LINKSTATE;
753
754	ifp->if_init = qla_init;
755	ifp->if_softc = ha;
756	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
757	ifp->if_ioctl = qla_ioctl;
758	ifp->if_start = qla_start;
759
760	IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha));
761	ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha);
762	IFQ_SET_READY(&ifp->if_snd);
763
764	ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
765
766	ether_ifattach(ifp, qla_get_mac_addr(ha));
767
768	ifp->if_capabilities = IFCAP_HWCSUM |
769				IFCAP_TSO4 |
770				IFCAP_JUMBO_MTU;
771
772	ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
773	ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
774
775	ifp->if_capenable = ifp->if_capabilities;
776
777	ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
778
779	ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status);
780
781	ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0,
782		NULL);
783	ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL);
784
785	ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO));
786
787	QL_DPRINT2(ha, (dev, "%s: exit\n", __func__));
788
789	return;
790}
791
792static void
793qla_init_locked(qla_host_t *ha)
794{
795	struct ifnet *ifp = ha->ifp;
796
797	qla_stop(ha);
798
799	if (qla_alloc_xmt_bufs(ha) != 0)
800		return;
801
802	if (qla_alloc_rcv_bufs(ha) != 0)
803		return;
804
805	bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN);
806
807	ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO;
808
809	ha->flags.stop_rcv = 0;
810 	if (ql_init_hw_if(ha) == 0) {
811		ifp = ha->ifp;
812		ifp->if_drv_flags |= IFF_DRV_RUNNING;
813		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
814		ha->flags.qla_watchdog_pause = 0;
815		ha->hw_vlan_tx_frames = 0;
816		ha->tx_tso_frames = 0;
817	}
818
819	return;
820}
821
822static void
823qla_init(void *arg)
824{
825	qla_host_t *ha;
826
827	ha = (qla_host_t *)arg;
828
829	QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
830
831	(void)QLA_LOCK(ha, __func__, 0);
832	qla_init_locked(ha);
833	QLA_UNLOCK(ha, __func__);
834
835	QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
836}
837
838static int
839qla_set_multi(qla_host_t *ha, uint32_t add_multi)
840{
841	uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN];
842	struct ifmultiaddr *ifma;
843	int mcnt = 0;
844	struct ifnet *ifp = ha->ifp;
845	int ret = 0;
846
847	if_maddr_rlock(ifp);
848
849	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
850
851		if (ifma->ifma_addr->sa_family != AF_LINK)
852			continue;
853
854		if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS)
855			break;
856
857		bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr),
858			&mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN);
859
860		mcnt++;
861	}
862
863	if_maddr_runlock(ifp);
864
865	if (QLA_LOCK(ha, __func__, 1) == 0) {
866		ret = ql_hw_set_multi(ha, mta, mcnt, add_multi);
867		QLA_UNLOCK(ha, __func__);
868	}
869
870	return (ret);
871}
872
873static int
874qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
875{
876	int ret = 0;
877	struct ifreq *ifr = (struct ifreq *)data;
878	struct ifaddr *ifa = (struct ifaddr *)data;
879	qla_host_t *ha;
880
881	ha = (qla_host_t *)ifp->if_softc;
882
883	switch (cmd) {
884	case SIOCSIFADDR:
885		QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n",
886			__func__, cmd));
887
888		if (ifa->ifa_addr->sa_family == AF_INET) {
889			ifp->if_flags |= IFF_UP;
890			if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
891				(void)QLA_LOCK(ha, __func__, 0);
892				qla_init_locked(ha);
893				QLA_UNLOCK(ha, __func__);
894			}
895			QL_DPRINT4(ha, (ha->pci_dev,
896				"%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n",
897				__func__, cmd,
898				ntohl(IA_SIN(ifa)->sin_addr.s_addr)));
899
900			arp_ifinit(ifp, ifa);
901		} else {
902			ether_ioctl(ifp, cmd, data);
903		}
904		break;
905
906	case SIOCSIFMTU:
907		QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n",
908			__func__, cmd));
909
910		if (ifr->ifr_mtu > QLA_MAX_MTU) {
911			ret = EINVAL;
912		} else {
913			(void) QLA_LOCK(ha, __func__, 0);
914			ifp->if_mtu = ifr->ifr_mtu;
915			ha->max_frame_size =
916				ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
917			if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
918				ret = ql_set_max_mtu(ha, ha->max_frame_size,
919					ha->hw.rcv_cntxt_id);
920			}
921
922			if (ifp->if_mtu > ETHERMTU)
923				ha->std_replenish = QL_JUMBO_REPLENISH_THRES;
924			else
925				ha->std_replenish = QL_STD_REPLENISH_THRES;
926
927
928			QLA_UNLOCK(ha, __func__);
929
930			if (ret)
931				ret = EINVAL;
932		}
933
934		break;
935
936	case SIOCSIFFLAGS:
937		QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n",
938			__func__, cmd));
939
940		(void)QLA_LOCK(ha, __func__, 0);
941
942		if (ifp->if_flags & IFF_UP) {
943			if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
944				if ((ifp->if_flags ^ ha->if_flags) &
945					IFF_PROMISC) {
946					ret = ql_set_promisc(ha);
947				} else if ((ifp->if_flags ^ ha->if_flags) &
948					IFF_ALLMULTI) {
949					ret = ql_set_allmulti(ha);
950				}
951			} else {
952				qla_init_locked(ha);
953				ha->max_frame_size = ifp->if_mtu +
954					ETHER_HDR_LEN + ETHER_CRC_LEN;
955				ret = ql_set_max_mtu(ha, ha->max_frame_size,
956					ha->hw.rcv_cntxt_id);
957			}
958		} else {
959			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
960				qla_stop(ha);
961			ha->if_flags = ifp->if_flags;
962		}
963
964		QLA_UNLOCK(ha, __func__);
965		break;
966
967	case SIOCADDMULTI:
968		QL_DPRINT4(ha, (ha->pci_dev,
969			"%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd));
970
971		if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
972			if (qla_set_multi(ha, 1))
973				ret = EINVAL;
974		}
975		break;
976
977	case SIOCDELMULTI:
978		QL_DPRINT4(ha, (ha->pci_dev,
979			"%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd));
980
981		if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
982			if (qla_set_multi(ha, 0))
983				ret = EINVAL;
984		}
985		break;
986
987	case SIOCSIFMEDIA:
988	case SIOCGIFMEDIA:
989		QL_DPRINT4(ha, (ha->pci_dev,
990			"%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n",
991			__func__, cmd));
992		ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd);
993		break;
994
995	case SIOCSIFCAP:
996	{
997		int mask = ifr->ifr_reqcap ^ ifp->if_capenable;
998
999		QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n",
1000			__func__, cmd));
1001
1002		if (mask & IFCAP_HWCSUM)
1003			ifp->if_capenable ^= IFCAP_HWCSUM;
1004		if (mask & IFCAP_TSO4)
1005			ifp->if_capenable ^= IFCAP_TSO4;
1006		if (mask & IFCAP_VLAN_HWTAGGING)
1007			ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1008		if (mask & IFCAP_VLAN_HWTSO)
1009			ifp->if_capenable ^= IFCAP_VLAN_HWTSO;
1010
1011		if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1012			qla_init(ha);
1013
1014		VLAN_CAPABILITIES(ifp);
1015		break;
1016	}
1017
1018	default:
1019		QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n",
1020			__func__, cmd));
1021		ret = ether_ioctl(ifp, cmd, data);
1022		break;
1023	}
1024
1025	return (ret);
1026}
1027
1028static int
1029qla_media_change(struct ifnet *ifp)
1030{
1031	qla_host_t *ha;
1032	struct ifmedia *ifm;
1033	int ret = 0;
1034
1035	ha = (qla_host_t *)ifp->if_softc;
1036
1037	QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1038
1039	ifm = &ha->media;
1040
1041	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1042		ret = EINVAL;
1043
1044	QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
1045
1046	return (ret);
1047}
1048
1049static void
1050qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1051{
1052	qla_host_t *ha;
1053
1054	ha = (qla_host_t *)ifp->if_softc;
1055
1056	QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1057
1058	ifmr->ifm_status = IFM_AVALID;
1059	ifmr->ifm_active = IFM_ETHER;
1060
1061	ql_update_link_state(ha);
1062	if (ha->hw.link_up) {
1063		ifmr->ifm_status |= IFM_ACTIVE;
1064		ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha));
1065	}
1066
1067	QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\
1068		(ha->hw.link_up ? "link_up" : "link_down")));
1069
1070	return;
1071}
1072
1073static void
1074qla_start(struct ifnet *ifp)
1075{
1076	struct mbuf    *m_head;
1077	qla_host_t *ha = (qla_host_t *)ifp->if_softc;
1078
1079	QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__));
1080
1081	if (!mtx_trylock(&ha->tx_lock)) {
1082		QL_DPRINT8(ha, (ha->pci_dev,
1083			"%s: mtx_trylock(&ha->tx_lock) failed\n", __func__));
1084		return;
1085	}
1086
1087	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
1088		IFF_DRV_RUNNING) {
1089		QL_DPRINT8(ha,
1090			(ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__));
1091		QLA_TX_UNLOCK(ha);
1092		return;
1093	}
1094
1095	if (!ha->watchdog_ticks)
1096		ql_update_link_state(ha);
1097
1098	if (!ha->hw.link_up) {
1099		QL_DPRINT8(ha, (ha->pci_dev, "%s: link down\n", __func__));
1100		QLA_TX_UNLOCK(ha);
1101		return;
1102	}
1103
1104	while (ifp->if_snd.ifq_head != NULL) {
1105		IF_DEQUEUE(&ifp->if_snd, m_head);
1106
1107		if (m_head == NULL) {
1108			QL_DPRINT8(ha, (ha->pci_dev, "%s: m_head == NULL\n",
1109				__func__));
1110			break;
1111		}
1112
1113		if (qla_send(ha, &m_head)) {
1114			if (m_head == NULL)
1115				break;
1116			QL_DPRINT8(ha, (ha->pci_dev, "%s: PREPEND\n", __func__));
1117			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1118			IF_PREPEND(&ifp->if_snd, m_head);
1119			break;
1120		}
1121		/* Send a copy of the frame to the BPF listener */
1122		ETHER_BPF_MTAP(ifp, m_head);
1123	}
1124	QLA_TX_UNLOCK(ha);
1125	QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__));
1126	return;
1127}
1128
1129static int
1130qla_send(qla_host_t *ha, struct mbuf **m_headp)
1131{
1132	bus_dma_segment_t	segs[QLA_MAX_SEGMENTS];
1133	bus_dmamap_t		map;
1134	int			nsegs;
1135	int			ret = -1;
1136	uint32_t		tx_idx;
1137	struct mbuf		*m_head = *m_headp;
1138	uint32_t		txr_idx = ha->txr_idx;
1139
1140	QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__));
1141
1142	if (m_head->m_flags & M_FLOWID)
1143		txr_idx = m_head->m_pkthdr.flowid & (ha->hw.num_tx_rings - 1);
1144
1145	tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next;
1146	map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map;
1147
1148	ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs,
1149			BUS_DMA_NOWAIT);
1150
1151	if (ret == EFBIG) {
1152
1153		struct mbuf *m;
1154
1155		QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__,
1156			m_head->m_pkthdr.len));
1157
1158		m = m_defrag(m_head, M_NOWAIT);
1159		if (m == NULL) {
1160			ha->err_tx_defrag++;
1161			m_freem(m_head);
1162			*m_headp = NULL;
1163			device_printf(ha->pci_dev,
1164				"%s: m_defrag() = NULL [%d]\n",
1165				__func__, ret);
1166			return (ENOBUFS);
1167		}
1168		m_head = m;
1169		*m_headp = m_head;
1170
1171		if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head,
1172					segs, &nsegs, BUS_DMA_NOWAIT))) {
1173
1174			ha->err_tx_dmamap_load++;
1175
1176			device_printf(ha->pci_dev,
1177				"%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n",
1178				__func__, ret, m_head->m_pkthdr.len);
1179
1180			if (ret != ENOMEM) {
1181				m_freem(m_head);
1182				*m_headp = NULL;
1183			}
1184			return (ret);
1185		}
1186
1187	} else if (ret) {
1188
1189		ha->err_tx_dmamap_load++;
1190
1191		device_printf(ha->pci_dev,
1192			"%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n",
1193			__func__, ret, m_head->m_pkthdr.len);
1194
1195		if (ret != ENOMEM) {
1196			m_freem(m_head);
1197			*m_headp = NULL;
1198		}
1199		return (ret);
1200	}
1201
1202	QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet"));
1203
1204	bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE);
1205
1206        if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx))) {
1207
1208		ha->tx_ring[txr_idx].count++;
1209		ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head;
1210	} else {
1211		if (ret == EINVAL) {
1212			if (m_head)
1213				m_freem(m_head);
1214			*m_headp = NULL;
1215		}
1216	}
1217
1218	QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__));
1219	return (ret);
1220}
1221
1222static void
1223qla_stop(qla_host_t *ha)
1224{
1225	struct ifnet *ifp = ha->ifp;
1226	device_t	dev;
1227
1228	dev = ha->pci_dev;
1229
1230	ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
1231
1232	ha->flags.qla_watchdog_pause = 1;
1233
1234	while (!ha->qla_watchdog_paused)
1235		qla_mdelay(__func__, 1);
1236
1237	ha->flags.stop_rcv = 1;
1238	ql_hw_stop_rcv(ha);
1239
1240	ql_del_hw_if(ha);
1241
1242	qla_free_xmt_bufs(ha);
1243	qla_free_rcv_bufs(ha);
1244
1245	return;
1246}
1247
1248/*
1249 * Buffer Management Functions for Transmit and Receive Rings
1250 */
1251static int
1252qla_alloc_xmt_bufs(qla_host_t *ha)
1253{
1254	int ret = 0;
1255	uint32_t i, j;
1256	qla_tx_buf_t *txb;
1257
1258	if (bus_dma_tag_create(NULL,    /* parent */
1259		1, 0,    /* alignment, bounds */
1260		BUS_SPACE_MAXADDR,       /* lowaddr */
1261		BUS_SPACE_MAXADDR,       /* highaddr */
1262		NULL, NULL,      /* filter, filterarg */
1263		QLA_MAX_TSO_FRAME_SIZE,     /* maxsize */
1264		QLA_MAX_SEGMENTS,        /* nsegments */
1265		PAGE_SIZE,        /* maxsegsize */
1266		BUS_DMA_ALLOCNOW,        /* flags */
1267		NULL,    /* lockfunc */
1268		NULL,    /* lockfuncarg */
1269		&ha->tx_tag)) {
1270		device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n",
1271			__func__);
1272		return (ENOMEM);
1273	}
1274
1275	for (i = 0; i < ha->hw.num_tx_rings; i++) {
1276		bzero((void *)ha->tx_ring[i].tx_buf,
1277			(sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS));
1278	}
1279
1280	for (j = 0; j < ha->hw.num_tx_rings; j++) {
1281		for (i = 0; i < NUM_TX_DESCRIPTORS; i++) {
1282
1283			txb = &ha->tx_ring[j].tx_buf[i];
1284
1285			if ((ret = bus_dmamap_create(ha->tx_tag,
1286					BUS_DMA_NOWAIT, &txb->map))) {
1287
1288				ha->err_tx_dmamap_create++;
1289				device_printf(ha->pci_dev,
1290					"%s: bus_dmamap_create failed[%d]\n",
1291					__func__, ret);
1292
1293				qla_free_xmt_bufs(ha);
1294
1295				return (ret);
1296			}
1297		}
1298	}
1299
1300	return 0;
1301}
1302
1303/*
1304 * Release mbuf after it sent on the wire
1305 */
1306static void
1307qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb)
1308{
1309	QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1310
1311	if (txb->m_head && txb->map) {
1312
1313		bus_dmamap_unload(ha->tx_tag, txb->map);
1314
1315		m_freem(txb->m_head);
1316		txb->m_head = NULL;
1317	}
1318
1319	if (txb->map)
1320		bus_dmamap_destroy(ha->tx_tag, txb->map);
1321
1322	QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
1323}
1324
1325static void
1326qla_free_xmt_bufs(qla_host_t *ha)
1327{
1328	int		i, j;
1329
1330	for (j = 0; j < ha->hw.num_tx_rings; j++) {
1331		for (i = 0; i < NUM_TX_DESCRIPTORS; i++)
1332			qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]);
1333	}
1334
1335	if (ha->tx_tag != NULL) {
1336		bus_dma_tag_destroy(ha->tx_tag);
1337		ha->tx_tag = NULL;
1338	}
1339
1340	for (i = 0; i < ha->hw.num_tx_rings; i++) {
1341		bzero((void *)ha->tx_ring[i].tx_buf,
1342			(sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS));
1343	}
1344	return;
1345}
1346
1347
1348static int
1349qla_alloc_rcv_std(qla_host_t *ha)
1350{
1351	int		i, j, k, r, ret = 0;
1352	qla_rx_buf_t	*rxb;
1353	qla_rx_ring_t	*rx_ring;
1354
1355	for (r = 0; r < ha->hw.num_rds_rings; r++) {
1356
1357		rx_ring = &ha->rx_ring[r];
1358
1359		for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
1360
1361			rxb = &rx_ring->rx_buf[i];
1362
1363			ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT,
1364					&rxb->map);
1365
1366			if (ret) {
1367				device_printf(ha->pci_dev,
1368					"%s: dmamap[%d, %d] failed\n",
1369					__func__, r, i);
1370
1371				for (k = 0; k < r; k++) {
1372					for (j = 0; j < NUM_RX_DESCRIPTORS;
1373						j++) {
1374						rxb = &ha->rx_ring[k].rx_buf[j];
1375						bus_dmamap_destroy(ha->rx_tag,
1376							rxb->map);
1377					}
1378				}
1379
1380				for (j = 0; j < i; j++) {
1381					bus_dmamap_destroy(ha->rx_tag,
1382						rx_ring->rx_buf[j].map);
1383				}
1384				goto qla_alloc_rcv_std_err;
1385			}
1386		}
1387	}
1388
1389	qla_init_hw_rcv_descriptors(ha);
1390
1391
1392	for (r = 0; r < ha->hw.num_rds_rings; r++) {
1393
1394		rx_ring = &ha->rx_ring[r];
1395
1396		for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
1397			rxb = &rx_ring->rx_buf[i];
1398			rxb->handle = i;
1399			if (!(ret = ql_get_mbuf(ha, rxb, NULL))) {
1400				/*
1401			 	 * set the physical address in the
1402				 * corresponding descriptor entry in the
1403				 * receive ring/queue for the hba
1404				 */
1405				qla_set_hw_rcv_desc(ha, r, i, rxb->handle,
1406					rxb->paddr,
1407					(rxb->m_head)->m_pkthdr.len);
1408			} else {
1409				device_printf(ha->pci_dev,
1410					"%s: ql_get_mbuf [%d, %d] failed\n",
1411					__func__, r, i);
1412				bus_dmamap_destroy(ha->rx_tag, rxb->map);
1413				goto qla_alloc_rcv_std_err;
1414			}
1415		}
1416	}
1417	return 0;
1418
1419qla_alloc_rcv_std_err:
1420	return (-1);
1421}
1422
1423static void
1424qla_free_rcv_std(qla_host_t *ha)
1425{
1426	int		i, r;
1427	qla_rx_buf_t	*rxb;
1428
1429	for (r = 0; r < ha->hw.num_rds_rings; r++) {
1430		for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
1431			rxb = &ha->rx_ring[r].rx_buf[i];
1432			if (rxb->m_head != NULL) {
1433				bus_dmamap_unload(ha->rx_tag, rxb->map);
1434				bus_dmamap_destroy(ha->rx_tag, rxb->map);
1435				m_freem(rxb->m_head);
1436				rxb->m_head = NULL;
1437			}
1438		}
1439	}
1440	return;
1441}
1442
1443static int
1444qla_alloc_rcv_bufs(qla_host_t *ha)
1445{
1446	int		i, ret = 0;
1447
1448	if (bus_dma_tag_create(NULL,    /* parent */
1449			1, 0,    /* alignment, bounds */
1450			BUS_SPACE_MAXADDR,       /* lowaddr */
1451			BUS_SPACE_MAXADDR,       /* highaddr */
1452			NULL, NULL,      /* filter, filterarg */
1453			MJUM9BYTES,     /* maxsize */
1454			1,        /* nsegments */
1455			MJUM9BYTES,        /* maxsegsize */
1456			BUS_DMA_ALLOCNOW,        /* flags */
1457			NULL,    /* lockfunc */
1458			NULL,    /* lockfuncarg */
1459			&ha->rx_tag)) {
1460
1461		device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n",
1462			__func__);
1463
1464		return (ENOMEM);
1465	}
1466
1467	bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS));
1468
1469	for (i = 0; i < ha->hw.num_sds_rings; i++) {
1470		ha->hw.sds[i].sdsr_next = 0;
1471		ha->hw.sds[i].rxb_free = NULL;
1472		ha->hw.sds[i].rx_free = 0;
1473	}
1474
1475	ret = qla_alloc_rcv_std(ha);
1476
1477	return (ret);
1478}
1479
1480static void
1481qla_free_rcv_bufs(qla_host_t *ha)
1482{
1483	int		i;
1484
1485	qla_free_rcv_std(ha);
1486
1487	if (ha->rx_tag != NULL) {
1488		bus_dma_tag_destroy(ha->rx_tag);
1489		ha->rx_tag = NULL;
1490	}
1491
1492	bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS));
1493
1494	for (i = 0; i < ha->hw.num_sds_rings; i++) {
1495		ha->hw.sds[i].sdsr_next = 0;
1496		ha->hw.sds[i].rxb_free = NULL;
1497		ha->hw.sds[i].rx_free = 0;
1498	}
1499
1500	return;
1501}
1502
1503int
1504ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp)
1505{
1506	register struct mbuf *mp = nmp;
1507	struct ifnet   		*ifp;
1508	int            		ret = 0;
1509	uint32_t		offset;
1510	bus_dma_segment_t	segs[1];
1511	int			nsegs;
1512
1513	QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1514
1515	ifp = ha->ifp;
1516
1517	if (mp == NULL) {
1518
1519		mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1520
1521		if (mp == NULL) {
1522			ha->err_m_getcl++;
1523			ret = ENOBUFS;
1524			device_printf(ha->pci_dev,
1525					"%s: m_getcl failed\n", __func__);
1526			goto exit_ql_get_mbuf;
1527		}
1528		mp->m_len = mp->m_pkthdr.len = MCLBYTES;
1529	} else {
1530		mp->m_len = mp->m_pkthdr.len = MCLBYTES;
1531		mp->m_data = mp->m_ext.ext_buf;
1532		mp->m_next = NULL;
1533	}
1534
1535	offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL);
1536	if (offset) {
1537		offset = 8 - offset;
1538		m_adj(mp, offset);
1539	}
1540
1541	/*
1542	 * Using memory from the mbuf cluster pool, invoke the bus_dma
1543	 * machinery to arrange the memory mapping.
1544	 */
1545	ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map,
1546			mp, segs, &nsegs, BUS_DMA_NOWAIT);
1547	rxb->paddr = segs[0].ds_addr;
1548
1549	if (ret || !rxb->paddr || (nsegs != 1)) {
1550		m_free(mp);
1551		rxb->m_head = NULL;
1552		device_printf(ha->pci_dev,
1553			"%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n",
1554			__func__, ret, (long long unsigned int)rxb->paddr,
1555			nsegs);
1556                ret = -1;
1557		goto exit_ql_get_mbuf;
1558	}
1559	rxb->m_head = mp;
1560	bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD);
1561
1562exit_ql_get_mbuf:
1563	QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret));
1564	return (ret);
1565}
1566
1567static void
1568qla_tx_done(void *context, int pending)
1569{
1570	qla_host_t *ha = context;
1571	struct ifnet   *ifp;
1572
1573	ifp = ha->ifp;
1574
1575	if (!ifp)
1576		return;
1577
1578	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1579		QL_DPRINT8(ha, (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__));
1580		return;
1581	}
1582	ql_hw_tx_done(ha);
1583
1584	qla_start(ha->ifp);
1585}
1586
1587static void
1588qla_get_peer(qla_host_t *ha)
1589{
1590	device_t *peers;
1591	int count, i, slot;
1592	int my_slot = pci_get_slot(ha->pci_dev);
1593
1594	if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count))
1595		return;
1596
1597	for (i = 0; i < count; i++) {
1598		slot = pci_get_slot(peers[i]);
1599
1600		if ((slot >= 0) && (slot == my_slot) &&
1601			(pci_get_device(peers[i]) ==
1602				pci_get_device(ha->pci_dev))) {
1603			if (ha->pci_dev != peers[i])
1604				ha->peer_dev = peers[i];
1605		}
1606	}
1607}
1608
1609static void
1610qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer)
1611{
1612	qla_host_t *ha_peer;
1613
1614	if (ha->peer_dev) {
1615        	if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) {
1616
1617			ha_peer->msg_from_peer = msg_to_peer;
1618		}
1619	}
1620}
1621
1622static void
1623qla_error_recovery(void *context, int pending)
1624{
1625	qla_host_t *ha = context;
1626	uint32_t msecs_100 = 100;
1627	struct ifnet *ifp = ha->ifp;
1628
1629        (void)QLA_LOCK(ha, __func__, 0);
1630
1631        ha->flags.stop_rcv = 1;
1632
1633        ql_hw_stop_rcv(ha);
1634
1635        ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
1636
1637        QLA_UNLOCK(ha, __func__);
1638
1639	if ((ha->pci_func & 0x1) == 0) {
1640
1641		if (!ha->msg_from_peer) {
1642			qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET);
1643
1644			while ((ha->msg_from_peer != QL_PEER_MSG_ACK) &&
1645				msecs_100--)
1646				qla_mdelay(__func__, 100);
1647		}
1648
1649		ha->msg_from_peer = 0;
1650
1651		ql_minidump(ha);
1652
1653		(void) ql_init_hw(ha);
1654        	qla_free_xmt_bufs(ha);
1655	        qla_free_rcv_bufs(ha);
1656
1657		qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK);
1658
1659	} else {
1660		if (ha->msg_from_peer == QL_PEER_MSG_RESET) {
1661
1662			ha->msg_from_peer = 0;
1663
1664			qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK);
1665		} else {
1666			qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET);
1667		}
1668
1669		while ((ha->msg_from_peer != QL_PEER_MSG_ACK)  && msecs_100--)
1670			qla_mdelay(__func__, 100);
1671		ha->msg_from_peer = 0;
1672
1673		(void) ql_init_hw(ha);
1674        	qla_free_xmt_bufs(ha);
1675	        qla_free_rcv_bufs(ha);
1676	}
1677        (void)QLA_LOCK(ha, __func__, 0);
1678
1679	if (qla_alloc_xmt_bufs(ha) != 0) {
1680        	QLA_UNLOCK(ha, __func__);
1681                return;
1682	}
1683
1684        if (qla_alloc_rcv_bufs(ha) != 0) {
1685        	QLA_UNLOCK(ha, __func__);
1686                return;
1687	}
1688
1689        ha->flags.stop_rcv = 0;
1690        if (ql_init_hw_if(ha) == 0) {
1691                ifp = ha->ifp;
1692                ifp->if_drv_flags |= IFF_DRV_RUNNING;
1693                ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1694                ha->flags.qla_watchdog_pause = 0;
1695        }
1696
1697        QLA_UNLOCK(ha, __func__);
1698}
1699
1700