1/******************************************************************************* 2*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3* 4*Redistribution and use in source and binary forms, with or without modification, are permitted provided 5*that the following conditions are met: 6*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7*following disclaimer. 8*2. Redistributions in binary form must reproduce the above copyright notice, 9*this list of conditions and the following disclaimer in the documentation and/or other materials provided 10*with the distribution. 11* 12*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20* 21* $FreeBSD$ 22* 23********************************************************************************/ 24/*******************************************************************************/ 25/*! \file satypes.h 26 * \brief The file defines the internal data structure types used by LL layer 27 * 28 */ 29/*******************************************************************************/ 30 31#ifndef __SATYPES_H__ 32 33#define __SATYPES_H__ 34 35/** \brief the callback function of an timer 36 * 37 * the definition of the timer callback function 38 */ 39typedef bit32 (* agsaCallback_t) (agsaRoot_t *agRoot, 40 bit32 Event, 41 void *Parm); 42 43/** \brief the data structure of a timer 44 * 45 * use to describe timer 46 * 47 */ 48typedef struct agsaTimerDesc_s 49{ 50 SALINK linkNode; /**< the link node data structure of the timer */ 51 bit32 valid; /**< the valid bit of the timer descriptor */ 52 bit32 timeoutTick; /**< the timeout tick of the timer */ 53 agsaCallback_t pfnTimeout; /**< the callback function fo the timer */ 54 bit32 Event; /**< the event paramter of the timer callback function */ 55 void * pParm; /**< the point to the paramter passed to callback function */ 56} agsaTimerDesc_t; 57 58/** \brief the port 59 * 60 * describe port data structure 61 * 62 */ 63typedef struct agsaPort_s 64{ 65 SALINK linkNode; /**< the link node data structure of the port */ 66 agsaPortContext_t portContext; /**< the port context of the port */ 67 SALINK_LIST listSASATADevices; /**< SAS/SATA devices list of the port */ 68 bit32 phyMap[AGSA_MAX_VALID_PHYS]; /**< Boolean arrar: the Phys included in the port. */ 69 bit32 status; /**< port state */ 70 bit32 tobedeleted; /**< mark for deletetion after callback */ 71 bit32 portId; /** Port Id from SPC */ 72 bit8 portIdx; /**< the Index of the port */ 73 bit8 reserved[3]; 74} agsaPort_t; 75 76/** \brief the phy 77 * 78 * phy data structure 79 * 80 */ 81typedef struct agsaPhy_s 82{ 83 agsaPort_t *pPort; /**< pointer to the port includes the phy */ 84 agsaSASIdentify_t sasIdentify; /**< the SAS identify of the phy */ 85 agsaContext_t *agContext; /**< agContext for the Phy */ 86 bit32 status; /**< the status of the phy */ 87 bit8 phyId; /**< the Id of the phy */ 88 bit8 linkstatus; /**< the link status of the phy */ 89 bit8 reserved[2]; 90#if defined(SALLSDK_DEBUG) 91 bit8 remoteSignature[8]; /* the remote signature of the phy is the phy is in native SATA mode */ 92#endif 93} agsaPhy_t; 94 95/** \brief the LL defined SAS/SATA device information 96 * 97 * LL defined SAS/SATA device information 98 * 99 */ 100typedef union agsaSASSATADevInfo_s 101{ 102 agsaSASDeviceInfo_t sasDeviceInfo; /**< SAS device information of the device */ 103 agsaSATADeviceInfo_t sataDeviceInfo; /**< SATA device information of the device */ 104} agsaSASSATADevInfo_t; 105 106/** \brief the LL defined device descriptor 107 * 108 * LL defined device descriptor 109 * 110 */ 111typedef struct agsaDeviceDesc_s 112{ 113 SALINK linkNode; /**< the link node data structure of the device */ 114 agsaDevHandle_t initiatorDevHandle; /**< the device handle of an initiator device */ 115 agsaDevHandle_t targetDevHandle; /**< the device handle of a target device */ 116 SALINK_LIST pendingIORequests; /**< the pending IO requests, for SSP or SATA */ 117 agsaPort_t *pPort; /**< the port discovered the device */ 118 bit8 deviceType; /**< the device type */ 119 bit8 reserved[3]; 120 bit32 option; 121 bit32 param; 122 agsaSASSATADevInfo_t devInfo; /**< SAS/SATA device information */ 123 bit32 DeviceMapIndex; /**< device index for device handle */ 124} agsaDeviceDesc_t; 125 126/** \brief the LL defined IO request descriptor 127 * 128 * LL defined IO Request descriptor 129 * 130 */ 131typedef struct agsaIORequestDesc_s 132{ 133 SALINK linkNode; /**< the link node data structure of the IO request */ 134 agsaIORequest_t *pIORequestContext;/**< the IO request context */ 135 agsaDeviceDesc_t *pDevice; /**< the pointer to the device, to which the request is sent */ 136 agsaPort_t *pPort; /**< the pointer to the port - using by HW_EVENT_ACK with PHY_DOWN event */ 137 ossaSSPCompletedCB_t completionCB; /**< completion callback to be called */ 138 bit32 requestType; /**< the request type */ 139 bit16 HwAckType; /**< Track HW_acks */ 140 bit16 SOP; /**< SetPhyProfile page not returned in reply */ 141 bit32 startTick; /**< start time for this IO */ 142 bit32 HTag; /**< the host tag to index into the IORequest array */ 143 bit8 valid; /**< boolean flag: the request is valid */ 144 bit8 IRmode; /**< indirect smp response mode */ 145 bit8 modePageContext; /**< request is for security mode change */ 146 bit8 DeviceInfoCmdOption;/**< */ 147#ifdef FAST_IO_TEST 148 SALINK fastLink; /* Fast I/O's chain */ 149#endif 150} agsaIORequestDesc_t; 151 152/** \brief the LL defined SMP Response Frame header and payload 153 * 154 * LL defined SMP Response Frame header and payload 155 * 156 */ 157typedef struct agsaSMPRspFrame_s 158{ 159 agsaSMPFrameHeader_t smpHeader; 160 bit8 smpPayload[1020]; 161} agsaSMPRspFrame_t; 162 163/** \brief the agsaIOMap_t 164 * 165 * data storage for IO Request Mapping 166 * 167 */ 168typedef struct agsaIOMap_s 169{ 170 bit32 Tag; 171 agsaIORequestDesc_t *IORequest; 172 agsaContext_t *agContext; 173} agsaIOMap_t; 174 175/** \brief the agsaPortMap_t 176 * 177 * data storage for Port Context Mapping 178 * 179 */ 180typedef struct agsaPortMap_s 181{ 182 bit32 PortID; 183 bit32 PortStatus; 184 void *PortContext; 185} agsaPortMap_t; 186 187/** \brief the agsaDeviceMap_t 188 * 189 * data storage for Device Handle Mapping 190 * 191 */ 192typedef struct agsaDeviceMap_s 193{ 194 bit32 DeviceIdFromFW; 195 void *DeviceHandle; 196} agsaDeviceMap_t; 197 198#ifdef FAST_IO_TEST 199/* interleaved Fast IO's are not allowed */ 200#define LL_FAST_IO_SIZE 1 201#endif 202 203/** \brief the LLRoot 204 * 205 * root data structure 206 * 207 */ 208typedef struct agsaLLRoot_s 209{ 210 agsaMem_t deviceLinkMem; /**< Device Link System Memory */ 211 SALINK_LIST freeDevicesList; /**< List of free IO device handles */ 212 213 agsaMem_t IORequestMem; /**< IO Request Link System Memory */ 214 SALINK_LIST freeIORequests; /**< List of free IORequests */ 215 SALINK_LIST freeReservedRequests; /**< List of reserved IORequests not for normal IO! */ 216 217 agsaMem_t timerLinkMem; /**< Timer Link System Memory */ 218 SALINK_LIST freeTimers; /**< List of free timers */ 219 SALINK_LIST validTimers; /**< List of valid timers */ 220 221 agsaPhy_t phys[AGSA_MAX_VALID_PHYS]; /**< Phys */ 222 223 agsaPort_t ports[AGSA_MAX_VALID_PORTS]; /**< Ports */ 224 SALINK_LIST freePorts; /**< List of free ports */ 225 SALINK_LIST validPorts; /**< List of valid ports */ 226 227 bit8 phyCount; /**< number of phys */ 228 bit8 portCount; /**< number of ports */ 229 bit8 sysIntsActive; /**< whether interrupt is enabled */ 230 bit8 reserved; /**< reserved */ 231 232 bit32 usecsPerTick; /**< timer tick unit */ 233 bit32 minStallusecs; /**< shorest available stall */ 234 bit32 timeTick; /**< the current timer tick */ 235 bit32 ResetStartTick; /* Reset StartTick */ 236 bit32 chipStatus; /**< chip status */ 237 238 bit32 interruptVecIndexBitMap[MAX_NUM_VECTOR]; /**< Interrupt Vector Index BitMap */ 239 bit32 interruptVecIndexBitMap1[MAX_NUM_VECTOR]; /**< Interrupt Vector Index BitMap1 */ 240 241 agsaBarOffset_t SpcBarOffset[60]; 242 bit32 ChipId; /* Subversion PCI ID */ 243 244 agsaPortMap_t PortMap[AGSA_MAX_VALID_PORTS]; /**< Port Mapping for PortContext */ 245 agsaDeviceMap_t DeviceMap[MAX_IO_DEVICE_ENTRIES]; /**< Device Map for Device Handle */ 246 agsaIOMap_t IOMap[MAX_ACTIVE_IO_REQUESTS]; /**< IO MAP for IO Request */ 247 agsaDevHandle_t *DeviceHandle[MAX_IO_DEVICE_ENTRIES]; /**< used for get device handles */ 248 agsaDevHandle_t *pDeviceHandle; /**< used for get device handles */ 249 250 agsaMemoryRequirement_t memoryAllocated; /**< SAS LL memory Allocation */ 251 agsaHwConfig_t hwConfig; /**< copy of hwConfig */ 252 agsaSwConfig_t swConfig; /**< copy of swConfig */ 253 agsaQueueConfig_t QueueConfig; /* copy of MPI IBQ/OBQ configuration */ 254 255 mpiConfig_t mpiConfig; /**< MPI Configuration */ 256 mpiMemReq_t mpiMemoryAllocated; /**< MPI memory */ 257 mpiICQueue_t inboundQueue[AGSA_MAX_INBOUND_Q]; /**< Outbound queue descriptor array */ 258 mpiOCQueue_t outboundQueue[AGSA_MAX_OUTBOUND_Q]; /**< Outbound queue descriptor array */ 259 mpiHostLLConfigDescriptor_t mainConfigTable; /**< LL main Configuration Table */ 260 261 ossaDeviceRegistrationCB_t DeviceRegistrationCB; /**< Device Registration CB */ 262 ossaDeregisterDeviceHandleCB_t DeviceDeregistrationCB;/**< Device DeRegistration CB */ 263 264 bit32 numInterruptVectors; /**< Number of Interrupt Vectors configured from OS */ 265 bit32 Use64bit; /**< Only write upper bits if needed */ 266 267 EnadDisabHandler_t DisableInterrupts; /*Interrupt type dependant function pointer to disable interrupts */ 268 EnadDisabHandler_t ReEnableInterrupts; /*Interrupt type dependant reenable */ 269 InterruptOurs_t OurInterrupt; /*Interrupt type dependant check for our interrupt */ 270 271#ifdef SA_FW_TEST_BUNCH_STARTS 272 /** 273 * Following variables are needed to handle Bunch Starts (bulk update of PI) 274 * - saRoot (agsaLLRoot_t): Global Flags, apply to all queues 275 * 1. BunchStarts_Enable 276 * 2. BunchStarts_Threshold 277 * 3. BunchStarts_Pending 278 * 4. BunchStarts_TimeoutTicks 279 * 280 * - Circular Q (mpiICQueue_s): Queue specific flags 281 * 1. BunchStarts_QPending 282 * 2. BunchStarts_QPendingTick 283 */ 284 bit32 BunchStarts_Enable; // enables/disables whole feature 285 bit32 BunchStarts_Threshold; // global min number of IOs to bunch per queue. 286 bit32 BunchStarts_Pending; // global counter collects all Q->BunchStarts_QPending 287 bit32 BunchStarts_TimeoutTicks; // global time out value beyond which bunched IOs will be started even below BunchStarts_Threshold. 288#endif /* SA_FW_TEST_BUNCH_STARTS */ 289 290#ifdef SA_FW_TIMER_READS_STATUS 291 spc_GSTableDescriptor_t mpiGSTable; 292 bit32 MsguTcnt_last; /**< DW3 - MSGU Tick count */ 293 bit32 IopTcnt_last; /**< DW4 - IOP Tick count */ 294 bit32 Iop1Tcnt_last; /**< DW4 - IOP Tick count */ 295 296#endif /* SA_FW_TIMER_READS_STATUS */ 297 298 agsaControllerInfo_t ControllerInfo; 299 agsaIOErrorEventStats_t IoErrorCount; 300 agsaIOErrorEventStats_t IoEventCount; 301 302 bit32 ResetFailed; 303 //bit32 FatalDone; 304 bit32 ForensicLastOffset; 305 //bit32 FatalAccumLen; 306 //bit32 NonFatalForensicLastOffset; 307 //bit32 FatalCurrentLength; 308 bit32 FatalForensicStep; 309 bit32 FatalForensicShiftOffset; 310 bit32 FatalBarLoc; 311 312#ifdef HIALEAH_ENCRYPTION 313 agsaEncryptGeneralPage_t EncGenPage; 314#endif /* HIALEAH_ENCRYPTION */ 315#ifdef SA_ENABLE_TRACE_FUNCTIONS 316 bit8 traceBuffLookup[16]; 317 318 bit32 TraceDestination; 319 bit32 TraceMask; 320 321 bit32 TraceBufferLength; 322 bit32 CurrentTraceIndexWrapCount; 323 bit32 CurrentTraceIndex; 324 bit32 traceLineFeedCnt; 325 bit8 *TraceBuffer; 326 bit32 TraceBlockReInit; 327 328#endif /*SA_ENABLE_TRACE_FUNCTIONS*/ 329 330 bit32 registerDump0[REGISTER_DUMP_BUFF_SIZE/4]; /**< register dump buffer 0 */ 331 bit32 registerDump1[REGISTER_DUMP_BUFF_SIZE/4]; /**< register dump buffer 1 */ 332 333 bit32 autoDeregDeviceflag[AGSA_MAX_VALID_PORTS]; 334 335#ifdef SA_FW_TEST_INTERRUPT_REASSERT 336 bit32 CheckAll; 337 bit32 OldPi[64]; 338 bit32 OldCi[64]; 339 bit32 OldFlag[64]; 340#endif /* SA_FW_TEST_INTERRUPT_REASSERT */ 341 342 343#ifdef SALL_API_TEST 344 agsaLLCountInfo_t LLCounters; 345#endif 346#ifdef FAST_IO_TEST 347 void *freeFastReq[LL_FAST_IO_SIZE]; /* saFastRequest_t* */ 348 int freeFastIdx; 349#endif 350} agsaLLRoot_t; 351 352#ifdef FAST_IO_TEST 353/* 354 one struct per all prepared Fast IO's; 355 freed after all IO's are posted to FW and interrupt is triggered; 356 maintained for error rollback or cancel functionality 357*/ 358typedef struct saFastRequest_s 359{ 360 bit32 beforePI[AGSA_MAX_INBOUND_Q]; 361 bit32 inqList[AGSA_MAX_INBOUND_Q]; 362 bit32 inqMax; 363 SALINK_LIST requests; /* List of all Fast IORequests */ 364 void *agRoot; /* agsaRoot_t * */ 365 bit8 valid; /* to avoid usage when the struct is freed */ 366} saFastRequest_t; 367#endif 368 369#endif /*__SATYPES_H__ */ 370