if_nge.c revision 144241
1139749Simp/*- 276479Swpaul * Copyright (c) 2001 Wind River Systems 376479Swpaul * Copyright (c) 1997, 1998, 1999, 2000, 2001 476479Swpaul * Bill Paul <wpaul@bsdi.com>. All rights reserved. 576479Swpaul * 676479Swpaul * Redistribution and use in source and binary forms, with or without 776479Swpaul * modification, are permitted provided that the following conditions 876479Swpaul * are met: 976479Swpaul * 1. Redistributions of source code must retain the above copyright 1076479Swpaul * notice, this list of conditions and the following disclaimer. 1176479Swpaul * 2. Redistributions in binary form must reproduce the above copyright 1276479Swpaul * notice, this list of conditions and the following disclaimer in the 1376479Swpaul * documentation and/or other materials provided with the distribution. 1476479Swpaul * 3. All advertising materials mentioning features or use of this software 1576479Swpaul * must display the following acknowledgement: 1676479Swpaul * This product includes software developed by Bill Paul. 1776479Swpaul * 4. Neither the name of the author nor the names of any co-contributors 1876479Swpaul * may be used to endorse or promote products derived from this software 1976479Swpaul * without specific prior written permission. 2076479Swpaul * 2176479Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2276479Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2376479Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2476479Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2576479Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2676479Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2776479Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2876479Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2976479Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3076479Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3176479Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 3276479Swpaul */ 3376479Swpaul 34119418Sobrien#include <sys/cdefs.h> 35119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/nge/if_nge.c 144241 2005-03-28 17:49:03Z sam $"); 36119418Sobrien 3776479Swpaul/* 3876479Swpaul * National Semiconductor DP83820/DP83821 gigabit ethernet driver 3976479Swpaul * for FreeBSD. Datasheets are available from: 4076479Swpaul * 4176479Swpaul * http://www.national.com/ds/DP/DP83820.pdf 4276479Swpaul * http://www.national.com/ds/DP/DP83821.pdf 4376479Swpaul * 4476479Swpaul * These chips are used on several low cost gigabit ethernet NICs 4576479Swpaul * sold by D-Link, Addtron, SMC and Asante. Both parts are 4676479Swpaul * virtually the same, except the 83820 is a 64-bit/32-bit part, 4776479Swpaul * while the 83821 is 32-bit only. 4876479Swpaul * 4976479Swpaul * Many cards also use National gigE transceivers, such as the 5076479Swpaul * DP83891, DP83861 and DP83862 gigPHYTER parts. The DP83861 datasheet 5176479Swpaul * contains a full register description that applies to all of these 5276479Swpaul * components: 5376479Swpaul * 5476479Swpaul * http://www.national.com/ds/DP/DP83861.pdf 5576479Swpaul * 5676479Swpaul * Written by Bill Paul <wpaul@bsdi.com> 5776479Swpaul * BSDi Open Source Solutions 5876479Swpaul */ 5976479Swpaul 6076479Swpaul/* 6176479Swpaul * The NatSemi DP83820 and 83821 controllers are enhanced versions 6276479Swpaul * of the NatSemi MacPHYTER 10/100 devices. They support 10, 100 6376479Swpaul * and 1000Mbps speeds with 1000baseX (ten bit interface), MII and GMII 6476479Swpaul * ports. Other features include 8K TX FIFO and 32K RX FIFO, TCP/IP 6576479Swpaul * hardware checksum offload (IPv4 only), VLAN tagging and filtering, 6676479Swpaul * priority TX and RX queues, a 2048 bit multicast hash filter, 4 RX pattern 6776479Swpaul * matching buffers, one perfect address filter buffer and interrupt 6876479Swpaul * moderation. The 83820 supports both 64-bit and 32-bit addressing 6976479Swpaul * and data transfers: the 64-bit support can be toggled on or off 7076479Swpaul * via software. This affects the size of certain fields in the DMA 7176479Swpaul * descriptors. 7276479Swpaul * 7378323Swpaul * There are two bugs/misfeatures in the 83820/83821 that I have 7478323Swpaul * discovered so far: 7578323Swpaul * 7678323Swpaul * - Receive buffers must be aligned on 64-bit boundaries, which means 7778323Swpaul * you must resort to copying data in order to fix up the payload 7878323Swpaul * alignment. 7978323Swpaul * 8078323Swpaul * - In order to transmit jumbo frames larger than 8170 bytes, you have 8178323Swpaul * to turn off transmit checksum offloading, because the chip can't 8278323Swpaul * compute the checksum on an outgoing frame unless it fits entirely 8378323Swpaul * within the TX FIFO, which is only 8192 bytes in size. If you have 8478323Swpaul * TX checksum offload enabled and you transmit attempt to transmit a 8578323Swpaul * frame larger than 8170 bytes, the transmitter will wedge. 8678323Swpaul * 8778323Swpaul * To work around the latter problem, TX checksum offload is disabled 8878323Swpaul * if the user selects an MTU larger than 8152 (8170 - 18). 8976479Swpaul */ 9076479Swpaul 9176479Swpaul#include <sys/param.h> 9276479Swpaul#include <sys/systm.h> 9376479Swpaul#include <sys/sockio.h> 9476479Swpaul#include <sys/mbuf.h> 9576479Swpaul#include <sys/malloc.h> 96129879Sphk#include <sys/module.h> 9776479Swpaul#include <sys/kernel.h> 9876479Swpaul#include <sys/socket.h> 9976479Swpaul 10076479Swpaul#include <net/if.h> 10176479Swpaul#include <net/if_arp.h> 10276479Swpaul#include <net/ethernet.h> 10376479Swpaul#include <net/if_dl.h> 10476479Swpaul#include <net/if_media.h> 10576479Swpaul#include <net/if_types.h> 10676479Swpaul#include <net/if_vlan_var.h> 10776479Swpaul 10876479Swpaul#include <net/bpf.h> 10976479Swpaul 11076479Swpaul#include <vm/vm.h> /* for vtophys */ 11176479Swpaul#include <vm/pmap.h> /* for vtophys */ 11276479Swpaul#include <machine/clock.h> /* for DELAY */ 11376479Swpaul#include <machine/bus_pio.h> 11476479Swpaul#include <machine/bus_memio.h> 11576479Swpaul#include <machine/bus.h> 11676479Swpaul#include <machine/resource.h> 11776479Swpaul#include <sys/bus.h> 11876479Swpaul#include <sys/rman.h> 11976479Swpaul 12076479Swpaul#include <dev/mii/mii.h> 12176479Swpaul#include <dev/mii/miivar.h> 12276479Swpaul 123119285Simp#include <dev/pci/pcireg.h> 124119285Simp#include <dev/pci/pcivar.h> 12576479Swpaul 12676479Swpaul#define NGE_USEIOSPACE 12776479Swpaul 12876522Swpaul#include <dev/nge/if_ngereg.h> 12976479Swpaul 130113506SmdoddMODULE_DEPEND(nge, pci, 1, 1, 1); 131113506SmdoddMODULE_DEPEND(nge, ether, 1, 1, 1); 13276479SwpaulMODULE_DEPEND(nge, miibus, 1, 1, 1); 13376479Swpaul 13476479Swpaul/* "controller miibus0" required. See GENERIC if you get errors here. */ 13576479Swpaul#include "miibus_if.h" 13676479Swpaul 13776479Swpaul#define NGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 13876479Swpaul 13976479Swpaul/* 14076479Swpaul * Various supported device vendors/types and their names. 14176479Swpaul */ 14276479Swpaulstatic struct nge_type nge_devs[] = { 14376479Swpaul { NGE_VENDORID, NGE_DEVICEID, 14476479Swpaul "National Semiconductor Gigabit Ethernet" }, 14576479Swpaul { 0, 0, NULL } 14676479Swpaul}; 14776479Swpaul 14899497Salfredstatic int nge_probe(device_t); 14999497Salfredstatic int nge_attach(device_t); 15099497Salfredstatic int nge_detach(device_t); 15176479Swpaul 15299497Salfredstatic int nge_newbuf(struct nge_softc *, struct nge_desc *, struct mbuf *); 15399497Salfredstatic int nge_encap(struct nge_softc *, struct mbuf *, u_int32_t *); 154135254Salc#ifdef NGE_FIXUP_RX 155135250Swpaulstatic __inline void nge_fixup_rx (struct mbuf *); 156135250Swpaul#endif 15799497Salfredstatic void nge_rxeof(struct nge_softc *); 15899497Salfredstatic void nge_txeof(struct nge_softc *); 15999497Salfredstatic void nge_intr(void *); 16099497Salfredstatic void nge_tick(void *); 161135250Swpaulstatic void nge_tick_locked(struct nge_softc *); 16299497Salfredstatic void nge_start(struct ifnet *); 163135250Swpaulstatic void nge_start_locked(struct ifnet *); 16499497Salfredstatic int nge_ioctl(struct ifnet *, u_long, caddr_t); 16599497Salfredstatic void nge_init(void *); 166135250Swpaulstatic void nge_init_locked(struct nge_softc *); 16799497Salfredstatic void nge_stop(struct nge_softc *); 16899497Salfredstatic void nge_watchdog(struct ifnet *); 16999497Salfredstatic void nge_shutdown(device_t); 17099497Salfredstatic int nge_ifmedia_upd(struct ifnet *); 17199497Salfredstatic void nge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 17276479Swpaul 17399497Salfredstatic void nge_delay(struct nge_softc *); 17499497Salfredstatic void nge_eeprom_idle(struct nge_softc *); 17599497Salfredstatic void nge_eeprom_putbyte(struct nge_softc *, int); 17699497Salfredstatic void nge_eeprom_getword(struct nge_softc *, int, u_int16_t *); 17799497Salfredstatic void nge_read_eeprom(struct nge_softc *, caddr_t, int, int, int); 17876479Swpaul 17999497Salfredstatic void nge_mii_sync(struct nge_softc *); 18099497Salfredstatic void nge_mii_send(struct nge_softc *, u_int32_t, int); 18199497Salfredstatic int nge_mii_readreg(struct nge_softc *, struct nge_mii_frame *); 18299497Salfredstatic int nge_mii_writereg(struct nge_softc *, struct nge_mii_frame *); 18376479Swpaul 18499497Salfredstatic int nge_miibus_readreg(device_t, int, int); 18599497Salfredstatic int nge_miibus_writereg(device_t, int, int, int); 18699497Salfredstatic void nge_miibus_statchg(device_t); 18776479Swpaul 18899497Salfredstatic void nge_setmulti(struct nge_softc *); 18999497Salfredstatic void nge_reset(struct nge_softc *); 19099497Salfredstatic int nge_list_rx_init(struct nge_softc *); 19199497Salfredstatic int nge_list_tx_init(struct nge_softc *); 19276479Swpaul 19376479Swpaul#ifdef NGE_USEIOSPACE 19476479Swpaul#define NGE_RES SYS_RES_IOPORT 19576479Swpaul#define NGE_RID NGE_PCI_LOIO 19676479Swpaul#else 19776479Swpaul#define NGE_RES SYS_RES_MEMORY 19876479Swpaul#define NGE_RID NGE_PCI_LOMEM 19976479Swpaul#endif 20076479Swpaul 20176479Swpaulstatic device_method_t nge_methods[] = { 20276479Swpaul /* Device interface */ 20376479Swpaul DEVMETHOD(device_probe, nge_probe), 20476479Swpaul DEVMETHOD(device_attach, nge_attach), 20576479Swpaul DEVMETHOD(device_detach, nge_detach), 20676479Swpaul DEVMETHOD(device_shutdown, nge_shutdown), 20776479Swpaul 20876479Swpaul /* bus interface */ 20976479Swpaul DEVMETHOD(bus_print_child, bus_generic_print_child), 21076479Swpaul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 21176479Swpaul 21276479Swpaul /* MII interface */ 21376479Swpaul DEVMETHOD(miibus_readreg, nge_miibus_readreg), 21476479Swpaul DEVMETHOD(miibus_writereg, nge_miibus_writereg), 21576479Swpaul DEVMETHOD(miibus_statchg, nge_miibus_statchg), 21676479Swpaul 21776479Swpaul { 0, 0 } 21876479Swpaul}; 21976479Swpaul 22076479Swpaulstatic driver_t nge_driver = { 22176479Swpaul "nge", 22276479Swpaul nge_methods, 22376479Swpaul sizeof(struct nge_softc) 22476479Swpaul}; 22576479Swpaul 22676479Swpaulstatic devclass_t nge_devclass; 22776479Swpaul 228113506SmdoddDRIVER_MODULE(nge, pci, nge_driver, nge_devclass, 0, 0); 22976479SwpaulDRIVER_MODULE(miibus, nge, miibus_driver, miibus_devclass, 0, 0); 23076479Swpaul 23176479Swpaul#define NGE_SETBIT(sc, reg, x) \ 23276479Swpaul CSR_WRITE_4(sc, reg, \ 23376479Swpaul CSR_READ_4(sc, reg) | (x)) 23476479Swpaul 23576479Swpaul#define NGE_CLRBIT(sc, reg, x) \ 23676479Swpaul CSR_WRITE_4(sc, reg, \ 23776479Swpaul CSR_READ_4(sc, reg) & ~(x)) 23876479Swpaul 23976479Swpaul#define SIO_SET(x) \ 240106696Salfred CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) | (x)) 24176479Swpaul 24276479Swpaul#define SIO_CLR(x) \ 243106696Salfred CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) & ~(x)) 24476479Swpaul 24599497Salfredstatic void 24699497Salfrednge_delay(sc) 24776479Swpaul struct nge_softc *sc; 24876479Swpaul{ 24976479Swpaul int idx; 25076479Swpaul 25176479Swpaul for (idx = (300 / 33) + 1; idx > 0; idx--) 25276479Swpaul CSR_READ_4(sc, NGE_CSR); 25376479Swpaul 25476479Swpaul return; 25576479Swpaul} 25676479Swpaul 25799497Salfredstatic void 25899497Salfrednge_eeprom_idle(sc) 25976479Swpaul struct nge_softc *sc; 26076479Swpaul{ 26176479Swpaul register int i; 26276479Swpaul 26376479Swpaul SIO_SET(NGE_MEAR_EE_CSEL); 26476479Swpaul nge_delay(sc); 26576479Swpaul SIO_SET(NGE_MEAR_EE_CLK); 26676479Swpaul nge_delay(sc); 26776479Swpaul 26876479Swpaul for (i = 0; i < 25; i++) { 26976479Swpaul SIO_CLR(NGE_MEAR_EE_CLK); 27076479Swpaul nge_delay(sc); 27176479Swpaul SIO_SET(NGE_MEAR_EE_CLK); 27276479Swpaul nge_delay(sc); 27376479Swpaul } 27476479Swpaul 27576479Swpaul SIO_CLR(NGE_MEAR_EE_CLK); 27676479Swpaul nge_delay(sc); 27776479Swpaul SIO_CLR(NGE_MEAR_EE_CSEL); 27876479Swpaul nge_delay(sc); 27976479Swpaul CSR_WRITE_4(sc, NGE_MEAR, 0x00000000); 28076479Swpaul 28176479Swpaul return; 28276479Swpaul} 28376479Swpaul 28476479Swpaul/* 28576479Swpaul * Send a read command and address to the EEPROM, check for ACK. 28676479Swpaul */ 28799497Salfredstatic void 28899497Salfrednge_eeprom_putbyte(sc, addr) 28976479Swpaul struct nge_softc *sc; 29076479Swpaul int addr; 29176479Swpaul{ 29276479Swpaul register int d, i; 29376479Swpaul 29476479Swpaul d = addr | NGE_EECMD_READ; 29576479Swpaul 29676479Swpaul /* 29776479Swpaul * Feed in each bit and stobe the clock. 29876479Swpaul */ 29976479Swpaul for (i = 0x400; i; i >>= 1) { 30076479Swpaul if (d & i) { 30176479Swpaul SIO_SET(NGE_MEAR_EE_DIN); 30276479Swpaul } else { 30376479Swpaul SIO_CLR(NGE_MEAR_EE_DIN); 30476479Swpaul } 30576479Swpaul nge_delay(sc); 30676479Swpaul SIO_SET(NGE_MEAR_EE_CLK); 30776479Swpaul nge_delay(sc); 30876479Swpaul SIO_CLR(NGE_MEAR_EE_CLK); 30976479Swpaul nge_delay(sc); 31076479Swpaul } 31176479Swpaul 31276479Swpaul return; 31376479Swpaul} 31476479Swpaul 31576479Swpaul/* 31676479Swpaul * Read a word of data stored in the EEPROM at address 'addr.' 31776479Swpaul */ 31899497Salfredstatic void 31999497Salfrednge_eeprom_getword(sc, addr, dest) 32076479Swpaul struct nge_softc *sc; 32176479Swpaul int addr; 32276479Swpaul u_int16_t *dest; 32376479Swpaul{ 32476479Swpaul register int i; 32576479Swpaul u_int16_t word = 0; 32676479Swpaul 32776479Swpaul /* Force EEPROM to idle state. */ 32876479Swpaul nge_eeprom_idle(sc); 32976479Swpaul 33076479Swpaul /* Enter EEPROM access mode. */ 33176479Swpaul nge_delay(sc); 33276479Swpaul SIO_CLR(NGE_MEAR_EE_CLK); 33376479Swpaul nge_delay(sc); 33476479Swpaul SIO_SET(NGE_MEAR_EE_CSEL); 33576479Swpaul nge_delay(sc); 33676479Swpaul 33776479Swpaul /* 33876479Swpaul * Send address of word we want to read. 33976479Swpaul */ 34076479Swpaul nge_eeprom_putbyte(sc, addr); 34176479Swpaul 34276479Swpaul /* 34376479Swpaul * Start reading bits from EEPROM. 34476479Swpaul */ 34576479Swpaul for (i = 0x8000; i; i >>= 1) { 34676479Swpaul SIO_SET(NGE_MEAR_EE_CLK); 34776479Swpaul nge_delay(sc); 34876479Swpaul if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_EE_DOUT) 34976479Swpaul word |= i; 35076479Swpaul nge_delay(sc); 35176479Swpaul SIO_CLR(NGE_MEAR_EE_CLK); 35276479Swpaul nge_delay(sc); 35376479Swpaul } 35476479Swpaul 35576479Swpaul /* Turn off EEPROM access mode. */ 35676479Swpaul nge_eeprom_idle(sc); 35776479Swpaul 35876479Swpaul *dest = word; 35976479Swpaul 36076479Swpaul return; 36176479Swpaul} 36276479Swpaul 36376479Swpaul/* 36476479Swpaul * Read a sequence of words from the EEPROM. 36576479Swpaul */ 36699497Salfredstatic void 36799497Salfrednge_read_eeprom(sc, dest, off, cnt, swap) 36876479Swpaul struct nge_softc *sc; 36976479Swpaul caddr_t dest; 37076479Swpaul int off; 37176479Swpaul int cnt; 37276479Swpaul int swap; 37376479Swpaul{ 37476479Swpaul int i; 37576479Swpaul u_int16_t word = 0, *ptr; 37676479Swpaul 37776479Swpaul for (i = 0; i < cnt; i++) { 37876479Swpaul nge_eeprom_getword(sc, off + i, &word); 37976479Swpaul ptr = (u_int16_t *)(dest + (i * 2)); 38076479Swpaul if (swap) 38176479Swpaul *ptr = ntohs(word); 38276479Swpaul else 38376479Swpaul *ptr = word; 38476479Swpaul } 38576479Swpaul 38676479Swpaul return; 38776479Swpaul} 38876479Swpaul 38976479Swpaul/* 39076479Swpaul * Sync the PHYs by setting data bit and strobing the clock 32 times. 39176479Swpaul */ 39299497Salfredstatic void 39399497Salfrednge_mii_sync(sc) 39476479Swpaul struct nge_softc *sc; 39576479Swpaul{ 39676479Swpaul register int i; 39776479Swpaul 39876479Swpaul SIO_SET(NGE_MEAR_MII_DIR|NGE_MEAR_MII_DATA); 39976479Swpaul 40076479Swpaul for (i = 0; i < 32; i++) { 40176479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 40276479Swpaul DELAY(1); 40376479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 40476479Swpaul DELAY(1); 40576479Swpaul } 40676479Swpaul 40776479Swpaul return; 40876479Swpaul} 40976479Swpaul 41076479Swpaul/* 41176479Swpaul * Clock a series of bits through the MII. 41276479Swpaul */ 41399497Salfredstatic void 41499497Salfrednge_mii_send(sc, bits, cnt) 41576479Swpaul struct nge_softc *sc; 41676479Swpaul u_int32_t bits; 41776479Swpaul int cnt; 41876479Swpaul{ 41976479Swpaul int i; 42076479Swpaul 42176479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 42276479Swpaul 42376479Swpaul for (i = (0x1 << (cnt - 1)); i; i >>= 1) { 42476479Swpaul if (bits & i) { 42576479Swpaul SIO_SET(NGE_MEAR_MII_DATA); 42676479Swpaul } else { 42776479Swpaul SIO_CLR(NGE_MEAR_MII_DATA); 42876479Swpaul } 42976479Swpaul DELAY(1); 43076479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 43176479Swpaul DELAY(1); 43276479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 43376479Swpaul } 43476479Swpaul} 43576479Swpaul 43676479Swpaul/* 43776479Swpaul * Read an PHY register through the MII. 43876479Swpaul */ 43999497Salfredstatic int 44099497Salfrednge_mii_readreg(sc, frame) 44176479Swpaul struct nge_softc *sc; 44276479Swpaul struct nge_mii_frame *frame; 44376479Swpaul 44476479Swpaul{ 445135250Swpaul int i, ack; 44676479Swpaul 44776479Swpaul /* 44876479Swpaul * Set up frame for RX. 44976479Swpaul */ 45076479Swpaul frame->mii_stdelim = NGE_MII_STARTDELIM; 45176479Swpaul frame->mii_opcode = NGE_MII_READOP; 45276479Swpaul frame->mii_turnaround = 0; 45376479Swpaul frame->mii_data = 0; 45476479Swpaul 45576479Swpaul CSR_WRITE_4(sc, NGE_MEAR, 0); 45676479Swpaul 45776479Swpaul /* 45876479Swpaul * Turn on data xmit. 45976479Swpaul */ 46076479Swpaul SIO_SET(NGE_MEAR_MII_DIR); 46176479Swpaul 46276479Swpaul nge_mii_sync(sc); 46376479Swpaul 46476479Swpaul /* 46576479Swpaul * Send command/address info. 46676479Swpaul */ 46776479Swpaul nge_mii_send(sc, frame->mii_stdelim, 2); 46876479Swpaul nge_mii_send(sc, frame->mii_opcode, 2); 46976479Swpaul nge_mii_send(sc, frame->mii_phyaddr, 5); 47076479Swpaul nge_mii_send(sc, frame->mii_regaddr, 5); 47176479Swpaul 47276479Swpaul /* Idle bit */ 47376479Swpaul SIO_CLR((NGE_MEAR_MII_CLK|NGE_MEAR_MII_DATA)); 47476479Swpaul DELAY(1); 47576479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 47676479Swpaul DELAY(1); 47776479Swpaul 47876479Swpaul /* Turn off xmit. */ 47976479Swpaul SIO_CLR(NGE_MEAR_MII_DIR); 48076479Swpaul /* Check for ack */ 48176479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 48276479Swpaul DELAY(1); 483109058Smbr ack = CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA; 48476479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 48576479Swpaul DELAY(1); 48676479Swpaul 48776479Swpaul /* 48876479Swpaul * Now try reading data bits. If the ack failed, we still 48976479Swpaul * need to clock through 16 cycles to keep the PHY(s) in sync. 49076479Swpaul */ 49176479Swpaul if (ack) { 49276479Swpaul for(i = 0; i < 16; i++) { 49376479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 49476479Swpaul DELAY(1); 49576479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 49676479Swpaul DELAY(1); 49776479Swpaul } 49876479Swpaul goto fail; 49976479Swpaul } 50076479Swpaul 50176479Swpaul for (i = 0x8000; i; i >>= 1) { 50276479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 50376479Swpaul DELAY(1); 50476479Swpaul if (!ack) { 50576479Swpaul if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA) 50676479Swpaul frame->mii_data |= i; 50776479Swpaul DELAY(1); 50876479Swpaul } 50976479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 51076479Swpaul DELAY(1); 51176479Swpaul } 51276479Swpaul 51376479Swpaulfail: 51476479Swpaul 51576479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 51676479Swpaul DELAY(1); 51776479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 51876479Swpaul DELAY(1); 51976479Swpaul 52076479Swpaul if (ack) 52176479Swpaul return(1); 52276479Swpaul return(0); 52376479Swpaul} 52476479Swpaul 52576479Swpaul/* 52676479Swpaul * Write to a PHY register through the MII. 52776479Swpaul */ 52899497Salfredstatic int 52999497Salfrednge_mii_writereg(sc, frame) 53076479Swpaul struct nge_softc *sc; 53176479Swpaul struct nge_mii_frame *frame; 53276479Swpaul 53376479Swpaul{ 53476479Swpaul 53576479Swpaul /* 53676479Swpaul * Set up frame for TX. 53776479Swpaul */ 53876479Swpaul 53976479Swpaul frame->mii_stdelim = NGE_MII_STARTDELIM; 54076479Swpaul frame->mii_opcode = NGE_MII_WRITEOP; 54176479Swpaul frame->mii_turnaround = NGE_MII_TURNAROUND; 54276479Swpaul 54376479Swpaul /* 54476479Swpaul * Turn on data output. 54576479Swpaul */ 54676479Swpaul SIO_SET(NGE_MEAR_MII_DIR); 54776479Swpaul 54876479Swpaul nge_mii_sync(sc); 54976479Swpaul 55076479Swpaul nge_mii_send(sc, frame->mii_stdelim, 2); 55176479Swpaul nge_mii_send(sc, frame->mii_opcode, 2); 55276479Swpaul nge_mii_send(sc, frame->mii_phyaddr, 5); 55376479Swpaul nge_mii_send(sc, frame->mii_regaddr, 5); 55476479Swpaul nge_mii_send(sc, frame->mii_turnaround, 2); 55576479Swpaul nge_mii_send(sc, frame->mii_data, 16); 55676479Swpaul 55776479Swpaul /* Idle bit. */ 55876479Swpaul SIO_SET(NGE_MEAR_MII_CLK); 55976479Swpaul DELAY(1); 56076479Swpaul SIO_CLR(NGE_MEAR_MII_CLK); 56176479Swpaul DELAY(1); 56276479Swpaul 56376479Swpaul /* 56476479Swpaul * Turn off xmit. 56576479Swpaul */ 56676479Swpaul SIO_CLR(NGE_MEAR_MII_DIR); 56776479Swpaul 56876479Swpaul return(0); 56976479Swpaul} 57076479Swpaul 57199497Salfredstatic int 57299497Salfrednge_miibus_readreg(dev, phy, reg) 57376479Swpaul device_t dev; 57476479Swpaul int phy, reg; 57576479Swpaul{ 57676479Swpaul struct nge_softc *sc; 57776479Swpaul struct nge_mii_frame frame; 57876479Swpaul 57976479Swpaul sc = device_get_softc(dev); 58076479Swpaul 58176479Swpaul bzero((char *)&frame, sizeof(frame)); 58276479Swpaul 58376479Swpaul frame.mii_phyaddr = phy; 58476479Swpaul frame.mii_regaddr = reg; 58576479Swpaul nge_mii_readreg(sc, &frame); 58676479Swpaul 58776479Swpaul return(frame.mii_data); 58876479Swpaul} 58976479Swpaul 59099497Salfredstatic int 59199497Salfrednge_miibus_writereg(dev, phy, reg, data) 59276479Swpaul device_t dev; 59376479Swpaul int phy, reg, data; 59476479Swpaul{ 59576479Swpaul struct nge_softc *sc; 59676479Swpaul struct nge_mii_frame frame; 59776479Swpaul 59876479Swpaul sc = device_get_softc(dev); 59976479Swpaul 60076479Swpaul bzero((char *)&frame, sizeof(frame)); 60176479Swpaul 60276479Swpaul frame.mii_phyaddr = phy; 60376479Swpaul frame.mii_regaddr = reg; 60476479Swpaul frame.mii_data = data; 60576479Swpaul nge_mii_writereg(sc, &frame); 60676479Swpaul 60776479Swpaul return(0); 60876479Swpaul} 60976479Swpaul 61099497Salfredstatic void 61199497Salfrednge_miibus_statchg(dev) 61276479Swpaul device_t dev; 61376479Swpaul{ 614101540Sambrisko int status; 61576479Swpaul struct nge_softc *sc; 61676479Swpaul struct mii_data *mii; 61776479Swpaul 61876479Swpaul sc = device_get_softc(dev); 619101540Sambrisko if (sc->nge_tbi) { 620101540Sambrisko if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media) 621101540Sambrisko == IFM_AUTO) { 622101540Sambrisko status = CSR_READ_4(sc, NGE_TBI_ANLPAR); 623101540Sambrisko if (status == 0 || status & NGE_TBIANAR_FDX) { 624101540Sambrisko NGE_SETBIT(sc, NGE_TX_CFG, 625101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 626101540Sambrisko NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 627101540Sambrisko } else { 628101540Sambrisko NGE_CLRBIT(sc, NGE_TX_CFG, 629101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 630101540Sambrisko NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 631101540Sambrisko } 63276479Swpaul 633101540Sambrisko } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK) 634101540Sambrisko != IFM_FDX) { 635101540Sambrisko NGE_CLRBIT(sc, NGE_TX_CFG, 636101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 637101540Sambrisko NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 638101540Sambrisko } else { 639101540Sambrisko NGE_SETBIT(sc, NGE_TX_CFG, 640101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 641101540Sambrisko NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 642101540Sambrisko } 64376479Swpaul } else { 644101540Sambrisko mii = device_get_softc(sc->nge_miibus); 64576479Swpaul 646101540Sambrisko if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) { 647101540Sambrisko NGE_SETBIT(sc, NGE_TX_CFG, 648101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 649101540Sambrisko NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 650101540Sambrisko } else { 651101540Sambrisko NGE_CLRBIT(sc, NGE_TX_CFG, 652101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 653101540Sambrisko NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 654101540Sambrisko } 655101540Sambrisko 656101540Sambrisko /* If we have a 1000Mbps link, set the mode_1000 bit. */ 657101540Sambrisko if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T || 658101540Sambrisko IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX) { 659101540Sambrisko NGE_SETBIT(sc, NGE_CFG, NGE_CFG_MODE_1000); 660101540Sambrisko } else { 661101540Sambrisko NGE_CLRBIT(sc, NGE_CFG, NGE_CFG_MODE_1000); 662101540Sambrisko } 66379424Swpaul } 66476479Swpaul return; 66576479Swpaul} 66676479Swpaul 66799497Salfredstatic void 66899497Salfrednge_setmulti(sc) 66976479Swpaul struct nge_softc *sc; 67076479Swpaul{ 67176479Swpaul struct ifnet *ifp; 67276479Swpaul struct ifmultiaddr *ifma; 67376479Swpaul u_int32_t h = 0, i, filtsave; 67476479Swpaul int bit, index; 67576479Swpaul 676135250Swpaul NGE_LOCK_ASSERT(sc); 67776479Swpaul ifp = &sc->arpcom.ac_if; 67876479Swpaul 67976479Swpaul if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 68076479Swpaul NGE_CLRBIT(sc, NGE_RXFILT_CTL, 68176479Swpaul NGE_RXFILTCTL_MCHASH|NGE_RXFILTCTL_UCHASH); 68276479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLMULTI); 68376479Swpaul return; 68476479Swpaul } 68576479Swpaul 68676479Swpaul /* 68776479Swpaul * We have to explicitly enable the multicast hash table 68876479Swpaul * on the NatSemi chip if we want to use it, which we do. 68976479Swpaul * We also have to tell it that we don't want to use the 69076479Swpaul * hash table for matching unicast addresses. 69176479Swpaul */ 69276479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_MCHASH); 69376479Swpaul NGE_CLRBIT(sc, NGE_RXFILT_CTL, 69476479Swpaul NGE_RXFILTCTL_ALLMULTI|NGE_RXFILTCTL_UCHASH); 69576479Swpaul 69676479Swpaul filtsave = CSR_READ_4(sc, NGE_RXFILT_CTL); 69776479Swpaul 69876479Swpaul /* first, zot all the existing hash bits */ 69976479Swpaul for (i = 0; i < NGE_MCAST_FILTER_LEN; i += 2) { 70076479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_MCAST_LO + i); 70176479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_DATA, 0); 70276479Swpaul } 70376479Swpaul 70476479Swpaul /* 70576479Swpaul * From the 11 bits returned by the crc routine, the top 7 70676479Swpaul * bits represent the 16-bit word in the mcast hash table 70776479Swpaul * that needs to be updated, and the lower 4 bits represent 70876479Swpaul * which bit within that byte needs to be set. 70976479Swpaul */ 71076479Swpaul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 71176479Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 71276479Swpaul continue; 713130270Snaddy h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 714130270Snaddy ifma->ifma_addr), ETHER_ADDR_LEN) >> 21; 71576479Swpaul index = (h >> 4) & 0x7F; 71676479Swpaul bit = h & 0xF; 71776479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_CTL, 71876479Swpaul NGE_FILTADDR_MCAST_LO + (index * 2)); 71976479Swpaul NGE_SETBIT(sc, NGE_RXFILT_DATA, (1 << bit)); 72076479Swpaul } 72176479Swpaul 72276479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_CTL, filtsave); 72376479Swpaul 72476479Swpaul return; 72576479Swpaul} 72676479Swpaul 72799497Salfredstatic void 72899497Salfrednge_reset(sc) 72976479Swpaul struct nge_softc *sc; 73076479Swpaul{ 73176479Swpaul register int i; 73276479Swpaul 73376479Swpaul NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RESET); 73476479Swpaul 73576479Swpaul for (i = 0; i < NGE_TIMEOUT; i++) { 73676479Swpaul if (!(CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RESET)) 73776479Swpaul break; 73876479Swpaul } 73976479Swpaul 74076479Swpaul if (i == NGE_TIMEOUT) 74176479Swpaul printf("nge%d: reset never completed\n", sc->nge_unit); 74276479Swpaul 74376479Swpaul /* Wait a little while for the chip to get its brains in order. */ 74476479Swpaul DELAY(1000); 74576479Swpaul 74676479Swpaul /* 74776479Swpaul * If this is a NetSemi chip, make sure to clear 74876479Swpaul * PME mode. 74976479Swpaul */ 75076479Swpaul CSR_WRITE_4(sc, NGE_CLKRUN, NGE_CLKRUN_PMESTS); 75176479Swpaul CSR_WRITE_4(sc, NGE_CLKRUN, 0); 75276479Swpaul 75376479Swpaul return; 75476479Swpaul} 75576479Swpaul 75676479Swpaul/* 757108470Sschweikh * Probe for a NatSemi chip. Check the PCI vendor and device 75876479Swpaul * IDs against our list and return a device name if we find a match. 75976479Swpaul */ 76099497Salfredstatic int 76199497Salfrednge_probe(dev) 76276479Swpaul device_t dev; 76376479Swpaul{ 76476479Swpaul struct nge_type *t; 76576479Swpaul 76676479Swpaul t = nge_devs; 76776479Swpaul 76876479Swpaul while(t->nge_name != NULL) { 76976479Swpaul if ((pci_get_vendor(dev) == t->nge_vid) && 77076479Swpaul (pci_get_device(dev) == t->nge_did)) { 77176479Swpaul device_set_desc(dev, t->nge_name); 772143158Simp return(BUS_PROBE_DEFAULT); 77376479Swpaul } 77476479Swpaul t++; 77576479Swpaul } 77676479Swpaul 77776479Swpaul return(ENXIO); 77876479Swpaul} 77976479Swpaul 78076479Swpaul/* 78176479Swpaul * Attach the interface. Allocate softc structures, do ifmedia 78276479Swpaul * setup and ethernet/BPF attach. 78376479Swpaul */ 78499497Salfredstatic int 78599497Salfrednge_attach(dev) 78676479Swpaul device_t dev; 78776479Swpaul{ 78876479Swpaul u_char eaddr[ETHER_ADDR_LEN]; 78976479Swpaul struct nge_softc *sc; 79076479Swpaul struct ifnet *ifp; 79176479Swpaul int unit, error = 0, rid; 792101540Sambrisko const char *sep = ""; 79376479Swpaul 79476479Swpaul sc = device_get_softc(dev); 79576479Swpaul unit = device_get_unit(dev); 79676479Swpaul bzero(sc, sizeof(struct nge_softc)); 79776479Swpaul 798135250Swpaul NGE_LOCK_INIT(sc, device_get_nameunit(dev)); 79976479Swpaul /* 80076479Swpaul * Map control/status registers. 80176479Swpaul */ 80276479Swpaul pci_enable_busmaster(dev); 80376479Swpaul 80476479Swpaul rid = NGE_RID; 805127135Snjl sc->nge_res = bus_alloc_resource_any(dev, NGE_RES, &rid, RF_ACTIVE); 80676479Swpaul 80776479Swpaul if (sc->nge_res == NULL) { 80876479Swpaul printf("nge%d: couldn't map ports/memory\n", unit); 80976479Swpaul error = ENXIO; 81076479Swpaul goto fail; 81176479Swpaul } 81276479Swpaul 81376479Swpaul sc->nge_btag = rman_get_bustag(sc->nge_res); 81476479Swpaul sc->nge_bhandle = rman_get_bushandle(sc->nge_res); 81576479Swpaul 81676479Swpaul /* Allocate interrupt */ 81776479Swpaul rid = 0; 818127135Snjl sc->nge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 81976479Swpaul RF_SHAREABLE | RF_ACTIVE); 82076479Swpaul 82176479Swpaul if (sc->nge_irq == NULL) { 82276479Swpaul printf("nge%d: couldn't map interrupt\n", unit); 82376479Swpaul bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res); 82476479Swpaul error = ENXIO; 82576479Swpaul goto fail; 82676479Swpaul } 82776479Swpaul 82876479Swpaul /* Reset the adapter. */ 82976479Swpaul nge_reset(sc); 83076479Swpaul 83176479Swpaul /* 83276479Swpaul * Get station address from the EEPROM. 83376479Swpaul */ 83476479Swpaul nge_read_eeprom(sc, (caddr_t)&eaddr[4], NGE_EE_NODEADDR, 1, 0); 83576479Swpaul nge_read_eeprom(sc, (caddr_t)&eaddr[2], NGE_EE_NODEADDR + 1, 1, 0); 83676479Swpaul nge_read_eeprom(sc, (caddr_t)&eaddr[0], NGE_EE_NODEADDR + 2, 1, 0); 83776479Swpaul 83876479Swpaul sc->nge_unit = unit; 83976479Swpaul bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 84076479Swpaul 84176479Swpaul sc->nge_ldata = contigmalloc(sizeof(struct nge_list_data), M_DEVBUF, 84276479Swpaul M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 84376479Swpaul 84476479Swpaul if (sc->nge_ldata == NULL) { 84576479Swpaul printf("nge%d: no memory for list buffers!\n", unit); 84676479Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq); 84776479Swpaul bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res); 84876479Swpaul error = ENXIO; 84976479Swpaul goto fail; 85076479Swpaul } 85176479Swpaul bzero(sc->nge_ldata, sizeof(struct nge_list_data)); 85276479Swpaul 85376479Swpaul ifp = &sc->arpcom.ac_if; 85476479Swpaul ifp->if_softc = sc; 855121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 85676479Swpaul ifp->if_mtu = ETHERMTU; 857135250Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 85876479Swpaul ifp->if_ioctl = nge_ioctl; 85976479Swpaul ifp->if_start = nge_start; 86076479Swpaul ifp->if_watchdog = nge_watchdog; 86176479Swpaul ifp->if_init = nge_init; 86276479Swpaul ifp->if_baudrate = 1000000000; 86376479Swpaul ifp->if_snd.ifq_maxlen = NGE_TX_LIST_CNT - 1; 86476479Swpaul ifp->if_hwassist = NGE_CSUM_FEATURES; 865106937Ssam ifp->if_capabilities = IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING; 866128132Sru#ifdef DEVICE_POLLING 867128132Sru ifp->if_capabilities |= IFCAP_POLLING; 868128132Sru#endif 86983632Sjlemon ifp->if_capenable = ifp->if_capabilities; 87076479Swpaul 87176479Swpaul /* 87276479Swpaul * Do MII setup. 87376479Swpaul */ 87476479Swpaul if (mii_phy_probe(dev, &sc->nge_miibus, 875101540Sambrisko nge_ifmedia_upd, nge_ifmedia_sts)) { 876101540Sambrisko if (CSR_READ_4(sc, NGE_CFG) & NGE_CFG_TBI_EN) { 877101540Sambrisko sc->nge_tbi = 1; 878101540Sambrisko device_printf(dev, "Using TBI\n"); 879101540Sambrisko 880101540Sambrisko sc->nge_miibus = dev; 881101540Sambrisko 882101540Sambrisko ifmedia_init(&sc->nge_ifmedia, 0, nge_ifmedia_upd, 883101540Sambrisko nge_ifmedia_sts); 884101540Sambrisko#define ADD(m, c) ifmedia_add(&sc->nge_ifmedia, (m), (c), NULL) 885101540Sambrisko#define PRINT(s) printf("%s%s", sep, s); sep = ", " 886101540Sambrisko ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, 0), 0); 887101540Sambrisko device_printf(dev, " "); 888101540Sambrisko ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 0), 0); 889101540Sambrisko PRINT("1000baseSX"); 890101540Sambrisko ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 0),0); 891101540Sambrisko PRINT("1000baseSX-FDX"); 892101540Sambrisko ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 0); 893101540Sambrisko PRINT("auto"); 894101540Sambrisko 895101540Sambrisko printf("\n"); 896101540Sambrisko#undef ADD 897101540Sambrisko#undef PRINT 898101540Sambrisko ifmedia_set(&sc->nge_ifmedia, 899101540Sambrisko IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0)); 900101540Sambrisko 901101540Sambrisko CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO) 902101540Sambrisko | NGE_GPIO_GP4_OUT 903101540Sambrisko | NGE_GPIO_GP1_OUTENB | NGE_GPIO_GP2_OUTENB 904101540Sambrisko | NGE_GPIO_GP3_OUTENB 905101540Sambrisko | NGE_GPIO_GP3_IN | NGE_GPIO_GP4_IN); 906101540Sambrisko 907101540Sambrisko } else { 908101540Sambrisko printf("nge%d: MII without any PHY!\n", sc->nge_unit); 909101540Sambrisko bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq); 910101540Sambrisko bus_release_resource(dev, NGE_RES, NGE_RID, 911101540Sambrisko sc->nge_res); 912101540Sambrisko error = ENXIO; 913101540Sambrisko goto fail; 914101540Sambrisko } 91576479Swpaul } 91676479Swpaul 91776479Swpaul /* 91876479Swpaul * Call MI attach routine. 91976479Swpaul */ 920106937Ssam ether_ifattach(ifp, eaddr); 921135250Swpaul callout_init(&sc->nge_stat_ch, CALLOUT_MPSAFE); 92276479Swpaul 923135250Swpaul /* 924135250Swpaul * Hookup IRQ last. 925135250Swpaul */ 926135250Swpaul error = bus_setup_intr(dev, sc->nge_irq, INTR_TYPE_NET | INTR_MPSAFE, 927135250Swpaul nge_intr, sc, &sc->nge_intrhand); 928135250Swpaul if (error) { 929135250Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq); 930135250Swpaul bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res); 931135250Swpaul printf("nge%d: couldn't set up irq\n", unit); 932135250Swpaul } 933135250Swpaul 93476479Swpaulfail: 935101540Sambrisko 936135250Swpaul if (error) 937135250Swpaul NGE_LOCK_DESTROY(sc); 93876479Swpaul return(error); 93976479Swpaul} 94076479Swpaul 94199497Salfredstatic int 94299497Salfrednge_detach(dev) 94376479Swpaul device_t dev; 94476479Swpaul{ 94576479Swpaul struct nge_softc *sc; 94676479Swpaul struct ifnet *ifp; 94776479Swpaul 94876479Swpaul sc = device_get_softc(dev); 94976479Swpaul ifp = &sc->arpcom.ac_if; 95076479Swpaul 951135250Swpaul NGE_LOCK(sc); 95276479Swpaul nge_reset(sc); 95376479Swpaul nge_stop(sc); 954135250Swpaul NGE_UNLOCK(sc); 955106937Ssam ether_ifdetach(ifp); 95676479Swpaul 95776479Swpaul bus_generic_detach(dev); 958101540Sambrisko if (!sc->nge_tbi) { 959101540Sambrisko device_delete_child(dev, sc->nge_miibus); 960101540Sambrisko } 96176479Swpaul bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand); 96276479Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq); 96376479Swpaul bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res); 96476479Swpaul 96576479Swpaul contigfree(sc->nge_ldata, sizeof(struct nge_list_data), M_DEVBUF); 96676479Swpaul 967135251Swpaul NGE_LOCK_DESTROY(sc); 968135251Swpaul 96976479Swpaul return(0); 97076479Swpaul} 97176479Swpaul 97276479Swpaul/* 97376479Swpaul * Initialize the transmit descriptors. 97476479Swpaul */ 97599497Salfredstatic int 97699497Salfrednge_list_tx_init(sc) 97776479Swpaul struct nge_softc *sc; 97876479Swpaul{ 97976479Swpaul struct nge_list_data *ld; 98076479Swpaul struct nge_ring_data *cd; 98176479Swpaul int i; 98276479Swpaul 98376479Swpaul cd = &sc->nge_cdata; 98476479Swpaul ld = sc->nge_ldata; 98576479Swpaul 98676479Swpaul for (i = 0; i < NGE_TX_LIST_CNT; i++) { 98776479Swpaul if (i == (NGE_TX_LIST_CNT - 1)) { 98876479Swpaul ld->nge_tx_list[i].nge_nextdesc = 98976479Swpaul &ld->nge_tx_list[0]; 99076479Swpaul ld->nge_tx_list[i].nge_next = 99176479Swpaul vtophys(&ld->nge_tx_list[0]); 99276479Swpaul } else { 99376479Swpaul ld->nge_tx_list[i].nge_nextdesc = 99476479Swpaul &ld->nge_tx_list[i + 1]; 99576479Swpaul ld->nge_tx_list[i].nge_next = 99676479Swpaul vtophys(&ld->nge_tx_list[i + 1]); 99776479Swpaul } 99876479Swpaul ld->nge_tx_list[i].nge_mbuf = NULL; 99976479Swpaul ld->nge_tx_list[i].nge_ptr = 0; 100076479Swpaul ld->nge_tx_list[i].nge_ctl = 0; 100176479Swpaul } 100276479Swpaul 100376479Swpaul cd->nge_tx_prod = cd->nge_tx_cons = cd->nge_tx_cnt = 0; 100476479Swpaul 100576479Swpaul return(0); 100676479Swpaul} 100776479Swpaul 100876479Swpaul 100976479Swpaul/* 101076479Swpaul * Initialize the RX descriptors and allocate mbufs for them. Note that 101176479Swpaul * we arrange the descriptors in a closed ring, so that the last descriptor 101276479Swpaul * points back to the first. 101376479Swpaul */ 101499497Salfredstatic int 101599497Salfrednge_list_rx_init(sc) 101676479Swpaul struct nge_softc *sc; 101776479Swpaul{ 101876479Swpaul struct nge_list_data *ld; 101976479Swpaul struct nge_ring_data *cd; 102076479Swpaul int i; 102176479Swpaul 102276479Swpaul ld = sc->nge_ldata; 102376479Swpaul cd = &sc->nge_cdata; 102476479Swpaul 102576479Swpaul for (i = 0; i < NGE_RX_LIST_CNT; i++) { 102676479Swpaul if (nge_newbuf(sc, &ld->nge_rx_list[i], NULL) == ENOBUFS) 102776479Swpaul return(ENOBUFS); 102876479Swpaul if (i == (NGE_RX_LIST_CNT - 1)) { 102976479Swpaul ld->nge_rx_list[i].nge_nextdesc = 103076479Swpaul &ld->nge_rx_list[0]; 103176479Swpaul ld->nge_rx_list[i].nge_next = 103276479Swpaul vtophys(&ld->nge_rx_list[0]); 103376479Swpaul } else { 103476479Swpaul ld->nge_rx_list[i].nge_nextdesc = 103576479Swpaul &ld->nge_rx_list[i + 1]; 103676479Swpaul ld->nge_rx_list[i].nge_next = 103776479Swpaul vtophys(&ld->nge_rx_list[i + 1]); 103876479Swpaul } 103976479Swpaul } 104076479Swpaul 104176479Swpaul cd->nge_rx_prod = 0; 1042135250Swpaul sc->nge_head = sc->nge_tail = NULL; 104376479Swpaul 104476479Swpaul return(0); 104576479Swpaul} 104676479Swpaul 104776479Swpaul/* 104876479Swpaul * Initialize an RX descriptor and attach an MBUF cluster. 104976479Swpaul */ 105099497Salfredstatic int 105199497Salfrednge_newbuf(sc, c, m) 105276479Swpaul struct nge_softc *sc; 105376479Swpaul struct nge_desc *c; 105476479Swpaul struct mbuf *m; 105576479Swpaul{ 105676479Swpaul 105776479Swpaul if (m == NULL) { 1058144241Ssam m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1059144241Ssam if (m == NULL) 1060135250Swpaul return (ENOBUFS); 1061135250Swpaul } else 1062135250Swpaul m->m_data = m->m_ext.ext_buf; 106376479Swpaul 1064135250Swpaul m->m_len = m->m_pkthdr.len = MCLBYTES; 106576479Swpaul 1066144241Ssam m_adj(m, sizeof(u_int64_t)); 106776479Swpaul 1068144241Ssam c->nge_mbuf = m; 1069144241Ssam c->nge_ptr = vtophys(mtod(m, caddr_t)); 1070144241Ssam c->nge_ctl = m->m_len; 107176479Swpaul c->nge_extsts = 0; 107276479Swpaul 107376479Swpaul return(0); 107476479Swpaul} 107576479Swpaul 1076135250Swpaul#ifdef NGE_FIXUP_RX 1077135250Swpaulstatic __inline void 1078135250Swpaulnge_fixup_rx(m) 1079135250Swpaul struct mbuf *m; 1080135250Swpaul{ 1081135250Swpaul int i; 1082135250Swpaul uint16_t *src, *dst; 1083135250Swpaul 1084135250Swpaul src = mtod(m, uint16_t *); 1085135250Swpaul dst = src - 1; 1086135250Swpaul 1087135250Swpaul for (i = 0; i < (m->m_len / sizeof(uint16_t) + 1); i++) 1088135250Swpaul *dst++ = *src++; 1089135250Swpaul 1090135250Swpaul m->m_data -= ETHER_ALIGN; 1091135250Swpaul 109276479Swpaul return; 1093135250Swpaul} 109476479Swpaul#endif 109576479Swpaul 109676479Swpaul/* 109776479Swpaul * A frame has been uploaded: pass the resulting mbuf chain up to 109876479Swpaul * the higher level protocols. 109976479Swpaul */ 110099497Salfredstatic void 110199497Salfrednge_rxeof(sc) 110276479Swpaul struct nge_softc *sc; 110376479Swpaul{ 110476479Swpaul struct mbuf *m; 110576479Swpaul struct ifnet *ifp; 110676479Swpaul struct nge_desc *cur_rx; 110776479Swpaul int i, total_len = 0; 110876479Swpaul u_int32_t rxstat; 110976479Swpaul 1110135250Swpaul NGE_LOCK_ASSERT(sc); 111176479Swpaul ifp = &sc->arpcom.ac_if; 111276479Swpaul i = sc->nge_cdata.nge_rx_prod; 111376479Swpaul 111476479Swpaul while(NGE_OWNDESC(&sc->nge_ldata->nge_rx_list[i])) { 111576479Swpaul u_int32_t extsts; 111676479Swpaul 1117106507Ssimokawa#ifdef DEVICE_POLLING 1118128122Srwatson if (ifp->if_flags & IFF_POLLING) { 1119106507Ssimokawa if (sc->rxcycles <= 0) 1120106507Ssimokawa break; 1121106507Ssimokawa sc->rxcycles--; 1122106507Ssimokawa } 1123106507Ssimokawa#endif /* DEVICE_POLLING */ 1124106507Ssimokawa 112576479Swpaul cur_rx = &sc->nge_ldata->nge_rx_list[i]; 112676479Swpaul rxstat = cur_rx->nge_rxstat; 112776479Swpaul extsts = cur_rx->nge_extsts; 112876479Swpaul m = cur_rx->nge_mbuf; 112976479Swpaul cur_rx->nge_mbuf = NULL; 113076479Swpaul total_len = NGE_RXBYTES(cur_rx); 113176479Swpaul NGE_INC(i, NGE_RX_LIST_CNT); 1132135250Swpaul 1133135250Swpaul if (rxstat & NGE_CMDSTS_MORE) { 1134135250Swpaul m->m_len = total_len; 1135135250Swpaul if (sc->nge_head == NULL) { 1136135250Swpaul m->m_pkthdr.len = total_len; 1137135250Swpaul sc->nge_head = sc->nge_tail = m; 1138135250Swpaul } else { 1139135250Swpaul m->m_flags &= ~M_PKTHDR; 1140135250Swpaul sc->nge_head->m_pkthdr.len += total_len; 1141135250Swpaul sc->nge_tail->m_next = m; 1142135250Swpaul sc->nge_tail = m; 1143135250Swpaul } 1144135250Swpaul nge_newbuf(sc, cur_rx, NULL); 1145135250Swpaul continue; 1146135250Swpaul } 1147135250Swpaul 114876479Swpaul /* 114976479Swpaul * If an error occurs, update stats, clear the 115076479Swpaul * status word and leave the mbuf cluster in place: 115176479Swpaul * it should simply get re-used next time this descriptor 115276479Swpaul * comes up in the ring. 115376479Swpaul */ 115476479Swpaul if (!(rxstat & NGE_CMDSTS_PKT_OK)) { 115576479Swpaul ifp->if_ierrors++; 1156135250Swpaul if (sc->nge_head != NULL) { 1157135250Swpaul m_freem(sc->nge_head); 1158135250Swpaul sc->nge_head = sc->nge_tail = NULL; 1159135250Swpaul } 116076479Swpaul nge_newbuf(sc, cur_rx, m); 116176479Swpaul continue; 116276479Swpaul } 116376479Swpaul 1164135250Swpaul /* Try conjure up a replacement mbuf. */ 1165135250Swpaul 1166135250Swpaul if (nge_newbuf(sc, cur_rx, NULL)) { 1167135250Swpaul ifp->if_ierrors++; 1168135250Swpaul if (sc->nge_head != NULL) { 1169135250Swpaul m_freem(sc->nge_head); 1170135250Swpaul sc->nge_head = sc->nge_tail = NULL; 1171135250Swpaul } 1172135250Swpaul nge_newbuf(sc, cur_rx, m); 1173135250Swpaul continue; 1174135250Swpaul } 1175135250Swpaul 1176135250Swpaul if (sc->nge_head != NULL) { 1177135250Swpaul m->m_len = total_len; 1178135250Swpaul m->m_flags &= ~M_PKTHDR; 1179135250Swpaul sc->nge_tail->m_next = m; 1180135250Swpaul m = sc->nge_head; 1181135250Swpaul m->m_pkthdr.len += total_len; 1182135250Swpaul sc->nge_head = sc->nge_tail = NULL; 1183135250Swpaul } else 1184135250Swpaul m->m_pkthdr.len = m->m_len = total_len; 1185135250Swpaul 118676479Swpaul /* 118776479Swpaul * Ok. NatSemi really screwed up here. This is the 118876479Swpaul * only gigE chip I know of with alignment constraints 118976479Swpaul * on receive buffers. RX buffers must be 64-bit aligned. 119076479Swpaul */ 119179562Swpaul /* 119279562Swpaul * By popular demand, ignore the alignment problems 119379562Swpaul * on the Intel x86 platform. The performance hit 119479562Swpaul * incurred due to unaligned accesses is much smaller 119579562Swpaul * than the hit produced by forcing buffer copies all 119679562Swpaul * the time, especially with jumbo frames. We still 119779562Swpaul * need to fix up the alignment everywhere else though. 119879562Swpaul */ 1199135250Swpaul#ifdef NGE_FIXUP_RX 1200135250Swpaul nge_fixup_rx(m); 120179562Swpaul#endif 120276479Swpaul 120376479Swpaul ifp->if_ipackets++; 1204135250Swpaul m->m_pkthdr.rcvif = ifp; 120576479Swpaul 120676479Swpaul /* Do IP checksum checking. */ 120778323Swpaul if (extsts & NGE_RXEXTSTS_IPPKT) 120878323Swpaul m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 120978323Swpaul if (!(extsts & NGE_RXEXTSTS_IPCSUMERR)) 121078323Swpaul m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 121178323Swpaul if ((extsts & NGE_RXEXTSTS_TCPPKT && 121278323Swpaul !(extsts & NGE_RXEXTSTS_TCPCSUMERR)) || 121378323Swpaul (extsts & NGE_RXEXTSTS_UDPPKT && 121478323Swpaul !(extsts & NGE_RXEXTSTS_UDPCSUMERR))) { 121578323Swpaul m->m_pkthdr.csum_flags |= 121678323Swpaul CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 121778323Swpaul m->m_pkthdr.csum_data = 0xffff; 121878323Swpaul } 121976479Swpaul 122076479Swpaul /* 122176479Swpaul * If we received a packet with a vlan tag, pass it 122276479Swpaul * to vlan_input() instead of ether_input(). 122376479Swpaul */ 122476479Swpaul if (extsts & NGE_RXEXTSTS_VLANPKT) { 1225106937Ssam VLAN_INPUT_TAG(ifp, m, 1226127615Sru ntohs(extsts & NGE_RXEXTSTS_VTCI), continue); 1227106937Ssam } 1228135250Swpaul NGE_UNLOCK(sc); 1229106937Ssam (*ifp->if_input)(ifp, m); 1230135250Swpaul NGE_LOCK(sc); 123176479Swpaul } 123276479Swpaul 123376479Swpaul sc->nge_cdata.nge_rx_prod = i; 123476479Swpaul 123576479Swpaul return; 123676479Swpaul} 123776479Swpaul 123876479Swpaul/* 123976479Swpaul * A frame was downloaded to the chip. It's safe for us to clean up 124076479Swpaul * the list buffers. 124176479Swpaul */ 124276479Swpaul 124399497Salfredstatic void 124499497Salfrednge_txeof(sc) 124576479Swpaul struct nge_softc *sc; 124676479Swpaul{ 1247128130Sru struct nge_desc *cur_tx; 124876479Swpaul struct ifnet *ifp; 124976479Swpaul u_int32_t idx; 125076479Swpaul 1251135250Swpaul NGE_LOCK_ASSERT(sc); 125276479Swpaul ifp = &sc->arpcom.ac_if; 125376479Swpaul 125476479Swpaul /* 125576479Swpaul * Go through our tx list and free mbufs for those 125676479Swpaul * frames that have been transmitted. 125776479Swpaul */ 125876479Swpaul idx = sc->nge_cdata.nge_tx_cons; 125976479Swpaul while (idx != sc->nge_cdata.nge_tx_prod) { 126076479Swpaul cur_tx = &sc->nge_ldata->nge_tx_list[idx]; 126176479Swpaul 126276479Swpaul if (NGE_OWNDESC(cur_tx)) 126376479Swpaul break; 126476479Swpaul 126576479Swpaul if (cur_tx->nge_ctl & NGE_CMDSTS_MORE) { 126676479Swpaul sc->nge_cdata.nge_tx_cnt--; 126776479Swpaul NGE_INC(idx, NGE_TX_LIST_CNT); 126876479Swpaul continue; 126976479Swpaul } 127076479Swpaul 127176479Swpaul if (!(cur_tx->nge_ctl & NGE_CMDSTS_PKT_OK)) { 127276479Swpaul ifp->if_oerrors++; 127376479Swpaul if (cur_tx->nge_txstat & NGE_TXSTAT_EXCESSCOLLS) 127476479Swpaul ifp->if_collisions++; 127576479Swpaul if (cur_tx->nge_txstat & NGE_TXSTAT_OUTOFWINCOLL) 127676479Swpaul ifp->if_collisions++; 127776479Swpaul } 127876479Swpaul 127976479Swpaul ifp->if_collisions += 128076479Swpaul (cur_tx->nge_txstat & NGE_TXSTAT_COLLCNT) >> 16; 128176479Swpaul 128276479Swpaul ifp->if_opackets++; 128376479Swpaul if (cur_tx->nge_mbuf != NULL) { 128476479Swpaul m_freem(cur_tx->nge_mbuf); 128576479Swpaul cur_tx->nge_mbuf = NULL; 1286128130Sru ifp->if_flags &= ~IFF_OACTIVE; 128776479Swpaul } 128876479Swpaul 128976479Swpaul sc->nge_cdata.nge_tx_cnt--; 129076479Swpaul NGE_INC(idx, NGE_TX_LIST_CNT); 129176479Swpaul } 129276479Swpaul 129376479Swpaul sc->nge_cdata.nge_tx_cons = idx; 129476479Swpaul 1295128130Sru if (idx == sc->nge_cdata.nge_tx_prod) 1296128130Sru ifp->if_timer = 0; 129776479Swpaul 129876479Swpaul return; 129976479Swpaul} 130076479Swpaul 130199497Salfredstatic void 130299497Salfrednge_tick(xsc) 130376479Swpaul void *xsc; 130476479Swpaul{ 130576479Swpaul struct nge_softc *sc; 1306135250Swpaul 1307135250Swpaul sc = xsc; 1308135250Swpaul 1309135250Swpaul NGE_LOCK(sc); 1310135250Swpaul nge_tick_locked(sc); 1311135250Swpaul NGE_UNLOCK(sc); 1312135250Swpaul} 1313135250Swpaul 1314135250Swpaulstatic void 1315135250Swpaulnge_tick_locked(sc) 1316135250Swpaul struct nge_softc *sc; 1317135250Swpaul{ 131876479Swpaul struct mii_data *mii; 131976479Swpaul struct ifnet *ifp; 132076479Swpaul 1321135250Swpaul NGE_LOCK_ASSERT(sc); 132276479Swpaul ifp = &sc->arpcom.ac_if; 132376479Swpaul 1324101540Sambrisko if (sc->nge_tbi) { 1325101540Sambrisko if (!sc->nge_link) { 1326101540Sambrisko if (CSR_READ_4(sc, NGE_TBI_BMSR) 1327101540Sambrisko & NGE_TBIBMSR_ANEG_DONE) { 1328137402Sphk if (bootverbose) 1329137402Sphk printf("nge%d: gigabit link up\n", 1330137402Sphk sc->nge_unit); 1331101540Sambrisko nge_miibus_statchg(sc->nge_miibus); 1332101540Sambrisko sc->nge_link++; 1333101540Sambrisko if (ifp->if_snd.ifq_head != NULL) 1334135250Swpaul nge_start_locked(ifp); 1335101540Sambrisko } 133696028Sphk } 1337101540Sambrisko } else { 1338101540Sambrisko mii = device_get_softc(sc->nge_miibus); 1339101540Sambrisko mii_tick(mii); 1340101540Sambrisko 1341101540Sambrisko if (!sc->nge_link) { 1342101540Sambrisko if (mii->mii_media_status & IFM_ACTIVE && 1343101540Sambrisko IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 1344101540Sambrisko sc->nge_link++; 1345101540Sambrisko if (IFM_SUBTYPE(mii->mii_media_active) 1346137402Sphk == IFM_1000_T && bootverbose) 1347101540Sambrisko printf("nge%d: gigabit link up\n", 1348101540Sambrisko sc->nge_unit); 1349101540Sambrisko if (ifp->if_snd.ifq_head != NULL) 1350135250Swpaul nge_start_locked(ifp); 1351101540Sambrisko } 1352101540Sambrisko } 135376479Swpaul } 1354135250Swpaul callout_reset(&sc->nge_stat_ch, hz, nge_tick, sc); 135576479Swpaul 135676479Swpaul return; 135776479Swpaul} 135876479Swpaul 1359106507Ssimokawa#ifdef DEVICE_POLLING 1360106507Ssimokawastatic poll_handler_t nge_poll; 1361106507Ssimokawa 136299497Salfredstatic void 1363106507Ssimokawange_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1364106507Ssimokawa{ 1365106507Ssimokawa struct nge_softc *sc = ifp->if_softc; 1366106507Ssimokawa 1367135250Swpaul NGE_LOCK(sc); 1368128132Sru if (!(ifp->if_capenable & IFCAP_POLLING)) { 1369128132Sru ether_poll_deregister(ifp); 1370128132Sru cmd = POLL_DEREGISTER; 1371128132Sru } 1372106507Ssimokawa if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */ 1373106507Ssimokawa CSR_WRITE_4(sc, NGE_IER, 1); 1374135250Swpaul NGE_UNLOCK(sc); 1375106507Ssimokawa return; 1376106507Ssimokawa } 1377106507Ssimokawa 1378106507Ssimokawa /* 1379106507Ssimokawa * On the nge, reading the status register also clears it. 1380106507Ssimokawa * So before returning to intr mode we must make sure that all 1381106507Ssimokawa * possible pending sources of interrupts have been served. 1382106507Ssimokawa * In practice this means run to completion the *eof routines, 1383106507Ssimokawa * and then call the interrupt routine 1384106507Ssimokawa */ 1385106507Ssimokawa sc->rxcycles = count; 1386106507Ssimokawa nge_rxeof(sc); 1387106507Ssimokawa nge_txeof(sc); 1388106507Ssimokawa if (ifp->if_snd.ifq_head != NULL) 1389135250Swpaul nge_start_locked(ifp); 1390106507Ssimokawa 1391106507Ssimokawa if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) { 1392106507Ssimokawa u_int32_t status; 1393106507Ssimokawa 1394106507Ssimokawa /* Reading the ISR register clears all interrupts. */ 1395106507Ssimokawa status = CSR_READ_4(sc, NGE_ISR); 1396106507Ssimokawa 1397106507Ssimokawa if (status & (NGE_ISR_RX_ERR|NGE_ISR_RX_OFLOW)) 1398106507Ssimokawa nge_rxeof(sc); 1399106507Ssimokawa 1400106507Ssimokawa if (status & (NGE_ISR_RX_IDLE)) 1401106507Ssimokawa NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE); 1402106507Ssimokawa 1403106507Ssimokawa if (status & NGE_ISR_SYSERR) { 1404106507Ssimokawa nge_reset(sc); 1405135250Swpaul nge_init_locked(sc); 1406106507Ssimokawa } 1407106507Ssimokawa } 1408135250Swpaul NGE_UNLOCK(sc); 1409106507Ssimokawa} 1410106507Ssimokawa#endif /* DEVICE_POLLING */ 1411106507Ssimokawa 1412106507Ssimokawastatic void 141399497Salfrednge_intr(arg) 141476479Swpaul void *arg; 141576479Swpaul{ 141676479Swpaul struct nge_softc *sc; 141776479Swpaul struct ifnet *ifp; 141876479Swpaul u_int32_t status; 141976479Swpaul 142076479Swpaul sc = arg; 142176479Swpaul ifp = &sc->arpcom.ac_if; 142276479Swpaul 1423135250Swpaul NGE_LOCK(sc); 1424106507Ssimokawa#ifdef DEVICE_POLLING 1425135250Swpaul if (ifp->if_flags & IFF_POLLING) { 1426135250Swpaul NGE_UNLOCK(sc); 1427106507Ssimokawa return; 1428135250Swpaul } 1429128132Sru if ((ifp->if_capenable & IFCAP_POLLING) && 1430128132Sru ether_poll_register(nge_poll, ifp)) { /* ok, disable interrupts */ 1431106507Ssimokawa CSR_WRITE_4(sc, NGE_IER, 0); 1432135250Swpaul NGE_UNLOCK(sc); 1433106507Ssimokawa nge_poll(ifp, 0, 1); 1434106507Ssimokawa return; 1435106507Ssimokawa } 1436106507Ssimokawa#endif /* DEVICE_POLLING */ 1437106507Ssimokawa 143876479Swpaul /* Supress unwanted interrupts */ 143976479Swpaul if (!(ifp->if_flags & IFF_UP)) { 144076479Swpaul nge_stop(sc); 1441135250Swpaul NGE_UNLOCK(sc); 144276479Swpaul return; 144376479Swpaul } 144476479Swpaul 144576479Swpaul /* Disable interrupts. */ 144676479Swpaul CSR_WRITE_4(sc, NGE_IER, 0); 144776479Swpaul 1448101540Sambrisko /* Data LED on for TBI mode */ 1449101540Sambrisko if(sc->nge_tbi) 1450101540Sambrisko CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO) 1451101540Sambrisko | NGE_GPIO_GP3_OUT); 1452101540Sambrisko 145376479Swpaul for (;;) { 145476479Swpaul /* Reading the ISR register clears all interrupts. */ 145576479Swpaul status = CSR_READ_4(sc, NGE_ISR); 145676479Swpaul 145776479Swpaul if ((status & NGE_INTRS) == 0) 145876479Swpaul break; 145976479Swpaul 146076479Swpaul if ((status & NGE_ISR_TX_DESC_OK) || 146176479Swpaul (status & NGE_ISR_TX_ERR) || 146276479Swpaul (status & NGE_ISR_TX_OK) || 146376479Swpaul (status & NGE_ISR_TX_IDLE)) 146476479Swpaul nge_txeof(sc); 146576479Swpaul 146676479Swpaul if ((status & NGE_ISR_RX_DESC_OK) || 146779798Swpaul (status & NGE_ISR_RX_ERR) || 146883678Swpaul (status & NGE_ISR_RX_OFLOW) || 146994612Sphk (status & NGE_ISR_RX_FIFO_OFLOW) || 147094612Sphk (status & NGE_ISR_RX_IDLE) || 147176479Swpaul (status & NGE_ISR_RX_OK)) 147276479Swpaul nge_rxeof(sc); 147394612Sphk 147494612Sphk if ((status & NGE_ISR_RX_IDLE)) 147594612Sphk NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE); 147694612Sphk 147776479Swpaul if (status & NGE_ISR_SYSERR) { 147876479Swpaul nge_reset(sc); 147976479Swpaul ifp->if_flags &= ~IFF_RUNNING; 1480135250Swpaul nge_init_locked(sc); 148176479Swpaul } 148276479Swpaul 148396028Sphk#if 0 148496028Sphk /* 148596028Sphk * XXX: nge_tick() is not ready to be called this way 148696028Sphk * it screws up the aneg timeout because mii_tick() is 148796028Sphk * only to be called once per second. 148896028Sphk */ 148976479Swpaul if (status & NGE_IMR_PHY_INTR) { 149076479Swpaul sc->nge_link = 0; 1491135250Swpaul nge_tick_locked(sc); 149276479Swpaul } 149396028Sphk#endif 149476479Swpaul } 149576479Swpaul 149676479Swpaul /* Re-enable interrupts. */ 149776479Swpaul CSR_WRITE_4(sc, NGE_IER, 1); 149876479Swpaul 149976479Swpaul if (ifp->if_snd.ifq_head != NULL) 1500135250Swpaul nge_start_locked(ifp); 150176479Swpaul 1502101540Sambrisko /* Data LED off for TBI mode */ 1503101540Sambrisko 1504101540Sambrisko if(sc->nge_tbi) 1505101540Sambrisko CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO) 1506101540Sambrisko & ~NGE_GPIO_GP3_OUT); 1507101540Sambrisko 1508135250Swpaul NGE_UNLOCK(sc); 1509135250Swpaul 151076479Swpaul return; 151176479Swpaul} 151276479Swpaul 151376479Swpaul/* 151476479Swpaul * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data 151576479Swpaul * pointers to the fragment pointers. 151676479Swpaul */ 151799497Salfredstatic int 151899497Salfrednge_encap(sc, m_head, txidx) 151976479Swpaul struct nge_softc *sc; 152076479Swpaul struct mbuf *m_head; 152176479Swpaul u_int32_t *txidx; 152276479Swpaul{ 152376479Swpaul struct nge_desc *f = NULL; 152476479Swpaul struct mbuf *m; 152576479Swpaul int frag, cur, cnt = 0; 1526106937Ssam struct m_tag *mtag; 152776479Swpaul 152876479Swpaul /* 152976479Swpaul * Start packing the mbufs in this chain into 153076479Swpaul * the fragment pointers. Stop when we run out 153176479Swpaul * of fragments or hit the end of the mbuf chain. 153276479Swpaul */ 153376479Swpaul m = m_head; 153476479Swpaul cur = frag = *txidx; 153576479Swpaul 153676479Swpaul for (m = m_head; m != NULL; m = m->m_next) { 153776479Swpaul if (m->m_len != 0) { 153876479Swpaul if ((NGE_TX_LIST_CNT - 153976479Swpaul (sc->nge_cdata.nge_tx_cnt + cnt)) < 2) 154076479Swpaul return(ENOBUFS); 154176479Swpaul f = &sc->nge_ldata->nge_tx_list[frag]; 154276479Swpaul f->nge_ctl = NGE_CMDSTS_MORE | m->m_len; 154376479Swpaul f->nge_ptr = vtophys(mtod(m, vm_offset_t)); 154476479Swpaul if (cnt != 0) 154576479Swpaul f->nge_ctl |= NGE_CMDSTS_OWN; 154676479Swpaul cur = frag; 154776479Swpaul NGE_INC(frag, NGE_TX_LIST_CNT); 154876479Swpaul cnt++; 154976479Swpaul } 155076479Swpaul } 155176479Swpaul 155276479Swpaul if (m != NULL) 155376479Swpaul return(ENOBUFS); 155476479Swpaul 155578286Swpaul sc->nge_ldata->nge_tx_list[*txidx].nge_extsts = 0; 155676479Swpaul if (m_head->m_pkthdr.csum_flags) { 155776479Swpaul if (m_head->m_pkthdr.csum_flags & CSUM_IP) 155878286Swpaul sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |= 155976479Swpaul NGE_TXEXTSTS_IPCSUM; 156076479Swpaul if (m_head->m_pkthdr.csum_flags & CSUM_TCP) 156178286Swpaul sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |= 156276479Swpaul NGE_TXEXTSTS_TCPCSUM; 156376479Swpaul if (m_head->m_pkthdr.csum_flags & CSUM_UDP) 156478286Swpaul sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |= 156576479Swpaul NGE_TXEXTSTS_UDPCSUM; 156676479Swpaul } 156776479Swpaul 1568144148Ssam mtag = VLAN_OUTPUT_TAG(&sc->arpcom.ac_if, m_head); 1569106937Ssam if (mtag != NULL) { 157076479Swpaul sc->nge_ldata->nge_tx_list[cur].nge_extsts |= 1571127615Sru (NGE_TXEXTSTS_VLANPKT|htons(VLAN_TAG_VALUE(mtag))); 157276479Swpaul } 157376479Swpaul 157476479Swpaul sc->nge_ldata->nge_tx_list[cur].nge_mbuf = m_head; 157576479Swpaul sc->nge_ldata->nge_tx_list[cur].nge_ctl &= ~NGE_CMDSTS_MORE; 157676479Swpaul sc->nge_ldata->nge_tx_list[*txidx].nge_ctl |= NGE_CMDSTS_OWN; 157776479Swpaul sc->nge_cdata.nge_tx_cnt += cnt; 157876479Swpaul *txidx = frag; 157976479Swpaul 158076479Swpaul return(0); 158176479Swpaul} 158276479Swpaul 158376479Swpaul/* 158476479Swpaul * Main transmit routine. To avoid having to do mbuf copies, we put pointers 158576479Swpaul * to the mbuf data regions directly in the transmit lists. We also save a 158676479Swpaul * copy of the pointers since the transmit list fragment pointers are 158776479Swpaul * physical addresses. 158876479Swpaul */ 158976479Swpaul 159099497Salfredstatic void 159199497Salfrednge_start(ifp) 159276479Swpaul struct ifnet *ifp; 159376479Swpaul{ 159476479Swpaul struct nge_softc *sc; 1595135250Swpaul 1596135250Swpaul sc = ifp->if_softc; 1597135250Swpaul NGE_LOCK(sc); 1598135250Swpaul nge_start_locked(ifp); 1599135250Swpaul NGE_UNLOCK(sc); 1600135250Swpaul} 1601135250Swpaul 1602135250Swpaulstatic void 1603135250Swpaulnge_start_locked(ifp) 1604135250Swpaul struct ifnet *ifp; 1605135250Swpaul{ 1606135250Swpaul struct nge_softc *sc; 160776479Swpaul struct mbuf *m_head = NULL; 160876479Swpaul u_int32_t idx; 160976479Swpaul 161076479Swpaul sc = ifp->if_softc; 161176479Swpaul 161276479Swpaul if (!sc->nge_link) 161376479Swpaul return; 161476479Swpaul 161576479Swpaul idx = sc->nge_cdata.nge_tx_prod; 161676479Swpaul 161776479Swpaul if (ifp->if_flags & IFF_OACTIVE) 161876479Swpaul return; 161976479Swpaul 162076479Swpaul while(sc->nge_ldata->nge_tx_list[idx].nge_mbuf == NULL) { 162176479Swpaul IF_DEQUEUE(&ifp->if_snd, m_head); 162276479Swpaul if (m_head == NULL) 162376479Swpaul break; 162476479Swpaul 162576479Swpaul if (nge_encap(sc, m_head, &idx)) { 162676479Swpaul IF_PREPEND(&ifp->if_snd, m_head); 162776479Swpaul ifp->if_flags |= IFF_OACTIVE; 162876479Swpaul break; 162976479Swpaul } 163076479Swpaul 163176479Swpaul /* 163276479Swpaul * If there's a BPF listener, bounce a copy of this frame 163376479Swpaul * to him. 163476479Swpaul */ 1635106937Ssam BPF_MTAP(ifp, m_head); 163676479Swpaul 163776479Swpaul } 163876479Swpaul 163976479Swpaul /* Transmit */ 164076479Swpaul sc->nge_cdata.nge_tx_prod = idx; 164176479Swpaul NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_ENABLE); 164276479Swpaul 164376479Swpaul /* 164476479Swpaul * Set a timeout in case the chip goes out to lunch. 164576479Swpaul */ 164676479Swpaul ifp->if_timer = 5; 164776479Swpaul 164876479Swpaul return; 164976479Swpaul} 165076479Swpaul 165199497Salfredstatic void 165299497Salfrednge_init(xsc) 165376479Swpaul void *xsc; 165476479Swpaul{ 165576479Swpaul struct nge_softc *sc = xsc; 1656135250Swpaul 1657135250Swpaul NGE_LOCK(sc); 1658135250Swpaul nge_init_locked(sc); 1659135250Swpaul NGE_UNLOCK(sc); 1660135250Swpaul} 1661135250Swpaul 1662135250Swpaulstatic void 1663135250Swpaulnge_init_locked(sc) 1664135250Swpaul struct nge_softc *sc; 1665135250Swpaul{ 166676479Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 166776479Swpaul struct mii_data *mii; 166876479Swpaul 1669135250Swpaul NGE_LOCK_ASSERT(sc); 1670135250Swpaul 167176479Swpaul if (ifp->if_flags & IFF_RUNNING) 167276479Swpaul return; 167376479Swpaul 167476479Swpaul /* 167576479Swpaul * Cancel pending I/O and free all RX/TX buffers. 167676479Swpaul */ 167776479Swpaul nge_stop(sc); 167876479Swpaul 1679101540Sambrisko if (sc->nge_tbi) { 1680101540Sambrisko mii = NULL; 1681101540Sambrisko } else { 1682101540Sambrisko mii = device_get_softc(sc->nge_miibus); 1683101540Sambrisko } 168476479Swpaul 168576479Swpaul /* Set MAC address */ 168676479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR0); 168776479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_DATA, 168876479Swpaul ((u_int16_t *)sc->arpcom.ac_enaddr)[0]); 168976479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR1); 169076479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_DATA, 169176479Swpaul ((u_int16_t *)sc->arpcom.ac_enaddr)[1]); 169276479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR2); 169376479Swpaul CSR_WRITE_4(sc, NGE_RXFILT_DATA, 169476479Swpaul ((u_int16_t *)sc->arpcom.ac_enaddr)[2]); 169576479Swpaul 169676479Swpaul /* Init circular RX list. */ 169776479Swpaul if (nge_list_rx_init(sc) == ENOBUFS) { 169876479Swpaul printf("nge%d: initialization failed: no " 169976479Swpaul "memory for rx buffers\n", sc->nge_unit); 170076479Swpaul nge_stop(sc); 170176479Swpaul return; 170276479Swpaul } 170376479Swpaul 170476479Swpaul /* 170576479Swpaul * Init tx descriptors. 170676479Swpaul */ 170776479Swpaul nge_list_tx_init(sc); 170876479Swpaul 170976479Swpaul /* 171076479Swpaul * For the NatSemi chip, we have to explicitly enable the 171176479Swpaul * reception of ARP frames, as well as turn on the 'perfect 171276479Swpaul * match' filter where we store the station address, otherwise 171376479Swpaul * we won't receive unicasts meant for this host. 171476479Swpaul */ 171576479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ARP); 171676479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_PERFECT); 171776479Swpaul 171876479Swpaul /* If we want promiscuous mode, set the allframes bit. */ 171976479Swpaul if (ifp->if_flags & IFF_PROMISC) { 172076479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS); 172176479Swpaul } else { 172276479Swpaul NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS); 172376479Swpaul } 172476479Swpaul 172576479Swpaul /* 172676479Swpaul * Set the capture broadcast bit to capture broadcast frames. 172776479Swpaul */ 172876479Swpaul if (ifp->if_flags & IFF_BROADCAST) { 172976479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD); 173076479Swpaul } else { 173176479Swpaul NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD); 173276479Swpaul } 173376479Swpaul 173476479Swpaul /* 173576479Swpaul * Load the multicast filter. 173676479Swpaul */ 173776479Swpaul nge_setmulti(sc); 173876479Swpaul 173976479Swpaul /* Turn the receive filter on */ 174076479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ENABLE); 174176479Swpaul 174276479Swpaul /* 174376479Swpaul * Load the address of the RX and TX lists. 174476479Swpaul */ 174576479Swpaul CSR_WRITE_4(sc, NGE_RX_LISTPTR, 174676479Swpaul vtophys(&sc->nge_ldata->nge_rx_list[0])); 174776479Swpaul CSR_WRITE_4(sc, NGE_TX_LISTPTR, 174876479Swpaul vtophys(&sc->nge_ldata->nge_tx_list[0])); 174976479Swpaul 175076479Swpaul /* Set RX configuration */ 175176479Swpaul CSR_WRITE_4(sc, NGE_RX_CFG, NGE_RXCFG); 175276479Swpaul /* 175376479Swpaul * Enable hardware checksum validation for all IPv4 175476479Swpaul * packets, do not reject packets with bad checksums. 175576479Swpaul */ 175678323Swpaul CSR_WRITE_4(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_IPCSUM_ENB); 175776479Swpaul 175876479Swpaul /* 175983115Sbrooks * Tell the chip to detect and strip VLAN tag info from 176083115Sbrooks * received frames. The tag will be provided in the extsts 176183115Sbrooks * field in the RX descriptors. 176276479Swpaul */ 176376479Swpaul NGE_SETBIT(sc, NGE_VLAN_IP_RXCTL, 176476479Swpaul NGE_VIPRXCTL_TAG_DETECT_ENB|NGE_VIPRXCTL_TAG_STRIP_ENB); 176576479Swpaul 176676479Swpaul /* Set TX configuration */ 176776479Swpaul CSR_WRITE_4(sc, NGE_TX_CFG, NGE_TXCFG); 176876479Swpaul 176976479Swpaul /* 177076479Swpaul * Enable TX IPv4 checksumming on a per-packet basis. 177176479Swpaul */ 177278323Swpaul CSR_WRITE_4(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_CSUM_PER_PKT); 177376479Swpaul 177476479Swpaul /* 177583115Sbrooks * Tell the chip to insert VLAN tags on a per-packet basis as 177683115Sbrooks * dictated by the code in the frame encapsulation routine. 177776479Swpaul */ 177876479Swpaul NGE_SETBIT(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_TAG_PER_PKT); 177976479Swpaul 178076479Swpaul /* Set full/half duplex mode. */ 1781101540Sambrisko if (sc->nge_tbi) { 1782101540Sambrisko if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK) 1783101540Sambrisko == IFM_FDX) { 1784101540Sambrisko NGE_SETBIT(sc, NGE_TX_CFG, 1785101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 1786101540Sambrisko NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 1787101540Sambrisko } else { 1788101540Sambrisko NGE_CLRBIT(sc, NGE_TX_CFG, 1789101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 1790101540Sambrisko NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 1791101540Sambrisko } 179276479Swpaul } else { 1793101540Sambrisko if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) { 1794101540Sambrisko NGE_SETBIT(sc, NGE_TX_CFG, 1795101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 1796101540Sambrisko NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 1797101540Sambrisko } else { 1798101540Sambrisko NGE_CLRBIT(sc, NGE_TX_CFG, 1799101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 1800101540Sambrisko NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 1801101540Sambrisko } 180276479Swpaul } 180376479Swpaul 1804135250Swpaul nge_tick_locked(sc); 180596028Sphk 180676479Swpaul /* 180776479Swpaul * Enable the delivery of PHY interrupts based on 180877842Swpaul * link/speed/duplex status changes. Also enable the 180977842Swpaul * extsts field in the DMA descriptors (needed for 181077842Swpaul * TCP/IP checksum offload on transmit). 181176479Swpaul */ 181279424Swpaul NGE_SETBIT(sc, NGE_CFG, NGE_CFG_PHYINTR_SPD| 181377842Swpaul NGE_CFG_PHYINTR_LNK|NGE_CFG_PHYINTR_DUP|NGE_CFG_EXTSTS_ENB); 181476479Swpaul 181576479Swpaul /* 181679562Swpaul * Configure interrupt holdoff (moderation). We can 181779562Swpaul * have the chip delay interrupt delivery for a certain 181879562Swpaul * period. Units are in 100us, and the max setting 181979562Swpaul * is 25500us (0xFF x 100us). Default is a 100us holdoff. 182079562Swpaul */ 182179562Swpaul CSR_WRITE_4(sc, NGE_IHR, 0x01); 182279562Swpaul 182379562Swpaul /* 182476479Swpaul * Enable interrupts. 182576479Swpaul */ 182676479Swpaul CSR_WRITE_4(sc, NGE_IMR, NGE_INTRS); 1827106507Ssimokawa#ifdef DEVICE_POLLING 1828106507Ssimokawa /* 1829106507Ssimokawa * ... only enable interrupts if we are not polling, make sure 1830106507Ssimokawa * they are off otherwise. 1831106507Ssimokawa */ 1832128122Srwatson if (ifp->if_flags & IFF_POLLING) 1833106507Ssimokawa CSR_WRITE_4(sc, NGE_IER, 0); 1834106507Ssimokawa else 1835106507Ssimokawa#endif /* DEVICE_POLLING */ 183676479Swpaul CSR_WRITE_4(sc, NGE_IER, 1); 183776479Swpaul 183876479Swpaul /* Enable receiver and transmitter. */ 183976479Swpaul NGE_CLRBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE); 184076479Swpaul NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE); 184176479Swpaul 184276479Swpaul nge_ifmedia_upd(ifp); 184376479Swpaul 184476479Swpaul ifp->if_flags |= IFF_RUNNING; 184576479Swpaul ifp->if_flags &= ~IFF_OACTIVE; 184676479Swpaul 184776479Swpaul return; 184876479Swpaul} 184976479Swpaul 185076479Swpaul/* 185176479Swpaul * Set media options. 185276479Swpaul */ 185399497Salfredstatic int 185499497Salfrednge_ifmedia_upd(ifp) 185576479Swpaul struct ifnet *ifp; 185676479Swpaul{ 185776479Swpaul struct nge_softc *sc; 185876479Swpaul struct mii_data *mii; 185976479Swpaul 186076479Swpaul sc = ifp->if_softc; 186176479Swpaul 1862101540Sambrisko if (sc->nge_tbi) { 1863101540Sambrisko if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media) 1864101540Sambrisko == IFM_AUTO) { 1865101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_ANAR, 1866101540Sambrisko CSR_READ_4(sc, NGE_TBI_ANAR) 1867101540Sambrisko | NGE_TBIANAR_HDX | NGE_TBIANAR_FDX 1868101540Sambrisko | NGE_TBIANAR_PS1 | NGE_TBIANAR_PS2); 1869101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_BMCR, NGE_TBIBMCR_ENABLE_ANEG 1870101540Sambrisko | NGE_TBIBMCR_RESTART_ANEG); 1871101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_BMCR, NGE_TBIBMCR_ENABLE_ANEG); 1872101540Sambrisko } else if ((sc->nge_ifmedia.ifm_cur->ifm_media 1873101540Sambrisko & IFM_GMASK) == IFM_FDX) { 1874101540Sambrisko NGE_SETBIT(sc, NGE_TX_CFG, 1875101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 1876101540Sambrisko NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 1877101540Sambrisko 1878101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_ANAR, 0); 1879101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_BMCR, 0); 1880101540Sambrisko } else { 1881101540Sambrisko NGE_CLRBIT(sc, NGE_TX_CFG, 1882101540Sambrisko (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR)); 1883101540Sambrisko NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX); 1884101540Sambrisko 1885101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_ANAR, 0); 1886101540Sambrisko CSR_WRITE_4(sc, NGE_TBI_BMCR, 0); 1887101540Sambrisko } 1888101540Sambrisko 1889101540Sambrisko CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO) 1890101540Sambrisko & ~NGE_GPIO_GP3_OUT); 1891101540Sambrisko } else { 1892101540Sambrisko mii = device_get_softc(sc->nge_miibus); 1893101540Sambrisko sc->nge_link = 0; 1894101540Sambrisko if (mii->mii_instance) { 1895101540Sambrisko struct mii_softc *miisc; 1896101540Sambrisko for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1897101540Sambrisko miisc = LIST_NEXT(miisc, mii_list)) 1898101540Sambrisko mii_phy_reset(miisc); 1899101540Sambrisko } 1900101540Sambrisko mii_mediachg(mii); 190176479Swpaul } 190276479Swpaul 190376479Swpaul return(0); 190476479Swpaul} 190576479Swpaul 190676479Swpaul/* 190776479Swpaul * Report current media status. 190876479Swpaul */ 190999497Salfredstatic void 191099497Salfrednge_ifmedia_sts(ifp, ifmr) 191176479Swpaul struct ifnet *ifp; 191276479Swpaul struct ifmediareq *ifmr; 191376479Swpaul{ 191476479Swpaul struct nge_softc *sc; 191576479Swpaul struct mii_data *mii; 191676479Swpaul 191776479Swpaul sc = ifp->if_softc; 191876479Swpaul 1919101540Sambrisko if (sc->nge_tbi) { 1920101540Sambrisko ifmr->ifm_status = IFM_AVALID; 1921101540Sambrisko ifmr->ifm_active = IFM_ETHER; 192276479Swpaul 1923101540Sambrisko if (CSR_READ_4(sc, NGE_TBI_BMSR) & NGE_TBIBMSR_ANEG_DONE) { 1924101540Sambrisko ifmr->ifm_status |= IFM_ACTIVE; 1925101540Sambrisko } 1926101540Sambrisko if (CSR_READ_4(sc, NGE_TBI_BMCR) & NGE_TBIBMCR_LOOPBACK) 1927101540Sambrisko ifmr->ifm_active |= IFM_LOOP; 1928101540Sambrisko if (!CSR_READ_4(sc, NGE_TBI_BMSR) & NGE_TBIBMSR_ANEG_DONE) { 1929101540Sambrisko ifmr->ifm_active |= IFM_NONE; 1930101540Sambrisko ifmr->ifm_status = 0; 1931101540Sambrisko return; 1932101540Sambrisko } 1933101540Sambrisko ifmr->ifm_active |= IFM_1000_SX; 1934101540Sambrisko if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media) 1935101540Sambrisko == IFM_AUTO) { 1936101540Sambrisko ifmr->ifm_active |= IFM_AUTO; 1937101540Sambrisko if (CSR_READ_4(sc, NGE_TBI_ANLPAR) 1938101540Sambrisko & NGE_TBIANAR_FDX) { 1939101540Sambrisko ifmr->ifm_active |= IFM_FDX; 1940101540Sambrisko }else if (CSR_READ_4(sc, NGE_TBI_ANLPAR) 1941101540Sambrisko & NGE_TBIANAR_HDX) { 1942101540Sambrisko ifmr->ifm_active |= IFM_HDX; 1943101540Sambrisko } 1944101540Sambrisko } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK) 1945101540Sambrisko == IFM_FDX) 1946101540Sambrisko ifmr->ifm_active |= IFM_FDX; 1947101540Sambrisko else 1948101540Sambrisko ifmr->ifm_active |= IFM_HDX; 1949101540Sambrisko 1950101540Sambrisko } else { 1951101540Sambrisko mii = device_get_softc(sc->nge_miibus); 1952101540Sambrisko mii_pollstat(mii); 1953101540Sambrisko ifmr->ifm_active = mii->mii_media_active; 1954101540Sambrisko ifmr->ifm_status = mii->mii_media_status; 1955101540Sambrisko } 1956101540Sambrisko 195776479Swpaul return; 195876479Swpaul} 195976479Swpaul 196099497Salfredstatic int 196199497Salfrednge_ioctl(ifp, command, data) 196276479Swpaul struct ifnet *ifp; 196376479Swpaul u_long command; 196476479Swpaul caddr_t data; 196576479Swpaul{ 196676479Swpaul struct nge_softc *sc = ifp->if_softc; 196776479Swpaul struct ifreq *ifr = (struct ifreq *) data; 196876479Swpaul struct mii_data *mii; 1969135250Swpaul int error = 0; 197076479Swpaul 197176479Swpaul switch(command) { 197276479Swpaul case SIOCSIFMTU: 197376479Swpaul if (ifr->ifr_mtu > NGE_JUMBO_MTU) 197476479Swpaul error = EINVAL; 197578323Swpaul else { 197676479Swpaul ifp->if_mtu = ifr->ifr_mtu; 197778323Swpaul /* 197878323Swpaul * Workaround: if the MTU is larger than 197978323Swpaul * 8152 (TX FIFO size minus 64 minus 18), turn off 198078323Swpaul * TX checksum offloading. 198178323Swpaul */ 1982129632Syar if (ifr->ifr_mtu >= 8152) { 1983129632Syar ifp->if_capenable &= ~IFCAP_TXCSUM; 198478323Swpaul ifp->if_hwassist = 0; 1985129632Syar } else { 1986129632Syar ifp->if_capenable |= IFCAP_TXCSUM; 198778323Swpaul ifp->if_hwassist = NGE_CSUM_FEATURES; 1988129632Syar } 198978323Swpaul } 199076479Swpaul break; 199176479Swpaul case SIOCSIFFLAGS: 1992135250Swpaul NGE_LOCK(sc); 199376479Swpaul if (ifp->if_flags & IFF_UP) { 199476479Swpaul if (ifp->if_flags & IFF_RUNNING && 199576479Swpaul ifp->if_flags & IFF_PROMISC && 199676479Swpaul !(sc->nge_if_flags & IFF_PROMISC)) { 199776479Swpaul NGE_SETBIT(sc, NGE_RXFILT_CTL, 199876479Swpaul NGE_RXFILTCTL_ALLPHYS| 199976479Swpaul NGE_RXFILTCTL_ALLMULTI); 200076479Swpaul } else if (ifp->if_flags & IFF_RUNNING && 200176479Swpaul !(ifp->if_flags & IFF_PROMISC) && 200276479Swpaul sc->nge_if_flags & IFF_PROMISC) { 200376479Swpaul NGE_CLRBIT(sc, NGE_RXFILT_CTL, 200476479Swpaul NGE_RXFILTCTL_ALLPHYS); 200576479Swpaul if (!(ifp->if_flags & IFF_ALLMULTI)) 200676479Swpaul NGE_CLRBIT(sc, NGE_RXFILT_CTL, 200776479Swpaul NGE_RXFILTCTL_ALLMULTI); 200876479Swpaul } else { 200976479Swpaul ifp->if_flags &= ~IFF_RUNNING; 2010135250Swpaul nge_init_locked(sc); 201176479Swpaul } 201276479Swpaul } else { 201376479Swpaul if (ifp->if_flags & IFF_RUNNING) 201476479Swpaul nge_stop(sc); 201576479Swpaul } 201676479Swpaul sc->nge_if_flags = ifp->if_flags; 2017135250Swpaul NGE_UNLOCK(sc); 201876479Swpaul error = 0; 201976479Swpaul break; 202076479Swpaul case SIOCADDMULTI: 202176479Swpaul case SIOCDELMULTI: 2022135250Swpaul NGE_LOCK(sc); 202376479Swpaul nge_setmulti(sc); 2024135250Swpaul NGE_UNLOCK(sc); 202576479Swpaul error = 0; 202676479Swpaul break; 202776479Swpaul case SIOCGIFMEDIA: 202876479Swpaul case SIOCSIFMEDIA: 2029101540Sambrisko if (sc->nge_tbi) { 2030101540Sambrisko error = ifmedia_ioctl(ifp, ifr, &sc->nge_ifmedia, 2031101540Sambrisko command); 2032101540Sambrisko } else { 2033101540Sambrisko mii = device_get_softc(sc->nge_miibus); 2034101540Sambrisko error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, 2035101540Sambrisko command); 2036101540Sambrisko } 203776479Swpaul break; 2038128132Sru case SIOCSIFCAP: 2039129633Syar ifp->if_capenable &= ~IFCAP_POLLING; 2040129633Syar ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING; 2041128132Sru break; 204276479Swpaul default: 2043106937Ssam error = ether_ioctl(ifp, command, data); 204476479Swpaul break; 204576479Swpaul } 204676479Swpaul 204776479Swpaul return(error); 204876479Swpaul} 204976479Swpaul 205099497Salfredstatic void 205199497Salfrednge_watchdog(ifp) 205276479Swpaul struct ifnet *ifp; 205376479Swpaul{ 205476479Swpaul struct nge_softc *sc; 205576479Swpaul 205676479Swpaul sc = ifp->if_softc; 205776479Swpaul 205876479Swpaul ifp->if_oerrors++; 205976479Swpaul printf("nge%d: watchdog timeout\n", sc->nge_unit); 206076479Swpaul 2061135250Swpaul NGE_LOCK(sc); 206276479Swpaul nge_stop(sc); 206376479Swpaul nge_reset(sc); 206476479Swpaul ifp->if_flags &= ~IFF_RUNNING; 2065135250Swpaul nge_init_locked(sc); 206676479Swpaul 206776479Swpaul if (ifp->if_snd.ifq_head != NULL) 2068135250Swpaul nge_start_locked(ifp); 206976479Swpaul 2070135250Swpaul NGE_UNLOCK(sc); 2071135250Swpaul 207276479Swpaul return; 207376479Swpaul} 207476479Swpaul 207576479Swpaul/* 207676479Swpaul * Stop the adapter and free any mbufs allocated to the 207776479Swpaul * RX and TX lists. 207876479Swpaul */ 207999497Salfredstatic void 208099497Salfrednge_stop(sc) 208176479Swpaul struct nge_softc *sc; 208276479Swpaul{ 208376479Swpaul register int i; 208476479Swpaul struct ifnet *ifp; 208576479Swpaul struct mii_data *mii; 208676479Swpaul 2087135250Swpaul NGE_LOCK_ASSERT(sc); 208876479Swpaul ifp = &sc->arpcom.ac_if; 208976479Swpaul ifp->if_timer = 0; 2090101540Sambrisko if (sc->nge_tbi) { 2091101540Sambrisko mii = NULL; 2092101540Sambrisko } else { 2093101540Sambrisko mii = device_get_softc(sc->nge_miibus); 2094101540Sambrisko } 209576479Swpaul 2096135250Swpaul callout_stop(&sc->nge_stat_ch); 2097106507Ssimokawa#ifdef DEVICE_POLLING 2098106507Ssimokawa ether_poll_deregister(ifp); 2099106507Ssimokawa#endif 210076479Swpaul CSR_WRITE_4(sc, NGE_IER, 0); 210176479Swpaul CSR_WRITE_4(sc, NGE_IMR, 0); 210276479Swpaul NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE); 210376479Swpaul DELAY(1000); 210476479Swpaul CSR_WRITE_4(sc, NGE_TX_LISTPTR, 0); 210576479Swpaul CSR_WRITE_4(sc, NGE_RX_LISTPTR, 0); 210676479Swpaul 2107101540Sambrisko if (!sc->nge_tbi) 2108101540Sambrisko mii_down(mii); 210976479Swpaul 211076479Swpaul sc->nge_link = 0; 211176479Swpaul 211276479Swpaul /* 211376479Swpaul * Free data in the RX lists. 211476479Swpaul */ 211576479Swpaul for (i = 0; i < NGE_RX_LIST_CNT; i++) { 211676479Swpaul if (sc->nge_ldata->nge_rx_list[i].nge_mbuf != NULL) { 211776479Swpaul m_freem(sc->nge_ldata->nge_rx_list[i].nge_mbuf); 211876479Swpaul sc->nge_ldata->nge_rx_list[i].nge_mbuf = NULL; 211976479Swpaul } 212076479Swpaul } 212176479Swpaul bzero((char *)&sc->nge_ldata->nge_rx_list, 212276479Swpaul sizeof(sc->nge_ldata->nge_rx_list)); 212376479Swpaul 212476479Swpaul /* 212576479Swpaul * Free the TX list buffers. 212676479Swpaul */ 212776479Swpaul for (i = 0; i < NGE_TX_LIST_CNT; i++) { 212876479Swpaul if (sc->nge_ldata->nge_tx_list[i].nge_mbuf != NULL) { 212976479Swpaul m_freem(sc->nge_ldata->nge_tx_list[i].nge_mbuf); 213076479Swpaul sc->nge_ldata->nge_tx_list[i].nge_mbuf = NULL; 213176479Swpaul } 213276479Swpaul } 213376479Swpaul 213476479Swpaul bzero((char *)&sc->nge_ldata->nge_tx_list, 213576479Swpaul sizeof(sc->nge_ldata->nge_tx_list)); 213676479Swpaul 213776479Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 213876479Swpaul 213976479Swpaul return; 214076479Swpaul} 214176479Swpaul 214276479Swpaul/* 214376479Swpaul * Stop all chip I/O so that the kernel's probe routines don't 214476479Swpaul * get confused by errant DMAs when rebooting. 214576479Swpaul */ 214699497Salfredstatic void 214799497Salfrednge_shutdown(dev) 214876479Swpaul device_t dev; 214976479Swpaul{ 215076479Swpaul struct nge_softc *sc; 215176479Swpaul 215276479Swpaul sc = device_get_softc(dev); 215376479Swpaul 2154135250Swpaul NGE_LOCK(sc); 215576479Swpaul nge_reset(sc); 215676479Swpaul nge_stop(sc); 2157135250Swpaul NGE_UNLOCK(sc); 215876479Swpaul 215976479Swpaul return; 216076479Swpaul} 2161