1/* 2 * Copyright (C) 2011-2014 Universita` di Pisa. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26/* 27 * $FreeBSD: stable/11/sys/dev/netmap/if_igb_netmap.h 343771 2019-02-05 10:33:22Z vmaffione $ 28 * 29 * Netmap support for igb, partly contributed by Ahmed Kooli 30 * For details on netmap support please see ixgbe_netmap.h 31 */ 32 33 34#include <net/netmap.h> 35#include <sys/selinfo.h> 36#include <vm/vm.h> 37#include <vm/pmap.h> /* vtophys ? */ 38#include <dev/netmap/netmap_kern.h> 39 40/* 41 * Adaptation to different versions of the driver. 42 */ 43 44#ifndef IGB_MEDIA_RESET 45/* at the same time as IGB_MEDIA_RESET was defined, the 46 * tx buffer descriptor was renamed, so use this to revert 47 * back to the old name. 48 */ 49#define igb_tx_buf igb_tx_buffer 50#endif 51 52 53/* 54 * Register/unregister. We are already under netmap lock. 55 */ 56static int 57igb_netmap_reg(struct netmap_adapter *na, int onoff) 58{ 59 struct ifnet *ifp = na->ifp; 60 struct adapter *adapter = ifp->if_softc; 61 62 IGB_CORE_LOCK(adapter); 63 igb_disable_intr(adapter); 64 65 /* Tell the stack that the interface is no longer active */ 66 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 67 68 /* enable or disable flags and callbacks in na and ifp */ 69 if (onoff) { 70 nm_set_native_flags(na); 71 } else { 72 nm_clear_native_flags(na); 73 } 74 igb_init_locked(adapter); /* also enable intr */ 75 IGB_CORE_UNLOCK(adapter); 76 return (ifp->if_drv_flags & IFF_DRV_RUNNING ? 0 : 1); 77} 78 79 80/* 81 * Reconcile kernel and user view of the transmit ring. 82 */ 83static int 84igb_netmap_txsync(struct netmap_kring *kring, int flags) 85{ 86 struct netmap_adapter *na = kring->na; 87 struct ifnet *ifp = na->ifp; 88 struct netmap_ring *ring = kring->ring; 89 u_int nm_i; /* index into the netmap ring */ 90 u_int nic_i; /* index into the NIC ring */ 91 u_int n; 92 u_int const lim = kring->nkr_num_slots - 1; 93 u_int const head = kring->rhead; 94 /* generate an interrupt approximately every half ring */ 95 u_int report_frequency = kring->nkr_num_slots >> 1; 96 97 /* device-specific */ 98 struct adapter *adapter = ifp->if_softc; 99 struct tx_ring *txr = &adapter->tx_rings[kring->ring_id]; 100 /* 82575 needs the queue index added */ 101 u32 olinfo_status = 102 (adapter->hw.mac.type == e1000_82575) ? (txr->me << 4) : 0; 103 104 bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, 105 BUS_DMASYNC_POSTREAD); 106 107 /* 108 * First part: process new packets to send. 109 */ 110 111 nm_i = kring->nr_hwcur; 112 if (nm_i != head) { /* we have new packets to send */ 113 nic_i = netmap_idx_k2n(kring, nm_i); 114 for (n = 0; nm_i != head; n++) { 115 struct netmap_slot *slot = &ring->slot[nm_i]; 116 u_int len = slot->len; 117 uint64_t paddr; 118 void *addr = PNMB(na, slot, &paddr); 119 120 /* device-specific */ 121 union e1000_adv_tx_desc *curr = 122 (union e1000_adv_tx_desc *)&txr->tx_base[nic_i]; 123 struct igb_tx_buf *txbuf = &txr->tx_buffers[nic_i]; 124 int flags = (slot->flags & NS_REPORT || 125 nic_i == 0 || nic_i == report_frequency) ? 126 E1000_ADVTXD_DCMD_RS : 0; 127 128 NM_CHECK_ADDR_LEN(na, addr, len); 129 130 if (slot->flags & NS_BUF_CHANGED) { 131 /* buffer has changed, reload map */ 132 netmap_reload_map(na, txr->txtag, txbuf->map, addr); 133 } 134 slot->flags &= ~(NS_REPORT | NS_BUF_CHANGED); 135 136 /* Fill the slot in the NIC ring. */ 137 curr->read.buffer_addr = htole64(paddr); 138 // XXX check olinfo and cmd_type_len 139 curr->read.olinfo_status = 140 htole32(olinfo_status | 141 (len<< E1000_ADVTXD_PAYLEN_SHIFT)); 142 curr->read.cmd_type_len = 143 htole32(len | E1000_ADVTXD_DTYP_DATA | 144 E1000_ADVTXD_DCMD_IFCS | 145 E1000_ADVTXD_DCMD_DEXT | 146 E1000_ADVTXD_DCMD_EOP | flags); 147 148 /* make sure changes to the buffer are synced */ 149 bus_dmamap_sync(txr->txtag, txbuf->map, 150 BUS_DMASYNC_PREWRITE); 151 152 nm_i = nm_next(nm_i, lim); 153 nic_i = nm_next(nic_i, lim); 154 } 155 kring->nr_hwcur = head; 156 157 /* Set the watchdog XXX ? */ 158 txr->queue_status = IGB_QUEUE_WORKING; 159 txr->watchdog_time = ticks; 160 161 /* synchronize the NIC ring */ 162 bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, 163 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 164 165 /* (re)start the tx unit up to slot nic_i (excluded) */ 166 E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), nic_i); 167 } 168 169 /* 170 * Second part: reclaim buffers for completed transmissions. 171 */ 172 if (flags & NAF_FORCE_RECLAIM || nm_kr_txempty(kring)) { 173 /* record completed transmissions using TDH */ 174 nic_i = E1000_READ_REG(&adapter->hw, E1000_TDH(kring->ring_id)); 175 if (unlikely(nic_i >= kring->nkr_num_slots)) { 176 nm_prerr("TDH wrap at idx %d", nic_i); 177 nic_i -= kring->nkr_num_slots; 178 } 179 txr->next_to_clean = nic_i; 180 kring->nr_hwtail = nm_prev(netmap_idx_n2k(kring, nic_i), lim); 181 } 182 183 return 0; 184} 185 186 187/* 188 * Reconcile kernel and user view of the receive ring. 189 */ 190static int 191igb_netmap_rxsync(struct netmap_kring *kring, int flags) 192{ 193 struct netmap_adapter *na = kring->na; 194 struct ifnet *ifp = na->ifp; 195 struct netmap_ring *ring = kring->ring; 196 u_int nm_i; /* index into the netmap ring */ 197 u_int nic_i; /* index into the NIC ring */ 198 u_int n; 199 u_int const lim = kring->nkr_num_slots - 1; 200 u_int const head = kring->rhead; 201 int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR; 202 203 /* device-specific */ 204 struct adapter *adapter = ifp->if_softc; 205 struct rx_ring *rxr = &adapter->rx_rings[kring->ring_id]; 206 207 if (head > lim) 208 return netmap_ring_reinit(kring); 209 210 /* XXX check sync modes */ 211 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 212 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 213 214 /* 215 * First part: import newly received packets. 216 */ 217 if (netmap_no_pendintr || force_update) { 218 nic_i = rxr->next_to_check; 219 nm_i = netmap_idx_n2k(kring, nic_i); 220 221 for (n = 0; ; n++) { 222 union e1000_adv_rx_desc *curr = &rxr->rx_base[nic_i]; 223 uint32_t staterr = le32toh(curr->wb.upper.status_error); 224 225 if ((staterr & E1000_RXD_STAT_DD) == 0) 226 break; 227 ring->slot[nm_i].len = le16toh(curr->wb.upper.length); 228 ring->slot[nm_i].flags = 0; 229 bus_dmamap_sync(rxr->ptag, 230 rxr->rx_buffers[nic_i].pmap, BUS_DMASYNC_POSTREAD); 231 nm_i = nm_next(nm_i, lim); 232 nic_i = nm_next(nic_i, lim); 233 } 234 if (n) { /* update the state variables */ 235 rxr->next_to_check = nic_i; 236 kring->nr_hwtail = nm_i; 237 } 238 kring->nr_kflags &= ~NKR_PENDINTR; 239 } 240 241 /* 242 * Second part: skip past packets that userspace has released. 243 */ 244 nm_i = kring->nr_hwcur; 245 if (nm_i != head) { 246 nic_i = netmap_idx_k2n(kring, nm_i); 247 for (n = 0; nm_i != head; n++) { 248 struct netmap_slot *slot = &ring->slot[nm_i]; 249 uint64_t paddr; 250 void *addr = PNMB(na, slot, &paddr); 251 252 union e1000_adv_rx_desc *curr = &rxr->rx_base[nic_i]; 253 struct igb_rx_buf *rxbuf = &rxr->rx_buffers[nic_i]; 254 255 if (addr == NETMAP_BUF_BASE(na)) /* bad buf */ 256 goto ring_reset; 257 258 if (slot->flags & NS_BUF_CHANGED) { 259 /* buffer has changed, reload map */ 260 netmap_reload_map(na, rxr->ptag, rxbuf->pmap, addr); 261 slot->flags &= ~NS_BUF_CHANGED; 262 } 263 curr->wb.upper.status_error = 0; 264 curr->read.pkt_addr = htole64(paddr); 265 bus_dmamap_sync(rxr->ptag, rxbuf->pmap, 266 BUS_DMASYNC_PREREAD); 267 nm_i = nm_next(nm_i, lim); 268 nic_i = nm_next(nic_i, lim); 269 } 270 kring->nr_hwcur = head; 271 272 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 273 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 274 /* 275 * IMPORTANT: we must leave one free slot in the ring, 276 * so move nic_i back by one unit 277 */ 278 nic_i = nm_prev(nic_i, lim); 279 E1000_WRITE_REG(&adapter->hw, E1000_RDT(rxr->me), nic_i); 280 } 281 282 return 0; 283 284ring_reset: 285 return netmap_ring_reinit(kring); 286} 287 288 289static void 290igb_netmap_attach(struct adapter *adapter) 291{ 292 struct netmap_adapter na; 293 294 bzero(&na, sizeof(na)); 295 296 na.ifp = adapter->ifp; 297 na.na_flags = NAF_BDG_MAYSLEEP; 298 na.num_tx_desc = adapter->num_tx_desc; 299 na.num_rx_desc = adapter->num_rx_desc; 300 na.nm_txsync = igb_netmap_txsync; 301 na.nm_rxsync = igb_netmap_rxsync; 302 na.nm_register = igb_netmap_reg; 303 na.num_tx_rings = na.num_rx_rings = adapter->num_queues; 304 netmap_attach(&na); 305} 306 307/* end of file */ 308