mxge_mcp.h revision 162328
1155852Sgallatin/******************************************************************************* 2155852Sgallatin 3155852SgallatinCopyright (c) 2006, Myricom Inc. 4155852SgallatinAll rights reserved. 5155852Sgallatin 6155852SgallatinRedistribution and use in source and binary forms, with or without 7155852Sgallatinmodification, are permitted provided that the following conditions are met: 8155852Sgallatin 9155852Sgallatin 1. Redistributions of source code must retain the above copyright notice, 10155852Sgallatin this list of conditions and the following disclaimer. 11155852Sgallatin 12155852Sgallatin 2. Redistributions in binary form must reproduce the above copyright 13155852Sgallatin notice, this list of conditions and the following disclaimer in the 14155852Sgallatin documentation and/or other materials provided with the distribution. 15155852Sgallatin 16155852Sgallatin 3. Neither the name of the Myricom Inc, nor the names of its 17155852Sgallatin contributors may be used to endorse or promote products derived from 18155852Sgallatin this software without specific prior written permission. 19155852Sgallatin 20155852SgallatinTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21155852SgallatinAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22155852SgallatinIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23155852SgallatinARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24155852SgallatinLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25155852SgallatinCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26155852SgallatinSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27155852SgallatinINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28155852SgallatinCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29155852SgallatinARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30155852SgallatinPOSSIBILITY OF SUCH DAMAGE. 31155852Sgallatin 32155852Sgallatin$FreeBSD: head/sys/dev/mxge/mxge_mcp.h 162328 2006-09-15 19:24:45Z gallatin $ 33155852Sgallatin***************************************************************************/ 34155852Sgallatin 35159612Sgallatin#ifndef _myri10ge_mcp_h 36159612Sgallatin#define _myri10ge_mcp_h 37155852Sgallatin 38159612Sgallatin#define MXGEFW_VERSION_MAJOR 1 39159612Sgallatin#define MXGEFW_VERSION_MINOR 4 40159612Sgallatin 41159612Sgallatin#ifdef MXGEFW 42155852Sgallatintypedef signed char int8_t; 43155852Sgallatintypedef signed short int16_t; 44155852Sgallatintypedef signed int int32_t; 45155852Sgallatintypedef signed long long int64_t; 46155852Sgallatintypedef unsigned char uint8_t; 47155852Sgallatintypedef unsigned short uint16_t; 48155852Sgallatintypedef unsigned int uint32_t; 49155852Sgallatintypedef unsigned long long uint64_t; 50155852Sgallatin#endif 51155852Sgallatin 52155852Sgallatin/* 8 Bytes */ 53159612Sgallatinstruct mcp_dma_addr { 54155852Sgallatin uint32_t high; 55155852Sgallatin uint32_t low; 56159612Sgallatin}; 57159612Sgallatintypedef struct mcp_dma_addr mcp_dma_addr_t; 58155852Sgallatin 59159612Sgallatin/* 4 Bytes */ 60159612Sgallatinstruct mcp_slot { 61159612Sgallatin uint16_t checksum; 62159612Sgallatin uint16_t length; 63159612Sgallatin}; 64159612Sgallatintypedef struct mcp_slot mcp_slot_t; 65155852Sgallatin 66155852Sgallatin/* 64 Bytes */ 67159612Sgallatinstruct mcp_cmd { 68155852Sgallatin uint32_t cmd; 69155852Sgallatin uint32_t data0; /* will be low portion if data > 32 bits */ 70155852Sgallatin /* 8 */ 71155852Sgallatin uint32_t data1; /* will be high portion if data > 32 bits */ 72155852Sgallatin uint32_t data2; /* currently unused.. */ 73155852Sgallatin /* 16 */ 74159612Sgallatin struct mcp_dma_addr response_addr; 75155852Sgallatin /* 24 */ 76155852Sgallatin uint8_t pad[40]; 77159612Sgallatin}; 78159612Sgallatintypedef struct mcp_cmd mcp_cmd_t; 79155852Sgallatin 80155852Sgallatin/* 8 Bytes */ 81159612Sgallatinstruct mcp_cmd_response { 82155852Sgallatin uint32_t data; 83155852Sgallatin uint32_t result; 84159612Sgallatin}; 85159612Sgallatintypedef struct mcp_cmd_response mcp_cmd_response_t; 86155852Sgallatin 87155852Sgallatin 88155852Sgallatin 89155852Sgallatin/* 90155852Sgallatin flags used in mcp_kreq_ether_send_t: 91155852Sgallatin 92155852Sgallatin The SMALL flag is only needed in the first segment. It is raised 93155852Sgallatin for packets that are total less or equal 512 bytes. 94155852Sgallatin 95155852Sgallatin The CKSUM flag must be set in all segments. 96155852Sgallatin 97155852Sgallatin The PADDED flags is set if the packet needs to be padded, and it 98155852Sgallatin must be set for all segments. 99155852Sgallatin 100159612Sgallatin The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative 101155852Sgallatin length of all previous segments was odd. 102155852Sgallatin*/ 103155852Sgallatin 104155852Sgallatin 105159612Sgallatin#define MXGEFW_FLAGS_SMALL 0x1 106159612Sgallatin#define MXGEFW_FLAGS_TSO_HDR 0x1 107159612Sgallatin#define MXGEFW_FLAGS_FIRST 0x2 108159612Sgallatin#define MXGEFW_FLAGS_ALIGN_ODD 0x4 109159612Sgallatin#define MXGEFW_FLAGS_CKSUM 0x8 110159612Sgallatin#define MXGEFW_FLAGS_TSO_LAST 0x8 111159612Sgallatin#define MXGEFW_FLAGS_NO_TSO 0x10 112159612Sgallatin#define MXGEFW_FLAGS_TSO_CHOP 0x10 113159612Sgallatin#define MXGEFW_FLAGS_TSO_PLD 0x20 114155852Sgallatin 115159612Sgallatin#define MXGEFW_SEND_SMALL_SIZE 1520 116159612Sgallatin#define MXGEFW_MAX_MTU 9400 117155852Sgallatin 118159612Sgallatinunion mcp_pso_or_cumlen { 119155852Sgallatin uint16_t pseudo_hdr_offset; 120155852Sgallatin uint16_t cum_len; 121159612Sgallatin}; 122159612Sgallatintypedef union mcp_pso_or_cumlen mcp_pso_or_cumlen_t; 123155852Sgallatin 124159612Sgallatin#define MXGEFW_MAX_SEND_DESC 12 125159612Sgallatin#define MXGEFW_PAD 2 126155852Sgallatin 127155852Sgallatin/* 16 Bytes */ 128159612Sgallatinstruct mcp_kreq_ether_send { 129155852Sgallatin uint32_t addr_high; 130155852Sgallatin uint32_t addr_low; 131159612Sgallatin uint16_t pseudo_hdr_offset; 132155852Sgallatin uint16_t length; 133159612Sgallatin uint8_t pad; 134159612Sgallatin uint8_t rdma_count; 135155852Sgallatin uint8_t cksum_offset; /* where to start computing cksum */ 136159612Sgallatin uint8_t flags; /* as defined above */ 137159612Sgallatin}; 138159612Sgallatintypedef struct mcp_kreq_ether_send mcp_kreq_ether_send_t; 139155852Sgallatin 140155852Sgallatin/* 8 Bytes */ 141159612Sgallatinstruct mcp_kreq_ether_recv { 142155852Sgallatin uint32_t addr_high; 143155852Sgallatin uint32_t addr_low; 144159612Sgallatin}; 145159612Sgallatintypedef struct mcp_kreq_ether_recv mcp_kreq_ether_recv_t; 146155852Sgallatin 147155852Sgallatin 148155852Sgallatin/* Commands */ 149155852Sgallatin 150162328Sgallatin#define MXGEFW_BOOT_HANDOFF 0xfc0000 151162328Sgallatin#define MXGEFW_BOOT_DUMMY_RDMA 0xfc01c0 152155852Sgallatin 153162328Sgallatin#define MXGEFW_ETH_CMD 0xf80000 154162328Sgallatin#define MXGEFW_ETH_SEND_4 0x200000 155162328Sgallatin#define MXGEFW_ETH_SEND_1 0x240000 156162328Sgallatin#define MXGEFW_ETH_SEND_2 0x280000 157162328Sgallatin#define MXGEFW_ETH_SEND_3 0x2c0000 158162328Sgallatin#define MXGEFW_ETH_RECV_SMALL 0x300000 159162328Sgallatin#define MXGEFW_ETH_RECV_BIG 0x340000 160162328Sgallatin 161162328Sgallatin#define MXGEFW_ETH_SEND(n) (0x200000 + (((n) & 0x03) * 0x40000)) 162162328Sgallatin#define MXGEFW_ETH_SEND_OFFSET(n) (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4) 163162328Sgallatin 164159612Sgallatinenum myri10ge_mcp_cmd_type { 165159612Sgallatin MXGEFW_CMD_NONE = 0, 166155852Sgallatin /* Reset the mcp, it is left in a safe state, waiting 167155852Sgallatin for the driver to set all its parameters */ 168159612Sgallatin MXGEFW_CMD_RESET, 169155852Sgallatin 170155852Sgallatin /* get the version number of the current firmware.. 171155852Sgallatin (may be available in the eeprom strings..? */ 172159612Sgallatin MXGEFW_GET_MCP_VERSION, 173155852Sgallatin 174155852Sgallatin 175155852Sgallatin /* Parameters which must be set by the driver before it can 176159612Sgallatin issue MXGEFW_CMD_ETHERNET_UP. They persist until the next 177159612Sgallatin MXGEFW_CMD_RESET is issued */ 178155852Sgallatin 179159612Sgallatin MXGEFW_CMD_SET_INTRQ_DMA, 180159612Sgallatin MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */ 181159612Sgallatin MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */ 182155852Sgallatin 183155852Sgallatin 184155852Sgallatin /* Parameters which refer to lanai SRAM addresses where the 185155852Sgallatin driver must issue PIO writes for various things */ 186155852Sgallatin 187159612Sgallatin MXGEFW_CMD_GET_SEND_OFFSET, 188159612Sgallatin MXGEFW_CMD_GET_SMALL_RX_OFFSET, 189159612Sgallatin MXGEFW_CMD_GET_BIG_RX_OFFSET, 190159612Sgallatin MXGEFW_CMD_GET_IRQ_ACK_OFFSET, 191159612Sgallatin MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET, 192155852Sgallatin 193155852Sgallatin /* Parameters which refer to rings stored on the MCP, 194155852Sgallatin and whose size is controlled by the mcp */ 195155852Sgallatin 196159612Sgallatin MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */ 197159612Sgallatin MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */ 198155852Sgallatin 199155852Sgallatin /* Parameters which refer to rings stored in the host, 200155852Sgallatin and whose size is controlled by the host. Note that 201155852Sgallatin all must be physically contiguous and must contain 202155852Sgallatin a power of 2 number of entries. */ 203155852Sgallatin 204159612Sgallatin MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */ 205155852Sgallatin 206155852Sgallatin /* command to bring ethernet interface up. Above parameters 207155852Sgallatin (plus mtu & mac address) must have been exchanged prior 208155852Sgallatin to issuing this command */ 209159612Sgallatin MXGEFW_CMD_ETHERNET_UP, 210155852Sgallatin 211155852Sgallatin /* command to bring ethernet interface down. No further sends 212159612Sgallatin or receives may be processed until an MXGEFW_CMD_ETHERNET_UP 213155852Sgallatin is issued, and all interrupt queues must be flushed prior 214155852Sgallatin to ack'ing this command */ 215155852Sgallatin 216159612Sgallatin MXGEFW_CMD_ETHERNET_DOWN, 217155852Sgallatin 218155852Sgallatin /* commands the driver may issue live, without resetting 219155852Sgallatin the nic. Note that increasing the mtu "live" should 220155852Sgallatin only be done if the driver has already supplied buffers 221155852Sgallatin sufficiently large to handle the new mtu. Decreasing 222155852Sgallatin the mtu live is safe */ 223155852Sgallatin 224159612Sgallatin MXGEFW_CMD_SET_MTU, 225159612Sgallatin MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */ 226159612Sgallatin MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */ 227162328Sgallatin MXGEFW_CMD_SET_STATS_DMA_OBSOLETE, /* replaced by SET_STATS_DMA_V2 */ 228155852Sgallatin 229159612Sgallatin MXGEFW_ENABLE_PROMISC, 230159612Sgallatin MXGEFW_DISABLE_PROMISC, 231159612Sgallatin MXGEFW_SET_MAC_ADDRESS, 232155852Sgallatin 233159612Sgallatin MXGEFW_ENABLE_FLOW_CONTROL, 234159612Sgallatin MXGEFW_DISABLE_FLOW_CONTROL, 235155852Sgallatin 236159612Sgallatin /* do a DMA test 237159612Sgallatin data0,data1 = DMA address 238159612Sgallatin data2 = RDMA length (MSH), WDMA length (LSH) 239159612Sgallatin command return data = repetitions (MSH), 0.5-ms ticks (LSH) 240159612Sgallatin */ 241162328Sgallatin MXGEFW_DMA_TEST, 242162328Sgallatin 243162328Sgallatin MXGEFW_ENABLE_ALLMULTI, 244162328Sgallatin MXGEFW_DISABLE_ALLMULTI, 245162328Sgallatin 246162328Sgallatin /* returns MXGEFW_CMD_ERROR_MULTICAST 247162328Sgallatin if there is no room in the cache 248162328Sgallatin data0,MSH(data1) = multicast group address */ 249162328Sgallatin MXGEFW_JOIN_MULTICAST_GROUP, 250162328Sgallatin /* returns MXGEFW_CMD_ERROR_MULTICAST 251162328Sgallatin if the address is not in the cache, 252162328Sgallatin or is equal to FF-FF-FF-FF-FF-FF 253162328Sgallatin data0,MSH(data1) = multicast group address */ 254162328Sgallatin MXGEFW_LEAVE_MULTICAST_GROUP, 255162328Sgallatin MXGEFW_LEAVE_ALL_MULTICAST_GROUPS, 256162328Sgallatin 257162328Sgallatin MXGEFW_CMD_SET_STATS_DMA_V2, 258162328Sgallatin /* data0, data1 = bus addr, 259162328Sgallatin data2 = sizeof(struct mcp_irq_data) from driver point of view, allows 260162328Sgallatin adding new stuff to mcp_irq_data without changing the ABI */ 261159612Sgallatin}; 262159612Sgallatintypedef enum myri10ge_mcp_cmd_type myri10ge_mcp_cmd_type_t; 263155852Sgallatin 264155852Sgallatin 265159612Sgallatinenum myri10ge_mcp_cmd_status { 266159612Sgallatin MXGEFW_CMD_OK = 0, 267159612Sgallatin MXGEFW_CMD_UNKNOWN, 268159612Sgallatin MXGEFW_CMD_ERROR_RANGE, 269159612Sgallatin MXGEFW_CMD_ERROR_BUSY, 270159612Sgallatin MXGEFW_CMD_ERROR_EMPTY, 271159612Sgallatin MXGEFW_CMD_ERROR_CLOSED, 272159612Sgallatin MXGEFW_CMD_ERROR_HASH_ERROR, 273159612Sgallatin MXGEFW_CMD_ERROR_BAD_PORT, 274162328Sgallatin MXGEFW_CMD_ERROR_RESOURCES, 275162328Sgallatin MXGEFW_CMD_ERROR_MULTICAST 276159612Sgallatin}; 277159612Sgallatintypedef enum myri10ge_mcp_cmd_status myri10ge_mcp_cmd_status_t; 278155852Sgallatin 279155852Sgallatin 280162328Sgallatin#define MXGEFW_OLD_IRQ_DATA_LEN 40 281162328Sgallatin 282162328Sgallatinstruct mcp_irq_data { 283162328Sgallatin /* add new counters at the beginning */ 284162328Sgallatin uint32_t future_use[5]; 285162328Sgallatin uint32_t dropped_multicast_filtered; 286159612Sgallatin/* 40 Bytes */ 287159612Sgallatin uint32_t send_done_count; 288159612Sgallatin 289155852Sgallatin uint32_t link_up; 290155852Sgallatin uint32_t dropped_link_overflow; 291155852Sgallatin uint32_t dropped_link_error_or_filtered; 292155852Sgallatin uint32_t dropped_runt; 293155852Sgallatin uint32_t dropped_overrun; 294155852Sgallatin uint32_t dropped_no_small_buffer; 295155852Sgallatin uint32_t dropped_no_big_buffer; 296155852Sgallatin uint32_t rdma_tags_available; 297155852Sgallatin 298159612Sgallatin uint8_t tx_stopped; 299159612Sgallatin uint8_t link_down; 300159612Sgallatin uint8_t stats_updated; 301159612Sgallatin uint8_t valid; 302159612Sgallatin}; 303159612Sgallatintypedef struct mcp_irq_data mcp_irq_data_t; 304155852Sgallatin 305159612Sgallatin 306159612Sgallatin#endif /* _myri10ge_mcp_h */ 307