if_mwl.c revision 283537
1193240Ssam/*- 2193240Ssam * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting 3193240Ssam * Copyright (c) 2007-2008 Marvell Semiconductor, Inc. 4193240Ssam * All rights reserved. 5193240Ssam * 6193240Ssam * Redistribution and use in source and binary forms, with or without 7193240Ssam * modification, are permitted provided that the following conditions 8193240Ssam * are met: 9193240Ssam * 1. Redistributions of source code must retain the above copyright 10193240Ssam * notice, this list of conditions and the following disclaimer, 11193240Ssam * without modification. 12193240Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13193240Ssam * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14193240Ssam * redistribution must be conditioned upon including a substantially 15193240Ssam * similar Disclaimer requirement for further binary redistribution. 16193240Ssam * 17193240Ssam * NO WARRANTY 18193240Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19193240Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20193240Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21193240Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22193240Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23193240Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24193240Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25193240Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26193240Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27193240Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28193240Ssam * THE POSSIBILITY OF SUCH DAMAGES. 29193240Ssam */ 30193240Ssam 31193240Ssam#include <sys/cdefs.h> 32193240Ssam__FBSDID("$FreeBSD: head/sys/dev/mwl/if_mwl.c 283537 2015-05-25 18:50:26Z glebius $"); 33193240Ssam 34193240Ssam/* 35193240Ssam * Driver for the Marvell 88W8363 Wireless LAN controller. 36193240Ssam */ 37193240Ssam 38193240Ssam#include "opt_inet.h" 39193240Ssam#include "opt_mwl.h" 40234367Sadrian#include "opt_wlan.h" 41193240Ssam 42193240Ssam#include <sys/param.h> 43193240Ssam#include <sys/systm.h> 44193240Ssam#include <sys/sysctl.h> 45193240Ssam#include <sys/mbuf.h> 46193240Ssam#include <sys/malloc.h> 47193240Ssam#include <sys/lock.h> 48193240Ssam#include <sys/mutex.h> 49193240Ssam#include <sys/kernel.h> 50193240Ssam#include <sys/socket.h> 51193240Ssam#include <sys/sockio.h> 52193240Ssam#include <sys/errno.h> 53193240Ssam#include <sys/callout.h> 54193240Ssam#include <sys/bus.h> 55193240Ssam#include <sys/endian.h> 56193240Ssam#include <sys/kthread.h> 57193240Ssam#include <sys/taskqueue.h> 58193240Ssam 59193240Ssam#include <machine/bus.h> 60193240Ssam 61193240Ssam#include <net/if.h> 62257176Sglebius#include <net/if_var.h> 63193240Ssam#include <net/if_dl.h> 64193240Ssam#include <net/if_media.h> 65193240Ssam#include <net/if_types.h> 66193240Ssam#include <net/if_arp.h> 67193240Ssam#include <net/ethernet.h> 68193240Ssam#include <net/if_llc.h> 69193240Ssam 70193240Ssam#include <net/bpf.h> 71193240Ssam 72193240Ssam#include <net80211/ieee80211_var.h> 73193240Ssam#include <net80211/ieee80211_regdomain.h> 74193240Ssam 75193240Ssam#ifdef INET 76193240Ssam#include <netinet/in.h> 77193240Ssam#include <netinet/if_ether.h> 78193240Ssam#endif /* INET */ 79193240Ssam 80193240Ssam#include <dev/mwl/if_mwlvar.h> 81193240Ssam#include <dev/mwl/mwldiag.h> 82193240Ssam 83193240Ssam/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 84193240Ssam#define MS(v,x) (((v) & x) >> x##_S) 85193240Ssam#define SM(v,x) (((v) << x##_S) & x) 86193240Ssam 87193240Ssamstatic struct ieee80211vap *mwl_vap_create(struct ieee80211com *, 88228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 89228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN], 90228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 91193240Ssamstatic void mwl_vap_delete(struct ieee80211vap *); 92193240Ssamstatic int mwl_setupdma(struct mwl_softc *); 93193240Ssamstatic int mwl_hal_reset(struct mwl_softc *sc); 94193240Ssamstatic int mwl_init_locked(struct mwl_softc *); 95193240Ssamstatic void mwl_init(void *); 96193240Ssamstatic void mwl_stop_locked(struct ifnet *, int); 97193240Ssamstatic int mwl_reset(struct ieee80211vap *, u_long); 98193240Ssamstatic void mwl_stop(struct ifnet *, int); 99193240Ssamstatic void mwl_start(struct ifnet *); 100193240Ssamstatic int mwl_raw_xmit(struct ieee80211_node *, struct mbuf *, 101193240Ssam const struct ieee80211_bpf_params *); 102193240Ssamstatic int mwl_media_change(struct ifnet *); 103199559Sjhbstatic void mwl_watchdog(void *); 104193240Ssamstatic int mwl_ioctl(struct ifnet *, u_long, caddr_t); 105193240Ssamstatic void mwl_radar_proc(void *, int); 106193240Ssamstatic void mwl_chanswitch_proc(void *, int); 107193240Ssamstatic void mwl_bawatchdog_proc(void *, int); 108193240Ssamstatic int mwl_key_alloc(struct ieee80211vap *, 109193240Ssam struct ieee80211_key *, 110193240Ssam ieee80211_keyix *, ieee80211_keyix *); 111193240Ssamstatic int mwl_key_delete(struct ieee80211vap *, 112193240Ssam const struct ieee80211_key *); 113193240Ssamstatic int mwl_key_set(struct ieee80211vap *, const struct ieee80211_key *, 114193240Ssam const uint8_t mac[IEEE80211_ADDR_LEN]); 115193240Ssamstatic int mwl_mode_init(struct mwl_softc *); 116193240Ssamstatic void mwl_update_mcast(struct ifnet *); 117193240Ssamstatic void mwl_update_promisc(struct ifnet *); 118193240Ssamstatic void mwl_updateslot(struct ifnet *); 119193240Ssamstatic int mwl_beacon_setup(struct ieee80211vap *); 120193240Ssamstatic void mwl_beacon_update(struct ieee80211vap *, int); 121193240Ssam#ifdef MWL_HOST_PS_SUPPORT 122193240Ssamstatic void mwl_update_ps(struct ieee80211vap *, int); 123193240Ssamstatic int mwl_set_tim(struct ieee80211_node *, int); 124193240Ssam#endif 125193240Ssamstatic int mwl_dma_setup(struct mwl_softc *); 126193240Ssamstatic void mwl_dma_cleanup(struct mwl_softc *); 127193240Ssamstatic struct ieee80211_node *mwl_node_alloc(struct ieee80211vap *, 128193240Ssam const uint8_t [IEEE80211_ADDR_LEN]); 129193240Ssamstatic void mwl_node_cleanup(struct ieee80211_node *); 130193240Ssamstatic void mwl_node_drain(struct ieee80211_node *); 131193240Ssamstatic void mwl_node_getsignal(const struct ieee80211_node *, 132193240Ssam int8_t *, int8_t *); 133193240Ssamstatic void mwl_node_getmimoinfo(const struct ieee80211_node *, 134193240Ssam struct ieee80211_mimo_info *); 135193240Ssamstatic int mwl_rxbuf_init(struct mwl_softc *, struct mwl_rxbuf *); 136193240Ssamstatic void mwl_rx_proc(void *, int); 137193240Ssamstatic void mwl_txq_init(struct mwl_softc *sc, struct mwl_txq *, int); 138193240Ssamstatic int mwl_tx_setup(struct mwl_softc *, int, int); 139193240Ssamstatic int mwl_wme_update(struct ieee80211com *); 140193240Ssamstatic void mwl_tx_cleanupq(struct mwl_softc *, struct mwl_txq *); 141193240Ssamstatic void mwl_tx_cleanup(struct mwl_softc *); 142193240Ssamstatic uint16_t mwl_calcformat(uint8_t rate, const struct ieee80211_node *); 143193240Ssamstatic int mwl_tx_start(struct mwl_softc *, struct ieee80211_node *, 144193240Ssam struct mwl_txbuf *, struct mbuf *); 145193240Ssamstatic void mwl_tx_proc(void *, int); 146193240Ssamstatic int mwl_chan_set(struct mwl_softc *, struct ieee80211_channel *); 147193240Ssamstatic void mwl_draintxq(struct mwl_softc *); 148193240Ssamstatic void mwl_cleartxq(struct mwl_softc *, struct ieee80211vap *); 149195377Ssamstatic int mwl_recv_action(struct ieee80211_node *, 150195377Ssam const struct ieee80211_frame *, 151193240Ssam const uint8_t *, const uint8_t *); 152193240Ssamstatic int mwl_addba_request(struct ieee80211_node *, 153193240Ssam struct ieee80211_tx_ampdu *, int dialogtoken, 154193240Ssam int baparamset, int batimeout); 155193240Ssamstatic int mwl_addba_response(struct ieee80211_node *, 156193240Ssam struct ieee80211_tx_ampdu *, int status, 157193240Ssam int baparamset, int batimeout); 158193240Ssamstatic void mwl_addba_stop(struct ieee80211_node *, 159193240Ssam struct ieee80211_tx_ampdu *); 160193240Ssamstatic int mwl_startrecv(struct mwl_softc *); 161193240Ssamstatic MWL_HAL_APMODE mwl_getapmode(const struct ieee80211vap *, 162193240Ssam struct ieee80211_channel *); 163193240Ssamstatic int mwl_setapmode(struct ieee80211vap *, struct ieee80211_channel*); 164193240Ssamstatic void mwl_scan_start(struct ieee80211com *); 165193240Ssamstatic void mwl_scan_end(struct ieee80211com *); 166193240Ssamstatic void mwl_set_channel(struct ieee80211com *); 167193240Ssamstatic int mwl_peerstadb(struct ieee80211_node *, 168193240Ssam int aid, int staid, MWL_HAL_PEERINFO *pi); 169193240Ssamstatic int mwl_localstadb(struct ieee80211vap *); 170193240Ssamstatic int mwl_newstate(struct ieee80211vap *, enum ieee80211_state, int); 171193240Ssamstatic int allocstaid(struct mwl_softc *sc, int aid); 172193240Ssamstatic void delstaid(struct mwl_softc *sc, int staid); 173193240Ssamstatic void mwl_newassoc(struct ieee80211_node *, int); 174193240Ssamstatic void mwl_agestations(void *); 175193240Ssamstatic int mwl_setregdomain(struct ieee80211com *, 176193240Ssam struct ieee80211_regdomain *, int, 177193240Ssam struct ieee80211_channel []); 178193240Ssamstatic void mwl_getradiocaps(struct ieee80211com *, int, int *, 179193240Ssam struct ieee80211_channel []); 180193240Ssamstatic int mwl_getchannels(struct mwl_softc *); 181193240Ssam 182193240Ssamstatic void mwl_sysctlattach(struct mwl_softc *); 183193240Ssamstatic void mwl_announce(struct mwl_softc *); 184193240Ssam 185193240SsamSYSCTL_NODE(_hw, OID_AUTO, mwl, CTLFLAG_RD, 0, "Marvell driver parameters"); 186193240Ssam 187193240Ssamstatic int mwl_rxdesc = MWL_RXDESC; /* # rx desc's to allocate */ 188193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxdesc, CTLFLAG_RW, &mwl_rxdesc, 189193240Ssam 0, "rx descriptors allocated"); 190193240Ssamstatic int mwl_rxbuf = MWL_RXBUF; /* # rx buffers to allocate */ 191267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &mwl_rxbuf, 192193240Ssam 0, "rx buffers allocated"); 193193240Ssamstatic int mwl_txbuf = MWL_TXBUF; /* # tx buffers to allocate */ 194267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, txbuf, CTLFLAG_RWTUN, &mwl_txbuf, 195193240Ssam 0, "tx buffers allocated"); 196193240Ssamstatic int mwl_txcoalesce = 8; /* # tx packets to q before poking f/w*/ 197267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &mwl_txcoalesce, 198193240Ssam 0, "tx buffers to send at once"); 199193240Ssamstatic int mwl_rxquota = MWL_RXBUF; /* # max buffers to process */ 200267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, rxquota, CTLFLAG_RWTUN, &mwl_rxquota, 201193240Ssam 0, "max rx buffers to process per interrupt"); 202193240Ssamstatic int mwl_rxdmalow = 3; /* # min buffers for wakeup */ 203267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, rxdmalow, CTLFLAG_RWTUN, &mwl_rxdmalow, 204193240Ssam 0, "min free rx buffers before restarting traffic"); 205193240Ssam 206193240Ssam#ifdef MWL_DEBUG 207193240Ssamstatic int mwl_debug = 0; 208267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, debug, CTLFLAG_RWTUN, &mwl_debug, 209193240Ssam 0, "control debugging printfs"); 210193240Ssamenum { 211193240Ssam MWL_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 212193240Ssam MWL_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 213193240Ssam MWL_DEBUG_RECV = 0x00000004, /* basic recv operation */ 214193240Ssam MWL_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 215193240Ssam MWL_DEBUG_RESET = 0x00000010, /* reset processing */ 216193240Ssam MWL_DEBUG_BEACON = 0x00000020, /* beacon handling */ 217193240Ssam MWL_DEBUG_INTR = 0x00000040, /* ISR */ 218193240Ssam MWL_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 219193240Ssam MWL_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 220193240Ssam MWL_DEBUG_KEYCACHE = 0x00000200, /* key cache management */ 221193240Ssam MWL_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 222193240Ssam MWL_DEBUG_NODE = 0x00000800, /* node management */ 223193240Ssam MWL_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 224193240Ssam MWL_DEBUG_TSO = 0x00002000, /* TSO processing */ 225193240Ssam MWL_DEBUG_AMPDU = 0x00004000, /* BA stream handling */ 226193240Ssam MWL_DEBUG_ANY = 0xffffffff 227193240Ssam}; 228193240Ssam#define IS_BEACON(wh) \ 229193240Ssam ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK|IEEE80211_FC0_SUBTYPE_MASK)) == \ 230193240Ssam (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 231193240Ssam#define IFF_DUMPPKTS_RECV(sc, wh) \ 232193240Ssam (((sc->sc_debug & MWL_DEBUG_RECV) && \ 233193240Ssam ((sc->sc_debug & MWL_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 234193240Ssam (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 235193240Ssam#define IFF_DUMPPKTS_XMIT(sc) \ 236193240Ssam ((sc->sc_debug & MWL_DEBUG_XMIT) || \ 237193240Ssam (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 238193240Ssam#define DPRINTF(sc, m, fmt, ...) do { \ 239193240Ssam if (sc->sc_debug & (m)) \ 240193240Ssam printf(fmt, __VA_ARGS__); \ 241193240Ssam} while (0) 242193240Ssam#define KEYPRINTF(sc, hk, mac) do { \ 243193240Ssam if (sc->sc_debug & MWL_DEBUG_KEYCACHE) \ 244193240Ssam mwl_keyprint(sc, __func__, hk, mac); \ 245193240Ssam} while (0) 246193240Ssamstatic void mwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix); 247193240Ssamstatic void mwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix); 248193240Ssam#else 249193240Ssam#define IFF_DUMPPKTS_RECV(sc, wh) \ 250193240Ssam ((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 251193240Ssam#define IFF_DUMPPKTS_XMIT(sc) \ 252193240Ssam ((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 253193240Ssam#define DPRINTF(sc, m, fmt, ...) do { \ 254193240Ssam (void) sc; \ 255193240Ssam} while (0) 256193240Ssam#define KEYPRINTF(sc, k, mac) do { \ 257193240Ssam (void) sc; \ 258193240Ssam} while (0) 259193240Ssam#endif 260193240Ssam 261227293Sedstatic MALLOC_DEFINE(M_MWLDEV, "mwldev", "mwl driver dma buffers"); 262193240Ssam 263193240Ssam/* 264193240Ssam * Each packet has fixed front matter: a 2-byte length 265193240Ssam * of the payload, followed by a 4-address 802.11 header 266193240Ssam * (regardless of the actual header and always w/o any 267193240Ssam * QoS header). The payload then follows. 268193240Ssam */ 269193240Ssamstruct mwltxrec { 270193240Ssam uint16_t fwlen; 271193240Ssam struct ieee80211_frame_addr4 wh; 272193240Ssam} __packed; 273193240Ssam 274193240Ssam/* 275193240Ssam * Read/Write shorthands for accesses to BAR 0. Note 276193240Ssam * that all BAR 1 operations are done in the "hal" and 277193240Ssam * there should be no reference to them here. 278193240Ssam */ 279259869Sdim#ifdef MWL_DEBUG 280193240Ssamstatic __inline uint32_t 281193240SsamRD4(struct mwl_softc *sc, bus_size_t off) 282193240Ssam{ 283193240Ssam return bus_space_read_4(sc->sc_io0t, sc->sc_io0h, off); 284193240Ssam} 285259869Sdim#endif 286193240Ssam 287193240Ssamstatic __inline void 288193240SsamWR4(struct mwl_softc *sc, bus_size_t off, uint32_t val) 289193240Ssam{ 290193240Ssam bus_space_write_4(sc->sc_io0t, sc->sc_io0h, off, val); 291193240Ssam} 292193240Ssam 293193240Ssamint 294193240Ssammwl_attach(uint16_t devid, struct mwl_softc *sc) 295193240Ssam{ 296193240Ssam struct ifnet *ifp; 297193240Ssam struct ieee80211com *ic; 298193240Ssam struct mwl_hal *mh; 299193240Ssam int error = 0; 300193240Ssam 301193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid); 302193240Ssam 303193240Ssam ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 304193240Ssam if (ifp == NULL) { 305197441Srpaulo device_printf(sc->sc_dev, "cannot if_alloc()\n"); 306193240Ssam return ENOSPC; 307193240Ssam } 308193240Ssam ic = ifp->if_l2com; 309193240Ssam 310234368Sadrian /* 311234368Sadrian * Setup the RX free list lock early, so it can be consistently 312234368Sadrian * removed. 313234368Sadrian */ 314234368Sadrian MWL_RXFREE_INIT(sc); 315234368Sadrian 316193240Ssam /* set these up early for if_printf use */ 317193240Ssam if_initname(ifp, device_get_name(sc->sc_dev), 318193240Ssam device_get_unit(sc->sc_dev)); 319193240Ssam 320193240Ssam mh = mwl_hal_attach(sc->sc_dev, devid, 321193240Ssam sc->sc_io1h, sc->sc_io1t, sc->sc_dmat); 322193240Ssam if (mh == NULL) { 323193240Ssam if_printf(ifp, "unable to attach HAL\n"); 324193240Ssam error = EIO; 325193240Ssam goto bad; 326193240Ssam } 327193240Ssam sc->sc_mh = mh; 328193240Ssam /* 329193240Ssam * Load firmware so we can get setup. We arbitrarily 330193240Ssam * pick station firmware; we'll re-load firmware as 331193240Ssam * needed so setting up the wrong mode isn't a big deal. 332193240Ssam */ 333193240Ssam if (mwl_hal_fwload(mh, NULL) != 0) { 334193240Ssam if_printf(ifp, "unable to setup builtin firmware\n"); 335193240Ssam error = EIO; 336193240Ssam goto bad1; 337193240Ssam } 338193240Ssam if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) { 339193240Ssam if_printf(ifp, "unable to fetch h/w specs\n"); 340193240Ssam error = EIO; 341193240Ssam goto bad1; 342193240Ssam } 343193240Ssam error = mwl_getchannels(sc); 344193240Ssam if (error != 0) 345193240Ssam goto bad1; 346193240Ssam 347193240Ssam sc->sc_txantenna = 0; /* h/w default */ 348193240Ssam sc->sc_rxantenna = 0; /* h/w default */ 349193240Ssam sc->sc_invalid = 0; /* ready to go, enable int handling */ 350193240Ssam sc->sc_ageinterval = MWL_AGEINTERVAL; 351193240Ssam 352193240Ssam /* 353193240Ssam * Allocate tx+rx descriptors and populate the lists. 354193240Ssam * We immediately push the information to the firmware 355193240Ssam * as otherwise it gets upset. 356193240Ssam */ 357193240Ssam error = mwl_dma_setup(sc); 358193240Ssam if (error != 0) { 359193240Ssam if_printf(ifp, "failed to setup descriptors: %d\n", error); 360193240Ssam goto bad1; 361193240Ssam } 362193240Ssam error = mwl_setupdma(sc); /* push to firmware */ 363193240Ssam if (error != 0) /* NB: mwl_setupdma prints msg */ 364193240Ssam goto bad1; 365193240Ssam 366283291Sjkim callout_init(&sc->sc_timer, 1); 367199559Sjhb callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0); 368193240Ssam 369193240Ssam sc->sc_tq = taskqueue_create("mwl_taskq", M_NOWAIT, 370193240Ssam taskqueue_thread_enqueue, &sc->sc_tq); 371193240Ssam taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, 372193240Ssam "%s taskq", ifp->if_xname); 373193240Ssam 374193240Ssam TASK_INIT(&sc->sc_rxtask, 0, mwl_rx_proc, sc); 375193240Ssam TASK_INIT(&sc->sc_radartask, 0, mwl_radar_proc, sc); 376193240Ssam TASK_INIT(&sc->sc_chanswitchtask, 0, mwl_chanswitch_proc, sc); 377193240Ssam TASK_INIT(&sc->sc_bawatchdogtask, 0, mwl_bawatchdog_proc, sc); 378193240Ssam 379193240Ssam /* NB: insure BK queue is the lowest priority h/w queue */ 380193240Ssam if (!mwl_tx_setup(sc, WME_AC_BK, MWL_WME_AC_BK)) { 381193240Ssam if_printf(ifp, "unable to setup xmit queue for %s traffic!\n", 382193240Ssam ieee80211_wme_acnames[WME_AC_BK]); 383193240Ssam error = EIO; 384193240Ssam goto bad2; 385193240Ssam } 386193240Ssam if (!mwl_tx_setup(sc, WME_AC_BE, MWL_WME_AC_BE) || 387193240Ssam !mwl_tx_setup(sc, WME_AC_VI, MWL_WME_AC_VI) || 388193240Ssam !mwl_tx_setup(sc, WME_AC_VO, MWL_WME_AC_VO)) { 389193240Ssam /* 390193240Ssam * Not enough hardware tx queues to properly do WME; 391193240Ssam * just punt and assign them all to the same h/w queue. 392193240Ssam * We could do a better job of this if, for example, 393193240Ssam * we allocate queues when we switch from station to 394193240Ssam * AP mode. 395193240Ssam */ 396193240Ssam if (sc->sc_ac2q[WME_AC_VI] != NULL) 397193240Ssam mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]); 398193240Ssam if (sc->sc_ac2q[WME_AC_BE] != NULL) 399193240Ssam mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]); 400193240Ssam sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK]; 401193240Ssam sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK]; 402193240Ssam sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK]; 403193240Ssam } 404193240Ssam TASK_INIT(&sc->sc_txtask, 0, mwl_tx_proc, sc); 405193240Ssam 406193240Ssam ifp->if_softc = sc; 407193240Ssam ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 408193240Ssam ifp->if_start = mwl_start; 409193240Ssam ifp->if_ioctl = mwl_ioctl; 410193240Ssam ifp->if_init = mwl_init; 411207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 412207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 413193240Ssam IFQ_SET_READY(&ifp->if_snd); 414193240Ssam 415193240Ssam ic->ic_ifp = ifp; 416283537Sglebius ic->ic_softc = sc; 417283527Sglebius ic->ic_name = device_get_nameunit(sc->sc_dev); 418193240Ssam /* XXX not right but it's not used anywhere important */ 419193240Ssam ic->ic_phytype = IEEE80211_T_OFDM; 420193240Ssam ic->ic_opmode = IEEE80211_M_STA; 421193240Ssam ic->ic_caps = 422193240Ssam IEEE80211_C_STA /* station mode supported */ 423193240Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 424193240Ssam | IEEE80211_C_MONITOR /* monitor mode */ 425193240Ssam#if 0 426193240Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 427193240Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 428193240Ssam#endif 429195618Srpaulo | IEEE80211_C_MBSS /* mesh point link mode */ 430193240Ssam | IEEE80211_C_WDS /* WDS supported */ 431193240Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 432193240Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 433193240Ssam | IEEE80211_C_WME /* WME/WMM supported */ 434193240Ssam | IEEE80211_C_BURST /* xmit bursting supported */ 435193240Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 436193240Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 437193240Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 438193240Ssam | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 439193240Ssam | IEEE80211_C_DFS /* DFS supported */ 440193240Ssam ; 441193240Ssam 442193240Ssam ic->ic_htcaps = 443193240Ssam IEEE80211_HTCAP_SMPS_ENA /* SM PS mode enabled */ 444193240Ssam | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width */ 445193240Ssam | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */ 446193240Ssam | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */ 447193240Ssam | IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */ 448193240Ssam#if MWL_AGGR_SIZE == 7935 449193240Ssam | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */ 450193240Ssam#else 451193240Ssam | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */ 452193240Ssam#endif 453193240Ssam#if 0 454193240Ssam | IEEE80211_HTCAP_PSMP /* PSMP supported */ 455193240Ssam | IEEE80211_HTCAP_40INTOLERANT /* 40MHz intolerant */ 456193240Ssam#endif 457193240Ssam /* s/w capabilities */ 458193240Ssam | IEEE80211_HTC_HT /* HT operation */ 459193240Ssam | IEEE80211_HTC_AMPDU /* tx A-MPDU */ 460193240Ssam | IEEE80211_HTC_AMSDU /* tx A-MSDU */ 461193240Ssam | IEEE80211_HTC_SMPS /* SMPS available */ 462193240Ssam ; 463193240Ssam 464193240Ssam /* 465193240Ssam * Mark h/w crypto support. 466193240Ssam * XXX no way to query h/w support. 467193240Ssam */ 468193240Ssam ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP 469193240Ssam | IEEE80211_CRYPTO_AES_CCM 470193240Ssam | IEEE80211_CRYPTO_TKIP 471193240Ssam | IEEE80211_CRYPTO_TKIPMIC 472193240Ssam ; 473193240Ssam /* 474193240Ssam * Transmit requires space in the packet for a special 475193240Ssam * format transmit record and optional padding between 476193240Ssam * this record and the payload. Ask the net80211 layer 477193240Ssam * to arrange this when encapsulating packets so we can 478193240Ssam * add it efficiently. 479193240Ssam */ 480193240Ssam ic->ic_headroom = sizeof(struct mwltxrec) - 481193240Ssam sizeof(struct ieee80211_frame); 482193240Ssam 483193240Ssam /* call MI attach routine. */ 484193240Ssam ieee80211_ifattach(ic, sc->sc_hwspecs.macAddr); 485193240Ssam ic->ic_setregdomain = mwl_setregdomain; 486193240Ssam ic->ic_getradiocaps = mwl_getradiocaps; 487193240Ssam /* override default methods */ 488193240Ssam ic->ic_raw_xmit = mwl_raw_xmit; 489193240Ssam ic->ic_newassoc = mwl_newassoc; 490193240Ssam ic->ic_updateslot = mwl_updateslot; 491193240Ssam ic->ic_update_mcast = mwl_update_mcast; 492193240Ssam ic->ic_update_promisc = mwl_update_promisc; 493193240Ssam ic->ic_wme.wme_update = mwl_wme_update; 494193240Ssam 495193240Ssam ic->ic_node_alloc = mwl_node_alloc; 496193240Ssam sc->sc_node_cleanup = ic->ic_node_cleanup; 497193240Ssam ic->ic_node_cleanup = mwl_node_cleanup; 498193240Ssam sc->sc_node_drain = ic->ic_node_drain; 499193240Ssam ic->ic_node_drain = mwl_node_drain; 500193240Ssam ic->ic_node_getsignal = mwl_node_getsignal; 501193240Ssam ic->ic_node_getmimoinfo = mwl_node_getmimoinfo; 502193240Ssam 503193240Ssam ic->ic_scan_start = mwl_scan_start; 504193240Ssam ic->ic_scan_end = mwl_scan_end; 505193240Ssam ic->ic_set_channel = mwl_set_channel; 506193240Ssam 507193240Ssam sc->sc_recv_action = ic->ic_recv_action; 508193240Ssam ic->ic_recv_action = mwl_recv_action; 509193240Ssam sc->sc_addba_request = ic->ic_addba_request; 510193240Ssam ic->ic_addba_request = mwl_addba_request; 511193240Ssam sc->sc_addba_response = ic->ic_addba_response; 512193240Ssam ic->ic_addba_response = mwl_addba_response; 513193240Ssam sc->sc_addba_stop = ic->ic_addba_stop; 514193240Ssam ic->ic_addba_stop = mwl_addba_stop; 515193240Ssam 516193240Ssam ic->ic_vap_create = mwl_vap_create; 517193240Ssam ic->ic_vap_delete = mwl_vap_delete; 518193240Ssam 519193240Ssam ieee80211_radiotap_attach(ic, 520193240Ssam &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th), 521193240Ssam MWL_TX_RADIOTAP_PRESENT, 522193240Ssam &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th), 523193240Ssam MWL_RX_RADIOTAP_PRESENT); 524193240Ssam /* 525193240Ssam * Setup dynamic sysctl's now that country code and 526193240Ssam * regdomain are available from the hal. 527193240Ssam */ 528193240Ssam mwl_sysctlattach(sc); 529193240Ssam 530193240Ssam if (bootverbose) 531193240Ssam ieee80211_announce(ic); 532193240Ssam mwl_announce(sc); 533193240Ssam return 0; 534193240Ssambad2: 535193240Ssam mwl_dma_cleanup(sc); 536193240Ssambad1: 537193240Ssam mwl_hal_detach(mh); 538193240Ssambad: 539234368Sadrian MWL_RXFREE_DESTROY(sc); 540193240Ssam if_free(ifp); 541193240Ssam sc->sc_invalid = 1; 542193240Ssam return error; 543193240Ssam} 544193240Ssam 545193240Ssamint 546193240Ssammwl_detach(struct mwl_softc *sc) 547193240Ssam{ 548193240Ssam struct ifnet *ifp = sc->sc_ifp; 549193240Ssam struct ieee80211com *ic = ifp->if_l2com; 550193240Ssam 551193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n", 552193240Ssam __func__, ifp->if_flags); 553193240Ssam 554193240Ssam mwl_stop(ifp, 1); 555193240Ssam /* 556193240Ssam * NB: the order of these is important: 557193240Ssam * o call the 802.11 layer before detaching the hal to 558193240Ssam * insure callbacks into the driver to delete global 559193240Ssam * key cache entries can be handled 560193240Ssam * o reclaim the tx queue data structures after calling 561193240Ssam * the 802.11 layer as we'll get called back to reclaim 562193240Ssam * node state and potentially want to use them 563193240Ssam * o to cleanup the tx queues the hal is called, so detach 564193240Ssam * it last 565193240Ssam * Other than that, it's straightforward... 566193240Ssam */ 567193240Ssam ieee80211_ifdetach(ic); 568199559Sjhb callout_drain(&sc->sc_watchdog); 569193240Ssam mwl_dma_cleanup(sc); 570234368Sadrian MWL_RXFREE_DESTROY(sc); 571193240Ssam mwl_tx_cleanup(sc); 572193240Ssam mwl_hal_detach(sc->sc_mh); 573193240Ssam if_free(ifp); 574193240Ssam 575193240Ssam return 0; 576193240Ssam} 577193240Ssam 578193240Ssam/* 579193240Ssam * MAC address handling for multiple BSS on the same radio. 580193240Ssam * The first vap uses the MAC address from the EEPROM. For 581193240Ssam * subsequent vap's we set the U/L bit (bit 1) in the MAC 582193240Ssam * address and use the next six bits as an index. 583193240Ssam */ 584193240Ssamstatic void 585193240Ssamassign_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN], int clone) 586193240Ssam{ 587193240Ssam int i; 588193240Ssam 589193240Ssam if (clone && mwl_hal_ismbsscapable(sc->sc_mh)) { 590193240Ssam /* NB: we only do this if h/w supports multiple bssid */ 591193240Ssam for (i = 0; i < 32; i++) 592193240Ssam if ((sc->sc_bssidmask & (1<<i)) == 0) 593193240Ssam break; 594193240Ssam if (i != 0) 595193240Ssam mac[0] |= (i << 2)|0x2; 596193240Ssam } else 597193240Ssam i = 0; 598193240Ssam sc->sc_bssidmask |= 1<<i; 599193240Ssam if (i == 0) 600193240Ssam sc->sc_nbssid0++; 601193240Ssam} 602193240Ssam 603193240Ssamstatic void 604193240Ssamreclaim_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN]) 605193240Ssam{ 606193240Ssam int i = mac[0] >> 2; 607193240Ssam if (i != 0 || --sc->sc_nbssid0 == 0) 608193240Ssam sc->sc_bssidmask &= ~(1<<i); 609193240Ssam} 610193240Ssam 611193240Ssamstatic struct ieee80211vap * 612228621Sbschmidtmwl_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 613228621Sbschmidt enum ieee80211_opmode opmode, int flags, 614228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 615228621Sbschmidt const uint8_t mac0[IEEE80211_ADDR_LEN]) 616193240Ssam{ 617193240Ssam struct ifnet *ifp = ic->ic_ifp; 618193240Ssam struct mwl_softc *sc = ifp->if_softc; 619193240Ssam struct mwl_hal *mh = sc->sc_mh; 620193240Ssam struct ieee80211vap *vap, *apvap; 621193240Ssam struct mwl_hal_vap *hvap; 622193240Ssam struct mwl_vap *mvp; 623193240Ssam uint8_t mac[IEEE80211_ADDR_LEN]; 624193240Ssam 625193240Ssam IEEE80211_ADDR_COPY(mac, mac0); 626193240Ssam switch (opmode) { 627193240Ssam case IEEE80211_M_HOSTAP: 628195618Srpaulo case IEEE80211_M_MBSS: 629193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 630193240Ssam assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID); 631193240Ssam hvap = mwl_hal_newvap(mh, MWL_HAL_AP, mac); 632193240Ssam if (hvap == NULL) { 633193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 634193240Ssam reclaim_address(sc, mac); 635193240Ssam return NULL; 636193240Ssam } 637193240Ssam break; 638193240Ssam case IEEE80211_M_STA: 639193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 640193240Ssam assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID); 641193240Ssam hvap = mwl_hal_newvap(mh, MWL_HAL_STA, mac); 642193240Ssam if (hvap == NULL) { 643193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 644193240Ssam reclaim_address(sc, mac); 645193240Ssam return NULL; 646193240Ssam } 647193240Ssam /* no h/w beacon miss support; always use s/w */ 648193240Ssam flags |= IEEE80211_CLONE_NOBEACONS; 649193240Ssam break; 650193240Ssam case IEEE80211_M_WDS: 651193240Ssam hvap = NULL; /* NB: we use associated AP vap */ 652193240Ssam if (sc->sc_napvaps == 0) 653193240Ssam return NULL; /* no existing AP vap */ 654193240Ssam break; 655193240Ssam case IEEE80211_M_MONITOR: 656193240Ssam hvap = NULL; 657193240Ssam break; 658193240Ssam case IEEE80211_M_IBSS: 659193240Ssam case IEEE80211_M_AHDEMO: 660193240Ssam default: 661193240Ssam return NULL; 662193240Ssam } 663193240Ssam 664193240Ssam mvp = (struct mwl_vap *) malloc(sizeof(struct mwl_vap), 665193240Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 666193240Ssam if (mvp == NULL) { 667193240Ssam if (hvap != NULL) { 668193240Ssam mwl_hal_delvap(hvap); 669193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 670193240Ssam reclaim_address(sc, mac); 671193240Ssam } 672193240Ssam /* XXX msg */ 673193240Ssam return NULL; 674193240Ssam } 675193240Ssam mvp->mv_hvap = hvap; 676193240Ssam if (opmode == IEEE80211_M_WDS) { 677193240Ssam /* 678193240Ssam * WDS vaps must have an associated AP vap; find one. 679193240Ssam * XXX not right. 680193240Ssam */ 681193240Ssam TAILQ_FOREACH(apvap, &ic->ic_vaps, iv_next) 682193240Ssam if (apvap->iv_opmode == IEEE80211_M_HOSTAP) { 683193240Ssam mvp->mv_ap_hvap = MWL_VAP(apvap)->mv_hvap; 684193240Ssam break; 685193240Ssam } 686193240Ssam KASSERT(mvp->mv_ap_hvap != NULL, ("no ap vap")); 687193240Ssam } 688193240Ssam vap = &mvp->mv_vap; 689193240Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 690193240Ssam if (hvap != NULL) 691193240Ssam IEEE80211_ADDR_COPY(vap->iv_myaddr, mac); 692193240Ssam /* override with driver methods */ 693193240Ssam mvp->mv_newstate = vap->iv_newstate; 694193240Ssam vap->iv_newstate = mwl_newstate; 695193240Ssam vap->iv_max_keyix = 0; /* XXX */ 696193240Ssam vap->iv_key_alloc = mwl_key_alloc; 697193240Ssam vap->iv_key_delete = mwl_key_delete; 698193240Ssam vap->iv_key_set = mwl_key_set; 699193240Ssam#ifdef MWL_HOST_PS_SUPPORT 700195618Srpaulo if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) { 701193240Ssam vap->iv_update_ps = mwl_update_ps; 702193240Ssam mvp->mv_set_tim = vap->iv_set_tim; 703193240Ssam vap->iv_set_tim = mwl_set_tim; 704193240Ssam } 705193240Ssam#endif 706193240Ssam vap->iv_reset = mwl_reset; 707193240Ssam vap->iv_update_beacon = mwl_beacon_update; 708193240Ssam 709193240Ssam /* override max aid so sta's cannot assoc when we're out of sta id's */ 710193240Ssam vap->iv_max_aid = MWL_MAXSTAID; 711193240Ssam /* override default A-MPDU rx parameters */ 712193240Ssam vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 713193240Ssam vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4; 714193240Ssam 715193240Ssam /* complete setup */ 716193240Ssam ieee80211_vap_attach(vap, mwl_media_change, ieee80211_media_status); 717193240Ssam 718193240Ssam switch (vap->iv_opmode) { 719193240Ssam case IEEE80211_M_HOSTAP: 720195618Srpaulo case IEEE80211_M_MBSS: 721193240Ssam case IEEE80211_M_STA: 722193240Ssam /* 723193240Ssam * Setup sta db entry for local address. 724193240Ssam */ 725193240Ssam mwl_localstadb(vap); 726195618Srpaulo if (vap->iv_opmode == IEEE80211_M_HOSTAP || 727195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) 728193240Ssam sc->sc_napvaps++; 729193240Ssam else 730193240Ssam sc->sc_nstavaps++; 731193240Ssam break; 732193240Ssam case IEEE80211_M_WDS: 733193240Ssam sc->sc_nwdsvaps++; 734193240Ssam break; 735193240Ssam default: 736193240Ssam break; 737193240Ssam } 738193240Ssam /* 739193240Ssam * Setup overall operating mode. 740193240Ssam */ 741193240Ssam if (sc->sc_napvaps) 742193240Ssam ic->ic_opmode = IEEE80211_M_HOSTAP; 743193240Ssam else if (sc->sc_nstavaps) 744193240Ssam ic->ic_opmode = IEEE80211_M_STA; 745193240Ssam else 746193240Ssam ic->ic_opmode = opmode; 747193240Ssam 748193240Ssam return vap; 749193240Ssam} 750193240Ssam 751193240Ssamstatic void 752193240Ssammwl_vap_delete(struct ieee80211vap *vap) 753193240Ssam{ 754193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 755193240Ssam struct ifnet *parent = vap->iv_ic->ic_ifp; 756193240Ssam struct mwl_softc *sc = parent->if_softc; 757193240Ssam struct mwl_hal *mh = sc->sc_mh; 758193240Ssam struct mwl_hal_vap *hvap = mvp->mv_hvap; 759193240Ssam enum ieee80211_opmode opmode = vap->iv_opmode; 760193240Ssam 761193240Ssam /* XXX disallow ap vap delete if WDS still present */ 762193240Ssam if (parent->if_drv_flags & IFF_DRV_RUNNING) { 763193240Ssam /* quiesce h/w while we remove the vap */ 764193240Ssam mwl_hal_intrset(mh, 0); /* disable interrupts */ 765193240Ssam } 766193240Ssam ieee80211_vap_detach(vap); 767193240Ssam switch (opmode) { 768193240Ssam case IEEE80211_M_HOSTAP: 769195618Srpaulo case IEEE80211_M_MBSS: 770193240Ssam case IEEE80211_M_STA: 771193240Ssam KASSERT(hvap != NULL, ("no hal vap handle")); 772193240Ssam (void) mwl_hal_delstation(hvap, vap->iv_myaddr); 773193240Ssam mwl_hal_delvap(hvap); 774195618Srpaulo if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) 775193240Ssam sc->sc_napvaps--; 776193240Ssam else 777193240Ssam sc->sc_nstavaps--; 778193240Ssam /* XXX don't do it for IEEE80211_CLONE_MACADDR */ 779193240Ssam reclaim_address(sc, vap->iv_myaddr); 780193240Ssam break; 781193240Ssam case IEEE80211_M_WDS: 782193240Ssam sc->sc_nwdsvaps--; 783193240Ssam break; 784193240Ssam default: 785193240Ssam break; 786193240Ssam } 787193240Ssam mwl_cleartxq(sc, vap); 788193240Ssam free(mvp, M_80211_VAP); 789193240Ssam if (parent->if_drv_flags & IFF_DRV_RUNNING) 790193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 791193240Ssam} 792193240Ssam 793193240Ssamvoid 794193240Ssammwl_suspend(struct mwl_softc *sc) 795193240Ssam{ 796193240Ssam struct ifnet *ifp = sc->sc_ifp; 797193240Ssam 798193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n", 799193240Ssam __func__, ifp->if_flags); 800193240Ssam 801193240Ssam mwl_stop(ifp, 1); 802193240Ssam} 803193240Ssam 804193240Ssamvoid 805193240Ssammwl_resume(struct mwl_softc *sc) 806193240Ssam{ 807193240Ssam struct ifnet *ifp = sc->sc_ifp; 808193240Ssam 809193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n", 810193240Ssam __func__, ifp->if_flags); 811193240Ssam 812193240Ssam if (ifp->if_flags & IFF_UP) 813193240Ssam mwl_init(sc); 814193240Ssam} 815193240Ssam 816193240Ssamvoid 817193240Ssammwl_shutdown(void *arg) 818193240Ssam{ 819193240Ssam struct mwl_softc *sc = arg; 820193240Ssam 821193240Ssam mwl_stop(sc->sc_ifp, 1); 822193240Ssam} 823193240Ssam 824193240Ssam/* 825193240Ssam * Interrupt handler. Most of the actual processing is deferred. 826193240Ssam */ 827193240Ssamvoid 828193240Ssammwl_intr(void *arg) 829193240Ssam{ 830193240Ssam struct mwl_softc *sc = arg; 831193240Ssam struct mwl_hal *mh = sc->sc_mh; 832193240Ssam uint32_t status; 833193240Ssam 834193240Ssam if (sc->sc_invalid) { 835193240Ssam /* 836193240Ssam * The hardware is not ready/present, don't touch anything. 837193240Ssam * Note this can happen early on if the IRQ is shared. 838193240Ssam */ 839193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 840193240Ssam return; 841193240Ssam } 842193240Ssam /* 843193240Ssam * Figure out the reason(s) for the interrupt. 844193240Ssam */ 845193240Ssam mwl_hal_getisr(mh, &status); /* NB: clears ISR too */ 846193240Ssam if (status == 0) /* must be a shared irq */ 847193240Ssam return; 848193240Ssam 849193240Ssam DPRINTF(sc, MWL_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 850193240Ssam __func__, status, sc->sc_imask); 851193240Ssam if (status & MACREG_A2HRIC_BIT_RX_RDY) 852193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); 853193240Ssam if (status & MACREG_A2HRIC_BIT_TX_DONE) 854193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask); 855193240Ssam if (status & MACREG_A2HRIC_BIT_BA_WATCHDOG) 856193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_bawatchdogtask); 857193240Ssam if (status & MACREG_A2HRIC_BIT_OPC_DONE) 858193240Ssam mwl_hal_cmddone(mh); 859193240Ssam if (status & MACREG_A2HRIC_BIT_MAC_EVENT) { 860193240Ssam ; 861193240Ssam } 862193240Ssam if (status & MACREG_A2HRIC_BIT_ICV_ERROR) { 863193240Ssam /* TKIP ICV error */ 864193240Ssam sc->sc_stats.mst_rx_badtkipicv++; 865193240Ssam } 866193240Ssam if (status & MACREG_A2HRIC_BIT_QUEUE_EMPTY) { 867193240Ssam /* 11n aggregation queue is empty, re-fill */ 868193240Ssam ; 869193240Ssam } 870193240Ssam if (status & MACREG_A2HRIC_BIT_QUEUE_FULL) { 871193240Ssam ; 872193240Ssam } 873193240Ssam if (status & MACREG_A2HRIC_BIT_RADAR_DETECT) { 874193240Ssam /* radar detected, process event */ 875193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_radartask); 876193240Ssam } 877193240Ssam if (status & MACREG_A2HRIC_BIT_CHAN_SWITCH) { 878193240Ssam /* DFS channel switch */ 879193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_chanswitchtask); 880193240Ssam } 881193240Ssam} 882193240Ssam 883193240Ssamstatic void 884193240Ssammwl_radar_proc(void *arg, int pending) 885193240Ssam{ 886193240Ssam struct mwl_softc *sc = arg; 887193240Ssam struct ifnet *ifp = sc->sc_ifp; 888193240Ssam struct ieee80211com *ic = ifp->if_l2com; 889193240Ssam 890193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: radar detected, pending %u\n", 891193240Ssam __func__, pending); 892193240Ssam 893193240Ssam sc->sc_stats.mst_radardetect++; 894195171Ssam /* XXX stop h/w BA streams? */ 895193240Ssam 896193240Ssam IEEE80211_LOCK(ic); 897193240Ssam ieee80211_dfs_notify_radar(ic, ic->ic_curchan); 898193240Ssam IEEE80211_UNLOCK(ic); 899193240Ssam} 900193240Ssam 901193240Ssamstatic void 902193240Ssammwl_chanswitch_proc(void *arg, int pending) 903193240Ssam{ 904193240Ssam struct mwl_softc *sc = arg; 905193240Ssam struct ifnet *ifp = sc->sc_ifp; 906193240Ssam struct ieee80211com *ic = ifp->if_l2com; 907193240Ssam 908193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: channel switch notice, pending %u\n", 909193240Ssam __func__, pending); 910193240Ssam 911193240Ssam IEEE80211_LOCK(ic); 912193240Ssam sc->sc_csapending = 0; 913193240Ssam ieee80211_csa_completeswitch(ic); 914193240Ssam IEEE80211_UNLOCK(ic); 915193240Ssam} 916193240Ssam 917193240Ssamstatic void 918193240Ssammwl_bawatchdog(const MWL_HAL_BASTREAM *sp) 919193240Ssam{ 920193240Ssam struct ieee80211_node *ni = sp->data[0]; 921193240Ssam 922193240Ssam /* send DELBA and drop the stream */ 923193240Ssam ieee80211_ampdu_stop(ni, sp->data[1], IEEE80211_REASON_UNSPECIFIED); 924193240Ssam} 925193240Ssam 926193240Ssamstatic void 927193240Ssammwl_bawatchdog_proc(void *arg, int pending) 928193240Ssam{ 929193240Ssam struct mwl_softc *sc = arg; 930193240Ssam struct mwl_hal *mh = sc->sc_mh; 931193240Ssam const MWL_HAL_BASTREAM *sp; 932193240Ssam uint8_t bitmap, n; 933193240Ssam 934193240Ssam sc->sc_stats.mst_bawatchdog++; 935193240Ssam 936193240Ssam if (mwl_hal_getwatchdogbitmap(mh, &bitmap) != 0) { 937193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 938193240Ssam "%s: could not get bitmap\n", __func__); 939193240Ssam sc->sc_stats.mst_bawatchdog_failed++; 940193240Ssam return; 941193240Ssam } 942193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: bitmap 0x%x\n", __func__, bitmap); 943193240Ssam if (bitmap == 0xff) { 944193240Ssam n = 0; 945193240Ssam /* disable all ba streams */ 946193240Ssam for (bitmap = 0; bitmap < 8; bitmap++) { 947193240Ssam sp = mwl_hal_bastream_lookup(mh, bitmap); 948193240Ssam if (sp != NULL) { 949193240Ssam mwl_bawatchdog(sp); 950193240Ssam n++; 951193240Ssam } 952193240Ssam } 953193240Ssam if (n == 0) { 954193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 955193240Ssam "%s: no BA streams found\n", __func__); 956193240Ssam sc->sc_stats.mst_bawatchdog_empty++; 957193240Ssam } 958193240Ssam } else if (bitmap != 0xaa) { 959193240Ssam /* disable a single ba stream */ 960193240Ssam sp = mwl_hal_bastream_lookup(mh, bitmap); 961193240Ssam if (sp != NULL) { 962193240Ssam mwl_bawatchdog(sp); 963193240Ssam } else { 964193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 965193240Ssam "%s: no BA stream %d\n", __func__, bitmap); 966193240Ssam sc->sc_stats.mst_bawatchdog_notfound++; 967193240Ssam } 968193240Ssam } 969193240Ssam} 970193240Ssam 971193240Ssam/* 972193240Ssam * Convert net80211 channel to a HAL channel. 973193240Ssam */ 974193240Ssamstatic void 975193240Ssammwl_mapchan(MWL_HAL_CHANNEL *hc, const struct ieee80211_channel *chan) 976193240Ssam{ 977193240Ssam hc->channel = chan->ic_ieee; 978193240Ssam 979193240Ssam *(uint32_t *)&hc->channelFlags = 0; 980193240Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) 981193240Ssam hc->channelFlags.FreqBand = MWL_FREQ_BAND_2DOT4GHZ; 982193240Ssam else if (IEEE80211_IS_CHAN_5GHZ(chan)) 983193240Ssam hc->channelFlags.FreqBand = MWL_FREQ_BAND_5GHZ; 984193240Ssam if (IEEE80211_IS_CHAN_HT40(chan)) { 985193240Ssam hc->channelFlags.ChnlWidth = MWL_CH_40_MHz_WIDTH; 986193240Ssam if (IEEE80211_IS_CHAN_HT40U(chan)) 987193240Ssam hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_ABOVE_CTRL_CH; 988193240Ssam else 989193240Ssam hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_BELOW_CTRL_CH; 990193240Ssam } else 991193240Ssam hc->channelFlags.ChnlWidth = MWL_CH_20_MHz_WIDTH; 992193240Ssam /* XXX 10MHz channels */ 993193240Ssam} 994193240Ssam 995193240Ssam/* 996193240Ssam * Inform firmware of our tx/rx dma setup. The BAR 0 997193240Ssam * writes below are for compatibility with older firmware. 998193240Ssam * For current firmware we send this information with a 999193240Ssam * cmd block via mwl_hal_sethwdma. 1000193240Ssam */ 1001193240Ssamstatic int 1002193240Ssammwl_setupdma(struct mwl_softc *sc) 1003193240Ssam{ 1004193240Ssam int error, i; 1005193240Ssam 1006193240Ssam sc->sc_hwdma.rxDescRead = sc->sc_rxdma.dd_desc_paddr; 1007193240Ssam WR4(sc, sc->sc_hwspecs.rxDescRead, sc->sc_hwdma.rxDescRead); 1008193240Ssam WR4(sc, sc->sc_hwspecs.rxDescWrite, sc->sc_hwdma.rxDescRead); 1009193240Ssam 1010195171Ssam for (i = 0; i < MWL_NUM_TX_QUEUES-MWL_NUM_ACK_QUEUES; i++) { 1011193240Ssam struct mwl_txq *txq = &sc->sc_txq[i]; 1012193240Ssam sc->sc_hwdma.wcbBase[i] = txq->dma.dd_desc_paddr; 1013193240Ssam WR4(sc, sc->sc_hwspecs.wcbBase[i], sc->sc_hwdma.wcbBase[i]); 1014193240Ssam } 1015193240Ssam sc->sc_hwdma.maxNumTxWcb = mwl_txbuf; 1016195171Ssam sc->sc_hwdma.maxNumWCB = MWL_NUM_TX_QUEUES-MWL_NUM_ACK_QUEUES; 1017193240Ssam 1018193240Ssam error = mwl_hal_sethwdma(sc->sc_mh, &sc->sc_hwdma); 1019193240Ssam if (error != 0) { 1020193240Ssam device_printf(sc->sc_dev, 1021193240Ssam "unable to setup tx/rx dma; hal status %u\n", error); 1022193240Ssam /* XXX */ 1023193240Ssam } 1024193240Ssam return error; 1025193240Ssam} 1026193240Ssam 1027193240Ssam/* 1028193240Ssam * Inform firmware of tx rate parameters. 1029193240Ssam * Called after a channel change. 1030193240Ssam */ 1031193240Ssamstatic int 1032193240Ssammwl_setcurchanrates(struct mwl_softc *sc) 1033193240Ssam{ 1034193240Ssam struct ifnet *ifp = sc->sc_ifp; 1035193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1036193240Ssam const struct ieee80211_rateset *rs; 1037193240Ssam MWL_HAL_TXRATE rates; 1038193240Ssam 1039193240Ssam memset(&rates, 0, sizeof(rates)); 1040193240Ssam rs = ieee80211_get_suprates(ic, ic->ic_curchan); 1041193240Ssam /* rate used to send management frames */ 1042193240Ssam rates.MgtRate = rs->rs_rates[0] & IEEE80211_RATE_VAL; 1043193240Ssam /* rate used to send multicast frames */ 1044193240Ssam rates.McastRate = rates.MgtRate; 1045193240Ssam 1046193240Ssam return mwl_hal_settxrate_auto(sc->sc_mh, &rates); 1047193240Ssam} 1048193240Ssam 1049193240Ssam/* 1050193240Ssam * Inform firmware of tx rate parameters. Called whenever 1051193240Ssam * user-settable params change and after a channel change. 1052193240Ssam */ 1053193240Ssamstatic int 1054193240Ssammwl_setrates(struct ieee80211vap *vap) 1055193240Ssam{ 1056193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1057193240Ssam struct ieee80211_node *ni = vap->iv_bss; 1058193240Ssam const struct ieee80211_txparam *tp = ni->ni_txparms; 1059193240Ssam MWL_HAL_TXRATE rates; 1060193240Ssam 1061193240Ssam KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state)); 1062193240Ssam 1063193240Ssam /* 1064193240Ssam * Update the h/w rate map. 1065193240Ssam * NB: 0x80 for MCS is passed through unchanged 1066193240Ssam */ 1067193240Ssam memset(&rates, 0, sizeof(rates)); 1068193240Ssam /* rate used to send management frames */ 1069193240Ssam rates.MgtRate = tp->mgmtrate; 1070193240Ssam /* rate used to send multicast frames */ 1071193240Ssam rates.McastRate = tp->mcastrate; 1072193240Ssam 1073193240Ssam /* while here calculate EAPOL fixed rate cookie */ 1074193240Ssam mvp->mv_eapolformat = htole16(mwl_calcformat(rates.MgtRate, ni)); 1075193240Ssam 1076195171Ssam return mwl_hal_settxrate(mvp->mv_hvap, 1077195171Ssam tp->ucastrate != IEEE80211_FIXED_RATE_NONE ? 1078195171Ssam RATE_FIXED : RATE_AUTO, &rates); 1079193240Ssam} 1080193240Ssam 1081193240Ssam/* 1082193240Ssam * Setup a fixed xmit rate cookie for EAPOL frames. 1083193240Ssam */ 1084193240Ssamstatic void 1085193240Ssammwl_seteapolformat(struct ieee80211vap *vap) 1086193240Ssam{ 1087193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1088193240Ssam struct ieee80211_node *ni = vap->iv_bss; 1089193240Ssam enum ieee80211_phymode mode; 1090193240Ssam uint8_t rate; 1091193240Ssam 1092193240Ssam KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state)); 1093193240Ssam 1094193240Ssam mode = ieee80211_chan2mode(ni->ni_chan); 1095193240Ssam /* 1096193240Ssam * Use legacy rates when operating a mixed HT+non-HT bss. 1097193240Ssam * NB: this may violate POLA for sta and wds vap's. 1098193240Ssam */ 1099193240Ssam if (mode == IEEE80211_MODE_11NA && 1100193656Ssam (vap->iv_flags_ht & IEEE80211_FHT_PUREN) == 0) 1101193240Ssam rate = vap->iv_txparms[IEEE80211_MODE_11A].mgmtrate; 1102193240Ssam else if (mode == IEEE80211_MODE_11NG && 1103193656Ssam (vap->iv_flags_ht & IEEE80211_FHT_PUREN) == 0) 1104193240Ssam rate = vap->iv_txparms[IEEE80211_MODE_11G].mgmtrate; 1105193240Ssam else 1106193240Ssam rate = vap->iv_txparms[mode].mgmtrate; 1107193240Ssam 1108193240Ssam mvp->mv_eapolformat = htole16(mwl_calcformat(rate, ni)); 1109193240Ssam} 1110193240Ssam 1111193240Ssam/* 1112193240Ssam * Map SKU+country code to region code for radar bin'ing. 1113193240Ssam */ 1114193240Ssamstatic int 1115193240Ssammwl_map2regioncode(const struct ieee80211_regdomain *rd) 1116193240Ssam{ 1117193240Ssam switch (rd->regdomain) { 1118193240Ssam case SKU_FCC: 1119193240Ssam case SKU_FCC3: 1120193240Ssam return DOMAIN_CODE_FCC; 1121193240Ssam case SKU_CA: 1122193240Ssam return DOMAIN_CODE_IC; 1123193240Ssam case SKU_ETSI: 1124193240Ssam case SKU_ETSI2: 1125193240Ssam case SKU_ETSI3: 1126193240Ssam if (rd->country == CTRY_SPAIN) 1127193240Ssam return DOMAIN_CODE_SPAIN; 1128193240Ssam if (rd->country == CTRY_FRANCE || rd->country == CTRY_FRANCE2) 1129193240Ssam return DOMAIN_CODE_FRANCE; 1130193240Ssam /* XXX force 1.3.1 radar type */ 1131193240Ssam return DOMAIN_CODE_ETSI_131; 1132193240Ssam case SKU_JAPAN: 1133193240Ssam return DOMAIN_CODE_MKK; 1134193240Ssam case SKU_ROW: 1135193240Ssam return DOMAIN_CODE_DGT; /* Taiwan */ 1136193240Ssam case SKU_APAC: 1137193240Ssam case SKU_APAC2: 1138193240Ssam case SKU_APAC3: 1139193240Ssam return DOMAIN_CODE_AUS; /* Australia */ 1140193240Ssam } 1141193240Ssam /* XXX KOREA? */ 1142193240Ssam return DOMAIN_CODE_FCC; /* XXX? */ 1143193240Ssam} 1144193240Ssam 1145193240Ssamstatic int 1146193240Ssammwl_hal_reset(struct mwl_softc *sc) 1147193240Ssam{ 1148193240Ssam struct ifnet *ifp = sc->sc_ifp; 1149193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1150193240Ssam struct mwl_hal *mh = sc->sc_mh; 1151193240Ssam 1152193240Ssam mwl_hal_setantenna(mh, WL_ANTENNATYPE_RX, sc->sc_rxantenna); 1153193240Ssam mwl_hal_setantenna(mh, WL_ANTENNATYPE_TX, sc->sc_txantenna); 1154193240Ssam mwl_hal_setradio(mh, 1, WL_AUTO_PREAMBLE); 1155193240Ssam mwl_hal_setwmm(sc->sc_mh, (ic->ic_flags & IEEE80211_F_WME) != 0); 1156193240Ssam mwl_chan_set(sc, ic->ic_curchan); 1157195171Ssam /* NB: RF/RA performance tuned for indoor mode */ 1158195171Ssam mwl_hal_setrateadaptmode(mh, 0); 1159193240Ssam mwl_hal_setoptimizationlevel(mh, 1160193240Ssam (ic->ic_flags & IEEE80211_F_BURST) != 0); 1161193240Ssam 1162193240Ssam mwl_hal_setregioncode(mh, mwl_map2regioncode(&ic->ic_regdomain)); 1163193240Ssam 1164195171Ssam mwl_hal_setaggampduratemode(mh, 1, 80); /* XXX */ 1165195171Ssam mwl_hal_setcfend(mh, 0); /* XXX */ 1166195171Ssam 1167193240Ssam return 1; 1168193240Ssam} 1169193240Ssam 1170193240Ssamstatic int 1171193240Ssammwl_init_locked(struct mwl_softc *sc) 1172193240Ssam{ 1173193240Ssam struct ifnet *ifp = sc->sc_ifp; 1174193240Ssam struct mwl_hal *mh = sc->sc_mh; 1175193240Ssam int error = 0; 1176193240Ssam 1177193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n", 1178193240Ssam __func__, ifp->if_flags); 1179193240Ssam 1180193240Ssam MWL_LOCK_ASSERT(sc); 1181193240Ssam 1182193240Ssam /* 1183193240Ssam * Stop anything previously setup. This is safe 1184193240Ssam * whether this is the first time through or not. 1185193240Ssam */ 1186193240Ssam mwl_stop_locked(ifp, 0); 1187193240Ssam 1188193240Ssam /* 1189193240Ssam * Push vap-independent state to the firmware. 1190193240Ssam */ 1191193240Ssam if (!mwl_hal_reset(sc)) { 1192193240Ssam if_printf(ifp, "unable to reset hardware\n"); 1193193240Ssam return EIO; 1194193240Ssam } 1195193240Ssam 1196193240Ssam /* 1197193240Ssam * Setup recv (once); transmit is already good to go. 1198193240Ssam */ 1199193240Ssam error = mwl_startrecv(sc); 1200193240Ssam if (error != 0) { 1201193240Ssam if_printf(ifp, "unable to start recv logic\n"); 1202193240Ssam return error; 1203193240Ssam } 1204193240Ssam 1205193240Ssam /* 1206193240Ssam * Enable interrupts. 1207193240Ssam */ 1208193240Ssam sc->sc_imask = MACREG_A2HRIC_BIT_RX_RDY 1209193240Ssam | MACREG_A2HRIC_BIT_TX_DONE 1210193240Ssam | MACREG_A2HRIC_BIT_OPC_DONE 1211193240Ssam#if 0 1212193240Ssam | MACREG_A2HRIC_BIT_MAC_EVENT 1213193240Ssam#endif 1214193240Ssam | MACREG_A2HRIC_BIT_ICV_ERROR 1215193240Ssam | MACREG_A2HRIC_BIT_RADAR_DETECT 1216193240Ssam | MACREG_A2HRIC_BIT_CHAN_SWITCH 1217193240Ssam#if 0 1218193240Ssam | MACREG_A2HRIC_BIT_QUEUE_EMPTY 1219193240Ssam#endif 1220193240Ssam | MACREG_A2HRIC_BIT_BA_WATCHDOG 1221195171Ssam | MACREQ_A2HRIC_BIT_TX_ACK 1222193240Ssam ; 1223193240Ssam 1224193240Ssam ifp->if_drv_flags |= IFF_DRV_RUNNING; 1225193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 1226199559Sjhb callout_reset(&sc->sc_watchdog, hz, mwl_watchdog, sc); 1227193240Ssam 1228193240Ssam return 0; 1229193240Ssam} 1230193240Ssam 1231193240Ssamstatic void 1232193240Ssammwl_init(void *arg) 1233193240Ssam{ 1234193240Ssam struct mwl_softc *sc = arg; 1235193240Ssam struct ifnet *ifp = sc->sc_ifp; 1236193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1237193240Ssam int error = 0; 1238193240Ssam 1239193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n", 1240193240Ssam __func__, ifp->if_flags); 1241193240Ssam 1242193240Ssam MWL_LOCK(sc); 1243193240Ssam error = mwl_init_locked(sc); 1244193240Ssam MWL_UNLOCK(sc); 1245193240Ssam 1246193240Ssam if (error == 0) 1247193240Ssam ieee80211_start_all(ic); /* start all vap's */ 1248193240Ssam} 1249193240Ssam 1250193240Ssamstatic void 1251193240Ssammwl_stop_locked(struct ifnet *ifp, int disable) 1252193240Ssam{ 1253193240Ssam struct mwl_softc *sc = ifp->if_softc; 1254193240Ssam 1255193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1256193240Ssam __func__, sc->sc_invalid, ifp->if_flags); 1257193240Ssam 1258193240Ssam MWL_LOCK_ASSERT(sc); 1259193240Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1260193240Ssam /* 1261193240Ssam * Shutdown the hardware and driver. 1262193240Ssam */ 1263193240Ssam ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1264199559Sjhb callout_stop(&sc->sc_watchdog); 1265199559Sjhb sc->sc_tx_timer = 0; 1266193240Ssam mwl_draintxq(sc); 1267193240Ssam } 1268193240Ssam} 1269193240Ssam 1270193240Ssamstatic void 1271193240Ssammwl_stop(struct ifnet *ifp, int disable) 1272193240Ssam{ 1273193240Ssam struct mwl_softc *sc = ifp->if_softc; 1274193240Ssam 1275193240Ssam MWL_LOCK(sc); 1276193240Ssam mwl_stop_locked(ifp, disable); 1277193240Ssam MWL_UNLOCK(sc); 1278193240Ssam} 1279193240Ssam 1280193240Ssamstatic int 1281193240Ssammwl_reset_vap(struct ieee80211vap *vap, int state) 1282193240Ssam{ 1283193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1284193240Ssam struct ieee80211com *ic = vap->iv_ic; 1285193240Ssam 1286193240Ssam if (state == IEEE80211_S_RUN) 1287193240Ssam mwl_setrates(vap); 1288193240Ssam /* XXX off by 1? */ 1289193240Ssam mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold); 1290193240Ssam /* XXX auto? 20/40 split? */ 1291193656Ssam mwl_hal_sethtgi(hvap, (vap->iv_flags_ht & 1292193656Ssam (IEEE80211_FHT_SHORTGI20|IEEE80211_FHT_SHORTGI40)) ? 1 : 0); 1293193240Ssam mwl_hal_setnprot(hvap, ic->ic_htprotmode == IEEE80211_PROT_NONE ? 1294193240Ssam HTPROTECT_NONE : HTPROTECT_AUTO); 1295193240Ssam /* XXX txpower cap */ 1296193240Ssam 1297193240Ssam /* re-setup beacons */ 1298193240Ssam if (state == IEEE80211_S_RUN && 1299193240Ssam (vap->iv_opmode == IEEE80211_M_HOSTAP || 1300195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS || 1301193240Ssam vap->iv_opmode == IEEE80211_M_IBSS)) { 1302193240Ssam mwl_setapmode(vap, vap->iv_bss->ni_chan); 1303193240Ssam mwl_hal_setnprotmode(hvap, 1304193240Ssam MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE)); 1305193240Ssam return mwl_beacon_setup(vap); 1306193240Ssam } 1307193240Ssam return 0; 1308193240Ssam} 1309193240Ssam 1310193240Ssam/* 1311193240Ssam * Reset the hardware w/o losing operational state. 1312193240Ssam * Used to to reset or reload hardware state for a vap. 1313193240Ssam */ 1314193240Ssamstatic int 1315193240Ssammwl_reset(struct ieee80211vap *vap, u_long cmd) 1316193240Ssam{ 1317193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1318193240Ssam int error = 0; 1319193240Ssam 1320193240Ssam if (hvap != NULL) { /* WDS, MONITOR, etc. */ 1321193240Ssam struct ieee80211com *ic = vap->iv_ic; 1322193240Ssam struct ifnet *ifp = ic->ic_ifp; 1323193240Ssam struct mwl_softc *sc = ifp->if_softc; 1324193240Ssam struct mwl_hal *mh = sc->sc_mh; 1325193240Ssam 1326195171Ssam /* XXX handle DWDS sta vap change */ 1327193240Ssam /* XXX do we need to disable interrupts? */ 1328193240Ssam mwl_hal_intrset(mh, 0); /* disable interrupts */ 1329193240Ssam error = mwl_reset_vap(vap, vap->iv_state); 1330193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 1331193240Ssam } 1332193240Ssam return error; 1333193240Ssam} 1334193240Ssam 1335193240Ssam/* 1336193240Ssam * Allocate a tx buffer for sending a frame. The 1337193240Ssam * packet is assumed to have the WME AC stored so 1338193240Ssam * we can use it to select the appropriate h/w queue. 1339193240Ssam */ 1340193240Ssamstatic struct mwl_txbuf * 1341193240Ssammwl_gettxbuf(struct mwl_softc *sc, struct mwl_txq *txq) 1342193240Ssam{ 1343193240Ssam struct mwl_txbuf *bf; 1344193240Ssam 1345193240Ssam /* 1346193240Ssam * Grab a TX buffer and associated resources. 1347193240Ssam */ 1348193240Ssam MWL_TXQ_LOCK(txq); 1349193240Ssam bf = STAILQ_FIRST(&txq->free); 1350193240Ssam if (bf != NULL) { 1351193240Ssam STAILQ_REMOVE_HEAD(&txq->free, bf_list); 1352193240Ssam txq->nfree--; 1353193240Ssam } 1354193240Ssam MWL_TXQ_UNLOCK(txq); 1355193240Ssam if (bf == NULL) 1356193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, 1357193240Ssam "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 1358193240Ssam return bf; 1359193240Ssam} 1360193240Ssam 1361193240Ssam/* 1362193240Ssam * Return a tx buffer to the queue it came from. Note there 1363193240Ssam * are two cases because we must preserve the order of buffers 1364193240Ssam * as it reflects the fixed order of descriptors in memory 1365193240Ssam * (the firmware pre-fetches descriptors so we cannot reorder). 1366193240Ssam */ 1367193240Ssamstatic void 1368193240Ssammwl_puttxbuf_head(struct mwl_txq *txq, struct mwl_txbuf *bf) 1369193240Ssam{ 1370193240Ssam bf->bf_m = NULL; 1371193240Ssam bf->bf_node = NULL; 1372193240Ssam MWL_TXQ_LOCK(txq); 1373193240Ssam STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1374193240Ssam txq->nfree++; 1375193240Ssam MWL_TXQ_UNLOCK(txq); 1376193240Ssam} 1377193240Ssam 1378193240Ssamstatic void 1379193240Ssammwl_puttxbuf_tail(struct mwl_txq *txq, struct mwl_txbuf *bf) 1380193240Ssam{ 1381193240Ssam bf->bf_m = NULL; 1382193240Ssam bf->bf_node = NULL; 1383193240Ssam MWL_TXQ_LOCK(txq); 1384193240Ssam STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1385193240Ssam txq->nfree++; 1386193240Ssam MWL_TXQ_UNLOCK(txq); 1387193240Ssam} 1388193240Ssam 1389193240Ssamstatic void 1390193240Ssammwl_start(struct ifnet *ifp) 1391193240Ssam{ 1392193240Ssam struct mwl_softc *sc = ifp->if_softc; 1393193240Ssam struct ieee80211_node *ni; 1394193240Ssam struct mwl_txbuf *bf; 1395193240Ssam struct mbuf *m; 1396193240Ssam struct mwl_txq *txq = NULL; /* XXX silence gcc */ 1397193240Ssam int nqueued; 1398193240Ssam 1399193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) 1400193240Ssam return; 1401193240Ssam nqueued = 0; 1402193240Ssam for (;;) { 1403193240Ssam bf = NULL; 1404193240Ssam IFQ_DEQUEUE(&ifp->if_snd, m); 1405193240Ssam if (m == NULL) 1406193240Ssam break; 1407193240Ssam /* 1408193240Ssam * Grab the node for the destination. 1409193240Ssam */ 1410193240Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1411193240Ssam KASSERT(ni != NULL, ("no node")); 1412193240Ssam m->m_pkthdr.rcvif = NULL; /* committed, clear ref */ 1413193240Ssam /* 1414193240Ssam * Grab a TX buffer and associated resources. 1415193240Ssam * We honor the classification by the 802.11 layer. 1416193240Ssam */ 1417193240Ssam txq = sc->sc_ac2q[M_WME_GETAC(m)]; 1418193240Ssam bf = mwl_gettxbuf(sc, txq); 1419193240Ssam if (bf == NULL) { 1420193240Ssam m_freem(m); 1421193240Ssam ieee80211_free_node(ni); 1422193240Ssam#ifdef MWL_TX_NODROP 1423193240Ssam sc->sc_stats.mst_tx_qstop++; 1424193240Ssam /* XXX blocks other traffic */ 1425193240Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1426193240Ssam break; 1427193240Ssam#else 1428193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, 1429193240Ssam "%s: tail drop on q %d\n", __func__, txq->qnum); 1430193240Ssam sc->sc_stats.mst_tx_qdrop++; 1431193240Ssam continue; 1432193240Ssam#endif /* MWL_TX_NODROP */ 1433193240Ssam } 1434193240Ssam 1435193240Ssam /* 1436193240Ssam * Pass the frame to the h/w for transmission. 1437193240Ssam */ 1438193240Ssam if (mwl_tx_start(sc, ni, bf, m)) { 1439271810Sglebius if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1440193240Ssam mwl_puttxbuf_head(txq, bf); 1441193240Ssam ieee80211_free_node(ni); 1442193240Ssam continue; 1443193240Ssam } 1444193240Ssam nqueued++; 1445193240Ssam if (nqueued >= mwl_txcoalesce) { 1446193240Ssam /* 1447193240Ssam * Poke the firmware to process queued frames; 1448193240Ssam * see below about (lack of) locking. 1449193240Ssam */ 1450193240Ssam nqueued = 0; 1451193240Ssam mwl_hal_txstart(sc->sc_mh, 0/*XXX*/); 1452193240Ssam } 1453193240Ssam } 1454193240Ssam if (nqueued) { 1455193240Ssam /* 1456193240Ssam * NB: We don't need to lock against tx done because 1457193240Ssam * this just prods the firmware to check the transmit 1458193240Ssam * descriptors. The firmware will also start fetching 1459193240Ssam * descriptors by itself if it notices new ones are 1460193240Ssam * present when it goes to deliver a tx done interrupt 1461193240Ssam * to the host. So if we race with tx done processing 1462193240Ssam * it's ok. Delivering the kick here rather than in 1463193240Ssam * mwl_tx_start is an optimization to avoid poking the 1464193240Ssam * firmware for each packet. 1465193240Ssam * 1466193240Ssam * NB: the queue id isn't used so 0 is ok. 1467193240Ssam */ 1468193240Ssam mwl_hal_txstart(sc->sc_mh, 0/*XXX*/); 1469193240Ssam } 1470193240Ssam} 1471193240Ssam 1472193240Ssamstatic int 1473193240Ssammwl_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1474193240Ssam const struct ieee80211_bpf_params *params) 1475193240Ssam{ 1476193240Ssam struct ieee80211com *ic = ni->ni_ic; 1477193240Ssam struct ifnet *ifp = ic->ic_ifp; 1478193240Ssam struct mwl_softc *sc = ifp->if_softc; 1479193240Ssam struct mwl_txbuf *bf; 1480193240Ssam struct mwl_txq *txq; 1481193240Ssam 1482193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) { 1483193240Ssam ieee80211_free_node(ni); 1484193240Ssam m_freem(m); 1485193240Ssam return ENETDOWN; 1486193240Ssam } 1487193240Ssam /* 1488193240Ssam * Grab a TX buffer and associated resources. 1489193240Ssam * Note that we depend on the classification 1490193240Ssam * by the 802.11 layer to get to the right h/w 1491193240Ssam * queue. Management frames must ALWAYS go on 1492193240Ssam * queue 1 but we cannot just force that here 1493193240Ssam * because we may receive non-mgt frames. 1494193240Ssam */ 1495193240Ssam txq = sc->sc_ac2q[M_WME_GETAC(m)]; 1496193240Ssam bf = mwl_gettxbuf(sc, txq); 1497193240Ssam if (bf == NULL) { 1498193240Ssam sc->sc_stats.mst_tx_qstop++; 1499193240Ssam /* XXX blocks other traffic */ 1500193240Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1501193240Ssam ieee80211_free_node(ni); 1502193240Ssam m_freem(m); 1503193240Ssam return ENOBUFS; 1504193240Ssam } 1505193240Ssam /* 1506193240Ssam * Pass the frame to the h/w for transmission. 1507193240Ssam */ 1508193240Ssam if (mwl_tx_start(sc, ni, bf, m)) { 1509271810Sglebius if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1510193240Ssam mwl_puttxbuf_head(txq, bf); 1511193240Ssam 1512193240Ssam ieee80211_free_node(ni); 1513193240Ssam return EIO; /* XXX */ 1514193240Ssam } 1515193240Ssam /* 1516193240Ssam * NB: We don't need to lock against tx done because 1517193240Ssam * this just prods the firmware to check the transmit 1518193240Ssam * descriptors. The firmware will also start fetching 1519193240Ssam * descriptors by itself if it notices new ones are 1520193240Ssam * present when it goes to deliver a tx done interrupt 1521193240Ssam * to the host. So if we race with tx done processing 1522193240Ssam * it's ok. Delivering the kick here rather than in 1523193240Ssam * mwl_tx_start is an optimization to avoid poking the 1524193240Ssam * firmware for each packet. 1525193240Ssam * 1526193240Ssam * NB: the queue id isn't used so 0 is ok. 1527193240Ssam */ 1528193240Ssam mwl_hal_txstart(sc->sc_mh, 0/*XXX*/); 1529193240Ssam return 0; 1530193240Ssam} 1531193240Ssam 1532193240Ssamstatic int 1533193240Ssammwl_media_change(struct ifnet *ifp) 1534193240Ssam{ 1535193240Ssam struct ieee80211vap *vap = ifp->if_softc; 1536193240Ssam int error; 1537193240Ssam 1538193240Ssam error = ieee80211_media_change(ifp); 1539193240Ssam /* NB: only the fixed rate can change and that doesn't need a reset */ 1540193240Ssam if (error == ENETRESET) { 1541193240Ssam mwl_setrates(vap); 1542193240Ssam error = 0; 1543193240Ssam } 1544193240Ssam return error; 1545193240Ssam} 1546193240Ssam 1547193240Ssam#ifdef MWL_DEBUG 1548193240Ssamstatic void 1549193240Ssammwl_keyprint(struct mwl_softc *sc, const char *tag, 1550193240Ssam const MWL_HAL_KEYVAL *hk, const uint8_t mac[IEEE80211_ADDR_LEN]) 1551193240Ssam{ 1552193240Ssam static const char *ciphers[] = { 1553193240Ssam "WEP", 1554193240Ssam "TKIP", 1555193240Ssam "AES-CCM", 1556193240Ssam }; 1557193240Ssam int i, n; 1558193240Ssam 1559193240Ssam printf("%s: [%u] %-7s", tag, hk->keyIndex, ciphers[hk->keyTypeId]); 1560193240Ssam for (i = 0, n = hk->keyLen; i < n; i++) 1561193240Ssam printf(" %02x", hk->key.aes[i]); 1562193240Ssam printf(" mac %s", ether_sprintf(mac)); 1563193240Ssam if (hk->keyTypeId == KEY_TYPE_ID_TKIP) { 1564193240Ssam printf(" %s", "rxmic"); 1565193240Ssam for (i = 0; i < sizeof(hk->key.tkip.rxMic); i++) 1566193240Ssam printf(" %02x", hk->key.tkip.rxMic[i]); 1567193240Ssam printf(" txmic"); 1568193240Ssam for (i = 0; i < sizeof(hk->key.tkip.txMic); i++) 1569193240Ssam printf(" %02x", hk->key.tkip.txMic[i]); 1570193240Ssam } 1571193240Ssam printf(" flags 0x%x\n", hk->keyFlags); 1572193240Ssam} 1573193240Ssam#endif 1574193240Ssam 1575193240Ssam/* 1576193240Ssam * Allocate a key cache slot for a unicast key. The 1577193240Ssam * firmware handles key allocation and every station is 1578193240Ssam * guaranteed key space so we are always successful. 1579193240Ssam */ 1580193240Ssamstatic int 1581193240Ssammwl_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 1582193240Ssam ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 1583193240Ssam{ 1584193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 1585193240Ssam 1586193240Ssam if (k->wk_keyix != IEEE80211_KEYIX_NONE || 1587193240Ssam (k->wk_flags & IEEE80211_KEY_GROUP)) { 1588193240Ssam if (!(&vap->iv_nw_keys[0] <= k && 1589193240Ssam k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 1590193240Ssam /* should not happen */ 1591193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, 1592193240Ssam "%s: bogus group key\n", __func__); 1593193240Ssam return 0; 1594193240Ssam } 1595193240Ssam /* give the caller what they requested */ 1596193240Ssam *keyix = *rxkeyix = k - vap->iv_nw_keys; 1597193240Ssam } else { 1598193240Ssam /* 1599193240Ssam * Firmware handles key allocation. 1600193240Ssam */ 1601193240Ssam *keyix = *rxkeyix = 0; 1602193240Ssam } 1603193240Ssam return 1; 1604193240Ssam} 1605193240Ssam 1606193240Ssam/* 1607193240Ssam * Delete a key entry allocated by mwl_key_alloc. 1608193240Ssam */ 1609193240Ssamstatic int 1610193240Ssammwl_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 1611193240Ssam{ 1612193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 1613193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1614193240Ssam MWL_HAL_KEYVAL hk; 1615193240Ssam const uint8_t bcastaddr[IEEE80211_ADDR_LEN] = 1616193240Ssam { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 1617193240Ssam 1618193240Ssam if (hvap == NULL) { 1619193240Ssam if (vap->iv_opmode != IEEE80211_M_WDS) { 1620193240Ssam /* XXX monitor mode? */ 1621193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, 1622193240Ssam "%s: no hvap for opmode %d\n", __func__, 1623193240Ssam vap->iv_opmode); 1624193240Ssam return 0; 1625193240Ssam } 1626193240Ssam hvap = MWL_VAP(vap)->mv_ap_hvap; 1627193240Ssam } 1628193240Ssam 1629193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: delete key %u\n", 1630193240Ssam __func__, k->wk_keyix); 1631193240Ssam 1632193240Ssam memset(&hk, 0, sizeof(hk)); 1633193240Ssam hk.keyIndex = k->wk_keyix; 1634193240Ssam switch (k->wk_cipher->ic_cipher) { 1635193240Ssam case IEEE80211_CIPHER_WEP: 1636193240Ssam hk.keyTypeId = KEY_TYPE_ID_WEP; 1637193240Ssam break; 1638193240Ssam case IEEE80211_CIPHER_TKIP: 1639193240Ssam hk.keyTypeId = KEY_TYPE_ID_TKIP; 1640193240Ssam break; 1641193240Ssam case IEEE80211_CIPHER_AES_CCM: 1642193240Ssam hk.keyTypeId = KEY_TYPE_ID_AES; 1643193240Ssam break; 1644193240Ssam default: 1645193240Ssam /* XXX should not happen */ 1646193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n", 1647193240Ssam __func__, k->wk_cipher->ic_cipher); 1648193240Ssam return 0; 1649193240Ssam } 1650193240Ssam return (mwl_hal_keyreset(hvap, &hk, bcastaddr) == 0); /*XXX*/ 1651193240Ssam} 1652193240Ssam 1653193240Ssamstatic __inline int 1654193240Ssamaddgroupflags(MWL_HAL_KEYVAL *hk, const struct ieee80211_key *k) 1655193240Ssam{ 1656193240Ssam if (k->wk_flags & IEEE80211_KEY_GROUP) { 1657193240Ssam if (k->wk_flags & IEEE80211_KEY_XMIT) 1658193240Ssam hk->keyFlags |= KEY_FLAG_TXGROUPKEY; 1659193240Ssam if (k->wk_flags & IEEE80211_KEY_RECV) 1660193240Ssam hk->keyFlags |= KEY_FLAG_RXGROUPKEY; 1661193240Ssam return 1; 1662193240Ssam } else 1663193240Ssam return 0; 1664193240Ssam} 1665193240Ssam 1666193240Ssam/* 1667193240Ssam * Set the key cache contents for the specified key. Key cache 1668193240Ssam * slot(s) must already have been allocated by mwl_key_alloc. 1669193240Ssam */ 1670193240Ssamstatic int 1671193240Ssammwl_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k, 1672193240Ssam const uint8_t mac[IEEE80211_ADDR_LEN]) 1673193240Ssam{ 1674193240Ssam#define GRPXMIT (IEEE80211_KEY_XMIT | IEEE80211_KEY_GROUP) 1675193240Ssam/* NB: static wep keys are marked GROUP+tx/rx; GTK will be tx or rx */ 1676193240Ssam#define IEEE80211_IS_STATICKEY(k) \ 1677193240Ssam (((k)->wk_flags & (GRPXMIT|IEEE80211_KEY_RECV)) == \ 1678193240Ssam (GRPXMIT|IEEE80211_KEY_RECV)) 1679193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 1680193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1681193240Ssam const struct ieee80211_cipher *cip = k->wk_cipher; 1682193240Ssam const uint8_t *macaddr; 1683193240Ssam MWL_HAL_KEYVAL hk; 1684193240Ssam 1685193240Ssam KASSERT((k->wk_flags & IEEE80211_KEY_SWCRYPT) == 0, 1686193240Ssam ("s/w crypto set?")); 1687193240Ssam 1688193240Ssam if (hvap == NULL) { 1689193240Ssam if (vap->iv_opmode != IEEE80211_M_WDS) { 1690193240Ssam /* XXX monitor mode? */ 1691193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, 1692193240Ssam "%s: no hvap for opmode %d\n", __func__, 1693193240Ssam vap->iv_opmode); 1694193240Ssam return 0; 1695193240Ssam } 1696193240Ssam hvap = MWL_VAP(vap)->mv_ap_hvap; 1697193240Ssam } 1698193240Ssam memset(&hk, 0, sizeof(hk)); 1699193240Ssam hk.keyIndex = k->wk_keyix; 1700193240Ssam switch (cip->ic_cipher) { 1701193240Ssam case IEEE80211_CIPHER_WEP: 1702193240Ssam hk.keyTypeId = KEY_TYPE_ID_WEP; 1703193240Ssam hk.keyLen = k->wk_keylen; 1704193240Ssam if (k->wk_keyix == vap->iv_def_txkey) 1705193240Ssam hk.keyFlags = KEY_FLAG_WEP_TXKEY; 1706193240Ssam if (!IEEE80211_IS_STATICKEY(k)) { 1707193240Ssam /* NB: WEP is never used for the PTK */ 1708193240Ssam (void) addgroupflags(&hk, k); 1709193240Ssam } 1710193240Ssam break; 1711193240Ssam case IEEE80211_CIPHER_TKIP: 1712193240Ssam hk.keyTypeId = KEY_TYPE_ID_TKIP; 1713193240Ssam hk.key.tkip.tsc.high = (uint32_t)(k->wk_keytsc >> 16); 1714193240Ssam hk.key.tkip.tsc.low = (uint16_t)k->wk_keytsc; 1715193240Ssam hk.keyFlags = KEY_FLAG_TSC_VALID | KEY_FLAG_MICKEY_VALID; 1716193240Ssam hk.keyLen = k->wk_keylen + IEEE80211_MICBUF_SIZE; 1717193240Ssam if (!addgroupflags(&hk, k)) 1718193240Ssam hk.keyFlags |= KEY_FLAG_PAIRWISE; 1719193240Ssam break; 1720193240Ssam case IEEE80211_CIPHER_AES_CCM: 1721193240Ssam hk.keyTypeId = KEY_TYPE_ID_AES; 1722193240Ssam hk.keyLen = k->wk_keylen; 1723193240Ssam if (!addgroupflags(&hk, k)) 1724193240Ssam hk.keyFlags |= KEY_FLAG_PAIRWISE; 1725193240Ssam break; 1726193240Ssam default: 1727193240Ssam /* XXX should not happen */ 1728193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n", 1729193240Ssam __func__, k->wk_cipher->ic_cipher); 1730193240Ssam return 0; 1731193240Ssam } 1732193240Ssam /* 1733193240Ssam * NB: tkip mic keys get copied here too; the layout 1734193240Ssam * just happens to match that in ieee80211_key. 1735193240Ssam */ 1736193240Ssam memcpy(hk.key.aes, k->wk_key, hk.keyLen); 1737193240Ssam 1738193240Ssam /* 1739193240Ssam * Locate address of sta db entry for writing key; 1740193240Ssam * the convention unfortunately is somewhat different 1741193240Ssam * than how net80211, hostapd, and wpa_supplicant think. 1742193240Ssam */ 1743193240Ssam if (vap->iv_opmode == IEEE80211_M_STA) { 1744193240Ssam /* 1745193240Ssam * NB: keys plumbed before the sta reaches AUTH state 1746193240Ssam * will be discarded or written to the wrong sta db 1747193240Ssam * entry because iv_bss is meaningless. This is ok 1748193240Ssam * (right now) because we handle deferred plumbing of 1749193240Ssam * WEP keys when the sta reaches AUTH state. 1750193240Ssam */ 1751193240Ssam macaddr = vap->iv_bss->ni_bssid; 1752196842Ssam if ((k->wk_flags & IEEE80211_KEY_GROUP) == 0) { 1753196842Ssam /* XXX plumb to local sta db too for static key wep */ 1754196842Ssam mwl_hal_keyset(hvap, &hk, vap->iv_myaddr); 1755196842Ssam } 1756193240Ssam } else if (vap->iv_opmode == IEEE80211_M_WDS && 1757193240Ssam vap->iv_state != IEEE80211_S_RUN) { 1758193240Ssam /* 1759193240Ssam * Prior to RUN state a WDS vap will not it's BSS node 1760193240Ssam * setup so we will plumb the key to the wrong mac 1761193240Ssam * address (it'll be our local address). Workaround 1762193240Ssam * this for the moment by grabbing the correct address. 1763193240Ssam */ 1764193240Ssam macaddr = vap->iv_des_bssid; 1765193240Ssam } else if ((k->wk_flags & GRPXMIT) == GRPXMIT) 1766193240Ssam macaddr = vap->iv_myaddr; 1767193240Ssam else 1768193240Ssam macaddr = mac; 1769193240Ssam KEYPRINTF(sc, &hk, macaddr); 1770193240Ssam return (mwl_hal_keyset(hvap, &hk, macaddr) == 0); 1771193240Ssam#undef IEEE80211_IS_STATICKEY 1772193240Ssam#undef GRPXMIT 1773193240Ssam} 1774193240Ssam 1775193240Ssam/* unaligned little endian access */ 1776193240Ssam#define LE_READ_2(p) \ 1777193240Ssam ((uint16_t) \ 1778193240Ssam ((((const uint8_t *)(p))[0] ) | \ 1779193240Ssam (((const uint8_t *)(p))[1] << 8))) 1780193240Ssam#define LE_READ_4(p) \ 1781193240Ssam ((uint32_t) \ 1782193240Ssam ((((const uint8_t *)(p))[0] ) | \ 1783193240Ssam (((const uint8_t *)(p))[1] << 8) | \ 1784193240Ssam (((const uint8_t *)(p))[2] << 16) | \ 1785193240Ssam (((const uint8_t *)(p))[3] << 24))) 1786193240Ssam 1787193240Ssam/* 1788193240Ssam * Set the multicast filter contents into the hardware. 1789193240Ssam * XXX f/w has no support; just defer to the os. 1790193240Ssam */ 1791193240Ssamstatic void 1792193240Ssammwl_setmcastfilter(struct mwl_softc *sc) 1793193240Ssam{ 1794193240Ssam struct ifnet *ifp = sc->sc_ifp; 1795193240Ssam#if 0 1796193240Ssam struct ether_multi *enm; 1797193240Ssam struct ether_multistep estep; 1798193240Ssam uint8_t macs[IEEE80211_ADDR_LEN*MWL_HAL_MCAST_MAX];/* XXX stack use */ 1799193240Ssam uint8_t *mp; 1800193240Ssam int nmc; 1801193240Ssam 1802193240Ssam mp = macs; 1803193240Ssam nmc = 0; 1804193240Ssam ETHER_FIRST_MULTI(estep, &sc->sc_ec, enm); 1805193240Ssam while (enm != NULL) { 1806193240Ssam /* XXX Punt on ranges. */ 1807193240Ssam if (nmc == MWL_HAL_MCAST_MAX || 1808193240Ssam !IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1809193240Ssam ifp->if_flags |= IFF_ALLMULTI; 1810193240Ssam return; 1811193240Ssam } 1812193240Ssam IEEE80211_ADDR_COPY(mp, enm->enm_addrlo); 1813193240Ssam mp += IEEE80211_ADDR_LEN, nmc++; 1814193240Ssam ETHER_NEXT_MULTI(estep, enm); 1815193240Ssam } 1816193240Ssam ifp->if_flags &= ~IFF_ALLMULTI; 1817193240Ssam mwl_hal_setmcast(sc->sc_mh, nmc, macs); 1818193240Ssam#else 1819193240Ssam /* XXX no mcast filter support; we get everything */ 1820193240Ssam ifp->if_flags |= IFF_ALLMULTI; 1821193240Ssam#endif 1822193240Ssam} 1823193240Ssam 1824193240Ssamstatic int 1825193240Ssammwl_mode_init(struct mwl_softc *sc) 1826193240Ssam{ 1827193240Ssam struct ifnet *ifp = sc->sc_ifp; 1828193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1829193240Ssam struct mwl_hal *mh = sc->sc_mh; 1830193240Ssam 1831193240Ssam /* 1832193240Ssam * NB: Ignore promisc in hostap mode; it's set by the 1833193240Ssam * bridge. This is wrong but we have no way to 1834193240Ssam * identify internal requests (from the bridge) 1835193240Ssam * versus external requests such as for tcpdump. 1836193240Ssam */ 1837193240Ssam mwl_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1838193240Ssam ic->ic_opmode != IEEE80211_M_HOSTAP); 1839193240Ssam mwl_setmcastfilter(sc); 1840193240Ssam 1841193240Ssam return 0; 1842193240Ssam} 1843193240Ssam 1844193240Ssam/* 1845193240Ssam * Callback from the 802.11 layer after a multicast state change. 1846193240Ssam */ 1847193240Ssamstatic void 1848193240Ssammwl_update_mcast(struct ifnet *ifp) 1849193240Ssam{ 1850193240Ssam struct mwl_softc *sc = ifp->if_softc; 1851193240Ssam 1852193240Ssam mwl_setmcastfilter(sc); 1853193240Ssam} 1854193240Ssam 1855193240Ssam/* 1856193240Ssam * Callback from the 802.11 layer after a promiscuous mode change. 1857193240Ssam * Note this interface does not check the operating mode as this 1858193240Ssam * is an internal callback and we are expected to honor the current 1859193240Ssam * state (e.g. this is used for setting the interface in promiscuous 1860193240Ssam * mode when operating in hostap mode to do ACS). 1861193240Ssam */ 1862193240Ssamstatic void 1863193240Ssammwl_update_promisc(struct ifnet *ifp) 1864193240Ssam{ 1865193240Ssam struct mwl_softc *sc = ifp->if_softc; 1866193240Ssam 1867193240Ssam mwl_hal_setpromisc(sc->sc_mh, (ifp->if_flags & IFF_PROMISC) != 0); 1868193240Ssam} 1869193240Ssam 1870193240Ssam/* 1871193240Ssam * Callback from the 802.11 layer to update the slot time 1872193240Ssam * based on the current setting. We use it to notify the 1873193240Ssam * firmware of ERP changes and the f/w takes care of things 1874193240Ssam * like slot time and preamble. 1875193240Ssam */ 1876193240Ssamstatic void 1877193240Ssammwl_updateslot(struct ifnet *ifp) 1878193240Ssam{ 1879193240Ssam struct mwl_softc *sc = ifp->if_softc; 1880193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1881193240Ssam struct mwl_hal *mh = sc->sc_mh; 1882193240Ssam int prot; 1883193240Ssam 1884193240Ssam /* NB: can be called early; suppress needless cmds */ 1885193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1886193240Ssam return; 1887193240Ssam 1888193240Ssam /* 1889193240Ssam * Calculate the ERP flags. The firwmare will use 1890193240Ssam * this to carry out the appropriate measures. 1891193240Ssam */ 1892193240Ssam prot = 0; 1893193240Ssam if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 1894193240Ssam if ((ic->ic_flags & IEEE80211_F_SHSLOT) == 0) 1895193240Ssam prot |= IEEE80211_ERP_NON_ERP_PRESENT; 1896193240Ssam if (ic->ic_flags & IEEE80211_F_USEPROT) 1897193240Ssam prot |= IEEE80211_ERP_USE_PROTECTION; 1898193240Ssam if (ic->ic_flags & IEEE80211_F_USEBARKER) 1899193240Ssam prot |= IEEE80211_ERP_LONG_PREAMBLE; 1900193240Ssam } 1901193240Ssam 1902193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, 1903193240Ssam "%s: chan %u MHz/flags 0x%x %s slot, (prot 0x%x ic_flags 0x%x)\n", 1904193240Ssam __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1905193240Ssam ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", prot, 1906193240Ssam ic->ic_flags); 1907193240Ssam 1908193240Ssam mwl_hal_setgprot(mh, prot); 1909193240Ssam} 1910193240Ssam 1911193240Ssam/* 1912193240Ssam * Setup the beacon frame. 1913193240Ssam */ 1914193240Ssamstatic int 1915193240Ssammwl_beacon_setup(struct ieee80211vap *vap) 1916193240Ssam{ 1917193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1918193240Ssam struct ieee80211_node *ni = vap->iv_bss; 1919193240Ssam struct ieee80211_beacon_offsets bo; 1920193240Ssam struct mbuf *m; 1921193240Ssam 1922193240Ssam m = ieee80211_beacon_alloc(ni, &bo); 1923193240Ssam if (m == NULL) 1924193240Ssam return ENOBUFS; 1925193240Ssam mwl_hal_setbeacon(hvap, mtod(m, const void *), m->m_len); 1926193240Ssam m_free(m); 1927193240Ssam 1928193240Ssam return 0; 1929193240Ssam} 1930193240Ssam 1931193240Ssam/* 1932193240Ssam * Update the beacon frame in response to a change. 1933193240Ssam */ 1934193240Ssamstatic void 1935193240Ssammwl_beacon_update(struct ieee80211vap *vap, int item) 1936193240Ssam{ 1937193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1938193240Ssam struct ieee80211com *ic = vap->iv_ic; 1939193240Ssam 1940193240Ssam KASSERT(hvap != NULL, ("no beacon")); 1941193240Ssam switch (item) { 1942193240Ssam case IEEE80211_BEACON_ERP: 1943193240Ssam mwl_updateslot(ic->ic_ifp); 1944193240Ssam break; 1945193240Ssam case IEEE80211_BEACON_HTINFO: 1946193240Ssam mwl_hal_setnprotmode(hvap, 1947193240Ssam MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE)); 1948193240Ssam break; 1949193240Ssam case IEEE80211_BEACON_CAPS: 1950193240Ssam case IEEE80211_BEACON_WME: 1951193240Ssam case IEEE80211_BEACON_APPIE: 1952193240Ssam case IEEE80211_BEACON_CSA: 1953193240Ssam break; 1954193240Ssam case IEEE80211_BEACON_TIM: 1955193240Ssam /* NB: firmware always forms TIM */ 1956193240Ssam return; 1957193240Ssam } 1958193240Ssam /* XXX retain beacon frame and update */ 1959193240Ssam mwl_beacon_setup(vap); 1960193240Ssam} 1961193240Ssam 1962193240Ssamstatic void 1963193240Ssammwl_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1964193240Ssam{ 1965193240Ssam bus_addr_t *paddr = (bus_addr_t*) arg; 1966193240Ssam KASSERT(error == 0, ("error %u on bus_dma callback", error)); 1967193240Ssam *paddr = segs->ds_addr; 1968193240Ssam} 1969193240Ssam 1970193240Ssam#ifdef MWL_HOST_PS_SUPPORT 1971193240Ssam/* 1972193240Ssam * Handle power save station occupancy changes. 1973193240Ssam */ 1974193240Ssamstatic void 1975193240Ssammwl_update_ps(struct ieee80211vap *vap, int nsta) 1976193240Ssam{ 1977193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1978193240Ssam 1979193240Ssam if (nsta == 0 || mvp->mv_last_ps_sta == 0) 1980193240Ssam mwl_hal_setpowersave_bss(mvp->mv_hvap, nsta); 1981193240Ssam mvp->mv_last_ps_sta = nsta; 1982193240Ssam} 1983193240Ssam 1984193240Ssam/* 1985193240Ssam * Handle associated station power save state changes. 1986193240Ssam */ 1987193240Ssamstatic int 1988193240Ssammwl_set_tim(struct ieee80211_node *ni, int set) 1989193240Ssam{ 1990193240Ssam struct ieee80211vap *vap = ni->ni_vap; 1991193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1992193240Ssam 1993193240Ssam if (mvp->mv_set_tim(ni, set)) { /* NB: state change */ 1994193240Ssam mwl_hal_setpowersave_sta(mvp->mv_hvap, 1995193240Ssam IEEE80211_AID(ni->ni_associd), set); 1996193240Ssam return 1; 1997193240Ssam } else 1998193240Ssam return 0; 1999193240Ssam} 2000193240Ssam#endif /* MWL_HOST_PS_SUPPORT */ 2001193240Ssam 2002193240Ssamstatic int 2003193240Ssammwl_desc_setup(struct mwl_softc *sc, const char *name, 2004193240Ssam struct mwl_descdma *dd, 2005193240Ssam int nbuf, size_t bufsize, int ndesc, size_t descsize) 2006193240Ssam{ 2007193240Ssam struct ifnet *ifp = sc->sc_ifp; 2008193240Ssam uint8_t *ds; 2009193240Ssam int error; 2010193240Ssam 2011193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, 2012193240Ssam "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 2013193240Ssam __func__, name, nbuf, (uintmax_t) bufsize, 2014193240Ssam ndesc, (uintmax_t) descsize); 2015193240Ssam 2016193240Ssam dd->dd_name = name; 2017193240Ssam dd->dd_desc_len = nbuf * ndesc * descsize; 2018193240Ssam 2019193240Ssam /* 2020193240Ssam * Setup DMA descriptor area. 2021193240Ssam */ 2022193240Ssam error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), /* parent */ 2023193240Ssam PAGE_SIZE, 0, /* alignment, bounds */ 2024193240Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 2025193240Ssam BUS_SPACE_MAXADDR, /* highaddr */ 2026193240Ssam NULL, NULL, /* filter, filterarg */ 2027193240Ssam dd->dd_desc_len, /* maxsize */ 2028193240Ssam 1, /* nsegments */ 2029193240Ssam dd->dd_desc_len, /* maxsegsize */ 2030193240Ssam BUS_DMA_ALLOCNOW, /* flags */ 2031193240Ssam NULL, /* lockfunc */ 2032193240Ssam NULL, /* lockarg */ 2033193240Ssam &dd->dd_dmat); 2034193240Ssam if (error != 0) { 2035193240Ssam if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 2036193240Ssam return error; 2037193240Ssam } 2038193240Ssam 2039193240Ssam /* allocate descriptors */ 2040193240Ssam error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 2041193240Ssam BUS_DMA_NOWAIT | BUS_DMA_COHERENT, 2042193240Ssam &dd->dd_dmamap); 2043193240Ssam if (error != 0) { 2044193240Ssam if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 2045193240Ssam "error %u\n", nbuf * ndesc, dd->dd_name, error); 2046193240Ssam goto fail1; 2047193240Ssam } 2048193240Ssam 2049193240Ssam error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 2050193240Ssam dd->dd_desc, dd->dd_desc_len, 2051193240Ssam mwl_load_cb, &dd->dd_desc_paddr, 2052193240Ssam BUS_DMA_NOWAIT); 2053193240Ssam if (error != 0) { 2054193240Ssam if_printf(ifp, "unable to map %s descriptors, error %u\n", 2055193240Ssam dd->dd_name, error); 2056193240Ssam goto fail2; 2057193240Ssam } 2058193240Ssam 2059193240Ssam ds = dd->dd_desc; 2060193240Ssam memset(ds, 0, dd->dd_desc_len); 2061278532Smarius DPRINTF(sc, MWL_DEBUG_RESET, 2062278532Smarius "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n", 2063193240Ssam __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 2064278532Smarius (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 2065193240Ssam 2066193240Ssam return 0; 2067193240Ssamfail2: 2068193240Ssam bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 2069193240Ssamfail1: 2070193240Ssam bus_dma_tag_destroy(dd->dd_dmat); 2071193240Ssam memset(dd, 0, sizeof(*dd)); 2072193240Ssam return error; 2073193240Ssam#undef DS2PHYS 2074193240Ssam} 2075193240Ssam 2076193240Ssamstatic void 2077193240Ssammwl_desc_cleanup(struct mwl_softc *sc, struct mwl_descdma *dd) 2078193240Ssam{ 2079193240Ssam bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 2080193240Ssam bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 2081193240Ssam bus_dma_tag_destroy(dd->dd_dmat); 2082193240Ssam 2083193240Ssam memset(dd, 0, sizeof(*dd)); 2084193240Ssam} 2085193240Ssam 2086193240Ssam/* 2087193240Ssam * Construct a tx q's free list. The order of entries on 2088193240Ssam * the list must reflect the physical layout of tx descriptors 2089193240Ssam * because the firmware pre-fetches descriptors. 2090193240Ssam * 2091193240Ssam * XXX might be better to use indices into the buffer array. 2092193240Ssam */ 2093193240Ssamstatic void 2094193240Ssammwl_txq_reset(struct mwl_softc *sc, struct mwl_txq *txq) 2095193240Ssam{ 2096193240Ssam struct mwl_txbuf *bf; 2097193240Ssam int i; 2098193240Ssam 2099193240Ssam bf = txq->dma.dd_bufptr; 2100193240Ssam STAILQ_INIT(&txq->free); 2101193240Ssam for (i = 0; i < mwl_txbuf; i++, bf++) 2102193240Ssam STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 2103193240Ssam txq->nfree = i; 2104193240Ssam} 2105193240Ssam 2106193240Ssam#define DS2PHYS(_dd, _ds) \ 2107193240Ssam ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 2108193240Ssam 2109193240Ssamstatic int 2110193240Ssammwl_txdma_setup(struct mwl_softc *sc, struct mwl_txq *txq) 2111193240Ssam{ 2112193240Ssam struct ifnet *ifp = sc->sc_ifp; 2113193240Ssam int error, bsize, i; 2114193240Ssam struct mwl_txbuf *bf; 2115193240Ssam struct mwl_txdesc *ds; 2116193240Ssam 2117193240Ssam error = mwl_desc_setup(sc, "tx", &txq->dma, 2118193240Ssam mwl_txbuf, sizeof(struct mwl_txbuf), 2119193240Ssam MWL_TXDESC, sizeof(struct mwl_txdesc)); 2120193240Ssam if (error != 0) 2121193240Ssam return error; 2122193240Ssam 2123193240Ssam /* allocate and setup tx buffers */ 2124193240Ssam bsize = mwl_txbuf * sizeof(struct mwl_txbuf); 2125193240Ssam bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO); 2126193240Ssam if (bf == NULL) { 2127193240Ssam if_printf(ifp, "malloc of %u tx buffers failed\n", 2128193240Ssam mwl_txbuf); 2129193240Ssam return ENOMEM; 2130193240Ssam } 2131193240Ssam txq->dma.dd_bufptr = bf; 2132193240Ssam 2133193240Ssam ds = txq->dma.dd_desc; 2134193240Ssam for (i = 0; i < mwl_txbuf; i++, bf++, ds += MWL_TXDESC) { 2135193240Ssam bf->bf_desc = ds; 2136193240Ssam bf->bf_daddr = DS2PHYS(&txq->dma, ds); 2137193240Ssam error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 2138193240Ssam &bf->bf_dmamap); 2139193240Ssam if (error != 0) { 2140193240Ssam if_printf(ifp, "unable to create dmamap for tx " 2141193240Ssam "buffer %u, error %u\n", i, error); 2142193240Ssam return error; 2143193240Ssam } 2144193240Ssam } 2145193240Ssam mwl_txq_reset(sc, txq); 2146193240Ssam return 0; 2147193240Ssam} 2148193240Ssam 2149193240Ssamstatic void 2150193240Ssammwl_txdma_cleanup(struct mwl_softc *sc, struct mwl_txq *txq) 2151193240Ssam{ 2152193240Ssam struct mwl_txbuf *bf; 2153193240Ssam int i; 2154193240Ssam 2155193240Ssam bf = txq->dma.dd_bufptr; 2156193240Ssam for (i = 0; i < mwl_txbuf; i++, bf++) { 2157193240Ssam KASSERT(bf->bf_m == NULL, ("mbuf on free list")); 2158193240Ssam KASSERT(bf->bf_node == NULL, ("node on free list")); 2159193240Ssam if (bf->bf_dmamap != NULL) 2160193240Ssam bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2161193240Ssam } 2162193240Ssam STAILQ_INIT(&txq->free); 2163193240Ssam txq->nfree = 0; 2164193240Ssam if (txq->dma.dd_bufptr != NULL) { 2165193240Ssam free(txq->dma.dd_bufptr, M_MWLDEV); 2166193240Ssam txq->dma.dd_bufptr = NULL; 2167193240Ssam } 2168193240Ssam if (txq->dma.dd_desc_len != 0) 2169193240Ssam mwl_desc_cleanup(sc, &txq->dma); 2170193240Ssam} 2171193240Ssam 2172193240Ssamstatic int 2173193240Ssammwl_rxdma_setup(struct mwl_softc *sc) 2174193240Ssam{ 2175193240Ssam struct ifnet *ifp = sc->sc_ifp; 2176193240Ssam int error, jumbosize, bsize, i; 2177193240Ssam struct mwl_rxbuf *bf; 2178193240Ssam struct mwl_jumbo *rbuf; 2179193240Ssam struct mwl_rxdesc *ds; 2180193240Ssam caddr_t data; 2181193240Ssam 2182193240Ssam error = mwl_desc_setup(sc, "rx", &sc->sc_rxdma, 2183193240Ssam mwl_rxdesc, sizeof(struct mwl_rxbuf), 2184193240Ssam 1, sizeof(struct mwl_rxdesc)); 2185193240Ssam if (error != 0) 2186193240Ssam return error; 2187193240Ssam 2188193240Ssam /* 2189193240Ssam * Receive is done to a private pool of jumbo buffers. 2190193240Ssam * This allows us to attach to mbuf's and avoid re-mapping 2191193240Ssam * memory on each rx we post. We allocate a large chunk 2192193240Ssam * of memory and manage it in the driver. The mbuf free 2193193240Ssam * callback method is used to reclaim frames after sending 2194193240Ssam * them up the stack. By default we allocate 2x the number of 2195193240Ssam * rx descriptors configured so we have some slop to hold 2196193240Ssam * us while frames are processed. 2197193240Ssam */ 2198193240Ssam if (mwl_rxbuf < 2*mwl_rxdesc) { 2199193240Ssam if_printf(ifp, 2200193240Ssam "too few rx dma buffers (%d); increasing to %d\n", 2201193240Ssam mwl_rxbuf, 2*mwl_rxdesc); 2202193240Ssam mwl_rxbuf = 2*mwl_rxdesc; 2203193240Ssam } 2204193240Ssam jumbosize = roundup(MWL_AGGR_SIZE, PAGE_SIZE); 2205193240Ssam sc->sc_rxmemsize = mwl_rxbuf*jumbosize; 2206193240Ssam 2207193240Ssam error = bus_dma_tag_create(sc->sc_dmat, /* parent */ 2208193240Ssam PAGE_SIZE, 0, /* alignment, bounds */ 2209193240Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 2210193240Ssam BUS_SPACE_MAXADDR, /* highaddr */ 2211193240Ssam NULL, NULL, /* filter, filterarg */ 2212193240Ssam sc->sc_rxmemsize, /* maxsize */ 2213193240Ssam 1, /* nsegments */ 2214193240Ssam sc->sc_rxmemsize, /* maxsegsize */ 2215193240Ssam BUS_DMA_ALLOCNOW, /* flags */ 2216193240Ssam NULL, /* lockfunc */ 2217193240Ssam NULL, /* lockarg */ 2218193240Ssam &sc->sc_rxdmat); 2219193240Ssam if (error != 0) { 2220267340Sjhb if_printf(ifp, "could not create rx DMA tag\n"); 2221193240Ssam return error; 2222193240Ssam } 2223193240Ssam 2224193240Ssam error = bus_dmamem_alloc(sc->sc_rxdmat, (void**) &sc->sc_rxmem, 2225193240Ssam BUS_DMA_NOWAIT | BUS_DMA_COHERENT, 2226193240Ssam &sc->sc_rxmap); 2227193240Ssam if (error != 0) { 2228193240Ssam if_printf(ifp, "could not alloc %ju bytes of rx DMA memory\n", 2229193240Ssam (uintmax_t) sc->sc_rxmemsize); 2230193240Ssam return error; 2231193240Ssam } 2232193240Ssam 2233193240Ssam error = bus_dmamap_load(sc->sc_rxdmat, sc->sc_rxmap, 2234193240Ssam sc->sc_rxmem, sc->sc_rxmemsize, 2235193240Ssam mwl_load_cb, &sc->sc_rxmem_paddr, 2236193240Ssam BUS_DMA_NOWAIT); 2237193240Ssam if (error != 0) { 2238193240Ssam if_printf(ifp, "could not load rx DMA map\n"); 2239193240Ssam return error; 2240193240Ssam } 2241193240Ssam 2242193240Ssam /* 2243193240Ssam * Allocate rx buffers and set them up. 2244193240Ssam */ 2245193240Ssam bsize = mwl_rxdesc * sizeof(struct mwl_rxbuf); 2246193240Ssam bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO); 2247193240Ssam if (bf == NULL) { 2248193240Ssam if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 2249193240Ssam return error; 2250193240Ssam } 2251193240Ssam sc->sc_rxdma.dd_bufptr = bf; 2252193240Ssam 2253193240Ssam STAILQ_INIT(&sc->sc_rxbuf); 2254193240Ssam ds = sc->sc_rxdma.dd_desc; 2255193240Ssam for (i = 0; i < mwl_rxdesc; i++, bf++, ds++) { 2256193240Ssam bf->bf_desc = ds; 2257193240Ssam bf->bf_daddr = DS2PHYS(&sc->sc_rxdma, ds); 2258193240Ssam /* pre-assign dma buffer */ 2259193240Ssam bf->bf_data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize); 2260193240Ssam /* NB: tail is intentional to preserve descriptor order */ 2261193240Ssam STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2262193240Ssam } 2263193240Ssam 2264193240Ssam /* 2265193240Ssam * Place remainder of dma memory buffers on the free list. 2266193240Ssam */ 2267193240Ssam SLIST_INIT(&sc->sc_rxfree); 2268193240Ssam for (; i < mwl_rxbuf; i++) { 2269193240Ssam data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize); 2270193240Ssam rbuf = MWL_JUMBO_DATA2BUF(data); 2271193240Ssam SLIST_INSERT_HEAD(&sc->sc_rxfree, rbuf, next); 2272193240Ssam sc->sc_nrxfree++; 2273193240Ssam } 2274193240Ssam return 0; 2275193240Ssam} 2276193240Ssam#undef DS2PHYS 2277193240Ssam 2278193240Ssamstatic void 2279193240Ssammwl_rxdma_cleanup(struct mwl_softc *sc) 2280193240Ssam{ 2281267340Sjhb if (sc->sc_rxmem_paddr != 0) { 2282193240Ssam bus_dmamap_unload(sc->sc_rxdmat, sc->sc_rxmap); 2283267340Sjhb sc->sc_rxmem_paddr = 0; 2284267340Sjhb } 2285193240Ssam if (sc->sc_rxmem != NULL) { 2286193240Ssam bus_dmamem_free(sc->sc_rxdmat, sc->sc_rxmem, sc->sc_rxmap); 2287193240Ssam sc->sc_rxmem = NULL; 2288193240Ssam } 2289193240Ssam if (sc->sc_rxdma.dd_bufptr != NULL) { 2290193240Ssam free(sc->sc_rxdma.dd_bufptr, M_MWLDEV); 2291193240Ssam sc->sc_rxdma.dd_bufptr = NULL; 2292193240Ssam } 2293193240Ssam if (sc->sc_rxdma.dd_desc_len != 0) 2294193240Ssam mwl_desc_cleanup(sc, &sc->sc_rxdma); 2295193240Ssam} 2296193240Ssam 2297193240Ssamstatic int 2298193240Ssammwl_dma_setup(struct mwl_softc *sc) 2299193240Ssam{ 2300193240Ssam int error, i; 2301193240Ssam 2302193240Ssam error = mwl_rxdma_setup(sc); 2303197307Srpaulo if (error != 0) { 2304197307Srpaulo mwl_rxdma_cleanup(sc); 2305193240Ssam return error; 2306197307Srpaulo } 2307193240Ssam 2308193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) { 2309193240Ssam error = mwl_txdma_setup(sc, &sc->sc_txq[i]); 2310193240Ssam if (error != 0) { 2311193240Ssam mwl_dma_cleanup(sc); 2312193240Ssam return error; 2313193240Ssam } 2314193240Ssam } 2315193240Ssam return 0; 2316193240Ssam} 2317193240Ssam 2318193240Ssamstatic void 2319193240Ssammwl_dma_cleanup(struct mwl_softc *sc) 2320193240Ssam{ 2321193240Ssam int i; 2322193240Ssam 2323193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 2324193240Ssam mwl_txdma_cleanup(sc, &sc->sc_txq[i]); 2325193240Ssam mwl_rxdma_cleanup(sc); 2326193240Ssam} 2327193240Ssam 2328193240Ssamstatic struct ieee80211_node * 2329193240Ssammwl_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 2330193240Ssam{ 2331193240Ssam struct ieee80211com *ic = vap->iv_ic; 2332193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 2333193240Ssam const size_t space = sizeof(struct mwl_node); 2334193240Ssam struct mwl_node *mn; 2335193240Ssam 2336193240Ssam mn = malloc(space, M_80211_NODE, M_NOWAIT|M_ZERO); 2337193240Ssam if (mn == NULL) { 2338193240Ssam /* XXX stat+msg */ 2339193240Ssam return NULL; 2340193240Ssam } 2341193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: mn %p\n", __func__, mn); 2342193240Ssam return &mn->mn_node; 2343193240Ssam} 2344193240Ssam 2345193240Ssamstatic void 2346193240Ssammwl_node_cleanup(struct ieee80211_node *ni) 2347193240Ssam{ 2348193240Ssam struct ieee80211com *ic = ni->ni_ic; 2349193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 2350193240Ssam struct mwl_node *mn = MWL_NODE(ni); 2351193240Ssam 2352193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p ic %p staid %d\n", 2353193240Ssam __func__, ni, ni->ni_ic, mn->mn_staid); 2354193240Ssam 2355193240Ssam if (mn->mn_staid != 0) { 2356193240Ssam struct ieee80211vap *vap = ni->ni_vap; 2357193240Ssam 2358193240Ssam if (mn->mn_hvap != NULL) { 2359193240Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2360193240Ssam mwl_hal_delstation(mn->mn_hvap, vap->iv_myaddr); 2361193240Ssam else 2362193240Ssam mwl_hal_delstation(mn->mn_hvap, ni->ni_macaddr); 2363193240Ssam } 2364193240Ssam /* 2365193240Ssam * NB: legacy WDS peer sta db entry is installed using 2366193240Ssam * the associate ap's hvap; use it again to delete it. 2367193240Ssam * XXX can vap be NULL? 2368193240Ssam */ 2369193240Ssam else if (vap->iv_opmode == IEEE80211_M_WDS && 2370193240Ssam MWL_VAP(vap)->mv_ap_hvap != NULL) 2371193240Ssam mwl_hal_delstation(MWL_VAP(vap)->mv_ap_hvap, 2372193240Ssam ni->ni_macaddr); 2373193240Ssam delstaid(sc, mn->mn_staid); 2374193240Ssam mn->mn_staid = 0; 2375193240Ssam } 2376193240Ssam sc->sc_node_cleanup(ni); 2377193240Ssam} 2378193240Ssam 2379193240Ssam/* 2380193240Ssam * Reclaim rx dma buffers from packets sitting on the ampdu 2381193240Ssam * reorder queue for a station. We replace buffers with a 2382193240Ssam * system cluster (if available). 2383193240Ssam */ 2384193240Ssamstatic void 2385193240Ssammwl_ampdu_rxdma_reclaim(struct ieee80211_rx_ampdu *rap) 2386193240Ssam{ 2387193240Ssam#if 0 2388193240Ssam int i, n, off; 2389193240Ssam struct mbuf *m; 2390193240Ssam void *cl; 2391193240Ssam 2392193240Ssam n = rap->rxa_qframes; 2393193240Ssam for (i = 0; i < rap->rxa_wnd && n > 0; i++) { 2394193240Ssam m = rap->rxa_m[i]; 2395193240Ssam if (m == NULL) 2396193240Ssam continue; 2397193240Ssam n--; 2398193240Ssam /* our dma buffers have a well-known free routine */ 2399193240Ssam if ((m->m_flags & M_EXT) == 0 || 2400193240Ssam m->m_ext.ext_free != mwl_ext_free) 2401193240Ssam continue; 2402193240Ssam /* 2403193240Ssam * Try to allocate a cluster and move the data. 2404193240Ssam */ 2405193240Ssam off = m->m_data - m->m_ext.ext_buf; 2406193240Ssam if (off + m->m_pkthdr.len > MCLBYTES) { 2407193240Ssam /* XXX no AMSDU for now */ 2408193240Ssam continue; 2409193240Ssam } 2410193240Ssam cl = pool_cache_get_paddr(&mclpool_cache, 0, 2411193240Ssam &m->m_ext.ext_paddr); 2412193240Ssam if (cl != NULL) { 2413193240Ssam /* 2414193240Ssam * Copy the existing data to the cluster, remove 2415193240Ssam * the rx dma buffer, and attach the cluster in 2416193240Ssam * its place. Note we preserve the offset to the 2417193240Ssam * data so frames being bridged can still prepend 2418193240Ssam * their headers without adding another mbuf. 2419193240Ssam */ 2420193240Ssam memcpy((caddr_t) cl + off, m->m_data, m->m_pkthdr.len); 2421193240Ssam MEXTREMOVE(m); 2422193240Ssam MEXTADD(m, cl, MCLBYTES, 0, NULL, &mclpool_cache); 2423193240Ssam /* setup mbuf like _MCLGET does */ 2424193240Ssam m->m_flags |= M_CLUSTER | M_EXT_RW; 2425193240Ssam _MOWNERREF(m, M_EXT | M_CLUSTER); 2426193240Ssam /* NB: m_data is clobbered by MEXTADDR, adjust */ 2427193240Ssam m->m_data += off; 2428193240Ssam } 2429193240Ssam } 2430193240Ssam#endif 2431193240Ssam} 2432193240Ssam 2433193240Ssam/* 2434193240Ssam * Callback to reclaim resources. We first let the 2435193240Ssam * net80211 layer do it's thing, then if we are still 2436193240Ssam * blocked by a lack of rx dma buffers we walk the ampdu 2437193240Ssam * reorder q's to reclaim buffers by copying to a system 2438193240Ssam * cluster. 2439193240Ssam */ 2440193240Ssamstatic void 2441193240Ssammwl_node_drain(struct ieee80211_node *ni) 2442193240Ssam{ 2443193240Ssam struct ieee80211com *ic = ni->ni_ic; 2444193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 2445193240Ssam struct mwl_node *mn = MWL_NODE(ni); 2446193240Ssam 2447193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p vap %p staid %d\n", 2448193240Ssam __func__, ni, ni->ni_vap, mn->mn_staid); 2449193240Ssam 2450193240Ssam /* NB: call up first to age out ampdu q's */ 2451193240Ssam sc->sc_node_drain(ni); 2452193240Ssam 2453193240Ssam /* XXX better to not check low water mark? */ 2454193240Ssam if (sc->sc_rxblocked && mn->mn_staid != 0 && 2455193240Ssam (ni->ni_flags & IEEE80211_NODE_HT)) { 2456193240Ssam uint8_t tid; 2457193240Ssam /* 2458193240Ssam * Walk the reorder q and reclaim rx dma buffers by copying 2459193240Ssam * the packet contents into clusters. 2460193240Ssam */ 2461193240Ssam for (tid = 0; tid < WME_NUM_TID; tid++) { 2462193240Ssam struct ieee80211_rx_ampdu *rap; 2463193240Ssam 2464193240Ssam rap = &ni->ni_rx_ampdu[tid]; 2465193240Ssam if ((rap->rxa_flags & IEEE80211_AGGR_XCHGPEND) == 0) 2466193240Ssam continue; 2467193240Ssam if (rap->rxa_qframes) 2468193240Ssam mwl_ampdu_rxdma_reclaim(rap); 2469193240Ssam } 2470193240Ssam } 2471193240Ssam} 2472193240Ssam 2473193240Ssamstatic void 2474193240Ssammwl_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise) 2475193240Ssam{ 2476193240Ssam *rssi = ni->ni_ic->ic_node_getrssi(ni); 2477193240Ssam#ifdef MWL_ANT_INFO_SUPPORT 2478193240Ssam#if 0 2479193240Ssam /* XXX need to smooth data */ 2480193240Ssam *noise = -MWL_NODE_CONST(ni)->mn_ai.nf; 2481193240Ssam#else 2482193240Ssam *noise = -95; /* XXX */ 2483193240Ssam#endif 2484193240Ssam#else 2485193240Ssam *noise = -95; /* XXX */ 2486193240Ssam#endif 2487193240Ssam} 2488193240Ssam 2489193240Ssam/* 2490193240Ssam * Convert Hardware per-antenna rssi info to common format: 2491193240Ssam * Let a1, a2, a3 represent the amplitudes per chain 2492193240Ssam * Let amax represent max[a1, a2, a3] 2493193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1/amax) 2494193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1) - 20*log10(amax) 2495193240Ssam * We store a table that is 4*20*log10(idx) - the extra 4 is to store or 2496193240Ssam * maintain some extra precision. 2497193240Ssam * 2498193240Ssam * Values are stored in .5 db format capped at 127. 2499193240Ssam */ 2500193240Ssamstatic void 2501193240Ssammwl_node_getmimoinfo(const struct ieee80211_node *ni, 2502193240Ssam struct ieee80211_mimo_info *mi) 2503193240Ssam{ 2504193240Ssam#define CVT(_dst, _src) do { \ 2505193240Ssam (_dst) = rssi + ((logdbtbl[_src] - logdbtbl[rssi_max]) >> 2); \ 2506193240Ssam (_dst) = (_dst) > 64 ? 127 : ((_dst) << 1); \ 2507193240Ssam} while (0) 2508193240Ssam static const int8_t logdbtbl[32] = { 2509193240Ssam 0, 0, 24, 38, 48, 56, 62, 68, 2510193240Ssam 72, 76, 80, 83, 86, 89, 92, 94, 2511193240Ssam 96, 98, 100, 102, 104, 106, 107, 109, 2512193240Ssam 110, 112, 113, 115, 116, 117, 118, 119 2513193240Ssam }; 2514193240Ssam const struct mwl_node *mn = MWL_NODE_CONST(ni); 2515193240Ssam uint8_t rssi = mn->mn_ai.rsvd1/2; /* XXX */ 2516193240Ssam uint32_t rssi_max; 2517193240Ssam 2518193240Ssam rssi_max = mn->mn_ai.rssi_a; 2519193240Ssam if (mn->mn_ai.rssi_b > rssi_max) 2520193240Ssam rssi_max = mn->mn_ai.rssi_b; 2521193240Ssam if (mn->mn_ai.rssi_c > rssi_max) 2522193240Ssam rssi_max = mn->mn_ai.rssi_c; 2523193240Ssam 2524220935Sadrian CVT(mi->rssi[0], mn->mn_ai.rssi_a); 2525220935Sadrian CVT(mi->rssi[1], mn->mn_ai.rssi_b); 2526220935Sadrian CVT(mi->rssi[2], mn->mn_ai.rssi_c); 2527193240Ssam 2528220935Sadrian mi->noise[0] = mn->mn_ai.nf_a; 2529220935Sadrian mi->noise[1] = mn->mn_ai.nf_b; 2530220935Sadrian mi->noise[2] = mn->mn_ai.nf_c; 2531193240Ssam#undef CVT 2532193240Ssam} 2533193240Ssam 2534193240Ssamstatic __inline void * 2535193240Ssammwl_getrxdma(struct mwl_softc *sc) 2536193240Ssam{ 2537193240Ssam struct mwl_jumbo *buf; 2538193240Ssam void *data; 2539193240Ssam 2540193240Ssam /* 2541193240Ssam * Allocate from jumbo pool. 2542193240Ssam */ 2543193240Ssam MWL_RXFREE_LOCK(sc); 2544193240Ssam buf = SLIST_FIRST(&sc->sc_rxfree); 2545193240Ssam if (buf == NULL) { 2546193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, 2547193240Ssam "%s: out of rx dma buffers\n", __func__); 2548193240Ssam sc->sc_stats.mst_rx_nodmabuf++; 2549193240Ssam data = NULL; 2550193240Ssam } else { 2551193240Ssam SLIST_REMOVE_HEAD(&sc->sc_rxfree, next); 2552193240Ssam sc->sc_nrxfree--; 2553193240Ssam data = MWL_JUMBO_BUF2DATA(buf); 2554193240Ssam } 2555193240Ssam MWL_RXFREE_UNLOCK(sc); 2556193240Ssam return data; 2557193240Ssam} 2558193240Ssam 2559193240Ssamstatic __inline void 2560193240Ssammwl_putrxdma(struct mwl_softc *sc, void *data) 2561193240Ssam{ 2562193240Ssam struct mwl_jumbo *buf; 2563193240Ssam 2564193240Ssam /* XXX bounds check data */ 2565193240Ssam MWL_RXFREE_LOCK(sc); 2566193240Ssam buf = MWL_JUMBO_DATA2BUF(data); 2567193240Ssam SLIST_INSERT_HEAD(&sc->sc_rxfree, buf, next); 2568193240Ssam sc->sc_nrxfree++; 2569193240Ssam MWL_RXFREE_UNLOCK(sc); 2570193240Ssam} 2571193240Ssam 2572193240Ssamstatic int 2573193240Ssammwl_rxbuf_init(struct mwl_softc *sc, struct mwl_rxbuf *bf) 2574193240Ssam{ 2575193240Ssam struct mwl_rxdesc *ds; 2576193240Ssam 2577193240Ssam ds = bf->bf_desc; 2578193240Ssam if (bf->bf_data == NULL) { 2579193240Ssam bf->bf_data = mwl_getrxdma(sc); 2580193240Ssam if (bf->bf_data == NULL) { 2581193240Ssam /* mark descriptor to be skipped */ 2582193240Ssam ds->RxControl = EAGLE_RXD_CTRL_OS_OWN; 2583193240Ssam /* NB: don't need PREREAD */ 2584193240Ssam MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 2585193240Ssam sc->sc_stats.mst_rxbuf_failed++; 2586193240Ssam return ENOMEM; 2587193240Ssam } 2588193240Ssam } 2589193240Ssam /* 2590193240Ssam * NB: DMA buffer contents is known to be unmodified 2591193240Ssam * so there's no need to flush the data cache. 2592193240Ssam */ 2593193240Ssam 2594193240Ssam /* 2595193240Ssam * Setup descriptor. 2596193240Ssam */ 2597193240Ssam ds->QosCtrl = 0; 2598193240Ssam ds->RSSI = 0; 2599193240Ssam ds->Status = EAGLE_RXD_STATUS_IDLE; 2600193240Ssam ds->Channel = 0; 2601193240Ssam ds->PktLen = htole16(MWL_AGGR_SIZE); 2602193240Ssam ds->SQ2 = 0; 2603193240Ssam ds->pPhysBuffData = htole32(MWL_JUMBO_DMA_ADDR(sc, bf->bf_data)); 2604193240Ssam /* NB: don't touch pPhysNext, set once */ 2605193240Ssam ds->RxControl = EAGLE_RXD_CTRL_DRIVER_OWN; 2606193240Ssam MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2607193240Ssam 2608193240Ssam return 0; 2609193240Ssam} 2610193240Ssam 2611268529Sglebiusstatic void 2612254799Sandremwl_ext_free(struct mbuf *m, void *data, void *arg) 2613193240Ssam{ 2614193240Ssam struct mwl_softc *sc = arg; 2615193240Ssam 2616193240Ssam /* XXX bounds check data */ 2617193240Ssam mwl_putrxdma(sc, data); 2618193240Ssam /* 2619193240Ssam * If we were previously blocked by a lack of rx dma buffers 2620193240Ssam * check if we now have enough to restart rx interrupt handling. 2621193240Ssam * NB: we know we are called at splvm which is above splnet. 2622193240Ssam */ 2623193240Ssam if (sc->sc_rxblocked && sc->sc_nrxfree > mwl_rxdmalow) { 2624193240Ssam sc->sc_rxblocked = 0; 2625193240Ssam mwl_hal_intrset(sc->sc_mh, sc->sc_imask); 2626193240Ssam } 2627193240Ssam} 2628193240Ssam 2629193240Ssamstruct mwl_frame_bar { 2630193240Ssam u_int8_t i_fc[2]; 2631193240Ssam u_int8_t i_dur[2]; 2632193240Ssam u_int8_t i_ra[IEEE80211_ADDR_LEN]; 2633193240Ssam u_int8_t i_ta[IEEE80211_ADDR_LEN]; 2634193240Ssam /* ctl, seq, FCS */ 2635193240Ssam} __packed; 2636193240Ssam 2637193240Ssam/* 2638193240Ssam * Like ieee80211_anyhdrsize, but handles BAR frames 2639193240Ssam * specially so the logic below to piece the 802.11 2640193240Ssam * header together works. 2641193240Ssam */ 2642193240Ssamstatic __inline int 2643193240Ssammwl_anyhdrsize(const void *data) 2644193240Ssam{ 2645193240Ssam const struct ieee80211_frame *wh = data; 2646193240Ssam 2647193240Ssam if ((wh->i_fc[0]&IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 2648193240Ssam switch (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) { 2649193240Ssam case IEEE80211_FC0_SUBTYPE_CTS: 2650193240Ssam case IEEE80211_FC0_SUBTYPE_ACK: 2651193240Ssam return sizeof(struct ieee80211_frame_ack); 2652193240Ssam case IEEE80211_FC0_SUBTYPE_BAR: 2653193240Ssam return sizeof(struct mwl_frame_bar); 2654193240Ssam } 2655193240Ssam return sizeof(struct ieee80211_frame_min); 2656193240Ssam } else 2657193240Ssam return ieee80211_hdrsize(data); 2658193240Ssam} 2659193240Ssam 2660193240Ssamstatic void 2661193240Ssammwl_handlemicerror(struct ieee80211com *ic, const uint8_t *data) 2662193240Ssam{ 2663193240Ssam const struct ieee80211_frame *wh; 2664193240Ssam struct ieee80211_node *ni; 2665193240Ssam 2666193240Ssam wh = (const struct ieee80211_frame *)(data + sizeof(uint16_t)); 2667193240Ssam ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh); 2668193240Ssam if (ni != NULL) { 2669193240Ssam ieee80211_notify_michael_failure(ni->ni_vap, wh, 0); 2670193240Ssam ieee80211_free_node(ni); 2671193240Ssam } 2672193240Ssam} 2673193240Ssam 2674193240Ssam/* 2675193240Ssam * Convert hardware signal strength to rssi. The value 2676193240Ssam * provided by the device has the noise floor added in; 2677193240Ssam * we need to compensate for this but we don't have that 2678193240Ssam * so we use a fixed value. 2679193240Ssam * 2680193240Ssam * The offset of 8 is good for both 2.4 and 5GHz. The LNA 2681193240Ssam * offset is already set as part of the initial gain. This 2682193240Ssam * will give at least +/- 3dB for 2.4GHz and +/- 5dB for 5GHz. 2683193240Ssam */ 2684193240Ssamstatic __inline int 2685193240Ssamcvtrssi(uint8_t ssi) 2686193240Ssam{ 2687193240Ssam int rssi = (int) ssi + 8; 2688193240Ssam /* XXX hack guess until we have a real noise floor */ 2689193240Ssam rssi = 2*(87 - rssi); /* NB: .5 dBm units */ 2690193240Ssam return (rssi < 0 ? 0 : rssi > 127 ? 127 : rssi); 2691193240Ssam} 2692193240Ssam 2693193240Ssamstatic void 2694193240Ssammwl_rx_proc(void *arg, int npending) 2695193240Ssam{ 2696193240Ssam#define IEEE80211_DIR_DSTODS(wh) \ 2697193240Ssam ((((const struct ieee80211_frame *)wh)->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2698193240Ssam struct mwl_softc *sc = arg; 2699193240Ssam struct ifnet *ifp = sc->sc_ifp; 2700193240Ssam struct ieee80211com *ic = ifp->if_l2com; 2701193240Ssam struct mwl_rxbuf *bf; 2702193240Ssam struct mwl_rxdesc *ds; 2703193240Ssam struct mbuf *m; 2704193240Ssam struct ieee80211_qosframe *wh; 2705193240Ssam struct ieee80211_qosframe_addr4 *wh4; 2706193240Ssam struct ieee80211_node *ni; 2707193240Ssam struct mwl_node *mn; 2708193240Ssam int off, len, hdrlen, pktlen, rssi, ntodo; 2709193240Ssam uint8_t *data, status; 2710193240Ssam void *newdata; 2711193240Ssam int16_t nf; 2712193240Ssam 2713193240Ssam DPRINTF(sc, MWL_DEBUG_RX_PROC, "%s: pending %u rdptr 0x%x wrptr 0x%x\n", 2714193240Ssam __func__, npending, RD4(sc, sc->sc_hwspecs.rxDescRead), 2715193240Ssam RD4(sc, sc->sc_hwspecs.rxDescWrite)); 2716193240Ssam nf = -96; /* XXX */ 2717193240Ssam bf = sc->sc_rxnext; 2718193240Ssam for (ntodo = mwl_rxquota; ntodo > 0; ntodo--) { 2719193240Ssam if (bf == NULL) 2720193240Ssam bf = STAILQ_FIRST(&sc->sc_rxbuf); 2721193240Ssam ds = bf->bf_desc; 2722193240Ssam data = bf->bf_data; 2723193240Ssam if (data == NULL) { 2724193240Ssam /* 2725193240Ssam * If data allocation failed previously there 2726193240Ssam * will be no buffer; try again to re-populate it. 2727193240Ssam * Note the firmware will not advance to the next 2728193240Ssam * descriptor with a dma buffer so we must mimic 2729193240Ssam * this or we'll get out of sync. 2730193240Ssam */ 2731193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, 2732193240Ssam "%s: rx buf w/o dma memory\n", __func__); 2733193240Ssam (void) mwl_rxbuf_init(sc, bf); 2734193240Ssam sc->sc_stats.mst_rx_dmabufmissing++; 2735193240Ssam break; 2736193240Ssam } 2737193240Ssam MWL_RXDESC_SYNC(sc, ds, 2738193240Ssam BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2739193240Ssam if (ds->RxControl != EAGLE_RXD_CTRL_DMA_OWN) 2740193240Ssam break; 2741193240Ssam#ifdef MWL_DEBUG 2742193240Ssam if (sc->sc_debug & MWL_DEBUG_RECV_DESC) 2743193240Ssam mwl_printrxbuf(bf, 0); 2744193240Ssam#endif 2745193240Ssam status = ds->Status; 2746193240Ssam if (status & EAGLE_RXD_STATUS_DECRYPT_ERR_MASK) { 2747271810Sglebius if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 2748193240Ssam sc->sc_stats.mst_rx_crypto++; 2749193240Ssam /* 2750193240Ssam * NB: Check EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR 2751193240Ssam * for backwards compatibility. 2752193240Ssam */ 2753193240Ssam if (status != EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR && 2754193240Ssam (status & EAGLE_RXD_STATUS_TKIP_MIC_DECRYPT_ERR)) { 2755193240Ssam /* 2756193240Ssam * MIC error, notify upper layers. 2757193240Ssam */ 2758193240Ssam bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap, 2759193240Ssam BUS_DMASYNC_POSTREAD); 2760193240Ssam mwl_handlemicerror(ic, data); 2761193240Ssam sc->sc_stats.mst_rx_tkipmic++; 2762193240Ssam } 2763193240Ssam /* XXX too painful to tap packets */ 2764193240Ssam goto rx_next; 2765193240Ssam } 2766193240Ssam /* 2767193240Ssam * Sync the data buffer. 2768193240Ssam */ 2769193240Ssam len = le16toh(ds->PktLen); 2770193240Ssam bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap, BUS_DMASYNC_POSTREAD); 2771193240Ssam /* 2772193240Ssam * The 802.11 header is provided all or in part at the front; 2773193240Ssam * use it to calculate the true size of the header that we'll 2774193240Ssam * construct below. We use this to figure out where to copy 2775193240Ssam * payload prior to constructing the header. 2776193240Ssam */ 2777193240Ssam hdrlen = mwl_anyhdrsize(data + sizeof(uint16_t)); 2778193240Ssam off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2779193240Ssam 2780193240Ssam /* calculate rssi early so we can re-use for each aggregate */ 2781193240Ssam rssi = cvtrssi(ds->RSSI); 2782193240Ssam 2783193240Ssam pktlen = hdrlen + (len - off); 2784193240Ssam /* 2785193240Ssam * NB: we know our frame is at least as large as 2786193240Ssam * IEEE80211_MIN_LEN because there is a 4-address 2787193240Ssam * frame at the front. Hence there's no need to 2788193240Ssam * vet the packet length. If the frame in fact 2789193240Ssam * is too small it should be discarded at the 2790193240Ssam * net80211 layer. 2791193240Ssam */ 2792193240Ssam 2793193240Ssam /* 2794193240Ssam * Attach dma buffer to an mbuf. We tried 2795193240Ssam * doing this based on the packet size (i.e. 2796193240Ssam * copying small packets) but it turns out to 2797193240Ssam * be a net loss. The tradeoff might be system 2798193240Ssam * dependent (cache architecture is important). 2799193240Ssam */ 2800243857Sglebius MGETHDR(m, M_NOWAIT, MT_DATA); 2801193240Ssam if (m == NULL) { 2802193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, 2803193240Ssam "%s: no rx mbuf\n", __func__); 2804193240Ssam sc->sc_stats.mst_rx_nombuf++; 2805193240Ssam goto rx_next; 2806193240Ssam } 2807193240Ssam /* 2808193240Ssam * Acquire the replacement dma buffer before 2809193240Ssam * processing the frame. If we're out of dma 2810193240Ssam * buffers we disable rx interrupts and wait 2811193240Ssam * for the free pool to reach mlw_rxdmalow buffers 2812193240Ssam * before starting to do work again. If the firmware 2813193240Ssam * runs out of descriptors then it will toss frames 2814193240Ssam * which is better than our doing it as that can 2815193240Ssam * starve our processing. It is also important that 2816193240Ssam * we always process rx'd frames in case they are 2817193240Ssam * A-MPDU as otherwise the host's view of the BA 2818193240Ssam * window may get out of sync with the firmware. 2819193240Ssam */ 2820193240Ssam newdata = mwl_getrxdma(sc); 2821193240Ssam if (newdata == NULL) { 2822193240Ssam /* NB: stat+msg in mwl_getrxdma */ 2823193240Ssam m_free(m); 2824193240Ssam /* disable RX interrupt and mark state */ 2825193240Ssam mwl_hal_intrset(sc->sc_mh, 2826193240Ssam sc->sc_imask &~ MACREG_A2HRIC_BIT_RX_RDY); 2827193240Ssam sc->sc_rxblocked = 1; 2828193240Ssam ieee80211_drain(ic); 2829193240Ssam /* XXX check rxblocked and immediately start again? */ 2830193240Ssam goto rx_stop; 2831193240Ssam } 2832193240Ssam bf->bf_data = newdata; 2833193240Ssam /* 2834193240Ssam * Attach the dma buffer to the mbuf; 2835193240Ssam * mwl_rxbuf_init will re-setup the rx 2836193240Ssam * descriptor using the replacement dma 2837193240Ssam * buffer we just installed above. 2838193240Ssam */ 2839193240Ssam MEXTADD(m, data, MWL_AGGR_SIZE, mwl_ext_free, 2840193240Ssam data, sc, 0, EXT_NET_DRV); 2841193240Ssam m->m_data += off - hdrlen; 2842193240Ssam m->m_pkthdr.len = m->m_len = pktlen; 2843193240Ssam m->m_pkthdr.rcvif = ifp; 2844193240Ssam /* NB: dma buffer assumed read-only */ 2845193240Ssam 2846193240Ssam /* 2847193240Ssam * Piece 802.11 header together. 2848193240Ssam */ 2849193240Ssam wh = mtod(m, struct ieee80211_qosframe *); 2850193240Ssam /* NB: don't need to do this sometimes but ... */ 2851193240Ssam /* XXX special case so we can memcpy after m_devget? */ 2852193240Ssam ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2853193240Ssam if (IEEE80211_QOS_HAS_SEQ(wh)) { 2854193240Ssam if (IEEE80211_DIR_DSTODS(wh)) { 2855193240Ssam wh4 = mtod(m, 2856193240Ssam struct ieee80211_qosframe_addr4*); 2857193240Ssam *(uint16_t *)wh4->i_qos = ds->QosCtrl; 2858193240Ssam } else { 2859193240Ssam *(uint16_t *)wh->i_qos = ds->QosCtrl; 2860193240Ssam } 2861193240Ssam } 2862193240Ssam /* 2863193240Ssam * The f/w strips WEP header but doesn't clear 2864193240Ssam * the WEP bit; mark the packet with M_WEP so 2865193240Ssam * net80211 will treat the data as decrypted. 2866193240Ssam * While here also clear the PWR_MGT bit since 2867193240Ssam * power save is handled by the firmware and 2868193240Ssam * passing this up will potentially cause the 2869193240Ssam * upper layer to put a station in power save 2870193240Ssam * (except when configured with MWL_HOST_PS_SUPPORT). 2871193240Ssam */ 2872260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2873193240Ssam m->m_flags |= M_WEP; 2874193240Ssam#ifdef MWL_HOST_PS_SUPPORT 2875260444Skevlo wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED; 2876193240Ssam#else 2877260444Skevlo wh->i_fc[1] &= ~(IEEE80211_FC1_PROTECTED | 2878260444Skevlo IEEE80211_FC1_PWR_MGT); 2879193240Ssam#endif 2880193240Ssam 2881193240Ssam if (ieee80211_radiotap_active(ic)) { 2882193240Ssam struct mwl_rx_radiotap_header *tap = &sc->sc_rx_th; 2883193240Ssam 2884193240Ssam tap->wr_flags = 0; 2885193240Ssam tap->wr_rate = ds->Rate; 2886193240Ssam tap->wr_antsignal = rssi + nf; 2887193240Ssam tap->wr_antnoise = nf; 2888193240Ssam } 2889193240Ssam if (IFF_DUMPPKTS_RECV(sc, wh)) { 2890193240Ssam ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2891193240Ssam len, ds->Rate, rssi); 2892193240Ssam } 2893271810Sglebius if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 2894193240Ssam 2895193240Ssam /* dispatch */ 2896193240Ssam ni = ieee80211_find_rxnode(ic, 2897193240Ssam (const struct ieee80211_frame_min *) wh); 2898193240Ssam if (ni != NULL) { 2899193240Ssam mn = MWL_NODE(ni); 2900193240Ssam#ifdef MWL_ANT_INFO_SUPPORT 2901193240Ssam mn->mn_ai.rssi_a = ds->ai.rssi_a; 2902193240Ssam mn->mn_ai.rssi_b = ds->ai.rssi_b; 2903193240Ssam mn->mn_ai.rssi_c = ds->ai.rssi_c; 2904193240Ssam mn->mn_ai.rsvd1 = rssi; 2905193240Ssam#endif 2906193240Ssam /* tag AMPDU aggregates for reorder processing */ 2907193240Ssam if (ni->ni_flags & IEEE80211_NODE_HT) 2908193240Ssam m->m_flags |= M_AMPDU; 2909193240Ssam (void) ieee80211_input(ni, m, rssi, nf); 2910193240Ssam ieee80211_free_node(ni); 2911193240Ssam } else 2912193240Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 2913193240Ssamrx_next: 2914193240Ssam /* NB: ignore ENOMEM so we process more descriptors */ 2915193240Ssam (void) mwl_rxbuf_init(sc, bf); 2916193240Ssam bf = STAILQ_NEXT(bf, bf_list); 2917193240Ssam } 2918193240Ssamrx_stop: 2919193240Ssam sc->sc_rxnext = bf; 2920193240Ssam 2921193240Ssam if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2922193240Ssam !IFQ_IS_EMPTY(&ifp->if_snd)) { 2923193240Ssam /* NB: kick fw; the tx thread may have been preempted */ 2924193240Ssam mwl_hal_txstart(sc->sc_mh, 0); 2925193240Ssam mwl_start(ifp); 2926193240Ssam } 2927193240Ssam#undef IEEE80211_DIR_DSTODS 2928193240Ssam} 2929193240Ssam 2930193240Ssamstatic void 2931193240Ssammwl_txq_init(struct mwl_softc *sc, struct mwl_txq *txq, int qnum) 2932193240Ssam{ 2933193240Ssam struct mwl_txbuf *bf, *bn; 2934193240Ssam struct mwl_txdesc *ds; 2935193240Ssam 2936193240Ssam MWL_TXQ_LOCK_INIT(sc, txq); 2937193240Ssam txq->qnum = qnum; 2938193240Ssam txq->txpri = 0; /* XXX */ 2939193240Ssam#if 0 2940193240Ssam /* NB: q setup by mwl_txdma_setup XXX */ 2941193240Ssam STAILQ_INIT(&txq->free); 2942193240Ssam#endif 2943193240Ssam STAILQ_FOREACH(bf, &txq->free, bf_list) { 2944193240Ssam bf->bf_txq = txq; 2945193240Ssam 2946193240Ssam ds = bf->bf_desc; 2947193240Ssam bn = STAILQ_NEXT(bf, bf_list); 2948193240Ssam if (bn == NULL) 2949193240Ssam bn = STAILQ_FIRST(&txq->free); 2950193240Ssam ds->pPhysNext = htole32(bn->bf_daddr); 2951193240Ssam } 2952193240Ssam STAILQ_INIT(&txq->active); 2953193240Ssam} 2954193240Ssam 2955193240Ssam/* 2956193240Ssam * Setup a hardware data transmit queue for the specified 2957193240Ssam * access control. We record the mapping from ac's 2958193240Ssam * to h/w queues for use by mwl_tx_start. 2959193240Ssam */ 2960193240Ssamstatic int 2961193240Ssammwl_tx_setup(struct mwl_softc *sc, int ac, int mvtype) 2962193240Ssam{ 2963193240Ssam#define N(a) (sizeof(a)/sizeof(a[0])) 2964193240Ssam struct mwl_txq *txq; 2965193240Ssam 2966193240Ssam if (ac >= N(sc->sc_ac2q)) { 2967193240Ssam device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n", 2968193240Ssam ac, N(sc->sc_ac2q)); 2969193240Ssam return 0; 2970193240Ssam } 2971193240Ssam if (mvtype >= MWL_NUM_TX_QUEUES) { 2972193240Ssam device_printf(sc->sc_dev, "mvtype %u out of range, max %u!\n", 2973193240Ssam mvtype, MWL_NUM_TX_QUEUES); 2974193240Ssam return 0; 2975193240Ssam } 2976193240Ssam txq = &sc->sc_txq[mvtype]; 2977193240Ssam mwl_txq_init(sc, txq, mvtype); 2978193240Ssam sc->sc_ac2q[ac] = txq; 2979193240Ssam return 1; 2980193240Ssam#undef N 2981193240Ssam} 2982193240Ssam 2983193240Ssam/* 2984193240Ssam * Update WME parameters for a transmit queue. 2985193240Ssam */ 2986193240Ssamstatic int 2987193240Ssammwl_txq_update(struct mwl_softc *sc, int ac) 2988193240Ssam{ 2989193240Ssam#define MWL_EXPONENT_TO_VALUE(v) ((1<<v)-1) 2990193240Ssam struct ifnet *ifp = sc->sc_ifp; 2991193240Ssam struct ieee80211com *ic = ifp->if_l2com; 2992193240Ssam struct mwl_txq *txq = sc->sc_ac2q[ac]; 2993193240Ssam struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac]; 2994193240Ssam struct mwl_hal *mh = sc->sc_mh; 2995193240Ssam int aifs, cwmin, cwmax, txoplim; 2996193240Ssam 2997193240Ssam aifs = wmep->wmep_aifsn; 2998193240Ssam /* XXX in sta mode need to pass log values for cwmin/max */ 2999193240Ssam cwmin = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmin); 3000193240Ssam cwmax = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmax); 3001193240Ssam txoplim = wmep->wmep_txopLimit; /* NB: units of 32us */ 3002193240Ssam 3003193240Ssam if (mwl_hal_setedcaparams(mh, txq->qnum, cwmin, cwmax, aifs, txoplim)) { 3004193240Ssam device_printf(sc->sc_dev, "unable to update hardware queue " 3005193240Ssam "parameters for %s traffic!\n", 3006193240Ssam ieee80211_wme_acnames[ac]); 3007193240Ssam return 0; 3008193240Ssam } 3009193240Ssam return 1; 3010193240Ssam#undef MWL_EXPONENT_TO_VALUE 3011193240Ssam} 3012193240Ssam 3013193240Ssam/* 3014193240Ssam * Callback from the 802.11 layer to update WME parameters. 3015193240Ssam */ 3016193240Ssamstatic int 3017193240Ssammwl_wme_update(struct ieee80211com *ic) 3018193240Ssam{ 3019193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 3020193240Ssam 3021193240Ssam return !mwl_txq_update(sc, WME_AC_BE) || 3022193240Ssam !mwl_txq_update(sc, WME_AC_BK) || 3023193240Ssam !mwl_txq_update(sc, WME_AC_VI) || 3024193240Ssam !mwl_txq_update(sc, WME_AC_VO) ? EIO : 0; 3025193240Ssam} 3026193240Ssam 3027193240Ssam/* 3028193240Ssam * Reclaim resources for a setup queue. 3029193240Ssam */ 3030193240Ssamstatic void 3031193240Ssammwl_tx_cleanupq(struct mwl_softc *sc, struct mwl_txq *txq) 3032193240Ssam{ 3033193240Ssam /* XXX hal work? */ 3034193240Ssam MWL_TXQ_LOCK_DESTROY(txq); 3035193240Ssam} 3036193240Ssam 3037193240Ssam/* 3038193240Ssam * Reclaim all tx queue resources. 3039193240Ssam */ 3040193240Ssamstatic void 3041193240Ssammwl_tx_cleanup(struct mwl_softc *sc) 3042193240Ssam{ 3043193240Ssam int i; 3044193240Ssam 3045193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 3046193240Ssam mwl_tx_cleanupq(sc, &sc->sc_txq[i]); 3047193240Ssam} 3048193240Ssam 3049193240Ssamstatic int 3050193240Ssammwl_tx_dmasetup(struct mwl_softc *sc, struct mwl_txbuf *bf, struct mbuf *m0) 3051193240Ssam{ 3052193240Ssam struct mbuf *m; 3053193240Ssam int error; 3054193240Ssam 3055193240Ssam /* 3056193240Ssam * Load the DMA map so any coalescing is done. This 3057193240Ssam * also calculates the number of descriptors we need. 3058193240Ssam */ 3059193240Ssam error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 3060193240Ssam bf->bf_segs, &bf->bf_nseg, 3061193240Ssam BUS_DMA_NOWAIT); 3062193240Ssam if (error == EFBIG) { 3063193240Ssam /* XXX packet requires too many descriptors */ 3064193240Ssam bf->bf_nseg = MWL_TXDESC+1; 3065193240Ssam } else if (error != 0) { 3066193240Ssam sc->sc_stats.mst_tx_busdma++; 3067193240Ssam m_freem(m0); 3068193240Ssam return error; 3069193240Ssam } 3070193240Ssam /* 3071193240Ssam * Discard null packets and check for packets that 3072193240Ssam * require too many TX descriptors. We try to convert 3073193240Ssam * the latter to a cluster. 3074193240Ssam */ 3075193240Ssam if (error == EFBIG) { /* too many desc's, linearize */ 3076193240Ssam sc->sc_stats.mst_tx_linear++; 3077193240Ssam#if MWL_TXDESC > 1 3078243857Sglebius m = m_collapse(m0, M_NOWAIT, MWL_TXDESC); 3079193240Ssam#else 3080243857Sglebius m = m_defrag(m0, M_NOWAIT); 3081193240Ssam#endif 3082193240Ssam if (m == NULL) { 3083193240Ssam m_freem(m0); 3084193240Ssam sc->sc_stats.mst_tx_nombuf++; 3085193240Ssam return ENOMEM; 3086193240Ssam } 3087193240Ssam m0 = m; 3088193240Ssam error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 3089193240Ssam bf->bf_segs, &bf->bf_nseg, 3090193240Ssam BUS_DMA_NOWAIT); 3091193240Ssam if (error != 0) { 3092193240Ssam sc->sc_stats.mst_tx_busdma++; 3093193240Ssam m_freem(m0); 3094193240Ssam return error; 3095193240Ssam } 3096193240Ssam KASSERT(bf->bf_nseg <= MWL_TXDESC, 3097193240Ssam ("too many segments after defrag; nseg %u", bf->bf_nseg)); 3098193240Ssam } else if (bf->bf_nseg == 0) { /* null packet, discard */ 3099193240Ssam sc->sc_stats.mst_tx_nodata++; 3100193240Ssam m_freem(m0); 3101193240Ssam return EIO; 3102193240Ssam } 3103193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, "%s: m %p len %u\n", 3104193240Ssam __func__, m0, m0->m_pkthdr.len); 3105193240Ssam bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 3106193240Ssam bf->bf_m = m0; 3107193240Ssam 3108193240Ssam return 0; 3109193240Ssam} 3110193240Ssam 3111193240Ssamstatic __inline int 3112193240Ssammwl_cvtlegacyrate(int rate) 3113193240Ssam{ 3114193240Ssam switch (rate) { 3115193240Ssam case 2: return 0; 3116193240Ssam case 4: return 1; 3117193240Ssam case 11: return 2; 3118193240Ssam case 22: return 3; 3119193240Ssam case 44: return 4; 3120193240Ssam case 12: return 5; 3121193240Ssam case 18: return 6; 3122193240Ssam case 24: return 7; 3123193240Ssam case 36: return 8; 3124193240Ssam case 48: return 9; 3125193240Ssam case 72: return 10; 3126193240Ssam case 96: return 11; 3127193240Ssam case 108:return 12; 3128193240Ssam } 3129193240Ssam return 0; 3130193240Ssam} 3131193240Ssam 3132193240Ssam/* 3133193240Ssam * Calculate fixed tx rate information per client state; 3134193240Ssam * this value is suitable for writing to the Format field 3135193240Ssam * of a tx descriptor. 3136193240Ssam */ 3137193240Ssamstatic uint16_t 3138193240Ssammwl_calcformat(uint8_t rate, const struct ieee80211_node *ni) 3139193240Ssam{ 3140193240Ssam uint16_t fmt; 3141193240Ssam 3142193240Ssam fmt = SM(3, EAGLE_TXD_ANTENNA) 3143193240Ssam | (IEEE80211_IS_CHAN_HT40D(ni->ni_chan) ? 3144193240Ssam EAGLE_TXD_EXTCHAN_LO : EAGLE_TXD_EXTCHAN_HI); 3145195171Ssam if (rate & IEEE80211_RATE_MCS) { /* HT MCS */ 3146193240Ssam fmt |= EAGLE_TXD_FORMAT_HT 3147193240Ssam /* NB: 0x80 implicitly stripped from ucastrate */ 3148193240Ssam | SM(rate, EAGLE_TXD_RATE); 3149193240Ssam /* XXX short/long GI may be wrong; re-check */ 3150193240Ssam if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) { 3151193240Ssam fmt |= EAGLE_TXD_CHW_40 3152193240Ssam | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40 ? 3153193240Ssam EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG); 3154193240Ssam } else { 3155193240Ssam fmt |= EAGLE_TXD_CHW_20 3156193240Ssam | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20 ? 3157193240Ssam EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG); 3158193240Ssam } 3159193240Ssam } else { /* legacy rate */ 3160193240Ssam fmt |= EAGLE_TXD_FORMAT_LEGACY 3161193240Ssam | SM(mwl_cvtlegacyrate(rate), EAGLE_TXD_RATE) 3162193240Ssam | EAGLE_TXD_CHW_20 3163193240Ssam /* XXX iv_flags & IEEE80211_F_SHPREAMBLE? */ 3164193240Ssam | (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE ? 3165193240Ssam EAGLE_TXD_PREAMBLE_SHORT : EAGLE_TXD_PREAMBLE_LONG); 3166193240Ssam } 3167193240Ssam return fmt; 3168193240Ssam} 3169193240Ssam 3170193240Ssamstatic int 3171193240Ssammwl_tx_start(struct mwl_softc *sc, struct ieee80211_node *ni, struct mwl_txbuf *bf, 3172193240Ssam struct mbuf *m0) 3173193240Ssam{ 3174193240Ssam#define IEEE80211_DIR_DSTODS(wh) \ 3175193240Ssam ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 3176193240Ssam struct ifnet *ifp = sc->sc_ifp; 3177193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3178193240Ssam struct ieee80211vap *vap = ni->ni_vap; 3179193240Ssam int error, iswep, ismcast; 3180193240Ssam int hdrlen, copyhdrlen, pktlen; 3181193240Ssam struct mwl_txdesc *ds; 3182193240Ssam struct mwl_txq *txq; 3183193240Ssam struct ieee80211_frame *wh; 3184193240Ssam struct mwltxrec *tr; 3185193240Ssam struct mwl_node *mn; 3186193240Ssam uint16_t qos; 3187193240Ssam#if MWL_TXDESC > 1 3188193240Ssam int i; 3189193240Ssam#endif 3190193240Ssam 3191193240Ssam wh = mtod(m0, struct ieee80211_frame *); 3192260444Skevlo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 3193193240Ssam ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 3194193240Ssam hdrlen = ieee80211_anyhdrsize(wh); 3195193240Ssam copyhdrlen = hdrlen; 3196193240Ssam pktlen = m0->m_pkthdr.len; 3197193240Ssam if (IEEE80211_QOS_HAS_SEQ(wh)) { 3198193240Ssam if (IEEE80211_DIR_DSTODS(wh)) { 3199193240Ssam qos = *(uint16_t *) 3200193240Ssam (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 3201193240Ssam copyhdrlen -= sizeof(qos); 3202193240Ssam } else 3203193240Ssam qos = *(uint16_t *) 3204193240Ssam (((struct ieee80211_qosframe *) wh)->i_qos); 3205193240Ssam } else 3206193240Ssam qos = 0; 3207193240Ssam 3208193240Ssam if (iswep) { 3209193240Ssam const struct ieee80211_cipher *cip; 3210193240Ssam struct ieee80211_key *k; 3211193240Ssam 3212193240Ssam /* 3213193240Ssam * Construct the 802.11 header+trailer for an encrypted 3214193240Ssam * frame. The only reason this can fail is because of an 3215193240Ssam * unknown or unsupported cipher/key type. 3216193240Ssam * 3217193240Ssam * NB: we do this even though the firmware will ignore 3218193240Ssam * what we've done for WEP and TKIP as we need the 3219193240Ssam * ExtIV filled in for CCMP and this also adjusts 3220193240Ssam * the headers which simplifies our work below. 3221193240Ssam */ 3222193240Ssam k = ieee80211_crypto_encap(ni, m0); 3223193240Ssam if (k == NULL) { 3224193240Ssam /* 3225193240Ssam * This can happen when the key is yanked after the 3226193240Ssam * frame was queued. Just discard the frame; the 3227193240Ssam * 802.11 layer counts failures and provides 3228193240Ssam * debugging/diagnostics. 3229193240Ssam */ 3230193240Ssam m_freem(m0); 3231193240Ssam return EIO; 3232193240Ssam } 3233193240Ssam /* 3234193240Ssam * Adjust the packet length for the crypto additions 3235193240Ssam * done during encap and any other bits that the f/w 3236193240Ssam * will add later on. 3237193240Ssam */ 3238193240Ssam cip = k->wk_cipher; 3239193240Ssam pktlen += cip->ic_header + cip->ic_miclen + cip->ic_trailer; 3240193240Ssam 3241193240Ssam /* packet header may have moved, reset our local pointer */ 3242193240Ssam wh = mtod(m0, struct ieee80211_frame *); 3243193240Ssam } 3244193240Ssam 3245193240Ssam if (ieee80211_radiotap_active_vap(vap)) { 3246193240Ssam sc->sc_tx_th.wt_flags = 0; /* XXX */ 3247193240Ssam if (iswep) 3248193240Ssam sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3249193240Ssam#if 0 3250193240Ssam sc->sc_tx_th.wt_rate = ds->DataRate; 3251193240Ssam#endif 3252193240Ssam sc->sc_tx_th.wt_txpower = ni->ni_txpower; 3253193240Ssam sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 3254193240Ssam 3255193240Ssam ieee80211_radiotap_tx(vap, m0); 3256193240Ssam } 3257193240Ssam /* 3258193240Ssam * Copy up/down the 802.11 header; the firmware requires 3259193240Ssam * we present a 2-byte payload length followed by a 3260193240Ssam * 4-address header (w/o QoS), followed (optionally) by 3261193240Ssam * any WEP/ExtIV header (but only filled in for CCMP). 3262193240Ssam * We are assured the mbuf has sufficient headroom to 3263193240Ssam * prepend in-place by the setup of ic_headroom in 3264193240Ssam * mwl_attach. 3265193240Ssam */ 3266193240Ssam if (hdrlen < sizeof(struct mwltxrec)) { 3267193240Ssam const int space = sizeof(struct mwltxrec) - hdrlen; 3268193240Ssam if (M_LEADINGSPACE(m0) < space) { 3269193240Ssam /* NB: should never happen */ 3270193240Ssam device_printf(sc->sc_dev, 3271193240Ssam "not enough headroom, need %d found %zd, " 3272193240Ssam "m_flags 0x%x m_len %d\n", 3273193240Ssam space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 3274193240Ssam ieee80211_dump_pkt(ic, 3275193240Ssam mtod(m0, const uint8_t *), m0->m_len, 0, -1); 3276193240Ssam m_freem(m0); 3277193240Ssam sc->sc_stats.mst_tx_noheadroom++; 3278193240Ssam return EIO; 3279193240Ssam } 3280193240Ssam M_PREPEND(m0, space, M_NOWAIT); 3281193240Ssam } 3282193240Ssam tr = mtod(m0, struct mwltxrec *); 3283193240Ssam if (wh != (struct ieee80211_frame *) &tr->wh) 3284193240Ssam ovbcopy(wh, &tr->wh, hdrlen); 3285193240Ssam /* 3286193240Ssam * Note: the "firmware length" is actually the length 3287193240Ssam * of the fully formed "802.11 payload". That is, it's 3288193240Ssam * everything except for the 802.11 header. In particular 3289193240Ssam * this includes all crypto material including the MIC! 3290193240Ssam */ 3291193240Ssam tr->fwlen = htole16(pktlen - hdrlen); 3292193240Ssam 3293193240Ssam /* 3294193240Ssam * Load the DMA map so any coalescing is done. This 3295193240Ssam * also calculates the number of descriptors we need. 3296193240Ssam */ 3297193240Ssam error = mwl_tx_dmasetup(sc, bf, m0); 3298193240Ssam if (error != 0) { 3299193240Ssam /* NB: stat collected in mwl_tx_dmasetup */ 3300193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, 3301193240Ssam "%s: unable to setup dma\n", __func__); 3302193240Ssam return error; 3303193240Ssam } 3304193240Ssam bf->bf_node = ni; /* NB: held reference */ 3305193240Ssam m0 = bf->bf_m; /* NB: may have changed */ 3306193240Ssam tr = mtod(m0, struct mwltxrec *); 3307193240Ssam wh = (struct ieee80211_frame *)&tr->wh; 3308193240Ssam 3309193240Ssam /* 3310193240Ssam * Formulate tx descriptor. 3311193240Ssam */ 3312193240Ssam ds = bf->bf_desc; 3313193240Ssam txq = bf->bf_txq; 3314193240Ssam 3315193240Ssam ds->QosCtrl = qos; /* NB: already little-endian */ 3316193240Ssam#if MWL_TXDESC == 1 3317193240Ssam /* 3318193240Ssam * NB: multiframes should be zero because the descriptors 3319193240Ssam * are initialized to zero. This should handle the case 3320193240Ssam * where the driver is built with MWL_TXDESC=1 but we are 3321193240Ssam * using firmware with multi-segment support. 3322193240Ssam */ 3323193240Ssam ds->PktPtr = htole32(bf->bf_segs[0].ds_addr); 3324193240Ssam ds->PktLen = htole16(bf->bf_segs[0].ds_len); 3325193240Ssam#else 3326193240Ssam ds->multiframes = htole32(bf->bf_nseg); 3327193240Ssam ds->PktLen = htole16(m0->m_pkthdr.len); 3328193240Ssam for (i = 0; i < bf->bf_nseg; i++) { 3329193240Ssam ds->PktPtrArray[i] = htole32(bf->bf_segs[i].ds_addr); 3330193240Ssam ds->PktLenArray[i] = htole16(bf->bf_segs[i].ds_len); 3331193240Ssam } 3332193240Ssam#endif 3333193240Ssam /* NB: pPhysNext, DataRate, and SapPktInfo setup once, don't touch */ 3334193240Ssam ds->Format = 0; 3335193240Ssam ds->pad = 0; 3336195171Ssam ds->ack_wcb_addr = 0; 3337193240Ssam 3338193240Ssam mn = MWL_NODE(ni); 3339193240Ssam /* 3340193240Ssam * Select transmit rate. 3341193240Ssam */ 3342193240Ssam switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 3343193240Ssam case IEEE80211_FC0_TYPE_MGT: 3344193240Ssam sc->sc_stats.mst_tx_mgmt++; 3345193240Ssam /* fall thru... */ 3346193240Ssam case IEEE80211_FC0_TYPE_CTL: 3347193240Ssam /* NB: assign to BE q to avoid bursting */ 3348193240Ssam ds->TxPriority = MWL_WME_AC_BE; 3349193240Ssam break; 3350193240Ssam case IEEE80211_FC0_TYPE_DATA: 3351193240Ssam if (!ismcast) { 3352193240Ssam const struct ieee80211_txparam *tp = ni->ni_txparms; 3353193240Ssam /* 3354193240Ssam * EAPOL frames get forced to a fixed rate and w/o 3355193240Ssam * aggregation; otherwise check for any fixed rate 3356193240Ssam * for the client (may depend on association state). 3357193240Ssam */ 3358193240Ssam if (m0->m_flags & M_EAPOL) { 3359193240Ssam const struct mwl_vap *mvp = MWL_VAP_CONST(vap); 3360193240Ssam ds->Format = mvp->mv_eapolformat; 3361193240Ssam ds->pad = htole16( 3362193240Ssam EAGLE_TXD_FIXED_RATE | EAGLE_TXD_DONT_AGGR); 3363195171Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 3364193240Ssam /* XXX pre-calculate per node */ 3365193240Ssam ds->Format = htole16( 3366193240Ssam mwl_calcformat(tp->ucastrate, ni)); 3367193240Ssam ds->pad = htole16(EAGLE_TXD_FIXED_RATE); 3368193240Ssam } 3369193240Ssam /* NB: EAPOL frames will never have qos set */ 3370193240Ssam if (qos == 0) 3371193240Ssam ds->TxPriority = txq->qnum; 3372193240Ssam#if MWL_MAXBA > 3 3373193240Ssam else if (mwl_bastream_match(&mn->mn_ba[3], qos)) 3374193240Ssam ds->TxPriority = mn->mn_ba[3].txq; 3375193240Ssam#endif 3376193240Ssam#if MWL_MAXBA > 2 3377193240Ssam else if (mwl_bastream_match(&mn->mn_ba[2], qos)) 3378193240Ssam ds->TxPriority = mn->mn_ba[2].txq; 3379193240Ssam#endif 3380193240Ssam#if MWL_MAXBA > 1 3381193240Ssam else if (mwl_bastream_match(&mn->mn_ba[1], qos)) 3382193240Ssam ds->TxPriority = mn->mn_ba[1].txq; 3383193240Ssam#endif 3384193240Ssam#if MWL_MAXBA > 0 3385193240Ssam else if (mwl_bastream_match(&mn->mn_ba[0], qos)) 3386193240Ssam ds->TxPriority = mn->mn_ba[0].txq; 3387193240Ssam#endif 3388193240Ssam else 3389193240Ssam ds->TxPriority = txq->qnum; 3390193240Ssam } else 3391193240Ssam ds->TxPriority = txq->qnum; 3392193240Ssam break; 3393193240Ssam default: 3394193240Ssam if_printf(ifp, "bogus frame type 0x%x (%s)\n", 3395193240Ssam wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 3396193240Ssam sc->sc_stats.mst_tx_badframetype++; 3397193240Ssam m_freem(m0); 3398193240Ssam return EIO; 3399193240Ssam } 3400193240Ssam 3401193240Ssam if (IFF_DUMPPKTS_XMIT(sc)) 3402193240Ssam ieee80211_dump_pkt(ic, 3403193240Ssam mtod(m0, const uint8_t *)+sizeof(uint16_t), 3404193240Ssam m0->m_len - sizeof(uint16_t), ds->DataRate, -1); 3405193240Ssam 3406193240Ssam MWL_TXQ_LOCK(txq); 3407193240Ssam ds->Status = htole32(EAGLE_TXD_STATUS_FW_OWNED); 3408193240Ssam STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 3409193240Ssam MWL_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3410193240Ssam 3411271810Sglebius if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 3412199559Sjhb sc->sc_tx_timer = 5; 3413193240Ssam MWL_TXQ_UNLOCK(txq); 3414193240Ssam 3415193240Ssam return 0; 3416193240Ssam#undef IEEE80211_DIR_DSTODS 3417193240Ssam} 3418193240Ssam 3419193240Ssamstatic __inline int 3420193240Ssammwl_cvtlegacyrix(int rix) 3421193240Ssam{ 3422193240Ssam#define N(x) (sizeof(x)/sizeof(x[0])) 3423193240Ssam static const int ieeerates[] = 3424193240Ssam { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 72, 96, 108 }; 3425193240Ssam return (rix < N(ieeerates) ? ieeerates[rix] : 0); 3426193240Ssam#undef N 3427193240Ssam} 3428193240Ssam 3429193240Ssam/* 3430193240Ssam * Process completed xmit descriptors from the specified queue. 3431193240Ssam */ 3432193240Ssamstatic int 3433193240Ssammwl_tx_processq(struct mwl_softc *sc, struct mwl_txq *txq) 3434193240Ssam{ 3435193240Ssam#define EAGLE_TXD_STATUS_MCAST \ 3436193240Ssam (EAGLE_TXD_STATUS_MULTICAST_TX | EAGLE_TXD_STATUS_BROADCAST_TX) 3437193240Ssam struct ifnet *ifp = sc->sc_ifp; 3438193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3439193240Ssam struct mwl_txbuf *bf; 3440193240Ssam struct mwl_txdesc *ds; 3441193240Ssam struct ieee80211_node *ni; 3442193240Ssam struct mwl_node *an; 3443193240Ssam int nreaped; 3444193240Ssam uint32_t status; 3445193240Ssam 3446193240Ssam DPRINTF(sc, MWL_DEBUG_TX_PROC, "%s: tx queue %u\n", __func__, txq->qnum); 3447193240Ssam for (nreaped = 0;; nreaped++) { 3448193240Ssam MWL_TXQ_LOCK(txq); 3449193240Ssam bf = STAILQ_FIRST(&txq->active); 3450193240Ssam if (bf == NULL) { 3451193240Ssam MWL_TXQ_UNLOCK(txq); 3452193240Ssam break; 3453193240Ssam } 3454193240Ssam ds = bf->bf_desc; 3455193240Ssam MWL_TXDESC_SYNC(txq, ds, 3456193240Ssam BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 3457193240Ssam if (ds->Status & htole32(EAGLE_TXD_STATUS_FW_OWNED)) { 3458193240Ssam MWL_TXQ_UNLOCK(txq); 3459193240Ssam break; 3460193240Ssam } 3461193240Ssam STAILQ_REMOVE_HEAD(&txq->active, bf_list); 3462193240Ssam MWL_TXQ_UNLOCK(txq); 3463193240Ssam 3464193240Ssam#ifdef MWL_DEBUG 3465193240Ssam if (sc->sc_debug & MWL_DEBUG_XMIT_DESC) 3466193240Ssam mwl_printtxbuf(bf, txq->qnum, nreaped); 3467193240Ssam#endif 3468193240Ssam ni = bf->bf_node; 3469193240Ssam if (ni != NULL) { 3470193240Ssam an = MWL_NODE(ni); 3471193240Ssam status = le32toh(ds->Status); 3472193240Ssam if (status & EAGLE_TXD_STATUS_OK) { 3473193240Ssam uint16_t Format = le16toh(ds->Format); 3474193240Ssam uint8_t txant = MS(Format, EAGLE_TXD_ANTENNA); 3475193240Ssam 3476193240Ssam sc->sc_stats.mst_ant_tx[txant]++; 3477193240Ssam if (status & EAGLE_TXD_STATUS_OK_RETRY) 3478193240Ssam sc->sc_stats.mst_tx_retries++; 3479193240Ssam if (status & EAGLE_TXD_STATUS_OK_MORE_RETRY) 3480193240Ssam sc->sc_stats.mst_tx_mretries++; 3481193240Ssam if (txq->qnum >= MWL_WME_AC_VO) 3482193240Ssam ic->ic_wme.wme_hipri_traffic++; 3483193240Ssam ni->ni_txrate = MS(Format, EAGLE_TXD_RATE); 3484193240Ssam if ((Format & EAGLE_TXD_FORMAT_HT) == 0) { 3485193240Ssam ni->ni_txrate = mwl_cvtlegacyrix( 3486193240Ssam ni->ni_txrate); 3487193240Ssam } else 3488193240Ssam ni->ni_txrate |= IEEE80211_RATE_MCS; 3489193240Ssam sc->sc_stats.mst_tx_rate = ni->ni_txrate; 3490193240Ssam } else { 3491193240Ssam if (status & EAGLE_TXD_STATUS_FAILED_LINK_ERROR) 3492193240Ssam sc->sc_stats.mst_tx_linkerror++; 3493193240Ssam if (status & EAGLE_TXD_STATUS_FAILED_XRETRY) 3494193240Ssam sc->sc_stats.mst_tx_xretries++; 3495193240Ssam if (status & EAGLE_TXD_STATUS_FAILED_AGING) 3496193240Ssam sc->sc_stats.mst_tx_aging++; 3497193240Ssam if (bf->bf_m->m_flags & M_FF) 3498193240Ssam sc->sc_stats.mst_ff_txerr++; 3499193240Ssam } 3500193240Ssam /* 3501193240Ssam * Do any tx complete callback. Note this must 3502193240Ssam * be done before releasing the node reference. 3503193240Ssam * XXX no way to figure out if frame was ACK'd 3504193240Ssam */ 3505193240Ssam if (bf->bf_m->m_flags & M_TXCB) { 3506193240Ssam /* XXX strip fw len in case header inspected */ 3507193240Ssam m_adj(bf->bf_m, sizeof(uint16_t)); 3508193240Ssam ieee80211_process_callback(ni, bf->bf_m, 3509193240Ssam (status & EAGLE_TXD_STATUS_OK) == 0); 3510193240Ssam } 3511193240Ssam /* 3512193240Ssam * Reclaim reference to node. 3513193240Ssam * 3514193240Ssam * NB: the node may be reclaimed here if, for example 3515193240Ssam * this is a DEAUTH message that was sent and the 3516193240Ssam * node was timed out due to inactivity. 3517193240Ssam */ 3518193240Ssam ieee80211_free_node(ni); 3519193240Ssam } 3520193240Ssam ds->Status = htole32(EAGLE_TXD_STATUS_IDLE); 3521193240Ssam 3522193240Ssam bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 3523193240Ssam BUS_DMASYNC_POSTWRITE); 3524193240Ssam bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 3525193240Ssam m_freem(bf->bf_m); 3526193240Ssam 3527193240Ssam mwl_puttxbuf_tail(txq, bf); 3528193240Ssam } 3529193240Ssam return nreaped; 3530193240Ssam#undef EAGLE_TXD_STATUS_MCAST 3531193240Ssam} 3532193240Ssam 3533193240Ssam/* 3534193240Ssam * Deferred processing of transmit interrupt; special-cased 3535193240Ssam * for four hardware queues, 0-3. 3536193240Ssam */ 3537193240Ssamstatic void 3538193240Ssammwl_tx_proc(void *arg, int npending) 3539193240Ssam{ 3540193240Ssam struct mwl_softc *sc = arg; 3541193240Ssam struct ifnet *ifp = sc->sc_ifp; 3542193240Ssam int nreaped; 3543193240Ssam 3544193240Ssam /* 3545193240Ssam * Process each active queue. 3546193240Ssam */ 3547193240Ssam nreaped = 0; 3548193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[0].active)) 3549193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[0]); 3550193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[1].active)) 3551193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[1]); 3552193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[2].active)) 3553193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[2]); 3554193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[3].active)) 3555193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[3]); 3556193240Ssam 3557193240Ssam if (nreaped != 0) { 3558193240Ssam ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3559199559Sjhb sc->sc_tx_timer = 0; 3560193240Ssam if (!IFQ_IS_EMPTY(&ifp->if_snd)) { 3561193240Ssam /* NB: kick fw; the tx thread may have been preempted */ 3562193240Ssam mwl_hal_txstart(sc->sc_mh, 0); 3563193240Ssam mwl_start(ifp); 3564193240Ssam } 3565193240Ssam } 3566193240Ssam} 3567193240Ssam 3568193240Ssamstatic void 3569193240Ssammwl_tx_draintxq(struct mwl_softc *sc, struct mwl_txq *txq) 3570193240Ssam{ 3571193240Ssam struct ieee80211_node *ni; 3572193240Ssam struct mwl_txbuf *bf; 3573193240Ssam u_int ix; 3574193240Ssam 3575193240Ssam /* 3576193240Ssam * NB: this assumes output has been stopped and 3577193240Ssam * we do not need to block mwl_tx_tasklet 3578193240Ssam */ 3579193240Ssam for (ix = 0;; ix++) { 3580193240Ssam MWL_TXQ_LOCK(txq); 3581193240Ssam bf = STAILQ_FIRST(&txq->active); 3582193240Ssam if (bf == NULL) { 3583193240Ssam MWL_TXQ_UNLOCK(txq); 3584193240Ssam break; 3585193240Ssam } 3586193240Ssam STAILQ_REMOVE_HEAD(&txq->active, bf_list); 3587193240Ssam MWL_TXQ_UNLOCK(txq); 3588193240Ssam#ifdef MWL_DEBUG 3589193240Ssam if (sc->sc_debug & MWL_DEBUG_RESET) { 3590193240Ssam struct ifnet *ifp = sc->sc_ifp; 3591193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3592193240Ssam const struct mwltxrec *tr = 3593193240Ssam mtod(bf->bf_m, const struct mwltxrec *); 3594193240Ssam mwl_printtxbuf(bf, txq->qnum, ix); 3595193240Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 3596193240Ssam bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 3597193240Ssam } 3598193240Ssam#endif /* MWL_DEBUG */ 3599193240Ssam bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 3600193240Ssam ni = bf->bf_node; 3601193240Ssam if (ni != NULL) { 3602193240Ssam /* 3603193240Ssam * Reclaim node reference. 3604193240Ssam */ 3605193240Ssam ieee80211_free_node(ni); 3606193240Ssam } 3607193240Ssam m_freem(bf->bf_m); 3608193240Ssam 3609193240Ssam mwl_puttxbuf_tail(txq, bf); 3610193240Ssam } 3611193240Ssam} 3612193240Ssam 3613193240Ssam/* 3614193240Ssam * Drain the transmit queues and reclaim resources. 3615193240Ssam */ 3616193240Ssamstatic void 3617193240Ssammwl_draintxq(struct mwl_softc *sc) 3618193240Ssam{ 3619193240Ssam struct ifnet *ifp = sc->sc_ifp; 3620193240Ssam int i; 3621193240Ssam 3622193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 3623193240Ssam mwl_tx_draintxq(sc, &sc->sc_txq[i]); 3624193240Ssam ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3625199559Sjhb sc->sc_tx_timer = 0; 3626193240Ssam} 3627193240Ssam 3628193240Ssam#ifdef MWL_DIAGAPI 3629193240Ssam/* 3630193240Ssam * Reset the transmit queues to a pristine state after a fw download. 3631193240Ssam */ 3632193240Ssamstatic void 3633193240Ssammwl_resettxq(struct mwl_softc *sc) 3634193240Ssam{ 3635193240Ssam int i; 3636193240Ssam 3637193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 3638193240Ssam mwl_txq_reset(sc, &sc->sc_txq[i]); 3639193240Ssam} 3640193240Ssam#endif /* MWL_DIAGAPI */ 3641193240Ssam 3642193240Ssam/* 3643193240Ssam * Clear the transmit queues of any frames submitted for the 3644193240Ssam * specified vap. This is done when the vap is deleted so we 3645193240Ssam * don't potentially reference the vap after it is gone. 3646193240Ssam * Note we cannot remove the frames; we only reclaim the node 3647193240Ssam * reference. 3648193240Ssam */ 3649193240Ssamstatic void 3650193240Ssammwl_cleartxq(struct mwl_softc *sc, struct ieee80211vap *vap) 3651193240Ssam{ 3652193240Ssam struct mwl_txq *txq; 3653193240Ssam struct mwl_txbuf *bf; 3654193240Ssam int i; 3655193240Ssam 3656193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) { 3657193240Ssam txq = &sc->sc_txq[i]; 3658193240Ssam MWL_TXQ_LOCK(txq); 3659193240Ssam STAILQ_FOREACH(bf, &txq->active, bf_list) { 3660193240Ssam struct ieee80211_node *ni = bf->bf_node; 3661193240Ssam if (ni != NULL && ni->ni_vap == vap) { 3662193240Ssam bf->bf_node = NULL; 3663193240Ssam ieee80211_free_node(ni); 3664193240Ssam } 3665193240Ssam } 3666193240Ssam MWL_TXQ_UNLOCK(txq); 3667193240Ssam } 3668193240Ssam} 3669193240Ssam 3670195377Ssamstatic int 3671195377Ssammwl_recv_action(struct ieee80211_node *ni, const struct ieee80211_frame *wh, 3672195377Ssam const uint8_t *frm, const uint8_t *efrm) 3673193240Ssam{ 3674193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3675193240Ssam const struct ieee80211_action *ia; 3676193240Ssam 3677193240Ssam ia = (const struct ieee80211_action *) frm; 3678193240Ssam if (ia->ia_category == IEEE80211_ACTION_CAT_HT && 3679193240Ssam ia->ia_action == IEEE80211_ACTION_HT_MIMOPWRSAVE) { 3680193240Ssam const struct ieee80211_action_ht_mimopowersave *mps = 3681193240Ssam (const struct ieee80211_action_ht_mimopowersave *) ia; 3682193240Ssam 3683193240Ssam mwl_hal_setmimops(sc->sc_mh, ni->ni_macaddr, 3684193240Ssam mps->am_control & IEEE80211_A_HT_MIMOPWRSAVE_ENA, 3685193240Ssam MS(mps->am_control, IEEE80211_A_HT_MIMOPWRSAVE_MODE)); 3686195377Ssam return 0; 3687193240Ssam } else 3688195377Ssam return sc->sc_recv_action(ni, wh, frm, efrm); 3689193240Ssam} 3690193240Ssam 3691193240Ssamstatic int 3692193240Ssammwl_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 3693193240Ssam int dialogtoken, int baparamset, int batimeout) 3694193240Ssam{ 3695193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3696195171Ssam struct ieee80211vap *vap = ni->ni_vap; 3697193240Ssam struct mwl_node *mn = MWL_NODE(ni); 3698193240Ssam struct mwl_bastate *bas; 3699193240Ssam 3700193240Ssam bas = tap->txa_private; 3701193240Ssam if (bas == NULL) { 3702193240Ssam const MWL_HAL_BASTREAM *sp; 3703193240Ssam /* 3704193240Ssam * Check for a free BA stream slot. 3705193240Ssam */ 3706193240Ssam#if MWL_MAXBA > 3 3707193240Ssam if (mn->mn_ba[3].bastream == NULL) 3708193240Ssam bas = &mn->mn_ba[3]; 3709193240Ssam else 3710193240Ssam#endif 3711193240Ssam#if MWL_MAXBA > 2 3712193240Ssam if (mn->mn_ba[2].bastream == NULL) 3713193240Ssam bas = &mn->mn_ba[2]; 3714193240Ssam else 3715193240Ssam#endif 3716193240Ssam#if MWL_MAXBA > 1 3717193240Ssam if (mn->mn_ba[1].bastream == NULL) 3718193240Ssam bas = &mn->mn_ba[1]; 3719193240Ssam else 3720193240Ssam#endif 3721193240Ssam#if MWL_MAXBA > 0 3722193240Ssam if (mn->mn_ba[0].bastream == NULL) 3723193240Ssam bas = &mn->mn_ba[0]; 3724193240Ssam else 3725193240Ssam#endif 3726193240Ssam { 3727193240Ssam /* sta already has max BA streams */ 3728193240Ssam /* XXX assign BA stream to highest priority tid */ 3729193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3730193240Ssam "%s: already has max bastreams\n", __func__); 3731193240Ssam sc->sc_stats.mst_ampdu_reject++; 3732193240Ssam return 0; 3733193240Ssam } 3734193240Ssam /* NB: no held reference to ni */ 3735195171Ssam sp = mwl_hal_bastream_alloc(MWL_VAP(vap)->mv_hvap, 3736195171Ssam (baparamset & IEEE80211_BAPS_POLICY_IMMEDIATE) != 0, 3737234324Sadrian ni->ni_macaddr, tap->txa_tid, ni->ni_htparam, 3738195171Ssam ni, tap); 3739193240Ssam if (sp == NULL) { 3740193240Ssam /* 3741193240Ssam * No available stream, return 0 so no 3742193240Ssam * a-mpdu aggregation will be done. 3743193240Ssam */ 3744193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3745193240Ssam "%s: no bastream available\n", __func__); 3746193240Ssam sc->sc_stats.mst_ampdu_nostream++; 3747193240Ssam return 0; 3748193240Ssam } 3749193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: alloc bastream %p\n", 3750193240Ssam __func__, sp); 3751193240Ssam /* NB: qos is left zero so we won't match in mwl_tx_start */ 3752193240Ssam bas->bastream = sp; 3753193240Ssam tap->txa_private = bas; 3754193240Ssam } 3755193240Ssam /* fetch current seq# from the firmware; if available */ 3756193240Ssam if (mwl_hal_bastream_get_seqno(sc->sc_mh, bas->bastream, 3757195171Ssam vap->iv_opmode == IEEE80211_M_STA ? vap->iv_myaddr : ni->ni_macaddr, 3758193240Ssam &tap->txa_start) != 0) 3759193240Ssam tap->txa_start = 0; 3760193240Ssam return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, batimeout); 3761193240Ssam} 3762193240Ssam 3763193240Ssamstatic int 3764193240Ssammwl_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 3765193240Ssam int code, int baparamset, int batimeout) 3766193240Ssam{ 3767193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3768193240Ssam struct mwl_bastate *bas; 3769193240Ssam 3770193240Ssam bas = tap->txa_private; 3771193240Ssam if (bas == NULL) { 3772193240Ssam /* XXX should not happen */ 3773193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3774234324Sadrian "%s: no BA stream allocated, TID %d\n", 3775234324Sadrian __func__, tap->txa_tid); 3776193240Ssam sc->sc_stats.mst_addba_nostream++; 3777193240Ssam return 0; 3778193240Ssam } 3779193240Ssam if (code == IEEE80211_STATUS_SUCCESS) { 3780195171Ssam struct ieee80211vap *vap = ni->ni_vap; 3781193240Ssam int bufsiz, error; 3782193240Ssam 3783193240Ssam /* 3784193240Ssam * Tell the firmware to setup the BA stream; 3785193240Ssam * we know resources are available because we 3786193240Ssam * pre-allocated one before forming the request. 3787193240Ssam */ 3788193240Ssam bufsiz = MS(baparamset, IEEE80211_BAPS_BUFSIZ); 3789193240Ssam if (bufsiz == 0) 3790193240Ssam bufsiz = IEEE80211_AGGR_BAWMAX; 3791195171Ssam error = mwl_hal_bastream_create(MWL_VAP(vap)->mv_hvap, 3792195171Ssam bas->bastream, bufsiz, bufsiz, tap->txa_start); 3793193240Ssam if (error != 0) { 3794193240Ssam /* 3795193240Ssam * Setup failed, return immediately so no a-mpdu 3796193240Ssam * aggregation will be done. 3797193240Ssam */ 3798193240Ssam mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream); 3799193240Ssam mwl_bastream_free(bas); 3800193240Ssam tap->txa_private = NULL; 3801193240Ssam 3802193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3803234324Sadrian "%s: create failed, error %d, bufsiz %d TID %d " 3804193240Ssam "htparam 0x%x\n", __func__, error, bufsiz, 3805234324Sadrian tap->txa_tid, ni->ni_htparam); 3806193240Ssam sc->sc_stats.mst_bacreate_failed++; 3807193240Ssam return 0; 3808193240Ssam } 3809193240Ssam /* NB: cache txq to avoid ptr indirect */ 3810234324Sadrian mwl_bastream_setup(bas, tap->txa_tid, bas->bastream->txq); 3811193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3812234324Sadrian "%s: bastream %p assigned to txq %d TID %d bufsiz %d " 3813193240Ssam "htparam 0x%x\n", __func__, bas->bastream, 3814234324Sadrian bas->txq, tap->txa_tid, bufsiz, ni->ni_htparam); 3815193240Ssam } else { 3816193240Ssam /* 3817193240Ssam * Other side NAK'd us; return the resources. 3818193240Ssam */ 3819193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3820193240Ssam "%s: request failed with code %d, destroy bastream %p\n", 3821193240Ssam __func__, code, bas->bastream); 3822193240Ssam mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream); 3823193240Ssam mwl_bastream_free(bas); 3824193240Ssam tap->txa_private = NULL; 3825193240Ssam } 3826193240Ssam /* NB: firmware sends BAR so we don't need to */ 3827193240Ssam return sc->sc_addba_response(ni, tap, code, baparamset, batimeout); 3828193240Ssam} 3829193240Ssam 3830193240Ssamstatic void 3831193240Ssammwl_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 3832193240Ssam{ 3833193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3834193240Ssam struct mwl_bastate *bas; 3835193240Ssam 3836193240Ssam bas = tap->txa_private; 3837193240Ssam if (bas != NULL) { 3838193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: destroy bastream %p\n", 3839193240Ssam __func__, bas->bastream); 3840193240Ssam mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream); 3841193240Ssam mwl_bastream_free(bas); 3842193240Ssam tap->txa_private = NULL; 3843193240Ssam } 3844193240Ssam sc->sc_addba_stop(ni, tap); 3845193240Ssam} 3846193240Ssam 3847193240Ssam/* 3848193240Ssam * Setup the rx data structures. This should only be 3849193240Ssam * done once or we may get out of sync with the firmware. 3850193240Ssam */ 3851193240Ssamstatic int 3852193240Ssammwl_startrecv(struct mwl_softc *sc) 3853193240Ssam{ 3854193240Ssam if (!sc->sc_recvsetup) { 3855193240Ssam struct mwl_rxbuf *bf, *prev; 3856193240Ssam struct mwl_rxdesc *ds; 3857193240Ssam 3858193240Ssam prev = NULL; 3859193240Ssam STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 3860193240Ssam int error = mwl_rxbuf_init(sc, bf); 3861193240Ssam if (error != 0) { 3862193240Ssam DPRINTF(sc, MWL_DEBUG_RECV, 3863193240Ssam "%s: mwl_rxbuf_init failed %d\n", 3864193240Ssam __func__, error); 3865193240Ssam return error; 3866193240Ssam } 3867193240Ssam if (prev != NULL) { 3868193240Ssam ds = prev->bf_desc; 3869193240Ssam ds->pPhysNext = htole32(bf->bf_daddr); 3870193240Ssam } 3871193240Ssam prev = bf; 3872193240Ssam } 3873193240Ssam if (prev != NULL) { 3874193240Ssam ds = prev->bf_desc; 3875193240Ssam ds->pPhysNext = 3876193240Ssam htole32(STAILQ_FIRST(&sc->sc_rxbuf)->bf_daddr); 3877193240Ssam } 3878193240Ssam sc->sc_recvsetup = 1; 3879193240Ssam } 3880193240Ssam mwl_mode_init(sc); /* set filters, etc. */ 3881193240Ssam return 0; 3882193240Ssam} 3883193240Ssam 3884193240Ssamstatic MWL_HAL_APMODE 3885193240Ssammwl_getapmode(const struct ieee80211vap *vap, struct ieee80211_channel *chan) 3886193240Ssam{ 3887193240Ssam MWL_HAL_APMODE mode; 3888193240Ssam 3889193240Ssam if (IEEE80211_IS_CHAN_HT(chan)) { 3890193656Ssam if (vap->iv_flags_ht & IEEE80211_FHT_PUREN) 3891193240Ssam mode = AP_MODE_N_ONLY; 3892193240Ssam else if (IEEE80211_IS_CHAN_5GHZ(chan)) 3893193240Ssam mode = AP_MODE_AandN; 3894193240Ssam else if (vap->iv_flags & IEEE80211_F_PUREG) 3895193240Ssam mode = AP_MODE_GandN; 3896193240Ssam else 3897193240Ssam mode = AP_MODE_BandGandN; 3898193240Ssam } else if (IEEE80211_IS_CHAN_ANYG(chan)) { 3899193240Ssam if (vap->iv_flags & IEEE80211_F_PUREG) 3900193240Ssam mode = AP_MODE_G_ONLY; 3901193240Ssam else 3902193240Ssam mode = AP_MODE_MIXED; 3903193240Ssam } else if (IEEE80211_IS_CHAN_B(chan)) 3904193240Ssam mode = AP_MODE_B_ONLY; 3905193240Ssam else if (IEEE80211_IS_CHAN_A(chan)) 3906193240Ssam mode = AP_MODE_A_ONLY; 3907193240Ssam else 3908193240Ssam mode = AP_MODE_MIXED; /* XXX should not happen? */ 3909193240Ssam return mode; 3910193240Ssam} 3911193240Ssam 3912193240Ssamstatic int 3913193240Ssammwl_setapmode(struct ieee80211vap *vap, struct ieee80211_channel *chan) 3914193240Ssam{ 3915193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 3916193240Ssam return mwl_hal_setapmode(hvap, mwl_getapmode(vap, chan)); 3917193240Ssam} 3918193240Ssam 3919193240Ssam/* 3920193240Ssam * Set/change channels. 3921193240Ssam */ 3922193240Ssamstatic int 3923193240Ssammwl_chan_set(struct mwl_softc *sc, struct ieee80211_channel *chan) 3924193240Ssam{ 3925193240Ssam struct mwl_hal *mh = sc->sc_mh; 3926193240Ssam struct ifnet *ifp = sc->sc_ifp; 3927193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3928193240Ssam MWL_HAL_CHANNEL hchan; 3929193240Ssam int maxtxpow; 3930193240Ssam 3931193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 3932193240Ssam __func__, chan->ic_freq, chan->ic_flags); 3933193240Ssam 3934193240Ssam /* 3935193240Ssam * Convert to a HAL channel description with 3936193240Ssam * the flags constrained to reflect the current 3937193240Ssam * operating mode. 3938193240Ssam */ 3939193240Ssam mwl_mapchan(&hchan, chan); 3940193240Ssam mwl_hal_intrset(mh, 0); /* disable interrupts */ 3941193240Ssam#if 0 3942193240Ssam mwl_draintxq(sc); /* clear pending tx frames */ 3943193240Ssam#endif 3944193240Ssam mwl_hal_setchannel(mh, &hchan); 3945193240Ssam /* 3946193240Ssam * Tx power is cap'd by the regulatory setting and 3947193240Ssam * possibly a user-set limit. We pass the min of 3948193240Ssam * these to the hal to apply them to the cal data 3949193240Ssam * for this channel. 3950193240Ssam * XXX min bound? 3951193240Ssam */ 3952193240Ssam maxtxpow = 2*chan->ic_maxregpower; 3953193240Ssam if (maxtxpow > ic->ic_txpowlimit) 3954193240Ssam maxtxpow = ic->ic_txpowlimit; 3955193240Ssam mwl_hal_settxpower(mh, &hchan, maxtxpow / 2); 3956193240Ssam /* NB: potentially change mcast/mgt rates */ 3957193240Ssam mwl_setcurchanrates(sc); 3958193240Ssam 3959193240Ssam /* 3960193240Ssam * Update internal state. 3961193240Ssam */ 3962193240Ssam sc->sc_tx_th.wt_chan_freq = htole16(chan->ic_freq); 3963193240Ssam sc->sc_rx_th.wr_chan_freq = htole16(chan->ic_freq); 3964193240Ssam if (IEEE80211_IS_CHAN_A(chan)) { 3965193240Ssam sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_A); 3966193240Ssam sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_A); 3967193240Ssam } else if (IEEE80211_IS_CHAN_ANYG(chan)) { 3968193240Ssam sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 3969193240Ssam sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 3970193240Ssam } else { 3971193240Ssam sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 3972193240Ssam sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 3973193240Ssam } 3974193240Ssam sc->sc_curchan = hchan; 3975193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 3976193240Ssam 3977193240Ssam return 0; 3978193240Ssam} 3979193240Ssam 3980193240Ssamstatic void 3981193240Ssammwl_scan_start(struct ieee80211com *ic) 3982193240Ssam{ 3983193240Ssam struct ifnet *ifp = ic->ic_ifp; 3984193240Ssam struct mwl_softc *sc = ifp->if_softc; 3985193240Ssam 3986193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__); 3987193240Ssam} 3988193240Ssam 3989193240Ssamstatic void 3990193240Ssammwl_scan_end(struct ieee80211com *ic) 3991193240Ssam{ 3992193240Ssam struct ifnet *ifp = ic->ic_ifp; 3993193240Ssam struct mwl_softc *sc = ifp->if_softc; 3994193240Ssam 3995193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__); 3996193240Ssam} 3997193240Ssam 3998193240Ssamstatic void 3999193240Ssammwl_set_channel(struct ieee80211com *ic) 4000193240Ssam{ 4001193240Ssam struct ifnet *ifp = ic->ic_ifp; 4002193240Ssam struct mwl_softc *sc = ifp->if_softc; 4003193240Ssam 4004193240Ssam (void) mwl_chan_set(sc, ic->ic_curchan); 4005193240Ssam} 4006193240Ssam 4007193240Ssam/* 4008193240Ssam * Handle a channel switch request. We inform the firmware 4009193240Ssam * and mark the global state to suppress various actions. 4010193240Ssam * NB: we issue only one request to the fw; we may be called 4011193240Ssam * multiple times if there are multiple vap's. 4012193240Ssam */ 4013193240Ssamstatic void 4014193240Ssammwl_startcsa(struct ieee80211vap *vap) 4015193240Ssam{ 4016193240Ssam struct ieee80211com *ic = vap->iv_ic; 4017193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 4018193240Ssam MWL_HAL_CHANNEL hchan; 4019193240Ssam 4020193240Ssam if (sc->sc_csapending) 4021193240Ssam return; 4022193240Ssam 4023193240Ssam mwl_mapchan(&hchan, ic->ic_csa_newchan); 4024193240Ssam /* 1 =>'s quiet channel */ 4025193240Ssam mwl_hal_setchannelswitchie(sc->sc_mh, &hchan, 1, ic->ic_csa_count); 4026193240Ssam sc->sc_csapending = 1; 4027193240Ssam} 4028193240Ssam 4029193240Ssam/* 4030193240Ssam * Plumb any static WEP key for the station. This is 4031193240Ssam * necessary as we must propagate the key from the 4032193240Ssam * global key table of the vap to each sta db entry. 4033193240Ssam */ 4034193240Ssamstatic void 4035193240Ssammwl_setanywepkey(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 4036193240Ssam{ 4037193240Ssam if ((vap->iv_flags & (IEEE80211_F_PRIVACY|IEEE80211_F_WPA)) == 4038193240Ssam IEEE80211_F_PRIVACY && 4039193240Ssam vap->iv_def_txkey != IEEE80211_KEYIX_NONE && 4040193240Ssam vap->iv_nw_keys[vap->iv_def_txkey].wk_keyix != IEEE80211_KEYIX_NONE) 4041193240Ssam (void) mwl_key_set(vap, &vap->iv_nw_keys[vap->iv_def_txkey], mac); 4042193240Ssam} 4043193240Ssam 4044193240Ssamstatic int 4045193240Ssammwl_peerstadb(struct ieee80211_node *ni, int aid, int staid, MWL_HAL_PEERINFO *pi) 4046193240Ssam{ 4047193240Ssam#define WME(ie) ((const struct ieee80211_wme_info *) ie) 4048193240Ssam struct ieee80211vap *vap = ni->ni_vap; 4049193240Ssam struct mwl_hal_vap *hvap; 4050193240Ssam int error; 4051193240Ssam 4052193240Ssam if (vap->iv_opmode == IEEE80211_M_WDS) { 4053193240Ssam /* 4054193240Ssam * WDS vap's do not have a f/w vap; instead they piggyback 4055193240Ssam * on an AP vap and we must install the sta db entry and 4056193240Ssam * crypto state using that AP's handle (the WDS vap has none). 4057193240Ssam */ 4058193240Ssam hvap = MWL_VAP(vap)->mv_ap_hvap; 4059193240Ssam } else 4060193240Ssam hvap = MWL_VAP(vap)->mv_hvap; 4061193240Ssam error = mwl_hal_newstation(hvap, ni->ni_macaddr, 4062193240Ssam aid, staid, pi, 4063193240Ssam ni->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT), 4064193240Ssam ni->ni_ies.wme_ie != NULL ? WME(ni->ni_ies.wme_ie)->wme_info : 0); 4065193240Ssam if (error == 0) { 4066193240Ssam /* 4067193240Ssam * Setup security for this station. For sta mode this is 4068193240Ssam * needed even though do the same thing on transition to 4069193240Ssam * AUTH state because the call to mwl_hal_newstation 4070193240Ssam * clobbers the crypto state we setup. 4071193240Ssam */ 4072193240Ssam mwl_setanywepkey(vap, ni->ni_macaddr); 4073193240Ssam } 4074193240Ssam return error; 4075193240Ssam#undef WME 4076193240Ssam} 4077193240Ssam 4078193240Ssamstatic void 4079193240Ssammwl_setglobalkeys(struct ieee80211vap *vap) 4080193240Ssam{ 4081193240Ssam struct ieee80211_key *wk; 4082193240Ssam 4083193240Ssam wk = &vap->iv_nw_keys[0]; 4084193240Ssam for (; wk < &vap->iv_nw_keys[IEEE80211_WEP_NKID]; wk++) 4085193240Ssam if (wk->wk_keyix != IEEE80211_KEYIX_NONE) 4086193240Ssam (void) mwl_key_set(vap, wk, vap->iv_myaddr); 4087193240Ssam} 4088193240Ssam 4089193240Ssam/* 4090195171Ssam * Convert a legacy rate set to a firmware bitmask. 4091195171Ssam */ 4092195171Ssamstatic uint32_t 4093195171Ssamget_rate_bitmap(const struct ieee80211_rateset *rs) 4094195171Ssam{ 4095195171Ssam uint32_t rates; 4096195171Ssam int i; 4097195171Ssam 4098195171Ssam rates = 0; 4099195171Ssam for (i = 0; i < rs->rs_nrates; i++) 4100195171Ssam switch (rs->rs_rates[i] & IEEE80211_RATE_VAL) { 4101195171Ssam case 2: rates |= 0x001; break; 4102195171Ssam case 4: rates |= 0x002; break; 4103195171Ssam case 11: rates |= 0x004; break; 4104195171Ssam case 22: rates |= 0x008; break; 4105195171Ssam case 44: rates |= 0x010; break; 4106195171Ssam case 12: rates |= 0x020; break; 4107195171Ssam case 18: rates |= 0x040; break; 4108195171Ssam case 24: rates |= 0x080; break; 4109195171Ssam case 36: rates |= 0x100; break; 4110195171Ssam case 48: rates |= 0x200; break; 4111195171Ssam case 72: rates |= 0x400; break; 4112195171Ssam case 96: rates |= 0x800; break; 4113195171Ssam case 108: rates |= 0x1000; break; 4114195171Ssam } 4115195171Ssam return rates; 4116195171Ssam} 4117195171Ssam 4118195171Ssam/* 4119195171Ssam * Construct an HT firmware bitmask from an HT rate set. 4120195171Ssam */ 4121195171Ssamstatic uint32_t 4122195171Ssamget_htrate_bitmap(const struct ieee80211_htrateset *rs) 4123195171Ssam{ 4124195171Ssam uint32_t rates; 4125195171Ssam int i; 4126195171Ssam 4127195171Ssam rates = 0; 4128195171Ssam for (i = 0; i < rs->rs_nrates; i++) { 4129195171Ssam if (rs->rs_rates[i] < 16) 4130195171Ssam rates |= 1<<rs->rs_rates[i]; 4131195171Ssam } 4132195171Ssam return rates; 4133195171Ssam} 4134195171Ssam 4135195171Ssam/* 4136195171Ssam * Craft station database entry for station. 4137195171Ssam * NB: use host byte order here, the hal handles byte swapping. 4138195171Ssam */ 4139195171Ssamstatic MWL_HAL_PEERINFO * 4140195171Ssammkpeerinfo(MWL_HAL_PEERINFO *pi, const struct ieee80211_node *ni) 4141195171Ssam{ 4142195171Ssam const struct ieee80211vap *vap = ni->ni_vap; 4143195171Ssam 4144195171Ssam memset(pi, 0, sizeof(*pi)); 4145195171Ssam pi->LegacyRateBitMap = get_rate_bitmap(&ni->ni_rates); 4146195171Ssam pi->CapInfo = ni->ni_capinfo; 4147195171Ssam if (ni->ni_flags & IEEE80211_NODE_HT) { 4148195171Ssam /* HT capabilities, etc */ 4149195171Ssam pi->HTCapabilitiesInfo = ni->ni_htcap; 4150195171Ssam /* XXX pi.HTCapabilitiesInfo */ 4151195171Ssam pi->MacHTParamInfo = ni->ni_htparam; 4152195171Ssam pi->HTRateBitMap = get_htrate_bitmap(&ni->ni_htrates); 4153195171Ssam pi->AddHtInfo.ControlChan = ni->ni_htctlchan; 4154195171Ssam pi->AddHtInfo.AddChan = ni->ni_ht2ndchan; 4155195171Ssam pi->AddHtInfo.OpMode = ni->ni_htopmode; 4156195171Ssam pi->AddHtInfo.stbc = ni->ni_htstbc; 4157195171Ssam 4158195171Ssam /* constrain according to local configuration */ 4159195171Ssam if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI40) == 0) 4160195171Ssam pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI40; 4161195171Ssam if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI20) == 0) 4162195171Ssam pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI20; 4163195171Ssam if (ni->ni_chw != 40) 4164195171Ssam pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_CHWIDTH40; 4165195171Ssam } 4166195171Ssam return pi; 4167195171Ssam} 4168195171Ssam 4169195171Ssam/* 4170193240Ssam * Re-create the local sta db entry for a vap to ensure 4171193240Ssam * up to date WME state is pushed to the firmware. Because 4172193240Ssam * this resets crypto state this must be followed by a 4173193240Ssam * reload of any keys in the global key table. 4174193240Ssam */ 4175193240Ssamstatic int 4176193240Ssammwl_localstadb(struct ieee80211vap *vap) 4177193240Ssam{ 4178193240Ssam#define WME(ie) ((const struct ieee80211_wme_info *) ie) 4179193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 4180193240Ssam struct ieee80211_node *bss; 4181195171Ssam MWL_HAL_PEERINFO pi; 4182193240Ssam int error; 4183193240Ssam 4184193240Ssam switch (vap->iv_opmode) { 4185193240Ssam case IEEE80211_M_STA: 4186193240Ssam bss = vap->iv_bss; 4187195171Ssam error = mwl_hal_newstation(hvap, vap->iv_myaddr, 0, 0, 4188195171Ssam vap->iv_state == IEEE80211_S_RUN ? 4189195171Ssam mkpeerinfo(&pi, bss) : NULL, 4190195171Ssam (bss->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT)), 4191193240Ssam bss->ni_ies.wme_ie != NULL ? 4192193240Ssam WME(bss->ni_ies.wme_ie)->wme_info : 0); 4193193240Ssam if (error == 0) 4194193240Ssam mwl_setglobalkeys(vap); 4195193240Ssam break; 4196193240Ssam case IEEE80211_M_HOSTAP: 4197195618Srpaulo case IEEE80211_M_MBSS: 4198193240Ssam error = mwl_hal_newstation(hvap, vap->iv_myaddr, 4199193240Ssam 0, 0, NULL, vap->iv_flags & IEEE80211_F_WME, 0); 4200193240Ssam if (error == 0) 4201193240Ssam mwl_setglobalkeys(vap); 4202193240Ssam break; 4203193240Ssam default: 4204193240Ssam error = 0; 4205193240Ssam break; 4206193240Ssam } 4207193240Ssam return error; 4208193240Ssam#undef WME 4209193240Ssam} 4210193240Ssam 4211193240Ssamstatic int 4212193240Ssammwl_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 4213193240Ssam{ 4214193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 4215193240Ssam struct mwl_hal_vap *hvap = mvp->mv_hvap; 4216193240Ssam struct ieee80211com *ic = vap->iv_ic; 4217193240Ssam struct ieee80211_node *ni = NULL; 4218193240Ssam struct ifnet *ifp = ic->ic_ifp; 4219193240Ssam struct mwl_softc *sc = ifp->if_softc; 4220193240Ssam struct mwl_hal *mh = sc->sc_mh; 4221193240Ssam enum ieee80211_state ostate = vap->iv_state; 4222193240Ssam int error; 4223193240Ssam 4224193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: %s -> %s\n", 4225193240Ssam vap->iv_ifp->if_xname, __func__, 4226193240Ssam ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 4227193240Ssam 4228193240Ssam callout_stop(&sc->sc_timer); 4229193240Ssam /* 4230193240Ssam * Clear current radar detection state. 4231193240Ssam */ 4232193240Ssam if (ostate == IEEE80211_S_CAC) { 4233193240Ssam /* stop quiet mode radar detection */ 4234193240Ssam mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_STOP); 4235193240Ssam } else if (sc->sc_radarena) { 4236193240Ssam /* stop in-service radar detection */ 4237193240Ssam mwl_hal_setradardetection(mh, DR_DFS_DISABLE); 4238193240Ssam sc->sc_radarena = 0; 4239193240Ssam } 4240193240Ssam /* 4241193240Ssam * Carry out per-state actions before doing net80211 work. 4242193240Ssam */ 4243193240Ssam if (nstate == IEEE80211_S_INIT) { 4244193240Ssam /* NB: only ap+sta vap's have a fw entity */ 4245193240Ssam if (hvap != NULL) 4246193240Ssam mwl_hal_stop(hvap); 4247193240Ssam } else if (nstate == IEEE80211_S_SCAN) { 4248193240Ssam mwl_hal_start(hvap); 4249193240Ssam /* NB: this disables beacon frames */ 4250193240Ssam mwl_hal_setinframode(hvap); 4251193240Ssam } else if (nstate == IEEE80211_S_AUTH) { 4252193240Ssam /* 4253193240Ssam * Must create a sta db entry in case a WEP key needs to 4254193240Ssam * be plumbed. This entry will be overwritten if we 4255193240Ssam * associate; otherwise it will be reclaimed on node free. 4256193240Ssam */ 4257193240Ssam ni = vap->iv_bss; 4258193240Ssam MWL_NODE(ni)->mn_hvap = hvap; 4259193240Ssam (void) mwl_peerstadb(ni, 0, 0, NULL); 4260193240Ssam } else if (nstate == IEEE80211_S_CSA) { 4261193240Ssam /* XXX move to below? */ 4262195618Srpaulo if (vap->iv_opmode == IEEE80211_M_HOSTAP || 4263195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) 4264193240Ssam mwl_startcsa(vap); 4265193240Ssam } else if (nstate == IEEE80211_S_CAC) { 4266193240Ssam /* XXX move to below? */ 4267193240Ssam /* stop ap xmit and enable quiet mode radar detection */ 4268193240Ssam mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_START); 4269193240Ssam } 4270193240Ssam 4271193240Ssam /* 4272193240Ssam * Invoke the parent method to do net80211 work. 4273193240Ssam */ 4274193240Ssam error = mvp->mv_newstate(vap, nstate, arg); 4275193240Ssam 4276193240Ssam /* 4277193240Ssam * Carry out work that must be done after net80211 runs; 4278193240Ssam * this work requires up to date state (e.g. iv_bss). 4279193240Ssam */ 4280193240Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 4281193240Ssam /* NB: collect bss node again, it may have changed */ 4282193240Ssam ni = vap->iv_bss; 4283193240Ssam 4284193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, 4285193240Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 4286193240Ssam "capinfo 0x%04x chan %d\n", 4287193240Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 4288193240Ssam ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 4289193240Ssam ieee80211_chan2ieee(ic, ic->ic_curchan)); 4290193240Ssam 4291193240Ssam /* 4292195171Ssam * Recreate local sta db entry to update WME/HT state. 4293193240Ssam */ 4294193240Ssam mwl_localstadb(vap); 4295193240Ssam switch (vap->iv_opmode) { 4296193240Ssam case IEEE80211_M_HOSTAP: 4297195618Srpaulo case IEEE80211_M_MBSS: 4298193240Ssam if (ostate == IEEE80211_S_CAC) { 4299193240Ssam /* enable in-service radar detection */ 4300193240Ssam mwl_hal_setradardetection(mh, 4301193240Ssam DR_IN_SERVICE_MONITOR_START); 4302193240Ssam sc->sc_radarena = 1; 4303193240Ssam } 4304193240Ssam /* 4305193240Ssam * Allocate and setup the beacon frame 4306193240Ssam * (and related state). 4307193240Ssam */ 4308193240Ssam error = mwl_reset_vap(vap, IEEE80211_S_RUN); 4309193240Ssam if (error != 0) { 4310193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, 4311193240Ssam "%s: beacon setup failed, error %d\n", 4312193240Ssam __func__, error); 4313193240Ssam goto bad; 4314193240Ssam } 4315193240Ssam /* NB: must be after setting up beacon */ 4316193240Ssam mwl_hal_start(hvap); 4317193240Ssam break; 4318193240Ssam case IEEE80211_M_STA: 4319193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: aid 0x%x\n", 4320193240Ssam vap->iv_ifp->if_xname, __func__, ni->ni_associd); 4321193240Ssam /* 4322193240Ssam * Set state now that we're associated. 4323193240Ssam */ 4324193240Ssam mwl_hal_setassocid(hvap, ni->ni_bssid, ni->ni_associd); 4325193240Ssam mwl_setrates(vap); 4326193240Ssam mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold); 4327195171Ssam if ((vap->iv_flags & IEEE80211_F_DWDS) && 4328195171Ssam sc->sc_ndwdsvaps++ == 0) 4329195171Ssam mwl_hal_setdwds(mh, 1); 4330193240Ssam break; 4331193240Ssam case IEEE80211_M_WDS: 4332193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: bssid %s\n", 4333193240Ssam vap->iv_ifp->if_xname, __func__, 4334193240Ssam ether_sprintf(ni->ni_bssid)); 4335193240Ssam mwl_seteapolformat(vap); 4336193240Ssam break; 4337193240Ssam default: 4338193240Ssam break; 4339193240Ssam } 4340193240Ssam /* 4341193240Ssam * Set CS mode according to operating channel; 4342193240Ssam * this mostly an optimization for 5GHz. 4343193240Ssam * 4344193240Ssam * NB: must follow mwl_hal_start which resets csmode 4345193240Ssam */ 4346193240Ssam if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 4347193240Ssam mwl_hal_setcsmode(mh, CSMODE_AGGRESSIVE); 4348193240Ssam else 4349193240Ssam mwl_hal_setcsmode(mh, CSMODE_AUTO_ENA); 4350193240Ssam /* 4351193240Ssam * Start timer to prod firmware. 4352193240Ssam */ 4353193240Ssam if (sc->sc_ageinterval != 0) 4354193240Ssam callout_reset(&sc->sc_timer, sc->sc_ageinterval*hz, 4355193240Ssam mwl_agestations, sc); 4356193240Ssam } else if (nstate == IEEE80211_S_SLEEP) { 4357193240Ssam /* XXX set chip in power save */ 4358195171Ssam } else if ((vap->iv_flags & IEEE80211_F_DWDS) && 4359195171Ssam --sc->sc_ndwdsvaps == 0) 4360195171Ssam mwl_hal_setdwds(mh, 0); 4361193240Ssambad: 4362193240Ssam return error; 4363193240Ssam} 4364193240Ssam 4365193240Ssam/* 4366193240Ssam * Manage station id's; these are separate from AID's 4367193240Ssam * as AID's may have values out of the range of possible 4368193240Ssam * station id's acceptable to the firmware. 4369193240Ssam */ 4370193240Ssamstatic int 4371193240Ssamallocstaid(struct mwl_softc *sc, int aid) 4372193240Ssam{ 4373193240Ssam int staid; 4374193240Ssam 4375193240Ssam if (!(0 < aid && aid < MWL_MAXSTAID) || isset(sc->sc_staid, aid)) { 4376193240Ssam /* NB: don't use 0 */ 4377193240Ssam for (staid = 1; staid < MWL_MAXSTAID; staid++) 4378193240Ssam if (isclr(sc->sc_staid, staid)) 4379193240Ssam break; 4380193240Ssam } else 4381193240Ssam staid = aid; 4382193240Ssam setbit(sc->sc_staid, staid); 4383193240Ssam return staid; 4384193240Ssam} 4385193240Ssam 4386193240Ssamstatic void 4387193240Ssamdelstaid(struct mwl_softc *sc, int staid) 4388193240Ssam{ 4389193240Ssam clrbit(sc->sc_staid, staid); 4390193240Ssam} 4391193240Ssam 4392193240Ssam/* 4393193240Ssam * Setup driver-specific state for a newly associated node. 4394193240Ssam * Note that we're called also on a re-associate, the isnew 4395193240Ssam * param tells us if this is the first time or not. 4396193240Ssam */ 4397193240Ssamstatic void 4398193240Ssammwl_newassoc(struct ieee80211_node *ni, int isnew) 4399193240Ssam{ 4400193240Ssam struct ieee80211vap *vap = ni->ni_vap; 4401193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 4402193240Ssam struct mwl_node *mn = MWL_NODE(ni); 4403193240Ssam MWL_HAL_PEERINFO pi; 4404193240Ssam uint16_t aid; 4405193240Ssam int error; 4406193240Ssam 4407193240Ssam aid = IEEE80211_AID(ni->ni_associd); 4408193240Ssam if (isnew) { 4409193240Ssam mn->mn_staid = allocstaid(sc, aid); 4410193240Ssam mn->mn_hvap = MWL_VAP(vap)->mv_hvap; 4411193240Ssam } else { 4412193240Ssam mn = MWL_NODE(ni); 4413193240Ssam /* XXX reset BA stream? */ 4414193240Ssam } 4415193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: mac %s isnew %d aid %d staid %d\n", 4416193240Ssam __func__, ether_sprintf(ni->ni_macaddr), isnew, aid, mn->mn_staid); 4417195171Ssam error = mwl_peerstadb(ni, aid, mn->mn_staid, mkpeerinfo(&pi, ni)); 4418193240Ssam if (error != 0) { 4419193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, 4420193240Ssam "%s: error %d creating sta db entry\n", 4421193240Ssam __func__, error); 4422193240Ssam /* XXX how to deal with error? */ 4423193240Ssam } 4424193240Ssam} 4425193240Ssam 4426193240Ssam/* 4427193240Ssam * Periodically poke the firmware to age out station state 4428193240Ssam * (power save queues, pending tx aggregates). 4429193240Ssam */ 4430193240Ssamstatic void 4431193240Ssammwl_agestations(void *arg) 4432193240Ssam{ 4433193240Ssam struct mwl_softc *sc = arg; 4434193240Ssam 4435193240Ssam mwl_hal_setkeepalive(sc->sc_mh); 4436193240Ssam if (sc->sc_ageinterval != 0) /* NB: catch dynamic changes */ 4437195171Ssam callout_schedule(&sc->sc_timer, sc->sc_ageinterval*hz); 4438193240Ssam} 4439193240Ssam 4440193240Ssamstatic const struct mwl_hal_channel * 4441193240Ssamfindhalchannel(const MWL_HAL_CHANNELINFO *ci, int ieee) 4442193240Ssam{ 4443193240Ssam int i; 4444193240Ssam 4445193240Ssam for (i = 0; i < ci->nchannels; i++) { 4446193240Ssam const struct mwl_hal_channel *hc = &ci->channels[i]; 4447193240Ssam if (hc->ieee == ieee) 4448193240Ssam return hc; 4449193240Ssam } 4450193240Ssam return NULL; 4451193240Ssam} 4452193240Ssam 4453193240Ssamstatic int 4454193240Ssammwl_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd, 4455193240Ssam int nchan, struct ieee80211_channel chans[]) 4456193240Ssam{ 4457193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 4458193240Ssam struct mwl_hal *mh = sc->sc_mh; 4459193240Ssam const MWL_HAL_CHANNELINFO *ci; 4460193240Ssam int i; 4461193240Ssam 4462193240Ssam for (i = 0; i < nchan; i++) { 4463193240Ssam struct ieee80211_channel *c = &chans[i]; 4464193240Ssam const struct mwl_hal_channel *hc; 4465193240Ssam 4466193240Ssam if (IEEE80211_IS_CHAN_2GHZ(c)) { 4467193240Ssam mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_2DOT4GHZ, 4468193240Ssam IEEE80211_IS_CHAN_HT40(c) ? 4469193240Ssam MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci); 4470193240Ssam } else if (IEEE80211_IS_CHAN_5GHZ(c)) { 4471193240Ssam mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_5GHZ, 4472193240Ssam IEEE80211_IS_CHAN_HT40(c) ? 4473193240Ssam MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci); 4474193240Ssam } else { 4475193240Ssam if_printf(ic->ic_ifp, 4476193240Ssam "%s: channel %u freq %u/0x%x not 2.4/5GHz\n", 4477193240Ssam __func__, c->ic_ieee, c->ic_freq, c->ic_flags); 4478193240Ssam return EINVAL; 4479193240Ssam } 4480193240Ssam /* 4481193240Ssam * Verify channel has cal data and cap tx power. 4482193240Ssam */ 4483193240Ssam hc = findhalchannel(ci, c->ic_ieee); 4484193240Ssam if (hc != NULL) { 4485193240Ssam if (c->ic_maxpower > 2*hc->maxTxPow) 4486193240Ssam c->ic_maxpower = 2*hc->maxTxPow; 4487193240Ssam goto next; 4488193240Ssam } 4489193240Ssam if (IEEE80211_IS_CHAN_HT40(c)) { 4490193240Ssam /* 4491193240Ssam * Look for the extension channel since the 4492193240Ssam * hal table only has the primary channel. 4493193240Ssam */ 4494193240Ssam hc = findhalchannel(ci, c->ic_extieee); 4495193240Ssam if (hc != NULL) { 4496193240Ssam if (c->ic_maxpower > 2*hc->maxTxPow) 4497193240Ssam c->ic_maxpower = 2*hc->maxTxPow; 4498193240Ssam goto next; 4499193240Ssam } 4500193240Ssam } 4501193240Ssam if_printf(ic->ic_ifp, 4502193240Ssam "%s: no cal data for channel %u ext %u freq %u/0x%x\n", 4503193240Ssam __func__, c->ic_ieee, c->ic_extieee, 4504193240Ssam c->ic_freq, c->ic_flags); 4505193240Ssam return EINVAL; 4506193240Ssam next: 4507193240Ssam ; 4508193240Ssam } 4509193240Ssam return 0; 4510193240Ssam} 4511193240Ssam 4512193240Ssam#define IEEE80211_CHAN_HTG (IEEE80211_CHAN_HT|IEEE80211_CHAN_G) 4513193240Ssam#define IEEE80211_CHAN_HTA (IEEE80211_CHAN_HT|IEEE80211_CHAN_A) 4514193240Ssam 4515193240Ssamstatic void 4516193240Ssamaddchan(struct ieee80211_channel *c, int freq, int flags, int ieee, int txpow) 4517193240Ssam{ 4518193240Ssam c->ic_freq = freq; 4519193240Ssam c->ic_flags = flags; 4520193240Ssam c->ic_ieee = ieee; 4521193240Ssam c->ic_minpower = 0; 4522193240Ssam c->ic_maxpower = 2*txpow; 4523193240Ssam c->ic_maxregpower = txpow; 4524193240Ssam} 4525193240Ssam 4526193240Ssamstatic const struct ieee80211_channel * 4527193240Ssamfindchannel(const struct ieee80211_channel chans[], int nchans, 4528193240Ssam int freq, int flags) 4529193240Ssam{ 4530193240Ssam const struct ieee80211_channel *c; 4531193240Ssam int i; 4532193240Ssam 4533193240Ssam for (i = 0; i < nchans; i++) { 4534193240Ssam c = &chans[i]; 4535193240Ssam if (c->ic_freq == freq && c->ic_flags == flags) 4536193240Ssam return c; 4537193240Ssam } 4538193240Ssam return NULL; 4539193240Ssam} 4540193240Ssam 4541193240Ssamstatic void 4542193240Ssamaddht40channels(struct ieee80211_channel chans[], int maxchans, int *nchans, 4543193240Ssam const MWL_HAL_CHANNELINFO *ci, int flags) 4544193240Ssam{ 4545193240Ssam struct ieee80211_channel *c; 4546193240Ssam const struct ieee80211_channel *extc; 4547193240Ssam const struct mwl_hal_channel *hc; 4548193240Ssam int i; 4549193240Ssam 4550193240Ssam c = &chans[*nchans]; 4551193240Ssam 4552193240Ssam flags &= ~IEEE80211_CHAN_HT; 4553193240Ssam for (i = 0; i < ci->nchannels; i++) { 4554193240Ssam /* 4555193240Ssam * Each entry defines an HT40 channel pair; find the 4556193240Ssam * extension channel above and the insert the pair. 4557193240Ssam */ 4558193240Ssam hc = &ci->channels[i]; 4559193240Ssam extc = findchannel(chans, *nchans, hc->freq+20, 4560193240Ssam flags | IEEE80211_CHAN_HT20); 4561193240Ssam if (extc != NULL) { 4562193240Ssam if (*nchans >= maxchans) 4563193240Ssam break; 4564193240Ssam addchan(c, hc->freq, flags | IEEE80211_CHAN_HT40U, 4565193240Ssam hc->ieee, hc->maxTxPow); 4566193240Ssam c->ic_extieee = extc->ic_ieee; 4567193240Ssam c++, (*nchans)++; 4568193240Ssam if (*nchans >= maxchans) 4569193240Ssam break; 4570193240Ssam addchan(c, extc->ic_freq, flags | IEEE80211_CHAN_HT40D, 4571193240Ssam extc->ic_ieee, hc->maxTxPow); 4572193240Ssam c->ic_extieee = hc->ieee; 4573193240Ssam c++, (*nchans)++; 4574193240Ssam } 4575193240Ssam } 4576193240Ssam} 4577193240Ssam 4578193240Ssamstatic void 4579193240Ssamaddchannels(struct ieee80211_channel chans[], int maxchans, int *nchans, 4580193240Ssam const MWL_HAL_CHANNELINFO *ci, int flags) 4581193240Ssam{ 4582193240Ssam struct ieee80211_channel *c; 4583193240Ssam int i; 4584193240Ssam 4585193240Ssam c = &chans[*nchans]; 4586193240Ssam 4587193240Ssam for (i = 0; i < ci->nchannels; i++) { 4588193240Ssam const struct mwl_hal_channel *hc; 4589193240Ssam 4590193240Ssam hc = &ci->channels[i]; 4591193240Ssam if (*nchans >= maxchans) 4592193240Ssam break; 4593193240Ssam addchan(c, hc->freq, flags, hc->ieee, hc->maxTxPow); 4594193240Ssam c++, (*nchans)++; 4595193240Ssam if (flags == IEEE80211_CHAN_G || flags == IEEE80211_CHAN_HTG) { 4596193240Ssam /* g channel have a separate b-only entry */ 4597193240Ssam if (*nchans >= maxchans) 4598193240Ssam break; 4599193240Ssam c[0] = c[-1]; 4600193240Ssam c[-1].ic_flags = IEEE80211_CHAN_B; 4601193240Ssam c++, (*nchans)++; 4602193240Ssam } 4603193240Ssam if (flags == IEEE80211_CHAN_HTG) { 4604193240Ssam /* HT g channel have a separate g-only entry */ 4605193240Ssam if (*nchans >= maxchans) 4606193240Ssam break; 4607193240Ssam c[-1].ic_flags = IEEE80211_CHAN_G; 4608193240Ssam c[0] = c[-1]; 4609193240Ssam c[0].ic_flags &= ~IEEE80211_CHAN_HT; 4610193240Ssam c[0].ic_flags |= IEEE80211_CHAN_HT20; /* HT20 */ 4611193240Ssam c++, (*nchans)++; 4612193240Ssam } 4613193240Ssam if (flags == IEEE80211_CHAN_HTA) { 4614193240Ssam /* HT a channel have a separate a-only entry */ 4615193240Ssam if (*nchans >= maxchans) 4616193240Ssam break; 4617193240Ssam c[-1].ic_flags = IEEE80211_CHAN_A; 4618193240Ssam c[0] = c[-1]; 4619193240Ssam c[0].ic_flags &= ~IEEE80211_CHAN_HT; 4620193240Ssam c[0].ic_flags |= IEEE80211_CHAN_HT20; /* HT20 */ 4621193240Ssam c++, (*nchans)++; 4622193240Ssam } 4623193240Ssam } 4624193240Ssam} 4625193240Ssam 4626193240Ssamstatic void 4627193240Ssamgetchannels(struct mwl_softc *sc, int maxchans, int *nchans, 4628193240Ssam struct ieee80211_channel chans[]) 4629193240Ssam{ 4630193240Ssam const MWL_HAL_CHANNELINFO *ci; 4631193240Ssam 4632193240Ssam /* 4633193240Ssam * Use the channel info from the hal to craft the 4634193240Ssam * channel list. Note that we pass back an unsorted 4635193240Ssam * list; the caller is required to sort it for us 4636193240Ssam * (if desired). 4637193240Ssam */ 4638193240Ssam *nchans = 0; 4639193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4640193240Ssam MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0) 4641193240Ssam addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG); 4642193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4643193240Ssam MWL_FREQ_BAND_5GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0) 4644193240Ssam addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA); 4645193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4646193240Ssam MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0) 4647193240Ssam addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG); 4648193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4649193240Ssam MWL_FREQ_BAND_5GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0) 4650193240Ssam addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA); 4651193240Ssam} 4652193240Ssam 4653193240Ssamstatic void 4654193240Ssammwl_getradiocaps(struct ieee80211com *ic, 4655193240Ssam int maxchans, int *nchans, struct ieee80211_channel chans[]) 4656193240Ssam{ 4657193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 4658193240Ssam 4659193240Ssam getchannels(sc, maxchans, nchans, chans); 4660193240Ssam} 4661193240Ssam 4662193240Ssamstatic int 4663193240Ssammwl_getchannels(struct mwl_softc *sc) 4664193240Ssam{ 4665193240Ssam struct ifnet *ifp = sc->sc_ifp; 4666193240Ssam struct ieee80211com *ic = ifp->if_l2com; 4667193240Ssam 4668193240Ssam /* 4669193240Ssam * Use the channel info from the hal to craft the 4670193240Ssam * channel list for net80211. Note that we pass up 4671193240Ssam * an unsorted list; net80211 will sort it for us. 4672193240Ssam */ 4673193240Ssam memset(ic->ic_channels, 0, sizeof(ic->ic_channels)); 4674193240Ssam ic->ic_nchans = 0; 4675193240Ssam getchannels(sc, IEEE80211_CHAN_MAX, &ic->ic_nchans, ic->ic_channels); 4676193240Ssam 4677193240Ssam ic->ic_regdomain.regdomain = SKU_DEBUG; 4678193240Ssam ic->ic_regdomain.country = CTRY_DEFAULT; 4679193240Ssam ic->ic_regdomain.location = 'I'; 4680193240Ssam ic->ic_regdomain.isocc[0] = ' '; /* XXX? */ 4681193240Ssam ic->ic_regdomain.isocc[1] = ' '; 4682193240Ssam return (ic->ic_nchans == 0 ? EIO : 0); 4683193240Ssam} 4684193240Ssam#undef IEEE80211_CHAN_HTA 4685193240Ssam#undef IEEE80211_CHAN_HTG 4686193240Ssam 4687193240Ssam#ifdef MWL_DEBUG 4688193240Ssamstatic void 4689193240Ssammwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix) 4690193240Ssam{ 4691193240Ssam const struct mwl_rxdesc *ds = bf->bf_desc; 4692193240Ssam uint32_t status = le32toh(ds->Status); 4693193240Ssam 4694278532Smarius printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n" 4695193240Ssam " STAT:%02x LEN:%04x RSSI:%02x CHAN:%02x RATE:%02x QOS:%04x HT:%04x\n", 4696278532Smarius ix, ds, (uintmax_t)bf->bf_daddr, le32toh(ds->pPhysNext), 4697278532Smarius le32toh(ds->pPhysBuffData), ds->RxControl, 4698193240Ssam ds->RxControl != EAGLE_RXD_CTRL_DRIVER_OWN ? 4699193240Ssam "" : (status & EAGLE_RXD_STATUS_OK) ? " *" : " !", 4700193240Ssam ds->Status, le16toh(ds->PktLen), ds->RSSI, ds->Channel, 4701193240Ssam ds->Rate, le16toh(ds->QosCtrl), le16toh(ds->HtSig2)); 4702193240Ssam} 4703193240Ssam 4704193240Ssamstatic void 4705193240Ssammwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix) 4706193240Ssam{ 4707193240Ssam const struct mwl_txdesc *ds = bf->bf_desc; 4708193240Ssam uint32_t status = le32toh(ds->Status); 4709193240Ssam 4710193240Ssam printf("Q%u[%3u]", qnum, ix); 4711278532Smarius printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr); 4712193240Ssam printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 4713193240Ssam le32toh(ds->pPhysNext), 4714193240Ssam le32toh(ds->PktPtr), le16toh(ds->PktLen), status, 4715193240Ssam status & EAGLE_TXD_STATUS_USED ? 4716193240Ssam "" : (status & 3) != 0 ? " *" : " !"); 4717193240Ssam printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 4718193240Ssam ds->DataRate, ds->TxPriority, le16toh(ds->QosCtrl), 4719193240Ssam le32toh(ds->SapPktInfo), le16toh(ds->Format)); 4720193240Ssam#if MWL_TXDESC > 1 4721193240Ssam printf(" MULTIFRAMES:%u LEN:%04x %04x %04x %04x %04x %04x\n" 4722193240Ssam , le32toh(ds->multiframes) 4723193240Ssam , le16toh(ds->PktLenArray[0]), le16toh(ds->PktLenArray[1]) 4724193240Ssam , le16toh(ds->PktLenArray[2]), le16toh(ds->PktLenArray[3]) 4725193240Ssam , le16toh(ds->PktLenArray[4]), le16toh(ds->PktLenArray[5]) 4726193240Ssam ); 4727193240Ssam printf(" DATA:%08x %08x %08x %08x %08x %08x\n" 4728193240Ssam , le32toh(ds->PktPtrArray[0]), le32toh(ds->PktPtrArray[1]) 4729193240Ssam , le32toh(ds->PktPtrArray[2]), le32toh(ds->PktPtrArray[3]) 4730193240Ssam , le32toh(ds->PktPtrArray[4]), le32toh(ds->PktPtrArray[5]) 4731193240Ssam ); 4732193240Ssam#endif 4733193240Ssam#if 0 4734193240Ssam{ const uint8_t *cp = (const uint8_t *) ds; 4735193240Ssam int i; 4736193240Ssam for (i = 0; i < sizeof(struct mwl_txdesc); i++) { 4737193240Ssam printf("%02x ", cp[i]); 4738193240Ssam if (((i+1) % 16) == 0) 4739193240Ssam printf("\n"); 4740193240Ssam } 4741193240Ssam printf("\n"); 4742193240Ssam} 4743193240Ssam#endif 4744193240Ssam} 4745193240Ssam#endif /* MWL_DEBUG */ 4746193240Ssam 4747193240Ssam#if 0 4748193240Ssamstatic void 4749193240Ssammwl_txq_dump(struct mwl_txq *txq) 4750193240Ssam{ 4751193240Ssam struct mwl_txbuf *bf; 4752193240Ssam int i = 0; 4753193240Ssam 4754193240Ssam MWL_TXQ_LOCK(txq); 4755193240Ssam STAILQ_FOREACH(bf, &txq->active, bf_list) { 4756193240Ssam struct mwl_txdesc *ds = bf->bf_desc; 4757193240Ssam MWL_TXDESC_SYNC(txq, ds, 4758193240Ssam BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 4759193240Ssam#ifdef MWL_DEBUG 4760193240Ssam mwl_printtxbuf(bf, txq->qnum, i); 4761193240Ssam#endif 4762193240Ssam i++; 4763193240Ssam } 4764193240Ssam MWL_TXQ_UNLOCK(txq); 4765193240Ssam} 4766193240Ssam#endif 4767193240Ssam 4768193240Ssamstatic void 4769199559Sjhbmwl_watchdog(void *arg) 4770193240Ssam{ 4771199559Sjhb struct mwl_softc *sc; 4772199559Sjhb struct ifnet *ifp; 4773193240Ssam 4774199559Sjhb sc = arg; 4775199559Sjhb callout_reset(&sc->sc_watchdog, hz, mwl_watchdog, sc); 4776199559Sjhb if (sc->sc_tx_timer == 0 || --sc->sc_tx_timer > 0) 4777199559Sjhb return; 4778199559Sjhb 4779199559Sjhb ifp = sc->sc_ifp; 4780193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->sc_invalid) { 4781193240Ssam if (mwl_hal_setkeepalive(sc->sc_mh)) 4782193240Ssam if_printf(ifp, "transmit timeout (firmware hung?)\n"); 4783193240Ssam else 4784193240Ssam if_printf(ifp, "transmit timeout\n"); 4785193240Ssam#if 0 4786193240Ssam mwl_reset(ifp); 4787193240Ssammwl_txq_dump(&sc->sc_txq[0]);/*XXX*/ 4788193240Ssam#endif 4789271810Sglebius if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4790193240Ssam sc->sc_stats.mst_watchdog++; 4791193240Ssam } 4792193240Ssam} 4793193240Ssam 4794193240Ssam#ifdef MWL_DIAGAPI 4795193240Ssam/* 4796193240Ssam * Diagnostic interface to the HAL. This is used by various 4797193240Ssam * tools to do things like retrieve register contents for 4798193240Ssam * debugging. The mechanism is intentionally opaque so that 4799193240Ssam * it can change frequently w/o concern for compatiblity. 4800193240Ssam */ 4801193240Ssamstatic int 4802193240Ssammwl_ioctl_diag(struct mwl_softc *sc, struct mwl_diag *md) 4803193240Ssam{ 4804193240Ssam struct mwl_hal *mh = sc->sc_mh; 4805193240Ssam u_int id = md->md_id & MWL_DIAG_ID; 4806193240Ssam void *indata = NULL; 4807193240Ssam void *outdata = NULL; 4808193240Ssam u_int32_t insize = md->md_in_size; 4809193240Ssam u_int32_t outsize = md->md_out_size; 4810193240Ssam int error = 0; 4811193240Ssam 4812193240Ssam if (md->md_id & MWL_DIAG_IN) { 4813193240Ssam /* 4814193240Ssam * Copy in data. 4815193240Ssam */ 4816193240Ssam indata = malloc(insize, M_TEMP, M_NOWAIT); 4817193240Ssam if (indata == NULL) { 4818193240Ssam error = ENOMEM; 4819193240Ssam goto bad; 4820193240Ssam } 4821193240Ssam error = copyin(md->md_in_data, indata, insize); 4822193240Ssam if (error) 4823193240Ssam goto bad; 4824193240Ssam } 4825193240Ssam if (md->md_id & MWL_DIAG_DYN) { 4826193240Ssam /* 4827193240Ssam * Allocate a buffer for the results (otherwise the HAL 4828193240Ssam * returns a pointer to a buffer where we can read the 4829193240Ssam * results). Note that we depend on the HAL leaving this 4830193240Ssam * pointer for us to use below in reclaiming the buffer; 4831193240Ssam * may want to be more defensive. 4832193240Ssam */ 4833193240Ssam outdata = malloc(outsize, M_TEMP, M_NOWAIT); 4834193240Ssam if (outdata == NULL) { 4835193240Ssam error = ENOMEM; 4836193240Ssam goto bad; 4837193240Ssam } 4838193240Ssam } 4839193240Ssam if (mwl_hal_getdiagstate(mh, id, indata, insize, &outdata, &outsize)) { 4840193240Ssam if (outsize < md->md_out_size) 4841193240Ssam md->md_out_size = outsize; 4842193240Ssam if (outdata != NULL) 4843193240Ssam error = copyout(outdata, md->md_out_data, 4844193240Ssam md->md_out_size); 4845193240Ssam } else { 4846193240Ssam error = EINVAL; 4847193240Ssam } 4848193240Ssambad: 4849193240Ssam if ((md->md_id & MWL_DIAG_IN) && indata != NULL) 4850193240Ssam free(indata, M_TEMP); 4851193240Ssam if ((md->md_id & MWL_DIAG_DYN) && outdata != NULL) 4852193240Ssam free(outdata, M_TEMP); 4853193240Ssam return error; 4854193240Ssam} 4855193240Ssam 4856193240Ssamstatic int 4857193240Ssammwl_ioctl_reset(struct mwl_softc *sc, struct mwl_diag *md) 4858193240Ssam{ 4859193240Ssam struct mwl_hal *mh = sc->sc_mh; 4860193240Ssam int error; 4861193240Ssam 4862193240Ssam MWL_LOCK_ASSERT(sc); 4863193240Ssam 4864193240Ssam if (md->md_id == 0 && mwl_hal_fwload(mh, NULL) != 0) { 4865193240Ssam device_printf(sc->sc_dev, "unable to load firmware\n"); 4866193240Ssam return EIO; 4867193240Ssam } 4868193240Ssam if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) { 4869193240Ssam device_printf(sc->sc_dev, "unable to fetch h/w specs\n"); 4870193240Ssam return EIO; 4871193240Ssam } 4872193240Ssam error = mwl_setupdma(sc); 4873193240Ssam if (error != 0) { 4874193240Ssam /* NB: mwl_setupdma prints a msg */ 4875193240Ssam return error; 4876193240Ssam } 4877193240Ssam /* 4878193240Ssam * Reset tx/rx data structures; after reload we must 4879193240Ssam * re-start the driver's notion of the next xmit/recv. 4880193240Ssam */ 4881193240Ssam mwl_draintxq(sc); /* clear pending frames */ 4882193240Ssam mwl_resettxq(sc); /* rebuild tx q lists */ 4883193240Ssam sc->sc_rxnext = NULL; /* force rx to start at the list head */ 4884193240Ssam return 0; 4885193240Ssam} 4886193240Ssam#endif /* MWL_DIAGAPI */ 4887193240Ssam 4888193240Ssamstatic int 4889193240Ssammwl_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 4890193240Ssam{ 4891193240Ssam#define IS_RUNNING(ifp) \ 4892193240Ssam ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 4893193240Ssam struct mwl_softc *sc = ifp->if_softc; 4894193240Ssam struct ieee80211com *ic = ifp->if_l2com; 4895193240Ssam struct ifreq *ifr = (struct ifreq *)data; 4896193240Ssam int error = 0, startall; 4897193240Ssam 4898193240Ssam switch (cmd) { 4899193240Ssam case SIOCSIFFLAGS: 4900193240Ssam MWL_LOCK(sc); 4901193240Ssam startall = 0; 4902193240Ssam if (IS_RUNNING(ifp)) { 4903193240Ssam /* 4904193240Ssam * To avoid rescanning another access point, 4905193240Ssam * do not call mwl_init() here. Instead, 4906193240Ssam * only reflect promisc mode settings. 4907193240Ssam */ 4908193240Ssam mwl_mode_init(sc); 4909193240Ssam } else if (ifp->if_flags & IFF_UP) { 4910193240Ssam /* 4911193240Ssam * Beware of being called during attach/detach 4912193240Ssam * to reset promiscuous mode. In that case we 4913193240Ssam * will still be marked UP but not RUNNING. 4914193240Ssam * However trying to re-init the interface 4915193240Ssam * is the wrong thing to do as we've already 4916193240Ssam * torn down much of our state. There's 4917193240Ssam * probably a better way to deal with this. 4918193240Ssam */ 4919193240Ssam if (!sc->sc_invalid) { 4920193240Ssam mwl_init_locked(sc); /* XXX lose error */ 4921193240Ssam startall = 1; 4922193240Ssam } 4923193240Ssam } else 4924193240Ssam mwl_stop_locked(ifp, 1); 4925193240Ssam MWL_UNLOCK(sc); 4926193240Ssam if (startall) 4927193240Ssam ieee80211_start_all(ic); 4928193240Ssam break; 4929193240Ssam case SIOCGMVSTATS: 4930193240Ssam mwl_hal_gethwstats(sc->sc_mh, &sc->sc_stats.hw_stats); 4931193240Ssam /* NB: embed these numbers to get a consistent view */ 4932271810Sglebius sc->sc_stats.mst_tx_packets = 4933271810Sglebius ifp->if_get_counter(ifp, IFCOUNTER_OPACKETS); 4934271810Sglebius sc->sc_stats.mst_rx_packets = 4935271810Sglebius ifp->if_get_counter(ifp, IFCOUNTER_IPACKETS); 4936193240Ssam /* 4937193240Ssam * NB: Drop the softc lock in case of a page fault; 4938193240Ssam * we'll accept any potential inconsisentcy in the 4939193240Ssam * statistics. The alternative is to copy the data 4940193240Ssam * to a local structure. 4941193240Ssam */ 4942193240Ssam return copyout(&sc->sc_stats, 4943193240Ssam ifr->ifr_data, sizeof (sc->sc_stats)); 4944193240Ssam#ifdef MWL_DIAGAPI 4945193240Ssam case SIOCGMVDIAG: 4946193240Ssam /* XXX check privs */ 4947193240Ssam return mwl_ioctl_diag(sc, (struct mwl_diag *) ifr); 4948193240Ssam case SIOCGMVRESET: 4949193240Ssam /* XXX check privs */ 4950193240Ssam MWL_LOCK(sc); 4951193240Ssam error = mwl_ioctl_reset(sc,(struct mwl_diag *) ifr); 4952193240Ssam MWL_UNLOCK(sc); 4953193240Ssam break; 4954193240Ssam#endif /* MWL_DIAGAPI */ 4955193240Ssam case SIOCGIFMEDIA: 4956193240Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 4957193240Ssam break; 4958193240Ssam case SIOCGIFADDR: 4959193240Ssam error = ether_ioctl(ifp, cmd, data); 4960193240Ssam break; 4961193240Ssam default: 4962193240Ssam error = EINVAL; 4963193240Ssam break; 4964193240Ssam } 4965193240Ssam return error; 4966193240Ssam#undef IS_RUNNING 4967193240Ssam} 4968193240Ssam 4969193240Ssam#ifdef MWL_DEBUG 4970193240Ssamstatic int 4971193240Ssammwl_sysctl_debug(SYSCTL_HANDLER_ARGS) 4972193240Ssam{ 4973193240Ssam struct mwl_softc *sc = arg1; 4974193240Ssam int debug, error; 4975193240Ssam 4976193240Ssam debug = sc->sc_debug | (mwl_hal_getdebug(sc->sc_mh) << 24); 4977193240Ssam error = sysctl_handle_int(oidp, &debug, 0, req); 4978193240Ssam if (error || !req->newptr) 4979193240Ssam return error; 4980193240Ssam mwl_hal_setdebug(sc->sc_mh, debug >> 24); 4981193240Ssam sc->sc_debug = debug & 0x00ffffff; 4982193240Ssam return 0; 4983193240Ssam} 4984193240Ssam#endif /* MWL_DEBUG */ 4985193240Ssam 4986193240Ssamstatic void 4987193240Ssammwl_sysctlattach(struct mwl_softc *sc) 4988193240Ssam{ 4989193240Ssam#ifdef MWL_DEBUG 4990193240Ssam struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 4991193240Ssam struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 4992193240Ssam 4993193240Ssam sc->sc_debug = mwl_debug; 4994193240Ssam SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 4995193240Ssam "debug", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 4996193240Ssam mwl_sysctl_debug, "I", "control debugging printfs"); 4997193240Ssam#endif 4998193240Ssam} 4999193240Ssam 5000193240Ssam/* 5001193240Ssam * Announce various information on device/driver attach. 5002193240Ssam */ 5003193240Ssamstatic void 5004193240Ssammwl_announce(struct mwl_softc *sc) 5005193240Ssam{ 5006193240Ssam struct ifnet *ifp = sc->sc_ifp; 5007193240Ssam 5008193240Ssam if_printf(ifp, "Rev A%d hardware, v%d.%d.%d.%d firmware (regioncode %d)\n", 5009193240Ssam sc->sc_hwspecs.hwVersion, 5010193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>24) & 0xff, 5011193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>16) & 0xff, 5012193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>8) & 0xff, 5013193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>0) & 0xff, 5014193240Ssam sc->sc_hwspecs.regionCode); 5015193240Ssam sc->sc_fwrelease = sc->sc_hwspecs.fwReleaseNumber; 5016193240Ssam 5017193240Ssam if (bootverbose) { 5018193240Ssam int i; 5019193240Ssam for (i = 0; i <= WME_AC_VO; i++) { 5020193240Ssam struct mwl_txq *txq = sc->sc_ac2q[i]; 5021193240Ssam if_printf(ifp, "Use hw queue %u for %s traffic\n", 5022193240Ssam txq->qnum, ieee80211_wme_acnames[i]); 5023193240Ssam } 5024193240Ssam } 5025193240Ssam if (bootverbose || mwl_rxdesc != MWL_RXDESC) 5026193240Ssam if_printf(ifp, "using %u rx descriptors\n", mwl_rxdesc); 5027193240Ssam if (bootverbose || mwl_rxbuf != MWL_RXBUF) 5028193240Ssam if_printf(ifp, "using %u rx buffers\n", mwl_rxbuf); 5029193240Ssam if (bootverbose || mwl_txbuf != MWL_TXBUF) 5030193240Ssam if_printf(ifp, "using %u tx buffers\n", mwl_txbuf); 5031193240Ssam if (bootverbose && mwl_hal_ismbsscapable(sc->sc_mh)) 5032193240Ssam if_printf(ifp, "multi-bss support\n"); 5033193240Ssam#ifdef MWL_TX_NODROP 5034193240Ssam if (bootverbose) 5035193240Ssam if_printf(ifp, "no tx drop\n"); 5036193240Ssam#endif 5037193240Ssam} 5038