if_mwl.c revision 268529
1193240Ssam/*- 2193240Ssam * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting 3193240Ssam * Copyright (c) 2007-2008 Marvell Semiconductor, Inc. 4193240Ssam * All rights reserved. 5193240Ssam * 6193240Ssam * Redistribution and use in source and binary forms, with or without 7193240Ssam * modification, are permitted provided that the following conditions 8193240Ssam * are met: 9193240Ssam * 1. Redistributions of source code must retain the above copyright 10193240Ssam * notice, this list of conditions and the following disclaimer, 11193240Ssam * without modification. 12193240Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13193240Ssam * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14193240Ssam * redistribution must be conditioned upon including a substantially 15193240Ssam * similar Disclaimer requirement for further binary redistribution. 16193240Ssam * 17193240Ssam * NO WARRANTY 18193240Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19193240Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20193240Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21193240Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22193240Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23193240Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24193240Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25193240Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26193240Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27193240Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28193240Ssam * THE POSSIBILITY OF SUCH DAMAGES. 29193240Ssam */ 30193240Ssam 31193240Ssam#include <sys/cdefs.h> 32193240Ssam__FBSDID("$FreeBSD: head/sys/dev/mwl/if_mwl.c 268529 2014-07-11 13:58:48Z glebius $"); 33193240Ssam 34193240Ssam/* 35193240Ssam * Driver for the Marvell 88W8363 Wireless LAN controller. 36193240Ssam */ 37193240Ssam 38193240Ssam#include "opt_inet.h" 39193240Ssam#include "opt_mwl.h" 40234367Sadrian#include "opt_wlan.h" 41193240Ssam 42193240Ssam#include <sys/param.h> 43193240Ssam#include <sys/systm.h> 44193240Ssam#include <sys/sysctl.h> 45193240Ssam#include <sys/mbuf.h> 46193240Ssam#include <sys/malloc.h> 47193240Ssam#include <sys/lock.h> 48193240Ssam#include <sys/mutex.h> 49193240Ssam#include <sys/kernel.h> 50193240Ssam#include <sys/socket.h> 51193240Ssam#include <sys/sockio.h> 52193240Ssam#include <sys/errno.h> 53193240Ssam#include <sys/callout.h> 54193240Ssam#include <sys/bus.h> 55193240Ssam#include <sys/endian.h> 56193240Ssam#include <sys/kthread.h> 57193240Ssam#include <sys/taskqueue.h> 58193240Ssam 59193240Ssam#include <machine/bus.h> 60193240Ssam 61193240Ssam#include <net/if.h> 62257176Sglebius#include <net/if_var.h> 63193240Ssam#include <net/if_dl.h> 64193240Ssam#include <net/if_media.h> 65193240Ssam#include <net/if_types.h> 66193240Ssam#include <net/if_arp.h> 67193240Ssam#include <net/ethernet.h> 68193240Ssam#include <net/if_llc.h> 69193240Ssam 70193240Ssam#include <net/bpf.h> 71193240Ssam 72193240Ssam#include <net80211/ieee80211_var.h> 73193240Ssam#include <net80211/ieee80211_regdomain.h> 74193240Ssam 75193240Ssam#ifdef INET 76193240Ssam#include <netinet/in.h> 77193240Ssam#include <netinet/if_ether.h> 78193240Ssam#endif /* INET */ 79193240Ssam 80193240Ssam#include <dev/mwl/if_mwlvar.h> 81193240Ssam#include <dev/mwl/mwldiag.h> 82193240Ssam 83193240Ssam/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 84193240Ssam#define MS(v,x) (((v) & x) >> x##_S) 85193240Ssam#define SM(v,x) (((v) << x##_S) & x) 86193240Ssam 87193240Ssamstatic struct ieee80211vap *mwl_vap_create(struct ieee80211com *, 88228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 89228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN], 90228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 91193240Ssamstatic void mwl_vap_delete(struct ieee80211vap *); 92193240Ssamstatic int mwl_setupdma(struct mwl_softc *); 93193240Ssamstatic int mwl_hal_reset(struct mwl_softc *sc); 94193240Ssamstatic int mwl_init_locked(struct mwl_softc *); 95193240Ssamstatic void mwl_init(void *); 96193240Ssamstatic void mwl_stop_locked(struct ifnet *, int); 97193240Ssamstatic int mwl_reset(struct ieee80211vap *, u_long); 98193240Ssamstatic void mwl_stop(struct ifnet *, int); 99193240Ssamstatic void mwl_start(struct ifnet *); 100193240Ssamstatic int mwl_raw_xmit(struct ieee80211_node *, struct mbuf *, 101193240Ssam const struct ieee80211_bpf_params *); 102193240Ssamstatic int mwl_media_change(struct ifnet *); 103199559Sjhbstatic void mwl_watchdog(void *); 104193240Ssamstatic int mwl_ioctl(struct ifnet *, u_long, caddr_t); 105193240Ssamstatic void mwl_radar_proc(void *, int); 106193240Ssamstatic void mwl_chanswitch_proc(void *, int); 107193240Ssamstatic void mwl_bawatchdog_proc(void *, int); 108193240Ssamstatic int mwl_key_alloc(struct ieee80211vap *, 109193240Ssam struct ieee80211_key *, 110193240Ssam ieee80211_keyix *, ieee80211_keyix *); 111193240Ssamstatic int mwl_key_delete(struct ieee80211vap *, 112193240Ssam const struct ieee80211_key *); 113193240Ssamstatic int mwl_key_set(struct ieee80211vap *, const struct ieee80211_key *, 114193240Ssam const uint8_t mac[IEEE80211_ADDR_LEN]); 115193240Ssamstatic int mwl_mode_init(struct mwl_softc *); 116193240Ssamstatic void mwl_update_mcast(struct ifnet *); 117193240Ssamstatic void mwl_update_promisc(struct ifnet *); 118193240Ssamstatic void mwl_updateslot(struct ifnet *); 119193240Ssamstatic int mwl_beacon_setup(struct ieee80211vap *); 120193240Ssamstatic void mwl_beacon_update(struct ieee80211vap *, int); 121193240Ssam#ifdef MWL_HOST_PS_SUPPORT 122193240Ssamstatic void mwl_update_ps(struct ieee80211vap *, int); 123193240Ssamstatic int mwl_set_tim(struct ieee80211_node *, int); 124193240Ssam#endif 125193240Ssamstatic int mwl_dma_setup(struct mwl_softc *); 126193240Ssamstatic void mwl_dma_cleanup(struct mwl_softc *); 127193240Ssamstatic struct ieee80211_node *mwl_node_alloc(struct ieee80211vap *, 128193240Ssam const uint8_t [IEEE80211_ADDR_LEN]); 129193240Ssamstatic void mwl_node_cleanup(struct ieee80211_node *); 130193240Ssamstatic void mwl_node_drain(struct ieee80211_node *); 131193240Ssamstatic void mwl_node_getsignal(const struct ieee80211_node *, 132193240Ssam int8_t *, int8_t *); 133193240Ssamstatic void mwl_node_getmimoinfo(const struct ieee80211_node *, 134193240Ssam struct ieee80211_mimo_info *); 135193240Ssamstatic int mwl_rxbuf_init(struct mwl_softc *, struct mwl_rxbuf *); 136193240Ssamstatic void mwl_rx_proc(void *, int); 137193240Ssamstatic void mwl_txq_init(struct mwl_softc *sc, struct mwl_txq *, int); 138193240Ssamstatic int mwl_tx_setup(struct mwl_softc *, int, int); 139193240Ssamstatic int mwl_wme_update(struct ieee80211com *); 140193240Ssamstatic void mwl_tx_cleanupq(struct mwl_softc *, struct mwl_txq *); 141193240Ssamstatic void mwl_tx_cleanup(struct mwl_softc *); 142193240Ssamstatic uint16_t mwl_calcformat(uint8_t rate, const struct ieee80211_node *); 143193240Ssamstatic int mwl_tx_start(struct mwl_softc *, struct ieee80211_node *, 144193240Ssam struct mwl_txbuf *, struct mbuf *); 145193240Ssamstatic void mwl_tx_proc(void *, int); 146193240Ssamstatic int mwl_chan_set(struct mwl_softc *, struct ieee80211_channel *); 147193240Ssamstatic void mwl_draintxq(struct mwl_softc *); 148193240Ssamstatic void mwl_cleartxq(struct mwl_softc *, struct ieee80211vap *); 149195377Ssamstatic int mwl_recv_action(struct ieee80211_node *, 150195377Ssam const struct ieee80211_frame *, 151193240Ssam const uint8_t *, const uint8_t *); 152193240Ssamstatic int mwl_addba_request(struct ieee80211_node *, 153193240Ssam struct ieee80211_tx_ampdu *, int dialogtoken, 154193240Ssam int baparamset, int batimeout); 155193240Ssamstatic int mwl_addba_response(struct ieee80211_node *, 156193240Ssam struct ieee80211_tx_ampdu *, int status, 157193240Ssam int baparamset, int batimeout); 158193240Ssamstatic void mwl_addba_stop(struct ieee80211_node *, 159193240Ssam struct ieee80211_tx_ampdu *); 160193240Ssamstatic int mwl_startrecv(struct mwl_softc *); 161193240Ssamstatic MWL_HAL_APMODE mwl_getapmode(const struct ieee80211vap *, 162193240Ssam struct ieee80211_channel *); 163193240Ssamstatic int mwl_setapmode(struct ieee80211vap *, struct ieee80211_channel*); 164193240Ssamstatic void mwl_scan_start(struct ieee80211com *); 165193240Ssamstatic void mwl_scan_end(struct ieee80211com *); 166193240Ssamstatic void mwl_set_channel(struct ieee80211com *); 167193240Ssamstatic int mwl_peerstadb(struct ieee80211_node *, 168193240Ssam int aid, int staid, MWL_HAL_PEERINFO *pi); 169193240Ssamstatic int mwl_localstadb(struct ieee80211vap *); 170193240Ssamstatic int mwl_newstate(struct ieee80211vap *, enum ieee80211_state, int); 171193240Ssamstatic int allocstaid(struct mwl_softc *sc, int aid); 172193240Ssamstatic void delstaid(struct mwl_softc *sc, int staid); 173193240Ssamstatic void mwl_newassoc(struct ieee80211_node *, int); 174193240Ssamstatic void mwl_agestations(void *); 175193240Ssamstatic int mwl_setregdomain(struct ieee80211com *, 176193240Ssam struct ieee80211_regdomain *, int, 177193240Ssam struct ieee80211_channel []); 178193240Ssamstatic void mwl_getradiocaps(struct ieee80211com *, int, int *, 179193240Ssam struct ieee80211_channel []); 180193240Ssamstatic int mwl_getchannels(struct mwl_softc *); 181193240Ssam 182193240Ssamstatic void mwl_sysctlattach(struct mwl_softc *); 183193240Ssamstatic void mwl_announce(struct mwl_softc *); 184193240Ssam 185193240SsamSYSCTL_NODE(_hw, OID_AUTO, mwl, CTLFLAG_RD, 0, "Marvell driver parameters"); 186193240Ssam 187193240Ssamstatic int mwl_rxdesc = MWL_RXDESC; /* # rx desc's to allocate */ 188193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxdesc, CTLFLAG_RW, &mwl_rxdesc, 189193240Ssam 0, "rx descriptors allocated"); 190193240Ssamstatic int mwl_rxbuf = MWL_RXBUF; /* # rx buffers to allocate */ 191267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &mwl_rxbuf, 192193240Ssam 0, "rx buffers allocated"); 193193240Ssamstatic int mwl_txbuf = MWL_TXBUF; /* # tx buffers to allocate */ 194267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, txbuf, CTLFLAG_RWTUN, &mwl_txbuf, 195193240Ssam 0, "tx buffers allocated"); 196193240Ssamstatic int mwl_txcoalesce = 8; /* # tx packets to q before poking f/w*/ 197267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &mwl_txcoalesce, 198193240Ssam 0, "tx buffers to send at once"); 199193240Ssamstatic int mwl_rxquota = MWL_RXBUF; /* # max buffers to process */ 200267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, rxquota, CTLFLAG_RWTUN, &mwl_rxquota, 201193240Ssam 0, "max rx buffers to process per interrupt"); 202193240Ssamstatic int mwl_rxdmalow = 3; /* # min buffers for wakeup */ 203267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, rxdmalow, CTLFLAG_RWTUN, &mwl_rxdmalow, 204193240Ssam 0, "min free rx buffers before restarting traffic"); 205193240Ssam 206193240Ssam#ifdef MWL_DEBUG 207193240Ssamstatic int mwl_debug = 0; 208267992ShselaskySYSCTL_INT(_hw_mwl, OID_AUTO, debug, CTLFLAG_RWTUN, &mwl_debug, 209193240Ssam 0, "control debugging printfs"); 210193240Ssamenum { 211193240Ssam MWL_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 212193240Ssam MWL_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 213193240Ssam MWL_DEBUG_RECV = 0x00000004, /* basic recv operation */ 214193240Ssam MWL_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 215193240Ssam MWL_DEBUG_RESET = 0x00000010, /* reset processing */ 216193240Ssam MWL_DEBUG_BEACON = 0x00000020, /* beacon handling */ 217193240Ssam MWL_DEBUG_INTR = 0x00000040, /* ISR */ 218193240Ssam MWL_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 219193240Ssam MWL_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 220193240Ssam MWL_DEBUG_KEYCACHE = 0x00000200, /* key cache management */ 221193240Ssam MWL_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 222193240Ssam MWL_DEBUG_NODE = 0x00000800, /* node management */ 223193240Ssam MWL_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 224193240Ssam MWL_DEBUG_TSO = 0x00002000, /* TSO processing */ 225193240Ssam MWL_DEBUG_AMPDU = 0x00004000, /* BA stream handling */ 226193240Ssam MWL_DEBUG_ANY = 0xffffffff 227193240Ssam}; 228193240Ssam#define IS_BEACON(wh) \ 229193240Ssam ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK|IEEE80211_FC0_SUBTYPE_MASK)) == \ 230193240Ssam (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 231193240Ssam#define IFF_DUMPPKTS_RECV(sc, wh) \ 232193240Ssam (((sc->sc_debug & MWL_DEBUG_RECV) && \ 233193240Ssam ((sc->sc_debug & MWL_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 234193240Ssam (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 235193240Ssam#define IFF_DUMPPKTS_XMIT(sc) \ 236193240Ssam ((sc->sc_debug & MWL_DEBUG_XMIT) || \ 237193240Ssam (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 238193240Ssam#define DPRINTF(sc, m, fmt, ...) do { \ 239193240Ssam if (sc->sc_debug & (m)) \ 240193240Ssam printf(fmt, __VA_ARGS__); \ 241193240Ssam} while (0) 242193240Ssam#define KEYPRINTF(sc, hk, mac) do { \ 243193240Ssam if (sc->sc_debug & MWL_DEBUG_KEYCACHE) \ 244193240Ssam mwl_keyprint(sc, __func__, hk, mac); \ 245193240Ssam} while (0) 246193240Ssamstatic void mwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix); 247193240Ssamstatic void mwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix); 248193240Ssam#else 249193240Ssam#define IFF_DUMPPKTS_RECV(sc, wh) \ 250193240Ssam ((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 251193240Ssam#define IFF_DUMPPKTS_XMIT(sc) \ 252193240Ssam ((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 253193240Ssam#define DPRINTF(sc, m, fmt, ...) do { \ 254193240Ssam (void) sc; \ 255193240Ssam} while (0) 256193240Ssam#define KEYPRINTF(sc, k, mac) do { \ 257193240Ssam (void) sc; \ 258193240Ssam} while (0) 259193240Ssam#endif 260193240Ssam 261227293Sedstatic MALLOC_DEFINE(M_MWLDEV, "mwldev", "mwl driver dma buffers"); 262193240Ssam 263193240Ssam/* 264193240Ssam * Each packet has fixed front matter: a 2-byte length 265193240Ssam * of the payload, followed by a 4-address 802.11 header 266193240Ssam * (regardless of the actual header and always w/o any 267193240Ssam * QoS header). The payload then follows. 268193240Ssam */ 269193240Ssamstruct mwltxrec { 270193240Ssam uint16_t fwlen; 271193240Ssam struct ieee80211_frame_addr4 wh; 272193240Ssam} __packed; 273193240Ssam 274193240Ssam/* 275193240Ssam * Read/Write shorthands for accesses to BAR 0. Note 276193240Ssam * that all BAR 1 operations are done in the "hal" and 277193240Ssam * there should be no reference to them here. 278193240Ssam */ 279259869Sdim#ifdef MWL_DEBUG 280193240Ssamstatic __inline uint32_t 281193240SsamRD4(struct mwl_softc *sc, bus_size_t off) 282193240Ssam{ 283193240Ssam return bus_space_read_4(sc->sc_io0t, sc->sc_io0h, off); 284193240Ssam} 285259869Sdim#endif 286193240Ssam 287193240Ssamstatic __inline void 288193240SsamWR4(struct mwl_softc *sc, bus_size_t off, uint32_t val) 289193240Ssam{ 290193240Ssam bus_space_write_4(sc->sc_io0t, sc->sc_io0h, off, val); 291193240Ssam} 292193240Ssam 293193240Ssamint 294193240Ssammwl_attach(uint16_t devid, struct mwl_softc *sc) 295193240Ssam{ 296193240Ssam struct ifnet *ifp; 297193240Ssam struct ieee80211com *ic; 298193240Ssam struct mwl_hal *mh; 299193240Ssam int error = 0; 300193240Ssam 301193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid); 302193240Ssam 303193240Ssam ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 304193240Ssam if (ifp == NULL) { 305197441Srpaulo device_printf(sc->sc_dev, "cannot if_alloc()\n"); 306193240Ssam return ENOSPC; 307193240Ssam } 308193240Ssam ic = ifp->if_l2com; 309193240Ssam 310234368Sadrian /* 311234368Sadrian * Setup the RX free list lock early, so it can be consistently 312234368Sadrian * removed. 313234368Sadrian */ 314234368Sadrian MWL_RXFREE_INIT(sc); 315234368Sadrian 316193240Ssam /* set these up early for if_printf use */ 317193240Ssam if_initname(ifp, device_get_name(sc->sc_dev), 318193240Ssam device_get_unit(sc->sc_dev)); 319193240Ssam 320193240Ssam mh = mwl_hal_attach(sc->sc_dev, devid, 321193240Ssam sc->sc_io1h, sc->sc_io1t, sc->sc_dmat); 322193240Ssam if (mh == NULL) { 323193240Ssam if_printf(ifp, "unable to attach HAL\n"); 324193240Ssam error = EIO; 325193240Ssam goto bad; 326193240Ssam } 327193240Ssam sc->sc_mh = mh; 328193240Ssam /* 329193240Ssam * Load firmware so we can get setup. We arbitrarily 330193240Ssam * pick station firmware; we'll re-load firmware as 331193240Ssam * needed so setting up the wrong mode isn't a big deal. 332193240Ssam */ 333193240Ssam if (mwl_hal_fwload(mh, NULL) != 0) { 334193240Ssam if_printf(ifp, "unable to setup builtin firmware\n"); 335193240Ssam error = EIO; 336193240Ssam goto bad1; 337193240Ssam } 338193240Ssam if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) { 339193240Ssam if_printf(ifp, "unable to fetch h/w specs\n"); 340193240Ssam error = EIO; 341193240Ssam goto bad1; 342193240Ssam } 343193240Ssam error = mwl_getchannels(sc); 344193240Ssam if (error != 0) 345193240Ssam goto bad1; 346193240Ssam 347193240Ssam sc->sc_txantenna = 0; /* h/w default */ 348193240Ssam sc->sc_rxantenna = 0; /* h/w default */ 349193240Ssam sc->sc_invalid = 0; /* ready to go, enable int handling */ 350193240Ssam sc->sc_ageinterval = MWL_AGEINTERVAL; 351193240Ssam 352193240Ssam /* 353193240Ssam * Allocate tx+rx descriptors and populate the lists. 354193240Ssam * We immediately push the information to the firmware 355193240Ssam * as otherwise it gets upset. 356193240Ssam */ 357193240Ssam error = mwl_dma_setup(sc); 358193240Ssam if (error != 0) { 359193240Ssam if_printf(ifp, "failed to setup descriptors: %d\n", error); 360193240Ssam goto bad1; 361193240Ssam } 362193240Ssam error = mwl_setupdma(sc); /* push to firmware */ 363193240Ssam if (error != 0) /* NB: mwl_setupdma prints msg */ 364193240Ssam goto bad1; 365193240Ssam 366193240Ssam callout_init(&sc->sc_timer, CALLOUT_MPSAFE); 367199559Sjhb callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0); 368193240Ssam 369193240Ssam sc->sc_tq = taskqueue_create("mwl_taskq", M_NOWAIT, 370193240Ssam taskqueue_thread_enqueue, &sc->sc_tq); 371193240Ssam taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, 372193240Ssam "%s taskq", ifp->if_xname); 373193240Ssam 374193240Ssam TASK_INIT(&sc->sc_rxtask, 0, mwl_rx_proc, sc); 375193240Ssam TASK_INIT(&sc->sc_radartask, 0, mwl_radar_proc, sc); 376193240Ssam TASK_INIT(&sc->sc_chanswitchtask, 0, mwl_chanswitch_proc, sc); 377193240Ssam TASK_INIT(&sc->sc_bawatchdogtask, 0, mwl_bawatchdog_proc, sc); 378193240Ssam 379193240Ssam /* NB: insure BK queue is the lowest priority h/w queue */ 380193240Ssam if (!mwl_tx_setup(sc, WME_AC_BK, MWL_WME_AC_BK)) { 381193240Ssam if_printf(ifp, "unable to setup xmit queue for %s traffic!\n", 382193240Ssam ieee80211_wme_acnames[WME_AC_BK]); 383193240Ssam error = EIO; 384193240Ssam goto bad2; 385193240Ssam } 386193240Ssam if (!mwl_tx_setup(sc, WME_AC_BE, MWL_WME_AC_BE) || 387193240Ssam !mwl_tx_setup(sc, WME_AC_VI, MWL_WME_AC_VI) || 388193240Ssam !mwl_tx_setup(sc, WME_AC_VO, MWL_WME_AC_VO)) { 389193240Ssam /* 390193240Ssam * Not enough hardware tx queues to properly do WME; 391193240Ssam * just punt and assign them all to the same h/w queue. 392193240Ssam * We could do a better job of this if, for example, 393193240Ssam * we allocate queues when we switch from station to 394193240Ssam * AP mode. 395193240Ssam */ 396193240Ssam if (sc->sc_ac2q[WME_AC_VI] != NULL) 397193240Ssam mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]); 398193240Ssam if (sc->sc_ac2q[WME_AC_BE] != NULL) 399193240Ssam mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]); 400193240Ssam sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK]; 401193240Ssam sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK]; 402193240Ssam sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK]; 403193240Ssam } 404193240Ssam TASK_INIT(&sc->sc_txtask, 0, mwl_tx_proc, sc); 405193240Ssam 406193240Ssam ifp->if_softc = sc; 407193240Ssam ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 408193240Ssam ifp->if_start = mwl_start; 409193240Ssam ifp->if_ioctl = mwl_ioctl; 410193240Ssam ifp->if_init = mwl_init; 411207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 412207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 413193240Ssam IFQ_SET_READY(&ifp->if_snd); 414193240Ssam 415193240Ssam ic->ic_ifp = ifp; 416193240Ssam /* XXX not right but it's not used anywhere important */ 417193240Ssam ic->ic_phytype = IEEE80211_T_OFDM; 418193240Ssam ic->ic_opmode = IEEE80211_M_STA; 419193240Ssam ic->ic_caps = 420193240Ssam IEEE80211_C_STA /* station mode supported */ 421193240Ssam | IEEE80211_C_HOSTAP /* hostap mode */ 422193240Ssam | IEEE80211_C_MONITOR /* monitor mode */ 423193240Ssam#if 0 424193240Ssam | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 425193240Ssam | IEEE80211_C_AHDEMO /* adhoc demo mode */ 426193240Ssam#endif 427195618Srpaulo | IEEE80211_C_MBSS /* mesh point link mode */ 428193240Ssam | IEEE80211_C_WDS /* WDS supported */ 429193240Ssam | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 430193240Ssam | IEEE80211_C_SHSLOT /* short slot time supported */ 431193240Ssam | IEEE80211_C_WME /* WME/WMM supported */ 432193240Ssam | IEEE80211_C_BURST /* xmit bursting supported */ 433193240Ssam | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 434193240Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 435193240Ssam | IEEE80211_C_TXFRAG /* handle tx frags */ 436193240Ssam | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 437193240Ssam | IEEE80211_C_DFS /* DFS supported */ 438193240Ssam ; 439193240Ssam 440193240Ssam ic->ic_htcaps = 441193240Ssam IEEE80211_HTCAP_SMPS_ENA /* SM PS mode enabled */ 442193240Ssam | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width */ 443193240Ssam | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */ 444193240Ssam | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */ 445193240Ssam | IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */ 446193240Ssam#if MWL_AGGR_SIZE == 7935 447193240Ssam | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */ 448193240Ssam#else 449193240Ssam | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */ 450193240Ssam#endif 451193240Ssam#if 0 452193240Ssam | IEEE80211_HTCAP_PSMP /* PSMP supported */ 453193240Ssam | IEEE80211_HTCAP_40INTOLERANT /* 40MHz intolerant */ 454193240Ssam#endif 455193240Ssam /* s/w capabilities */ 456193240Ssam | IEEE80211_HTC_HT /* HT operation */ 457193240Ssam | IEEE80211_HTC_AMPDU /* tx A-MPDU */ 458193240Ssam | IEEE80211_HTC_AMSDU /* tx A-MSDU */ 459193240Ssam | IEEE80211_HTC_SMPS /* SMPS available */ 460193240Ssam ; 461193240Ssam 462193240Ssam /* 463193240Ssam * Mark h/w crypto support. 464193240Ssam * XXX no way to query h/w support. 465193240Ssam */ 466193240Ssam ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP 467193240Ssam | IEEE80211_CRYPTO_AES_CCM 468193240Ssam | IEEE80211_CRYPTO_TKIP 469193240Ssam | IEEE80211_CRYPTO_TKIPMIC 470193240Ssam ; 471193240Ssam /* 472193240Ssam * Transmit requires space in the packet for a special 473193240Ssam * format transmit record and optional padding between 474193240Ssam * this record and the payload. Ask the net80211 layer 475193240Ssam * to arrange this when encapsulating packets so we can 476193240Ssam * add it efficiently. 477193240Ssam */ 478193240Ssam ic->ic_headroom = sizeof(struct mwltxrec) - 479193240Ssam sizeof(struct ieee80211_frame); 480193240Ssam 481193240Ssam /* call MI attach routine. */ 482193240Ssam ieee80211_ifattach(ic, sc->sc_hwspecs.macAddr); 483193240Ssam ic->ic_setregdomain = mwl_setregdomain; 484193240Ssam ic->ic_getradiocaps = mwl_getradiocaps; 485193240Ssam /* override default methods */ 486193240Ssam ic->ic_raw_xmit = mwl_raw_xmit; 487193240Ssam ic->ic_newassoc = mwl_newassoc; 488193240Ssam ic->ic_updateslot = mwl_updateslot; 489193240Ssam ic->ic_update_mcast = mwl_update_mcast; 490193240Ssam ic->ic_update_promisc = mwl_update_promisc; 491193240Ssam ic->ic_wme.wme_update = mwl_wme_update; 492193240Ssam 493193240Ssam ic->ic_node_alloc = mwl_node_alloc; 494193240Ssam sc->sc_node_cleanup = ic->ic_node_cleanup; 495193240Ssam ic->ic_node_cleanup = mwl_node_cleanup; 496193240Ssam sc->sc_node_drain = ic->ic_node_drain; 497193240Ssam ic->ic_node_drain = mwl_node_drain; 498193240Ssam ic->ic_node_getsignal = mwl_node_getsignal; 499193240Ssam ic->ic_node_getmimoinfo = mwl_node_getmimoinfo; 500193240Ssam 501193240Ssam ic->ic_scan_start = mwl_scan_start; 502193240Ssam ic->ic_scan_end = mwl_scan_end; 503193240Ssam ic->ic_set_channel = mwl_set_channel; 504193240Ssam 505193240Ssam sc->sc_recv_action = ic->ic_recv_action; 506193240Ssam ic->ic_recv_action = mwl_recv_action; 507193240Ssam sc->sc_addba_request = ic->ic_addba_request; 508193240Ssam ic->ic_addba_request = mwl_addba_request; 509193240Ssam sc->sc_addba_response = ic->ic_addba_response; 510193240Ssam ic->ic_addba_response = mwl_addba_response; 511193240Ssam sc->sc_addba_stop = ic->ic_addba_stop; 512193240Ssam ic->ic_addba_stop = mwl_addba_stop; 513193240Ssam 514193240Ssam ic->ic_vap_create = mwl_vap_create; 515193240Ssam ic->ic_vap_delete = mwl_vap_delete; 516193240Ssam 517193240Ssam ieee80211_radiotap_attach(ic, 518193240Ssam &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th), 519193240Ssam MWL_TX_RADIOTAP_PRESENT, 520193240Ssam &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th), 521193240Ssam MWL_RX_RADIOTAP_PRESENT); 522193240Ssam /* 523193240Ssam * Setup dynamic sysctl's now that country code and 524193240Ssam * regdomain are available from the hal. 525193240Ssam */ 526193240Ssam mwl_sysctlattach(sc); 527193240Ssam 528193240Ssam if (bootverbose) 529193240Ssam ieee80211_announce(ic); 530193240Ssam mwl_announce(sc); 531193240Ssam return 0; 532193240Ssambad2: 533193240Ssam mwl_dma_cleanup(sc); 534193240Ssambad1: 535193240Ssam mwl_hal_detach(mh); 536193240Ssambad: 537234368Sadrian MWL_RXFREE_DESTROY(sc); 538193240Ssam if_free(ifp); 539193240Ssam sc->sc_invalid = 1; 540193240Ssam return error; 541193240Ssam} 542193240Ssam 543193240Ssamint 544193240Ssammwl_detach(struct mwl_softc *sc) 545193240Ssam{ 546193240Ssam struct ifnet *ifp = sc->sc_ifp; 547193240Ssam struct ieee80211com *ic = ifp->if_l2com; 548193240Ssam 549193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n", 550193240Ssam __func__, ifp->if_flags); 551193240Ssam 552193240Ssam mwl_stop(ifp, 1); 553193240Ssam /* 554193240Ssam * NB: the order of these is important: 555193240Ssam * o call the 802.11 layer before detaching the hal to 556193240Ssam * insure callbacks into the driver to delete global 557193240Ssam * key cache entries can be handled 558193240Ssam * o reclaim the tx queue data structures after calling 559193240Ssam * the 802.11 layer as we'll get called back to reclaim 560193240Ssam * node state and potentially want to use them 561193240Ssam * o to cleanup the tx queues the hal is called, so detach 562193240Ssam * it last 563193240Ssam * Other than that, it's straightforward... 564193240Ssam */ 565193240Ssam ieee80211_ifdetach(ic); 566199559Sjhb callout_drain(&sc->sc_watchdog); 567193240Ssam mwl_dma_cleanup(sc); 568234368Sadrian MWL_RXFREE_DESTROY(sc); 569193240Ssam mwl_tx_cleanup(sc); 570193240Ssam mwl_hal_detach(sc->sc_mh); 571193240Ssam if_free(ifp); 572193240Ssam 573193240Ssam return 0; 574193240Ssam} 575193240Ssam 576193240Ssam/* 577193240Ssam * MAC address handling for multiple BSS on the same radio. 578193240Ssam * The first vap uses the MAC address from the EEPROM. For 579193240Ssam * subsequent vap's we set the U/L bit (bit 1) in the MAC 580193240Ssam * address and use the next six bits as an index. 581193240Ssam */ 582193240Ssamstatic void 583193240Ssamassign_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN], int clone) 584193240Ssam{ 585193240Ssam int i; 586193240Ssam 587193240Ssam if (clone && mwl_hal_ismbsscapable(sc->sc_mh)) { 588193240Ssam /* NB: we only do this if h/w supports multiple bssid */ 589193240Ssam for (i = 0; i < 32; i++) 590193240Ssam if ((sc->sc_bssidmask & (1<<i)) == 0) 591193240Ssam break; 592193240Ssam if (i != 0) 593193240Ssam mac[0] |= (i << 2)|0x2; 594193240Ssam } else 595193240Ssam i = 0; 596193240Ssam sc->sc_bssidmask |= 1<<i; 597193240Ssam if (i == 0) 598193240Ssam sc->sc_nbssid0++; 599193240Ssam} 600193240Ssam 601193240Ssamstatic void 602193240Ssamreclaim_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN]) 603193240Ssam{ 604193240Ssam int i = mac[0] >> 2; 605193240Ssam if (i != 0 || --sc->sc_nbssid0 == 0) 606193240Ssam sc->sc_bssidmask &= ~(1<<i); 607193240Ssam} 608193240Ssam 609193240Ssamstatic struct ieee80211vap * 610228621Sbschmidtmwl_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 611228621Sbschmidt enum ieee80211_opmode opmode, int flags, 612228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 613228621Sbschmidt const uint8_t mac0[IEEE80211_ADDR_LEN]) 614193240Ssam{ 615193240Ssam struct ifnet *ifp = ic->ic_ifp; 616193240Ssam struct mwl_softc *sc = ifp->if_softc; 617193240Ssam struct mwl_hal *mh = sc->sc_mh; 618193240Ssam struct ieee80211vap *vap, *apvap; 619193240Ssam struct mwl_hal_vap *hvap; 620193240Ssam struct mwl_vap *mvp; 621193240Ssam uint8_t mac[IEEE80211_ADDR_LEN]; 622193240Ssam 623193240Ssam IEEE80211_ADDR_COPY(mac, mac0); 624193240Ssam switch (opmode) { 625193240Ssam case IEEE80211_M_HOSTAP: 626195618Srpaulo case IEEE80211_M_MBSS: 627193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 628193240Ssam assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID); 629193240Ssam hvap = mwl_hal_newvap(mh, MWL_HAL_AP, mac); 630193240Ssam if (hvap == NULL) { 631193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 632193240Ssam reclaim_address(sc, mac); 633193240Ssam return NULL; 634193240Ssam } 635193240Ssam break; 636193240Ssam case IEEE80211_M_STA: 637193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 638193240Ssam assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID); 639193240Ssam hvap = mwl_hal_newvap(mh, MWL_HAL_STA, mac); 640193240Ssam if (hvap == NULL) { 641193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 642193240Ssam reclaim_address(sc, mac); 643193240Ssam return NULL; 644193240Ssam } 645193240Ssam /* no h/w beacon miss support; always use s/w */ 646193240Ssam flags |= IEEE80211_CLONE_NOBEACONS; 647193240Ssam break; 648193240Ssam case IEEE80211_M_WDS: 649193240Ssam hvap = NULL; /* NB: we use associated AP vap */ 650193240Ssam if (sc->sc_napvaps == 0) 651193240Ssam return NULL; /* no existing AP vap */ 652193240Ssam break; 653193240Ssam case IEEE80211_M_MONITOR: 654193240Ssam hvap = NULL; 655193240Ssam break; 656193240Ssam case IEEE80211_M_IBSS: 657193240Ssam case IEEE80211_M_AHDEMO: 658193240Ssam default: 659193240Ssam return NULL; 660193240Ssam } 661193240Ssam 662193240Ssam mvp = (struct mwl_vap *) malloc(sizeof(struct mwl_vap), 663193240Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 664193240Ssam if (mvp == NULL) { 665193240Ssam if (hvap != NULL) { 666193240Ssam mwl_hal_delvap(hvap); 667193240Ssam if ((flags & IEEE80211_CLONE_MACADDR) == 0) 668193240Ssam reclaim_address(sc, mac); 669193240Ssam } 670193240Ssam /* XXX msg */ 671193240Ssam return NULL; 672193240Ssam } 673193240Ssam mvp->mv_hvap = hvap; 674193240Ssam if (opmode == IEEE80211_M_WDS) { 675193240Ssam /* 676193240Ssam * WDS vaps must have an associated AP vap; find one. 677193240Ssam * XXX not right. 678193240Ssam */ 679193240Ssam TAILQ_FOREACH(apvap, &ic->ic_vaps, iv_next) 680193240Ssam if (apvap->iv_opmode == IEEE80211_M_HOSTAP) { 681193240Ssam mvp->mv_ap_hvap = MWL_VAP(apvap)->mv_hvap; 682193240Ssam break; 683193240Ssam } 684193240Ssam KASSERT(mvp->mv_ap_hvap != NULL, ("no ap vap")); 685193240Ssam } 686193240Ssam vap = &mvp->mv_vap; 687193240Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 688193240Ssam if (hvap != NULL) 689193240Ssam IEEE80211_ADDR_COPY(vap->iv_myaddr, mac); 690193240Ssam /* override with driver methods */ 691193240Ssam mvp->mv_newstate = vap->iv_newstate; 692193240Ssam vap->iv_newstate = mwl_newstate; 693193240Ssam vap->iv_max_keyix = 0; /* XXX */ 694193240Ssam vap->iv_key_alloc = mwl_key_alloc; 695193240Ssam vap->iv_key_delete = mwl_key_delete; 696193240Ssam vap->iv_key_set = mwl_key_set; 697193240Ssam#ifdef MWL_HOST_PS_SUPPORT 698195618Srpaulo if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) { 699193240Ssam vap->iv_update_ps = mwl_update_ps; 700193240Ssam mvp->mv_set_tim = vap->iv_set_tim; 701193240Ssam vap->iv_set_tim = mwl_set_tim; 702193240Ssam } 703193240Ssam#endif 704193240Ssam vap->iv_reset = mwl_reset; 705193240Ssam vap->iv_update_beacon = mwl_beacon_update; 706193240Ssam 707193240Ssam /* override max aid so sta's cannot assoc when we're out of sta id's */ 708193240Ssam vap->iv_max_aid = MWL_MAXSTAID; 709193240Ssam /* override default A-MPDU rx parameters */ 710193240Ssam vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 711193240Ssam vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4; 712193240Ssam 713193240Ssam /* complete setup */ 714193240Ssam ieee80211_vap_attach(vap, mwl_media_change, ieee80211_media_status); 715193240Ssam 716193240Ssam switch (vap->iv_opmode) { 717193240Ssam case IEEE80211_M_HOSTAP: 718195618Srpaulo case IEEE80211_M_MBSS: 719193240Ssam case IEEE80211_M_STA: 720193240Ssam /* 721193240Ssam * Setup sta db entry for local address. 722193240Ssam */ 723193240Ssam mwl_localstadb(vap); 724195618Srpaulo if (vap->iv_opmode == IEEE80211_M_HOSTAP || 725195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) 726193240Ssam sc->sc_napvaps++; 727193240Ssam else 728193240Ssam sc->sc_nstavaps++; 729193240Ssam break; 730193240Ssam case IEEE80211_M_WDS: 731193240Ssam sc->sc_nwdsvaps++; 732193240Ssam break; 733193240Ssam default: 734193240Ssam break; 735193240Ssam } 736193240Ssam /* 737193240Ssam * Setup overall operating mode. 738193240Ssam */ 739193240Ssam if (sc->sc_napvaps) 740193240Ssam ic->ic_opmode = IEEE80211_M_HOSTAP; 741193240Ssam else if (sc->sc_nstavaps) 742193240Ssam ic->ic_opmode = IEEE80211_M_STA; 743193240Ssam else 744193240Ssam ic->ic_opmode = opmode; 745193240Ssam 746193240Ssam return vap; 747193240Ssam} 748193240Ssam 749193240Ssamstatic void 750193240Ssammwl_vap_delete(struct ieee80211vap *vap) 751193240Ssam{ 752193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 753193240Ssam struct ifnet *parent = vap->iv_ic->ic_ifp; 754193240Ssam struct mwl_softc *sc = parent->if_softc; 755193240Ssam struct mwl_hal *mh = sc->sc_mh; 756193240Ssam struct mwl_hal_vap *hvap = mvp->mv_hvap; 757193240Ssam enum ieee80211_opmode opmode = vap->iv_opmode; 758193240Ssam 759193240Ssam /* XXX disallow ap vap delete if WDS still present */ 760193240Ssam if (parent->if_drv_flags & IFF_DRV_RUNNING) { 761193240Ssam /* quiesce h/w while we remove the vap */ 762193240Ssam mwl_hal_intrset(mh, 0); /* disable interrupts */ 763193240Ssam } 764193240Ssam ieee80211_vap_detach(vap); 765193240Ssam switch (opmode) { 766193240Ssam case IEEE80211_M_HOSTAP: 767195618Srpaulo case IEEE80211_M_MBSS: 768193240Ssam case IEEE80211_M_STA: 769193240Ssam KASSERT(hvap != NULL, ("no hal vap handle")); 770193240Ssam (void) mwl_hal_delstation(hvap, vap->iv_myaddr); 771193240Ssam mwl_hal_delvap(hvap); 772195618Srpaulo if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) 773193240Ssam sc->sc_napvaps--; 774193240Ssam else 775193240Ssam sc->sc_nstavaps--; 776193240Ssam /* XXX don't do it for IEEE80211_CLONE_MACADDR */ 777193240Ssam reclaim_address(sc, vap->iv_myaddr); 778193240Ssam break; 779193240Ssam case IEEE80211_M_WDS: 780193240Ssam sc->sc_nwdsvaps--; 781193240Ssam break; 782193240Ssam default: 783193240Ssam break; 784193240Ssam } 785193240Ssam mwl_cleartxq(sc, vap); 786193240Ssam free(mvp, M_80211_VAP); 787193240Ssam if (parent->if_drv_flags & IFF_DRV_RUNNING) 788193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 789193240Ssam} 790193240Ssam 791193240Ssamvoid 792193240Ssammwl_suspend(struct mwl_softc *sc) 793193240Ssam{ 794193240Ssam struct ifnet *ifp = sc->sc_ifp; 795193240Ssam 796193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n", 797193240Ssam __func__, ifp->if_flags); 798193240Ssam 799193240Ssam mwl_stop(ifp, 1); 800193240Ssam} 801193240Ssam 802193240Ssamvoid 803193240Ssammwl_resume(struct mwl_softc *sc) 804193240Ssam{ 805193240Ssam struct ifnet *ifp = sc->sc_ifp; 806193240Ssam 807193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n", 808193240Ssam __func__, ifp->if_flags); 809193240Ssam 810193240Ssam if (ifp->if_flags & IFF_UP) 811193240Ssam mwl_init(sc); 812193240Ssam} 813193240Ssam 814193240Ssamvoid 815193240Ssammwl_shutdown(void *arg) 816193240Ssam{ 817193240Ssam struct mwl_softc *sc = arg; 818193240Ssam 819193240Ssam mwl_stop(sc->sc_ifp, 1); 820193240Ssam} 821193240Ssam 822193240Ssam/* 823193240Ssam * Interrupt handler. Most of the actual processing is deferred. 824193240Ssam */ 825193240Ssamvoid 826193240Ssammwl_intr(void *arg) 827193240Ssam{ 828193240Ssam struct mwl_softc *sc = arg; 829193240Ssam struct mwl_hal *mh = sc->sc_mh; 830193240Ssam uint32_t status; 831193240Ssam 832193240Ssam if (sc->sc_invalid) { 833193240Ssam /* 834193240Ssam * The hardware is not ready/present, don't touch anything. 835193240Ssam * Note this can happen early on if the IRQ is shared. 836193240Ssam */ 837193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 838193240Ssam return; 839193240Ssam } 840193240Ssam /* 841193240Ssam * Figure out the reason(s) for the interrupt. 842193240Ssam */ 843193240Ssam mwl_hal_getisr(mh, &status); /* NB: clears ISR too */ 844193240Ssam if (status == 0) /* must be a shared irq */ 845193240Ssam return; 846193240Ssam 847193240Ssam DPRINTF(sc, MWL_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 848193240Ssam __func__, status, sc->sc_imask); 849193240Ssam if (status & MACREG_A2HRIC_BIT_RX_RDY) 850193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); 851193240Ssam if (status & MACREG_A2HRIC_BIT_TX_DONE) 852193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask); 853193240Ssam if (status & MACREG_A2HRIC_BIT_BA_WATCHDOG) 854193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_bawatchdogtask); 855193240Ssam if (status & MACREG_A2HRIC_BIT_OPC_DONE) 856193240Ssam mwl_hal_cmddone(mh); 857193240Ssam if (status & MACREG_A2HRIC_BIT_MAC_EVENT) { 858193240Ssam ; 859193240Ssam } 860193240Ssam if (status & MACREG_A2HRIC_BIT_ICV_ERROR) { 861193240Ssam /* TKIP ICV error */ 862193240Ssam sc->sc_stats.mst_rx_badtkipicv++; 863193240Ssam } 864193240Ssam if (status & MACREG_A2HRIC_BIT_QUEUE_EMPTY) { 865193240Ssam /* 11n aggregation queue is empty, re-fill */ 866193240Ssam ; 867193240Ssam } 868193240Ssam if (status & MACREG_A2HRIC_BIT_QUEUE_FULL) { 869193240Ssam ; 870193240Ssam } 871193240Ssam if (status & MACREG_A2HRIC_BIT_RADAR_DETECT) { 872193240Ssam /* radar detected, process event */ 873193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_radartask); 874193240Ssam } 875193240Ssam if (status & MACREG_A2HRIC_BIT_CHAN_SWITCH) { 876193240Ssam /* DFS channel switch */ 877193240Ssam taskqueue_enqueue(sc->sc_tq, &sc->sc_chanswitchtask); 878193240Ssam } 879193240Ssam} 880193240Ssam 881193240Ssamstatic void 882193240Ssammwl_radar_proc(void *arg, int pending) 883193240Ssam{ 884193240Ssam struct mwl_softc *sc = arg; 885193240Ssam struct ifnet *ifp = sc->sc_ifp; 886193240Ssam struct ieee80211com *ic = ifp->if_l2com; 887193240Ssam 888193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: radar detected, pending %u\n", 889193240Ssam __func__, pending); 890193240Ssam 891193240Ssam sc->sc_stats.mst_radardetect++; 892195171Ssam /* XXX stop h/w BA streams? */ 893193240Ssam 894193240Ssam IEEE80211_LOCK(ic); 895193240Ssam ieee80211_dfs_notify_radar(ic, ic->ic_curchan); 896193240Ssam IEEE80211_UNLOCK(ic); 897193240Ssam} 898193240Ssam 899193240Ssamstatic void 900193240Ssammwl_chanswitch_proc(void *arg, int pending) 901193240Ssam{ 902193240Ssam struct mwl_softc *sc = arg; 903193240Ssam struct ifnet *ifp = sc->sc_ifp; 904193240Ssam struct ieee80211com *ic = ifp->if_l2com; 905193240Ssam 906193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: channel switch notice, pending %u\n", 907193240Ssam __func__, pending); 908193240Ssam 909193240Ssam IEEE80211_LOCK(ic); 910193240Ssam sc->sc_csapending = 0; 911193240Ssam ieee80211_csa_completeswitch(ic); 912193240Ssam IEEE80211_UNLOCK(ic); 913193240Ssam} 914193240Ssam 915193240Ssamstatic void 916193240Ssammwl_bawatchdog(const MWL_HAL_BASTREAM *sp) 917193240Ssam{ 918193240Ssam struct ieee80211_node *ni = sp->data[0]; 919193240Ssam 920193240Ssam /* send DELBA and drop the stream */ 921193240Ssam ieee80211_ampdu_stop(ni, sp->data[1], IEEE80211_REASON_UNSPECIFIED); 922193240Ssam} 923193240Ssam 924193240Ssamstatic void 925193240Ssammwl_bawatchdog_proc(void *arg, int pending) 926193240Ssam{ 927193240Ssam struct mwl_softc *sc = arg; 928193240Ssam struct mwl_hal *mh = sc->sc_mh; 929193240Ssam const MWL_HAL_BASTREAM *sp; 930193240Ssam uint8_t bitmap, n; 931193240Ssam 932193240Ssam sc->sc_stats.mst_bawatchdog++; 933193240Ssam 934193240Ssam if (mwl_hal_getwatchdogbitmap(mh, &bitmap) != 0) { 935193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 936193240Ssam "%s: could not get bitmap\n", __func__); 937193240Ssam sc->sc_stats.mst_bawatchdog_failed++; 938193240Ssam return; 939193240Ssam } 940193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: bitmap 0x%x\n", __func__, bitmap); 941193240Ssam if (bitmap == 0xff) { 942193240Ssam n = 0; 943193240Ssam /* disable all ba streams */ 944193240Ssam for (bitmap = 0; bitmap < 8; bitmap++) { 945193240Ssam sp = mwl_hal_bastream_lookup(mh, bitmap); 946193240Ssam if (sp != NULL) { 947193240Ssam mwl_bawatchdog(sp); 948193240Ssam n++; 949193240Ssam } 950193240Ssam } 951193240Ssam if (n == 0) { 952193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 953193240Ssam "%s: no BA streams found\n", __func__); 954193240Ssam sc->sc_stats.mst_bawatchdog_empty++; 955193240Ssam } 956193240Ssam } else if (bitmap != 0xaa) { 957193240Ssam /* disable a single ba stream */ 958193240Ssam sp = mwl_hal_bastream_lookup(mh, bitmap); 959193240Ssam if (sp != NULL) { 960193240Ssam mwl_bawatchdog(sp); 961193240Ssam } else { 962193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 963193240Ssam "%s: no BA stream %d\n", __func__, bitmap); 964193240Ssam sc->sc_stats.mst_bawatchdog_notfound++; 965193240Ssam } 966193240Ssam } 967193240Ssam} 968193240Ssam 969193240Ssam/* 970193240Ssam * Convert net80211 channel to a HAL channel. 971193240Ssam */ 972193240Ssamstatic void 973193240Ssammwl_mapchan(MWL_HAL_CHANNEL *hc, const struct ieee80211_channel *chan) 974193240Ssam{ 975193240Ssam hc->channel = chan->ic_ieee; 976193240Ssam 977193240Ssam *(uint32_t *)&hc->channelFlags = 0; 978193240Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) 979193240Ssam hc->channelFlags.FreqBand = MWL_FREQ_BAND_2DOT4GHZ; 980193240Ssam else if (IEEE80211_IS_CHAN_5GHZ(chan)) 981193240Ssam hc->channelFlags.FreqBand = MWL_FREQ_BAND_5GHZ; 982193240Ssam if (IEEE80211_IS_CHAN_HT40(chan)) { 983193240Ssam hc->channelFlags.ChnlWidth = MWL_CH_40_MHz_WIDTH; 984193240Ssam if (IEEE80211_IS_CHAN_HT40U(chan)) 985193240Ssam hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_ABOVE_CTRL_CH; 986193240Ssam else 987193240Ssam hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_BELOW_CTRL_CH; 988193240Ssam } else 989193240Ssam hc->channelFlags.ChnlWidth = MWL_CH_20_MHz_WIDTH; 990193240Ssam /* XXX 10MHz channels */ 991193240Ssam} 992193240Ssam 993193240Ssam/* 994193240Ssam * Inform firmware of our tx/rx dma setup. The BAR 0 995193240Ssam * writes below are for compatibility with older firmware. 996193240Ssam * For current firmware we send this information with a 997193240Ssam * cmd block via mwl_hal_sethwdma. 998193240Ssam */ 999193240Ssamstatic int 1000193240Ssammwl_setupdma(struct mwl_softc *sc) 1001193240Ssam{ 1002193240Ssam int error, i; 1003193240Ssam 1004193240Ssam sc->sc_hwdma.rxDescRead = sc->sc_rxdma.dd_desc_paddr; 1005193240Ssam WR4(sc, sc->sc_hwspecs.rxDescRead, sc->sc_hwdma.rxDescRead); 1006193240Ssam WR4(sc, sc->sc_hwspecs.rxDescWrite, sc->sc_hwdma.rxDescRead); 1007193240Ssam 1008195171Ssam for (i = 0; i < MWL_NUM_TX_QUEUES-MWL_NUM_ACK_QUEUES; i++) { 1009193240Ssam struct mwl_txq *txq = &sc->sc_txq[i]; 1010193240Ssam sc->sc_hwdma.wcbBase[i] = txq->dma.dd_desc_paddr; 1011193240Ssam WR4(sc, sc->sc_hwspecs.wcbBase[i], sc->sc_hwdma.wcbBase[i]); 1012193240Ssam } 1013193240Ssam sc->sc_hwdma.maxNumTxWcb = mwl_txbuf; 1014195171Ssam sc->sc_hwdma.maxNumWCB = MWL_NUM_TX_QUEUES-MWL_NUM_ACK_QUEUES; 1015193240Ssam 1016193240Ssam error = mwl_hal_sethwdma(sc->sc_mh, &sc->sc_hwdma); 1017193240Ssam if (error != 0) { 1018193240Ssam device_printf(sc->sc_dev, 1019193240Ssam "unable to setup tx/rx dma; hal status %u\n", error); 1020193240Ssam /* XXX */ 1021193240Ssam } 1022193240Ssam return error; 1023193240Ssam} 1024193240Ssam 1025193240Ssam/* 1026193240Ssam * Inform firmware of tx rate parameters. 1027193240Ssam * Called after a channel change. 1028193240Ssam */ 1029193240Ssamstatic int 1030193240Ssammwl_setcurchanrates(struct mwl_softc *sc) 1031193240Ssam{ 1032193240Ssam struct ifnet *ifp = sc->sc_ifp; 1033193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1034193240Ssam const struct ieee80211_rateset *rs; 1035193240Ssam MWL_HAL_TXRATE rates; 1036193240Ssam 1037193240Ssam memset(&rates, 0, sizeof(rates)); 1038193240Ssam rs = ieee80211_get_suprates(ic, ic->ic_curchan); 1039193240Ssam /* rate used to send management frames */ 1040193240Ssam rates.MgtRate = rs->rs_rates[0] & IEEE80211_RATE_VAL; 1041193240Ssam /* rate used to send multicast frames */ 1042193240Ssam rates.McastRate = rates.MgtRate; 1043193240Ssam 1044193240Ssam return mwl_hal_settxrate_auto(sc->sc_mh, &rates); 1045193240Ssam} 1046193240Ssam 1047193240Ssam/* 1048193240Ssam * Inform firmware of tx rate parameters. Called whenever 1049193240Ssam * user-settable params change and after a channel change. 1050193240Ssam */ 1051193240Ssamstatic int 1052193240Ssammwl_setrates(struct ieee80211vap *vap) 1053193240Ssam{ 1054193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1055193240Ssam struct ieee80211_node *ni = vap->iv_bss; 1056193240Ssam const struct ieee80211_txparam *tp = ni->ni_txparms; 1057193240Ssam MWL_HAL_TXRATE rates; 1058193240Ssam 1059193240Ssam KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state)); 1060193240Ssam 1061193240Ssam /* 1062193240Ssam * Update the h/w rate map. 1063193240Ssam * NB: 0x80 for MCS is passed through unchanged 1064193240Ssam */ 1065193240Ssam memset(&rates, 0, sizeof(rates)); 1066193240Ssam /* rate used to send management frames */ 1067193240Ssam rates.MgtRate = tp->mgmtrate; 1068193240Ssam /* rate used to send multicast frames */ 1069193240Ssam rates.McastRate = tp->mcastrate; 1070193240Ssam 1071193240Ssam /* while here calculate EAPOL fixed rate cookie */ 1072193240Ssam mvp->mv_eapolformat = htole16(mwl_calcformat(rates.MgtRate, ni)); 1073193240Ssam 1074195171Ssam return mwl_hal_settxrate(mvp->mv_hvap, 1075195171Ssam tp->ucastrate != IEEE80211_FIXED_RATE_NONE ? 1076195171Ssam RATE_FIXED : RATE_AUTO, &rates); 1077193240Ssam} 1078193240Ssam 1079193240Ssam/* 1080193240Ssam * Setup a fixed xmit rate cookie for EAPOL frames. 1081193240Ssam */ 1082193240Ssamstatic void 1083193240Ssammwl_seteapolformat(struct ieee80211vap *vap) 1084193240Ssam{ 1085193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1086193240Ssam struct ieee80211_node *ni = vap->iv_bss; 1087193240Ssam enum ieee80211_phymode mode; 1088193240Ssam uint8_t rate; 1089193240Ssam 1090193240Ssam KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state)); 1091193240Ssam 1092193240Ssam mode = ieee80211_chan2mode(ni->ni_chan); 1093193240Ssam /* 1094193240Ssam * Use legacy rates when operating a mixed HT+non-HT bss. 1095193240Ssam * NB: this may violate POLA for sta and wds vap's. 1096193240Ssam */ 1097193240Ssam if (mode == IEEE80211_MODE_11NA && 1098193656Ssam (vap->iv_flags_ht & IEEE80211_FHT_PUREN) == 0) 1099193240Ssam rate = vap->iv_txparms[IEEE80211_MODE_11A].mgmtrate; 1100193240Ssam else if (mode == IEEE80211_MODE_11NG && 1101193656Ssam (vap->iv_flags_ht & IEEE80211_FHT_PUREN) == 0) 1102193240Ssam rate = vap->iv_txparms[IEEE80211_MODE_11G].mgmtrate; 1103193240Ssam else 1104193240Ssam rate = vap->iv_txparms[mode].mgmtrate; 1105193240Ssam 1106193240Ssam mvp->mv_eapolformat = htole16(mwl_calcformat(rate, ni)); 1107193240Ssam} 1108193240Ssam 1109193240Ssam/* 1110193240Ssam * Map SKU+country code to region code for radar bin'ing. 1111193240Ssam */ 1112193240Ssamstatic int 1113193240Ssammwl_map2regioncode(const struct ieee80211_regdomain *rd) 1114193240Ssam{ 1115193240Ssam switch (rd->regdomain) { 1116193240Ssam case SKU_FCC: 1117193240Ssam case SKU_FCC3: 1118193240Ssam return DOMAIN_CODE_FCC; 1119193240Ssam case SKU_CA: 1120193240Ssam return DOMAIN_CODE_IC; 1121193240Ssam case SKU_ETSI: 1122193240Ssam case SKU_ETSI2: 1123193240Ssam case SKU_ETSI3: 1124193240Ssam if (rd->country == CTRY_SPAIN) 1125193240Ssam return DOMAIN_CODE_SPAIN; 1126193240Ssam if (rd->country == CTRY_FRANCE || rd->country == CTRY_FRANCE2) 1127193240Ssam return DOMAIN_CODE_FRANCE; 1128193240Ssam /* XXX force 1.3.1 radar type */ 1129193240Ssam return DOMAIN_CODE_ETSI_131; 1130193240Ssam case SKU_JAPAN: 1131193240Ssam return DOMAIN_CODE_MKK; 1132193240Ssam case SKU_ROW: 1133193240Ssam return DOMAIN_CODE_DGT; /* Taiwan */ 1134193240Ssam case SKU_APAC: 1135193240Ssam case SKU_APAC2: 1136193240Ssam case SKU_APAC3: 1137193240Ssam return DOMAIN_CODE_AUS; /* Australia */ 1138193240Ssam } 1139193240Ssam /* XXX KOREA? */ 1140193240Ssam return DOMAIN_CODE_FCC; /* XXX? */ 1141193240Ssam} 1142193240Ssam 1143193240Ssamstatic int 1144193240Ssammwl_hal_reset(struct mwl_softc *sc) 1145193240Ssam{ 1146193240Ssam struct ifnet *ifp = sc->sc_ifp; 1147193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1148193240Ssam struct mwl_hal *mh = sc->sc_mh; 1149193240Ssam 1150193240Ssam mwl_hal_setantenna(mh, WL_ANTENNATYPE_RX, sc->sc_rxantenna); 1151193240Ssam mwl_hal_setantenna(mh, WL_ANTENNATYPE_TX, sc->sc_txantenna); 1152193240Ssam mwl_hal_setradio(mh, 1, WL_AUTO_PREAMBLE); 1153193240Ssam mwl_hal_setwmm(sc->sc_mh, (ic->ic_flags & IEEE80211_F_WME) != 0); 1154193240Ssam mwl_chan_set(sc, ic->ic_curchan); 1155195171Ssam /* NB: RF/RA performance tuned for indoor mode */ 1156195171Ssam mwl_hal_setrateadaptmode(mh, 0); 1157193240Ssam mwl_hal_setoptimizationlevel(mh, 1158193240Ssam (ic->ic_flags & IEEE80211_F_BURST) != 0); 1159193240Ssam 1160193240Ssam mwl_hal_setregioncode(mh, mwl_map2regioncode(&ic->ic_regdomain)); 1161193240Ssam 1162195171Ssam mwl_hal_setaggampduratemode(mh, 1, 80); /* XXX */ 1163195171Ssam mwl_hal_setcfend(mh, 0); /* XXX */ 1164195171Ssam 1165193240Ssam return 1; 1166193240Ssam} 1167193240Ssam 1168193240Ssamstatic int 1169193240Ssammwl_init_locked(struct mwl_softc *sc) 1170193240Ssam{ 1171193240Ssam struct ifnet *ifp = sc->sc_ifp; 1172193240Ssam struct mwl_hal *mh = sc->sc_mh; 1173193240Ssam int error = 0; 1174193240Ssam 1175193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n", 1176193240Ssam __func__, ifp->if_flags); 1177193240Ssam 1178193240Ssam MWL_LOCK_ASSERT(sc); 1179193240Ssam 1180193240Ssam /* 1181193240Ssam * Stop anything previously setup. This is safe 1182193240Ssam * whether this is the first time through or not. 1183193240Ssam */ 1184193240Ssam mwl_stop_locked(ifp, 0); 1185193240Ssam 1186193240Ssam /* 1187193240Ssam * Push vap-independent state to the firmware. 1188193240Ssam */ 1189193240Ssam if (!mwl_hal_reset(sc)) { 1190193240Ssam if_printf(ifp, "unable to reset hardware\n"); 1191193240Ssam return EIO; 1192193240Ssam } 1193193240Ssam 1194193240Ssam /* 1195193240Ssam * Setup recv (once); transmit is already good to go. 1196193240Ssam */ 1197193240Ssam error = mwl_startrecv(sc); 1198193240Ssam if (error != 0) { 1199193240Ssam if_printf(ifp, "unable to start recv logic\n"); 1200193240Ssam return error; 1201193240Ssam } 1202193240Ssam 1203193240Ssam /* 1204193240Ssam * Enable interrupts. 1205193240Ssam */ 1206193240Ssam sc->sc_imask = MACREG_A2HRIC_BIT_RX_RDY 1207193240Ssam | MACREG_A2HRIC_BIT_TX_DONE 1208193240Ssam | MACREG_A2HRIC_BIT_OPC_DONE 1209193240Ssam#if 0 1210193240Ssam | MACREG_A2HRIC_BIT_MAC_EVENT 1211193240Ssam#endif 1212193240Ssam | MACREG_A2HRIC_BIT_ICV_ERROR 1213193240Ssam | MACREG_A2HRIC_BIT_RADAR_DETECT 1214193240Ssam | MACREG_A2HRIC_BIT_CHAN_SWITCH 1215193240Ssam#if 0 1216193240Ssam | MACREG_A2HRIC_BIT_QUEUE_EMPTY 1217193240Ssam#endif 1218193240Ssam | MACREG_A2HRIC_BIT_BA_WATCHDOG 1219195171Ssam | MACREQ_A2HRIC_BIT_TX_ACK 1220193240Ssam ; 1221193240Ssam 1222193240Ssam ifp->if_drv_flags |= IFF_DRV_RUNNING; 1223193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 1224199559Sjhb callout_reset(&sc->sc_watchdog, hz, mwl_watchdog, sc); 1225193240Ssam 1226193240Ssam return 0; 1227193240Ssam} 1228193240Ssam 1229193240Ssamstatic void 1230193240Ssammwl_init(void *arg) 1231193240Ssam{ 1232193240Ssam struct mwl_softc *sc = arg; 1233193240Ssam struct ifnet *ifp = sc->sc_ifp; 1234193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1235193240Ssam int error = 0; 1236193240Ssam 1237193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n", 1238193240Ssam __func__, ifp->if_flags); 1239193240Ssam 1240193240Ssam MWL_LOCK(sc); 1241193240Ssam error = mwl_init_locked(sc); 1242193240Ssam MWL_UNLOCK(sc); 1243193240Ssam 1244193240Ssam if (error == 0) 1245193240Ssam ieee80211_start_all(ic); /* start all vap's */ 1246193240Ssam} 1247193240Ssam 1248193240Ssamstatic void 1249193240Ssammwl_stop_locked(struct ifnet *ifp, int disable) 1250193240Ssam{ 1251193240Ssam struct mwl_softc *sc = ifp->if_softc; 1252193240Ssam 1253193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1254193240Ssam __func__, sc->sc_invalid, ifp->if_flags); 1255193240Ssam 1256193240Ssam MWL_LOCK_ASSERT(sc); 1257193240Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1258193240Ssam /* 1259193240Ssam * Shutdown the hardware and driver. 1260193240Ssam */ 1261193240Ssam ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1262199559Sjhb callout_stop(&sc->sc_watchdog); 1263199559Sjhb sc->sc_tx_timer = 0; 1264193240Ssam mwl_draintxq(sc); 1265193240Ssam } 1266193240Ssam} 1267193240Ssam 1268193240Ssamstatic void 1269193240Ssammwl_stop(struct ifnet *ifp, int disable) 1270193240Ssam{ 1271193240Ssam struct mwl_softc *sc = ifp->if_softc; 1272193240Ssam 1273193240Ssam MWL_LOCK(sc); 1274193240Ssam mwl_stop_locked(ifp, disable); 1275193240Ssam MWL_UNLOCK(sc); 1276193240Ssam} 1277193240Ssam 1278193240Ssamstatic int 1279193240Ssammwl_reset_vap(struct ieee80211vap *vap, int state) 1280193240Ssam{ 1281193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1282193240Ssam struct ieee80211com *ic = vap->iv_ic; 1283193240Ssam 1284193240Ssam if (state == IEEE80211_S_RUN) 1285193240Ssam mwl_setrates(vap); 1286193240Ssam /* XXX off by 1? */ 1287193240Ssam mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold); 1288193240Ssam /* XXX auto? 20/40 split? */ 1289193656Ssam mwl_hal_sethtgi(hvap, (vap->iv_flags_ht & 1290193656Ssam (IEEE80211_FHT_SHORTGI20|IEEE80211_FHT_SHORTGI40)) ? 1 : 0); 1291193240Ssam mwl_hal_setnprot(hvap, ic->ic_htprotmode == IEEE80211_PROT_NONE ? 1292193240Ssam HTPROTECT_NONE : HTPROTECT_AUTO); 1293193240Ssam /* XXX txpower cap */ 1294193240Ssam 1295193240Ssam /* re-setup beacons */ 1296193240Ssam if (state == IEEE80211_S_RUN && 1297193240Ssam (vap->iv_opmode == IEEE80211_M_HOSTAP || 1298195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS || 1299193240Ssam vap->iv_opmode == IEEE80211_M_IBSS)) { 1300193240Ssam mwl_setapmode(vap, vap->iv_bss->ni_chan); 1301193240Ssam mwl_hal_setnprotmode(hvap, 1302193240Ssam MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE)); 1303193240Ssam return mwl_beacon_setup(vap); 1304193240Ssam } 1305193240Ssam return 0; 1306193240Ssam} 1307193240Ssam 1308193240Ssam/* 1309193240Ssam * Reset the hardware w/o losing operational state. 1310193240Ssam * Used to to reset or reload hardware state for a vap. 1311193240Ssam */ 1312193240Ssamstatic int 1313193240Ssammwl_reset(struct ieee80211vap *vap, u_long cmd) 1314193240Ssam{ 1315193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1316193240Ssam int error = 0; 1317193240Ssam 1318193240Ssam if (hvap != NULL) { /* WDS, MONITOR, etc. */ 1319193240Ssam struct ieee80211com *ic = vap->iv_ic; 1320193240Ssam struct ifnet *ifp = ic->ic_ifp; 1321193240Ssam struct mwl_softc *sc = ifp->if_softc; 1322193240Ssam struct mwl_hal *mh = sc->sc_mh; 1323193240Ssam 1324195171Ssam /* XXX handle DWDS sta vap change */ 1325193240Ssam /* XXX do we need to disable interrupts? */ 1326193240Ssam mwl_hal_intrset(mh, 0); /* disable interrupts */ 1327193240Ssam error = mwl_reset_vap(vap, vap->iv_state); 1328193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 1329193240Ssam } 1330193240Ssam return error; 1331193240Ssam} 1332193240Ssam 1333193240Ssam/* 1334193240Ssam * Allocate a tx buffer for sending a frame. The 1335193240Ssam * packet is assumed to have the WME AC stored so 1336193240Ssam * we can use it to select the appropriate h/w queue. 1337193240Ssam */ 1338193240Ssamstatic struct mwl_txbuf * 1339193240Ssammwl_gettxbuf(struct mwl_softc *sc, struct mwl_txq *txq) 1340193240Ssam{ 1341193240Ssam struct mwl_txbuf *bf; 1342193240Ssam 1343193240Ssam /* 1344193240Ssam * Grab a TX buffer and associated resources. 1345193240Ssam */ 1346193240Ssam MWL_TXQ_LOCK(txq); 1347193240Ssam bf = STAILQ_FIRST(&txq->free); 1348193240Ssam if (bf != NULL) { 1349193240Ssam STAILQ_REMOVE_HEAD(&txq->free, bf_list); 1350193240Ssam txq->nfree--; 1351193240Ssam } 1352193240Ssam MWL_TXQ_UNLOCK(txq); 1353193240Ssam if (bf == NULL) 1354193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, 1355193240Ssam "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 1356193240Ssam return bf; 1357193240Ssam} 1358193240Ssam 1359193240Ssam/* 1360193240Ssam * Return a tx buffer to the queue it came from. Note there 1361193240Ssam * are two cases because we must preserve the order of buffers 1362193240Ssam * as it reflects the fixed order of descriptors in memory 1363193240Ssam * (the firmware pre-fetches descriptors so we cannot reorder). 1364193240Ssam */ 1365193240Ssamstatic void 1366193240Ssammwl_puttxbuf_head(struct mwl_txq *txq, struct mwl_txbuf *bf) 1367193240Ssam{ 1368193240Ssam bf->bf_m = NULL; 1369193240Ssam bf->bf_node = NULL; 1370193240Ssam MWL_TXQ_LOCK(txq); 1371193240Ssam STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1372193240Ssam txq->nfree++; 1373193240Ssam MWL_TXQ_UNLOCK(txq); 1374193240Ssam} 1375193240Ssam 1376193240Ssamstatic void 1377193240Ssammwl_puttxbuf_tail(struct mwl_txq *txq, struct mwl_txbuf *bf) 1378193240Ssam{ 1379193240Ssam bf->bf_m = NULL; 1380193240Ssam bf->bf_node = NULL; 1381193240Ssam MWL_TXQ_LOCK(txq); 1382193240Ssam STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1383193240Ssam txq->nfree++; 1384193240Ssam MWL_TXQ_UNLOCK(txq); 1385193240Ssam} 1386193240Ssam 1387193240Ssamstatic void 1388193240Ssammwl_start(struct ifnet *ifp) 1389193240Ssam{ 1390193240Ssam struct mwl_softc *sc = ifp->if_softc; 1391193240Ssam struct ieee80211_node *ni; 1392193240Ssam struct mwl_txbuf *bf; 1393193240Ssam struct mbuf *m; 1394193240Ssam struct mwl_txq *txq = NULL; /* XXX silence gcc */ 1395193240Ssam int nqueued; 1396193240Ssam 1397193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) 1398193240Ssam return; 1399193240Ssam nqueued = 0; 1400193240Ssam for (;;) { 1401193240Ssam bf = NULL; 1402193240Ssam IFQ_DEQUEUE(&ifp->if_snd, m); 1403193240Ssam if (m == NULL) 1404193240Ssam break; 1405193240Ssam /* 1406193240Ssam * Grab the node for the destination. 1407193240Ssam */ 1408193240Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1409193240Ssam KASSERT(ni != NULL, ("no node")); 1410193240Ssam m->m_pkthdr.rcvif = NULL; /* committed, clear ref */ 1411193240Ssam /* 1412193240Ssam * Grab a TX buffer and associated resources. 1413193240Ssam * We honor the classification by the 802.11 layer. 1414193240Ssam */ 1415193240Ssam txq = sc->sc_ac2q[M_WME_GETAC(m)]; 1416193240Ssam bf = mwl_gettxbuf(sc, txq); 1417193240Ssam if (bf == NULL) { 1418193240Ssam m_freem(m); 1419193240Ssam ieee80211_free_node(ni); 1420193240Ssam#ifdef MWL_TX_NODROP 1421193240Ssam sc->sc_stats.mst_tx_qstop++; 1422193240Ssam /* XXX blocks other traffic */ 1423193240Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1424193240Ssam break; 1425193240Ssam#else 1426193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, 1427193240Ssam "%s: tail drop on q %d\n", __func__, txq->qnum); 1428193240Ssam sc->sc_stats.mst_tx_qdrop++; 1429193240Ssam continue; 1430193240Ssam#endif /* MWL_TX_NODROP */ 1431193240Ssam } 1432193240Ssam 1433193240Ssam /* 1434193240Ssam * Pass the frame to the h/w for transmission. 1435193240Ssam */ 1436193240Ssam if (mwl_tx_start(sc, ni, bf, m)) { 1437193240Ssam ifp->if_oerrors++; 1438193240Ssam mwl_puttxbuf_head(txq, bf); 1439193240Ssam ieee80211_free_node(ni); 1440193240Ssam continue; 1441193240Ssam } 1442193240Ssam nqueued++; 1443193240Ssam if (nqueued >= mwl_txcoalesce) { 1444193240Ssam /* 1445193240Ssam * Poke the firmware to process queued frames; 1446193240Ssam * see below about (lack of) locking. 1447193240Ssam */ 1448193240Ssam nqueued = 0; 1449193240Ssam mwl_hal_txstart(sc->sc_mh, 0/*XXX*/); 1450193240Ssam } 1451193240Ssam } 1452193240Ssam if (nqueued) { 1453193240Ssam /* 1454193240Ssam * NB: We don't need to lock against tx done because 1455193240Ssam * this just prods the firmware to check the transmit 1456193240Ssam * descriptors. The firmware will also start fetching 1457193240Ssam * descriptors by itself if it notices new ones are 1458193240Ssam * present when it goes to deliver a tx done interrupt 1459193240Ssam * to the host. So if we race with tx done processing 1460193240Ssam * it's ok. Delivering the kick here rather than in 1461193240Ssam * mwl_tx_start is an optimization to avoid poking the 1462193240Ssam * firmware for each packet. 1463193240Ssam * 1464193240Ssam * NB: the queue id isn't used so 0 is ok. 1465193240Ssam */ 1466193240Ssam mwl_hal_txstart(sc->sc_mh, 0/*XXX*/); 1467193240Ssam } 1468193240Ssam} 1469193240Ssam 1470193240Ssamstatic int 1471193240Ssammwl_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1472193240Ssam const struct ieee80211_bpf_params *params) 1473193240Ssam{ 1474193240Ssam struct ieee80211com *ic = ni->ni_ic; 1475193240Ssam struct ifnet *ifp = ic->ic_ifp; 1476193240Ssam struct mwl_softc *sc = ifp->if_softc; 1477193240Ssam struct mwl_txbuf *bf; 1478193240Ssam struct mwl_txq *txq; 1479193240Ssam 1480193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) { 1481193240Ssam ieee80211_free_node(ni); 1482193240Ssam m_freem(m); 1483193240Ssam return ENETDOWN; 1484193240Ssam } 1485193240Ssam /* 1486193240Ssam * Grab a TX buffer and associated resources. 1487193240Ssam * Note that we depend on the classification 1488193240Ssam * by the 802.11 layer to get to the right h/w 1489193240Ssam * queue. Management frames must ALWAYS go on 1490193240Ssam * queue 1 but we cannot just force that here 1491193240Ssam * because we may receive non-mgt frames. 1492193240Ssam */ 1493193240Ssam txq = sc->sc_ac2q[M_WME_GETAC(m)]; 1494193240Ssam bf = mwl_gettxbuf(sc, txq); 1495193240Ssam if (bf == NULL) { 1496193240Ssam sc->sc_stats.mst_tx_qstop++; 1497193240Ssam /* XXX blocks other traffic */ 1498193240Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1499193240Ssam ieee80211_free_node(ni); 1500193240Ssam m_freem(m); 1501193240Ssam return ENOBUFS; 1502193240Ssam } 1503193240Ssam /* 1504193240Ssam * Pass the frame to the h/w for transmission. 1505193240Ssam */ 1506193240Ssam if (mwl_tx_start(sc, ni, bf, m)) { 1507193240Ssam ifp->if_oerrors++; 1508193240Ssam mwl_puttxbuf_head(txq, bf); 1509193240Ssam 1510193240Ssam ieee80211_free_node(ni); 1511193240Ssam return EIO; /* XXX */ 1512193240Ssam } 1513193240Ssam /* 1514193240Ssam * NB: We don't need to lock against tx done because 1515193240Ssam * this just prods the firmware to check the transmit 1516193240Ssam * descriptors. The firmware will also start fetching 1517193240Ssam * descriptors by itself if it notices new ones are 1518193240Ssam * present when it goes to deliver a tx done interrupt 1519193240Ssam * to the host. So if we race with tx done processing 1520193240Ssam * it's ok. Delivering the kick here rather than in 1521193240Ssam * mwl_tx_start is an optimization to avoid poking the 1522193240Ssam * firmware for each packet. 1523193240Ssam * 1524193240Ssam * NB: the queue id isn't used so 0 is ok. 1525193240Ssam */ 1526193240Ssam mwl_hal_txstart(sc->sc_mh, 0/*XXX*/); 1527193240Ssam return 0; 1528193240Ssam} 1529193240Ssam 1530193240Ssamstatic int 1531193240Ssammwl_media_change(struct ifnet *ifp) 1532193240Ssam{ 1533193240Ssam struct ieee80211vap *vap = ifp->if_softc; 1534193240Ssam int error; 1535193240Ssam 1536193240Ssam error = ieee80211_media_change(ifp); 1537193240Ssam /* NB: only the fixed rate can change and that doesn't need a reset */ 1538193240Ssam if (error == ENETRESET) { 1539193240Ssam mwl_setrates(vap); 1540193240Ssam error = 0; 1541193240Ssam } 1542193240Ssam return error; 1543193240Ssam} 1544193240Ssam 1545193240Ssam#ifdef MWL_DEBUG 1546193240Ssamstatic void 1547193240Ssammwl_keyprint(struct mwl_softc *sc, const char *tag, 1548193240Ssam const MWL_HAL_KEYVAL *hk, const uint8_t mac[IEEE80211_ADDR_LEN]) 1549193240Ssam{ 1550193240Ssam static const char *ciphers[] = { 1551193240Ssam "WEP", 1552193240Ssam "TKIP", 1553193240Ssam "AES-CCM", 1554193240Ssam }; 1555193240Ssam int i, n; 1556193240Ssam 1557193240Ssam printf("%s: [%u] %-7s", tag, hk->keyIndex, ciphers[hk->keyTypeId]); 1558193240Ssam for (i = 0, n = hk->keyLen; i < n; i++) 1559193240Ssam printf(" %02x", hk->key.aes[i]); 1560193240Ssam printf(" mac %s", ether_sprintf(mac)); 1561193240Ssam if (hk->keyTypeId == KEY_TYPE_ID_TKIP) { 1562193240Ssam printf(" %s", "rxmic"); 1563193240Ssam for (i = 0; i < sizeof(hk->key.tkip.rxMic); i++) 1564193240Ssam printf(" %02x", hk->key.tkip.rxMic[i]); 1565193240Ssam printf(" txmic"); 1566193240Ssam for (i = 0; i < sizeof(hk->key.tkip.txMic); i++) 1567193240Ssam printf(" %02x", hk->key.tkip.txMic[i]); 1568193240Ssam } 1569193240Ssam printf(" flags 0x%x\n", hk->keyFlags); 1570193240Ssam} 1571193240Ssam#endif 1572193240Ssam 1573193240Ssam/* 1574193240Ssam * Allocate a key cache slot for a unicast key. The 1575193240Ssam * firmware handles key allocation and every station is 1576193240Ssam * guaranteed key space so we are always successful. 1577193240Ssam */ 1578193240Ssamstatic int 1579193240Ssammwl_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 1580193240Ssam ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 1581193240Ssam{ 1582193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 1583193240Ssam 1584193240Ssam if (k->wk_keyix != IEEE80211_KEYIX_NONE || 1585193240Ssam (k->wk_flags & IEEE80211_KEY_GROUP)) { 1586193240Ssam if (!(&vap->iv_nw_keys[0] <= k && 1587193240Ssam k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 1588193240Ssam /* should not happen */ 1589193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, 1590193240Ssam "%s: bogus group key\n", __func__); 1591193240Ssam return 0; 1592193240Ssam } 1593193240Ssam /* give the caller what they requested */ 1594193240Ssam *keyix = *rxkeyix = k - vap->iv_nw_keys; 1595193240Ssam } else { 1596193240Ssam /* 1597193240Ssam * Firmware handles key allocation. 1598193240Ssam */ 1599193240Ssam *keyix = *rxkeyix = 0; 1600193240Ssam } 1601193240Ssam return 1; 1602193240Ssam} 1603193240Ssam 1604193240Ssam/* 1605193240Ssam * Delete a key entry allocated by mwl_key_alloc. 1606193240Ssam */ 1607193240Ssamstatic int 1608193240Ssammwl_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 1609193240Ssam{ 1610193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 1611193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1612193240Ssam MWL_HAL_KEYVAL hk; 1613193240Ssam const uint8_t bcastaddr[IEEE80211_ADDR_LEN] = 1614193240Ssam { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 1615193240Ssam 1616193240Ssam if (hvap == NULL) { 1617193240Ssam if (vap->iv_opmode != IEEE80211_M_WDS) { 1618193240Ssam /* XXX monitor mode? */ 1619193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, 1620193240Ssam "%s: no hvap for opmode %d\n", __func__, 1621193240Ssam vap->iv_opmode); 1622193240Ssam return 0; 1623193240Ssam } 1624193240Ssam hvap = MWL_VAP(vap)->mv_ap_hvap; 1625193240Ssam } 1626193240Ssam 1627193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: delete key %u\n", 1628193240Ssam __func__, k->wk_keyix); 1629193240Ssam 1630193240Ssam memset(&hk, 0, sizeof(hk)); 1631193240Ssam hk.keyIndex = k->wk_keyix; 1632193240Ssam switch (k->wk_cipher->ic_cipher) { 1633193240Ssam case IEEE80211_CIPHER_WEP: 1634193240Ssam hk.keyTypeId = KEY_TYPE_ID_WEP; 1635193240Ssam break; 1636193240Ssam case IEEE80211_CIPHER_TKIP: 1637193240Ssam hk.keyTypeId = KEY_TYPE_ID_TKIP; 1638193240Ssam break; 1639193240Ssam case IEEE80211_CIPHER_AES_CCM: 1640193240Ssam hk.keyTypeId = KEY_TYPE_ID_AES; 1641193240Ssam break; 1642193240Ssam default: 1643193240Ssam /* XXX should not happen */ 1644193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n", 1645193240Ssam __func__, k->wk_cipher->ic_cipher); 1646193240Ssam return 0; 1647193240Ssam } 1648193240Ssam return (mwl_hal_keyreset(hvap, &hk, bcastaddr) == 0); /*XXX*/ 1649193240Ssam} 1650193240Ssam 1651193240Ssamstatic __inline int 1652193240Ssamaddgroupflags(MWL_HAL_KEYVAL *hk, const struct ieee80211_key *k) 1653193240Ssam{ 1654193240Ssam if (k->wk_flags & IEEE80211_KEY_GROUP) { 1655193240Ssam if (k->wk_flags & IEEE80211_KEY_XMIT) 1656193240Ssam hk->keyFlags |= KEY_FLAG_TXGROUPKEY; 1657193240Ssam if (k->wk_flags & IEEE80211_KEY_RECV) 1658193240Ssam hk->keyFlags |= KEY_FLAG_RXGROUPKEY; 1659193240Ssam return 1; 1660193240Ssam } else 1661193240Ssam return 0; 1662193240Ssam} 1663193240Ssam 1664193240Ssam/* 1665193240Ssam * Set the key cache contents for the specified key. Key cache 1666193240Ssam * slot(s) must already have been allocated by mwl_key_alloc. 1667193240Ssam */ 1668193240Ssamstatic int 1669193240Ssammwl_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k, 1670193240Ssam const uint8_t mac[IEEE80211_ADDR_LEN]) 1671193240Ssam{ 1672193240Ssam#define GRPXMIT (IEEE80211_KEY_XMIT | IEEE80211_KEY_GROUP) 1673193240Ssam/* NB: static wep keys are marked GROUP+tx/rx; GTK will be tx or rx */ 1674193240Ssam#define IEEE80211_IS_STATICKEY(k) \ 1675193240Ssam (((k)->wk_flags & (GRPXMIT|IEEE80211_KEY_RECV)) == \ 1676193240Ssam (GRPXMIT|IEEE80211_KEY_RECV)) 1677193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 1678193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1679193240Ssam const struct ieee80211_cipher *cip = k->wk_cipher; 1680193240Ssam const uint8_t *macaddr; 1681193240Ssam MWL_HAL_KEYVAL hk; 1682193240Ssam 1683193240Ssam KASSERT((k->wk_flags & IEEE80211_KEY_SWCRYPT) == 0, 1684193240Ssam ("s/w crypto set?")); 1685193240Ssam 1686193240Ssam if (hvap == NULL) { 1687193240Ssam if (vap->iv_opmode != IEEE80211_M_WDS) { 1688193240Ssam /* XXX monitor mode? */ 1689193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, 1690193240Ssam "%s: no hvap for opmode %d\n", __func__, 1691193240Ssam vap->iv_opmode); 1692193240Ssam return 0; 1693193240Ssam } 1694193240Ssam hvap = MWL_VAP(vap)->mv_ap_hvap; 1695193240Ssam } 1696193240Ssam memset(&hk, 0, sizeof(hk)); 1697193240Ssam hk.keyIndex = k->wk_keyix; 1698193240Ssam switch (cip->ic_cipher) { 1699193240Ssam case IEEE80211_CIPHER_WEP: 1700193240Ssam hk.keyTypeId = KEY_TYPE_ID_WEP; 1701193240Ssam hk.keyLen = k->wk_keylen; 1702193240Ssam if (k->wk_keyix == vap->iv_def_txkey) 1703193240Ssam hk.keyFlags = KEY_FLAG_WEP_TXKEY; 1704193240Ssam if (!IEEE80211_IS_STATICKEY(k)) { 1705193240Ssam /* NB: WEP is never used for the PTK */ 1706193240Ssam (void) addgroupflags(&hk, k); 1707193240Ssam } 1708193240Ssam break; 1709193240Ssam case IEEE80211_CIPHER_TKIP: 1710193240Ssam hk.keyTypeId = KEY_TYPE_ID_TKIP; 1711193240Ssam hk.key.tkip.tsc.high = (uint32_t)(k->wk_keytsc >> 16); 1712193240Ssam hk.key.tkip.tsc.low = (uint16_t)k->wk_keytsc; 1713193240Ssam hk.keyFlags = KEY_FLAG_TSC_VALID | KEY_FLAG_MICKEY_VALID; 1714193240Ssam hk.keyLen = k->wk_keylen + IEEE80211_MICBUF_SIZE; 1715193240Ssam if (!addgroupflags(&hk, k)) 1716193240Ssam hk.keyFlags |= KEY_FLAG_PAIRWISE; 1717193240Ssam break; 1718193240Ssam case IEEE80211_CIPHER_AES_CCM: 1719193240Ssam hk.keyTypeId = KEY_TYPE_ID_AES; 1720193240Ssam hk.keyLen = k->wk_keylen; 1721193240Ssam if (!addgroupflags(&hk, k)) 1722193240Ssam hk.keyFlags |= KEY_FLAG_PAIRWISE; 1723193240Ssam break; 1724193240Ssam default: 1725193240Ssam /* XXX should not happen */ 1726193240Ssam DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n", 1727193240Ssam __func__, k->wk_cipher->ic_cipher); 1728193240Ssam return 0; 1729193240Ssam } 1730193240Ssam /* 1731193240Ssam * NB: tkip mic keys get copied here too; the layout 1732193240Ssam * just happens to match that in ieee80211_key. 1733193240Ssam */ 1734193240Ssam memcpy(hk.key.aes, k->wk_key, hk.keyLen); 1735193240Ssam 1736193240Ssam /* 1737193240Ssam * Locate address of sta db entry for writing key; 1738193240Ssam * the convention unfortunately is somewhat different 1739193240Ssam * than how net80211, hostapd, and wpa_supplicant think. 1740193240Ssam */ 1741193240Ssam if (vap->iv_opmode == IEEE80211_M_STA) { 1742193240Ssam /* 1743193240Ssam * NB: keys plumbed before the sta reaches AUTH state 1744193240Ssam * will be discarded or written to the wrong sta db 1745193240Ssam * entry because iv_bss is meaningless. This is ok 1746193240Ssam * (right now) because we handle deferred plumbing of 1747193240Ssam * WEP keys when the sta reaches AUTH state. 1748193240Ssam */ 1749193240Ssam macaddr = vap->iv_bss->ni_bssid; 1750196842Ssam if ((k->wk_flags & IEEE80211_KEY_GROUP) == 0) { 1751196842Ssam /* XXX plumb to local sta db too for static key wep */ 1752196842Ssam mwl_hal_keyset(hvap, &hk, vap->iv_myaddr); 1753196842Ssam } 1754193240Ssam } else if (vap->iv_opmode == IEEE80211_M_WDS && 1755193240Ssam vap->iv_state != IEEE80211_S_RUN) { 1756193240Ssam /* 1757193240Ssam * Prior to RUN state a WDS vap will not it's BSS node 1758193240Ssam * setup so we will plumb the key to the wrong mac 1759193240Ssam * address (it'll be our local address). Workaround 1760193240Ssam * this for the moment by grabbing the correct address. 1761193240Ssam */ 1762193240Ssam macaddr = vap->iv_des_bssid; 1763193240Ssam } else if ((k->wk_flags & GRPXMIT) == GRPXMIT) 1764193240Ssam macaddr = vap->iv_myaddr; 1765193240Ssam else 1766193240Ssam macaddr = mac; 1767193240Ssam KEYPRINTF(sc, &hk, macaddr); 1768193240Ssam return (mwl_hal_keyset(hvap, &hk, macaddr) == 0); 1769193240Ssam#undef IEEE80211_IS_STATICKEY 1770193240Ssam#undef GRPXMIT 1771193240Ssam} 1772193240Ssam 1773193240Ssam/* unaligned little endian access */ 1774193240Ssam#define LE_READ_2(p) \ 1775193240Ssam ((uint16_t) \ 1776193240Ssam ((((const uint8_t *)(p))[0] ) | \ 1777193240Ssam (((const uint8_t *)(p))[1] << 8))) 1778193240Ssam#define LE_READ_4(p) \ 1779193240Ssam ((uint32_t) \ 1780193240Ssam ((((const uint8_t *)(p))[0] ) | \ 1781193240Ssam (((const uint8_t *)(p))[1] << 8) | \ 1782193240Ssam (((const uint8_t *)(p))[2] << 16) | \ 1783193240Ssam (((const uint8_t *)(p))[3] << 24))) 1784193240Ssam 1785193240Ssam/* 1786193240Ssam * Set the multicast filter contents into the hardware. 1787193240Ssam * XXX f/w has no support; just defer to the os. 1788193240Ssam */ 1789193240Ssamstatic void 1790193240Ssammwl_setmcastfilter(struct mwl_softc *sc) 1791193240Ssam{ 1792193240Ssam struct ifnet *ifp = sc->sc_ifp; 1793193240Ssam#if 0 1794193240Ssam struct ether_multi *enm; 1795193240Ssam struct ether_multistep estep; 1796193240Ssam uint8_t macs[IEEE80211_ADDR_LEN*MWL_HAL_MCAST_MAX];/* XXX stack use */ 1797193240Ssam uint8_t *mp; 1798193240Ssam int nmc; 1799193240Ssam 1800193240Ssam mp = macs; 1801193240Ssam nmc = 0; 1802193240Ssam ETHER_FIRST_MULTI(estep, &sc->sc_ec, enm); 1803193240Ssam while (enm != NULL) { 1804193240Ssam /* XXX Punt on ranges. */ 1805193240Ssam if (nmc == MWL_HAL_MCAST_MAX || 1806193240Ssam !IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1807193240Ssam ifp->if_flags |= IFF_ALLMULTI; 1808193240Ssam return; 1809193240Ssam } 1810193240Ssam IEEE80211_ADDR_COPY(mp, enm->enm_addrlo); 1811193240Ssam mp += IEEE80211_ADDR_LEN, nmc++; 1812193240Ssam ETHER_NEXT_MULTI(estep, enm); 1813193240Ssam } 1814193240Ssam ifp->if_flags &= ~IFF_ALLMULTI; 1815193240Ssam mwl_hal_setmcast(sc->sc_mh, nmc, macs); 1816193240Ssam#else 1817193240Ssam /* XXX no mcast filter support; we get everything */ 1818193240Ssam ifp->if_flags |= IFF_ALLMULTI; 1819193240Ssam#endif 1820193240Ssam} 1821193240Ssam 1822193240Ssamstatic int 1823193240Ssammwl_mode_init(struct mwl_softc *sc) 1824193240Ssam{ 1825193240Ssam struct ifnet *ifp = sc->sc_ifp; 1826193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1827193240Ssam struct mwl_hal *mh = sc->sc_mh; 1828193240Ssam 1829193240Ssam /* 1830193240Ssam * NB: Ignore promisc in hostap mode; it's set by the 1831193240Ssam * bridge. This is wrong but we have no way to 1832193240Ssam * identify internal requests (from the bridge) 1833193240Ssam * versus external requests such as for tcpdump. 1834193240Ssam */ 1835193240Ssam mwl_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1836193240Ssam ic->ic_opmode != IEEE80211_M_HOSTAP); 1837193240Ssam mwl_setmcastfilter(sc); 1838193240Ssam 1839193240Ssam return 0; 1840193240Ssam} 1841193240Ssam 1842193240Ssam/* 1843193240Ssam * Callback from the 802.11 layer after a multicast state change. 1844193240Ssam */ 1845193240Ssamstatic void 1846193240Ssammwl_update_mcast(struct ifnet *ifp) 1847193240Ssam{ 1848193240Ssam struct mwl_softc *sc = ifp->if_softc; 1849193240Ssam 1850193240Ssam mwl_setmcastfilter(sc); 1851193240Ssam} 1852193240Ssam 1853193240Ssam/* 1854193240Ssam * Callback from the 802.11 layer after a promiscuous mode change. 1855193240Ssam * Note this interface does not check the operating mode as this 1856193240Ssam * is an internal callback and we are expected to honor the current 1857193240Ssam * state (e.g. this is used for setting the interface in promiscuous 1858193240Ssam * mode when operating in hostap mode to do ACS). 1859193240Ssam */ 1860193240Ssamstatic void 1861193240Ssammwl_update_promisc(struct ifnet *ifp) 1862193240Ssam{ 1863193240Ssam struct mwl_softc *sc = ifp->if_softc; 1864193240Ssam 1865193240Ssam mwl_hal_setpromisc(sc->sc_mh, (ifp->if_flags & IFF_PROMISC) != 0); 1866193240Ssam} 1867193240Ssam 1868193240Ssam/* 1869193240Ssam * Callback from the 802.11 layer to update the slot time 1870193240Ssam * based on the current setting. We use it to notify the 1871193240Ssam * firmware of ERP changes and the f/w takes care of things 1872193240Ssam * like slot time and preamble. 1873193240Ssam */ 1874193240Ssamstatic void 1875193240Ssammwl_updateslot(struct ifnet *ifp) 1876193240Ssam{ 1877193240Ssam struct mwl_softc *sc = ifp->if_softc; 1878193240Ssam struct ieee80211com *ic = ifp->if_l2com; 1879193240Ssam struct mwl_hal *mh = sc->sc_mh; 1880193240Ssam int prot; 1881193240Ssam 1882193240Ssam /* NB: can be called early; suppress needless cmds */ 1883193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1884193240Ssam return; 1885193240Ssam 1886193240Ssam /* 1887193240Ssam * Calculate the ERP flags. The firwmare will use 1888193240Ssam * this to carry out the appropriate measures. 1889193240Ssam */ 1890193240Ssam prot = 0; 1891193240Ssam if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 1892193240Ssam if ((ic->ic_flags & IEEE80211_F_SHSLOT) == 0) 1893193240Ssam prot |= IEEE80211_ERP_NON_ERP_PRESENT; 1894193240Ssam if (ic->ic_flags & IEEE80211_F_USEPROT) 1895193240Ssam prot |= IEEE80211_ERP_USE_PROTECTION; 1896193240Ssam if (ic->ic_flags & IEEE80211_F_USEBARKER) 1897193240Ssam prot |= IEEE80211_ERP_LONG_PREAMBLE; 1898193240Ssam } 1899193240Ssam 1900193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, 1901193240Ssam "%s: chan %u MHz/flags 0x%x %s slot, (prot 0x%x ic_flags 0x%x)\n", 1902193240Ssam __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1903193240Ssam ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", prot, 1904193240Ssam ic->ic_flags); 1905193240Ssam 1906193240Ssam mwl_hal_setgprot(mh, prot); 1907193240Ssam} 1908193240Ssam 1909193240Ssam/* 1910193240Ssam * Setup the beacon frame. 1911193240Ssam */ 1912193240Ssamstatic int 1913193240Ssammwl_beacon_setup(struct ieee80211vap *vap) 1914193240Ssam{ 1915193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1916193240Ssam struct ieee80211_node *ni = vap->iv_bss; 1917193240Ssam struct ieee80211_beacon_offsets bo; 1918193240Ssam struct mbuf *m; 1919193240Ssam 1920193240Ssam m = ieee80211_beacon_alloc(ni, &bo); 1921193240Ssam if (m == NULL) 1922193240Ssam return ENOBUFS; 1923193240Ssam mwl_hal_setbeacon(hvap, mtod(m, const void *), m->m_len); 1924193240Ssam m_free(m); 1925193240Ssam 1926193240Ssam return 0; 1927193240Ssam} 1928193240Ssam 1929193240Ssam/* 1930193240Ssam * Update the beacon frame in response to a change. 1931193240Ssam */ 1932193240Ssamstatic void 1933193240Ssammwl_beacon_update(struct ieee80211vap *vap, int item) 1934193240Ssam{ 1935193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 1936193240Ssam struct ieee80211com *ic = vap->iv_ic; 1937193240Ssam 1938193240Ssam KASSERT(hvap != NULL, ("no beacon")); 1939193240Ssam switch (item) { 1940193240Ssam case IEEE80211_BEACON_ERP: 1941193240Ssam mwl_updateslot(ic->ic_ifp); 1942193240Ssam break; 1943193240Ssam case IEEE80211_BEACON_HTINFO: 1944193240Ssam mwl_hal_setnprotmode(hvap, 1945193240Ssam MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE)); 1946193240Ssam break; 1947193240Ssam case IEEE80211_BEACON_CAPS: 1948193240Ssam case IEEE80211_BEACON_WME: 1949193240Ssam case IEEE80211_BEACON_APPIE: 1950193240Ssam case IEEE80211_BEACON_CSA: 1951193240Ssam break; 1952193240Ssam case IEEE80211_BEACON_TIM: 1953193240Ssam /* NB: firmware always forms TIM */ 1954193240Ssam return; 1955193240Ssam } 1956193240Ssam /* XXX retain beacon frame and update */ 1957193240Ssam mwl_beacon_setup(vap); 1958193240Ssam} 1959193240Ssam 1960193240Ssamstatic void 1961193240Ssammwl_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1962193240Ssam{ 1963193240Ssam bus_addr_t *paddr = (bus_addr_t*) arg; 1964193240Ssam KASSERT(error == 0, ("error %u on bus_dma callback", error)); 1965193240Ssam *paddr = segs->ds_addr; 1966193240Ssam} 1967193240Ssam 1968193240Ssam#ifdef MWL_HOST_PS_SUPPORT 1969193240Ssam/* 1970193240Ssam * Handle power save station occupancy changes. 1971193240Ssam */ 1972193240Ssamstatic void 1973193240Ssammwl_update_ps(struct ieee80211vap *vap, int nsta) 1974193240Ssam{ 1975193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1976193240Ssam 1977193240Ssam if (nsta == 0 || mvp->mv_last_ps_sta == 0) 1978193240Ssam mwl_hal_setpowersave_bss(mvp->mv_hvap, nsta); 1979193240Ssam mvp->mv_last_ps_sta = nsta; 1980193240Ssam} 1981193240Ssam 1982193240Ssam/* 1983193240Ssam * Handle associated station power save state changes. 1984193240Ssam */ 1985193240Ssamstatic int 1986193240Ssammwl_set_tim(struct ieee80211_node *ni, int set) 1987193240Ssam{ 1988193240Ssam struct ieee80211vap *vap = ni->ni_vap; 1989193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 1990193240Ssam 1991193240Ssam if (mvp->mv_set_tim(ni, set)) { /* NB: state change */ 1992193240Ssam mwl_hal_setpowersave_sta(mvp->mv_hvap, 1993193240Ssam IEEE80211_AID(ni->ni_associd), set); 1994193240Ssam return 1; 1995193240Ssam } else 1996193240Ssam return 0; 1997193240Ssam} 1998193240Ssam#endif /* MWL_HOST_PS_SUPPORT */ 1999193240Ssam 2000193240Ssamstatic int 2001193240Ssammwl_desc_setup(struct mwl_softc *sc, const char *name, 2002193240Ssam struct mwl_descdma *dd, 2003193240Ssam int nbuf, size_t bufsize, int ndesc, size_t descsize) 2004193240Ssam{ 2005193240Ssam struct ifnet *ifp = sc->sc_ifp; 2006193240Ssam uint8_t *ds; 2007193240Ssam int error; 2008193240Ssam 2009193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, 2010193240Ssam "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 2011193240Ssam __func__, name, nbuf, (uintmax_t) bufsize, 2012193240Ssam ndesc, (uintmax_t) descsize); 2013193240Ssam 2014193240Ssam dd->dd_name = name; 2015193240Ssam dd->dd_desc_len = nbuf * ndesc * descsize; 2016193240Ssam 2017193240Ssam /* 2018193240Ssam * Setup DMA descriptor area. 2019193240Ssam */ 2020193240Ssam error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), /* parent */ 2021193240Ssam PAGE_SIZE, 0, /* alignment, bounds */ 2022193240Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 2023193240Ssam BUS_SPACE_MAXADDR, /* highaddr */ 2024193240Ssam NULL, NULL, /* filter, filterarg */ 2025193240Ssam dd->dd_desc_len, /* maxsize */ 2026193240Ssam 1, /* nsegments */ 2027193240Ssam dd->dd_desc_len, /* maxsegsize */ 2028193240Ssam BUS_DMA_ALLOCNOW, /* flags */ 2029193240Ssam NULL, /* lockfunc */ 2030193240Ssam NULL, /* lockarg */ 2031193240Ssam &dd->dd_dmat); 2032193240Ssam if (error != 0) { 2033193240Ssam if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 2034193240Ssam return error; 2035193240Ssam } 2036193240Ssam 2037193240Ssam /* allocate descriptors */ 2038193240Ssam error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 2039193240Ssam BUS_DMA_NOWAIT | BUS_DMA_COHERENT, 2040193240Ssam &dd->dd_dmamap); 2041193240Ssam if (error != 0) { 2042193240Ssam if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 2043193240Ssam "error %u\n", nbuf * ndesc, dd->dd_name, error); 2044193240Ssam goto fail1; 2045193240Ssam } 2046193240Ssam 2047193240Ssam error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 2048193240Ssam dd->dd_desc, dd->dd_desc_len, 2049193240Ssam mwl_load_cb, &dd->dd_desc_paddr, 2050193240Ssam BUS_DMA_NOWAIT); 2051193240Ssam if (error != 0) { 2052193240Ssam if_printf(ifp, "unable to map %s descriptors, error %u\n", 2053193240Ssam dd->dd_name, error); 2054193240Ssam goto fail2; 2055193240Ssam } 2056193240Ssam 2057193240Ssam ds = dd->dd_desc; 2058193240Ssam memset(ds, 0, dd->dd_desc_len); 2059193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 2060193240Ssam __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 2061193240Ssam (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 2062193240Ssam 2063193240Ssam return 0; 2064193240Ssamfail2: 2065193240Ssam bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 2066193240Ssamfail1: 2067193240Ssam bus_dma_tag_destroy(dd->dd_dmat); 2068193240Ssam memset(dd, 0, sizeof(*dd)); 2069193240Ssam return error; 2070193240Ssam#undef DS2PHYS 2071193240Ssam} 2072193240Ssam 2073193240Ssamstatic void 2074193240Ssammwl_desc_cleanup(struct mwl_softc *sc, struct mwl_descdma *dd) 2075193240Ssam{ 2076193240Ssam bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 2077193240Ssam bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 2078193240Ssam bus_dma_tag_destroy(dd->dd_dmat); 2079193240Ssam 2080193240Ssam memset(dd, 0, sizeof(*dd)); 2081193240Ssam} 2082193240Ssam 2083193240Ssam/* 2084193240Ssam * Construct a tx q's free list. The order of entries on 2085193240Ssam * the list must reflect the physical layout of tx descriptors 2086193240Ssam * because the firmware pre-fetches descriptors. 2087193240Ssam * 2088193240Ssam * XXX might be better to use indices into the buffer array. 2089193240Ssam */ 2090193240Ssamstatic void 2091193240Ssammwl_txq_reset(struct mwl_softc *sc, struct mwl_txq *txq) 2092193240Ssam{ 2093193240Ssam struct mwl_txbuf *bf; 2094193240Ssam int i; 2095193240Ssam 2096193240Ssam bf = txq->dma.dd_bufptr; 2097193240Ssam STAILQ_INIT(&txq->free); 2098193240Ssam for (i = 0; i < mwl_txbuf; i++, bf++) 2099193240Ssam STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 2100193240Ssam txq->nfree = i; 2101193240Ssam} 2102193240Ssam 2103193240Ssam#define DS2PHYS(_dd, _ds) \ 2104193240Ssam ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 2105193240Ssam 2106193240Ssamstatic int 2107193240Ssammwl_txdma_setup(struct mwl_softc *sc, struct mwl_txq *txq) 2108193240Ssam{ 2109193240Ssam struct ifnet *ifp = sc->sc_ifp; 2110193240Ssam int error, bsize, i; 2111193240Ssam struct mwl_txbuf *bf; 2112193240Ssam struct mwl_txdesc *ds; 2113193240Ssam 2114193240Ssam error = mwl_desc_setup(sc, "tx", &txq->dma, 2115193240Ssam mwl_txbuf, sizeof(struct mwl_txbuf), 2116193240Ssam MWL_TXDESC, sizeof(struct mwl_txdesc)); 2117193240Ssam if (error != 0) 2118193240Ssam return error; 2119193240Ssam 2120193240Ssam /* allocate and setup tx buffers */ 2121193240Ssam bsize = mwl_txbuf * sizeof(struct mwl_txbuf); 2122193240Ssam bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO); 2123193240Ssam if (bf == NULL) { 2124193240Ssam if_printf(ifp, "malloc of %u tx buffers failed\n", 2125193240Ssam mwl_txbuf); 2126193240Ssam return ENOMEM; 2127193240Ssam } 2128193240Ssam txq->dma.dd_bufptr = bf; 2129193240Ssam 2130193240Ssam ds = txq->dma.dd_desc; 2131193240Ssam for (i = 0; i < mwl_txbuf; i++, bf++, ds += MWL_TXDESC) { 2132193240Ssam bf->bf_desc = ds; 2133193240Ssam bf->bf_daddr = DS2PHYS(&txq->dma, ds); 2134193240Ssam error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 2135193240Ssam &bf->bf_dmamap); 2136193240Ssam if (error != 0) { 2137193240Ssam if_printf(ifp, "unable to create dmamap for tx " 2138193240Ssam "buffer %u, error %u\n", i, error); 2139193240Ssam return error; 2140193240Ssam } 2141193240Ssam } 2142193240Ssam mwl_txq_reset(sc, txq); 2143193240Ssam return 0; 2144193240Ssam} 2145193240Ssam 2146193240Ssamstatic void 2147193240Ssammwl_txdma_cleanup(struct mwl_softc *sc, struct mwl_txq *txq) 2148193240Ssam{ 2149193240Ssam struct mwl_txbuf *bf; 2150193240Ssam int i; 2151193240Ssam 2152193240Ssam bf = txq->dma.dd_bufptr; 2153193240Ssam for (i = 0; i < mwl_txbuf; i++, bf++) { 2154193240Ssam KASSERT(bf->bf_m == NULL, ("mbuf on free list")); 2155193240Ssam KASSERT(bf->bf_node == NULL, ("node on free list")); 2156193240Ssam if (bf->bf_dmamap != NULL) 2157193240Ssam bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2158193240Ssam } 2159193240Ssam STAILQ_INIT(&txq->free); 2160193240Ssam txq->nfree = 0; 2161193240Ssam if (txq->dma.dd_bufptr != NULL) { 2162193240Ssam free(txq->dma.dd_bufptr, M_MWLDEV); 2163193240Ssam txq->dma.dd_bufptr = NULL; 2164193240Ssam } 2165193240Ssam if (txq->dma.dd_desc_len != 0) 2166193240Ssam mwl_desc_cleanup(sc, &txq->dma); 2167193240Ssam} 2168193240Ssam 2169193240Ssamstatic int 2170193240Ssammwl_rxdma_setup(struct mwl_softc *sc) 2171193240Ssam{ 2172193240Ssam struct ifnet *ifp = sc->sc_ifp; 2173193240Ssam int error, jumbosize, bsize, i; 2174193240Ssam struct mwl_rxbuf *bf; 2175193240Ssam struct mwl_jumbo *rbuf; 2176193240Ssam struct mwl_rxdesc *ds; 2177193240Ssam caddr_t data; 2178193240Ssam 2179193240Ssam error = mwl_desc_setup(sc, "rx", &sc->sc_rxdma, 2180193240Ssam mwl_rxdesc, sizeof(struct mwl_rxbuf), 2181193240Ssam 1, sizeof(struct mwl_rxdesc)); 2182193240Ssam if (error != 0) 2183193240Ssam return error; 2184193240Ssam 2185193240Ssam /* 2186193240Ssam * Receive is done to a private pool of jumbo buffers. 2187193240Ssam * This allows us to attach to mbuf's and avoid re-mapping 2188193240Ssam * memory on each rx we post. We allocate a large chunk 2189193240Ssam * of memory and manage it in the driver. The mbuf free 2190193240Ssam * callback method is used to reclaim frames after sending 2191193240Ssam * them up the stack. By default we allocate 2x the number of 2192193240Ssam * rx descriptors configured so we have some slop to hold 2193193240Ssam * us while frames are processed. 2194193240Ssam */ 2195193240Ssam if (mwl_rxbuf < 2*mwl_rxdesc) { 2196193240Ssam if_printf(ifp, 2197193240Ssam "too few rx dma buffers (%d); increasing to %d\n", 2198193240Ssam mwl_rxbuf, 2*mwl_rxdesc); 2199193240Ssam mwl_rxbuf = 2*mwl_rxdesc; 2200193240Ssam } 2201193240Ssam jumbosize = roundup(MWL_AGGR_SIZE, PAGE_SIZE); 2202193240Ssam sc->sc_rxmemsize = mwl_rxbuf*jumbosize; 2203193240Ssam 2204193240Ssam error = bus_dma_tag_create(sc->sc_dmat, /* parent */ 2205193240Ssam PAGE_SIZE, 0, /* alignment, bounds */ 2206193240Ssam BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 2207193240Ssam BUS_SPACE_MAXADDR, /* highaddr */ 2208193240Ssam NULL, NULL, /* filter, filterarg */ 2209193240Ssam sc->sc_rxmemsize, /* maxsize */ 2210193240Ssam 1, /* nsegments */ 2211193240Ssam sc->sc_rxmemsize, /* maxsegsize */ 2212193240Ssam BUS_DMA_ALLOCNOW, /* flags */ 2213193240Ssam NULL, /* lockfunc */ 2214193240Ssam NULL, /* lockarg */ 2215193240Ssam &sc->sc_rxdmat); 2216193240Ssam if (error != 0) { 2217267340Sjhb if_printf(ifp, "could not create rx DMA tag\n"); 2218193240Ssam return error; 2219193240Ssam } 2220193240Ssam 2221193240Ssam error = bus_dmamem_alloc(sc->sc_rxdmat, (void**) &sc->sc_rxmem, 2222193240Ssam BUS_DMA_NOWAIT | BUS_DMA_COHERENT, 2223193240Ssam &sc->sc_rxmap); 2224193240Ssam if (error != 0) { 2225193240Ssam if_printf(ifp, "could not alloc %ju bytes of rx DMA memory\n", 2226193240Ssam (uintmax_t) sc->sc_rxmemsize); 2227193240Ssam return error; 2228193240Ssam } 2229193240Ssam 2230193240Ssam error = bus_dmamap_load(sc->sc_rxdmat, sc->sc_rxmap, 2231193240Ssam sc->sc_rxmem, sc->sc_rxmemsize, 2232193240Ssam mwl_load_cb, &sc->sc_rxmem_paddr, 2233193240Ssam BUS_DMA_NOWAIT); 2234193240Ssam if (error != 0) { 2235193240Ssam if_printf(ifp, "could not load rx DMA map\n"); 2236193240Ssam return error; 2237193240Ssam } 2238193240Ssam 2239193240Ssam /* 2240193240Ssam * Allocate rx buffers and set them up. 2241193240Ssam */ 2242193240Ssam bsize = mwl_rxdesc * sizeof(struct mwl_rxbuf); 2243193240Ssam bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO); 2244193240Ssam if (bf == NULL) { 2245193240Ssam if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 2246193240Ssam return error; 2247193240Ssam } 2248193240Ssam sc->sc_rxdma.dd_bufptr = bf; 2249193240Ssam 2250193240Ssam STAILQ_INIT(&sc->sc_rxbuf); 2251193240Ssam ds = sc->sc_rxdma.dd_desc; 2252193240Ssam for (i = 0; i < mwl_rxdesc; i++, bf++, ds++) { 2253193240Ssam bf->bf_desc = ds; 2254193240Ssam bf->bf_daddr = DS2PHYS(&sc->sc_rxdma, ds); 2255193240Ssam /* pre-assign dma buffer */ 2256193240Ssam bf->bf_data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize); 2257193240Ssam /* NB: tail is intentional to preserve descriptor order */ 2258193240Ssam STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2259193240Ssam } 2260193240Ssam 2261193240Ssam /* 2262193240Ssam * Place remainder of dma memory buffers on the free list. 2263193240Ssam */ 2264193240Ssam SLIST_INIT(&sc->sc_rxfree); 2265193240Ssam for (; i < mwl_rxbuf; i++) { 2266193240Ssam data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize); 2267193240Ssam rbuf = MWL_JUMBO_DATA2BUF(data); 2268193240Ssam SLIST_INSERT_HEAD(&sc->sc_rxfree, rbuf, next); 2269193240Ssam sc->sc_nrxfree++; 2270193240Ssam } 2271193240Ssam return 0; 2272193240Ssam} 2273193240Ssam#undef DS2PHYS 2274193240Ssam 2275193240Ssamstatic void 2276193240Ssammwl_rxdma_cleanup(struct mwl_softc *sc) 2277193240Ssam{ 2278267340Sjhb if (sc->sc_rxmem_paddr != 0) { 2279193240Ssam bus_dmamap_unload(sc->sc_rxdmat, sc->sc_rxmap); 2280267340Sjhb sc->sc_rxmem_paddr = 0; 2281267340Sjhb } 2282193240Ssam if (sc->sc_rxmem != NULL) { 2283193240Ssam bus_dmamem_free(sc->sc_rxdmat, sc->sc_rxmem, sc->sc_rxmap); 2284193240Ssam sc->sc_rxmem = NULL; 2285193240Ssam } 2286193240Ssam if (sc->sc_rxdma.dd_bufptr != NULL) { 2287193240Ssam free(sc->sc_rxdma.dd_bufptr, M_MWLDEV); 2288193240Ssam sc->sc_rxdma.dd_bufptr = NULL; 2289193240Ssam } 2290193240Ssam if (sc->sc_rxdma.dd_desc_len != 0) 2291193240Ssam mwl_desc_cleanup(sc, &sc->sc_rxdma); 2292193240Ssam} 2293193240Ssam 2294193240Ssamstatic int 2295193240Ssammwl_dma_setup(struct mwl_softc *sc) 2296193240Ssam{ 2297193240Ssam int error, i; 2298193240Ssam 2299193240Ssam error = mwl_rxdma_setup(sc); 2300197307Srpaulo if (error != 0) { 2301197307Srpaulo mwl_rxdma_cleanup(sc); 2302193240Ssam return error; 2303197307Srpaulo } 2304193240Ssam 2305193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) { 2306193240Ssam error = mwl_txdma_setup(sc, &sc->sc_txq[i]); 2307193240Ssam if (error != 0) { 2308193240Ssam mwl_dma_cleanup(sc); 2309193240Ssam return error; 2310193240Ssam } 2311193240Ssam } 2312193240Ssam return 0; 2313193240Ssam} 2314193240Ssam 2315193240Ssamstatic void 2316193240Ssammwl_dma_cleanup(struct mwl_softc *sc) 2317193240Ssam{ 2318193240Ssam int i; 2319193240Ssam 2320193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 2321193240Ssam mwl_txdma_cleanup(sc, &sc->sc_txq[i]); 2322193240Ssam mwl_rxdma_cleanup(sc); 2323193240Ssam} 2324193240Ssam 2325193240Ssamstatic struct ieee80211_node * 2326193240Ssammwl_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 2327193240Ssam{ 2328193240Ssam struct ieee80211com *ic = vap->iv_ic; 2329193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 2330193240Ssam const size_t space = sizeof(struct mwl_node); 2331193240Ssam struct mwl_node *mn; 2332193240Ssam 2333193240Ssam mn = malloc(space, M_80211_NODE, M_NOWAIT|M_ZERO); 2334193240Ssam if (mn == NULL) { 2335193240Ssam /* XXX stat+msg */ 2336193240Ssam return NULL; 2337193240Ssam } 2338193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: mn %p\n", __func__, mn); 2339193240Ssam return &mn->mn_node; 2340193240Ssam} 2341193240Ssam 2342193240Ssamstatic void 2343193240Ssammwl_node_cleanup(struct ieee80211_node *ni) 2344193240Ssam{ 2345193240Ssam struct ieee80211com *ic = ni->ni_ic; 2346193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 2347193240Ssam struct mwl_node *mn = MWL_NODE(ni); 2348193240Ssam 2349193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p ic %p staid %d\n", 2350193240Ssam __func__, ni, ni->ni_ic, mn->mn_staid); 2351193240Ssam 2352193240Ssam if (mn->mn_staid != 0) { 2353193240Ssam struct ieee80211vap *vap = ni->ni_vap; 2354193240Ssam 2355193240Ssam if (mn->mn_hvap != NULL) { 2356193240Ssam if (vap->iv_opmode == IEEE80211_M_STA) 2357193240Ssam mwl_hal_delstation(mn->mn_hvap, vap->iv_myaddr); 2358193240Ssam else 2359193240Ssam mwl_hal_delstation(mn->mn_hvap, ni->ni_macaddr); 2360193240Ssam } 2361193240Ssam /* 2362193240Ssam * NB: legacy WDS peer sta db entry is installed using 2363193240Ssam * the associate ap's hvap; use it again to delete it. 2364193240Ssam * XXX can vap be NULL? 2365193240Ssam */ 2366193240Ssam else if (vap->iv_opmode == IEEE80211_M_WDS && 2367193240Ssam MWL_VAP(vap)->mv_ap_hvap != NULL) 2368193240Ssam mwl_hal_delstation(MWL_VAP(vap)->mv_ap_hvap, 2369193240Ssam ni->ni_macaddr); 2370193240Ssam delstaid(sc, mn->mn_staid); 2371193240Ssam mn->mn_staid = 0; 2372193240Ssam } 2373193240Ssam sc->sc_node_cleanup(ni); 2374193240Ssam} 2375193240Ssam 2376193240Ssam/* 2377193240Ssam * Reclaim rx dma buffers from packets sitting on the ampdu 2378193240Ssam * reorder queue for a station. We replace buffers with a 2379193240Ssam * system cluster (if available). 2380193240Ssam */ 2381193240Ssamstatic void 2382193240Ssammwl_ampdu_rxdma_reclaim(struct ieee80211_rx_ampdu *rap) 2383193240Ssam{ 2384193240Ssam#if 0 2385193240Ssam int i, n, off; 2386193240Ssam struct mbuf *m; 2387193240Ssam void *cl; 2388193240Ssam 2389193240Ssam n = rap->rxa_qframes; 2390193240Ssam for (i = 0; i < rap->rxa_wnd && n > 0; i++) { 2391193240Ssam m = rap->rxa_m[i]; 2392193240Ssam if (m == NULL) 2393193240Ssam continue; 2394193240Ssam n--; 2395193240Ssam /* our dma buffers have a well-known free routine */ 2396193240Ssam if ((m->m_flags & M_EXT) == 0 || 2397193240Ssam m->m_ext.ext_free != mwl_ext_free) 2398193240Ssam continue; 2399193240Ssam /* 2400193240Ssam * Try to allocate a cluster and move the data. 2401193240Ssam */ 2402193240Ssam off = m->m_data - m->m_ext.ext_buf; 2403193240Ssam if (off + m->m_pkthdr.len > MCLBYTES) { 2404193240Ssam /* XXX no AMSDU for now */ 2405193240Ssam continue; 2406193240Ssam } 2407193240Ssam cl = pool_cache_get_paddr(&mclpool_cache, 0, 2408193240Ssam &m->m_ext.ext_paddr); 2409193240Ssam if (cl != NULL) { 2410193240Ssam /* 2411193240Ssam * Copy the existing data to the cluster, remove 2412193240Ssam * the rx dma buffer, and attach the cluster in 2413193240Ssam * its place. Note we preserve the offset to the 2414193240Ssam * data so frames being bridged can still prepend 2415193240Ssam * their headers without adding another mbuf. 2416193240Ssam */ 2417193240Ssam memcpy((caddr_t) cl + off, m->m_data, m->m_pkthdr.len); 2418193240Ssam MEXTREMOVE(m); 2419193240Ssam MEXTADD(m, cl, MCLBYTES, 0, NULL, &mclpool_cache); 2420193240Ssam /* setup mbuf like _MCLGET does */ 2421193240Ssam m->m_flags |= M_CLUSTER | M_EXT_RW; 2422193240Ssam _MOWNERREF(m, M_EXT | M_CLUSTER); 2423193240Ssam /* NB: m_data is clobbered by MEXTADDR, adjust */ 2424193240Ssam m->m_data += off; 2425193240Ssam } 2426193240Ssam } 2427193240Ssam#endif 2428193240Ssam} 2429193240Ssam 2430193240Ssam/* 2431193240Ssam * Callback to reclaim resources. We first let the 2432193240Ssam * net80211 layer do it's thing, then if we are still 2433193240Ssam * blocked by a lack of rx dma buffers we walk the ampdu 2434193240Ssam * reorder q's to reclaim buffers by copying to a system 2435193240Ssam * cluster. 2436193240Ssam */ 2437193240Ssamstatic void 2438193240Ssammwl_node_drain(struct ieee80211_node *ni) 2439193240Ssam{ 2440193240Ssam struct ieee80211com *ic = ni->ni_ic; 2441193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 2442193240Ssam struct mwl_node *mn = MWL_NODE(ni); 2443193240Ssam 2444193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p vap %p staid %d\n", 2445193240Ssam __func__, ni, ni->ni_vap, mn->mn_staid); 2446193240Ssam 2447193240Ssam /* NB: call up first to age out ampdu q's */ 2448193240Ssam sc->sc_node_drain(ni); 2449193240Ssam 2450193240Ssam /* XXX better to not check low water mark? */ 2451193240Ssam if (sc->sc_rxblocked && mn->mn_staid != 0 && 2452193240Ssam (ni->ni_flags & IEEE80211_NODE_HT)) { 2453193240Ssam uint8_t tid; 2454193240Ssam /* 2455193240Ssam * Walk the reorder q and reclaim rx dma buffers by copying 2456193240Ssam * the packet contents into clusters. 2457193240Ssam */ 2458193240Ssam for (tid = 0; tid < WME_NUM_TID; tid++) { 2459193240Ssam struct ieee80211_rx_ampdu *rap; 2460193240Ssam 2461193240Ssam rap = &ni->ni_rx_ampdu[tid]; 2462193240Ssam if ((rap->rxa_flags & IEEE80211_AGGR_XCHGPEND) == 0) 2463193240Ssam continue; 2464193240Ssam if (rap->rxa_qframes) 2465193240Ssam mwl_ampdu_rxdma_reclaim(rap); 2466193240Ssam } 2467193240Ssam } 2468193240Ssam} 2469193240Ssam 2470193240Ssamstatic void 2471193240Ssammwl_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise) 2472193240Ssam{ 2473193240Ssam *rssi = ni->ni_ic->ic_node_getrssi(ni); 2474193240Ssam#ifdef MWL_ANT_INFO_SUPPORT 2475193240Ssam#if 0 2476193240Ssam /* XXX need to smooth data */ 2477193240Ssam *noise = -MWL_NODE_CONST(ni)->mn_ai.nf; 2478193240Ssam#else 2479193240Ssam *noise = -95; /* XXX */ 2480193240Ssam#endif 2481193240Ssam#else 2482193240Ssam *noise = -95; /* XXX */ 2483193240Ssam#endif 2484193240Ssam} 2485193240Ssam 2486193240Ssam/* 2487193240Ssam * Convert Hardware per-antenna rssi info to common format: 2488193240Ssam * Let a1, a2, a3 represent the amplitudes per chain 2489193240Ssam * Let amax represent max[a1, a2, a3] 2490193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1/amax) 2491193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1) - 20*log10(amax) 2492193240Ssam * We store a table that is 4*20*log10(idx) - the extra 4 is to store or 2493193240Ssam * maintain some extra precision. 2494193240Ssam * 2495193240Ssam * Values are stored in .5 db format capped at 127. 2496193240Ssam */ 2497193240Ssamstatic void 2498193240Ssammwl_node_getmimoinfo(const struct ieee80211_node *ni, 2499193240Ssam struct ieee80211_mimo_info *mi) 2500193240Ssam{ 2501193240Ssam#define CVT(_dst, _src) do { \ 2502193240Ssam (_dst) = rssi + ((logdbtbl[_src] - logdbtbl[rssi_max]) >> 2); \ 2503193240Ssam (_dst) = (_dst) > 64 ? 127 : ((_dst) << 1); \ 2504193240Ssam} while (0) 2505193240Ssam static const int8_t logdbtbl[32] = { 2506193240Ssam 0, 0, 24, 38, 48, 56, 62, 68, 2507193240Ssam 72, 76, 80, 83, 86, 89, 92, 94, 2508193240Ssam 96, 98, 100, 102, 104, 106, 107, 109, 2509193240Ssam 110, 112, 113, 115, 116, 117, 118, 119 2510193240Ssam }; 2511193240Ssam const struct mwl_node *mn = MWL_NODE_CONST(ni); 2512193240Ssam uint8_t rssi = mn->mn_ai.rsvd1/2; /* XXX */ 2513193240Ssam uint32_t rssi_max; 2514193240Ssam 2515193240Ssam rssi_max = mn->mn_ai.rssi_a; 2516193240Ssam if (mn->mn_ai.rssi_b > rssi_max) 2517193240Ssam rssi_max = mn->mn_ai.rssi_b; 2518193240Ssam if (mn->mn_ai.rssi_c > rssi_max) 2519193240Ssam rssi_max = mn->mn_ai.rssi_c; 2520193240Ssam 2521220935Sadrian CVT(mi->rssi[0], mn->mn_ai.rssi_a); 2522220935Sadrian CVT(mi->rssi[1], mn->mn_ai.rssi_b); 2523220935Sadrian CVT(mi->rssi[2], mn->mn_ai.rssi_c); 2524193240Ssam 2525220935Sadrian mi->noise[0] = mn->mn_ai.nf_a; 2526220935Sadrian mi->noise[1] = mn->mn_ai.nf_b; 2527220935Sadrian mi->noise[2] = mn->mn_ai.nf_c; 2528193240Ssam#undef CVT 2529193240Ssam} 2530193240Ssam 2531193240Ssamstatic __inline void * 2532193240Ssammwl_getrxdma(struct mwl_softc *sc) 2533193240Ssam{ 2534193240Ssam struct mwl_jumbo *buf; 2535193240Ssam void *data; 2536193240Ssam 2537193240Ssam /* 2538193240Ssam * Allocate from jumbo pool. 2539193240Ssam */ 2540193240Ssam MWL_RXFREE_LOCK(sc); 2541193240Ssam buf = SLIST_FIRST(&sc->sc_rxfree); 2542193240Ssam if (buf == NULL) { 2543193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, 2544193240Ssam "%s: out of rx dma buffers\n", __func__); 2545193240Ssam sc->sc_stats.mst_rx_nodmabuf++; 2546193240Ssam data = NULL; 2547193240Ssam } else { 2548193240Ssam SLIST_REMOVE_HEAD(&sc->sc_rxfree, next); 2549193240Ssam sc->sc_nrxfree--; 2550193240Ssam data = MWL_JUMBO_BUF2DATA(buf); 2551193240Ssam } 2552193240Ssam MWL_RXFREE_UNLOCK(sc); 2553193240Ssam return data; 2554193240Ssam} 2555193240Ssam 2556193240Ssamstatic __inline void 2557193240Ssammwl_putrxdma(struct mwl_softc *sc, void *data) 2558193240Ssam{ 2559193240Ssam struct mwl_jumbo *buf; 2560193240Ssam 2561193240Ssam /* XXX bounds check data */ 2562193240Ssam MWL_RXFREE_LOCK(sc); 2563193240Ssam buf = MWL_JUMBO_DATA2BUF(data); 2564193240Ssam SLIST_INSERT_HEAD(&sc->sc_rxfree, buf, next); 2565193240Ssam sc->sc_nrxfree++; 2566193240Ssam MWL_RXFREE_UNLOCK(sc); 2567193240Ssam} 2568193240Ssam 2569193240Ssamstatic int 2570193240Ssammwl_rxbuf_init(struct mwl_softc *sc, struct mwl_rxbuf *bf) 2571193240Ssam{ 2572193240Ssam struct mwl_rxdesc *ds; 2573193240Ssam 2574193240Ssam ds = bf->bf_desc; 2575193240Ssam if (bf->bf_data == NULL) { 2576193240Ssam bf->bf_data = mwl_getrxdma(sc); 2577193240Ssam if (bf->bf_data == NULL) { 2578193240Ssam /* mark descriptor to be skipped */ 2579193240Ssam ds->RxControl = EAGLE_RXD_CTRL_OS_OWN; 2580193240Ssam /* NB: don't need PREREAD */ 2581193240Ssam MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 2582193240Ssam sc->sc_stats.mst_rxbuf_failed++; 2583193240Ssam return ENOMEM; 2584193240Ssam } 2585193240Ssam } 2586193240Ssam /* 2587193240Ssam * NB: DMA buffer contents is known to be unmodified 2588193240Ssam * so there's no need to flush the data cache. 2589193240Ssam */ 2590193240Ssam 2591193240Ssam /* 2592193240Ssam * Setup descriptor. 2593193240Ssam */ 2594193240Ssam ds->QosCtrl = 0; 2595193240Ssam ds->RSSI = 0; 2596193240Ssam ds->Status = EAGLE_RXD_STATUS_IDLE; 2597193240Ssam ds->Channel = 0; 2598193240Ssam ds->PktLen = htole16(MWL_AGGR_SIZE); 2599193240Ssam ds->SQ2 = 0; 2600193240Ssam ds->pPhysBuffData = htole32(MWL_JUMBO_DMA_ADDR(sc, bf->bf_data)); 2601193240Ssam /* NB: don't touch pPhysNext, set once */ 2602193240Ssam ds->RxControl = EAGLE_RXD_CTRL_DRIVER_OWN; 2603193240Ssam MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2604193240Ssam 2605193240Ssam return 0; 2606193240Ssam} 2607193240Ssam 2608268529Sglebiusstatic void 2609254799Sandremwl_ext_free(struct mbuf *m, void *data, void *arg) 2610193240Ssam{ 2611193240Ssam struct mwl_softc *sc = arg; 2612193240Ssam 2613193240Ssam /* XXX bounds check data */ 2614193240Ssam mwl_putrxdma(sc, data); 2615193240Ssam /* 2616193240Ssam * If we were previously blocked by a lack of rx dma buffers 2617193240Ssam * check if we now have enough to restart rx interrupt handling. 2618193240Ssam * NB: we know we are called at splvm which is above splnet. 2619193240Ssam */ 2620193240Ssam if (sc->sc_rxblocked && sc->sc_nrxfree > mwl_rxdmalow) { 2621193240Ssam sc->sc_rxblocked = 0; 2622193240Ssam mwl_hal_intrset(sc->sc_mh, sc->sc_imask); 2623193240Ssam } 2624193240Ssam} 2625193240Ssam 2626193240Ssamstruct mwl_frame_bar { 2627193240Ssam u_int8_t i_fc[2]; 2628193240Ssam u_int8_t i_dur[2]; 2629193240Ssam u_int8_t i_ra[IEEE80211_ADDR_LEN]; 2630193240Ssam u_int8_t i_ta[IEEE80211_ADDR_LEN]; 2631193240Ssam /* ctl, seq, FCS */ 2632193240Ssam} __packed; 2633193240Ssam 2634193240Ssam/* 2635193240Ssam * Like ieee80211_anyhdrsize, but handles BAR frames 2636193240Ssam * specially so the logic below to piece the 802.11 2637193240Ssam * header together works. 2638193240Ssam */ 2639193240Ssamstatic __inline int 2640193240Ssammwl_anyhdrsize(const void *data) 2641193240Ssam{ 2642193240Ssam const struct ieee80211_frame *wh = data; 2643193240Ssam 2644193240Ssam if ((wh->i_fc[0]&IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 2645193240Ssam switch (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) { 2646193240Ssam case IEEE80211_FC0_SUBTYPE_CTS: 2647193240Ssam case IEEE80211_FC0_SUBTYPE_ACK: 2648193240Ssam return sizeof(struct ieee80211_frame_ack); 2649193240Ssam case IEEE80211_FC0_SUBTYPE_BAR: 2650193240Ssam return sizeof(struct mwl_frame_bar); 2651193240Ssam } 2652193240Ssam return sizeof(struct ieee80211_frame_min); 2653193240Ssam } else 2654193240Ssam return ieee80211_hdrsize(data); 2655193240Ssam} 2656193240Ssam 2657193240Ssamstatic void 2658193240Ssammwl_handlemicerror(struct ieee80211com *ic, const uint8_t *data) 2659193240Ssam{ 2660193240Ssam const struct ieee80211_frame *wh; 2661193240Ssam struct ieee80211_node *ni; 2662193240Ssam 2663193240Ssam wh = (const struct ieee80211_frame *)(data + sizeof(uint16_t)); 2664193240Ssam ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh); 2665193240Ssam if (ni != NULL) { 2666193240Ssam ieee80211_notify_michael_failure(ni->ni_vap, wh, 0); 2667193240Ssam ieee80211_free_node(ni); 2668193240Ssam } 2669193240Ssam} 2670193240Ssam 2671193240Ssam/* 2672193240Ssam * Convert hardware signal strength to rssi. The value 2673193240Ssam * provided by the device has the noise floor added in; 2674193240Ssam * we need to compensate for this but we don't have that 2675193240Ssam * so we use a fixed value. 2676193240Ssam * 2677193240Ssam * The offset of 8 is good for both 2.4 and 5GHz. The LNA 2678193240Ssam * offset is already set as part of the initial gain. This 2679193240Ssam * will give at least +/- 3dB for 2.4GHz and +/- 5dB for 5GHz. 2680193240Ssam */ 2681193240Ssamstatic __inline int 2682193240Ssamcvtrssi(uint8_t ssi) 2683193240Ssam{ 2684193240Ssam int rssi = (int) ssi + 8; 2685193240Ssam /* XXX hack guess until we have a real noise floor */ 2686193240Ssam rssi = 2*(87 - rssi); /* NB: .5 dBm units */ 2687193240Ssam return (rssi < 0 ? 0 : rssi > 127 ? 127 : rssi); 2688193240Ssam} 2689193240Ssam 2690193240Ssamstatic void 2691193240Ssammwl_rx_proc(void *arg, int npending) 2692193240Ssam{ 2693193240Ssam#define IEEE80211_DIR_DSTODS(wh) \ 2694193240Ssam ((((const struct ieee80211_frame *)wh)->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2695193240Ssam struct mwl_softc *sc = arg; 2696193240Ssam struct ifnet *ifp = sc->sc_ifp; 2697193240Ssam struct ieee80211com *ic = ifp->if_l2com; 2698193240Ssam struct mwl_rxbuf *bf; 2699193240Ssam struct mwl_rxdesc *ds; 2700193240Ssam struct mbuf *m; 2701193240Ssam struct ieee80211_qosframe *wh; 2702193240Ssam struct ieee80211_qosframe_addr4 *wh4; 2703193240Ssam struct ieee80211_node *ni; 2704193240Ssam struct mwl_node *mn; 2705193240Ssam int off, len, hdrlen, pktlen, rssi, ntodo; 2706193240Ssam uint8_t *data, status; 2707193240Ssam void *newdata; 2708193240Ssam int16_t nf; 2709193240Ssam 2710193240Ssam DPRINTF(sc, MWL_DEBUG_RX_PROC, "%s: pending %u rdptr 0x%x wrptr 0x%x\n", 2711193240Ssam __func__, npending, RD4(sc, sc->sc_hwspecs.rxDescRead), 2712193240Ssam RD4(sc, sc->sc_hwspecs.rxDescWrite)); 2713193240Ssam nf = -96; /* XXX */ 2714193240Ssam bf = sc->sc_rxnext; 2715193240Ssam for (ntodo = mwl_rxquota; ntodo > 0; ntodo--) { 2716193240Ssam if (bf == NULL) 2717193240Ssam bf = STAILQ_FIRST(&sc->sc_rxbuf); 2718193240Ssam ds = bf->bf_desc; 2719193240Ssam data = bf->bf_data; 2720193240Ssam if (data == NULL) { 2721193240Ssam /* 2722193240Ssam * If data allocation failed previously there 2723193240Ssam * will be no buffer; try again to re-populate it. 2724193240Ssam * Note the firmware will not advance to the next 2725193240Ssam * descriptor with a dma buffer so we must mimic 2726193240Ssam * this or we'll get out of sync. 2727193240Ssam */ 2728193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, 2729193240Ssam "%s: rx buf w/o dma memory\n", __func__); 2730193240Ssam (void) mwl_rxbuf_init(sc, bf); 2731193240Ssam sc->sc_stats.mst_rx_dmabufmissing++; 2732193240Ssam break; 2733193240Ssam } 2734193240Ssam MWL_RXDESC_SYNC(sc, ds, 2735193240Ssam BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2736193240Ssam if (ds->RxControl != EAGLE_RXD_CTRL_DMA_OWN) 2737193240Ssam break; 2738193240Ssam#ifdef MWL_DEBUG 2739193240Ssam if (sc->sc_debug & MWL_DEBUG_RECV_DESC) 2740193240Ssam mwl_printrxbuf(bf, 0); 2741193240Ssam#endif 2742193240Ssam status = ds->Status; 2743193240Ssam if (status & EAGLE_RXD_STATUS_DECRYPT_ERR_MASK) { 2744193240Ssam ifp->if_ierrors++; 2745193240Ssam sc->sc_stats.mst_rx_crypto++; 2746193240Ssam /* 2747193240Ssam * NB: Check EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR 2748193240Ssam * for backwards compatibility. 2749193240Ssam */ 2750193240Ssam if (status != EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR && 2751193240Ssam (status & EAGLE_RXD_STATUS_TKIP_MIC_DECRYPT_ERR)) { 2752193240Ssam /* 2753193240Ssam * MIC error, notify upper layers. 2754193240Ssam */ 2755193240Ssam bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap, 2756193240Ssam BUS_DMASYNC_POSTREAD); 2757193240Ssam mwl_handlemicerror(ic, data); 2758193240Ssam sc->sc_stats.mst_rx_tkipmic++; 2759193240Ssam } 2760193240Ssam /* XXX too painful to tap packets */ 2761193240Ssam goto rx_next; 2762193240Ssam } 2763193240Ssam /* 2764193240Ssam * Sync the data buffer. 2765193240Ssam */ 2766193240Ssam len = le16toh(ds->PktLen); 2767193240Ssam bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap, BUS_DMASYNC_POSTREAD); 2768193240Ssam /* 2769193240Ssam * The 802.11 header is provided all or in part at the front; 2770193240Ssam * use it to calculate the true size of the header that we'll 2771193240Ssam * construct below. We use this to figure out where to copy 2772193240Ssam * payload prior to constructing the header. 2773193240Ssam */ 2774193240Ssam hdrlen = mwl_anyhdrsize(data + sizeof(uint16_t)); 2775193240Ssam off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2776193240Ssam 2777193240Ssam /* calculate rssi early so we can re-use for each aggregate */ 2778193240Ssam rssi = cvtrssi(ds->RSSI); 2779193240Ssam 2780193240Ssam pktlen = hdrlen + (len - off); 2781193240Ssam /* 2782193240Ssam * NB: we know our frame is at least as large as 2783193240Ssam * IEEE80211_MIN_LEN because there is a 4-address 2784193240Ssam * frame at the front. Hence there's no need to 2785193240Ssam * vet the packet length. If the frame in fact 2786193240Ssam * is too small it should be discarded at the 2787193240Ssam * net80211 layer. 2788193240Ssam */ 2789193240Ssam 2790193240Ssam /* 2791193240Ssam * Attach dma buffer to an mbuf. We tried 2792193240Ssam * doing this based on the packet size (i.e. 2793193240Ssam * copying small packets) but it turns out to 2794193240Ssam * be a net loss. The tradeoff might be system 2795193240Ssam * dependent (cache architecture is important). 2796193240Ssam */ 2797243857Sglebius MGETHDR(m, M_NOWAIT, MT_DATA); 2798193240Ssam if (m == NULL) { 2799193240Ssam DPRINTF(sc, MWL_DEBUG_ANY, 2800193240Ssam "%s: no rx mbuf\n", __func__); 2801193240Ssam sc->sc_stats.mst_rx_nombuf++; 2802193240Ssam goto rx_next; 2803193240Ssam } 2804193240Ssam /* 2805193240Ssam * Acquire the replacement dma buffer before 2806193240Ssam * processing the frame. If we're out of dma 2807193240Ssam * buffers we disable rx interrupts and wait 2808193240Ssam * for the free pool to reach mlw_rxdmalow buffers 2809193240Ssam * before starting to do work again. If the firmware 2810193240Ssam * runs out of descriptors then it will toss frames 2811193240Ssam * which is better than our doing it as that can 2812193240Ssam * starve our processing. It is also important that 2813193240Ssam * we always process rx'd frames in case they are 2814193240Ssam * A-MPDU as otherwise the host's view of the BA 2815193240Ssam * window may get out of sync with the firmware. 2816193240Ssam */ 2817193240Ssam newdata = mwl_getrxdma(sc); 2818193240Ssam if (newdata == NULL) { 2819193240Ssam /* NB: stat+msg in mwl_getrxdma */ 2820193240Ssam m_free(m); 2821193240Ssam /* disable RX interrupt and mark state */ 2822193240Ssam mwl_hal_intrset(sc->sc_mh, 2823193240Ssam sc->sc_imask &~ MACREG_A2HRIC_BIT_RX_RDY); 2824193240Ssam sc->sc_rxblocked = 1; 2825193240Ssam ieee80211_drain(ic); 2826193240Ssam /* XXX check rxblocked and immediately start again? */ 2827193240Ssam goto rx_stop; 2828193240Ssam } 2829193240Ssam bf->bf_data = newdata; 2830193240Ssam /* 2831193240Ssam * Attach the dma buffer to the mbuf; 2832193240Ssam * mwl_rxbuf_init will re-setup the rx 2833193240Ssam * descriptor using the replacement dma 2834193240Ssam * buffer we just installed above. 2835193240Ssam */ 2836193240Ssam MEXTADD(m, data, MWL_AGGR_SIZE, mwl_ext_free, 2837193240Ssam data, sc, 0, EXT_NET_DRV); 2838193240Ssam m->m_data += off - hdrlen; 2839193240Ssam m->m_pkthdr.len = m->m_len = pktlen; 2840193240Ssam m->m_pkthdr.rcvif = ifp; 2841193240Ssam /* NB: dma buffer assumed read-only */ 2842193240Ssam 2843193240Ssam /* 2844193240Ssam * Piece 802.11 header together. 2845193240Ssam */ 2846193240Ssam wh = mtod(m, struct ieee80211_qosframe *); 2847193240Ssam /* NB: don't need to do this sometimes but ... */ 2848193240Ssam /* XXX special case so we can memcpy after m_devget? */ 2849193240Ssam ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2850193240Ssam if (IEEE80211_QOS_HAS_SEQ(wh)) { 2851193240Ssam if (IEEE80211_DIR_DSTODS(wh)) { 2852193240Ssam wh4 = mtod(m, 2853193240Ssam struct ieee80211_qosframe_addr4*); 2854193240Ssam *(uint16_t *)wh4->i_qos = ds->QosCtrl; 2855193240Ssam } else { 2856193240Ssam *(uint16_t *)wh->i_qos = ds->QosCtrl; 2857193240Ssam } 2858193240Ssam } 2859193240Ssam /* 2860193240Ssam * The f/w strips WEP header but doesn't clear 2861193240Ssam * the WEP bit; mark the packet with M_WEP so 2862193240Ssam * net80211 will treat the data as decrypted. 2863193240Ssam * While here also clear the PWR_MGT bit since 2864193240Ssam * power save is handled by the firmware and 2865193240Ssam * passing this up will potentially cause the 2866193240Ssam * upper layer to put a station in power save 2867193240Ssam * (except when configured with MWL_HOST_PS_SUPPORT). 2868193240Ssam */ 2869260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2870193240Ssam m->m_flags |= M_WEP; 2871193240Ssam#ifdef MWL_HOST_PS_SUPPORT 2872260444Skevlo wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED; 2873193240Ssam#else 2874260444Skevlo wh->i_fc[1] &= ~(IEEE80211_FC1_PROTECTED | 2875260444Skevlo IEEE80211_FC1_PWR_MGT); 2876193240Ssam#endif 2877193240Ssam 2878193240Ssam if (ieee80211_radiotap_active(ic)) { 2879193240Ssam struct mwl_rx_radiotap_header *tap = &sc->sc_rx_th; 2880193240Ssam 2881193240Ssam tap->wr_flags = 0; 2882193240Ssam tap->wr_rate = ds->Rate; 2883193240Ssam tap->wr_antsignal = rssi + nf; 2884193240Ssam tap->wr_antnoise = nf; 2885193240Ssam } 2886193240Ssam if (IFF_DUMPPKTS_RECV(sc, wh)) { 2887193240Ssam ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2888193240Ssam len, ds->Rate, rssi); 2889193240Ssam } 2890193240Ssam ifp->if_ipackets++; 2891193240Ssam 2892193240Ssam /* dispatch */ 2893193240Ssam ni = ieee80211_find_rxnode(ic, 2894193240Ssam (const struct ieee80211_frame_min *) wh); 2895193240Ssam if (ni != NULL) { 2896193240Ssam mn = MWL_NODE(ni); 2897193240Ssam#ifdef MWL_ANT_INFO_SUPPORT 2898193240Ssam mn->mn_ai.rssi_a = ds->ai.rssi_a; 2899193240Ssam mn->mn_ai.rssi_b = ds->ai.rssi_b; 2900193240Ssam mn->mn_ai.rssi_c = ds->ai.rssi_c; 2901193240Ssam mn->mn_ai.rsvd1 = rssi; 2902193240Ssam#endif 2903193240Ssam /* tag AMPDU aggregates for reorder processing */ 2904193240Ssam if (ni->ni_flags & IEEE80211_NODE_HT) 2905193240Ssam m->m_flags |= M_AMPDU; 2906193240Ssam (void) ieee80211_input(ni, m, rssi, nf); 2907193240Ssam ieee80211_free_node(ni); 2908193240Ssam } else 2909193240Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 2910193240Ssamrx_next: 2911193240Ssam /* NB: ignore ENOMEM so we process more descriptors */ 2912193240Ssam (void) mwl_rxbuf_init(sc, bf); 2913193240Ssam bf = STAILQ_NEXT(bf, bf_list); 2914193240Ssam } 2915193240Ssamrx_stop: 2916193240Ssam sc->sc_rxnext = bf; 2917193240Ssam 2918193240Ssam if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2919193240Ssam !IFQ_IS_EMPTY(&ifp->if_snd)) { 2920193240Ssam /* NB: kick fw; the tx thread may have been preempted */ 2921193240Ssam mwl_hal_txstart(sc->sc_mh, 0); 2922193240Ssam mwl_start(ifp); 2923193240Ssam } 2924193240Ssam#undef IEEE80211_DIR_DSTODS 2925193240Ssam} 2926193240Ssam 2927193240Ssamstatic void 2928193240Ssammwl_txq_init(struct mwl_softc *sc, struct mwl_txq *txq, int qnum) 2929193240Ssam{ 2930193240Ssam struct mwl_txbuf *bf, *bn; 2931193240Ssam struct mwl_txdesc *ds; 2932193240Ssam 2933193240Ssam MWL_TXQ_LOCK_INIT(sc, txq); 2934193240Ssam txq->qnum = qnum; 2935193240Ssam txq->txpri = 0; /* XXX */ 2936193240Ssam#if 0 2937193240Ssam /* NB: q setup by mwl_txdma_setup XXX */ 2938193240Ssam STAILQ_INIT(&txq->free); 2939193240Ssam#endif 2940193240Ssam STAILQ_FOREACH(bf, &txq->free, bf_list) { 2941193240Ssam bf->bf_txq = txq; 2942193240Ssam 2943193240Ssam ds = bf->bf_desc; 2944193240Ssam bn = STAILQ_NEXT(bf, bf_list); 2945193240Ssam if (bn == NULL) 2946193240Ssam bn = STAILQ_FIRST(&txq->free); 2947193240Ssam ds->pPhysNext = htole32(bn->bf_daddr); 2948193240Ssam } 2949193240Ssam STAILQ_INIT(&txq->active); 2950193240Ssam} 2951193240Ssam 2952193240Ssam/* 2953193240Ssam * Setup a hardware data transmit queue for the specified 2954193240Ssam * access control. We record the mapping from ac's 2955193240Ssam * to h/w queues for use by mwl_tx_start. 2956193240Ssam */ 2957193240Ssamstatic int 2958193240Ssammwl_tx_setup(struct mwl_softc *sc, int ac, int mvtype) 2959193240Ssam{ 2960193240Ssam#define N(a) (sizeof(a)/sizeof(a[0])) 2961193240Ssam struct mwl_txq *txq; 2962193240Ssam 2963193240Ssam if (ac >= N(sc->sc_ac2q)) { 2964193240Ssam device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n", 2965193240Ssam ac, N(sc->sc_ac2q)); 2966193240Ssam return 0; 2967193240Ssam } 2968193240Ssam if (mvtype >= MWL_NUM_TX_QUEUES) { 2969193240Ssam device_printf(sc->sc_dev, "mvtype %u out of range, max %u!\n", 2970193240Ssam mvtype, MWL_NUM_TX_QUEUES); 2971193240Ssam return 0; 2972193240Ssam } 2973193240Ssam txq = &sc->sc_txq[mvtype]; 2974193240Ssam mwl_txq_init(sc, txq, mvtype); 2975193240Ssam sc->sc_ac2q[ac] = txq; 2976193240Ssam return 1; 2977193240Ssam#undef N 2978193240Ssam} 2979193240Ssam 2980193240Ssam/* 2981193240Ssam * Update WME parameters for a transmit queue. 2982193240Ssam */ 2983193240Ssamstatic int 2984193240Ssammwl_txq_update(struct mwl_softc *sc, int ac) 2985193240Ssam{ 2986193240Ssam#define MWL_EXPONENT_TO_VALUE(v) ((1<<v)-1) 2987193240Ssam struct ifnet *ifp = sc->sc_ifp; 2988193240Ssam struct ieee80211com *ic = ifp->if_l2com; 2989193240Ssam struct mwl_txq *txq = sc->sc_ac2q[ac]; 2990193240Ssam struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac]; 2991193240Ssam struct mwl_hal *mh = sc->sc_mh; 2992193240Ssam int aifs, cwmin, cwmax, txoplim; 2993193240Ssam 2994193240Ssam aifs = wmep->wmep_aifsn; 2995193240Ssam /* XXX in sta mode need to pass log values for cwmin/max */ 2996193240Ssam cwmin = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmin); 2997193240Ssam cwmax = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmax); 2998193240Ssam txoplim = wmep->wmep_txopLimit; /* NB: units of 32us */ 2999193240Ssam 3000193240Ssam if (mwl_hal_setedcaparams(mh, txq->qnum, cwmin, cwmax, aifs, txoplim)) { 3001193240Ssam device_printf(sc->sc_dev, "unable to update hardware queue " 3002193240Ssam "parameters for %s traffic!\n", 3003193240Ssam ieee80211_wme_acnames[ac]); 3004193240Ssam return 0; 3005193240Ssam } 3006193240Ssam return 1; 3007193240Ssam#undef MWL_EXPONENT_TO_VALUE 3008193240Ssam} 3009193240Ssam 3010193240Ssam/* 3011193240Ssam * Callback from the 802.11 layer to update WME parameters. 3012193240Ssam */ 3013193240Ssamstatic int 3014193240Ssammwl_wme_update(struct ieee80211com *ic) 3015193240Ssam{ 3016193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 3017193240Ssam 3018193240Ssam return !mwl_txq_update(sc, WME_AC_BE) || 3019193240Ssam !mwl_txq_update(sc, WME_AC_BK) || 3020193240Ssam !mwl_txq_update(sc, WME_AC_VI) || 3021193240Ssam !mwl_txq_update(sc, WME_AC_VO) ? EIO : 0; 3022193240Ssam} 3023193240Ssam 3024193240Ssam/* 3025193240Ssam * Reclaim resources for a setup queue. 3026193240Ssam */ 3027193240Ssamstatic void 3028193240Ssammwl_tx_cleanupq(struct mwl_softc *sc, struct mwl_txq *txq) 3029193240Ssam{ 3030193240Ssam /* XXX hal work? */ 3031193240Ssam MWL_TXQ_LOCK_DESTROY(txq); 3032193240Ssam} 3033193240Ssam 3034193240Ssam/* 3035193240Ssam * Reclaim all tx queue resources. 3036193240Ssam */ 3037193240Ssamstatic void 3038193240Ssammwl_tx_cleanup(struct mwl_softc *sc) 3039193240Ssam{ 3040193240Ssam int i; 3041193240Ssam 3042193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 3043193240Ssam mwl_tx_cleanupq(sc, &sc->sc_txq[i]); 3044193240Ssam} 3045193240Ssam 3046193240Ssamstatic int 3047193240Ssammwl_tx_dmasetup(struct mwl_softc *sc, struct mwl_txbuf *bf, struct mbuf *m0) 3048193240Ssam{ 3049193240Ssam struct mbuf *m; 3050193240Ssam int error; 3051193240Ssam 3052193240Ssam /* 3053193240Ssam * Load the DMA map so any coalescing is done. This 3054193240Ssam * also calculates the number of descriptors we need. 3055193240Ssam */ 3056193240Ssam error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 3057193240Ssam bf->bf_segs, &bf->bf_nseg, 3058193240Ssam BUS_DMA_NOWAIT); 3059193240Ssam if (error == EFBIG) { 3060193240Ssam /* XXX packet requires too many descriptors */ 3061193240Ssam bf->bf_nseg = MWL_TXDESC+1; 3062193240Ssam } else if (error != 0) { 3063193240Ssam sc->sc_stats.mst_tx_busdma++; 3064193240Ssam m_freem(m0); 3065193240Ssam return error; 3066193240Ssam } 3067193240Ssam /* 3068193240Ssam * Discard null packets and check for packets that 3069193240Ssam * require too many TX descriptors. We try to convert 3070193240Ssam * the latter to a cluster. 3071193240Ssam */ 3072193240Ssam if (error == EFBIG) { /* too many desc's, linearize */ 3073193240Ssam sc->sc_stats.mst_tx_linear++; 3074193240Ssam#if MWL_TXDESC > 1 3075243857Sglebius m = m_collapse(m0, M_NOWAIT, MWL_TXDESC); 3076193240Ssam#else 3077243857Sglebius m = m_defrag(m0, M_NOWAIT); 3078193240Ssam#endif 3079193240Ssam if (m == NULL) { 3080193240Ssam m_freem(m0); 3081193240Ssam sc->sc_stats.mst_tx_nombuf++; 3082193240Ssam return ENOMEM; 3083193240Ssam } 3084193240Ssam m0 = m; 3085193240Ssam error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 3086193240Ssam bf->bf_segs, &bf->bf_nseg, 3087193240Ssam BUS_DMA_NOWAIT); 3088193240Ssam if (error != 0) { 3089193240Ssam sc->sc_stats.mst_tx_busdma++; 3090193240Ssam m_freem(m0); 3091193240Ssam return error; 3092193240Ssam } 3093193240Ssam KASSERT(bf->bf_nseg <= MWL_TXDESC, 3094193240Ssam ("too many segments after defrag; nseg %u", bf->bf_nseg)); 3095193240Ssam } else if (bf->bf_nseg == 0) { /* null packet, discard */ 3096193240Ssam sc->sc_stats.mst_tx_nodata++; 3097193240Ssam m_freem(m0); 3098193240Ssam return EIO; 3099193240Ssam } 3100193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, "%s: m %p len %u\n", 3101193240Ssam __func__, m0, m0->m_pkthdr.len); 3102193240Ssam bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 3103193240Ssam bf->bf_m = m0; 3104193240Ssam 3105193240Ssam return 0; 3106193240Ssam} 3107193240Ssam 3108193240Ssamstatic __inline int 3109193240Ssammwl_cvtlegacyrate(int rate) 3110193240Ssam{ 3111193240Ssam switch (rate) { 3112193240Ssam case 2: return 0; 3113193240Ssam case 4: return 1; 3114193240Ssam case 11: return 2; 3115193240Ssam case 22: return 3; 3116193240Ssam case 44: return 4; 3117193240Ssam case 12: return 5; 3118193240Ssam case 18: return 6; 3119193240Ssam case 24: return 7; 3120193240Ssam case 36: return 8; 3121193240Ssam case 48: return 9; 3122193240Ssam case 72: return 10; 3123193240Ssam case 96: return 11; 3124193240Ssam case 108:return 12; 3125193240Ssam } 3126193240Ssam return 0; 3127193240Ssam} 3128193240Ssam 3129193240Ssam/* 3130193240Ssam * Calculate fixed tx rate information per client state; 3131193240Ssam * this value is suitable for writing to the Format field 3132193240Ssam * of a tx descriptor. 3133193240Ssam */ 3134193240Ssamstatic uint16_t 3135193240Ssammwl_calcformat(uint8_t rate, const struct ieee80211_node *ni) 3136193240Ssam{ 3137193240Ssam uint16_t fmt; 3138193240Ssam 3139193240Ssam fmt = SM(3, EAGLE_TXD_ANTENNA) 3140193240Ssam | (IEEE80211_IS_CHAN_HT40D(ni->ni_chan) ? 3141193240Ssam EAGLE_TXD_EXTCHAN_LO : EAGLE_TXD_EXTCHAN_HI); 3142195171Ssam if (rate & IEEE80211_RATE_MCS) { /* HT MCS */ 3143193240Ssam fmt |= EAGLE_TXD_FORMAT_HT 3144193240Ssam /* NB: 0x80 implicitly stripped from ucastrate */ 3145193240Ssam | SM(rate, EAGLE_TXD_RATE); 3146193240Ssam /* XXX short/long GI may be wrong; re-check */ 3147193240Ssam if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) { 3148193240Ssam fmt |= EAGLE_TXD_CHW_40 3149193240Ssam | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40 ? 3150193240Ssam EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG); 3151193240Ssam } else { 3152193240Ssam fmt |= EAGLE_TXD_CHW_20 3153193240Ssam | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20 ? 3154193240Ssam EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG); 3155193240Ssam } 3156193240Ssam } else { /* legacy rate */ 3157193240Ssam fmt |= EAGLE_TXD_FORMAT_LEGACY 3158193240Ssam | SM(mwl_cvtlegacyrate(rate), EAGLE_TXD_RATE) 3159193240Ssam | EAGLE_TXD_CHW_20 3160193240Ssam /* XXX iv_flags & IEEE80211_F_SHPREAMBLE? */ 3161193240Ssam | (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE ? 3162193240Ssam EAGLE_TXD_PREAMBLE_SHORT : EAGLE_TXD_PREAMBLE_LONG); 3163193240Ssam } 3164193240Ssam return fmt; 3165193240Ssam} 3166193240Ssam 3167193240Ssamstatic int 3168193240Ssammwl_tx_start(struct mwl_softc *sc, struct ieee80211_node *ni, struct mwl_txbuf *bf, 3169193240Ssam struct mbuf *m0) 3170193240Ssam{ 3171193240Ssam#define IEEE80211_DIR_DSTODS(wh) \ 3172193240Ssam ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 3173193240Ssam struct ifnet *ifp = sc->sc_ifp; 3174193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3175193240Ssam struct ieee80211vap *vap = ni->ni_vap; 3176193240Ssam int error, iswep, ismcast; 3177193240Ssam int hdrlen, copyhdrlen, pktlen; 3178193240Ssam struct mwl_txdesc *ds; 3179193240Ssam struct mwl_txq *txq; 3180193240Ssam struct ieee80211_frame *wh; 3181193240Ssam struct mwltxrec *tr; 3182193240Ssam struct mwl_node *mn; 3183193240Ssam uint16_t qos; 3184193240Ssam#if MWL_TXDESC > 1 3185193240Ssam int i; 3186193240Ssam#endif 3187193240Ssam 3188193240Ssam wh = mtod(m0, struct ieee80211_frame *); 3189260444Skevlo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 3190193240Ssam ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 3191193240Ssam hdrlen = ieee80211_anyhdrsize(wh); 3192193240Ssam copyhdrlen = hdrlen; 3193193240Ssam pktlen = m0->m_pkthdr.len; 3194193240Ssam if (IEEE80211_QOS_HAS_SEQ(wh)) { 3195193240Ssam if (IEEE80211_DIR_DSTODS(wh)) { 3196193240Ssam qos = *(uint16_t *) 3197193240Ssam (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 3198193240Ssam copyhdrlen -= sizeof(qos); 3199193240Ssam } else 3200193240Ssam qos = *(uint16_t *) 3201193240Ssam (((struct ieee80211_qosframe *) wh)->i_qos); 3202193240Ssam } else 3203193240Ssam qos = 0; 3204193240Ssam 3205193240Ssam if (iswep) { 3206193240Ssam const struct ieee80211_cipher *cip; 3207193240Ssam struct ieee80211_key *k; 3208193240Ssam 3209193240Ssam /* 3210193240Ssam * Construct the 802.11 header+trailer for an encrypted 3211193240Ssam * frame. The only reason this can fail is because of an 3212193240Ssam * unknown or unsupported cipher/key type. 3213193240Ssam * 3214193240Ssam * NB: we do this even though the firmware will ignore 3215193240Ssam * what we've done for WEP and TKIP as we need the 3216193240Ssam * ExtIV filled in for CCMP and this also adjusts 3217193240Ssam * the headers which simplifies our work below. 3218193240Ssam */ 3219193240Ssam k = ieee80211_crypto_encap(ni, m0); 3220193240Ssam if (k == NULL) { 3221193240Ssam /* 3222193240Ssam * This can happen when the key is yanked after the 3223193240Ssam * frame was queued. Just discard the frame; the 3224193240Ssam * 802.11 layer counts failures and provides 3225193240Ssam * debugging/diagnostics. 3226193240Ssam */ 3227193240Ssam m_freem(m0); 3228193240Ssam return EIO; 3229193240Ssam } 3230193240Ssam /* 3231193240Ssam * Adjust the packet length for the crypto additions 3232193240Ssam * done during encap and any other bits that the f/w 3233193240Ssam * will add later on. 3234193240Ssam */ 3235193240Ssam cip = k->wk_cipher; 3236193240Ssam pktlen += cip->ic_header + cip->ic_miclen + cip->ic_trailer; 3237193240Ssam 3238193240Ssam /* packet header may have moved, reset our local pointer */ 3239193240Ssam wh = mtod(m0, struct ieee80211_frame *); 3240193240Ssam } 3241193240Ssam 3242193240Ssam if (ieee80211_radiotap_active_vap(vap)) { 3243193240Ssam sc->sc_tx_th.wt_flags = 0; /* XXX */ 3244193240Ssam if (iswep) 3245193240Ssam sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3246193240Ssam#if 0 3247193240Ssam sc->sc_tx_th.wt_rate = ds->DataRate; 3248193240Ssam#endif 3249193240Ssam sc->sc_tx_th.wt_txpower = ni->ni_txpower; 3250193240Ssam sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 3251193240Ssam 3252193240Ssam ieee80211_radiotap_tx(vap, m0); 3253193240Ssam } 3254193240Ssam /* 3255193240Ssam * Copy up/down the 802.11 header; the firmware requires 3256193240Ssam * we present a 2-byte payload length followed by a 3257193240Ssam * 4-address header (w/o QoS), followed (optionally) by 3258193240Ssam * any WEP/ExtIV header (but only filled in for CCMP). 3259193240Ssam * We are assured the mbuf has sufficient headroom to 3260193240Ssam * prepend in-place by the setup of ic_headroom in 3261193240Ssam * mwl_attach. 3262193240Ssam */ 3263193240Ssam if (hdrlen < sizeof(struct mwltxrec)) { 3264193240Ssam const int space = sizeof(struct mwltxrec) - hdrlen; 3265193240Ssam if (M_LEADINGSPACE(m0) < space) { 3266193240Ssam /* NB: should never happen */ 3267193240Ssam device_printf(sc->sc_dev, 3268193240Ssam "not enough headroom, need %d found %zd, " 3269193240Ssam "m_flags 0x%x m_len %d\n", 3270193240Ssam space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 3271193240Ssam ieee80211_dump_pkt(ic, 3272193240Ssam mtod(m0, const uint8_t *), m0->m_len, 0, -1); 3273193240Ssam m_freem(m0); 3274193240Ssam sc->sc_stats.mst_tx_noheadroom++; 3275193240Ssam return EIO; 3276193240Ssam } 3277193240Ssam M_PREPEND(m0, space, M_NOWAIT); 3278193240Ssam } 3279193240Ssam tr = mtod(m0, struct mwltxrec *); 3280193240Ssam if (wh != (struct ieee80211_frame *) &tr->wh) 3281193240Ssam ovbcopy(wh, &tr->wh, hdrlen); 3282193240Ssam /* 3283193240Ssam * Note: the "firmware length" is actually the length 3284193240Ssam * of the fully formed "802.11 payload". That is, it's 3285193240Ssam * everything except for the 802.11 header. In particular 3286193240Ssam * this includes all crypto material including the MIC! 3287193240Ssam */ 3288193240Ssam tr->fwlen = htole16(pktlen - hdrlen); 3289193240Ssam 3290193240Ssam /* 3291193240Ssam * Load the DMA map so any coalescing is done. This 3292193240Ssam * also calculates the number of descriptors we need. 3293193240Ssam */ 3294193240Ssam error = mwl_tx_dmasetup(sc, bf, m0); 3295193240Ssam if (error != 0) { 3296193240Ssam /* NB: stat collected in mwl_tx_dmasetup */ 3297193240Ssam DPRINTF(sc, MWL_DEBUG_XMIT, 3298193240Ssam "%s: unable to setup dma\n", __func__); 3299193240Ssam return error; 3300193240Ssam } 3301193240Ssam bf->bf_node = ni; /* NB: held reference */ 3302193240Ssam m0 = bf->bf_m; /* NB: may have changed */ 3303193240Ssam tr = mtod(m0, struct mwltxrec *); 3304193240Ssam wh = (struct ieee80211_frame *)&tr->wh; 3305193240Ssam 3306193240Ssam /* 3307193240Ssam * Formulate tx descriptor. 3308193240Ssam */ 3309193240Ssam ds = bf->bf_desc; 3310193240Ssam txq = bf->bf_txq; 3311193240Ssam 3312193240Ssam ds->QosCtrl = qos; /* NB: already little-endian */ 3313193240Ssam#if MWL_TXDESC == 1 3314193240Ssam /* 3315193240Ssam * NB: multiframes should be zero because the descriptors 3316193240Ssam * are initialized to zero. This should handle the case 3317193240Ssam * where the driver is built with MWL_TXDESC=1 but we are 3318193240Ssam * using firmware with multi-segment support. 3319193240Ssam */ 3320193240Ssam ds->PktPtr = htole32(bf->bf_segs[0].ds_addr); 3321193240Ssam ds->PktLen = htole16(bf->bf_segs[0].ds_len); 3322193240Ssam#else 3323193240Ssam ds->multiframes = htole32(bf->bf_nseg); 3324193240Ssam ds->PktLen = htole16(m0->m_pkthdr.len); 3325193240Ssam for (i = 0; i < bf->bf_nseg; i++) { 3326193240Ssam ds->PktPtrArray[i] = htole32(bf->bf_segs[i].ds_addr); 3327193240Ssam ds->PktLenArray[i] = htole16(bf->bf_segs[i].ds_len); 3328193240Ssam } 3329193240Ssam#endif 3330193240Ssam /* NB: pPhysNext, DataRate, and SapPktInfo setup once, don't touch */ 3331193240Ssam ds->Format = 0; 3332193240Ssam ds->pad = 0; 3333195171Ssam ds->ack_wcb_addr = 0; 3334193240Ssam 3335193240Ssam mn = MWL_NODE(ni); 3336193240Ssam /* 3337193240Ssam * Select transmit rate. 3338193240Ssam */ 3339193240Ssam switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 3340193240Ssam case IEEE80211_FC0_TYPE_MGT: 3341193240Ssam sc->sc_stats.mst_tx_mgmt++; 3342193240Ssam /* fall thru... */ 3343193240Ssam case IEEE80211_FC0_TYPE_CTL: 3344193240Ssam /* NB: assign to BE q to avoid bursting */ 3345193240Ssam ds->TxPriority = MWL_WME_AC_BE; 3346193240Ssam break; 3347193240Ssam case IEEE80211_FC0_TYPE_DATA: 3348193240Ssam if (!ismcast) { 3349193240Ssam const struct ieee80211_txparam *tp = ni->ni_txparms; 3350193240Ssam /* 3351193240Ssam * EAPOL frames get forced to a fixed rate and w/o 3352193240Ssam * aggregation; otherwise check for any fixed rate 3353193240Ssam * for the client (may depend on association state). 3354193240Ssam */ 3355193240Ssam if (m0->m_flags & M_EAPOL) { 3356193240Ssam const struct mwl_vap *mvp = MWL_VAP_CONST(vap); 3357193240Ssam ds->Format = mvp->mv_eapolformat; 3358193240Ssam ds->pad = htole16( 3359193240Ssam EAGLE_TXD_FIXED_RATE | EAGLE_TXD_DONT_AGGR); 3360195171Ssam } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 3361193240Ssam /* XXX pre-calculate per node */ 3362193240Ssam ds->Format = htole16( 3363193240Ssam mwl_calcformat(tp->ucastrate, ni)); 3364193240Ssam ds->pad = htole16(EAGLE_TXD_FIXED_RATE); 3365193240Ssam } 3366193240Ssam /* NB: EAPOL frames will never have qos set */ 3367193240Ssam if (qos == 0) 3368193240Ssam ds->TxPriority = txq->qnum; 3369193240Ssam#if MWL_MAXBA > 3 3370193240Ssam else if (mwl_bastream_match(&mn->mn_ba[3], qos)) 3371193240Ssam ds->TxPriority = mn->mn_ba[3].txq; 3372193240Ssam#endif 3373193240Ssam#if MWL_MAXBA > 2 3374193240Ssam else if (mwl_bastream_match(&mn->mn_ba[2], qos)) 3375193240Ssam ds->TxPriority = mn->mn_ba[2].txq; 3376193240Ssam#endif 3377193240Ssam#if MWL_MAXBA > 1 3378193240Ssam else if (mwl_bastream_match(&mn->mn_ba[1], qos)) 3379193240Ssam ds->TxPriority = mn->mn_ba[1].txq; 3380193240Ssam#endif 3381193240Ssam#if MWL_MAXBA > 0 3382193240Ssam else if (mwl_bastream_match(&mn->mn_ba[0], qos)) 3383193240Ssam ds->TxPriority = mn->mn_ba[0].txq; 3384193240Ssam#endif 3385193240Ssam else 3386193240Ssam ds->TxPriority = txq->qnum; 3387193240Ssam } else 3388193240Ssam ds->TxPriority = txq->qnum; 3389193240Ssam break; 3390193240Ssam default: 3391193240Ssam if_printf(ifp, "bogus frame type 0x%x (%s)\n", 3392193240Ssam wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 3393193240Ssam sc->sc_stats.mst_tx_badframetype++; 3394193240Ssam m_freem(m0); 3395193240Ssam return EIO; 3396193240Ssam } 3397193240Ssam 3398193240Ssam if (IFF_DUMPPKTS_XMIT(sc)) 3399193240Ssam ieee80211_dump_pkt(ic, 3400193240Ssam mtod(m0, const uint8_t *)+sizeof(uint16_t), 3401193240Ssam m0->m_len - sizeof(uint16_t), ds->DataRate, -1); 3402193240Ssam 3403193240Ssam MWL_TXQ_LOCK(txq); 3404193240Ssam ds->Status = htole32(EAGLE_TXD_STATUS_FW_OWNED); 3405193240Ssam STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 3406193240Ssam MWL_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 3407193240Ssam 3408193240Ssam ifp->if_opackets++; 3409199559Sjhb sc->sc_tx_timer = 5; 3410193240Ssam MWL_TXQ_UNLOCK(txq); 3411193240Ssam 3412193240Ssam return 0; 3413193240Ssam#undef IEEE80211_DIR_DSTODS 3414193240Ssam} 3415193240Ssam 3416193240Ssamstatic __inline int 3417193240Ssammwl_cvtlegacyrix(int rix) 3418193240Ssam{ 3419193240Ssam#define N(x) (sizeof(x)/sizeof(x[0])) 3420193240Ssam static const int ieeerates[] = 3421193240Ssam { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 72, 96, 108 }; 3422193240Ssam return (rix < N(ieeerates) ? ieeerates[rix] : 0); 3423193240Ssam#undef N 3424193240Ssam} 3425193240Ssam 3426193240Ssam/* 3427193240Ssam * Process completed xmit descriptors from the specified queue. 3428193240Ssam */ 3429193240Ssamstatic int 3430193240Ssammwl_tx_processq(struct mwl_softc *sc, struct mwl_txq *txq) 3431193240Ssam{ 3432193240Ssam#define EAGLE_TXD_STATUS_MCAST \ 3433193240Ssam (EAGLE_TXD_STATUS_MULTICAST_TX | EAGLE_TXD_STATUS_BROADCAST_TX) 3434193240Ssam struct ifnet *ifp = sc->sc_ifp; 3435193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3436193240Ssam struct mwl_txbuf *bf; 3437193240Ssam struct mwl_txdesc *ds; 3438193240Ssam struct ieee80211_node *ni; 3439193240Ssam struct mwl_node *an; 3440193240Ssam int nreaped; 3441193240Ssam uint32_t status; 3442193240Ssam 3443193240Ssam DPRINTF(sc, MWL_DEBUG_TX_PROC, "%s: tx queue %u\n", __func__, txq->qnum); 3444193240Ssam for (nreaped = 0;; nreaped++) { 3445193240Ssam MWL_TXQ_LOCK(txq); 3446193240Ssam bf = STAILQ_FIRST(&txq->active); 3447193240Ssam if (bf == NULL) { 3448193240Ssam MWL_TXQ_UNLOCK(txq); 3449193240Ssam break; 3450193240Ssam } 3451193240Ssam ds = bf->bf_desc; 3452193240Ssam MWL_TXDESC_SYNC(txq, ds, 3453193240Ssam BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 3454193240Ssam if (ds->Status & htole32(EAGLE_TXD_STATUS_FW_OWNED)) { 3455193240Ssam MWL_TXQ_UNLOCK(txq); 3456193240Ssam break; 3457193240Ssam } 3458193240Ssam STAILQ_REMOVE_HEAD(&txq->active, bf_list); 3459193240Ssam MWL_TXQ_UNLOCK(txq); 3460193240Ssam 3461193240Ssam#ifdef MWL_DEBUG 3462193240Ssam if (sc->sc_debug & MWL_DEBUG_XMIT_DESC) 3463193240Ssam mwl_printtxbuf(bf, txq->qnum, nreaped); 3464193240Ssam#endif 3465193240Ssam ni = bf->bf_node; 3466193240Ssam if (ni != NULL) { 3467193240Ssam an = MWL_NODE(ni); 3468193240Ssam status = le32toh(ds->Status); 3469193240Ssam if (status & EAGLE_TXD_STATUS_OK) { 3470193240Ssam uint16_t Format = le16toh(ds->Format); 3471193240Ssam uint8_t txant = MS(Format, EAGLE_TXD_ANTENNA); 3472193240Ssam 3473193240Ssam sc->sc_stats.mst_ant_tx[txant]++; 3474193240Ssam if (status & EAGLE_TXD_STATUS_OK_RETRY) 3475193240Ssam sc->sc_stats.mst_tx_retries++; 3476193240Ssam if (status & EAGLE_TXD_STATUS_OK_MORE_RETRY) 3477193240Ssam sc->sc_stats.mst_tx_mretries++; 3478193240Ssam if (txq->qnum >= MWL_WME_AC_VO) 3479193240Ssam ic->ic_wme.wme_hipri_traffic++; 3480193240Ssam ni->ni_txrate = MS(Format, EAGLE_TXD_RATE); 3481193240Ssam if ((Format & EAGLE_TXD_FORMAT_HT) == 0) { 3482193240Ssam ni->ni_txrate = mwl_cvtlegacyrix( 3483193240Ssam ni->ni_txrate); 3484193240Ssam } else 3485193240Ssam ni->ni_txrate |= IEEE80211_RATE_MCS; 3486193240Ssam sc->sc_stats.mst_tx_rate = ni->ni_txrate; 3487193240Ssam } else { 3488193240Ssam if (status & EAGLE_TXD_STATUS_FAILED_LINK_ERROR) 3489193240Ssam sc->sc_stats.mst_tx_linkerror++; 3490193240Ssam if (status & EAGLE_TXD_STATUS_FAILED_XRETRY) 3491193240Ssam sc->sc_stats.mst_tx_xretries++; 3492193240Ssam if (status & EAGLE_TXD_STATUS_FAILED_AGING) 3493193240Ssam sc->sc_stats.mst_tx_aging++; 3494193240Ssam if (bf->bf_m->m_flags & M_FF) 3495193240Ssam sc->sc_stats.mst_ff_txerr++; 3496193240Ssam } 3497193240Ssam /* 3498193240Ssam * Do any tx complete callback. Note this must 3499193240Ssam * be done before releasing the node reference. 3500193240Ssam * XXX no way to figure out if frame was ACK'd 3501193240Ssam */ 3502193240Ssam if (bf->bf_m->m_flags & M_TXCB) { 3503193240Ssam /* XXX strip fw len in case header inspected */ 3504193240Ssam m_adj(bf->bf_m, sizeof(uint16_t)); 3505193240Ssam ieee80211_process_callback(ni, bf->bf_m, 3506193240Ssam (status & EAGLE_TXD_STATUS_OK) == 0); 3507193240Ssam } 3508193240Ssam /* 3509193240Ssam * Reclaim reference to node. 3510193240Ssam * 3511193240Ssam * NB: the node may be reclaimed here if, for example 3512193240Ssam * this is a DEAUTH message that was sent and the 3513193240Ssam * node was timed out due to inactivity. 3514193240Ssam */ 3515193240Ssam ieee80211_free_node(ni); 3516193240Ssam } 3517193240Ssam ds->Status = htole32(EAGLE_TXD_STATUS_IDLE); 3518193240Ssam 3519193240Ssam bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 3520193240Ssam BUS_DMASYNC_POSTWRITE); 3521193240Ssam bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 3522193240Ssam m_freem(bf->bf_m); 3523193240Ssam 3524193240Ssam mwl_puttxbuf_tail(txq, bf); 3525193240Ssam } 3526193240Ssam return nreaped; 3527193240Ssam#undef EAGLE_TXD_STATUS_MCAST 3528193240Ssam} 3529193240Ssam 3530193240Ssam/* 3531193240Ssam * Deferred processing of transmit interrupt; special-cased 3532193240Ssam * for four hardware queues, 0-3. 3533193240Ssam */ 3534193240Ssamstatic void 3535193240Ssammwl_tx_proc(void *arg, int npending) 3536193240Ssam{ 3537193240Ssam struct mwl_softc *sc = arg; 3538193240Ssam struct ifnet *ifp = sc->sc_ifp; 3539193240Ssam int nreaped; 3540193240Ssam 3541193240Ssam /* 3542193240Ssam * Process each active queue. 3543193240Ssam */ 3544193240Ssam nreaped = 0; 3545193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[0].active)) 3546193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[0]); 3547193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[1].active)) 3548193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[1]); 3549193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[2].active)) 3550193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[2]); 3551193240Ssam if (!STAILQ_EMPTY(&sc->sc_txq[3].active)) 3552193240Ssam nreaped += mwl_tx_processq(sc, &sc->sc_txq[3]); 3553193240Ssam 3554193240Ssam if (nreaped != 0) { 3555193240Ssam ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3556199559Sjhb sc->sc_tx_timer = 0; 3557193240Ssam if (!IFQ_IS_EMPTY(&ifp->if_snd)) { 3558193240Ssam /* NB: kick fw; the tx thread may have been preempted */ 3559193240Ssam mwl_hal_txstart(sc->sc_mh, 0); 3560193240Ssam mwl_start(ifp); 3561193240Ssam } 3562193240Ssam } 3563193240Ssam} 3564193240Ssam 3565193240Ssamstatic void 3566193240Ssammwl_tx_draintxq(struct mwl_softc *sc, struct mwl_txq *txq) 3567193240Ssam{ 3568193240Ssam struct ieee80211_node *ni; 3569193240Ssam struct mwl_txbuf *bf; 3570193240Ssam u_int ix; 3571193240Ssam 3572193240Ssam /* 3573193240Ssam * NB: this assumes output has been stopped and 3574193240Ssam * we do not need to block mwl_tx_tasklet 3575193240Ssam */ 3576193240Ssam for (ix = 0;; ix++) { 3577193240Ssam MWL_TXQ_LOCK(txq); 3578193240Ssam bf = STAILQ_FIRST(&txq->active); 3579193240Ssam if (bf == NULL) { 3580193240Ssam MWL_TXQ_UNLOCK(txq); 3581193240Ssam break; 3582193240Ssam } 3583193240Ssam STAILQ_REMOVE_HEAD(&txq->active, bf_list); 3584193240Ssam MWL_TXQ_UNLOCK(txq); 3585193240Ssam#ifdef MWL_DEBUG 3586193240Ssam if (sc->sc_debug & MWL_DEBUG_RESET) { 3587193240Ssam struct ifnet *ifp = sc->sc_ifp; 3588193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3589193240Ssam const struct mwltxrec *tr = 3590193240Ssam mtod(bf->bf_m, const struct mwltxrec *); 3591193240Ssam mwl_printtxbuf(bf, txq->qnum, ix); 3592193240Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 3593193240Ssam bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 3594193240Ssam } 3595193240Ssam#endif /* MWL_DEBUG */ 3596193240Ssam bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 3597193240Ssam ni = bf->bf_node; 3598193240Ssam if (ni != NULL) { 3599193240Ssam /* 3600193240Ssam * Reclaim node reference. 3601193240Ssam */ 3602193240Ssam ieee80211_free_node(ni); 3603193240Ssam } 3604193240Ssam m_freem(bf->bf_m); 3605193240Ssam 3606193240Ssam mwl_puttxbuf_tail(txq, bf); 3607193240Ssam } 3608193240Ssam} 3609193240Ssam 3610193240Ssam/* 3611193240Ssam * Drain the transmit queues and reclaim resources. 3612193240Ssam */ 3613193240Ssamstatic void 3614193240Ssammwl_draintxq(struct mwl_softc *sc) 3615193240Ssam{ 3616193240Ssam struct ifnet *ifp = sc->sc_ifp; 3617193240Ssam int i; 3618193240Ssam 3619193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 3620193240Ssam mwl_tx_draintxq(sc, &sc->sc_txq[i]); 3621193240Ssam ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 3622199559Sjhb sc->sc_tx_timer = 0; 3623193240Ssam} 3624193240Ssam 3625193240Ssam#ifdef MWL_DIAGAPI 3626193240Ssam/* 3627193240Ssam * Reset the transmit queues to a pristine state after a fw download. 3628193240Ssam */ 3629193240Ssamstatic void 3630193240Ssammwl_resettxq(struct mwl_softc *sc) 3631193240Ssam{ 3632193240Ssam int i; 3633193240Ssam 3634193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) 3635193240Ssam mwl_txq_reset(sc, &sc->sc_txq[i]); 3636193240Ssam} 3637193240Ssam#endif /* MWL_DIAGAPI */ 3638193240Ssam 3639193240Ssam/* 3640193240Ssam * Clear the transmit queues of any frames submitted for the 3641193240Ssam * specified vap. This is done when the vap is deleted so we 3642193240Ssam * don't potentially reference the vap after it is gone. 3643193240Ssam * Note we cannot remove the frames; we only reclaim the node 3644193240Ssam * reference. 3645193240Ssam */ 3646193240Ssamstatic void 3647193240Ssammwl_cleartxq(struct mwl_softc *sc, struct ieee80211vap *vap) 3648193240Ssam{ 3649193240Ssam struct mwl_txq *txq; 3650193240Ssam struct mwl_txbuf *bf; 3651193240Ssam int i; 3652193240Ssam 3653193240Ssam for (i = 0; i < MWL_NUM_TX_QUEUES; i++) { 3654193240Ssam txq = &sc->sc_txq[i]; 3655193240Ssam MWL_TXQ_LOCK(txq); 3656193240Ssam STAILQ_FOREACH(bf, &txq->active, bf_list) { 3657193240Ssam struct ieee80211_node *ni = bf->bf_node; 3658193240Ssam if (ni != NULL && ni->ni_vap == vap) { 3659193240Ssam bf->bf_node = NULL; 3660193240Ssam ieee80211_free_node(ni); 3661193240Ssam } 3662193240Ssam } 3663193240Ssam MWL_TXQ_UNLOCK(txq); 3664193240Ssam } 3665193240Ssam} 3666193240Ssam 3667195377Ssamstatic int 3668195377Ssammwl_recv_action(struct ieee80211_node *ni, const struct ieee80211_frame *wh, 3669195377Ssam const uint8_t *frm, const uint8_t *efrm) 3670193240Ssam{ 3671193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3672193240Ssam const struct ieee80211_action *ia; 3673193240Ssam 3674193240Ssam ia = (const struct ieee80211_action *) frm; 3675193240Ssam if (ia->ia_category == IEEE80211_ACTION_CAT_HT && 3676193240Ssam ia->ia_action == IEEE80211_ACTION_HT_MIMOPWRSAVE) { 3677193240Ssam const struct ieee80211_action_ht_mimopowersave *mps = 3678193240Ssam (const struct ieee80211_action_ht_mimopowersave *) ia; 3679193240Ssam 3680193240Ssam mwl_hal_setmimops(sc->sc_mh, ni->ni_macaddr, 3681193240Ssam mps->am_control & IEEE80211_A_HT_MIMOPWRSAVE_ENA, 3682193240Ssam MS(mps->am_control, IEEE80211_A_HT_MIMOPWRSAVE_MODE)); 3683195377Ssam return 0; 3684193240Ssam } else 3685195377Ssam return sc->sc_recv_action(ni, wh, frm, efrm); 3686193240Ssam} 3687193240Ssam 3688193240Ssamstatic int 3689193240Ssammwl_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 3690193240Ssam int dialogtoken, int baparamset, int batimeout) 3691193240Ssam{ 3692193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3693195171Ssam struct ieee80211vap *vap = ni->ni_vap; 3694193240Ssam struct mwl_node *mn = MWL_NODE(ni); 3695193240Ssam struct mwl_bastate *bas; 3696193240Ssam 3697193240Ssam bas = tap->txa_private; 3698193240Ssam if (bas == NULL) { 3699193240Ssam const MWL_HAL_BASTREAM *sp; 3700193240Ssam /* 3701193240Ssam * Check for a free BA stream slot. 3702193240Ssam */ 3703193240Ssam#if MWL_MAXBA > 3 3704193240Ssam if (mn->mn_ba[3].bastream == NULL) 3705193240Ssam bas = &mn->mn_ba[3]; 3706193240Ssam else 3707193240Ssam#endif 3708193240Ssam#if MWL_MAXBA > 2 3709193240Ssam if (mn->mn_ba[2].bastream == NULL) 3710193240Ssam bas = &mn->mn_ba[2]; 3711193240Ssam else 3712193240Ssam#endif 3713193240Ssam#if MWL_MAXBA > 1 3714193240Ssam if (mn->mn_ba[1].bastream == NULL) 3715193240Ssam bas = &mn->mn_ba[1]; 3716193240Ssam else 3717193240Ssam#endif 3718193240Ssam#if MWL_MAXBA > 0 3719193240Ssam if (mn->mn_ba[0].bastream == NULL) 3720193240Ssam bas = &mn->mn_ba[0]; 3721193240Ssam else 3722193240Ssam#endif 3723193240Ssam { 3724193240Ssam /* sta already has max BA streams */ 3725193240Ssam /* XXX assign BA stream to highest priority tid */ 3726193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3727193240Ssam "%s: already has max bastreams\n", __func__); 3728193240Ssam sc->sc_stats.mst_ampdu_reject++; 3729193240Ssam return 0; 3730193240Ssam } 3731193240Ssam /* NB: no held reference to ni */ 3732195171Ssam sp = mwl_hal_bastream_alloc(MWL_VAP(vap)->mv_hvap, 3733195171Ssam (baparamset & IEEE80211_BAPS_POLICY_IMMEDIATE) != 0, 3734234324Sadrian ni->ni_macaddr, tap->txa_tid, ni->ni_htparam, 3735195171Ssam ni, tap); 3736193240Ssam if (sp == NULL) { 3737193240Ssam /* 3738193240Ssam * No available stream, return 0 so no 3739193240Ssam * a-mpdu aggregation will be done. 3740193240Ssam */ 3741193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3742193240Ssam "%s: no bastream available\n", __func__); 3743193240Ssam sc->sc_stats.mst_ampdu_nostream++; 3744193240Ssam return 0; 3745193240Ssam } 3746193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: alloc bastream %p\n", 3747193240Ssam __func__, sp); 3748193240Ssam /* NB: qos is left zero so we won't match in mwl_tx_start */ 3749193240Ssam bas->bastream = sp; 3750193240Ssam tap->txa_private = bas; 3751193240Ssam } 3752193240Ssam /* fetch current seq# from the firmware; if available */ 3753193240Ssam if (mwl_hal_bastream_get_seqno(sc->sc_mh, bas->bastream, 3754195171Ssam vap->iv_opmode == IEEE80211_M_STA ? vap->iv_myaddr : ni->ni_macaddr, 3755193240Ssam &tap->txa_start) != 0) 3756193240Ssam tap->txa_start = 0; 3757193240Ssam return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, batimeout); 3758193240Ssam} 3759193240Ssam 3760193240Ssamstatic int 3761193240Ssammwl_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 3762193240Ssam int code, int baparamset, int batimeout) 3763193240Ssam{ 3764193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3765193240Ssam struct mwl_bastate *bas; 3766193240Ssam 3767193240Ssam bas = tap->txa_private; 3768193240Ssam if (bas == NULL) { 3769193240Ssam /* XXX should not happen */ 3770193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3771234324Sadrian "%s: no BA stream allocated, TID %d\n", 3772234324Sadrian __func__, tap->txa_tid); 3773193240Ssam sc->sc_stats.mst_addba_nostream++; 3774193240Ssam return 0; 3775193240Ssam } 3776193240Ssam if (code == IEEE80211_STATUS_SUCCESS) { 3777195171Ssam struct ieee80211vap *vap = ni->ni_vap; 3778193240Ssam int bufsiz, error; 3779193240Ssam 3780193240Ssam /* 3781193240Ssam * Tell the firmware to setup the BA stream; 3782193240Ssam * we know resources are available because we 3783193240Ssam * pre-allocated one before forming the request. 3784193240Ssam */ 3785193240Ssam bufsiz = MS(baparamset, IEEE80211_BAPS_BUFSIZ); 3786193240Ssam if (bufsiz == 0) 3787193240Ssam bufsiz = IEEE80211_AGGR_BAWMAX; 3788195171Ssam error = mwl_hal_bastream_create(MWL_VAP(vap)->mv_hvap, 3789195171Ssam bas->bastream, bufsiz, bufsiz, tap->txa_start); 3790193240Ssam if (error != 0) { 3791193240Ssam /* 3792193240Ssam * Setup failed, return immediately so no a-mpdu 3793193240Ssam * aggregation will be done. 3794193240Ssam */ 3795193240Ssam mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream); 3796193240Ssam mwl_bastream_free(bas); 3797193240Ssam tap->txa_private = NULL; 3798193240Ssam 3799193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3800234324Sadrian "%s: create failed, error %d, bufsiz %d TID %d " 3801193240Ssam "htparam 0x%x\n", __func__, error, bufsiz, 3802234324Sadrian tap->txa_tid, ni->ni_htparam); 3803193240Ssam sc->sc_stats.mst_bacreate_failed++; 3804193240Ssam return 0; 3805193240Ssam } 3806193240Ssam /* NB: cache txq to avoid ptr indirect */ 3807234324Sadrian mwl_bastream_setup(bas, tap->txa_tid, bas->bastream->txq); 3808193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3809234324Sadrian "%s: bastream %p assigned to txq %d TID %d bufsiz %d " 3810193240Ssam "htparam 0x%x\n", __func__, bas->bastream, 3811234324Sadrian bas->txq, tap->txa_tid, bufsiz, ni->ni_htparam); 3812193240Ssam } else { 3813193240Ssam /* 3814193240Ssam * Other side NAK'd us; return the resources. 3815193240Ssam */ 3816193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, 3817193240Ssam "%s: request failed with code %d, destroy bastream %p\n", 3818193240Ssam __func__, code, bas->bastream); 3819193240Ssam mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream); 3820193240Ssam mwl_bastream_free(bas); 3821193240Ssam tap->txa_private = NULL; 3822193240Ssam } 3823193240Ssam /* NB: firmware sends BAR so we don't need to */ 3824193240Ssam return sc->sc_addba_response(ni, tap, code, baparamset, batimeout); 3825193240Ssam} 3826193240Ssam 3827193240Ssamstatic void 3828193240Ssammwl_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 3829193240Ssam{ 3830193240Ssam struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc; 3831193240Ssam struct mwl_bastate *bas; 3832193240Ssam 3833193240Ssam bas = tap->txa_private; 3834193240Ssam if (bas != NULL) { 3835193240Ssam DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: destroy bastream %p\n", 3836193240Ssam __func__, bas->bastream); 3837193240Ssam mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream); 3838193240Ssam mwl_bastream_free(bas); 3839193240Ssam tap->txa_private = NULL; 3840193240Ssam } 3841193240Ssam sc->sc_addba_stop(ni, tap); 3842193240Ssam} 3843193240Ssam 3844193240Ssam/* 3845193240Ssam * Setup the rx data structures. This should only be 3846193240Ssam * done once or we may get out of sync with the firmware. 3847193240Ssam */ 3848193240Ssamstatic int 3849193240Ssammwl_startrecv(struct mwl_softc *sc) 3850193240Ssam{ 3851193240Ssam if (!sc->sc_recvsetup) { 3852193240Ssam struct mwl_rxbuf *bf, *prev; 3853193240Ssam struct mwl_rxdesc *ds; 3854193240Ssam 3855193240Ssam prev = NULL; 3856193240Ssam STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 3857193240Ssam int error = mwl_rxbuf_init(sc, bf); 3858193240Ssam if (error != 0) { 3859193240Ssam DPRINTF(sc, MWL_DEBUG_RECV, 3860193240Ssam "%s: mwl_rxbuf_init failed %d\n", 3861193240Ssam __func__, error); 3862193240Ssam return error; 3863193240Ssam } 3864193240Ssam if (prev != NULL) { 3865193240Ssam ds = prev->bf_desc; 3866193240Ssam ds->pPhysNext = htole32(bf->bf_daddr); 3867193240Ssam } 3868193240Ssam prev = bf; 3869193240Ssam } 3870193240Ssam if (prev != NULL) { 3871193240Ssam ds = prev->bf_desc; 3872193240Ssam ds->pPhysNext = 3873193240Ssam htole32(STAILQ_FIRST(&sc->sc_rxbuf)->bf_daddr); 3874193240Ssam } 3875193240Ssam sc->sc_recvsetup = 1; 3876193240Ssam } 3877193240Ssam mwl_mode_init(sc); /* set filters, etc. */ 3878193240Ssam return 0; 3879193240Ssam} 3880193240Ssam 3881193240Ssamstatic MWL_HAL_APMODE 3882193240Ssammwl_getapmode(const struct ieee80211vap *vap, struct ieee80211_channel *chan) 3883193240Ssam{ 3884193240Ssam MWL_HAL_APMODE mode; 3885193240Ssam 3886193240Ssam if (IEEE80211_IS_CHAN_HT(chan)) { 3887193656Ssam if (vap->iv_flags_ht & IEEE80211_FHT_PUREN) 3888193240Ssam mode = AP_MODE_N_ONLY; 3889193240Ssam else if (IEEE80211_IS_CHAN_5GHZ(chan)) 3890193240Ssam mode = AP_MODE_AandN; 3891193240Ssam else if (vap->iv_flags & IEEE80211_F_PUREG) 3892193240Ssam mode = AP_MODE_GandN; 3893193240Ssam else 3894193240Ssam mode = AP_MODE_BandGandN; 3895193240Ssam } else if (IEEE80211_IS_CHAN_ANYG(chan)) { 3896193240Ssam if (vap->iv_flags & IEEE80211_F_PUREG) 3897193240Ssam mode = AP_MODE_G_ONLY; 3898193240Ssam else 3899193240Ssam mode = AP_MODE_MIXED; 3900193240Ssam } else if (IEEE80211_IS_CHAN_B(chan)) 3901193240Ssam mode = AP_MODE_B_ONLY; 3902193240Ssam else if (IEEE80211_IS_CHAN_A(chan)) 3903193240Ssam mode = AP_MODE_A_ONLY; 3904193240Ssam else 3905193240Ssam mode = AP_MODE_MIXED; /* XXX should not happen? */ 3906193240Ssam return mode; 3907193240Ssam} 3908193240Ssam 3909193240Ssamstatic int 3910193240Ssammwl_setapmode(struct ieee80211vap *vap, struct ieee80211_channel *chan) 3911193240Ssam{ 3912193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 3913193240Ssam return mwl_hal_setapmode(hvap, mwl_getapmode(vap, chan)); 3914193240Ssam} 3915193240Ssam 3916193240Ssam/* 3917193240Ssam * Set/change channels. 3918193240Ssam */ 3919193240Ssamstatic int 3920193240Ssammwl_chan_set(struct mwl_softc *sc, struct ieee80211_channel *chan) 3921193240Ssam{ 3922193240Ssam struct mwl_hal *mh = sc->sc_mh; 3923193240Ssam struct ifnet *ifp = sc->sc_ifp; 3924193240Ssam struct ieee80211com *ic = ifp->if_l2com; 3925193240Ssam MWL_HAL_CHANNEL hchan; 3926193240Ssam int maxtxpow; 3927193240Ssam 3928193240Ssam DPRINTF(sc, MWL_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 3929193240Ssam __func__, chan->ic_freq, chan->ic_flags); 3930193240Ssam 3931193240Ssam /* 3932193240Ssam * Convert to a HAL channel description with 3933193240Ssam * the flags constrained to reflect the current 3934193240Ssam * operating mode. 3935193240Ssam */ 3936193240Ssam mwl_mapchan(&hchan, chan); 3937193240Ssam mwl_hal_intrset(mh, 0); /* disable interrupts */ 3938193240Ssam#if 0 3939193240Ssam mwl_draintxq(sc); /* clear pending tx frames */ 3940193240Ssam#endif 3941193240Ssam mwl_hal_setchannel(mh, &hchan); 3942193240Ssam /* 3943193240Ssam * Tx power is cap'd by the regulatory setting and 3944193240Ssam * possibly a user-set limit. We pass the min of 3945193240Ssam * these to the hal to apply them to the cal data 3946193240Ssam * for this channel. 3947193240Ssam * XXX min bound? 3948193240Ssam */ 3949193240Ssam maxtxpow = 2*chan->ic_maxregpower; 3950193240Ssam if (maxtxpow > ic->ic_txpowlimit) 3951193240Ssam maxtxpow = ic->ic_txpowlimit; 3952193240Ssam mwl_hal_settxpower(mh, &hchan, maxtxpow / 2); 3953193240Ssam /* NB: potentially change mcast/mgt rates */ 3954193240Ssam mwl_setcurchanrates(sc); 3955193240Ssam 3956193240Ssam /* 3957193240Ssam * Update internal state. 3958193240Ssam */ 3959193240Ssam sc->sc_tx_th.wt_chan_freq = htole16(chan->ic_freq); 3960193240Ssam sc->sc_rx_th.wr_chan_freq = htole16(chan->ic_freq); 3961193240Ssam if (IEEE80211_IS_CHAN_A(chan)) { 3962193240Ssam sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_A); 3963193240Ssam sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_A); 3964193240Ssam } else if (IEEE80211_IS_CHAN_ANYG(chan)) { 3965193240Ssam sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 3966193240Ssam sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 3967193240Ssam } else { 3968193240Ssam sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 3969193240Ssam sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 3970193240Ssam } 3971193240Ssam sc->sc_curchan = hchan; 3972193240Ssam mwl_hal_intrset(mh, sc->sc_imask); 3973193240Ssam 3974193240Ssam return 0; 3975193240Ssam} 3976193240Ssam 3977193240Ssamstatic void 3978193240Ssammwl_scan_start(struct ieee80211com *ic) 3979193240Ssam{ 3980193240Ssam struct ifnet *ifp = ic->ic_ifp; 3981193240Ssam struct mwl_softc *sc = ifp->if_softc; 3982193240Ssam 3983193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__); 3984193240Ssam} 3985193240Ssam 3986193240Ssamstatic void 3987193240Ssammwl_scan_end(struct ieee80211com *ic) 3988193240Ssam{ 3989193240Ssam struct ifnet *ifp = ic->ic_ifp; 3990193240Ssam struct mwl_softc *sc = ifp->if_softc; 3991193240Ssam 3992193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__); 3993193240Ssam} 3994193240Ssam 3995193240Ssamstatic void 3996193240Ssammwl_set_channel(struct ieee80211com *ic) 3997193240Ssam{ 3998193240Ssam struct ifnet *ifp = ic->ic_ifp; 3999193240Ssam struct mwl_softc *sc = ifp->if_softc; 4000193240Ssam 4001193240Ssam (void) mwl_chan_set(sc, ic->ic_curchan); 4002193240Ssam} 4003193240Ssam 4004193240Ssam/* 4005193240Ssam * Handle a channel switch request. We inform the firmware 4006193240Ssam * and mark the global state to suppress various actions. 4007193240Ssam * NB: we issue only one request to the fw; we may be called 4008193240Ssam * multiple times if there are multiple vap's. 4009193240Ssam */ 4010193240Ssamstatic void 4011193240Ssammwl_startcsa(struct ieee80211vap *vap) 4012193240Ssam{ 4013193240Ssam struct ieee80211com *ic = vap->iv_ic; 4014193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 4015193240Ssam MWL_HAL_CHANNEL hchan; 4016193240Ssam 4017193240Ssam if (sc->sc_csapending) 4018193240Ssam return; 4019193240Ssam 4020193240Ssam mwl_mapchan(&hchan, ic->ic_csa_newchan); 4021193240Ssam /* 1 =>'s quiet channel */ 4022193240Ssam mwl_hal_setchannelswitchie(sc->sc_mh, &hchan, 1, ic->ic_csa_count); 4023193240Ssam sc->sc_csapending = 1; 4024193240Ssam} 4025193240Ssam 4026193240Ssam/* 4027193240Ssam * Plumb any static WEP key for the station. This is 4028193240Ssam * necessary as we must propagate the key from the 4029193240Ssam * global key table of the vap to each sta db entry. 4030193240Ssam */ 4031193240Ssamstatic void 4032193240Ssammwl_setanywepkey(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 4033193240Ssam{ 4034193240Ssam if ((vap->iv_flags & (IEEE80211_F_PRIVACY|IEEE80211_F_WPA)) == 4035193240Ssam IEEE80211_F_PRIVACY && 4036193240Ssam vap->iv_def_txkey != IEEE80211_KEYIX_NONE && 4037193240Ssam vap->iv_nw_keys[vap->iv_def_txkey].wk_keyix != IEEE80211_KEYIX_NONE) 4038193240Ssam (void) mwl_key_set(vap, &vap->iv_nw_keys[vap->iv_def_txkey], mac); 4039193240Ssam} 4040193240Ssam 4041193240Ssamstatic int 4042193240Ssammwl_peerstadb(struct ieee80211_node *ni, int aid, int staid, MWL_HAL_PEERINFO *pi) 4043193240Ssam{ 4044193240Ssam#define WME(ie) ((const struct ieee80211_wme_info *) ie) 4045193240Ssam struct ieee80211vap *vap = ni->ni_vap; 4046193240Ssam struct mwl_hal_vap *hvap; 4047193240Ssam int error; 4048193240Ssam 4049193240Ssam if (vap->iv_opmode == IEEE80211_M_WDS) { 4050193240Ssam /* 4051193240Ssam * WDS vap's do not have a f/w vap; instead they piggyback 4052193240Ssam * on an AP vap and we must install the sta db entry and 4053193240Ssam * crypto state using that AP's handle (the WDS vap has none). 4054193240Ssam */ 4055193240Ssam hvap = MWL_VAP(vap)->mv_ap_hvap; 4056193240Ssam } else 4057193240Ssam hvap = MWL_VAP(vap)->mv_hvap; 4058193240Ssam error = mwl_hal_newstation(hvap, ni->ni_macaddr, 4059193240Ssam aid, staid, pi, 4060193240Ssam ni->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT), 4061193240Ssam ni->ni_ies.wme_ie != NULL ? WME(ni->ni_ies.wme_ie)->wme_info : 0); 4062193240Ssam if (error == 0) { 4063193240Ssam /* 4064193240Ssam * Setup security for this station. For sta mode this is 4065193240Ssam * needed even though do the same thing on transition to 4066193240Ssam * AUTH state because the call to mwl_hal_newstation 4067193240Ssam * clobbers the crypto state we setup. 4068193240Ssam */ 4069193240Ssam mwl_setanywepkey(vap, ni->ni_macaddr); 4070193240Ssam } 4071193240Ssam return error; 4072193240Ssam#undef WME 4073193240Ssam} 4074193240Ssam 4075193240Ssamstatic void 4076193240Ssammwl_setglobalkeys(struct ieee80211vap *vap) 4077193240Ssam{ 4078193240Ssam struct ieee80211_key *wk; 4079193240Ssam 4080193240Ssam wk = &vap->iv_nw_keys[0]; 4081193240Ssam for (; wk < &vap->iv_nw_keys[IEEE80211_WEP_NKID]; wk++) 4082193240Ssam if (wk->wk_keyix != IEEE80211_KEYIX_NONE) 4083193240Ssam (void) mwl_key_set(vap, wk, vap->iv_myaddr); 4084193240Ssam} 4085193240Ssam 4086193240Ssam/* 4087195171Ssam * Convert a legacy rate set to a firmware bitmask. 4088195171Ssam */ 4089195171Ssamstatic uint32_t 4090195171Ssamget_rate_bitmap(const struct ieee80211_rateset *rs) 4091195171Ssam{ 4092195171Ssam uint32_t rates; 4093195171Ssam int i; 4094195171Ssam 4095195171Ssam rates = 0; 4096195171Ssam for (i = 0; i < rs->rs_nrates; i++) 4097195171Ssam switch (rs->rs_rates[i] & IEEE80211_RATE_VAL) { 4098195171Ssam case 2: rates |= 0x001; break; 4099195171Ssam case 4: rates |= 0x002; break; 4100195171Ssam case 11: rates |= 0x004; break; 4101195171Ssam case 22: rates |= 0x008; break; 4102195171Ssam case 44: rates |= 0x010; break; 4103195171Ssam case 12: rates |= 0x020; break; 4104195171Ssam case 18: rates |= 0x040; break; 4105195171Ssam case 24: rates |= 0x080; break; 4106195171Ssam case 36: rates |= 0x100; break; 4107195171Ssam case 48: rates |= 0x200; break; 4108195171Ssam case 72: rates |= 0x400; break; 4109195171Ssam case 96: rates |= 0x800; break; 4110195171Ssam case 108: rates |= 0x1000; break; 4111195171Ssam } 4112195171Ssam return rates; 4113195171Ssam} 4114195171Ssam 4115195171Ssam/* 4116195171Ssam * Construct an HT firmware bitmask from an HT rate set. 4117195171Ssam */ 4118195171Ssamstatic uint32_t 4119195171Ssamget_htrate_bitmap(const struct ieee80211_htrateset *rs) 4120195171Ssam{ 4121195171Ssam uint32_t rates; 4122195171Ssam int i; 4123195171Ssam 4124195171Ssam rates = 0; 4125195171Ssam for (i = 0; i < rs->rs_nrates; i++) { 4126195171Ssam if (rs->rs_rates[i] < 16) 4127195171Ssam rates |= 1<<rs->rs_rates[i]; 4128195171Ssam } 4129195171Ssam return rates; 4130195171Ssam} 4131195171Ssam 4132195171Ssam/* 4133195171Ssam * Craft station database entry for station. 4134195171Ssam * NB: use host byte order here, the hal handles byte swapping. 4135195171Ssam */ 4136195171Ssamstatic MWL_HAL_PEERINFO * 4137195171Ssammkpeerinfo(MWL_HAL_PEERINFO *pi, const struct ieee80211_node *ni) 4138195171Ssam{ 4139195171Ssam const struct ieee80211vap *vap = ni->ni_vap; 4140195171Ssam 4141195171Ssam memset(pi, 0, sizeof(*pi)); 4142195171Ssam pi->LegacyRateBitMap = get_rate_bitmap(&ni->ni_rates); 4143195171Ssam pi->CapInfo = ni->ni_capinfo; 4144195171Ssam if (ni->ni_flags & IEEE80211_NODE_HT) { 4145195171Ssam /* HT capabilities, etc */ 4146195171Ssam pi->HTCapabilitiesInfo = ni->ni_htcap; 4147195171Ssam /* XXX pi.HTCapabilitiesInfo */ 4148195171Ssam pi->MacHTParamInfo = ni->ni_htparam; 4149195171Ssam pi->HTRateBitMap = get_htrate_bitmap(&ni->ni_htrates); 4150195171Ssam pi->AddHtInfo.ControlChan = ni->ni_htctlchan; 4151195171Ssam pi->AddHtInfo.AddChan = ni->ni_ht2ndchan; 4152195171Ssam pi->AddHtInfo.OpMode = ni->ni_htopmode; 4153195171Ssam pi->AddHtInfo.stbc = ni->ni_htstbc; 4154195171Ssam 4155195171Ssam /* constrain according to local configuration */ 4156195171Ssam if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI40) == 0) 4157195171Ssam pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI40; 4158195171Ssam if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI20) == 0) 4159195171Ssam pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI20; 4160195171Ssam if (ni->ni_chw != 40) 4161195171Ssam pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_CHWIDTH40; 4162195171Ssam } 4163195171Ssam return pi; 4164195171Ssam} 4165195171Ssam 4166195171Ssam/* 4167193240Ssam * Re-create the local sta db entry for a vap to ensure 4168193240Ssam * up to date WME state is pushed to the firmware. Because 4169193240Ssam * this resets crypto state this must be followed by a 4170193240Ssam * reload of any keys in the global key table. 4171193240Ssam */ 4172193240Ssamstatic int 4173193240Ssammwl_localstadb(struct ieee80211vap *vap) 4174193240Ssam{ 4175193240Ssam#define WME(ie) ((const struct ieee80211_wme_info *) ie) 4176193240Ssam struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap; 4177193240Ssam struct ieee80211_node *bss; 4178195171Ssam MWL_HAL_PEERINFO pi; 4179193240Ssam int error; 4180193240Ssam 4181193240Ssam switch (vap->iv_opmode) { 4182193240Ssam case IEEE80211_M_STA: 4183193240Ssam bss = vap->iv_bss; 4184195171Ssam error = mwl_hal_newstation(hvap, vap->iv_myaddr, 0, 0, 4185195171Ssam vap->iv_state == IEEE80211_S_RUN ? 4186195171Ssam mkpeerinfo(&pi, bss) : NULL, 4187195171Ssam (bss->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT)), 4188193240Ssam bss->ni_ies.wme_ie != NULL ? 4189193240Ssam WME(bss->ni_ies.wme_ie)->wme_info : 0); 4190193240Ssam if (error == 0) 4191193240Ssam mwl_setglobalkeys(vap); 4192193240Ssam break; 4193193240Ssam case IEEE80211_M_HOSTAP: 4194195618Srpaulo case IEEE80211_M_MBSS: 4195193240Ssam error = mwl_hal_newstation(hvap, vap->iv_myaddr, 4196193240Ssam 0, 0, NULL, vap->iv_flags & IEEE80211_F_WME, 0); 4197193240Ssam if (error == 0) 4198193240Ssam mwl_setglobalkeys(vap); 4199193240Ssam break; 4200193240Ssam default: 4201193240Ssam error = 0; 4202193240Ssam break; 4203193240Ssam } 4204193240Ssam return error; 4205193240Ssam#undef WME 4206193240Ssam} 4207193240Ssam 4208193240Ssamstatic int 4209193240Ssammwl_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 4210193240Ssam{ 4211193240Ssam struct mwl_vap *mvp = MWL_VAP(vap); 4212193240Ssam struct mwl_hal_vap *hvap = mvp->mv_hvap; 4213193240Ssam struct ieee80211com *ic = vap->iv_ic; 4214193240Ssam struct ieee80211_node *ni = NULL; 4215193240Ssam struct ifnet *ifp = ic->ic_ifp; 4216193240Ssam struct mwl_softc *sc = ifp->if_softc; 4217193240Ssam struct mwl_hal *mh = sc->sc_mh; 4218193240Ssam enum ieee80211_state ostate = vap->iv_state; 4219193240Ssam int error; 4220193240Ssam 4221193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: %s -> %s\n", 4222193240Ssam vap->iv_ifp->if_xname, __func__, 4223193240Ssam ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 4224193240Ssam 4225193240Ssam callout_stop(&sc->sc_timer); 4226193240Ssam /* 4227193240Ssam * Clear current radar detection state. 4228193240Ssam */ 4229193240Ssam if (ostate == IEEE80211_S_CAC) { 4230193240Ssam /* stop quiet mode radar detection */ 4231193240Ssam mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_STOP); 4232193240Ssam } else if (sc->sc_radarena) { 4233193240Ssam /* stop in-service radar detection */ 4234193240Ssam mwl_hal_setradardetection(mh, DR_DFS_DISABLE); 4235193240Ssam sc->sc_radarena = 0; 4236193240Ssam } 4237193240Ssam /* 4238193240Ssam * Carry out per-state actions before doing net80211 work. 4239193240Ssam */ 4240193240Ssam if (nstate == IEEE80211_S_INIT) { 4241193240Ssam /* NB: only ap+sta vap's have a fw entity */ 4242193240Ssam if (hvap != NULL) 4243193240Ssam mwl_hal_stop(hvap); 4244193240Ssam } else if (nstate == IEEE80211_S_SCAN) { 4245193240Ssam mwl_hal_start(hvap); 4246193240Ssam /* NB: this disables beacon frames */ 4247193240Ssam mwl_hal_setinframode(hvap); 4248193240Ssam } else if (nstate == IEEE80211_S_AUTH) { 4249193240Ssam /* 4250193240Ssam * Must create a sta db entry in case a WEP key needs to 4251193240Ssam * be plumbed. This entry will be overwritten if we 4252193240Ssam * associate; otherwise it will be reclaimed on node free. 4253193240Ssam */ 4254193240Ssam ni = vap->iv_bss; 4255193240Ssam MWL_NODE(ni)->mn_hvap = hvap; 4256193240Ssam (void) mwl_peerstadb(ni, 0, 0, NULL); 4257193240Ssam } else if (nstate == IEEE80211_S_CSA) { 4258193240Ssam /* XXX move to below? */ 4259195618Srpaulo if (vap->iv_opmode == IEEE80211_M_HOSTAP || 4260195618Srpaulo vap->iv_opmode == IEEE80211_M_MBSS) 4261193240Ssam mwl_startcsa(vap); 4262193240Ssam } else if (nstate == IEEE80211_S_CAC) { 4263193240Ssam /* XXX move to below? */ 4264193240Ssam /* stop ap xmit and enable quiet mode radar detection */ 4265193240Ssam mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_START); 4266193240Ssam } 4267193240Ssam 4268193240Ssam /* 4269193240Ssam * Invoke the parent method to do net80211 work. 4270193240Ssam */ 4271193240Ssam error = mvp->mv_newstate(vap, nstate, arg); 4272193240Ssam 4273193240Ssam /* 4274193240Ssam * Carry out work that must be done after net80211 runs; 4275193240Ssam * this work requires up to date state (e.g. iv_bss). 4276193240Ssam */ 4277193240Ssam if (error == 0 && nstate == IEEE80211_S_RUN) { 4278193240Ssam /* NB: collect bss node again, it may have changed */ 4279193240Ssam ni = vap->iv_bss; 4280193240Ssam 4281193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, 4282193240Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 4283193240Ssam "capinfo 0x%04x chan %d\n", 4284193240Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 4285193240Ssam ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 4286193240Ssam ieee80211_chan2ieee(ic, ic->ic_curchan)); 4287193240Ssam 4288193240Ssam /* 4289195171Ssam * Recreate local sta db entry to update WME/HT state. 4290193240Ssam */ 4291193240Ssam mwl_localstadb(vap); 4292193240Ssam switch (vap->iv_opmode) { 4293193240Ssam case IEEE80211_M_HOSTAP: 4294195618Srpaulo case IEEE80211_M_MBSS: 4295193240Ssam if (ostate == IEEE80211_S_CAC) { 4296193240Ssam /* enable in-service radar detection */ 4297193240Ssam mwl_hal_setradardetection(mh, 4298193240Ssam DR_IN_SERVICE_MONITOR_START); 4299193240Ssam sc->sc_radarena = 1; 4300193240Ssam } 4301193240Ssam /* 4302193240Ssam * Allocate and setup the beacon frame 4303193240Ssam * (and related state). 4304193240Ssam */ 4305193240Ssam error = mwl_reset_vap(vap, IEEE80211_S_RUN); 4306193240Ssam if (error != 0) { 4307193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, 4308193240Ssam "%s: beacon setup failed, error %d\n", 4309193240Ssam __func__, error); 4310193240Ssam goto bad; 4311193240Ssam } 4312193240Ssam /* NB: must be after setting up beacon */ 4313193240Ssam mwl_hal_start(hvap); 4314193240Ssam break; 4315193240Ssam case IEEE80211_M_STA: 4316193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: aid 0x%x\n", 4317193240Ssam vap->iv_ifp->if_xname, __func__, ni->ni_associd); 4318193240Ssam /* 4319193240Ssam * Set state now that we're associated. 4320193240Ssam */ 4321193240Ssam mwl_hal_setassocid(hvap, ni->ni_bssid, ni->ni_associd); 4322193240Ssam mwl_setrates(vap); 4323193240Ssam mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold); 4324195171Ssam if ((vap->iv_flags & IEEE80211_F_DWDS) && 4325195171Ssam sc->sc_ndwdsvaps++ == 0) 4326195171Ssam mwl_hal_setdwds(mh, 1); 4327193240Ssam break; 4328193240Ssam case IEEE80211_M_WDS: 4329193240Ssam DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: bssid %s\n", 4330193240Ssam vap->iv_ifp->if_xname, __func__, 4331193240Ssam ether_sprintf(ni->ni_bssid)); 4332193240Ssam mwl_seteapolformat(vap); 4333193240Ssam break; 4334193240Ssam default: 4335193240Ssam break; 4336193240Ssam } 4337193240Ssam /* 4338193240Ssam * Set CS mode according to operating channel; 4339193240Ssam * this mostly an optimization for 5GHz. 4340193240Ssam * 4341193240Ssam * NB: must follow mwl_hal_start which resets csmode 4342193240Ssam */ 4343193240Ssam if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) 4344193240Ssam mwl_hal_setcsmode(mh, CSMODE_AGGRESSIVE); 4345193240Ssam else 4346193240Ssam mwl_hal_setcsmode(mh, CSMODE_AUTO_ENA); 4347193240Ssam /* 4348193240Ssam * Start timer to prod firmware. 4349193240Ssam */ 4350193240Ssam if (sc->sc_ageinterval != 0) 4351193240Ssam callout_reset(&sc->sc_timer, sc->sc_ageinterval*hz, 4352193240Ssam mwl_agestations, sc); 4353193240Ssam } else if (nstate == IEEE80211_S_SLEEP) { 4354193240Ssam /* XXX set chip in power save */ 4355195171Ssam } else if ((vap->iv_flags & IEEE80211_F_DWDS) && 4356195171Ssam --sc->sc_ndwdsvaps == 0) 4357195171Ssam mwl_hal_setdwds(mh, 0); 4358193240Ssambad: 4359193240Ssam return error; 4360193240Ssam} 4361193240Ssam 4362193240Ssam/* 4363193240Ssam * Manage station id's; these are separate from AID's 4364193240Ssam * as AID's may have values out of the range of possible 4365193240Ssam * station id's acceptable to the firmware. 4366193240Ssam */ 4367193240Ssamstatic int 4368193240Ssamallocstaid(struct mwl_softc *sc, int aid) 4369193240Ssam{ 4370193240Ssam int staid; 4371193240Ssam 4372193240Ssam if (!(0 < aid && aid < MWL_MAXSTAID) || isset(sc->sc_staid, aid)) { 4373193240Ssam /* NB: don't use 0 */ 4374193240Ssam for (staid = 1; staid < MWL_MAXSTAID; staid++) 4375193240Ssam if (isclr(sc->sc_staid, staid)) 4376193240Ssam break; 4377193240Ssam } else 4378193240Ssam staid = aid; 4379193240Ssam setbit(sc->sc_staid, staid); 4380193240Ssam return staid; 4381193240Ssam} 4382193240Ssam 4383193240Ssamstatic void 4384193240Ssamdelstaid(struct mwl_softc *sc, int staid) 4385193240Ssam{ 4386193240Ssam clrbit(sc->sc_staid, staid); 4387193240Ssam} 4388193240Ssam 4389193240Ssam/* 4390193240Ssam * Setup driver-specific state for a newly associated node. 4391193240Ssam * Note that we're called also on a re-associate, the isnew 4392193240Ssam * param tells us if this is the first time or not. 4393193240Ssam */ 4394193240Ssamstatic void 4395193240Ssammwl_newassoc(struct ieee80211_node *ni, int isnew) 4396193240Ssam{ 4397193240Ssam struct ieee80211vap *vap = ni->ni_vap; 4398193240Ssam struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc; 4399193240Ssam struct mwl_node *mn = MWL_NODE(ni); 4400193240Ssam MWL_HAL_PEERINFO pi; 4401193240Ssam uint16_t aid; 4402193240Ssam int error; 4403193240Ssam 4404193240Ssam aid = IEEE80211_AID(ni->ni_associd); 4405193240Ssam if (isnew) { 4406193240Ssam mn->mn_staid = allocstaid(sc, aid); 4407193240Ssam mn->mn_hvap = MWL_VAP(vap)->mv_hvap; 4408193240Ssam } else { 4409193240Ssam mn = MWL_NODE(ni); 4410193240Ssam /* XXX reset BA stream? */ 4411193240Ssam } 4412193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, "%s: mac %s isnew %d aid %d staid %d\n", 4413193240Ssam __func__, ether_sprintf(ni->ni_macaddr), isnew, aid, mn->mn_staid); 4414195171Ssam error = mwl_peerstadb(ni, aid, mn->mn_staid, mkpeerinfo(&pi, ni)); 4415193240Ssam if (error != 0) { 4416193240Ssam DPRINTF(sc, MWL_DEBUG_NODE, 4417193240Ssam "%s: error %d creating sta db entry\n", 4418193240Ssam __func__, error); 4419193240Ssam /* XXX how to deal with error? */ 4420193240Ssam } 4421193240Ssam} 4422193240Ssam 4423193240Ssam/* 4424193240Ssam * Periodically poke the firmware to age out station state 4425193240Ssam * (power save queues, pending tx aggregates). 4426193240Ssam */ 4427193240Ssamstatic void 4428193240Ssammwl_agestations(void *arg) 4429193240Ssam{ 4430193240Ssam struct mwl_softc *sc = arg; 4431193240Ssam 4432193240Ssam mwl_hal_setkeepalive(sc->sc_mh); 4433193240Ssam if (sc->sc_ageinterval != 0) /* NB: catch dynamic changes */ 4434195171Ssam callout_schedule(&sc->sc_timer, sc->sc_ageinterval*hz); 4435193240Ssam} 4436193240Ssam 4437193240Ssamstatic const struct mwl_hal_channel * 4438193240Ssamfindhalchannel(const MWL_HAL_CHANNELINFO *ci, int ieee) 4439193240Ssam{ 4440193240Ssam int i; 4441193240Ssam 4442193240Ssam for (i = 0; i < ci->nchannels; i++) { 4443193240Ssam const struct mwl_hal_channel *hc = &ci->channels[i]; 4444193240Ssam if (hc->ieee == ieee) 4445193240Ssam return hc; 4446193240Ssam } 4447193240Ssam return NULL; 4448193240Ssam} 4449193240Ssam 4450193240Ssamstatic int 4451193240Ssammwl_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd, 4452193240Ssam int nchan, struct ieee80211_channel chans[]) 4453193240Ssam{ 4454193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 4455193240Ssam struct mwl_hal *mh = sc->sc_mh; 4456193240Ssam const MWL_HAL_CHANNELINFO *ci; 4457193240Ssam int i; 4458193240Ssam 4459193240Ssam for (i = 0; i < nchan; i++) { 4460193240Ssam struct ieee80211_channel *c = &chans[i]; 4461193240Ssam const struct mwl_hal_channel *hc; 4462193240Ssam 4463193240Ssam if (IEEE80211_IS_CHAN_2GHZ(c)) { 4464193240Ssam mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_2DOT4GHZ, 4465193240Ssam IEEE80211_IS_CHAN_HT40(c) ? 4466193240Ssam MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci); 4467193240Ssam } else if (IEEE80211_IS_CHAN_5GHZ(c)) { 4468193240Ssam mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_5GHZ, 4469193240Ssam IEEE80211_IS_CHAN_HT40(c) ? 4470193240Ssam MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci); 4471193240Ssam } else { 4472193240Ssam if_printf(ic->ic_ifp, 4473193240Ssam "%s: channel %u freq %u/0x%x not 2.4/5GHz\n", 4474193240Ssam __func__, c->ic_ieee, c->ic_freq, c->ic_flags); 4475193240Ssam return EINVAL; 4476193240Ssam } 4477193240Ssam /* 4478193240Ssam * Verify channel has cal data and cap tx power. 4479193240Ssam */ 4480193240Ssam hc = findhalchannel(ci, c->ic_ieee); 4481193240Ssam if (hc != NULL) { 4482193240Ssam if (c->ic_maxpower > 2*hc->maxTxPow) 4483193240Ssam c->ic_maxpower = 2*hc->maxTxPow; 4484193240Ssam goto next; 4485193240Ssam } 4486193240Ssam if (IEEE80211_IS_CHAN_HT40(c)) { 4487193240Ssam /* 4488193240Ssam * Look for the extension channel since the 4489193240Ssam * hal table only has the primary channel. 4490193240Ssam */ 4491193240Ssam hc = findhalchannel(ci, c->ic_extieee); 4492193240Ssam if (hc != NULL) { 4493193240Ssam if (c->ic_maxpower > 2*hc->maxTxPow) 4494193240Ssam c->ic_maxpower = 2*hc->maxTxPow; 4495193240Ssam goto next; 4496193240Ssam } 4497193240Ssam } 4498193240Ssam if_printf(ic->ic_ifp, 4499193240Ssam "%s: no cal data for channel %u ext %u freq %u/0x%x\n", 4500193240Ssam __func__, c->ic_ieee, c->ic_extieee, 4501193240Ssam c->ic_freq, c->ic_flags); 4502193240Ssam return EINVAL; 4503193240Ssam next: 4504193240Ssam ; 4505193240Ssam } 4506193240Ssam return 0; 4507193240Ssam} 4508193240Ssam 4509193240Ssam#define IEEE80211_CHAN_HTG (IEEE80211_CHAN_HT|IEEE80211_CHAN_G) 4510193240Ssam#define IEEE80211_CHAN_HTA (IEEE80211_CHAN_HT|IEEE80211_CHAN_A) 4511193240Ssam 4512193240Ssamstatic void 4513193240Ssamaddchan(struct ieee80211_channel *c, int freq, int flags, int ieee, int txpow) 4514193240Ssam{ 4515193240Ssam c->ic_freq = freq; 4516193240Ssam c->ic_flags = flags; 4517193240Ssam c->ic_ieee = ieee; 4518193240Ssam c->ic_minpower = 0; 4519193240Ssam c->ic_maxpower = 2*txpow; 4520193240Ssam c->ic_maxregpower = txpow; 4521193240Ssam} 4522193240Ssam 4523193240Ssamstatic const struct ieee80211_channel * 4524193240Ssamfindchannel(const struct ieee80211_channel chans[], int nchans, 4525193240Ssam int freq, int flags) 4526193240Ssam{ 4527193240Ssam const struct ieee80211_channel *c; 4528193240Ssam int i; 4529193240Ssam 4530193240Ssam for (i = 0; i < nchans; i++) { 4531193240Ssam c = &chans[i]; 4532193240Ssam if (c->ic_freq == freq && c->ic_flags == flags) 4533193240Ssam return c; 4534193240Ssam } 4535193240Ssam return NULL; 4536193240Ssam} 4537193240Ssam 4538193240Ssamstatic void 4539193240Ssamaddht40channels(struct ieee80211_channel chans[], int maxchans, int *nchans, 4540193240Ssam const MWL_HAL_CHANNELINFO *ci, int flags) 4541193240Ssam{ 4542193240Ssam struct ieee80211_channel *c; 4543193240Ssam const struct ieee80211_channel *extc; 4544193240Ssam const struct mwl_hal_channel *hc; 4545193240Ssam int i; 4546193240Ssam 4547193240Ssam c = &chans[*nchans]; 4548193240Ssam 4549193240Ssam flags &= ~IEEE80211_CHAN_HT; 4550193240Ssam for (i = 0; i < ci->nchannels; i++) { 4551193240Ssam /* 4552193240Ssam * Each entry defines an HT40 channel pair; find the 4553193240Ssam * extension channel above and the insert the pair. 4554193240Ssam */ 4555193240Ssam hc = &ci->channels[i]; 4556193240Ssam extc = findchannel(chans, *nchans, hc->freq+20, 4557193240Ssam flags | IEEE80211_CHAN_HT20); 4558193240Ssam if (extc != NULL) { 4559193240Ssam if (*nchans >= maxchans) 4560193240Ssam break; 4561193240Ssam addchan(c, hc->freq, flags | IEEE80211_CHAN_HT40U, 4562193240Ssam hc->ieee, hc->maxTxPow); 4563193240Ssam c->ic_extieee = extc->ic_ieee; 4564193240Ssam c++, (*nchans)++; 4565193240Ssam if (*nchans >= maxchans) 4566193240Ssam break; 4567193240Ssam addchan(c, extc->ic_freq, flags | IEEE80211_CHAN_HT40D, 4568193240Ssam extc->ic_ieee, hc->maxTxPow); 4569193240Ssam c->ic_extieee = hc->ieee; 4570193240Ssam c++, (*nchans)++; 4571193240Ssam } 4572193240Ssam } 4573193240Ssam} 4574193240Ssam 4575193240Ssamstatic void 4576193240Ssamaddchannels(struct ieee80211_channel chans[], int maxchans, int *nchans, 4577193240Ssam const MWL_HAL_CHANNELINFO *ci, int flags) 4578193240Ssam{ 4579193240Ssam struct ieee80211_channel *c; 4580193240Ssam int i; 4581193240Ssam 4582193240Ssam c = &chans[*nchans]; 4583193240Ssam 4584193240Ssam for (i = 0; i < ci->nchannels; i++) { 4585193240Ssam const struct mwl_hal_channel *hc; 4586193240Ssam 4587193240Ssam hc = &ci->channels[i]; 4588193240Ssam if (*nchans >= maxchans) 4589193240Ssam break; 4590193240Ssam addchan(c, hc->freq, flags, hc->ieee, hc->maxTxPow); 4591193240Ssam c++, (*nchans)++; 4592193240Ssam if (flags == IEEE80211_CHAN_G || flags == IEEE80211_CHAN_HTG) { 4593193240Ssam /* g channel have a separate b-only entry */ 4594193240Ssam if (*nchans >= maxchans) 4595193240Ssam break; 4596193240Ssam c[0] = c[-1]; 4597193240Ssam c[-1].ic_flags = IEEE80211_CHAN_B; 4598193240Ssam c++, (*nchans)++; 4599193240Ssam } 4600193240Ssam if (flags == IEEE80211_CHAN_HTG) { 4601193240Ssam /* HT g channel have a separate g-only entry */ 4602193240Ssam if (*nchans >= maxchans) 4603193240Ssam break; 4604193240Ssam c[-1].ic_flags = IEEE80211_CHAN_G; 4605193240Ssam c[0] = c[-1]; 4606193240Ssam c[0].ic_flags &= ~IEEE80211_CHAN_HT; 4607193240Ssam c[0].ic_flags |= IEEE80211_CHAN_HT20; /* HT20 */ 4608193240Ssam c++, (*nchans)++; 4609193240Ssam } 4610193240Ssam if (flags == IEEE80211_CHAN_HTA) { 4611193240Ssam /* HT a channel have a separate a-only entry */ 4612193240Ssam if (*nchans >= maxchans) 4613193240Ssam break; 4614193240Ssam c[-1].ic_flags = IEEE80211_CHAN_A; 4615193240Ssam c[0] = c[-1]; 4616193240Ssam c[0].ic_flags &= ~IEEE80211_CHAN_HT; 4617193240Ssam c[0].ic_flags |= IEEE80211_CHAN_HT20; /* HT20 */ 4618193240Ssam c++, (*nchans)++; 4619193240Ssam } 4620193240Ssam } 4621193240Ssam} 4622193240Ssam 4623193240Ssamstatic void 4624193240Ssamgetchannels(struct mwl_softc *sc, int maxchans, int *nchans, 4625193240Ssam struct ieee80211_channel chans[]) 4626193240Ssam{ 4627193240Ssam const MWL_HAL_CHANNELINFO *ci; 4628193240Ssam 4629193240Ssam /* 4630193240Ssam * Use the channel info from the hal to craft the 4631193240Ssam * channel list. Note that we pass back an unsorted 4632193240Ssam * list; the caller is required to sort it for us 4633193240Ssam * (if desired). 4634193240Ssam */ 4635193240Ssam *nchans = 0; 4636193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4637193240Ssam MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0) 4638193240Ssam addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG); 4639193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4640193240Ssam MWL_FREQ_BAND_5GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0) 4641193240Ssam addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA); 4642193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4643193240Ssam MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0) 4644193240Ssam addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG); 4645193240Ssam if (mwl_hal_getchannelinfo(sc->sc_mh, 4646193240Ssam MWL_FREQ_BAND_5GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0) 4647193240Ssam addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA); 4648193240Ssam} 4649193240Ssam 4650193240Ssamstatic void 4651193240Ssammwl_getradiocaps(struct ieee80211com *ic, 4652193240Ssam int maxchans, int *nchans, struct ieee80211_channel chans[]) 4653193240Ssam{ 4654193240Ssam struct mwl_softc *sc = ic->ic_ifp->if_softc; 4655193240Ssam 4656193240Ssam getchannels(sc, maxchans, nchans, chans); 4657193240Ssam} 4658193240Ssam 4659193240Ssamstatic int 4660193240Ssammwl_getchannels(struct mwl_softc *sc) 4661193240Ssam{ 4662193240Ssam struct ifnet *ifp = sc->sc_ifp; 4663193240Ssam struct ieee80211com *ic = ifp->if_l2com; 4664193240Ssam 4665193240Ssam /* 4666193240Ssam * Use the channel info from the hal to craft the 4667193240Ssam * channel list for net80211. Note that we pass up 4668193240Ssam * an unsorted list; net80211 will sort it for us. 4669193240Ssam */ 4670193240Ssam memset(ic->ic_channels, 0, sizeof(ic->ic_channels)); 4671193240Ssam ic->ic_nchans = 0; 4672193240Ssam getchannels(sc, IEEE80211_CHAN_MAX, &ic->ic_nchans, ic->ic_channels); 4673193240Ssam 4674193240Ssam ic->ic_regdomain.regdomain = SKU_DEBUG; 4675193240Ssam ic->ic_regdomain.country = CTRY_DEFAULT; 4676193240Ssam ic->ic_regdomain.location = 'I'; 4677193240Ssam ic->ic_regdomain.isocc[0] = ' '; /* XXX? */ 4678193240Ssam ic->ic_regdomain.isocc[1] = ' '; 4679193240Ssam return (ic->ic_nchans == 0 ? EIO : 0); 4680193240Ssam} 4681193240Ssam#undef IEEE80211_CHAN_HTA 4682193240Ssam#undef IEEE80211_CHAN_HTG 4683193240Ssam 4684193240Ssam#ifdef MWL_DEBUG 4685193240Ssamstatic void 4686193240Ssammwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix) 4687193240Ssam{ 4688193240Ssam const struct mwl_rxdesc *ds = bf->bf_desc; 4689193240Ssam uint32_t status = le32toh(ds->Status); 4690193240Ssam 4691193240Ssam printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 4692193240Ssam " STAT:%02x LEN:%04x RSSI:%02x CHAN:%02x RATE:%02x QOS:%04x HT:%04x\n", 4693193240Ssam ix, ds, (const struct mwl_desc *)bf->bf_daddr, 4694193240Ssam le32toh(ds->pPhysNext), le32toh(ds->pPhysBuffData), 4695193240Ssam ds->RxControl, 4696193240Ssam ds->RxControl != EAGLE_RXD_CTRL_DRIVER_OWN ? 4697193240Ssam "" : (status & EAGLE_RXD_STATUS_OK) ? " *" : " !", 4698193240Ssam ds->Status, le16toh(ds->PktLen), ds->RSSI, ds->Channel, 4699193240Ssam ds->Rate, le16toh(ds->QosCtrl), le16toh(ds->HtSig2)); 4700193240Ssam} 4701193240Ssam 4702193240Ssamstatic void 4703193240Ssammwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix) 4704193240Ssam{ 4705193240Ssam const struct mwl_txdesc *ds = bf->bf_desc; 4706193240Ssam uint32_t status = le32toh(ds->Status); 4707193240Ssam 4708193240Ssam printf("Q%u[%3u]", qnum, ix); 4709193240Ssam printf(" (DS.V:%p DS.P:%p)\n", 4710193240Ssam ds, (const struct mwl_txdesc *)bf->bf_daddr); 4711193240Ssam printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 4712193240Ssam le32toh(ds->pPhysNext), 4713193240Ssam le32toh(ds->PktPtr), le16toh(ds->PktLen), status, 4714193240Ssam status & EAGLE_TXD_STATUS_USED ? 4715193240Ssam "" : (status & 3) != 0 ? " *" : " !"); 4716193240Ssam printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 4717193240Ssam ds->DataRate, ds->TxPriority, le16toh(ds->QosCtrl), 4718193240Ssam le32toh(ds->SapPktInfo), le16toh(ds->Format)); 4719193240Ssam#if MWL_TXDESC > 1 4720193240Ssam printf(" MULTIFRAMES:%u LEN:%04x %04x %04x %04x %04x %04x\n" 4721193240Ssam , le32toh(ds->multiframes) 4722193240Ssam , le16toh(ds->PktLenArray[0]), le16toh(ds->PktLenArray[1]) 4723193240Ssam , le16toh(ds->PktLenArray[2]), le16toh(ds->PktLenArray[3]) 4724193240Ssam , le16toh(ds->PktLenArray[4]), le16toh(ds->PktLenArray[5]) 4725193240Ssam ); 4726193240Ssam printf(" DATA:%08x %08x %08x %08x %08x %08x\n" 4727193240Ssam , le32toh(ds->PktPtrArray[0]), le32toh(ds->PktPtrArray[1]) 4728193240Ssam , le32toh(ds->PktPtrArray[2]), le32toh(ds->PktPtrArray[3]) 4729193240Ssam , le32toh(ds->PktPtrArray[4]), le32toh(ds->PktPtrArray[5]) 4730193240Ssam ); 4731193240Ssam#endif 4732193240Ssam#if 0 4733193240Ssam{ const uint8_t *cp = (const uint8_t *) ds; 4734193240Ssam int i; 4735193240Ssam for (i = 0; i < sizeof(struct mwl_txdesc); i++) { 4736193240Ssam printf("%02x ", cp[i]); 4737193240Ssam if (((i+1) % 16) == 0) 4738193240Ssam printf("\n"); 4739193240Ssam } 4740193240Ssam printf("\n"); 4741193240Ssam} 4742193240Ssam#endif 4743193240Ssam} 4744193240Ssam#endif /* MWL_DEBUG */ 4745193240Ssam 4746193240Ssam#if 0 4747193240Ssamstatic void 4748193240Ssammwl_txq_dump(struct mwl_txq *txq) 4749193240Ssam{ 4750193240Ssam struct mwl_txbuf *bf; 4751193240Ssam int i = 0; 4752193240Ssam 4753193240Ssam MWL_TXQ_LOCK(txq); 4754193240Ssam STAILQ_FOREACH(bf, &txq->active, bf_list) { 4755193240Ssam struct mwl_txdesc *ds = bf->bf_desc; 4756193240Ssam MWL_TXDESC_SYNC(txq, ds, 4757193240Ssam BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 4758193240Ssam#ifdef MWL_DEBUG 4759193240Ssam mwl_printtxbuf(bf, txq->qnum, i); 4760193240Ssam#endif 4761193240Ssam i++; 4762193240Ssam } 4763193240Ssam MWL_TXQ_UNLOCK(txq); 4764193240Ssam} 4765193240Ssam#endif 4766193240Ssam 4767193240Ssamstatic void 4768199559Sjhbmwl_watchdog(void *arg) 4769193240Ssam{ 4770199559Sjhb struct mwl_softc *sc; 4771199559Sjhb struct ifnet *ifp; 4772193240Ssam 4773199559Sjhb sc = arg; 4774199559Sjhb callout_reset(&sc->sc_watchdog, hz, mwl_watchdog, sc); 4775199559Sjhb if (sc->sc_tx_timer == 0 || --sc->sc_tx_timer > 0) 4776199559Sjhb return; 4777199559Sjhb 4778199559Sjhb ifp = sc->sc_ifp; 4779193240Ssam if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->sc_invalid) { 4780193240Ssam if (mwl_hal_setkeepalive(sc->sc_mh)) 4781193240Ssam if_printf(ifp, "transmit timeout (firmware hung?)\n"); 4782193240Ssam else 4783193240Ssam if_printf(ifp, "transmit timeout\n"); 4784193240Ssam#if 0 4785193240Ssam mwl_reset(ifp); 4786193240Ssammwl_txq_dump(&sc->sc_txq[0]);/*XXX*/ 4787193240Ssam#endif 4788193240Ssam ifp->if_oerrors++; 4789193240Ssam sc->sc_stats.mst_watchdog++; 4790193240Ssam } 4791193240Ssam} 4792193240Ssam 4793193240Ssam#ifdef MWL_DIAGAPI 4794193240Ssam/* 4795193240Ssam * Diagnostic interface to the HAL. This is used by various 4796193240Ssam * tools to do things like retrieve register contents for 4797193240Ssam * debugging. The mechanism is intentionally opaque so that 4798193240Ssam * it can change frequently w/o concern for compatiblity. 4799193240Ssam */ 4800193240Ssamstatic int 4801193240Ssammwl_ioctl_diag(struct mwl_softc *sc, struct mwl_diag *md) 4802193240Ssam{ 4803193240Ssam struct mwl_hal *mh = sc->sc_mh; 4804193240Ssam u_int id = md->md_id & MWL_DIAG_ID; 4805193240Ssam void *indata = NULL; 4806193240Ssam void *outdata = NULL; 4807193240Ssam u_int32_t insize = md->md_in_size; 4808193240Ssam u_int32_t outsize = md->md_out_size; 4809193240Ssam int error = 0; 4810193240Ssam 4811193240Ssam if (md->md_id & MWL_DIAG_IN) { 4812193240Ssam /* 4813193240Ssam * Copy in data. 4814193240Ssam */ 4815193240Ssam indata = malloc(insize, M_TEMP, M_NOWAIT); 4816193240Ssam if (indata == NULL) { 4817193240Ssam error = ENOMEM; 4818193240Ssam goto bad; 4819193240Ssam } 4820193240Ssam error = copyin(md->md_in_data, indata, insize); 4821193240Ssam if (error) 4822193240Ssam goto bad; 4823193240Ssam } 4824193240Ssam if (md->md_id & MWL_DIAG_DYN) { 4825193240Ssam /* 4826193240Ssam * Allocate a buffer for the results (otherwise the HAL 4827193240Ssam * returns a pointer to a buffer where we can read the 4828193240Ssam * results). Note that we depend on the HAL leaving this 4829193240Ssam * pointer for us to use below in reclaiming the buffer; 4830193240Ssam * may want to be more defensive. 4831193240Ssam */ 4832193240Ssam outdata = malloc(outsize, M_TEMP, M_NOWAIT); 4833193240Ssam if (outdata == NULL) { 4834193240Ssam error = ENOMEM; 4835193240Ssam goto bad; 4836193240Ssam } 4837193240Ssam } 4838193240Ssam if (mwl_hal_getdiagstate(mh, id, indata, insize, &outdata, &outsize)) { 4839193240Ssam if (outsize < md->md_out_size) 4840193240Ssam md->md_out_size = outsize; 4841193240Ssam if (outdata != NULL) 4842193240Ssam error = copyout(outdata, md->md_out_data, 4843193240Ssam md->md_out_size); 4844193240Ssam } else { 4845193240Ssam error = EINVAL; 4846193240Ssam } 4847193240Ssambad: 4848193240Ssam if ((md->md_id & MWL_DIAG_IN) && indata != NULL) 4849193240Ssam free(indata, M_TEMP); 4850193240Ssam if ((md->md_id & MWL_DIAG_DYN) && outdata != NULL) 4851193240Ssam free(outdata, M_TEMP); 4852193240Ssam return error; 4853193240Ssam} 4854193240Ssam 4855193240Ssamstatic int 4856193240Ssammwl_ioctl_reset(struct mwl_softc *sc, struct mwl_diag *md) 4857193240Ssam{ 4858193240Ssam struct mwl_hal *mh = sc->sc_mh; 4859193240Ssam int error; 4860193240Ssam 4861193240Ssam MWL_LOCK_ASSERT(sc); 4862193240Ssam 4863193240Ssam if (md->md_id == 0 && mwl_hal_fwload(mh, NULL) != 0) { 4864193240Ssam device_printf(sc->sc_dev, "unable to load firmware\n"); 4865193240Ssam return EIO; 4866193240Ssam } 4867193240Ssam if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) { 4868193240Ssam device_printf(sc->sc_dev, "unable to fetch h/w specs\n"); 4869193240Ssam return EIO; 4870193240Ssam } 4871193240Ssam error = mwl_setupdma(sc); 4872193240Ssam if (error != 0) { 4873193240Ssam /* NB: mwl_setupdma prints a msg */ 4874193240Ssam return error; 4875193240Ssam } 4876193240Ssam /* 4877193240Ssam * Reset tx/rx data structures; after reload we must 4878193240Ssam * re-start the driver's notion of the next xmit/recv. 4879193240Ssam */ 4880193240Ssam mwl_draintxq(sc); /* clear pending frames */ 4881193240Ssam mwl_resettxq(sc); /* rebuild tx q lists */ 4882193240Ssam sc->sc_rxnext = NULL; /* force rx to start at the list head */ 4883193240Ssam return 0; 4884193240Ssam} 4885193240Ssam#endif /* MWL_DIAGAPI */ 4886193240Ssam 4887193240Ssamstatic int 4888193240Ssammwl_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 4889193240Ssam{ 4890193240Ssam#define IS_RUNNING(ifp) \ 4891193240Ssam ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 4892193240Ssam struct mwl_softc *sc = ifp->if_softc; 4893193240Ssam struct ieee80211com *ic = ifp->if_l2com; 4894193240Ssam struct ifreq *ifr = (struct ifreq *)data; 4895193240Ssam int error = 0, startall; 4896193240Ssam 4897193240Ssam switch (cmd) { 4898193240Ssam case SIOCSIFFLAGS: 4899193240Ssam MWL_LOCK(sc); 4900193240Ssam startall = 0; 4901193240Ssam if (IS_RUNNING(ifp)) { 4902193240Ssam /* 4903193240Ssam * To avoid rescanning another access point, 4904193240Ssam * do not call mwl_init() here. Instead, 4905193240Ssam * only reflect promisc mode settings. 4906193240Ssam */ 4907193240Ssam mwl_mode_init(sc); 4908193240Ssam } else if (ifp->if_flags & IFF_UP) { 4909193240Ssam /* 4910193240Ssam * Beware of being called during attach/detach 4911193240Ssam * to reset promiscuous mode. In that case we 4912193240Ssam * will still be marked UP but not RUNNING. 4913193240Ssam * However trying to re-init the interface 4914193240Ssam * is the wrong thing to do as we've already 4915193240Ssam * torn down much of our state. There's 4916193240Ssam * probably a better way to deal with this. 4917193240Ssam */ 4918193240Ssam if (!sc->sc_invalid) { 4919193240Ssam mwl_init_locked(sc); /* XXX lose error */ 4920193240Ssam startall = 1; 4921193240Ssam } 4922193240Ssam } else 4923193240Ssam mwl_stop_locked(ifp, 1); 4924193240Ssam MWL_UNLOCK(sc); 4925193240Ssam if (startall) 4926193240Ssam ieee80211_start_all(ic); 4927193240Ssam break; 4928193240Ssam case SIOCGMVSTATS: 4929193240Ssam mwl_hal_gethwstats(sc->sc_mh, &sc->sc_stats.hw_stats); 4930193240Ssam /* NB: embed these numbers to get a consistent view */ 4931193240Ssam sc->sc_stats.mst_tx_packets = ifp->if_opackets; 4932193240Ssam sc->sc_stats.mst_rx_packets = ifp->if_ipackets; 4933193240Ssam /* 4934193240Ssam * NB: Drop the softc lock in case of a page fault; 4935193240Ssam * we'll accept any potential inconsisentcy in the 4936193240Ssam * statistics. The alternative is to copy the data 4937193240Ssam * to a local structure. 4938193240Ssam */ 4939193240Ssam return copyout(&sc->sc_stats, 4940193240Ssam ifr->ifr_data, sizeof (sc->sc_stats)); 4941193240Ssam#ifdef MWL_DIAGAPI 4942193240Ssam case SIOCGMVDIAG: 4943193240Ssam /* XXX check privs */ 4944193240Ssam return mwl_ioctl_diag(sc, (struct mwl_diag *) ifr); 4945193240Ssam case SIOCGMVRESET: 4946193240Ssam /* XXX check privs */ 4947193240Ssam MWL_LOCK(sc); 4948193240Ssam error = mwl_ioctl_reset(sc,(struct mwl_diag *) ifr); 4949193240Ssam MWL_UNLOCK(sc); 4950193240Ssam break; 4951193240Ssam#endif /* MWL_DIAGAPI */ 4952193240Ssam case SIOCGIFMEDIA: 4953193240Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 4954193240Ssam break; 4955193240Ssam case SIOCGIFADDR: 4956193240Ssam error = ether_ioctl(ifp, cmd, data); 4957193240Ssam break; 4958193240Ssam default: 4959193240Ssam error = EINVAL; 4960193240Ssam break; 4961193240Ssam } 4962193240Ssam return error; 4963193240Ssam#undef IS_RUNNING 4964193240Ssam} 4965193240Ssam 4966193240Ssam#ifdef MWL_DEBUG 4967193240Ssamstatic int 4968193240Ssammwl_sysctl_debug(SYSCTL_HANDLER_ARGS) 4969193240Ssam{ 4970193240Ssam struct mwl_softc *sc = arg1; 4971193240Ssam int debug, error; 4972193240Ssam 4973193240Ssam debug = sc->sc_debug | (mwl_hal_getdebug(sc->sc_mh) << 24); 4974193240Ssam error = sysctl_handle_int(oidp, &debug, 0, req); 4975193240Ssam if (error || !req->newptr) 4976193240Ssam return error; 4977193240Ssam mwl_hal_setdebug(sc->sc_mh, debug >> 24); 4978193240Ssam sc->sc_debug = debug & 0x00ffffff; 4979193240Ssam return 0; 4980193240Ssam} 4981193240Ssam#endif /* MWL_DEBUG */ 4982193240Ssam 4983193240Ssamstatic void 4984193240Ssammwl_sysctlattach(struct mwl_softc *sc) 4985193240Ssam{ 4986193240Ssam#ifdef MWL_DEBUG 4987193240Ssam struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 4988193240Ssam struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 4989193240Ssam 4990193240Ssam sc->sc_debug = mwl_debug; 4991193240Ssam SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 4992193240Ssam "debug", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 4993193240Ssam mwl_sysctl_debug, "I", "control debugging printfs"); 4994193240Ssam#endif 4995193240Ssam} 4996193240Ssam 4997193240Ssam/* 4998193240Ssam * Announce various information on device/driver attach. 4999193240Ssam */ 5000193240Ssamstatic void 5001193240Ssammwl_announce(struct mwl_softc *sc) 5002193240Ssam{ 5003193240Ssam struct ifnet *ifp = sc->sc_ifp; 5004193240Ssam 5005193240Ssam if_printf(ifp, "Rev A%d hardware, v%d.%d.%d.%d firmware (regioncode %d)\n", 5006193240Ssam sc->sc_hwspecs.hwVersion, 5007193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>24) & 0xff, 5008193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>16) & 0xff, 5009193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>8) & 0xff, 5010193240Ssam (sc->sc_hwspecs.fwReleaseNumber>>0) & 0xff, 5011193240Ssam sc->sc_hwspecs.regionCode); 5012193240Ssam sc->sc_fwrelease = sc->sc_hwspecs.fwReleaseNumber; 5013193240Ssam 5014193240Ssam if (bootverbose) { 5015193240Ssam int i; 5016193240Ssam for (i = 0; i <= WME_AC_VO; i++) { 5017193240Ssam struct mwl_txq *txq = sc->sc_ac2q[i]; 5018193240Ssam if_printf(ifp, "Use hw queue %u for %s traffic\n", 5019193240Ssam txq->qnum, ieee80211_wme_acnames[i]); 5020193240Ssam } 5021193240Ssam } 5022193240Ssam if (bootverbose || mwl_rxdesc != MWL_RXDESC) 5023193240Ssam if_printf(ifp, "using %u rx descriptors\n", mwl_rxdesc); 5024193240Ssam if (bootverbose || mwl_rxbuf != MWL_RXBUF) 5025193240Ssam if_printf(ifp, "using %u rx buffers\n", mwl_rxbuf); 5026193240Ssam if (bootverbose || mwl_txbuf != MWL_TXBUF) 5027193240Ssam if_printf(ifp, "using %u tx buffers\n", mwl_txbuf); 5028193240Ssam if (bootverbose && mwl_hal_ismbsscapable(sc->sc_mh)) 5029193240Ssam if_printf(ifp, "multi-bss support\n"); 5030193240Ssam#ifdef MWL_TX_NODROP 5031193240Ssam if (bootverbose) 5032193240Ssam if_printf(ifp, "no tx drop\n"); 5033193240Ssam#endif 5034193240Ssam} 5035