if_mwl.c revision 193240
1193240Ssam/*-
2193240Ssam * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting
3193240Ssam * Copyright (c) 2007-2008 Marvell Semiconductor, Inc.
4193240Ssam * All rights reserved.
5193240Ssam *
6193240Ssam * Redistribution and use in source and binary forms, with or without
7193240Ssam * modification, are permitted provided that the following conditions
8193240Ssam * are met:
9193240Ssam * 1. Redistributions of source code must retain the above copyright
10193240Ssam *    notice, this list of conditions and the following disclaimer,
11193240Ssam *    without modification.
12193240Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13193240Ssam *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14193240Ssam *    redistribution must be conditioned upon including a substantially
15193240Ssam *    similar Disclaimer requirement for further binary redistribution.
16193240Ssam *
17193240Ssam * NO WARRANTY
18193240Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19193240Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20193240Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21193240Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22193240Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23193240Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24193240Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25193240Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26193240Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27193240Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28193240Ssam * THE POSSIBILITY OF SUCH DAMAGES.
29193240Ssam */
30193240Ssam
31193240Ssam#include <sys/cdefs.h>
32193240Ssam__FBSDID("$FreeBSD: head/sys/dev/mwl/if_mwl.c 193240 2009-06-01 18:07:01Z sam $");
33193240Ssam
34193240Ssam/*
35193240Ssam * Driver for the Marvell 88W8363 Wireless LAN controller.
36193240Ssam */
37193240Ssam
38193240Ssam#include "opt_inet.h"
39193240Ssam#include "opt_mwl.h"
40193240Ssam
41193240Ssam#include <sys/param.h>
42193240Ssam#include <sys/systm.h>
43193240Ssam#include <sys/sysctl.h>
44193240Ssam#include <sys/mbuf.h>
45193240Ssam#include <sys/malloc.h>
46193240Ssam#include <sys/lock.h>
47193240Ssam#include <sys/mutex.h>
48193240Ssam#include <sys/kernel.h>
49193240Ssam#include <sys/socket.h>
50193240Ssam#include <sys/sockio.h>
51193240Ssam#include <sys/errno.h>
52193240Ssam#include <sys/callout.h>
53193240Ssam#include <sys/bus.h>
54193240Ssam#include <sys/endian.h>
55193240Ssam#include <sys/kthread.h>
56193240Ssam#include <sys/taskqueue.h>
57193240Ssam
58193240Ssam#include <machine/bus.h>
59193240Ssam
60193240Ssam#include <net/if.h>
61193240Ssam#include <net/if_dl.h>
62193240Ssam#include <net/if_media.h>
63193240Ssam#include <net/if_types.h>
64193240Ssam#include <net/if_arp.h>
65193240Ssam#include <net/ethernet.h>
66193240Ssam#include <net/if_llc.h>
67193240Ssam
68193240Ssam#include <net/bpf.h>
69193240Ssam
70193240Ssam#include <net80211/ieee80211_var.h>
71193240Ssam#include <net80211/ieee80211_regdomain.h>
72193240Ssam
73193240Ssam#ifdef INET
74193240Ssam#include <netinet/in.h>
75193240Ssam#include <netinet/if_ether.h>
76193240Ssam#endif /* INET */
77193240Ssam
78193240Ssam#include <dev/mwl/if_mwlvar.h>
79193240Ssam#include <dev/mwl/mwldiag.h>
80193240Ssam
81193240Ssam/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
82193240Ssam#define	MS(v,x)	(((v) & x) >> x##_S)
83193240Ssam#define	SM(v,x)	(((v) << x##_S) & x)
84193240Ssam
85193240Ssamstatic struct ieee80211vap *mwl_vap_create(struct ieee80211com *,
86193240Ssam		    const char name[IFNAMSIZ], int unit, int opmode,
87193240Ssam		    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
88193240Ssam		    const uint8_t mac[IEEE80211_ADDR_LEN]);
89193240Ssamstatic void	mwl_vap_delete(struct ieee80211vap *);
90193240Ssamstatic int	mwl_setupdma(struct mwl_softc *);
91193240Ssamstatic int	mwl_hal_reset(struct mwl_softc *sc);
92193240Ssamstatic int	mwl_init_locked(struct mwl_softc *);
93193240Ssamstatic void	mwl_init(void *);
94193240Ssamstatic void	mwl_stop_locked(struct ifnet *, int);
95193240Ssamstatic int	mwl_reset(struct ieee80211vap *, u_long);
96193240Ssamstatic void	mwl_stop(struct ifnet *, int);
97193240Ssamstatic void	mwl_start(struct ifnet *);
98193240Ssamstatic int	mwl_raw_xmit(struct ieee80211_node *, struct mbuf *,
99193240Ssam			const struct ieee80211_bpf_params *);
100193240Ssamstatic int	mwl_media_change(struct ifnet *);
101193240Ssamstatic void	mwl_watchdog(struct ifnet *);
102193240Ssamstatic int	mwl_ioctl(struct ifnet *, u_long, caddr_t);
103193240Ssamstatic void	mwl_radar_proc(void *, int);
104193240Ssamstatic void	mwl_chanswitch_proc(void *, int);
105193240Ssamstatic void	mwl_bawatchdog_proc(void *, int);
106193240Ssamstatic int	mwl_key_alloc(struct ieee80211vap *,
107193240Ssam			struct ieee80211_key *,
108193240Ssam			ieee80211_keyix *, ieee80211_keyix *);
109193240Ssamstatic int	mwl_key_delete(struct ieee80211vap *,
110193240Ssam			const struct ieee80211_key *);
111193240Ssamstatic int	mwl_key_set(struct ieee80211vap *, const struct ieee80211_key *,
112193240Ssam			const uint8_t mac[IEEE80211_ADDR_LEN]);
113193240Ssamstatic int	mwl_mode_init(struct mwl_softc *);
114193240Ssamstatic void	mwl_update_mcast(struct ifnet *);
115193240Ssamstatic void	mwl_update_promisc(struct ifnet *);
116193240Ssamstatic void	mwl_updateslot(struct ifnet *);
117193240Ssamstatic int	mwl_beacon_setup(struct ieee80211vap *);
118193240Ssamstatic void	mwl_beacon_update(struct ieee80211vap *, int);
119193240Ssam#ifdef MWL_HOST_PS_SUPPORT
120193240Ssamstatic void	mwl_update_ps(struct ieee80211vap *, int);
121193240Ssamstatic int	mwl_set_tim(struct ieee80211_node *, int);
122193240Ssam#endif
123193240Ssamstatic int	mwl_dma_setup(struct mwl_softc *);
124193240Ssamstatic void	mwl_dma_cleanup(struct mwl_softc *);
125193240Ssamstatic struct ieee80211_node *mwl_node_alloc(struct ieee80211vap *,
126193240Ssam		    const uint8_t [IEEE80211_ADDR_LEN]);
127193240Ssamstatic void	mwl_node_cleanup(struct ieee80211_node *);
128193240Ssamstatic void	mwl_node_drain(struct ieee80211_node *);
129193240Ssamstatic void	mwl_node_getsignal(const struct ieee80211_node *,
130193240Ssam			int8_t *, int8_t *);
131193240Ssamstatic void	mwl_node_getmimoinfo(const struct ieee80211_node *,
132193240Ssam			struct ieee80211_mimo_info *);
133193240Ssamstatic int	mwl_rxbuf_init(struct mwl_softc *, struct mwl_rxbuf *);
134193240Ssamstatic void	mwl_rx_proc(void *, int);
135193240Ssamstatic void	mwl_txq_init(struct mwl_softc *sc, struct mwl_txq *, int);
136193240Ssamstatic int	mwl_tx_setup(struct mwl_softc *, int, int);
137193240Ssamstatic int	mwl_wme_update(struct ieee80211com *);
138193240Ssamstatic void	mwl_tx_cleanupq(struct mwl_softc *, struct mwl_txq *);
139193240Ssamstatic void	mwl_tx_cleanup(struct mwl_softc *);
140193240Ssamstatic uint16_t	mwl_calcformat(uint8_t rate, const struct ieee80211_node *);
141193240Ssamstatic int	mwl_tx_start(struct mwl_softc *, struct ieee80211_node *,
142193240Ssam			     struct mwl_txbuf *, struct mbuf *);
143193240Ssamstatic void	mwl_tx_proc(void *, int);
144193240Ssamstatic int	mwl_chan_set(struct mwl_softc *, struct ieee80211_channel *);
145193240Ssamstatic void	mwl_draintxq(struct mwl_softc *);
146193240Ssamstatic void	mwl_cleartxq(struct mwl_softc *, struct ieee80211vap *);
147193240Ssamstatic void	mwl_recv_action(struct ieee80211_node *,
148193240Ssam			const uint8_t *, const uint8_t *);
149193240Ssamstatic int	mwl_addba_request(struct ieee80211_node *,
150193240Ssam			struct ieee80211_tx_ampdu *, int dialogtoken,
151193240Ssam			int baparamset, int batimeout);
152193240Ssamstatic int	mwl_addba_response(struct ieee80211_node *,
153193240Ssam			struct ieee80211_tx_ampdu *, int status,
154193240Ssam			int baparamset, int batimeout);
155193240Ssamstatic void	mwl_addba_stop(struct ieee80211_node *,
156193240Ssam			struct ieee80211_tx_ampdu *);
157193240Ssamstatic int	mwl_startrecv(struct mwl_softc *);
158193240Ssamstatic MWL_HAL_APMODE mwl_getapmode(const struct ieee80211vap *,
159193240Ssam			struct ieee80211_channel *);
160193240Ssamstatic int	mwl_setapmode(struct ieee80211vap *, struct ieee80211_channel*);
161193240Ssamstatic void	mwl_scan_start(struct ieee80211com *);
162193240Ssamstatic void	mwl_scan_end(struct ieee80211com *);
163193240Ssamstatic void	mwl_set_channel(struct ieee80211com *);
164193240Ssamstatic int	mwl_peerstadb(struct ieee80211_node *,
165193240Ssam			int aid, int staid, MWL_HAL_PEERINFO *pi);
166193240Ssamstatic int	mwl_localstadb(struct ieee80211vap *);
167193240Ssamstatic int	mwl_newstate(struct ieee80211vap *, enum ieee80211_state, int);
168193240Ssamstatic int	allocstaid(struct mwl_softc *sc, int aid);
169193240Ssamstatic void	delstaid(struct mwl_softc *sc, int staid);
170193240Ssamstatic void	mwl_newassoc(struct ieee80211_node *, int);
171193240Ssamstatic void	mwl_agestations(void *);
172193240Ssamstatic int	mwl_setregdomain(struct ieee80211com *,
173193240Ssam			struct ieee80211_regdomain *, int,
174193240Ssam			struct ieee80211_channel []);
175193240Ssamstatic void	mwl_getradiocaps(struct ieee80211com *, int, int *,
176193240Ssam			struct ieee80211_channel []);
177193240Ssamstatic int	mwl_getchannels(struct mwl_softc *);
178193240Ssam
179193240Ssamstatic void	mwl_sysctlattach(struct mwl_softc *);
180193240Ssamstatic void	mwl_announce(struct mwl_softc *);
181193240Ssam
182193240SsamSYSCTL_NODE(_hw, OID_AUTO, mwl, CTLFLAG_RD, 0, "Marvell driver parameters");
183193240Ssam
184193240Ssamstatic	int mwl_rxdesc = MWL_RXDESC;		/* # rx desc's to allocate */
185193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxdesc, CTLFLAG_RW, &mwl_rxdesc,
186193240Ssam	    0, "rx descriptors allocated");
187193240Ssamstatic	int mwl_rxbuf = MWL_RXBUF;		/* # rx buffers to allocate */
188193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxbuf, CTLFLAG_RW, &mwl_rxbuf,
189193240Ssam	    0, "rx buffers allocated");
190193240SsamTUNABLE_INT("hw.mwl.rxbuf", &mwl_rxbuf);
191193240Ssamstatic	int mwl_txbuf = MWL_TXBUF;		/* # tx buffers to allocate */
192193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, txbuf, CTLFLAG_RW, &mwl_txbuf,
193193240Ssam	    0, "tx buffers allocated");
194193240SsamTUNABLE_INT("hw.mwl.txbuf", &mwl_txbuf);
195193240Ssamstatic	int mwl_txcoalesce = 8;		/* # tx packets to q before poking f/w*/
196193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, txcoalesce, CTLFLAG_RW, &mwl_txcoalesce,
197193240Ssam	    0, "tx buffers to send at once");
198193240SsamTUNABLE_INT("hw.mwl.txcoalesce", &mwl_txcoalesce);
199193240Ssamstatic	int mwl_rxquota = MWL_RXBUF;		/* # max buffers to process */
200193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxquota, CTLFLAG_RW, &mwl_rxquota,
201193240Ssam	    0, "max rx buffers to process per interrupt");
202193240SsamTUNABLE_INT("hw.mwl.rxquota", &mwl_rxquota);
203193240Ssamstatic	int mwl_rxdmalow = 3;			/* # min buffers for wakeup */
204193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxdmalow, CTLFLAG_RW, &mwl_rxdmalow,
205193240Ssam	    0, "min free rx buffers before restarting traffic");
206193240SsamTUNABLE_INT("hw.mwl.rxdmalow", &mwl_rxdmalow);
207193240Ssam
208193240Ssam#ifdef MWL_DEBUG
209193240Ssamstatic	int mwl_debug = 0;
210193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, debug, CTLFLAG_RW, &mwl_debug,
211193240Ssam	    0, "control debugging printfs");
212193240SsamTUNABLE_INT("hw.mwl.debug", &mwl_debug);
213193240Ssamenum {
214193240Ssam	MWL_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
215193240Ssam	MWL_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
216193240Ssam	MWL_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
217193240Ssam	MWL_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
218193240Ssam	MWL_DEBUG_RESET		= 0x00000010,	/* reset processing */
219193240Ssam	MWL_DEBUG_BEACON 	= 0x00000020,	/* beacon handling */
220193240Ssam	MWL_DEBUG_INTR		= 0x00000040,	/* ISR */
221193240Ssam	MWL_DEBUG_TX_PROC	= 0x00000080,	/* tx ISR proc */
222193240Ssam	MWL_DEBUG_RX_PROC	= 0x00000100,	/* rx ISR proc */
223193240Ssam	MWL_DEBUG_KEYCACHE	= 0x00000200,	/* key cache management */
224193240Ssam	MWL_DEBUG_STATE		= 0x00000400,	/* 802.11 state transitions */
225193240Ssam	MWL_DEBUG_NODE		= 0x00000800,	/* node management */
226193240Ssam	MWL_DEBUG_RECV_ALL	= 0x00001000,	/* trace all frames (beacons) */
227193240Ssam	MWL_DEBUG_TSO		= 0x00002000,	/* TSO processing */
228193240Ssam	MWL_DEBUG_AMPDU		= 0x00004000,	/* BA stream handling */
229193240Ssam	MWL_DEBUG_ANY		= 0xffffffff
230193240Ssam};
231193240Ssam#define	IS_BEACON(wh) \
232193240Ssam    ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK|IEEE80211_FC0_SUBTYPE_MASK)) == \
233193240Ssam	 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
234193240Ssam#define	IFF_DUMPPKTS_RECV(sc, wh) \
235193240Ssam    (((sc->sc_debug & MWL_DEBUG_RECV) && \
236193240Ssam      ((sc->sc_debug & MWL_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \
237193240Ssam     (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
238193240Ssam#define	IFF_DUMPPKTS_XMIT(sc) \
239193240Ssam	((sc->sc_debug & MWL_DEBUG_XMIT) || \
240193240Ssam	 (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
241193240Ssam#define	DPRINTF(sc, m, fmt, ...) do {				\
242193240Ssam	if (sc->sc_debug & (m))					\
243193240Ssam		printf(fmt, __VA_ARGS__);			\
244193240Ssam} while (0)
245193240Ssam#define	KEYPRINTF(sc, hk, mac) do {				\
246193240Ssam	if (sc->sc_debug & MWL_DEBUG_KEYCACHE)			\
247193240Ssam		mwl_keyprint(sc, __func__, hk, mac);		\
248193240Ssam} while (0)
249193240Ssamstatic	void mwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix);
250193240Ssamstatic	void mwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix);
251193240Ssam#else
252193240Ssam#define	IFF_DUMPPKTS_RECV(sc, wh) \
253193240Ssam	((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
254193240Ssam#define	IFF_DUMPPKTS_XMIT(sc) \
255193240Ssam	((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
256193240Ssam#define	DPRINTF(sc, m, fmt, ...) do {				\
257193240Ssam	(void) sc;						\
258193240Ssam} while (0)
259193240Ssam#define	KEYPRINTF(sc, k, mac) do {				\
260193240Ssam	(void) sc;						\
261193240Ssam} while (0)
262193240Ssam#endif
263193240Ssam
264193240SsamMALLOC_DEFINE(M_MWLDEV, "mwldev", "mwl driver dma buffers");
265193240Ssam
266193240Ssam/*
267193240Ssam * Each packet has fixed front matter: a 2-byte length
268193240Ssam * of the payload, followed by a 4-address 802.11 header
269193240Ssam * (regardless of the actual header and always w/o any
270193240Ssam * QoS header).  The payload then follows.
271193240Ssam */
272193240Ssamstruct mwltxrec {
273193240Ssam	uint16_t fwlen;
274193240Ssam	struct ieee80211_frame_addr4 wh;
275193240Ssam} __packed;
276193240Ssam
277193240Ssam/*
278193240Ssam * Read/Write shorthands for accesses to BAR 0.  Note
279193240Ssam * that all BAR 1 operations are done in the "hal" and
280193240Ssam * there should be no reference to them here.
281193240Ssam */
282193240Ssamstatic __inline uint32_t
283193240SsamRD4(struct mwl_softc *sc, bus_size_t off)
284193240Ssam{
285193240Ssam	return bus_space_read_4(sc->sc_io0t, sc->sc_io0h, off);
286193240Ssam}
287193240Ssam
288193240Ssamstatic __inline void
289193240SsamWR4(struct mwl_softc *sc, bus_size_t off, uint32_t val)
290193240Ssam{
291193240Ssam	bus_space_write_4(sc->sc_io0t, sc->sc_io0h, off, val);
292193240Ssam}
293193240Ssam
294193240Ssamint
295193240Ssammwl_attach(uint16_t devid, struct mwl_softc *sc)
296193240Ssam{
297193240Ssam	struct ifnet *ifp;
298193240Ssam	struct ieee80211com *ic;
299193240Ssam	struct mwl_hal *mh;
300193240Ssam	int error = 0;
301193240Ssam
302193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid);
303193240Ssam
304193240Ssam	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
305193240Ssam	if (ifp == NULL) {
306193240Ssam		device_printf(sc->sc_dev, "can not if_alloc()\n");
307193240Ssam		return ENOSPC;
308193240Ssam	}
309193240Ssam	ic = ifp->if_l2com;
310193240Ssam
311193240Ssam	/* set these up early for if_printf use */
312193240Ssam	if_initname(ifp, device_get_name(sc->sc_dev),
313193240Ssam		device_get_unit(sc->sc_dev));
314193240Ssam
315193240Ssam	mh = mwl_hal_attach(sc->sc_dev, devid,
316193240Ssam	    sc->sc_io1h, sc->sc_io1t, sc->sc_dmat);
317193240Ssam	if (mh == NULL) {
318193240Ssam		if_printf(ifp, "unable to attach HAL\n");
319193240Ssam		error = EIO;
320193240Ssam		goto bad;
321193240Ssam	}
322193240Ssam	sc->sc_mh = mh;
323193240Ssam	/*
324193240Ssam	 * Load firmware so we can get setup.  We arbitrarily
325193240Ssam	 * pick station firmware; we'll re-load firmware as
326193240Ssam	 * needed so setting up the wrong mode isn't a big deal.
327193240Ssam	 */
328193240Ssam	if (mwl_hal_fwload(mh, NULL) != 0) {
329193240Ssam		if_printf(ifp, "unable to setup builtin firmware\n");
330193240Ssam		error = EIO;
331193240Ssam		goto bad1;
332193240Ssam	}
333193240Ssam	if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) {
334193240Ssam		if_printf(ifp, "unable to fetch h/w specs\n");
335193240Ssam		error = EIO;
336193240Ssam		goto bad1;
337193240Ssam	}
338193240Ssam	error = mwl_getchannels(sc);
339193240Ssam	if (error != 0)
340193240Ssam		goto bad1;
341193240Ssam
342193240Ssam	sc->sc_txantenna = 0;		/* h/w default */
343193240Ssam	sc->sc_rxantenna = 0;		/* h/w default */
344193240Ssam	sc->sc_invalid = 0;		/* ready to go, enable int handling */
345193240Ssam	sc->sc_ageinterval = MWL_AGEINTERVAL;
346193240Ssam
347193240Ssam	/*
348193240Ssam	 * Allocate tx+rx descriptors and populate the lists.
349193240Ssam	 * We immediately push the information to the firmware
350193240Ssam	 * as otherwise it gets upset.
351193240Ssam	 */
352193240Ssam	error = mwl_dma_setup(sc);
353193240Ssam	if (error != 0) {
354193240Ssam		if_printf(ifp, "failed to setup descriptors: %d\n", error);
355193240Ssam		goto bad1;
356193240Ssam	}
357193240Ssam	error = mwl_setupdma(sc);	/* push to firmware */
358193240Ssam	if (error != 0)			/* NB: mwl_setupdma prints msg */
359193240Ssam		goto bad1;
360193240Ssam
361193240Ssam	callout_init(&sc->sc_timer, CALLOUT_MPSAFE);
362193240Ssam
363193240Ssam	sc->sc_tq = taskqueue_create("mwl_taskq", M_NOWAIT,
364193240Ssam		taskqueue_thread_enqueue, &sc->sc_tq);
365193240Ssam	taskqueue_start_threads(&sc->sc_tq, 1, PI_NET,
366193240Ssam		"%s taskq", ifp->if_xname);
367193240Ssam
368193240Ssam	TASK_INIT(&sc->sc_rxtask, 0, mwl_rx_proc, sc);
369193240Ssam	TASK_INIT(&sc->sc_radartask, 0, mwl_radar_proc, sc);
370193240Ssam	TASK_INIT(&sc->sc_chanswitchtask, 0, mwl_chanswitch_proc, sc);
371193240Ssam	TASK_INIT(&sc->sc_bawatchdogtask, 0, mwl_bawatchdog_proc, sc);
372193240Ssam
373193240Ssam	/* NB: insure BK queue is the lowest priority h/w queue */
374193240Ssam	if (!mwl_tx_setup(sc, WME_AC_BK, MWL_WME_AC_BK)) {
375193240Ssam		if_printf(ifp, "unable to setup xmit queue for %s traffic!\n",
376193240Ssam			ieee80211_wme_acnames[WME_AC_BK]);
377193240Ssam		error = EIO;
378193240Ssam		goto bad2;
379193240Ssam	}
380193240Ssam	if (!mwl_tx_setup(sc, WME_AC_BE, MWL_WME_AC_BE) ||
381193240Ssam	    !mwl_tx_setup(sc, WME_AC_VI, MWL_WME_AC_VI) ||
382193240Ssam	    !mwl_tx_setup(sc, WME_AC_VO, MWL_WME_AC_VO)) {
383193240Ssam		/*
384193240Ssam		 * Not enough hardware tx queues to properly do WME;
385193240Ssam		 * just punt and assign them all to the same h/w queue.
386193240Ssam		 * We could do a better job of this if, for example,
387193240Ssam		 * we allocate queues when we switch from station to
388193240Ssam		 * AP mode.
389193240Ssam		 */
390193240Ssam		if (sc->sc_ac2q[WME_AC_VI] != NULL)
391193240Ssam			mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]);
392193240Ssam		if (sc->sc_ac2q[WME_AC_BE] != NULL)
393193240Ssam			mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]);
394193240Ssam		sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK];
395193240Ssam		sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK];
396193240Ssam		sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK];
397193240Ssam	}
398193240Ssam	TASK_INIT(&sc->sc_txtask, 0, mwl_tx_proc, sc);
399193240Ssam
400193240Ssam	ifp->if_softc = sc;
401193240Ssam	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
402193240Ssam	ifp->if_start = mwl_start;
403193240Ssam	ifp->if_watchdog = mwl_watchdog;
404193240Ssam	ifp->if_ioctl = mwl_ioctl;
405193240Ssam	ifp->if_init = mwl_init;
406193240Ssam	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
407193240Ssam	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
408193240Ssam	IFQ_SET_READY(&ifp->if_snd);
409193240Ssam
410193240Ssam	ic->ic_ifp = ifp;
411193240Ssam	/* XXX not right but it's not used anywhere important */
412193240Ssam	ic->ic_phytype = IEEE80211_T_OFDM;
413193240Ssam	ic->ic_opmode = IEEE80211_M_STA;
414193240Ssam	ic->ic_caps =
415193240Ssam		  IEEE80211_C_STA		/* station mode supported */
416193240Ssam		| IEEE80211_C_HOSTAP		/* hostap mode */
417193240Ssam		| IEEE80211_C_MONITOR		/* monitor mode */
418193240Ssam#if 0
419193240Ssam		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
420193240Ssam		| IEEE80211_C_AHDEMO		/* adhoc demo mode */
421193240Ssam#endif
422193240Ssam		| IEEE80211_C_WDS		/* WDS supported */
423193240Ssam		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
424193240Ssam		| IEEE80211_C_SHSLOT		/* short slot time supported */
425193240Ssam		| IEEE80211_C_WME		/* WME/WMM supported */
426193240Ssam		| IEEE80211_C_BURST		/* xmit bursting supported */
427193240Ssam		| IEEE80211_C_WPA		/* capable of WPA1+WPA2 */
428193240Ssam		| IEEE80211_C_BGSCAN		/* capable of bg scanning */
429193240Ssam		| IEEE80211_C_TXFRAG		/* handle tx frags */
430193240Ssam		| IEEE80211_C_TXPMGT		/* capable of txpow mgt */
431193240Ssam		| IEEE80211_C_DFS		/* DFS supported */
432193240Ssam		;
433193240Ssam
434193240Ssam	ic->ic_htcaps =
435193240Ssam		  IEEE80211_HTCAP_SMPS_ENA	/* SM PS mode enabled */
436193240Ssam		| IEEE80211_HTCAP_CHWIDTH40	/* 40MHz channel width */
437193240Ssam		| IEEE80211_HTCAP_SHORTGI20	/* short GI in 20MHz */
438193240Ssam		| IEEE80211_HTCAP_SHORTGI40	/* short GI in 40MHz */
439193240Ssam		| IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */
440193240Ssam#if MWL_AGGR_SIZE == 7935
441193240Ssam		| IEEE80211_HTCAP_MAXAMSDU_7935	/* max A-MSDU length */
442193240Ssam#else
443193240Ssam		| IEEE80211_HTCAP_MAXAMSDU_3839	/* max A-MSDU length */
444193240Ssam#endif
445193240Ssam#if 0
446193240Ssam		| IEEE80211_HTCAP_PSMP		/* PSMP supported */
447193240Ssam		| IEEE80211_HTCAP_40INTOLERANT	/* 40MHz intolerant */
448193240Ssam#endif
449193240Ssam		/* s/w capabilities */
450193240Ssam		| IEEE80211_HTC_HT		/* HT operation */
451193240Ssam		| IEEE80211_HTC_AMPDU		/* tx A-MPDU */
452193240Ssam		| IEEE80211_HTC_AMSDU		/* tx A-MSDU */
453193240Ssam		| IEEE80211_HTC_SMPS		/* SMPS available */
454193240Ssam		;
455193240Ssam
456193240Ssam	/*
457193240Ssam	 * Mark h/w crypto support.
458193240Ssam	 * XXX no way to query h/w support.
459193240Ssam	 */
460193240Ssam	ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP
461193240Ssam			  |  IEEE80211_CRYPTO_AES_CCM
462193240Ssam			  |  IEEE80211_CRYPTO_TKIP
463193240Ssam			  |  IEEE80211_CRYPTO_TKIPMIC
464193240Ssam			  ;
465193240Ssam	/*
466193240Ssam	 * Transmit requires space in the packet for a special
467193240Ssam	 * format transmit record and optional padding between
468193240Ssam	 * this record and the payload.  Ask the net80211 layer
469193240Ssam	 * to arrange this when encapsulating packets so we can
470193240Ssam	 * add it efficiently.
471193240Ssam	 */
472193240Ssam	ic->ic_headroom = sizeof(struct mwltxrec) -
473193240Ssam		sizeof(struct ieee80211_frame);
474193240Ssam
475193240Ssam	/* call MI attach routine. */
476193240Ssam	ieee80211_ifattach(ic, sc->sc_hwspecs.macAddr);
477193240Ssam	ic->ic_setregdomain = mwl_setregdomain;
478193240Ssam	ic->ic_getradiocaps = mwl_getradiocaps;
479193240Ssam	/* override default methods */
480193240Ssam	ic->ic_raw_xmit = mwl_raw_xmit;
481193240Ssam	ic->ic_newassoc = mwl_newassoc;
482193240Ssam	ic->ic_updateslot = mwl_updateslot;
483193240Ssam	ic->ic_update_mcast = mwl_update_mcast;
484193240Ssam	ic->ic_update_promisc = mwl_update_promisc;
485193240Ssam	ic->ic_wme.wme_update = mwl_wme_update;
486193240Ssam
487193240Ssam	ic->ic_node_alloc = mwl_node_alloc;
488193240Ssam	sc->sc_node_cleanup = ic->ic_node_cleanup;
489193240Ssam	ic->ic_node_cleanup = mwl_node_cleanup;
490193240Ssam	sc->sc_node_drain = ic->ic_node_drain;
491193240Ssam	ic->ic_node_drain = mwl_node_drain;
492193240Ssam	ic->ic_node_getsignal = mwl_node_getsignal;
493193240Ssam	ic->ic_node_getmimoinfo = mwl_node_getmimoinfo;
494193240Ssam
495193240Ssam	ic->ic_scan_start = mwl_scan_start;
496193240Ssam	ic->ic_scan_end = mwl_scan_end;
497193240Ssam	ic->ic_set_channel = mwl_set_channel;
498193240Ssam
499193240Ssam	sc->sc_recv_action = ic->ic_recv_action;
500193240Ssam	ic->ic_recv_action = mwl_recv_action;
501193240Ssam	sc->sc_addba_request = ic->ic_addba_request;
502193240Ssam	ic->ic_addba_request = mwl_addba_request;
503193240Ssam	sc->sc_addba_response = ic->ic_addba_response;
504193240Ssam	ic->ic_addba_response = mwl_addba_response;
505193240Ssam	sc->sc_addba_stop = ic->ic_addba_stop;
506193240Ssam	ic->ic_addba_stop = mwl_addba_stop;
507193240Ssam
508193240Ssam	ic->ic_vap_create = mwl_vap_create;
509193240Ssam	ic->ic_vap_delete = mwl_vap_delete;
510193240Ssam
511193240Ssam	ieee80211_radiotap_attach(ic,
512193240Ssam	    &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th),
513193240Ssam		MWL_TX_RADIOTAP_PRESENT,
514193240Ssam	    &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th),
515193240Ssam		MWL_RX_RADIOTAP_PRESENT);
516193240Ssam	/*
517193240Ssam	 * Setup dynamic sysctl's now that country code and
518193240Ssam	 * regdomain are available from the hal.
519193240Ssam	 */
520193240Ssam	mwl_sysctlattach(sc);
521193240Ssam
522193240Ssam	if (bootverbose)
523193240Ssam		ieee80211_announce(ic);
524193240Ssam	mwl_announce(sc);
525193240Ssam	return 0;
526193240Ssambad2:
527193240Ssam	mwl_dma_cleanup(sc);
528193240Ssambad1:
529193240Ssam	mwl_hal_detach(mh);
530193240Ssambad:
531193240Ssam	if_free(ifp);
532193240Ssam	sc->sc_invalid = 1;
533193240Ssam	return error;
534193240Ssam}
535193240Ssam
536193240Ssamint
537193240Ssammwl_detach(struct mwl_softc *sc)
538193240Ssam{
539193240Ssam	struct ifnet *ifp = sc->sc_ifp;
540193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
541193240Ssam
542193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n",
543193240Ssam		__func__, ifp->if_flags);
544193240Ssam
545193240Ssam	mwl_stop(ifp, 1);
546193240Ssam	/*
547193240Ssam	 * NB: the order of these is important:
548193240Ssam	 * o call the 802.11 layer before detaching the hal to
549193240Ssam	 *   insure callbacks into the driver to delete global
550193240Ssam	 *   key cache entries can be handled
551193240Ssam	 * o reclaim the tx queue data structures after calling
552193240Ssam	 *   the 802.11 layer as we'll get called back to reclaim
553193240Ssam	 *   node state and potentially want to use them
554193240Ssam	 * o to cleanup the tx queues the hal is called, so detach
555193240Ssam	 *   it last
556193240Ssam	 * Other than that, it's straightforward...
557193240Ssam	 */
558193240Ssam	ieee80211_ifdetach(ic);
559193240Ssam	mwl_dma_cleanup(sc);
560193240Ssam	mwl_tx_cleanup(sc);
561193240Ssam	mwl_hal_detach(sc->sc_mh);
562193240Ssam	if_free(ifp);
563193240Ssam
564193240Ssam	return 0;
565193240Ssam}
566193240Ssam
567193240Ssam/*
568193240Ssam * MAC address handling for multiple BSS on the same radio.
569193240Ssam * The first vap uses the MAC address from the EEPROM.  For
570193240Ssam * subsequent vap's we set the U/L bit (bit 1) in the MAC
571193240Ssam * address and use the next six bits as an index.
572193240Ssam */
573193240Ssamstatic void
574193240Ssamassign_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN], int clone)
575193240Ssam{
576193240Ssam	int i;
577193240Ssam
578193240Ssam	if (clone && mwl_hal_ismbsscapable(sc->sc_mh)) {
579193240Ssam		/* NB: we only do this if h/w supports multiple bssid */
580193240Ssam		for (i = 0; i < 32; i++)
581193240Ssam			if ((sc->sc_bssidmask & (1<<i)) == 0)
582193240Ssam				break;
583193240Ssam		if (i != 0)
584193240Ssam			mac[0] |= (i << 2)|0x2;
585193240Ssam	} else
586193240Ssam		i = 0;
587193240Ssam	sc->sc_bssidmask |= 1<<i;
588193240Ssam	if (i == 0)
589193240Ssam		sc->sc_nbssid0++;
590193240Ssam}
591193240Ssam
592193240Ssamstatic void
593193240Ssamreclaim_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN])
594193240Ssam{
595193240Ssam	int i = mac[0] >> 2;
596193240Ssam	if (i != 0 || --sc->sc_nbssid0 == 0)
597193240Ssam		sc->sc_bssidmask &= ~(1<<i);
598193240Ssam}
599193240Ssam
600193240Ssamstatic struct ieee80211vap *
601193240Ssammwl_vap_create(struct ieee80211com *ic,
602193240Ssam	const char name[IFNAMSIZ], int unit, int opmode, int flags,
603193240Ssam	const uint8_t bssid[IEEE80211_ADDR_LEN],
604193240Ssam	const uint8_t mac0[IEEE80211_ADDR_LEN])
605193240Ssam{
606193240Ssam	struct ifnet *ifp = ic->ic_ifp;
607193240Ssam	struct mwl_softc *sc = ifp->if_softc;
608193240Ssam	struct mwl_hal *mh = sc->sc_mh;
609193240Ssam	struct ieee80211vap *vap, *apvap;
610193240Ssam	struct mwl_hal_vap *hvap;
611193240Ssam	struct mwl_vap *mvp;
612193240Ssam	uint8_t mac[IEEE80211_ADDR_LEN];
613193240Ssam
614193240Ssam	IEEE80211_ADDR_COPY(mac, mac0);
615193240Ssam	switch (opmode) {
616193240Ssam	case IEEE80211_M_HOSTAP:
617193240Ssam		if ((flags & IEEE80211_CLONE_MACADDR) == 0)
618193240Ssam			assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
619193240Ssam		hvap = mwl_hal_newvap(mh, MWL_HAL_AP, mac);
620193240Ssam		if (hvap == NULL) {
621193240Ssam			if ((flags & IEEE80211_CLONE_MACADDR) == 0)
622193240Ssam				reclaim_address(sc, mac);
623193240Ssam			return NULL;
624193240Ssam		}
625193240Ssam		break;
626193240Ssam	case IEEE80211_M_STA:
627193240Ssam		if ((flags & IEEE80211_CLONE_MACADDR) == 0)
628193240Ssam			assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
629193240Ssam		hvap = mwl_hal_newvap(mh, MWL_HAL_STA, mac);
630193240Ssam		if (hvap == NULL) {
631193240Ssam			if ((flags & IEEE80211_CLONE_MACADDR) == 0)
632193240Ssam				reclaim_address(sc, mac);
633193240Ssam			return NULL;
634193240Ssam		}
635193240Ssam		/* no h/w beacon miss support; always use s/w */
636193240Ssam		flags |= IEEE80211_CLONE_NOBEACONS;
637193240Ssam		break;
638193240Ssam	case IEEE80211_M_WDS:
639193240Ssam		hvap = NULL;		/* NB: we use associated AP vap */
640193240Ssam		if (sc->sc_napvaps == 0)
641193240Ssam			return NULL;	/* no existing AP vap */
642193240Ssam		break;
643193240Ssam	case IEEE80211_M_MONITOR:
644193240Ssam		hvap = NULL;
645193240Ssam		break;
646193240Ssam	case IEEE80211_M_IBSS:
647193240Ssam	case IEEE80211_M_AHDEMO:
648193240Ssam	default:
649193240Ssam		return NULL;
650193240Ssam	}
651193240Ssam
652193240Ssam	mvp = (struct mwl_vap *) malloc(sizeof(struct mwl_vap),
653193240Ssam	    M_80211_VAP, M_NOWAIT | M_ZERO);
654193240Ssam	if (mvp == NULL) {
655193240Ssam		if (hvap != NULL) {
656193240Ssam			mwl_hal_delvap(hvap);
657193240Ssam			if ((flags & IEEE80211_CLONE_MACADDR) == 0)
658193240Ssam				reclaim_address(sc, mac);
659193240Ssam		}
660193240Ssam		/* XXX msg */
661193240Ssam		return NULL;
662193240Ssam	}
663193240Ssam	mvp->mv_hvap = hvap;
664193240Ssam	if (opmode == IEEE80211_M_WDS) {
665193240Ssam		/*
666193240Ssam		 * WDS vaps must have an associated AP vap; find one.
667193240Ssam		 * XXX not right.
668193240Ssam		 */
669193240Ssam		TAILQ_FOREACH(apvap, &ic->ic_vaps, iv_next)
670193240Ssam			if (apvap->iv_opmode == IEEE80211_M_HOSTAP) {
671193240Ssam				mvp->mv_ap_hvap = MWL_VAP(apvap)->mv_hvap;
672193240Ssam				break;
673193240Ssam			}
674193240Ssam		KASSERT(mvp->mv_ap_hvap != NULL, ("no ap vap"));
675193240Ssam	}
676193240Ssam	vap = &mvp->mv_vap;
677193240Ssam	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
678193240Ssam	if (hvap != NULL)
679193240Ssam		IEEE80211_ADDR_COPY(vap->iv_myaddr, mac);
680193240Ssam	/* override with driver methods */
681193240Ssam	mvp->mv_newstate = vap->iv_newstate;
682193240Ssam	vap->iv_newstate = mwl_newstate;
683193240Ssam	vap->iv_max_keyix = 0;	/* XXX */
684193240Ssam	vap->iv_key_alloc = mwl_key_alloc;
685193240Ssam	vap->iv_key_delete = mwl_key_delete;
686193240Ssam	vap->iv_key_set = mwl_key_set;
687193240Ssam#ifdef MWL_HOST_PS_SUPPORT
688193240Ssam	if (opmode == IEEE80211_M_HOSTAP) {
689193240Ssam		vap->iv_update_ps = mwl_update_ps;
690193240Ssam		mvp->mv_set_tim = vap->iv_set_tim;
691193240Ssam		vap->iv_set_tim = mwl_set_tim;
692193240Ssam	}
693193240Ssam#endif
694193240Ssam	vap->iv_reset = mwl_reset;
695193240Ssam	vap->iv_update_beacon = mwl_beacon_update;
696193240Ssam
697193240Ssam	/* override max aid so sta's cannot assoc when we're out of sta id's */
698193240Ssam	vap->iv_max_aid = MWL_MAXSTAID;
699193240Ssam	/* override default A-MPDU rx parameters */
700193240Ssam	vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K;
701193240Ssam	vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4;
702193240Ssam
703193240Ssam	/* complete setup */
704193240Ssam	ieee80211_vap_attach(vap, mwl_media_change, ieee80211_media_status);
705193240Ssam
706193240Ssam	switch (vap->iv_opmode) {
707193240Ssam	case IEEE80211_M_HOSTAP:
708193240Ssam	case IEEE80211_M_STA:
709193240Ssam		/*
710193240Ssam		 * Setup sta db entry for local address.
711193240Ssam		 */
712193240Ssam		mwl_localstadb(vap);
713193240Ssam		if (vap->iv_opmode == IEEE80211_M_HOSTAP)
714193240Ssam			sc->sc_napvaps++;
715193240Ssam		else
716193240Ssam			sc->sc_nstavaps++;
717193240Ssam		break;
718193240Ssam	case IEEE80211_M_WDS:
719193240Ssam		sc->sc_nwdsvaps++;
720193240Ssam		break;
721193240Ssam	default:
722193240Ssam		break;
723193240Ssam	}
724193240Ssam	/*
725193240Ssam	 * Setup overall operating mode.
726193240Ssam	 */
727193240Ssam	if (sc->sc_napvaps)
728193240Ssam		ic->ic_opmode = IEEE80211_M_HOSTAP;
729193240Ssam	else if (sc->sc_nstavaps)
730193240Ssam		ic->ic_opmode = IEEE80211_M_STA;
731193240Ssam	else
732193240Ssam		ic->ic_opmode = opmode;
733193240Ssam
734193240Ssam	return vap;
735193240Ssam}
736193240Ssam
737193240Ssamstatic void
738193240Ssammwl_vap_delete(struct ieee80211vap *vap)
739193240Ssam{
740193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
741193240Ssam	struct ifnet *parent = vap->iv_ic->ic_ifp;
742193240Ssam	struct mwl_softc *sc = parent->if_softc;
743193240Ssam	struct mwl_hal *mh = sc->sc_mh;
744193240Ssam	struct mwl_hal_vap *hvap = mvp->mv_hvap;
745193240Ssam	enum ieee80211_opmode opmode = vap->iv_opmode;
746193240Ssam
747193240Ssam	/* XXX disallow ap vap delete if WDS still present */
748193240Ssam	if (parent->if_drv_flags & IFF_DRV_RUNNING) {
749193240Ssam		/* quiesce h/w while we remove the vap */
750193240Ssam		mwl_hal_intrset(mh, 0);		/* disable interrupts */
751193240Ssam	}
752193240Ssam	ieee80211_vap_detach(vap);
753193240Ssam	switch (opmode) {
754193240Ssam	case IEEE80211_M_HOSTAP:
755193240Ssam	case IEEE80211_M_STA:
756193240Ssam		KASSERT(hvap != NULL, ("no hal vap handle"));
757193240Ssam		(void) mwl_hal_delstation(hvap, vap->iv_myaddr);
758193240Ssam		mwl_hal_delvap(hvap);
759193240Ssam		if (opmode == IEEE80211_M_HOSTAP)
760193240Ssam			sc->sc_napvaps--;
761193240Ssam		else
762193240Ssam			sc->sc_nstavaps--;
763193240Ssam		/* XXX don't do it for IEEE80211_CLONE_MACADDR */
764193240Ssam		reclaim_address(sc, vap->iv_myaddr);
765193240Ssam		break;
766193240Ssam	case IEEE80211_M_WDS:
767193240Ssam		sc->sc_nwdsvaps--;
768193240Ssam		break;
769193240Ssam	default:
770193240Ssam		break;
771193240Ssam	}
772193240Ssam	mwl_cleartxq(sc, vap);
773193240Ssam	free(mvp, M_80211_VAP);
774193240Ssam	if (parent->if_drv_flags & IFF_DRV_RUNNING)
775193240Ssam		mwl_hal_intrset(mh, sc->sc_imask);
776193240Ssam}
777193240Ssam
778193240Ssamvoid
779193240Ssammwl_suspend(struct mwl_softc *sc)
780193240Ssam{
781193240Ssam	struct ifnet *ifp = sc->sc_ifp;
782193240Ssam
783193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n",
784193240Ssam		__func__, ifp->if_flags);
785193240Ssam
786193240Ssam	mwl_stop(ifp, 1);
787193240Ssam}
788193240Ssam
789193240Ssamvoid
790193240Ssammwl_resume(struct mwl_softc *sc)
791193240Ssam{
792193240Ssam	struct ifnet *ifp = sc->sc_ifp;
793193240Ssam
794193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n",
795193240Ssam		__func__, ifp->if_flags);
796193240Ssam
797193240Ssam	if (ifp->if_flags & IFF_UP)
798193240Ssam		mwl_init(sc);
799193240Ssam}
800193240Ssam
801193240Ssamvoid
802193240Ssammwl_shutdown(void *arg)
803193240Ssam{
804193240Ssam	struct mwl_softc *sc = arg;
805193240Ssam
806193240Ssam	mwl_stop(sc->sc_ifp, 1);
807193240Ssam}
808193240Ssam
809193240Ssam/*
810193240Ssam * Interrupt handler.  Most of the actual processing is deferred.
811193240Ssam */
812193240Ssamvoid
813193240Ssammwl_intr(void *arg)
814193240Ssam{
815193240Ssam	struct mwl_softc *sc = arg;
816193240Ssam	struct mwl_hal *mh = sc->sc_mh;
817193240Ssam	uint32_t status;
818193240Ssam
819193240Ssam	if (sc->sc_invalid) {
820193240Ssam		/*
821193240Ssam		 * The hardware is not ready/present, don't touch anything.
822193240Ssam		 * Note this can happen early on if the IRQ is shared.
823193240Ssam		 */
824193240Ssam		DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
825193240Ssam		return;
826193240Ssam	}
827193240Ssam	/*
828193240Ssam	 * Figure out the reason(s) for the interrupt.
829193240Ssam	 */
830193240Ssam	mwl_hal_getisr(mh, &status);		/* NB: clears ISR too */
831193240Ssam	if (status == 0)			/* must be a shared irq */
832193240Ssam		return;
833193240Ssam
834193240Ssam	DPRINTF(sc, MWL_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
835193240Ssam	    __func__, status, sc->sc_imask);
836193240Ssam	if (status & MACREG_A2HRIC_BIT_RX_RDY)
837193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
838193240Ssam	if (status & MACREG_A2HRIC_BIT_TX_DONE)
839193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask);
840193240Ssam	if (status & MACREG_A2HRIC_BIT_BA_WATCHDOG)
841193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_bawatchdogtask);
842193240Ssam	if (status & MACREG_A2HRIC_BIT_OPC_DONE)
843193240Ssam		mwl_hal_cmddone(mh);
844193240Ssam	if (status & MACREG_A2HRIC_BIT_MAC_EVENT) {
845193240Ssam		;
846193240Ssam	}
847193240Ssam	if (status & MACREG_A2HRIC_BIT_ICV_ERROR) {
848193240Ssam		/* TKIP ICV error */
849193240Ssam		sc->sc_stats.mst_rx_badtkipicv++;
850193240Ssam	}
851193240Ssam	if (status & MACREG_A2HRIC_BIT_QUEUE_EMPTY) {
852193240Ssam		/* 11n aggregation queue is empty, re-fill */
853193240Ssam		;
854193240Ssam	}
855193240Ssam	if (status & MACREG_A2HRIC_BIT_QUEUE_FULL) {
856193240Ssam		;
857193240Ssam	}
858193240Ssam	if (status & MACREG_A2HRIC_BIT_RADAR_DETECT) {
859193240Ssam		/* radar detected, process event */
860193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_radartask);
861193240Ssam	}
862193240Ssam	if (status & MACREG_A2HRIC_BIT_CHAN_SWITCH) {
863193240Ssam		/* DFS channel switch */
864193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_chanswitchtask);
865193240Ssam	}
866193240Ssam}
867193240Ssam
868193240Ssamstatic void
869193240Ssammwl_radar_proc(void *arg, int pending)
870193240Ssam{
871193240Ssam	struct mwl_softc *sc = arg;
872193240Ssam	struct ifnet *ifp = sc->sc_ifp;
873193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
874193240Ssam
875193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: radar detected, pending %u\n",
876193240Ssam	    __func__, pending);
877193240Ssam
878193240Ssam	sc->sc_stats.mst_radardetect++;
879193240Ssam
880193240Ssam	IEEE80211_LOCK(ic);
881193240Ssam	ieee80211_dfs_notify_radar(ic, ic->ic_curchan);
882193240Ssam	IEEE80211_UNLOCK(ic);
883193240Ssam}
884193240Ssam
885193240Ssamstatic void
886193240Ssammwl_chanswitch_proc(void *arg, int pending)
887193240Ssam{
888193240Ssam	struct mwl_softc *sc = arg;
889193240Ssam	struct ifnet *ifp = sc->sc_ifp;
890193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
891193240Ssam
892193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: channel switch notice, pending %u\n",
893193240Ssam	    __func__, pending);
894193240Ssam
895193240Ssam	IEEE80211_LOCK(ic);
896193240Ssam	sc->sc_csapending = 0;
897193240Ssam	ieee80211_csa_completeswitch(ic);
898193240Ssam	IEEE80211_UNLOCK(ic);
899193240Ssam}
900193240Ssam
901193240Ssamstatic void
902193240Ssammwl_bawatchdog(const MWL_HAL_BASTREAM *sp)
903193240Ssam{
904193240Ssam	struct ieee80211_node *ni = sp->data[0];
905193240Ssam
906193240Ssam	/* send DELBA and drop the stream */
907193240Ssam	ieee80211_ampdu_stop(ni, sp->data[1], IEEE80211_REASON_UNSPECIFIED);
908193240Ssam}
909193240Ssam
910193240Ssamstatic void
911193240Ssammwl_bawatchdog_proc(void *arg, int pending)
912193240Ssam{
913193240Ssam	struct mwl_softc *sc = arg;
914193240Ssam	struct mwl_hal *mh = sc->sc_mh;
915193240Ssam	const MWL_HAL_BASTREAM *sp;
916193240Ssam	uint8_t bitmap, n;
917193240Ssam
918193240Ssam	sc->sc_stats.mst_bawatchdog++;
919193240Ssam
920193240Ssam	if (mwl_hal_getwatchdogbitmap(mh, &bitmap) != 0) {
921193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
922193240Ssam		    "%s: could not get bitmap\n", __func__);
923193240Ssam		sc->sc_stats.mst_bawatchdog_failed++;
924193240Ssam		return;
925193240Ssam	}
926193240Ssam	DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: bitmap 0x%x\n", __func__, bitmap);
927193240Ssam	if (bitmap == 0xff) {
928193240Ssam		n = 0;
929193240Ssam		/* disable all ba streams */
930193240Ssam		for (bitmap = 0; bitmap < 8; bitmap++) {
931193240Ssam			sp = mwl_hal_bastream_lookup(mh, bitmap);
932193240Ssam			if (sp != NULL) {
933193240Ssam				mwl_bawatchdog(sp);
934193240Ssam				n++;
935193240Ssam			}
936193240Ssam		}
937193240Ssam		if (n == 0) {
938193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
939193240Ssam			    "%s: no BA streams found\n", __func__);
940193240Ssam			sc->sc_stats.mst_bawatchdog_empty++;
941193240Ssam		}
942193240Ssam	} else if (bitmap != 0xaa) {
943193240Ssam		/* disable a single ba stream */
944193240Ssam		sp = mwl_hal_bastream_lookup(mh, bitmap);
945193240Ssam		if (sp != NULL) {
946193240Ssam			mwl_bawatchdog(sp);
947193240Ssam		} else {
948193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
949193240Ssam			    "%s: no BA stream %d\n", __func__, bitmap);
950193240Ssam			sc->sc_stats.mst_bawatchdog_notfound++;
951193240Ssam		}
952193240Ssam	}
953193240Ssam}
954193240Ssam
955193240Ssam/*
956193240Ssam * Convert net80211 channel to a HAL channel.
957193240Ssam */
958193240Ssamstatic void
959193240Ssammwl_mapchan(MWL_HAL_CHANNEL *hc, const struct ieee80211_channel *chan)
960193240Ssam{
961193240Ssam	hc->channel = chan->ic_ieee;
962193240Ssam
963193240Ssam	*(uint32_t *)&hc->channelFlags = 0;
964193240Ssam	if (IEEE80211_IS_CHAN_2GHZ(chan))
965193240Ssam		hc->channelFlags.FreqBand = MWL_FREQ_BAND_2DOT4GHZ;
966193240Ssam	else if (IEEE80211_IS_CHAN_5GHZ(chan))
967193240Ssam		hc->channelFlags.FreqBand = MWL_FREQ_BAND_5GHZ;
968193240Ssam	if (IEEE80211_IS_CHAN_HT40(chan)) {
969193240Ssam		hc->channelFlags.ChnlWidth = MWL_CH_40_MHz_WIDTH;
970193240Ssam		if (IEEE80211_IS_CHAN_HT40U(chan))
971193240Ssam			hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_ABOVE_CTRL_CH;
972193240Ssam		else
973193240Ssam			hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_BELOW_CTRL_CH;
974193240Ssam	} else
975193240Ssam		hc->channelFlags.ChnlWidth = MWL_CH_20_MHz_WIDTH;
976193240Ssam	/* XXX 10MHz channels */
977193240Ssam}
978193240Ssam
979193240Ssam/*
980193240Ssam * Inform firmware of our tx/rx dma setup.  The BAR 0
981193240Ssam * writes below are for compatibility with older firmware.
982193240Ssam * For current firmware we send this information with a
983193240Ssam * cmd block via mwl_hal_sethwdma.
984193240Ssam */
985193240Ssamstatic int
986193240Ssammwl_setupdma(struct mwl_softc *sc)
987193240Ssam{
988193240Ssam	int error, i;
989193240Ssam
990193240Ssam	sc->sc_hwdma.rxDescRead = sc->sc_rxdma.dd_desc_paddr;
991193240Ssam	WR4(sc, sc->sc_hwspecs.rxDescRead, sc->sc_hwdma.rxDescRead);
992193240Ssam	WR4(sc, sc->sc_hwspecs.rxDescWrite, sc->sc_hwdma.rxDescRead);
993193240Ssam
994193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++) {
995193240Ssam		struct mwl_txq *txq = &sc->sc_txq[i];
996193240Ssam		sc->sc_hwdma.wcbBase[i] = txq->dma.dd_desc_paddr;
997193240Ssam		WR4(sc, sc->sc_hwspecs.wcbBase[i], sc->sc_hwdma.wcbBase[i]);
998193240Ssam	}
999193240Ssam	sc->sc_hwdma.maxNumTxWcb = mwl_txbuf;
1000193240Ssam	sc->sc_hwdma.maxNumWCB = MWL_NUM_TX_QUEUES;
1001193240Ssam
1002193240Ssam	error = mwl_hal_sethwdma(sc->sc_mh, &sc->sc_hwdma);
1003193240Ssam	if (error != 0) {
1004193240Ssam		device_printf(sc->sc_dev,
1005193240Ssam		    "unable to setup tx/rx dma; hal status %u\n", error);
1006193240Ssam		/* XXX */
1007193240Ssam	}
1008193240Ssam	return error;
1009193240Ssam}
1010193240Ssam
1011193240Ssam/*
1012193240Ssam * Inform firmware of tx rate parameters.
1013193240Ssam * Called after a channel change.
1014193240Ssam */
1015193240Ssamstatic int
1016193240Ssammwl_setcurchanrates(struct mwl_softc *sc)
1017193240Ssam{
1018193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1019193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1020193240Ssam	const struct ieee80211_rateset *rs;
1021193240Ssam	MWL_HAL_TXRATE rates;
1022193240Ssam
1023193240Ssam	memset(&rates, 0, sizeof(rates));
1024193240Ssam	rs = ieee80211_get_suprates(ic, ic->ic_curchan);
1025193240Ssam	/* rate used to send management frames */
1026193240Ssam	rates.MgtRate = rs->rs_rates[0] & IEEE80211_RATE_VAL;
1027193240Ssam	/* rate used to send multicast frames */
1028193240Ssam	rates.McastRate = rates.MgtRate;
1029193240Ssam
1030193240Ssam	return mwl_hal_settxrate_auto(sc->sc_mh, &rates);
1031193240Ssam}
1032193240Ssam
1033193240Ssam/*
1034193240Ssam * Inform firmware of tx rate parameters.  Called whenever
1035193240Ssam * user-settable params change and after a channel change.
1036193240Ssam */
1037193240Ssamstatic int
1038193240Ssammwl_setrates(struct ieee80211vap *vap)
1039193240Ssam{
1040193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1041193240Ssam	struct ieee80211_node *ni = vap->iv_bss;
1042193240Ssam	const struct ieee80211_txparam *tp = ni->ni_txparms;
1043193240Ssam	MWL_HAL_TXRATE rates;
1044193240Ssam
1045193240Ssam	KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state));
1046193240Ssam
1047193240Ssam	/*
1048193240Ssam	 * Update the h/w rate map.
1049193240Ssam	 * NB: 0x80 for MCS is passed through unchanged
1050193240Ssam	 */
1051193240Ssam	memset(&rates, 0, sizeof(rates));
1052193240Ssam	/* rate used to send management frames */
1053193240Ssam	rates.MgtRate = tp->mgmtrate;
1054193240Ssam	/* rate used to send multicast frames */
1055193240Ssam	rates.McastRate = tp->mcastrate;
1056193240Ssam
1057193240Ssam	/* while here calculate EAPOL fixed rate cookie */
1058193240Ssam	mvp->mv_eapolformat = htole16(mwl_calcformat(rates.MgtRate, ni));
1059193240Ssam
1060193240Ssam	return mwl_hal_settxrate(mvp->mv_hvap, RATE_AUTO, &rates);
1061193240Ssam}
1062193240Ssam
1063193240Ssam/*
1064193240Ssam * Setup a fixed xmit rate cookie for EAPOL frames.
1065193240Ssam */
1066193240Ssamstatic void
1067193240Ssammwl_seteapolformat(struct ieee80211vap *vap)
1068193240Ssam{
1069193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1070193240Ssam	struct ieee80211_node *ni = vap->iv_bss;
1071193240Ssam	enum ieee80211_phymode mode;
1072193240Ssam	uint8_t rate;
1073193240Ssam
1074193240Ssam	KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state));
1075193240Ssam
1076193240Ssam	mode = ieee80211_chan2mode(ni->ni_chan);
1077193240Ssam	/*
1078193240Ssam	 * Use legacy rates when operating a mixed HT+non-HT bss.
1079193240Ssam	 * NB: this may violate POLA for sta and wds vap's.
1080193240Ssam	 */
1081193240Ssam	if (mode == IEEE80211_MODE_11NA &&
1082193240Ssam	    (vap->iv_flags_ext & IEEE80211_FEXT_PUREN) == 0)
1083193240Ssam		rate = vap->iv_txparms[IEEE80211_MODE_11A].mgmtrate;
1084193240Ssam	else if (mode == IEEE80211_MODE_11NG &&
1085193240Ssam	    (vap->iv_flags_ext & IEEE80211_FEXT_PUREN) == 0)
1086193240Ssam		rate = vap->iv_txparms[IEEE80211_MODE_11G].mgmtrate;
1087193240Ssam	else
1088193240Ssam		rate = vap->iv_txparms[mode].mgmtrate;
1089193240Ssam
1090193240Ssam	mvp->mv_eapolformat = htole16(mwl_calcformat(rate, ni));
1091193240Ssam}
1092193240Ssam
1093193240Ssam/*
1094193240Ssam * Map SKU+country code to region code for radar bin'ing.
1095193240Ssam */
1096193240Ssamstatic int
1097193240Ssammwl_map2regioncode(const struct ieee80211_regdomain *rd)
1098193240Ssam{
1099193240Ssam	switch (rd->regdomain) {
1100193240Ssam	case SKU_FCC:
1101193240Ssam	case SKU_FCC3:
1102193240Ssam		return DOMAIN_CODE_FCC;
1103193240Ssam	case SKU_CA:
1104193240Ssam		return DOMAIN_CODE_IC;
1105193240Ssam	case SKU_ETSI:
1106193240Ssam	case SKU_ETSI2:
1107193240Ssam	case SKU_ETSI3:
1108193240Ssam		if (rd->country == CTRY_SPAIN)
1109193240Ssam			return DOMAIN_CODE_SPAIN;
1110193240Ssam		if (rd->country == CTRY_FRANCE || rd->country == CTRY_FRANCE2)
1111193240Ssam			return DOMAIN_CODE_FRANCE;
1112193240Ssam		/* XXX force 1.3.1 radar type */
1113193240Ssam		return DOMAIN_CODE_ETSI_131;
1114193240Ssam	case SKU_JAPAN:
1115193240Ssam		return DOMAIN_CODE_MKK;
1116193240Ssam	case SKU_ROW:
1117193240Ssam		return DOMAIN_CODE_DGT;	/* Taiwan */
1118193240Ssam	case SKU_APAC:
1119193240Ssam	case SKU_APAC2:
1120193240Ssam	case SKU_APAC3:
1121193240Ssam		return DOMAIN_CODE_AUS;	/* Australia */
1122193240Ssam	}
1123193240Ssam	/* XXX KOREA? */
1124193240Ssam	return DOMAIN_CODE_FCC;			/* XXX? */
1125193240Ssam}
1126193240Ssam
1127193240Ssamstatic int
1128193240Ssammwl_hal_reset(struct mwl_softc *sc)
1129193240Ssam{
1130193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1131193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1132193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1133193240Ssam
1134193240Ssam	mwl_hal_setantenna(mh, WL_ANTENNATYPE_RX, sc->sc_rxantenna);
1135193240Ssam	mwl_hal_setantenna(mh, WL_ANTENNATYPE_TX, sc->sc_txantenna);
1136193240Ssam	mwl_hal_setradio(mh, 1, WL_AUTO_PREAMBLE);
1137193240Ssam	mwl_hal_setwmm(sc->sc_mh, (ic->ic_flags & IEEE80211_F_WME) != 0);
1138193240Ssam	mwl_chan_set(sc, ic->ic_curchan);
1139193240Ssam	mwl_hal_setrateadaptmode(mh, ic->ic_regdomain.location == 'O');
1140193240Ssam	mwl_hal_setoptimizationlevel(mh,
1141193240Ssam	    (ic->ic_flags & IEEE80211_F_BURST) != 0);
1142193240Ssam
1143193240Ssam	mwl_hal_setregioncode(mh, mwl_map2regioncode(&ic->ic_regdomain));
1144193240Ssam
1145193240Ssam	return 1;
1146193240Ssam}
1147193240Ssam
1148193240Ssamstatic int
1149193240Ssammwl_init_locked(struct mwl_softc *sc)
1150193240Ssam{
1151193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1152193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1153193240Ssam	int error = 0;
1154193240Ssam
1155193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n",
1156193240Ssam		__func__, ifp->if_flags);
1157193240Ssam
1158193240Ssam	MWL_LOCK_ASSERT(sc);
1159193240Ssam
1160193240Ssam	/*
1161193240Ssam	 * Stop anything previously setup.  This is safe
1162193240Ssam	 * whether this is the first time through or not.
1163193240Ssam	 */
1164193240Ssam	mwl_stop_locked(ifp, 0);
1165193240Ssam
1166193240Ssam	/*
1167193240Ssam	 * Push vap-independent state to the firmware.
1168193240Ssam	 */
1169193240Ssam	if (!mwl_hal_reset(sc)) {
1170193240Ssam		if_printf(ifp, "unable to reset hardware\n");
1171193240Ssam		return EIO;
1172193240Ssam	}
1173193240Ssam
1174193240Ssam	/*
1175193240Ssam	 * Setup recv (once); transmit is already good to go.
1176193240Ssam	 */
1177193240Ssam	error = mwl_startrecv(sc);
1178193240Ssam	if (error != 0) {
1179193240Ssam		if_printf(ifp, "unable to start recv logic\n");
1180193240Ssam		return error;
1181193240Ssam	}
1182193240Ssam
1183193240Ssam	/*
1184193240Ssam	 * Enable interrupts.
1185193240Ssam	 */
1186193240Ssam	sc->sc_imask = MACREG_A2HRIC_BIT_RX_RDY
1187193240Ssam		     | MACREG_A2HRIC_BIT_TX_DONE
1188193240Ssam		     | MACREG_A2HRIC_BIT_OPC_DONE
1189193240Ssam#if 0
1190193240Ssam		     | MACREG_A2HRIC_BIT_MAC_EVENT
1191193240Ssam#endif
1192193240Ssam		     | MACREG_A2HRIC_BIT_ICV_ERROR
1193193240Ssam		     | MACREG_A2HRIC_BIT_RADAR_DETECT
1194193240Ssam		     | MACREG_A2HRIC_BIT_CHAN_SWITCH
1195193240Ssam#if 0
1196193240Ssam		     | MACREG_A2HRIC_BIT_QUEUE_EMPTY
1197193240Ssam#endif
1198193240Ssam		     | MACREG_A2HRIC_BIT_BA_WATCHDOG
1199193240Ssam		     ;
1200193240Ssam
1201193240Ssam	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1202193240Ssam	mwl_hal_intrset(mh, sc->sc_imask);
1203193240Ssam
1204193240Ssam	return 0;
1205193240Ssam}
1206193240Ssam
1207193240Ssamstatic void
1208193240Ssammwl_init(void *arg)
1209193240Ssam{
1210193240Ssam	struct mwl_softc *sc = arg;
1211193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1212193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1213193240Ssam	int error = 0;
1214193240Ssam
1215193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n",
1216193240Ssam		__func__, ifp->if_flags);
1217193240Ssam
1218193240Ssam	MWL_LOCK(sc);
1219193240Ssam	error = mwl_init_locked(sc);
1220193240Ssam	MWL_UNLOCK(sc);
1221193240Ssam
1222193240Ssam	if (error == 0)
1223193240Ssam		ieee80211_start_all(ic);	/* start all vap's */
1224193240Ssam}
1225193240Ssam
1226193240Ssamstatic void
1227193240Ssammwl_stop_locked(struct ifnet *ifp, int disable)
1228193240Ssam{
1229193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1230193240Ssam
1231193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1232193240Ssam		__func__, sc->sc_invalid, ifp->if_flags);
1233193240Ssam
1234193240Ssam	MWL_LOCK_ASSERT(sc);
1235193240Ssam	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1236193240Ssam		/*
1237193240Ssam		 * Shutdown the hardware and driver.
1238193240Ssam		 */
1239193240Ssam		ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1240193240Ssam		ifp->if_timer = 0;
1241193240Ssam		mwl_draintxq(sc);
1242193240Ssam	}
1243193240Ssam}
1244193240Ssam
1245193240Ssamstatic void
1246193240Ssammwl_stop(struct ifnet *ifp, int disable)
1247193240Ssam{
1248193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1249193240Ssam
1250193240Ssam	MWL_LOCK(sc);
1251193240Ssam	mwl_stop_locked(ifp, disable);
1252193240Ssam	MWL_UNLOCK(sc);
1253193240Ssam}
1254193240Ssam
1255193240Ssamstatic int
1256193240Ssammwl_reset_vap(struct ieee80211vap *vap, int state)
1257193240Ssam{
1258193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1259193240Ssam	struct ieee80211com *ic = vap->iv_ic;
1260193240Ssam
1261193240Ssam	if (state == IEEE80211_S_RUN)
1262193240Ssam		mwl_setrates(vap);
1263193240Ssam	/* XXX off by 1? */
1264193240Ssam	mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold);
1265193240Ssam	/* XXX auto? 20/40 split? */
1266193240Ssam	mwl_hal_sethtgi(hvap, (vap->iv_flags_ext &
1267193240Ssam	    (IEEE80211_FEXT_SHORTGI20|IEEE80211_FEXT_SHORTGI40)) ? 1 : 0);
1268193240Ssam	mwl_hal_setnprot(hvap, ic->ic_htprotmode == IEEE80211_PROT_NONE ?
1269193240Ssam	    HTPROTECT_NONE : HTPROTECT_AUTO);
1270193240Ssam	/* XXX txpower cap */
1271193240Ssam
1272193240Ssam	/* re-setup beacons */
1273193240Ssam	if (state == IEEE80211_S_RUN &&
1274193240Ssam	    (vap->iv_opmode == IEEE80211_M_HOSTAP ||
1275193240Ssam	     vap->iv_opmode == IEEE80211_M_IBSS)) {
1276193240Ssam		mwl_setapmode(vap, vap->iv_bss->ni_chan);
1277193240Ssam		mwl_hal_setnprotmode(hvap,
1278193240Ssam		    MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE));
1279193240Ssam		return mwl_beacon_setup(vap);
1280193240Ssam	}
1281193240Ssam	return 0;
1282193240Ssam}
1283193240Ssam
1284193240Ssam/*
1285193240Ssam * Reset the hardware w/o losing operational state.
1286193240Ssam * Used to to reset or reload hardware state for a vap.
1287193240Ssam */
1288193240Ssamstatic int
1289193240Ssammwl_reset(struct ieee80211vap *vap, u_long cmd)
1290193240Ssam{
1291193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1292193240Ssam	int error = 0;
1293193240Ssam
1294193240Ssam	if (hvap != NULL) {			/* WDS, MONITOR, etc. */
1295193240Ssam		struct ieee80211com *ic = vap->iv_ic;
1296193240Ssam		struct ifnet *ifp = ic->ic_ifp;
1297193240Ssam		struct mwl_softc *sc = ifp->if_softc;
1298193240Ssam		struct mwl_hal *mh = sc->sc_mh;
1299193240Ssam
1300193240Ssam		/* XXX do we need to disable interrupts? */
1301193240Ssam		mwl_hal_intrset(mh, 0);		/* disable interrupts */
1302193240Ssam		error = mwl_reset_vap(vap, vap->iv_state);
1303193240Ssam		mwl_hal_intrset(mh, sc->sc_imask);
1304193240Ssam	}
1305193240Ssam	return error;
1306193240Ssam}
1307193240Ssam
1308193240Ssam/*
1309193240Ssam * Allocate a tx buffer for sending a frame.  The
1310193240Ssam * packet is assumed to have the WME AC stored so
1311193240Ssam * we can use it to select the appropriate h/w queue.
1312193240Ssam */
1313193240Ssamstatic struct mwl_txbuf *
1314193240Ssammwl_gettxbuf(struct mwl_softc *sc, struct mwl_txq *txq)
1315193240Ssam{
1316193240Ssam	struct mwl_txbuf *bf;
1317193240Ssam
1318193240Ssam	/*
1319193240Ssam	 * Grab a TX buffer and associated resources.
1320193240Ssam	 */
1321193240Ssam	MWL_TXQ_LOCK(txq);
1322193240Ssam	bf = STAILQ_FIRST(&txq->free);
1323193240Ssam	if (bf != NULL) {
1324193240Ssam		STAILQ_REMOVE_HEAD(&txq->free, bf_list);
1325193240Ssam		txq->nfree--;
1326193240Ssam	}
1327193240Ssam	MWL_TXQ_UNLOCK(txq);
1328193240Ssam	if (bf == NULL)
1329193240Ssam		DPRINTF(sc, MWL_DEBUG_XMIT,
1330193240Ssam		    "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
1331193240Ssam	return bf;
1332193240Ssam}
1333193240Ssam
1334193240Ssam/*
1335193240Ssam * Return a tx buffer to the queue it came from.  Note there
1336193240Ssam * are two cases because we must preserve the order of buffers
1337193240Ssam * as it reflects the fixed order of descriptors in memory
1338193240Ssam * (the firmware pre-fetches descriptors so we cannot reorder).
1339193240Ssam */
1340193240Ssamstatic void
1341193240Ssammwl_puttxbuf_head(struct mwl_txq *txq, struct mwl_txbuf *bf)
1342193240Ssam{
1343193240Ssam	bf->bf_m = NULL;
1344193240Ssam	bf->bf_node = NULL;
1345193240Ssam	MWL_TXQ_LOCK(txq);
1346193240Ssam	STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1347193240Ssam	txq->nfree++;
1348193240Ssam	MWL_TXQ_UNLOCK(txq);
1349193240Ssam}
1350193240Ssam
1351193240Ssamstatic void
1352193240Ssammwl_puttxbuf_tail(struct mwl_txq *txq, struct mwl_txbuf *bf)
1353193240Ssam{
1354193240Ssam	bf->bf_m = NULL;
1355193240Ssam	bf->bf_node = NULL;
1356193240Ssam	MWL_TXQ_LOCK(txq);
1357193240Ssam	STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1358193240Ssam	txq->nfree++;
1359193240Ssam	MWL_TXQ_UNLOCK(txq);
1360193240Ssam}
1361193240Ssam
1362193240Ssamstatic void
1363193240Ssammwl_start(struct ifnet *ifp)
1364193240Ssam{
1365193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1366193240Ssam	struct ieee80211_node *ni;
1367193240Ssam	struct mwl_txbuf *bf;
1368193240Ssam	struct mbuf *m;
1369193240Ssam	struct mwl_txq *txq = NULL;	/* XXX silence gcc */
1370193240Ssam	int nqueued;
1371193240Ssam
1372193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid)
1373193240Ssam		return;
1374193240Ssam	nqueued = 0;
1375193240Ssam	for (;;) {
1376193240Ssam		bf = NULL;
1377193240Ssam		IFQ_DEQUEUE(&ifp->if_snd, m);
1378193240Ssam		if (m == NULL)
1379193240Ssam			break;
1380193240Ssam		/*
1381193240Ssam		 * Grab the node for the destination.
1382193240Ssam		 */
1383193240Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1384193240Ssam		KASSERT(ni != NULL, ("no node"));
1385193240Ssam		m->m_pkthdr.rcvif = NULL;	/* committed, clear ref */
1386193240Ssam		/*
1387193240Ssam		 * Grab a TX buffer and associated resources.
1388193240Ssam		 * We honor the classification by the 802.11 layer.
1389193240Ssam		 */
1390193240Ssam		txq = sc->sc_ac2q[M_WME_GETAC(m)];
1391193240Ssam		bf = mwl_gettxbuf(sc, txq);
1392193240Ssam		if (bf == NULL) {
1393193240Ssam			m_freem(m);
1394193240Ssam			ieee80211_free_node(ni);
1395193240Ssam#ifdef MWL_TX_NODROP
1396193240Ssam			sc->sc_stats.mst_tx_qstop++;
1397193240Ssam			/* XXX blocks other traffic */
1398193240Ssam			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1399193240Ssam			break;
1400193240Ssam#else
1401193240Ssam			DPRINTF(sc, MWL_DEBUG_XMIT,
1402193240Ssam			    "%s: tail drop on q %d\n", __func__, txq->qnum);
1403193240Ssam			sc->sc_stats.mst_tx_qdrop++;
1404193240Ssam			continue;
1405193240Ssam#endif /* MWL_TX_NODROP */
1406193240Ssam		}
1407193240Ssam
1408193240Ssam		/*
1409193240Ssam		 * Pass the frame to the h/w for transmission.
1410193240Ssam		 */
1411193240Ssam		if (mwl_tx_start(sc, ni, bf, m)) {
1412193240Ssam			ifp->if_oerrors++;
1413193240Ssam			mwl_puttxbuf_head(txq, bf);
1414193240Ssam			ieee80211_free_node(ni);
1415193240Ssam			continue;
1416193240Ssam		}
1417193240Ssam		nqueued++;
1418193240Ssam		if (nqueued >= mwl_txcoalesce) {
1419193240Ssam			/*
1420193240Ssam			 * Poke the firmware to process queued frames;
1421193240Ssam			 * see below about (lack of) locking.
1422193240Ssam			 */
1423193240Ssam			nqueued = 0;
1424193240Ssam			mwl_hal_txstart(sc->sc_mh, 0/*XXX*/);
1425193240Ssam		}
1426193240Ssam	}
1427193240Ssam	if (nqueued) {
1428193240Ssam		/*
1429193240Ssam		 * NB: We don't need to lock against tx done because
1430193240Ssam		 * this just prods the firmware to check the transmit
1431193240Ssam		 * descriptors.  The firmware will also start fetching
1432193240Ssam		 * descriptors by itself if it notices new ones are
1433193240Ssam		 * present when it goes to deliver a tx done interrupt
1434193240Ssam		 * to the host. So if we race with tx done processing
1435193240Ssam		 * it's ok.  Delivering the kick here rather than in
1436193240Ssam		 * mwl_tx_start is an optimization to avoid poking the
1437193240Ssam		 * firmware for each packet.
1438193240Ssam		 *
1439193240Ssam		 * NB: the queue id isn't used so 0 is ok.
1440193240Ssam		 */
1441193240Ssam		mwl_hal_txstart(sc->sc_mh, 0/*XXX*/);
1442193240Ssam	}
1443193240Ssam}
1444193240Ssam
1445193240Ssamstatic int
1446193240Ssammwl_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1447193240Ssam	const struct ieee80211_bpf_params *params)
1448193240Ssam{
1449193240Ssam	struct ieee80211com *ic = ni->ni_ic;
1450193240Ssam	struct ifnet *ifp = ic->ic_ifp;
1451193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1452193240Ssam	struct mwl_txbuf *bf;
1453193240Ssam	struct mwl_txq *txq;
1454193240Ssam
1455193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
1456193240Ssam		ieee80211_free_node(ni);
1457193240Ssam		m_freem(m);
1458193240Ssam		return ENETDOWN;
1459193240Ssam	}
1460193240Ssam	/*
1461193240Ssam	 * Grab a TX buffer and associated resources.
1462193240Ssam	 * Note that we depend on the classification
1463193240Ssam	 * by the 802.11 layer to get to the right h/w
1464193240Ssam	 * queue.  Management frames must ALWAYS go on
1465193240Ssam	 * queue 1 but we cannot just force that here
1466193240Ssam	 * because we may receive non-mgt frames.
1467193240Ssam	 */
1468193240Ssam	txq = sc->sc_ac2q[M_WME_GETAC(m)];
1469193240Ssam	bf = mwl_gettxbuf(sc, txq);
1470193240Ssam	if (bf == NULL) {
1471193240Ssam		sc->sc_stats.mst_tx_qstop++;
1472193240Ssam		/* XXX blocks other traffic */
1473193240Ssam		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1474193240Ssam		ieee80211_free_node(ni);
1475193240Ssam		m_freem(m);
1476193240Ssam		return ENOBUFS;
1477193240Ssam	}
1478193240Ssam	/*
1479193240Ssam	 * Pass the frame to the h/w for transmission.
1480193240Ssam	 */
1481193240Ssam	if (mwl_tx_start(sc, ni, bf, m)) {
1482193240Ssam		ifp->if_oerrors++;
1483193240Ssam		mwl_puttxbuf_head(txq, bf);
1484193240Ssam
1485193240Ssam		ieee80211_free_node(ni);
1486193240Ssam		return EIO;		/* XXX */
1487193240Ssam	}
1488193240Ssam	/*
1489193240Ssam	 * NB: We don't need to lock against tx done because
1490193240Ssam	 * this just prods the firmware to check the transmit
1491193240Ssam	 * descriptors.  The firmware will also start fetching
1492193240Ssam	 * descriptors by itself if it notices new ones are
1493193240Ssam	 * present when it goes to deliver a tx done interrupt
1494193240Ssam	 * to the host. So if we race with tx done processing
1495193240Ssam	 * it's ok.  Delivering the kick here rather than in
1496193240Ssam	 * mwl_tx_start is an optimization to avoid poking the
1497193240Ssam	 * firmware for each packet.
1498193240Ssam	 *
1499193240Ssam	 * NB: the queue id isn't used so 0 is ok.
1500193240Ssam	 */
1501193240Ssam	mwl_hal_txstart(sc->sc_mh, 0/*XXX*/);
1502193240Ssam	return 0;
1503193240Ssam}
1504193240Ssam
1505193240Ssamstatic int
1506193240Ssammwl_media_change(struct ifnet *ifp)
1507193240Ssam{
1508193240Ssam	struct ieee80211vap *vap = ifp->if_softc;
1509193240Ssam	int error;
1510193240Ssam
1511193240Ssam	error = ieee80211_media_change(ifp);
1512193240Ssam	/* NB: only the fixed rate can change and that doesn't need a reset */
1513193240Ssam	if (error == ENETRESET) {
1514193240Ssam		mwl_setrates(vap);
1515193240Ssam		error = 0;
1516193240Ssam	}
1517193240Ssam	return error;
1518193240Ssam}
1519193240Ssam
1520193240Ssam#ifdef MWL_DEBUG
1521193240Ssamstatic void
1522193240Ssammwl_keyprint(struct mwl_softc *sc, const char *tag,
1523193240Ssam	const MWL_HAL_KEYVAL *hk, const uint8_t mac[IEEE80211_ADDR_LEN])
1524193240Ssam{
1525193240Ssam	static const char *ciphers[] = {
1526193240Ssam		"WEP",
1527193240Ssam		"TKIP",
1528193240Ssam		"AES-CCM",
1529193240Ssam	};
1530193240Ssam	int i, n;
1531193240Ssam
1532193240Ssam	printf("%s: [%u] %-7s", tag, hk->keyIndex, ciphers[hk->keyTypeId]);
1533193240Ssam	for (i = 0, n = hk->keyLen; i < n; i++)
1534193240Ssam		printf(" %02x", hk->key.aes[i]);
1535193240Ssam	printf(" mac %s", ether_sprintf(mac));
1536193240Ssam	if (hk->keyTypeId == KEY_TYPE_ID_TKIP) {
1537193240Ssam		printf(" %s", "rxmic");
1538193240Ssam		for (i = 0; i < sizeof(hk->key.tkip.rxMic); i++)
1539193240Ssam			printf(" %02x", hk->key.tkip.rxMic[i]);
1540193240Ssam		printf(" txmic");
1541193240Ssam		for (i = 0; i < sizeof(hk->key.tkip.txMic); i++)
1542193240Ssam			printf(" %02x", hk->key.tkip.txMic[i]);
1543193240Ssam	}
1544193240Ssam	printf(" flags 0x%x\n", hk->keyFlags);
1545193240Ssam}
1546193240Ssam#endif
1547193240Ssam
1548193240Ssam/*
1549193240Ssam * Allocate a key cache slot for a unicast key.  The
1550193240Ssam * firmware handles key allocation and every station is
1551193240Ssam * guaranteed key space so we are always successful.
1552193240Ssam */
1553193240Ssamstatic int
1554193240Ssammwl_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k,
1555193240Ssam	ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix)
1556193240Ssam{
1557193240Ssam	struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
1558193240Ssam
1559193240Ssam	if (k->wk_keyix != IEEE80211_KEYIX_NONE ||
1560193240Ssam	    (k->wk_flags & IEEE80211_KEY_GROUP)) {
1561193240Ssam		if (!(&vap->iv_nw_keys[0] <= k &&
1562193240Ssam		      k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) {
1563193240Ssam			/* should not happen */
1564193240Ssam			DPRINTF(sc, MWL_DEBUG_KEYCACHE,
1565193240Ssam				"%s: bogus group key\n", __func__);
1566193240Ssam			return 0;
1567193240Ssam		}
1568193240Ssam		/* give the caller what they requested */
1569193240Ssam		*keyix = *rxkeyix = k - vap->iv_nw_keys;
1570193240Ssam	} else {
1571193240Ssam		/*
1572193240Ssam		 * Firmware handles key allocation.
1573193240Ssam		 */
1574193240Ssam		*keyix = *rxkeyix = 0;
1575193240Ssam	}
1576193240Ssam	return 1;
1577193240Ssam}
1578193240Ssam
1579193240Ssam/*
1580193240Ssam * Delete a key entry allocated by mwl_key_alloc.
1581193240Ssam */
1582193240Ssamstatic int
1583193240Ssammwl_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k)
1584193240Ssam{
1585193240Ssam	struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
1586193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1587193240Ssam	MWL_HAL_KEYVAL hk;
1588193240Ssam	const uint8_t bcastaddr[IEEE80211_ADDR_LEN] =
1589193240Ssam	    { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
1590193240Ssam
1591193240Ssam	if (hvap == NULL) {
1592193240Ssam		if (vap->iv_opmode != IEEE80211_M_WDS) {
1593193240Ssam			/* XXX monitor mode? */
1594193240Ssam			DPRINTF(sc, MWL_DEBUG_KEYCACHE,
1595193240Ssam			    "%s: no hvap for opmode %d\n", __func__,
1596193240Ssam			    vap->iv_opmode);
1597193240Ssam			return 0;
1598193240Ssam		}
1599193240Ssam		hvap = MWL_VAP(vap)->mv_ap_hvap;
1600193240Ssam	}
1601193240Ssam
1602193240Ssam	DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: delete key %u\n",
1603193240Ssam	    __func__, k->wk_keyix);
1604193240Ssam
1605193240Ssam	memset(&hk, 0, sizeof(hk));
1606193240Ssam	hk.keyIndex = k->wk_keyix;
1607193240Ssam	switch (k->wk_cipher->ic_cipher) {
1608193240Ssam	case IEEE80211_CIPHER_WEP:
1609193240Ssam		hk.keyTypeId = KEY_TYPE_ID_WEP;
1610193240Ssam		break;
1611193240Ssam	case IEEE80211_CIPHER_TKIP:
1612193240Ssam		hk.keyTypeId = KEY_TYPE_ID_TKIP;
1613193240Ssam		break;
1614193240Ssam	case IEEE80211_CIPHER_AES_CCM:
1615193240Ssam		hk.keyTypeId = KEY_TYPE_ID_AES;
1616193240Ssam		break;
1617193240Ssam	default:
1618193240Ssam		/* XXX should not happen */
1619193240Ssam		DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n",
1620193240Ssam		    __func__, k->wk_cipher->ic_cipher);
1621193240Ssam		return 0;
1622193240Ssam	}
1623193240Ssam	return (mwl_hal_keyreset(hvap, &hk, bcastaddr) == 0);	/*XXX*/
1624193240Ssam}
1625193240Ssam
1626193240Ssamstatic __inline int
1627193240Ssamaddgroupflags(MWL_HAL_KEYVAL *hk, const struct ieee80211_key *k)
1628193240Ssam{
1629193240Ssam	if (k->wk_flags & IEEE80211_KEY_GROUP) {
1630193240Ssam		if (k->wk_flags & IEEE80211_KEY_XMIT)
1631193240Ssam			hk->keyFlags |= KEY_FLAG_TXGROUPKEY;
1632193240Ssam		if (k->wk_flags & IEEE80211_KEY_RECV)
1633193240Ssam			hk->keyFlags |= KEY_FLAG_RXGROUPKEY;
1634193240Ssam		return 1;
1635193240Ssam	} else
1636193240Ssam		return 0;
1637193240Ssam}
1638193240Ssam
1639193240Ssam/*
1640193240Ssam * Set the key cache contents for the specified key.  Key cache
1641193240Ssam * slot(s) must already have been allocated by mwl_key_alloc.
1642193240Ssam */
1643193240Ssamstatic int
1644193240Ssammwl_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k,
1645193240Ssam	const uint8_t mac[IEEE80211_ADDR_LEN])
1646193240Ssam{
1647193240Ssam#define	GRPXMIT	(IEEE80211_KEY_XMIT | IEEE80211_KEY_GROUP)
1648193240Ssam/* NB: static wep keys are marked GROUP+tx/rx; GTK will be tx or rx */
1649193240Ssam#define	IEEE80211_IS_STATICKEY(k) \
1650193240Ssam	(((k)->wk_flags & (GRPXMIT|IEEE80211_KEY_RECV)) == \
1651193240Ssam	 (GRPXMIT|IEEE80211_KEY_RECV))
1652193240Ssam	struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
1653193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1654193240Ssam	const struct ieee80211_cipher *cip = k->wk_cipher;
1655193240Ssam	const uint8_t *macaddr;
1656193240Ssam	MWL_HAL_KEYVAL hk;
1657193240Ssam
1658193240Ssam	KASSERT((k->wk_flags & IEEE80211_KEY_SWCRYPT) == 0,
1659193240Ssam		("s/w crypto set?"));
1660193240Ssam
1661193240Ssam	if (hvap == NULL) {
1662193240Ssam		if (vap->iv_opmode != IEEE80211_M_WDS) {
1663193240Ssam			/* XXX monitor mode? */
1664193240Ssam			DPRINTF(sc, MWL_DEBUG_KEYCACHE,
1665193240Ssam			    "%s: no hvap for opmode %d\n", __func__,
1666193240Ssam			    vap->iv_opmode);
1667193240Ssam			return 0;
1668193240Ssam		}
1669193240Ssam		hvap = MWL_VAP(vap)->mv_ap_hvap;
1670193240Ssam	}
1671193240Ssam	memset(&hk, 0, sizeof(hk));
1672193240Ssam	hk.keyIndex = k->wk_keyix;
1673193240Ssam	switch (cip->ic_cipher) {
1674193240Ssam	case IEEE80211_CIPHER_WEP:
1675193240Ssam		hk.keyTypeId = KEY_TYPE_ID_WEP;
1676193240Ssam		hk.keyLen = k->wk_keylen;
1677193240Ssam		if (k->wk_keyix == vap->iv_def_txkey)
1678193240Ssam			hk.keyFlags = KEY_FLAG_WEP_TXKEY;
1679193240Ssam		if (!IEEE80211_IS_STATICKEY(k)) {
1680193240Ssam			/* NB: WEP is never used for the PTK */
1681193240Ssam			(void) addgroupflags(&hk, k);
1682193240Ssam		}
1683193240Ssam		break;
1684193240Ssam	case IEEE80211_CIPHER_TKIP:
1685193240Ssam		hk.keyTypeId = KEY_TYPE_ID_TKIP;
1686193240Ssam		hk.key.tkip.tsc.high = (uint32_t)(k->wk_keytsc >> 16);
1687193240Ssam		hk.key.tkip.tsc.low = (uint16_t)k->wk_keytsc;
1688193240Ssam		hk.keyFlags = KEY_FLAG_TSC_VALID | KEY_FLAG_MICKEY_VALID;
1689193240Ssam		hk.keyLen = k->wk_keylen + IEEE80211_MICBUF_SIZE;
1690193240Ssam		if (!addgroupflags(&hk, k))
1691193240Ssam			hk.keyFlags |= KEY_FLAG_PAIRWISE;
1692193240Ssam		break;
1693193240Ssam	case IEEE80211_CIPHER_AES_CCM:
1694193240Ssam		hk.keyTypeId = KEY_TYPE_ID_AES;
1695193240Ssam		hk.keyLen = k->wk_keylen;
1696193240Ssam		if (!addgroupflags(&hk, k))
1697193240Ssam			hk.keyFlags |= KEY_FLAG_PAIRWISE;
1698193240Ssam		break;
1699193240Ssam	default:
1700193240Ssam		/* XXX should not happen */
1701193240Ssam		DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n",
1702193240Ssam		    __func__, k->wk_cipher->ic_cipher);
1703193240Ssam		return 0;
1704193240Ssam	}
1705193240Ssam	/*
1706193240Ssam	 * NB: tkip mic keys get copied here too; the layout
1707193240Ssam	 *     just happens to match that in ieee80211_key.
1708193240Ssam	 */
1709193240Ssam	memcpy(hk.key.aes, k->wk_key, hk.keyLen);
1710193240Ssam
1711193240Ssam	/*
1712193240Ssam	 * Locate address of sta db entry for writing key;
1713193240Ssam	 * the convention unfortunately is somewhat different
1714193240Ssam	 * than how net80211, hostapd, and wpa_supplicant think.
1715193240Ssam	 */
1716193240Ssam	if (vap->iv_opmode == IEEE80211_M_STA) {
1717193240Ssam		/*
1718193240Ssam		 * NB: keys plumbed before the sta reaches AUTH state
1719193240Ssam		 * will be discarded or written to the wrong sta db
1720193240Ssam		 * entry because iv_bss is meaningless.  This is ok
1721193240Ssam		 * (right now) because we handle deferred plumbing of
1722193240Ssam		 * WEP keys when the sta reaches AUTH state.
1723193240Ssam		 */
1724193240Ssam		macaddr = vap->iv_bss->ni_bssid;
1725193240Ssam	} else if (vap->iv_opmode == IEEE80211_M_WDS &&
1726193240Ssam	    vap->iv_state != IEEE80211_S_RUN) {
1727193240Ssam		/*
1728193240Ssam		 * Prior to RUN state a WDS vap will not it's BSS node
1729193240Ssam		 * setup so we will plumb the key to the wrong mac
1730193240Ssam		 * address (it'll be our local address).  Workaround
1731193240Ssam		 * this for the moment by grabbing the correct address.
1732193240Ssam		 */
1733193240Ssam		macaddr = vap->iv_des_bssid;
1734193240Ssam	} else if ((k->wk_flags & GRPXMIT) == GRPXMIT)
1735193240Ssam		macaddr = vap->iv_myaddr;
1736193240Ssam	else
1737193240Ssam		macaddr = mac;
1738193240Ssam	KEYPRINTF(sc, &hk, macaddr);
1739193240Ssam	return (mwl_hal_keyset(hvap, &hk, macaddr) == 0);
1740193240Ssam#undef IEEE80211_IS_STATICKEY
1741193240Ssam#undef GRPXMIT
1742193240Ssam}
1743193240Ssam
1744193240Ssam/* unaligned little endian access */
1745193240Ssam#define LE_READ_2(p)				\
1746193240Ssam	((uint16_t)				\
1747193240Ssam	 ((((const uint8_t *)(p))[0]      ) |	\
1748193240Ssam	  (((const uint8_t *)(p))[1] <<  8)))
1749193240Ssam#define LE_READ_4(p)				\
1750193240Ssam	((uint32_t)				\
1751193240Ssam	 ((((const uint8_t *)(p))[0]      ) |	\
1752193240Ssam	  (((const uint8_t *)(p))[1] <<  8) |	\
1753193240Ssam	  (((const uint8_t *)(p))[2] << 16) |	\
1754193240Ssam	  (((const uint8_t *)(p))[3] << 24)))
1755193240Ssam
1756193240Ssam/*
1757193240Ssam * Set the multicast filter contents into the hardware.
1758193240Ssam * XXX f/w has no support; just defer to the os.
1759193240Ssam */
1760193240Ssamstatic void
1761193240Ssammwl_setmcastfilter(struct mwl_softc *sc)
1762193240Ssam{
1763193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1764193240Ssam#if 0
1765193240Ssam	struct ether_multi *enm;
1766193240Ssam	struct ether_multistep estep;
1767193240Ssam	uint8_t macs[IEEE80211_ADDR_LEN*MWL_HAL_MCAST_MAX];/* XXX stack use */
1768193240Ssam	uint8_t *mp;
1769193240Ssam	int nmc;
1770193240Ssam
1771193240Ssam	mp = macs;
1772193240Ssam	nmc = 0;
1773193240Ssam	ETHER_FIRST_MULTI(estep, &sc->sc_ec, enm);
1774193240Ssam	while (enm != NULL) {
1775193240Ssam		/* XXX Punt on ranges. */
1776193240Ssam		if (nmc == MWL_HAL_MCAST_MAX ||
1777193240Ssam		    !IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
1778193240Ssam			ifp->if_flags |= IFF_ALLMULTI;
1779193240Ssam			return;
1780193240Ssam		}
1781193240Ssam		IEEE80211_ADDR_COPY(mp, enm->enm_addrlo);
1782193240Ssam		mp += IEEE80211_ADDR_LEN, nmc++;
1783193240Ssam		ETHER_NEXT_MULTI(estep, enm);
1784193240Ssam	}
1785193240Ssam	ifp->if_flags &= ~IFF_ALLMULTI;
1786193240Ssam	mwl_hal_setmcast(sc->sc_mh, nmc, macs);
1787193240Ssam#else
1788193240Ssam	/* XXX no mcast filter support; we get everything */
1789193240Ssam	ifp->if_flags |= IFF_ALLMULTI;
1790193240Ssam#endif
1791193240Ssam}
1792193240Ssam
1793193240Ssamstatic int
1794193240Ssammwl_mode_init(struct mwl_softc *sc)
1795193240Ssam{
1796193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1797193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1798193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1799193240Ssam
1800193240Ssam	/*
1801193240Ssam	 * NB: Ignore promisc in hostap mode; it's set by the
1802193240Ssam	 * bridge.  This is wrong but we have no way to
1803193240Ssam	 * identify internal requests (from the bridge)
1804193240Ssam	 * versus external requests such as for tcpdump.
1805193240Ssam	 */
1806193240Ssam	mwl_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) &&
1807193240Ssam	    ic->ic_opmode != IEEE80211_M_HOSTAP);
1808193240Ssam	mwl_setmcastfilter(sc);
1809193240Ssam
1810193240Ssam	return 0;
1811193240Ssam}
1812193240Ssam
1813193240Ssam/*
1814193240Ssam * Callback from the 802.11 layer after a multicast state change.
1815193240Ssam */
1816193240Ssamstatic void
1817193240Ssammwl_update_mcast(struct ifnet *ifp)
1818193240Ssam{
1819193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1820193240Ssam
1821193240Ssam	mwl_setmcastfilter(sc);
1822193240Ssam}
1823193240Ssam
1824193240Ssam/*
1825193240Ssam * Callback from the 802.11 layer after a promiscuous mode change.
1826193240Ssam * Note this interface does not check the operating mode as this
1827193240Ssam * is an internal callback and we are expected to honor the current
1828193240Ssam * state (e.g. this is used for setting the interface in promiscuous
1829193240Ssam * mode when operating in hostap mode to do ACS).
1830193240Ssam */
1831193240Ssamstatic void
1832193240Ssammwl_update_promisc(struct ifnet *ifp)
1833193240Ssam{
1834193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1835193240Ssam
1836193240Ssam	mwl_hal_setpromisc(sc->sc_mh, (ifp->if_flags & IFF_PROMISC) != 0);
1837193240Ssam}
1838193240Ssam
1839193240Ssam/*
1840193240Ssam * Callback from the 802.11 layer to update the slot time
1841193240Ssam * based on the current setting.  We use it to notify the
1842193240Ssam * firmware of ERP changes and the f/w takes care of things
1843193240Ssam * like slot time and preamble.
1844193240Ssam */
1845193240Ssamstatic void
1846193240Ssammwl_updateslot(struct ifnet *ifp)
1847193240Ssam{
1848193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1849193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1850193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1851193240Ssam	int prot;
1852193240Ssam
1853193240Ssam	/* NB: can be called early; suppress needless cmds */
1854193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1855193240Ssam		return;
1856193240Ssam
1857193240Ssam	/*
1858193240Ssam	 * Calculate the ERP flags.  The firwmare will use
1859193240Ssam	 * this to carry out the appropriate measures.
1860193240Ssam	 */
1861193240Ssam	prot = 0;
1862193240Ssam	if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
1863193240Ssam		if ((ic->ic_flags & IEEE80211_F_SHSLOT) == 0)
1864193240Ssam			prot |= IEEE80211_ERP_NON_ERP_PRESENT;
1865193240Ssam		if (ic->ic_flags & IEEE80211_F_USEPROT)
1866193240Ssam			prot |= IEEE80211_ERP_USE_PROTECTION;
1867193240Ssam		if (ic->ic_flags & IEEE80211_F_USEBARKER)
1868193240Ssam			prot |= IEEE80211_ERP_LONG_PREAMBLE;
1869193240Ssam	}
1870193240Ssam
1871193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET,
1872193240Ssam	    "%s: chan %u MHz/flags 0x%x %s slot, (prot 0x%x ic_flags 0x%x)\n",
1873193240Ssam	    __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1874193240Ssam	    ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", prot,
1875193240Ssam	    ic->ic_flags);
1876193240Ssam
1877193240Ssam	mwl_hal_setgprot(mh, prot);
1878193240Ssam}
1879193240Ssam
1880193240Ssam/*
1881193240Ssam * Setup the beacon frame.
1882193240Ssam */
1883193240Ssamstatic int
1884193240Ssammwl_beacon_setup(struct ieee80211vap *vap)
1885193240Ssam{
1886193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1887193240Ssam	struct ieee80211_node *ni = vap->iv_bss;
1888193240Ssam	struct ieee80211_beacon_offsets bo;
1889193240Ssam	struct mbuf *m;
1890193240Ssam
1891193240Ssam	m = ieee80211_beacon_alloc(ni, &bo);
1892193240Ssam	if (m == NULL)
1893193240Ssam		return ENOBUFS;
1894193240Ssam	mwl_hal_setbeacon(hvap, mtod(m, const void *), m->m_len);
1895193240Ssam	m_free(m);
1896193240Ssam
1897193240Ssam	return 0;
1898193240Ssam}
1899193240Ssam
1900193240Ssam/*
1901193240Ssam * Update the beacon frame in response to a change.
1902193240Ssam */
1903193240Ssamstatic void
1904193240Ssammwl_beacon_update(struct ieee80211vap *vap, int item)
1905193240Ssam{
1906193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1907193240Ssam	struct ieee80211com *ic = vap->iv_ic;
1908193240Ssam
1909193240Ssam	KASSERT(hvap != NULL, ("no beacon"));
1910193240Ssam	switch (item) {
1911193240Ssam	case IEEE80211_BEACON_ERP:
1912193240Ssam		mwl_updateslot(ic->ic_ifp);
1913193240Ssam		break;
1914193240Ssam	case IEEE80211_BEACON_HTINFO:
1915193240Ssam		mwl_hal_setnprotmode(hvap,
1916193240Ssam		    MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE));
1917193240Ssam		break;
1918193240Ssam	case IEEE80211_BEACON_CAPS:
1919193240Ssam	case IEEE80211_BEACON_WME:
1920193240Ssam	case IEEE80211_BEACON_APPIE:
1921193240Ssam	case IEEE80211_BEACON_CSA:
1922193240Ssam		break;
1923193240Ssam	case IEEE80211_BEACON_TIM:
1924193240Ssam		/* NB: firmware always forms TIM */
1925193240Ssam		return;
1926193240Ssam	}
1927193240Ssam	/* XXX retain beacon frame and update */
1928193240Ssam	mwl_beacon_setup(vap);
1929193240Ssam}
1930193240Ssam
1931193240Ssamstatic void
1932193240Ssammwl_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1933193240Ssam{
1934193240Ssam	bus_addr_t *paddr = (bus_addr_t*) arg;
1935193240Ssam	KASSERT(error == 0, ("error %u on bus_dma callback", error));
1936193240Ssam	*paddr = segs->ds_addr;
1937193240Ssam}
1938193240Ssam
1939193240Ssam#ifdef MWL_HOST_PS_SUPPORT
1940193240Ssam/*
1941193240Ssam * Handle power save station occupancy changes.
1942193240Ssam */
1943193240Ssamstatic void
1944193240Ssammwl_update_ps(struct ieee80211vap *vap, int nsta)
1945193240Ssam{
1946193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1947193240Ssam
1948193240Ssam	if (nsta == 0 || mvp->mv_last_ps_sta == 0)
1949193240Ssam		mwl_hal_setpowersave_bss(mvp->mv_hvap, nsta);
1950193240Ssam	mvp->mv_last_ps_sta = nsta;
1951193240Ssam}
1952193240Ssam
1953193240Ssam/*
1954193240Ssam * Handle associated station power save state changes.
1955193240Ssam */
1956193240Ssamstatic int
1957193240Ssammwl_set_tim(struct ieee80211_node *ni, int set)
1958193240Ssam{
1959193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
1960193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1961193240Ssam
1962193240Ssam	if (mvp->mv_set_tim(ni, set)) {		/* NB: state change */
1963193240Ssam		mwl_hal_setpowersave_sta(mvp->mv_hvap,
1964193240Ssam		    IEEE80211_AID(ni->ni_associd), set);
1965193240Ssam		return 1;
1966193240Ssam	} else
1967193240Ssam		return 0;
1968193240Ssam}
1969193240Ssam#endif /* MWL_HOST_PS_SUPPORT */
1970193240Ssam
1971193240Ssamstatic int
1972193240Ssammwl_desc_setup(struct mwl_softc *sc, const char *name,
1973193240Ssam	struct mwl_descdma *dd,
1974193240Ssam	int nbuf, size_t bufsize, int ndesc, size_t descsize)
1975193240Ssam{
1976193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1977193240Ssam	uint8_t *ds;
1978193240Ssam	int error;
1979193240Ssam
1980193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET,
1981193240Ssam	    "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
1982193240Ssam	    __func__, name, nbuf, (uintmax_t) bufsize,
1983193240Ssam	    ndesc, (uintmax_t) descsize);
1984193240Ssam
1985193240Ssam	dd->dd_name = name;
1986193240Ssam	dd->dd_desc_len = nbuf * ndesc * descsize;
1987193240Ssam
1988193240Ssam	/*
1989193240Ssam	 * Setup DMA descriptor area.
1990193240Ssam	 */
1991193240Ssam	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev),	/* parent */
1992193240Ssam		       PAGE_SIZE, 0,		/* alignment, bounds */
1993193240Ssam		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
1994193240Ssam		       BUS_SPACE_MAXADDR,	/* highaddr */
1995193240Ssam		       NULL, NULL,		/* filter, filterarg */
1996193240Ssam		       dd->dd_desc_len,		/* maxsize */
1997193240Ssam		       1,			/* nsegments */
1998193240Ssam		       dd->dd_desc_len,		/* maxsegsize */
1999193240Ssam		       BUS_DMA_ALLOCNOW,	/* flags */
2000193240Ssam		       NULL,			/* lockfunc */
2001193240Ssam		       NULL,			/* lockarg */
2002193240Ssam		       &dd->dd_dmat);
2003193240Ssam	if (error != 0) {
2004193240Ssam		if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
2005193240Ssam		return error;
2006193240Ssam	}
2007193240Ssam
2008193240Ssam	/* allocate descriptors */
2009193240Ssam	error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
2010193240Ssam	if (error != 0) {
2011193240Ssam		if_printf(ifp, "unable to create dmamap for %s descriptors, "
2012193240Ssam			"error %u\n", dd->dd_name, error);
2013193240Ssam		goto fail0;
2014193240Ssam	}
2015193240Ssam
2016193240Ssam	error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
2017193240Ssam				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
2018193240Ssam				 &dd->dd_dmamap);
2019193240Ssam	if (error != 0) {
2020193240Ssam		if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
2021193240Ssam			"error %u\n", nbuf * ndesc, dd->dd_name, error);
2022193240Ssam		goto fail1;
2023193240Ssam	}
2024193240Ssam
2025193240Ssam	error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
2026193240Ssam				dd->dd_desc, dd->dd_desc_len,
2027193240Ssam				mwl_load_cb, &dd->dd_desc_paddr,
2028193240Ssam				BUS_DMA_NOWAIT);
2029193240Ssam	if (error != 0) {
2030193240Ssam		if_printf(ifp, "unable to map %s descriptors, error %u\n",
2031193240Ssam			dd->dd_name, error);
2032193240Ssam		goto fail2;
2033193240Ssam	}
2034193240Ssam
2035193240Ssam	ds = dd->dd_desc;
2036193240Ssam	memset(ds, 0, dd->dd_desc_len);
2037193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
2038193240Ssam	    __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
2039193240Ssam	    (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
2040193240Ssam
2041193240Ssam	return 0;
2042193240Ssamfail2:
2043193240Ssam	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
2044193240Ssamfail1:
2045193240Ssam	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
2046193240Ssamfail0:
2047193240Ssam	bus_dma_tag_destroy(dd->dd_dmat);
2048193240Ssam	memset(dd, 0, sizeof(*dd));
2049193240Ssam	return error;
2050193240Ssam#undef DS2PHYS
2051193240Ssam}
2052193240Ssam
2053193240Ssamstatic void
2054193240Ssammwl_desc_cleanup(struct mwl_softc *sc, struct mwl_descdma *dd)
2055193240Ssam{
2056193240Ssam	bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
2057193240Ssam	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
2058193240Ssam	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
2059193240Ssam	bus_dma_tag_destroy(dd->dd_dmat);
2060193240Ssam
2061193240Ssam	memset(dd, 0, sizeof(*dd));
2062193240Ssam}
2063193240Ssam
2064193240Ssam/*
2065193240Ssam * Construct a tx q's free list.  The order of entries on
2066193240Ssam * the list must reflect the physical layout of tx descriptors
2067193240Ssam * because the firmware pre-fetches descriptors.
2068193240Ssam *
2069193240Ssam * XXX might be better to use indices into the buffer array.
2070193240Ssam */
2071193240Ssamstatic void
2072193240Ssammwl_txq_reset(struct mwl_softc *sc, struct mwl_txq *txq)
2073193240Ssam{
2074193240Ssam	struct mwl_txbuf *bf;
2075193240Ssam	int i;
2076193240Ssam
2077193240Ssam	bf = txq->dma.dd_bufptr;
2078193240Ssam	STAILQ_INIT(&txq->free);
2079193240Ssam	for (i = 0; i < mwl_txbuf; i++, bf++)
2080193240Ssam		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
2081193240Ssam	txq->nfree = i;
2082193240Ssam}
2083193240Ssam
2084193240Ssam#define	DS2PHYS(_dd, _ds) \
2085193240Ssam	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
2086193240Ssam
2087193240Ssamstatic int
2088193240Ssammwl_txdma_setup(struct mwl_softc *sc, struct mwl_txq *txq)
2089193240Ssam{
2090193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2091193240Ssam	int error, bsize, i;
2092193240Ssam	struct mwl_txbuf *bf;
2093193240Ssam	struct mwl_txdesc *ds;
2094193240Ssam
2095193240Ssam	error = mwl_desc_setup(sc, "tx", &txq->dma,
2096193240Ssam			mwl_txbuf, sizeof(struct mwl_txbuf),
2097193240Ssam			MWL_TXDESC, sizeof(struct mwl_txdesc));
2098193240Ssam	if (error != 0)
2099193240Ssam		return error;
2100193240Ssam
2101193240Ssam	/* allocate and setup tx buffers */
2102193240Ssam	bsize = mwl_txbuf * sizeof(struct mwl_txbuf);
2103193240Ssam	bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO);
2104193240Ssam	if (bf == NULL) {
2105193240Ssam		if_printf(ifp, "malloc of %u tx buffers failed\n",
2106193240Ssam			mwl_txbuf);
2107193240Ssam		return ENOMEM;
2108193240Ssam	}
2109193240Ssam	txq->dma.dd_bufptr = bf;
2110193240Ssam
2111193240Ssam	ds = txq->dma.dd_desc;
2112193240Ssam	for (i = 0; i < mwl_txbuf; i++, bf++, ds += MWL_TXDESC) {
2113193240Ssam		bf->bf_desc = ds;
2114193240Ssam		bf->bf_daddr = DS2PHYS(&txq->dma, ds);
2115193240Ssam		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
2116193240Ssam				&bf->bf_dmamap);
2117193240Ssam		if (error != 0) {
2118193240Ssam			if_printf(ifp, "unable to create dmamap for tx "
2119193240Ssam				"buffer %u, error %u\n", i, error);
2120193240Ssam			return error;
2121193240Ssam		}
2122193240Ssam	}
2123193240Ssam	mwl_txq_reset(sc, txq);
2124193240Ssam	return 0;
2125193240Ssam}
2126193240Ssam
2127193240Ssamstatic void
2128193240Ssammwl_txdma_cleanup(struct mwl_softc *sc, struct mwl_txq *txq)
2129193240Ssam{
2130193240Ssam	struct mwl_txbuf *bf;
2131193240Ssam	int i;
2132193240Ssam
2133193240Ssam	bf = txq->dma.dd_bufptr;
2134193240Ssam	for (i = 0; i < mwl_txbuf; i++, bf++) {
2135193240Ssam		KASSERT(bf->bf_m == NULL, ("mbuf on free list"));
2136193240Ssam		KASSERT(bf->bf_node == NULL, ("node on free list"));
2137193240Ssam		if (bf->bf_dmamap != NULL)
2138193240Ssam			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2139193240Ssam	}
2140193240Ssam	STAILQ_INIT(&txq->free);
2141193240Ssam	txq->nfree = 0;
2142193240Ssam	if (txq->dma.dd_bufptr != NULL) {
2143193240Ssam		free(txq->dma.dd_bufptr, M_MWLDEV);
2144193240Ssam		txq->dma.dd_bufptr = NULL;
2145193240Ssam	}
2146193240Ssam	if (txq->dma.dd_desc_len != 0)
2147193240Ssam		mwl_desc_cleanup(sc, &txq->dma);
2148193240Ssam}
2149193240Ssam
2150193240Ssamstatic int
2151193240Ssammwl_rxdma_setup(struct mwl_softc *sc)
2152193240Ssam{
2153193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2154193240Ssam	int error, jumbosize, bsize, i;
2155193240Ssam	struct mwl_rxbuf *bf;
2156193240Ssam	struct mwl_jumbo *rbuf;
2157193240Ssam	struct mwl_rxdesc *ds;
2158193240Ssam	caddr_t data;
2159193240Ssam
2160193240Ssam	error = mwl_desc_setup(sc, "rx", &sc->sc_rxdma,
2161193240Ssam			mwl_rxdesc, sizeof(struct mwl_rxbuf),
2162193240Ssam			1, sizeof(struct mwl_rxdesc));
2163193240Ssam	if (error != 0)
2164193240Ssam		return error;
2165193240Ssam
2166193240Ssam	/*
2167193240Ssam	 * Receive is done to a private pool of jumbo buffers.
2168193240Ssam	 * This allows us to attach to mbuf's and avoid re-mapping
2169193240Ssam	 * memory on each rx we post.  We allocate a large chunk
2170193240Ssam	 * of memory and manage it in the driver.  The mbuf free
2171193240Ssam	 * callback method is used to reclaim frames after sending
2172193240Ssam	 * them up the stack.  By default we allocate 2x the number of
2173193240Ssam	 * rx descriptors configured so we have some slop to hold
2174193240Ssam	 * us while frames are processed.
2175193240Ssam	 */
2176193240Ssam	if (mwl_rxbuf < 2*mwl_rxdesc) {
2177193240Ssam		if_printf(ifp,
2178193240Ssam		    "too few rx dma buffers (%d); increasing to %d\n",
2179193240Ssam		    mwl_rxbuf, 2*mwl_rxdesc);
2180193240Ssam		mwl_rxbuf = 2*mwl_rxdesc;
2181193240Ssam	}
2182193240Ssam	jumbosize = roundup(MWL_AGGR_SIZE, PAGE_SIZE);
2183193240Ssam	sc->sc_rxmemsize = mwl_rxbuf*jumbosize;
2184193240Ssam
2185193240Ssam	error = bus_dma_tag_create(sc->sc_dmat,	/* parent */
2186193240Ssam		       PAGE_SIZE, 0,		/* alignment, bounds */
2187193240Ssam		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
2188193240Ssam		       BUS_SPACE_MAXADDR,	/* highaddr */
2189193240Ssam		       NULL, NULL,		/* filter, filterarg */
2190193240Ssam		       sc->sc_rxmemsize,	/* maxsize */
2191193240Ssam		       1,			/* nsegments */
2192193240Ssam		       sc->sc_rxmemsize,	/* maxsegsize */
2193193240Ssam		       BUS_DMA_ALLOCNOW,	/* flags */
2194193240Ssam		       NULL,			/* lockfunc */
2195193240Ssam		       NULL,			/* lockarg */
2196193240Ssam		       &sc->sc_rxdmat);
2197193240Ssam	error = bus_dmamap_create(sc->sc_rxdmat, BUS_DMA_NOWAIT, &sc->sc_rxmap);
2198193240Ssam	if (error != 0) {
2199193240Ssam		if_printf(ifp, "could not create rx DMA map\n");
2200193240Ssam		return error;
2201193240Ssam	}
2202193240Ssam
2203193240Ssam	error = bus_dmamem_alloc(sc->sc_rxdmat, (void**) &sc->sc_rxmem,
2204193240Ssam				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
2205193240Ssam				 &sc->sc_rxmap);
2206193240Ssam	if (error != 0) {
2207193240Ssam		if_printf(ifp, "could not alloc %ju bytes of rx DMA memory\n",
2208193240Ssam		    (uintmax_t) sc->sc_rxmemsize);
2209193240Ssam		return error;
2210193240Ssam	}
2211193240Ssam
2212193240Ssam	error = bus_dmamap_load(sc->sc_rxdmat, sc->sc_rxmap,
2213193240Ssam				sc->sc_rxmem, sc->sc_rxmemsize,
2214193240Ssam				mwl_load_cb, &sc->sc_rxmem_paddr,
2215193240Ssam				BUS_DMA_NOWAIT);
2216193240Ssam	if (error != 0) {
2217193240Ssam		if_printf(ifp, "could not load rx DMA map\n");
2218193240Ssam		return error;
2219193240Ssam	}
2220193240Ssam
2221193240Ssam	/*
2222193240Ssam	 * Allocate rx buffers and set them up.
2223193240Ssam	 */
2224193240Ssam	bsize = mwl_rxdesc * sizeof(struct mwl_rxbuf);
2225193240Ssam	bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO);
2226193240Ssam	if (bf == NULL) {
2227193240Ssam		if_printf(ifp, "malloc of %u rx buffers failed\n", bsize);
2228193240Ssam		return error;
2229193240Ssam	}
2230193240Ssam	sc->sc_rxdma.dd_bufptr = bf;
2231193240Ssam
2232193240Ssam	STAILQ_INIT(&sc->sc_rxbuf);
2233193240Ssam	ds = sc->sc_rxdma.dd_desc;
2234193240Ssam	for (i = 0; i < mwl_rxdesc; i++, bf++, ds++) {
2235193240Ssam		bf->bf_desc = ds;
2236193240Ssam		bf->bf_daddr = DS2PHYS(&sc->sc_rxdma, ds);
2237193240Ssam		/* pre-assign dma buffer */
2238193240Ssam		bf->bf_data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize);
2239193240Ssam		/* NB: tail is intentional to preserve descriptor order */
2240193240Ssam		STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
2241193240Ssam	}
2242193240Ssam
2243193240Ssam	/*
2244193240Ssam	 * Place remainder of dma memory buffers on the free list.
2245193240Ssam	 */
2246193240Ssam	SLIST_INIT(&sc->sc_rxfree);
2247193240Ssam	for (; i < mwl_rxbuf; i++) {
2248193240Ssam		data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize);
2249193240Ssam		rbuf = MWL_JUMBO_DATA2BUF(data);
2250193240Ssam		SLIST_INSERT_HEAD(&sc->sc_rxfree, rbuf, next);
2251193240Ssam		sc->sc_nrxfree++;
2252193240Ssam	}
2253193240Ssam	MWL_RXFREE_INIT(sc);
2254193240Ssam	return 0;
2255193240Ssam}
2256193240Ssam#undef DS2PHYS
2257193240Ssam
2258193240Ssamstatic void
2259193240Ssammwl_rxdma_cleanup(struct mwl_softc *sc)
2260193240Ssam{
2261193240Ssam	if (sc->sc_rxmap != NULL)
2262193240Ssam		bus_dmamap_unload(sc->sc_rxdmat, sc->sc_rxmap);
2263193240Ssam	if (sc->sc_rxmem != NULL) {
2264193240Ssam		bus_dmamem_free(sc->sc_rxdmat, sc->sc_rxmem, sc->sc_rxmap);
2265193240Ssam		sc->sc_rxmem = NULL;
2266193240Ssam	}
2267193240Ssam	if (sc->sc_rxmap != NULL) {
2268193240Ssam		bus_dmamap_destroy(sc->sc_rxdmat, sc->sc_rxmap);
2269193240Ssam		sc->sc_rxmap = NULL;
2270193240Ssam	}
2271193240Ssam	if (sc->sc_rxdma.dd_bufptr != NULL) {
2272193240Ssam		free(sc->sc_rxdma.dd_bufptr, M_MWLDEV);
2273193240Ssam		sc->sc_rxdma.dd_bufptr = NULL;
2274193240Ssam	}
2275193240Ssam	if (sc->sc_rxdma.dd_desc_len != 0)
2276193240Ssam		mwl_desc_cleanup(sc, &sc->sc_rxdma);
2277193240Ssam	MWL_RXFREE_DESTROY(sc);
2278193240Ssam}
2279193240Ssam
2280193240Ssamstatic int
2281193240Ssammwl_dma_setup(struct mwl_softc *sc)
2282193240Ssam{
2283193240Ssam	int error, i;
2284193240Ssam
2285193240Ssam	error = mwl_rxdma_setup(sc);
2286193240Ssam	if (error != 0)
2287193240Ssam		return error;
2288193240Ssam
2289193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++) {
2290193240Ssam		error = mwl_txdma_setup(sc, &sc->sc_txq[i]);
2291193240Ssam		if (error != 0) {
2292193240Ssam			mwl_dma_cleanup(sc);
2293193240Ssam			return error;
2294193240Ssam		}
2295193240Ssam	}
2296193240Ssam	return 0;
2297193240Ssam}
2298193240Ssam
2299193240Ssamstatic void
2300193240Ssammwl_dma_cleanup(struct mwl_softc *sc)
2301193240Ssam{
2302193240Ssam	int i;
2303193240Ssam
2304193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
2305193240Ssam		mwl_txdma_cleanup(sc, &sc->sc_txq[i]);
2306193240Ssam	mwl_rxdma_cleanup(sc);
2307193240Ssam}
2308193240Ssam
2309193240Ssamstatic struct ieee80211_node *
2310193240Ssammwl_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2311193240Ssam{
2312193240Ssam	struct ieee80211com *ic = vap->iv_ic;
2313193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
2314193240Ssam	const size_t space = sizeof(struct mwl_node);
2315193240Ssam	struct mwl_node *mn;
2316193240Ssam
2317193240Ssam	mn = malloc(space, M_80211_NODE, M_NOWAIT|M_ZERO);
2318193240Ssam	if (mn == NULL) {
2319193240Ssam		/* XXX stat+msg */
2320193240Ssam		return NULL;
2321193240Ssam	}
2322193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: mn %p\n", __func__, mn);
2323193240Ssam	return &mn->mn_node;
2324193240Ssam}
2325193240Ssam
2326193240Ssamstatic void
2327193240Ssammwl_node_cleanup(struct ieee80211_node *ni)
2328193240Ssam{
2329193240Ssam	struct ieee80211com *ic = ni->ni_ic;
2330193240Ssam        struct mwl_softc *sc = ic->ic_ifp->if_softc;
2331193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
2332193240Ssam
2333193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p ic %p staid %d\n",
2334193240Ssam	    __func__, ni, ni->ni_ic, mn->mn_staid);
2335193240Ssam
2336193240Ssam	if (mn->mn_staid != 0) {
2337193240Ssam		struct ieee80211vap *vap = ni->ni_vap;
2338193240Ssam
2339193240Ssam		if (mn->mn_hvap != NULL) {
2340193240Ssam			if (vap->iv_opmode == IEEE80211_M_STA)
2341193240Ssam				mwl_hal_delstation(mn->mn_hvap, vap->iv_myaddr);
2342193240Ssam			else
2343193240Ssam				mwl_hal_delstation(mn->mn_hvap, ni->ni_macaddr);
2344193240Ssam		}
2345193240Ssam		/*
2346193240Ssam		 * NB: legacy WDS peer sta db entry is installed using
2347193240Ssam		 * the associate ap's hvap; use it again to delete it.
2348193240Ssam		 * XXX can vap be NULL?
2349193240Ssam		 */
2350193240Ssam		else if (vap->iv_opmode == IEEE80211_M_WDS &&
2351193240Ssam		    MWL_VAP(vap)->mv_ap_hvap != NULL)
2352193240Ssam			mwl_hal_delstation(MWL_VAP(vap)->mv_ap_hvap,
2353193240Ssam			    ni->ni_macaddr);
2354193240Ssam		delstaid(sc, mn->mn_staid);
2355193240Ssam		mn->mn_staid = 0;
2356193240Ssam	}
2357193240Ssam	sc->sc_node_cleanup(ni);
2358193240Ssam}
2359193240Ssam
2360193240Ssam/*
2361193240Ssam * Reclaim rx dma buffers from packets sitting on the ampdu
2362193240Ssam * reorder queue for a station.  We replace buffers with a
2363193240Ssam * system cluster (if available).
2364193240Ssam */
2365193240Ssamstatic void
2366193240Ssammwl_ampdu_rxdma_reclaim(struct ieee80211_rx_ampdu *rap)
2367193240Ssam{
2368193240Ssam#if 0
2369193240Ssam	int i, n, off;
2370193240Ssam	struct mbuf *m;
2371193240Ssam	void *cl;
2372193240Ssam
2373193240Ssam	n = rap->rxa_qframes;
2374193240Ssam	for (i = 0; i < rap->rxa_wnd && n > 0; i++) {
2375193240Ssam		m = rap->rxa_m[i];
2376193240Ssam		if (m == NULL)
2377193240Ssam			continue;
2378193240Ssam		n--;
2379193240Ssam		/* our dma buffers have a well-known free routine */
2380193240Ssam		if ((m->m_flags & M_EXT) == 0 ||
2381193240Ssam		    m->m_ext.ext_free != mwl_ext_free)
2382193240Ssam			continue;
2383193240Ssam		/*
2384193240Ssam		 * Try to allocate a cluster and move the data.
2385193240Ssam		 */
2386193240Ssam		off = m->m_data - m->m_ext.ext_buf;
2387193240Ssam		if (off + m->m_pkthdr.len > MCLBYTES) {
2388193240Ssam			/* XXX no AMSDU for now */
2389193240Ssam			continue;
2390193240Ssam		}
2391193240Ssam		cl = pool_cache_get_paddr(&mclpool_cache, 0,
2392193240Ssam		    &m->m_ext.ext_paddr);
2393193240Ssam		if (cl != NULL) {
2394193240Ssam			/*
2395193240Ssam			 * Copy the existing data to the cluster, remove
2396193240Ssam			 * the rx dma buffer, and attach the cluster in
2397193240Ssam			 * its place.  Note we preserve the offset to the
2398193240Ssam			 * data so frames being bridged can still prepend
2399193240Ssam			 * their headers without adding another mbuf.
2400193240Ssam			 */
2401193240Ssam			memcpy((caddr_t) cl + off, m->m_data, m->m_pkthdr.len);
2402193240Ssam			MEXTREMOVE(m);
2403193240Ssam			MEXTADD(m, cl, MCLBYTES, 0, NULL, &mclpool_cache);
2404193240Ssam			/* setup mbuf like _MCLGET does */
2405193240Ssam			m->m_flags |= M_CLUSTER | M_EXT_RW;
2406193240Ssam			_MOWNERREF(m, M_EXT | M_CLUSTER);
2407193240Ssam			/* NB: m_data is clobbered by MEXTADDR, adjust */
2408193240Ssam			m->m_data += off;
2409193240Ssam		}
2410193240Ssam	}
2411193240Ssam#endif
2412193240Ssam}
2413193240Ssam
2414193240Ssam/*
2415193240Ssam * Callback to reclaim resources.  We first let the
2416193240Ssam * net80211 layer do it's thing, then if we are still
2417193240Ssam * blocked by a lack of rx dma buffers we walk the ampdu
2418193240Ssam * reorder q's to reclaim buffers by copying to a system
2419193240Ssam * cluster.
2420193240Ssam */
2421193240Ssamstatic void
2422193240Ssammwl_node_drain(struct ieee80211_node *ni)
2423193240Ssam{
2424193240Ssam	struct ieee80211com *ic = ni->ni_ic;
2425193240Ssam        struct mwl_softc *sc = ic->ic_ifp->if_softc;
2426193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
2427193240Ssam
2428193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p vap %p staid %d\n",
2429193240Ssam	    __func__, ni, ni->ni_vap, mn->mn_staid);
2430193240Ssam
2431193240Ssam	/* NB: call up first to age out ampdu q's */
2432193240Ssam	sc->sc_node_drain(ni);
2433193240Ssam
2434193240Ssam	/* XXX better to not check low water mark? */
2435193240Ssam	if (sc->sc_rxblocked && mn->mn_staid != 0 &&
2436193240Ssam	    (ni->ni_flags & IEEE80211_NODE_HT)) {
2437193240Ssam		uint8_t tid;
2438193240Ssam		/*
2439193240Ssam		 * Walk the reorder q and reclaim rx dma buffers by copying
2440193240Ssam		 * the packet contents into clusters.
2441193240Ssam		 */
2442193240Ssam		for (tid = 0; tid < WME_NUM_TID; tid++) {
2443193240Ssam			struct ieee80211_rx_ampdu *rap;
2444193240Ssam
2445193240Ssam			rap = &ni->ni_rx_ampdu[tid];
2446193240Ssam			if ((rap->rxa_flags & IEEE80211_AGGR_XCHGPEND) == 0)
2447193240Ssam				continue;
2448193240Ssam			if (rap->rxa_qframes)
2449193240Ssam				mwl_ampdu_rxdma_reclaim(rap);
2450193240Ssam		}
2451193240Ssam	}
2452193240Ssam}
2453193240Ssam
2454193240Ssamstatic void
2455193240Ssammwl_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise)
2456193240Ssam{
2457193240Ssam	*rssi = ni->ni_ic->ic_node_getrssi(ni);
2458193240Ssam#ifdef MWL_ANT_INFO_SUPPORT
2459193240Ssam#if 0
2460193240Ssam	/* XXX need to smooth data */
2461193240Ssam	*noise = -MWL_NODE_CONST(ni)->mn_ai.nf;
2462193240Ssam#else
2463193240Ssam	*noise = -95;		/* XXX */
2464193240Ssam#endif
2465193240Ssam#else
2466193240Ssam	*noise = -95;		/* XXX */
2467193240Ssam#endif
2468193240Ssam}
2469193240Ssam
2470193240Ssam/*
2471193240Ssam * Convert Hardware per-antenna rssi info to common format:
2472193240Ssam * Let a1, a2, a3 represent the amplitudes per chain
2473193240Ssam * Let amax represent max[a1, a2, a3]
2474193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1/amax)
2475193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1) - 20*log10(amax)
2476193240Ssam * We store a table that is 4*20*log10(idx) - the extra 4 is to store or
2477193240Ssam * maintain some extra precision.
2478193240Ssam *
2479193240Ssam * Values are stored in .5 db format capped at 127.
2480193240Ssam */
2481193240Ssamstatic void
2482193240Ssammwl_node_getmimoinfo(const struct ieee80211_node *ni,
2483193240Ssam	struct ieee80211_mimo_info *mi)
2484193240Ssam{
2485193240Ssam#define	CVT(_dst, _src) do {						\
2486193240Ssam	(_dst) = rssi + ((logdbtbl[_src] - logdbtbl[rssi_max]) >> 2);	\
2487193240Ssam	(_dst) = (_dst) > 64 ? 127 : ((_dst) << 1);			\
2488193240Ssam} while (0)
2489193240Ssam	static const int8_t logdbtbl[32] = {
2490193240Ssam	       0,   0,  24,  38,  48,  56,  62,  68,
2491193240Ssam	      72,  76,  80,  83,  86,  89,  92,  94,
2492193240Ssam	      96,  98, 100, 102, 104, 106, 107, 109,
2493193240Ssam	     110, 112, 113, 115, 116, 117, 118, 119
2494193240Ssam	};
2495193240Ssam	const struct mwl_node *mn = MWL_NODE_CONST(ni);
2496193240Ssam	uint8_t rssi = mn->mn_ai.rsvd1/2;		/* XXX */
2497193240Ssam	uint32_t rssi_max;
2498193240Ssam
2499193240Ssam	rssi_max = mn->mn_ai.rssi_a;
2500193240Ssam	if (mn->mn_ai.rssi_b > rssi_max)
2501193240Ssam		rssi_max = mn->mn_ai.rssi_b;
2502193240Ssam	if (mn->mn_ai.rssi_c > rssi_max)
2503193240Ssam		rssi_max = mn->mn_ai.rssi_c;
2504193240Ssam
2505193240Ssam	CVT(mi->rssi[0], mn->mn_ai.rssi_a);
2506193240Ssam	CVT(mi->rssi[1], mn->mn_ai.rssi_b);
2507193240Ssam	CVT(mi->rssi[2], mn->mn_ai.rssi_c);
2508193240Ssam
2509193240Ssam	mi->noise[0] = mn->mn_ai.nf_a;
2510193240Ssam	mi->noise[1] = mn->mn_ai.nf_b;
2511193240Ssam	mi->noise[2] = mn->mn_ai.nf_c;
2512193240Ssam#undef CVT
2513193240Ssam}
2514193240Ssam
2515193240Ssamstatic __inline void *
2516193240Ssammwl_getrxdma(struct mwl_softc *sc)
2517193240Ssam{
2518193240Ssam	struct mwl_jumbo *buf;
2519193240Ssam	void *data;
2520193240Ssam
2521193240Ssam	/*
2522193240Ssam	 * Allocate from jumbo pool.
2523193240Ssam	 */
2524193240Ssam	MWL_RXFREE_LOCK(sc);
2525193240Ssam	buf = SLIST_FIRST(&sc->sc_rxfree);
2526193240Ssam	if (buf == NULL) {
2527193240Ssam		DPRINTF(sc, MWL_DEBUG_ANY,
2528193240Ssam		    "%s: out of rx dma buffers\n", __func__);
2529193240Ssam		sc->sc_stats.mst_rx_nodmabuf++;
2530193240Ssam		data = NULL;
2531193240Ssam	} else {
2532193240Ssam		SLIST_REMOVE_HEAD(&sc->sc_rxfree, next);
2533193240Ssam		sc->sc_nrxfree--;
2534193240Ssam		data = MWL_JUMBO_BUF2DATA(buf);
2535193240Ssam	}
2536193240Ssam	MWL_RXFREE_UNLOCK(sc);
2537193240Ssam	return data;
2538193240Ssam}
2539193240Ssam
2540193240Ssamstatic __inline void
2541193240Ssammwl_putrxdma(struct mwl_softc *sc, void *data)
2542193240Ssam{
2543193240Ssam	struct mwl_jumbo *buf;
2544193240Ssam
2545193240Ssam	/* XXX bounds check data */
2546193240Ssam	MWL_RXFREE_LOCK(sc);
2547193240Ssam	buf = MWL_JUMBO_DATA2BUF(data);
2548193240Ssam	SLIST_INSERT_HEAD(&sc->sc_rxfree, buf, next);
2549193240Ssam	sc->sc_nrxfree++;
2550193240Ssam	MWL_RXFREE_UNLOCK(sc);
2551193240Ssam}
2552193240Ssam
2553193240Ssamstatic int
2554193240Ssammwl_rxbuf_init(struct mwl_softc *sc, struct mwl_rxbuf *bf)
2555193240Ssam{
2556193240Ssam	struct mwl_rxdesc *ds;
2557193240Ssam
2558193240Ssam	ds = bf->bf_desc;
2559193240Ssam	if (bf->bf_data == NULL) {
2560193240Ssam		bf->bf_data = mwl_getrxdma(sc);
2561193240Ssam		if (bf->bf_data == NULL) {
2562193240Ssam			/* mark descriptor to be skipped */
2563193240Ssam			ds->RxControl = EAGLE_RXD_CTRL_OS_OWN;
2564193240Ssam			/* NB: don't need PREREAD */
2565193240Ssam			MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
2566193240Ssam			sc->sc_stats.mst_rxbuf_failed++;
2567193240Ssam			return ENOMEM;
2568193240Ssam		}
2569193240Ssam	}
2570193240Ssam	/*
2571193240Ssam	 * NB: DMA buffer contents is known to be unmodified
2572193240Ssam	 *     so there's no need to flush the data cache.
2573193240Ssam	 */
2574193240Ssam
2575193240Ssam	/*
2576193240Ssam	 * Setup descriptor.
2577193240Ssam	 */
2578193240Ssam	ds->QosCtrl = 0;
2579193240Ssam	ds->RSSI = 0;
2580193240Ssam	ds->Status = EAGLE_RXD_STATUS_IDLE;
2581193240Ssam	ds->Channel = 0;
2582193240Ssam	ds->PktLen = htole16(MWL_AGGR_SIZE);
2583193240Ssam	ds->SQ2 = 0;
2584193240Ssam	ds->pPhysBuffData = htole32(MWL_JUMBO_DMA_ADDR(sc, bf->bf_data));
2585193240Ssam	/* NB: don't touch pPhysNext, set once */
2586193240Ssam	ds->RxControl = EAGLE_RXD_CTRL_DRIVER_OWN;
2587193240Ssam	MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2588193240Ssam
2589193240Ssam	return 0;
2590193240Ssam}
2591193240Ssam
2592193240Ssamstatic void
2593193240Ssammwl_ext_free(void *data, void *arg)
2594193240Ssam{
2595193240Ssam	struct mwl_softc *sc = arg;
2596193240Ssam
2597193240Ssam	/* XXX bounds check data */
2598193240Ssam	mwl_putrxdma(sc, data);
2599193240Ssam	/*
2600193240Ssam	 * If we were previously blocked by a lack of rx dma buffers
2601193240Ssam	 * check if we now have enough to restart rx interrupt handling.
2602193240Ssam	 * NB: we know we are called at splvm which is above splnet.
2603193240Ssam	 */
2604193240Ssam	if (sc->sc_rxblocked && sc->sc_nrxfree > mwl_rxdmalow) {
2605193240Ssam		sc->sc_rxblocked = 0;
2606193240Ssam		mwl_hal_intrset(sc->sc_mh, sc->sc_imask);
2607193240Ssam	}
2608193240Ssam}
2609193240Ssam
2610193240Ssamstruct mwl_frame_bar {
2611193240Ssam	u_int8_t	i_fc[2];
2612193240Ssam	u_int8_t	i_dur[2];
2613193240Ssam	u_int8_t	i_ra[IEEE80211_ADDR_LEN];
2614193240Ssam	u_int8_t	i_ta[IEEE80211_ADDR_LEN];
2615193240Ssam	/* ctl, seq, FCS */
2616193240Ssam} __packed;
2617193240Ssam
2618193240Ssam/*
2619193240Ssam * Like ieee80211_anyhdrsize, but handles BAR frames
2620193240Ssam * specially so the logic below to piece the 802.11
2621193240Ssam * header together works.
2622193240Ssam */
2623193240Ssamstatic __inline int
2624193240Ssammwl_anyhdrsize(const void *data)
2625193240Ssam{
2626193240Ssam	const struct ieee80211_frame *wh = data;
2627193240Ssam
2628193240Ssam	if ((wh->i_fc[0]&IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) {
2629193240Ssam		switch (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) {
2630193240Ssam		case IEEE80211_FC0_SUBTYPE_CTS:
2631193240Ssam		case IEEE80211_FC0_SUBTYPE_ACK:
2632193240Ssam			return sizeof(struct ieee80211_frame_ack);
2633193240Ssam		case IEEE80211_FC0_SUBTYPE_BAR:
2634193240Ssam			return sizeof(struct mwl_frame_bar);
2635193240Ssam		}
2636193240Ssam		return sizeof(struct ieee80211_frame_min);
2637193240Ssam	} else
2638193240Ssam		return ieee80211_hdrsize(data);
2639193240Ssam}
2640193240Ssam
2641193240Ssamstatic void
2642193240Ssammwl_handlemicerror(struct ieee80211com *ic, const uint8_t *data)
2643193240Ssam{
2644193240Ssam	const struct ieee80211_frame *wh;
2645193240Ssam	struct ieee80211_node *ni;
2646193240Ssam
2647193240Ssam	wh = (const struct ieee80211_frame *)(data + sizeof(uint16_t));
2648193240Ssam	ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh);
2649193240Ssam	if (ni != NULL) {
2650193240Ssam		ieee80211_notify_michael_failure(ni->ni_vap, wh, 0);
2651193240Ssam		ieee80211_free_node(ni);
2652193240Ssam	}
2653193240Ssam}
2654193240Ssam
2655193240Ssam/*
2656193240Ssam * Convert hardware signal strength to rssi.  The value
2657193240Ssam * provided by the device has the noise floor added in;
2658193240Ssam * we need to compensate for this but we don't have that
2659193240Ssam * so we use a fixed value.
2660193240Ssam *
2661193240Ssam * The offset of 8 is good for both 2.4 and 5GHz.  The LNA
2662193240Ssam * offset is already set as part of the initial gain.  This
2663193240Ssam * will give at least +/- 3dB for 2.4GHz and +/- 5dB for 5GHz.
2664193240Ssam */
2665193240Ssamstatic __inline int
2666193240Ssamcvtrssi(uint8_t ssi)
2667193240Ssam{
2668193240Ssam	int rssi = (int) ssi + 8;
2669193240Ssam	/* XXX hack guess until we have a real noise floor */
2670193240Ssam	rssi = 2*(87 - rssi);	/* NB: .5 dBm units */
2671193240Ssam	return (rssi < 0 ? 0 : rssi > 127 ? 127 : rssi);
2672193240Ssam}
2673193240Ssam
2674193240Ssamstatic void
2675193240Ssammwl_rx_proc(void *arg, int npending)
2676193240Ssam{
2677193240Ssam#define	IEEE80211_DIR_DSTODS(wh) \
2678193240Ssam	((((const struct ieee80211_frame *)wh)->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
2679193240Ssam	struct mwl_softc *sc = arg;
2680193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2681193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
2682193240Ssam	struct mwl_rxbuf *bf;
2683193240Ssam	struct mwl_rxdesc *ds;
2684193240Ssam	struct mbuf *m;
2685193240Ssam	struct ieee80211_qosframe *wh;
2686193240Ssam	struct ieee80211_qosframe_addr4 *wh4;
2687193240Ssam	struct ieee80211_node *ni;
2688193240Ssam	struct mwl_node *mn;
2689193240Ssam	int off, len, hdrlen, pktlen, rssi, ntodo;
2690193240Ssam	uint8_t *data, status;
2691193240Ssam	void *newdata;
2692193240Ssam	int16_t nf;
2693193240Ssam
2694193240Ssam	DPRINTF(sc, MWL_DEBUG_RX_PROC, "%s: pending %u rdptr 0x%x wrptr 0x%x\n",
2695193240Ssam	    __func__, npending, RD4(sc, sc->sc_hwspecs.rxDescRead),
2696193240Ssam	    RD4(sc, sc->sc_hwspecs.rxDescWrite));
2697193240Ssam	nf = -96;			/* XXX */
2698193240Ssam	bf = sc->sc_rxnext;
2699193240Ssam	for (ntodo = mwl_rxquota; ntodo > 0; ntodo--) {
2700193240Ssam		if (bf == NULL)
2701193240Ssam			bf = STAILQ_FIRST(&sc->sc_rxbuf);
2702193240Ssam		ds = bf->bf_desc;
2703193240Ssam		data = bf->bf_data;
2704193240Ssam		if (data == NULL) {
2705193240Ssam			/*
2706193240Ssam			 * If data allocation failed previously there
2707193240Ssam			 * will be no buffer; try again to re-populate it.
2708193240Ssam			 * Note the firmware will not advance to the next
2709193240Ssam			 * descriptor with a dma buffer so we must mimic
2710193240Ssam			 * this or we'll get out of sync.
2711193240Ssam			 */
2712193240Ssam			DPRINTF(sc, MWL_DEBUG_ANY,
2713193240Ssam			    "%s: rx buf w/o dma memory\n", __func__);
2714193240Ssam			(void) mwl_rxbuf_init(sc, bf);
2715193240Ssam			sc->sc_stats.mst_rx_dmabufmissing++;
2716193240Ssam			break;
2717193240Ssam		}
2718193240Ssam		MWL_RXDESC_SYNC(sc, ds,
2719193240Ssam		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2720193240Ssam		if (ds->RxControl != EAGLE_RXD_CTRL_DMA_OWN)
2721193240Ssam			break;
2722193240Ssam#ifdef MWL_DEBUG
2723193240Ssam		if (sc->sc_debug & MWL_DEBUG_RECV_DESC)
2724193240Ssam			mwl_printrxbuf(bf, 0);
2725193240Ssam#endif
2726193240Ssam		status = ds->Status;
2727193240Ssam		if (status & EAGLE_RXD_STATUS_DECRYPT_ERR_MASK) {
2728193240Ssam			ifp->if_ierrors++;
2729193240Ssam			sc->sc_stats.mst_rx_crypto++;
2730193240Ssam			/*
2731193240Ssam			 * NB: Check EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR
2732193240Ssam			 *     for backwards compatibility.
2733193240Ssam			 */
2734193240Ssam			if (status != EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR &&
2735193240Ssam			    (status & EAGLE_RXD_STATUS_TKIP_MIC_DECRYPT_ERR)) {
2736193240Ssam				/*
2737193240Ssam				 * MIC error, notify upper layers.
2738193240Ssam				 */
2739193240Ssam				bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap,
2740193240Ssam				    BUS_DMASYNC_POSTREAD);
2741193240Ssam				mwl_handlemicerror(ic, data);
2742193240Ssam				sc->sc_stats.mst_rx_tkipmic++;
2743193240Ssam			}
2744193240Ssam			/* XXX too painful to tap packets */
2745193240Ssam			goto rx_next;
2746193240Ssam		}
2747193240Ssam		/*
2748193240Ssam		 * Sync the data buffer.
2749193240Ssam		 */
2750193240Ssam		len = le16toh(ds->PktLen);
2751193240Ssam		bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap, BUS_DMASYNC_POSTREAD);
2752193240Ssam		/*
2753193240Ssam		 * The 802.11 header is provided all or in part at the front;
2754193240Ssam		 * use it to calculate the true size of the header that we'll
2755193240Ssam		 * construct below.  We use this to figure out where to copy
2756193240Ssam		 * payload prior to constructing the header.
2757193240Ssam		 */
2758193240Ssam		hdrlen = mwl_anyhdrsize(data + sizeof(uint16_t));
2759193240Ssam		off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2760193240Ssam
2761193240Ssam		/* calculate rssi early so we can re-use for each aggregate */
2762193240Ssam		rssi = cvtrssi(ds->RSSI);
2763193240Ssam
2764193240Ssam		pktlen = hdrlen + (len - off);
2765193240Ssam		/*
2766193240Ssam		 * NB: we know our frame is at least as large as
2767193240Ssam		 * IEEE80211_MIN_LEN because there is a 4-address
2768193240Ssam		 * frame at the front.  Hence there's no need to
2769193240Ssam		 * vet the packet length.  If the frame in fact
2770193240Ssam		 * is too small it should be discarded at the
2771193240Ssam		 * net80211 layer.
2772193240Ssam		 */
2773193240Ssam
2774193240Ssam		/*
2775193240Ssam		 * Attach dma buffer to an mbuf.  We tried
2776193240Ssam		 * doing this based on the packet size (i.e.
2777193240Ssam		 * copying small packets) but it turns out to
2778193240Ssam		 * be a net loss.  The tradeoff might be system
2779193240Ssam		 * dependent (cache architecture is important).
2780193240Ssam		 */
2781193240Ssam		MGETHDR(m, M_DONTWAIT, MT_DATA);
2782193240Ssam		if (m == NULL) {
2783193240Ssam			DPRINTF(sc, MWL_DEBUG_ANY,
2784193240Ssam			    "%s: no rx mbuf\n", __func__);
2785193240Ssam			sc->sc_stats.mst_rx_nombuf++;
2786193240Ssam			goto rx_next;
2787193240Ssam		}
2788193240Ssam		/*
2789193240Ssam		 * Acquire the replacement dma buffer before
2790193240Ssam		 * processing the frame.  If we're out of dma
2791193240Ssam		 * buffers we disable rx interrupts and wait
2792193240Ssam		 * for the free pool to reach mlw_rxdmalow buffers
2793193240Ssam		 * before starting to do work again.  If the firmware
2794193240Ssam		 * runs out of descriptors then it will toss frames
2795193240Ssam		 * which is better than our doing it as that can
2796193240Ssam		 * starve our processing.  It is also important that
2797193240Ssam		 * we always process rx'd frames in case they are
2798193240Ssam		 * A-MPDU as otherwise the host's view of the BA
2799193240Ssam		 * window may get out of sync with the firmware.
2800193240Ssam		 */
2801193240Ssam		newdata = mwl_getrxdma(sc);
2802193240Ssam		if (newdata == NULL) {
2803193240Ssam			/* NB: stat+msg in mwl_getrxdma */
2804193240Ssam			m_free(m);
2805193240Ssam			/* disable RX interrupt and mark state */
2806193240Ssam			mwl_hal_intrset(sc->sc_mh,
2807193240Ssam			    sc->sc_imask &~ MACREG_A2HRIC_BIT_RX_RDY);
2808193240Ssam			sc->sc_rxblocked = 1;
2809193240Ssam			ieee80211_drain(ic);
2810193240Ssam			/* XXX check rxblocked and immediately start again? */
2811193240Ssam			goto rx_stop;
2812193240Ssam		}
2813193240Ssam		bf->bf_data = newdata;
2814193240Ssam		/*
2815193240Ssam		 * Attach the dma buffer to the mbuf;
2816193240Ssam		 * mwl_rxbuf_init will re-setup the rx
2817193240Ssam		 * descriptor using the replacement dma
2818193240Ssam		 * buffer we just installed above.
2819193240Ssam		 */
2820193240Ssam		MEXTADD(m, data, MWL_AGGR_SIZE, mwl_ext_free,
2821193240Ssam		    data, sc, 0, EXT_NET_DRV);
2822193240Ssam		m->m_data += off - hdrlen;
2823193240Ssam		m->m_pkthdr.len = m->m_len = pktlen;
2824193240Ssam		m->m_pkthdr.rcvif = ifp;
2825193240Ssam		/* NB: dma buffer assumed read-only */
2826193240Ssam
2827193240Ssam		/*
2828193240Ssam		 * Piece 802.11 header together.
2829193240Ssam		 */
2830193240Ssam		wh = mtod(m, struct ieee80211_qosframe *);
2831193240Ssam		/* NB: don't need to do this sometimes but ... */
2832193240Ssam		/* XXX special case so we can memcpy after m_devget? */
2833193240Ssam		ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2834193240Ssam		if (IEEE80211_QOS_HAS_SEQ(wh)) {
2835193240Ssam			if (IEEE80211_DIR_DSTODS(wh)) {
2836193240Ssam				wh4 = mtod(m,
2837193240Ssam				    struct ieee80211_qosframe_addr4*);
2838193240Ssam				*(uint16_t *)wh4->i_qos = ds->QosCtrl;
2839193240Ssam			} else {
2840193240Ssam				*(uint16_t *)wh->i_qos = ds->QosCtrl;
2841193240Ssam			}
2842193240Ssam		}
2843193240Ssam		/*
2844193240Ssam		 * The f/w strips WEP header but doesn't clear
2845193240Ssam		 * the WEP bit; mark the packet with M_WEP so
2846193240Ssam		 * net80211 will treat the data as decrypted.
2847193240Ssam		 * While here also clear the PWR_MGT bit since
2848193240Ssam		 * power save is handled by the firmware and
2849193240Ssam		 * passing this up will potentially cause the
2850193240Ssam		 * upper layer to put a station in power save
2851193240Ssam		 * (except when configured with MWL_HOST_PS_SUPPORT).
2852193240Ssam		 */
2853193240Ssam		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
2854193240Ssam			m->m_flags |= M_WEP;
2855193240Ssam#ifdef MWL_HOST_PS_SUPPORT
2856193240Ssam		wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
2857193240Ssam#else
2858193240Ssam		wh->i_fc[1] &= ~(IEEE80211_FC1_WEP | IEEE80211_FC1_PWR_MGT);
2859193240Ssam#endif
2860193240Ssam
2861193240Ssam		if (ieee80211_radiotap_active(ic)) {
2862193240Ssam			struct mwl_rx_radiotap_header *tap = &sc->sc_rx_th;
2863193240Ssam
2864193240Ssam			tap->wr_flags = 0;
2865193240Ssam			tap->wr_rate = ds->Rate;
2866193240Ssam			tap->wr_antsignal = rssi + nf;
2867193240Ssam			tap->wr_antnoise = nf;
2868193240Ssam		}
2869193240Ssam		if (IFF_DUMPPKTS_RECV(sc, wh)) {
2870193240Ssam			ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2871193240Ssam			    len, ds->Rate, rssi);
2872193240Ssam		}
2873193240Ssam		ifp->if_ipackets++;
2874193240Ssam
2875193240Ssam		/* dispatch */
2876193240Ssam		ni = ieee80211_find_rxnode(ic,
2877193240Ssam		    (const struct ieee80211_frame_min *) wh);
2878193240Ssam		if (ni != NULL) {
2879193240Ssam			mn = MWL_NODE(ni);
2880193240Ssam#ifdef MWL_ANT_INFO_SUPPORT
2881193240Ssam			mn->mn_ai.rssi_a = ds->ai.rssi_a;
2882193240Ssam			mn->mn_ai.rssi_b = ds->ai.rssi_b;
2883193240Ssam			mn->mn_ai.rssi_c = ds->ai.rssi_c;
2884193240Ssam			mn->mn_ai.rsvd1 = rssi;
2885193240Ssam#endif
2886193240Ssam			/* tag AMPDU aggregates for reorder processing */
2887193240Ssam#if 0
2888193240Ssam			if ((ds->Rate & 0x80) && (ds->HtSig2 & 0x8))
2889193240Ssam#else
2890193240Ssam			if (ni->ni_flags & IEEE80211_NODE_HT)
2891193240Ssam#endif
2892193240Ssam				m->m_flags |= M_AMPDU;
2893193240Ssam			(void) ieee80211_input(ni, m, rssi, nf);
2894193240Ssam			ieee80211_free_node(ni);
2895193240Ssam		} else
2896193240Ssam			(void) ieee80211_input_all(ic, m, rssi, nf);
2897193240Ssamrx_next:
2898193240Ssam		/* NB: ignore ENOMEM so we process more descriptors */
2899193240Ssam		(void) mwl_rxbuf_init(sc, bf);
2900193240Ssam		bf = STAILQ_NEXT(bf, bf_list);
2901193240Ssam	}
2902193240Ssamrx_stop:
2903193240Ssam	sc->sc_rxnext = bf;
2904193240Ssam
2905193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2906193240Ssam	    !IFQ_IS_EMPTY(&ifp->if_snd)) {
2907193240Ssam		/* NB: kick fw; the tx thread may have been preempted */
2908193240Ssam		mwl_hal_txstart(sc->sc_mh, 0);
2909193240Ssam		mwl_start(ifp);
2910193240Ssam	}
2911193240Ssam#undef IEEE80211_DIR_DSTODS
2912193240Ssam}
2913193240Ssam
2914193240Ssamstatic void
2915193240Ssammwl_txq_init(struct mwl_softc *sc, struct mwl_txq *txq, int qnum)
2916193240Ssam{
2917193240Ssam	struct mwl_txbuf *bf, *bn;
2918193240Ssam	struct mwl_txdesc *ds;
2919193240Ssam
2920193240Ssam	MWL_TXQ_LOCK_INIT(sc, txq);
2921193240Ssam	txq->qnum = qnum;
2922193240Ssam	txq->txpri = 0;	/* XXX */
2923193240Ssam#if 0
2924193240Ssam	/* NB: q setup by mwl_txdma_setup XXX */
2925193240Ssam	STAILQ_INIT(&txq->free);
2926193240Ssam#endif
2927193240Ssam	STAILQ_FOREACH(bf, &txq->free, bf_list) {
2928193240Ssam		bf->bf_txq = txq;
2929193240Ssam
2930193240Ssam		ds = bf->bf_desc;
2931193240Ssam		bn = STAILQ_NEXT(bf, bf_list);
2932193240Ssam		if (bn == NULL)
2933193240Ssam			bn = STAILQ_FIRST(&txq->free);
2934193240Ssam		ds->pPhysNext = htole32(bn->bf_daddr);
2935193240Ssam	}
2936193240Ssam	STAILQ_INIT(&txq->active);
2937193240Ssam}
2938193240Ssam
2939193240Ssam/*
2940193240Ssam * Setup a hardware data transmit queue for the specified
2941193240Ssam * access control.  We record the mapping from ac's
2942193240Ssam * to h/w queues for use by mwl_tx_start.
2943193240Ssam */
2944193240Ssamstatic int
2945193240Ssammwl_tx_setup(struct mwl_softc *sc, int ac, int mvtype)
2946193240Ssam{
2947193240Ssam#define	N(a)	(sizeof(a)/sizeof(a[0]))
2948193240Ssam	struct mwl_txq *txq;
2949193240Ssam
2950193240Ssam	if (ac >= N(sc->sc_ac2q)) {
2951193240Ssam		device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n",
2952193240Ssam			ac, N(sc->sc_ac2q));
2953193240Ssam		return 0;
2954193240Ssam	}
2955193240Ssam	if (mvtype >= MWL_NUM_TX_QUEUES) {
2956193240Ssam		device_printf(sc->sc_dev, "mvtype %u out of range, max %u!\n",
2957193240Ssam			mvtype, MWL_NUM_TX_QUEUES);
2958193240Ssam		return 0;
2959193240Ssam	}
2960193240Ssam	txq = &sc->sc_txq[mvtype];
2961193240Ssam	mwl_txq_init(sc, txq, mvtype);
2962193240Ssam	sc->sc_ac2q[ac] = txq;
2963193240Ssam	return 1;
2964193240Ssam#undef N
2965193240Ssam}
2966193240Ssam
2967193240Ssam/*
2968193240Ssam * Update WME parameters for a transmit queue.
2969193240Ssam */
2970193240Ssamstatic int
2971193240Ssammwl_txq_update(struct mwl_softc *sc, int ac)
2972193240Ssam{
2973193240Ssam#define	MWL_EXPONENT_TO_VALUE(v)	((1<<v)-1)
2974193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2975193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
2976193240Ssam	struct mwl_txq *txq = sc->sc_ac2q[ac];
2977193240Ssam	struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
2978193240Ssam	struct mwl_hal *mh = sc->sc_mh;
2979193240Ssam	int aifs, cwmin, cwmax, txoplim;
2980193240Ssam
2981193240Ssam	aifs = wmep->wmep_aifsn;
2982193240Ssam	/* XXX in sta mode need to pass log values for cwmin/max */
2983193240Ssam	cwmin = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
2984193240Ssam	cwmax = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
2985193240Ssam	txoplim = wmep->wmep_txopLimit;		/* NB: units of 32us */
2986193240Ssam
2987193240Ssam	if (mwl_hal_setedcaparams(mh, txq->qnum, cwmin, cwmax, aifs, txoplim)) {
2988193240Ssam		device_printf(sc->sc_dev, "unable to update hardware queue "
2989193240Ssam			"parameters for %s traffic!\n",
2990193240Ssam			ieee80211_wme_acnames[ac]);
2991193240Ssam		return 0;
2992193240Ssam	}
2993193240Ssam	return 1;
2994193240Ssam#undef MWL_EXPONENT_TO_VALUE
2995193240Ssam}
2996193240Ssam
2997193240Ssam/*
2998193240Ssam * Callback from the 802.11 layer to update WME parameters.
2999193240Ssam */
3000193240Ssamstatic int
3001193240Ssammwl_wme_update(struct ieee80211com *ic)
3002193240Ssam{
3003193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
3004193240Ssam
3005193240Ssam	return !mwl_txq_update(sc, WME_AC_BE) ||
3006193240Ssam	    !mwl_txq_update(sc, WME_AC_BK) ||
3007193240Ssam	    !mwl_txq_update(sc, WME_AC_VI) ||
3008193240Ssam	    !mwl_txq_update(sc, WME_AC_VO) ? EIO : 0;
3009193240Ssam}
3010193240Ssam
3011193240Ssam/*
3012193240Ssam * Reclaim resources for a setup queue.
3013193240Ssam */
3014193240Ssamstatic void
3015193240Ssammwl_tx_cleanupq(struct mwl_softc *sc, struct mwl_txq *txq)
3016193240Ssam{
3017193240Ssam	/* XXX hal work? */
3018193240Ssam	MWL_TXQ_LOCK_DESTROY(txq);
3019193240Ssam}
3020193240Ssam
3021193240Ssam/*
3022193240Ssam * Reclaim all tx queue resources.
3023193240Ssam */
3024193240Ssamstatic void
3025193240Ssammwl_tx_cleanup(struct mwl_softc *sc)
3026193240Ssam{
3027193240Ssam	int i;
3028193240Ssam
3029193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
3030193240Ssam		mwl_tx_cleanupq(sc, &sc->sc_txq[i]);
3031193240Ssam}
3032193240Ssam
3033193240Ssamstatic int
3034193240Ssammwl_tx_dmasetup(struct mwl_softc *sc, struct mwl_txbuf *bf, struct mbuf *m0)
3035193240Ssam{
3036193240Ssam	struct mbuf *m;
3037193240Ssam	int error;
3038193240Ssam
3039193240Ssam	/*
3040193240Ssam	 * Load the DMA map so any coalescing is done.  This
3041193240Ssam	 * also calculates the number of descriptors we need.
3042193240Ssam	 */
3043193240Ssam	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
3044193240Ssam				     bf->bf_segs, &bf->bf_nseg,
3045193240Ssam				     BUS_DMA_NOWAIT);
3046193240Ssam	if (error == EFBIG) {
3047193240Ssam		/* XXX packet requires too many descriptors */
3048193240Ssam		bf->bf_nseg = MWL_TXDESC+1;
3049193240Ssam	} else if (error != 0) {
3050193240Ssam		sc->sc_stats.mst_tx_busdma++;
3051193240Ssam		m_freem(m0);
3052193240Ssam		return error;
3053193240Ssam	}
3054193240Ssam	/*
3055193240Ssam	 * Discard null packets and check for packets that
3056193240Ssam	 * require too many TX descriptors.  We try to convert
3057193240Ssam	 * the latter to a cluster.
3058193240Ssam	 */
3059193240Ssam	if (error == EFBIG) {		/* too many desc's, linearize */
3060193240Ssam		sc->sc_stats.mst_tx_linear++;
3061193240Ssam#if MWL_TXDESC > 1
3062193240Ssam		m = m_collapse(m0, M_DONTWAIT, MWL_TXDESC);
3063193240Ssam#else
3064193240Ssam		m = m_defrag(m0, M_DONTWAIT);
3065193240Ssam#endif
3066193240Ssam		if (m == NULL) {
3067193240Ssam			m_freem(m0);
3068193240Ssam			sc->sc_stats.mst_tx_nombuf++;
3069193240Ssam			return ENOMEM;
3070193240Ssam		}
3071193240Ssam		m0 = m;
3072193240Ssam		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
3073193240Ssam					     bf->bf_segs, &bf->bf_nseg,
3074193240Ssam					     BUS_DMA_NOWAIT);
3075193240Ssam		if (error != 0) {
3076193240Ssam			sc->sc_stats.mst_tx_busdma++;
3077193240Ssam			m_freem(m0);
3078193240Ssam			return error;
3079193240Ssam		}
3080193240Ssam		KASSERT(bf->bf_nseg <= MWL_TXDESC,
3081193240Ssam		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
3082193240Ssam	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
3083193240Ssam		sc->sc_stats.mst_tx_nodata++;
3084193240Ssam		m_freem(m0);
3085193240Ssam		return EIO;
3086193240Ssam	}
3087193240Ssam	DPRINTF(sc, MWL_DEBUG_XMIT, "%s: m %p len %u\n",
3088193240Ssam		__func__, m0, m0->m_pkthdr.len);
3089193240Ssam	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
3090193240Ssam	bf->bf_m = m0;
3091193240Ssam
3092193240Ssam	return 0;
3093193240Ssam}
3094193240Ssam
3095193240Ssamstatic __inline int
3096193240Ssammwl_cvtlegacyrate(int rate)
3097193240Ssam{
3098193240Ssam	switch (rate) {
3099193240Ssam	case 2:	 return 0;
3100193240Ssam	case 4:	 return 1;
3101193240Ssam	case 11: return 2;
3102193240Ssam	case 22: return 3;
3103193240Ssam	case 44: return 4;
3104193240Ssam	case 12: return 5;
3105193240Ssam	case 18: return 6;
3106193240Ssam	case 24: return 7;
3107193240Ssam	case 36: return 8;
3108193240Ssam	case 48: return 9;
3109193240Ssam	case 72: return 10;
3110193240Ssam	case 96: return 11;
3111193240Ssam	case 108:return 12;
3112193240Ssam	}
3113193240Ssam	return 0;
3114193240Ssam}
3115193240Ssam
3116193240Ssam/*
3117193240Ssam * Calculate fixed tx rate information per client state;
3118193240Ssam * this value is suitable for writing to the Format field
3119193240Ssam * of a tx descriptor.
3120193240Ssam */
3121193240Ssamstatic uint16_t
3122193240Ssammwl_calcformat(uint8_t rate, const struct ieee80211_node *ni)
3123193240Ssam{
3124193240Ssam	uint16_t fmt;
3125193240Ssam
3126193240Ssam	fmt = SM(3, EAGLE_TXD_ANTENNA)
3127193240Ssam	    | (IEEE80211_IS_CHAN_HT40D(ni->ni_chan) ?
3128193240Ssam		EAGLE_TXD_EXTCHAN_LO : EAGLE_TXD_EXTCHAN_HI);
3129193240Ssam	if (rate & 0x80) {		/* HT MCS */
3130193240Ssam		fmt |= EAGLE_TXD_FORMAT_HT
3131193240Ssam		    /* NB: 0x80 implicitly stripped from ucastrate */
3132193240Ssam		    | SM(rate, EAGLE_TXD_RATE);
3133193240Ssam		/* XXX short/long GI may be wrong; re-check */
3134193240Ssam		if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
3135193240Ssam			fmt |= EAGLE_TXD_CHW_40
3136193240Ssam			    | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40 ?
3137193240Ssam			        EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG);
3138193240Ssam		} else {
3139193240Ssam			fmt |= EAGLE_TXD_CHW_20
3140193240Ssam			    | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20 ?
3141193240Ssam			        EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG);
3142193240Ssam		}
3143193240Ssam	} else {			/* legacy rate */
3144193240Ssam		fmt |= EAGLE_TXD_FORMAT_LEGACY
3145193240Ssam		    | SM(mwl_cvtlegacyrate(rate), EAGLE_TXD_RATE)
3146193240Ssam		    | EAGLE_TXD_CHW_20
3147193240Ssam		    /* XXX iv_flags & IEEE80211_F_SHPREAMBLE? */
3148193240Ssam		    | (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE ?
3149193240Ssam			EAGLE_TXD_PREAMBLE_SHORT : EAGLE_TXD_PREAMBLE_LONG);
3150193240Ssam	}
3151193240Ssam	return fmt;
3152193240Ssam}
3153193240Ssam
3154193240Ssamstatic int
3155193240Ssammwl_tx_start(struct mwl_softc *sc, struct ieee80211_node *ni, struct mwl_txbuf *bf,
3156193240Ssam    struct mbuf *m0)
3157193240Ssam{
3158193240Ssam#define	IEEE80211_DIR_DSTODS(wh) \
3159193240Ssam	((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
3160193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3161193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3162193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
3163193240Ssam	int error, iswep, ismcast;
3164193240Ssam	int hdrlen, copyhdrlen, pktlen;
3165193240Ssam	struct mwl_txdesc *ds;
3166193240Ssam	struct mwl_txq *txq;
3167193240Ssam	struct ieee80211_frame *wh;
3168193240Ssam	struct mwltxrec *tr;
3169193240Ssam	struct mwl_node *mn;
3170193240Ssam	uint16_t qos;
3171193240Ssam#if MWL_TXDESC > 1
3172193240Ssam	int i;
3173193240Ssam#endif
3174193240Ssam
3175193240Ssam	wh = mtod(m0, struct ieee80211_frame *);
3176193240Ssam	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
3177193240Ssam	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
3178193240Ssam	hdrlen = ieee80211_anyhdrsize(wh);
3179193240Ssam	copyhdrlen = hdrlen;
3180193240Ssam	pktlen = m0->m_pkthdr.len;
3181193240Ssam	if (IEEE80211_QOS_HAS_SEQ(wh)) {
3182193240Ssam		if (IEEE80211_DIR_DSTODS(wh)) {
3183193240Ssam			qos = *(uint16_t *)
3184193240Ssam			    (((struct ieee80211_qosframe_addr4 *) wh)->i_qos);
3185193240Ssam			copyhdrlen -= sizeof(qos);
3186193240Ssam		} else
3187193240Ssam			qos = *(uint16_t *)
3188193240Ssam			    (((struct ieee80211_qosframe *) wh)->i_qos);
3189193240Ssam	} else
3190193240Ssam		qos = 0;
3191193240Ssam
3192193240Ssam	if (iswep) {
3193193240Ssam		const struct ieee80211_cipher *cip;
3194193240Ssam		struct ieee80211_key *k;
3195193240Ssam
3196193240Ssam		/*
3197193240Ssam		 * Construct the 802.11 header+trailer for an encrypted
3198193240Ssam		 * frame. The only reason this can fail is because of an
3199193240Ssam		 * unknown or unsupported cipher/key type.
3200193240Ssam		 *
3201193240Ssam		 * NB: we do this even though the firmware will ignore
3202193240Ssam		 *     what we've done for WEP and TKIP as we need the
3203193240Ssam		 *     ExtIV filled in for CCMP and this also adjusts
3204193240Ssam		 *     the headers which simplifies our work below.
3205193240Ssam		 */
3206193240Ssam		k = ieee80211_crypto_encap(ni, m0);
3207193240Ssam		if (k == NULL) {
3208193240Ssam			/*
3209193240Ssam			 * This can happen when the key is yanked after the
3210193240Ssam			 * frame was queued.  Just discard the frame; the
3211193240Ssam			 * 802.11 layer counts failures and provides
3212193240Ssam			 * debugging/diagnostics.
3213193240Ssam			 */
3214193240Ssam			m_freem(m0);
3215193240Ssam			return EIO;
3216193240Ssam		}
3217193240Ssam		/*
3218193240Ssam		 * Adjust the packet length for the crypto additions
3219193240Ssam		 * done during encap and any other bits that the f/w
3220193240Ssam		 * will add later on.
3221193240Ssam		 */
3222193240Ssam		cip = k->wk_cipher;
3223193240Ssam		pktlen += cip->ic_header + cip->ic_miclen + cip->ic_trailer;
3224193240Ssam
3225193240Ssam		/* packet header may have moved, reset our local pointer */
3226193240Ssam		wh = mtod(m0, struct ieee80211_frame *);
3227193240Ssam	}
3228193240Ssam
3229193240Ssam	if (ieee80211_radiotap_active_vap(vap)) {
3230193240Ssam		sc->sc_tx_th.wt_flags = 0;	/* XXX */
3231193240Ssam		if (iswep)
3232193240Ssam			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
3233193240Ssam#if 0
3234193240Ssam		sc->sc_tx_th.wt_rate = ds->DataRate;
3235193240Ssam#endif
3236193240Ssam		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
3237193240Ssam		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
3238193240Ssam
3239193240Ssam		ieee80211_radiotap_tx(vap, m0);
3240193240Ssam	}
3241193240Ssam	/*
3242193240Ssam	 * Copy up/down the 802.11 header; the firmware requires
3243193240Ssam	 * we present a 2-byte payload length followed by a
3244193240Ssam	 * 4-address header (w/o QoS), followed (optionally) by
3245193240Ssam	 * any WEP/ExtIV header (but only filled in for CCMP).
3246193240Ssam	 * We are assured the mbuf has sufficient headroom to
3247193240Ssam	 * prepend in-place by the setup of ic_headroom in
3248193240Ssam	 * mwl_attach.
3249193240Ssam	 */
3250193240Ssam	if (hdrlen < sizeof(struct mwltxrec)) {
3251193240Ssam		const int space = sizeof(struct mwltxrec) - hdrlen;
3252193240Ssam		if (M_LEADINGSPACE(m0) < space) {
3253193240Ssam			/* NB: should never happen */
3254193240Ssam			device_printf(sc->sc_dev,
3255193240Ssam			    "not enough headroom, need %d found %zd, "
3256193240Ssam			    "m_flags 0x%x m_len %d\n",
3257193240Ssam			    space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
3258193240Ssam			ieee80211_dump_pkt(ic,
3259193240Ssam			    mtod(m0, const uint8_t *), m0->m_len, 0, -1);
3260193240Ssam			m_freem(m0);
3261193240Ssam			sc->sc_stats.mst_tx_noheadroom++;
3262193240Ssam			return EIO;
3263193240Ssam		}
3264193240Ssam		M_PREPEND(m0, space, M_NOWAIT);
3265193240Ssam	}
3266193240Ssam	tr = mtod(m0, struct mwltxrec *);
3267193240Ssam	if (wh != (struct ieee80211_frame *) &tr->wh)
3268193240Ssam		ovbcopy(wh, &tr->wh, hdrlen);
3269193240Ssam	/*
3270193240Ssam	 * Note: the "firmware length" is actually the length
3271193240Ssam	 * of the fully formed "802.11 payload".  That is, it's
3272193240Ssam	 * everything except for the 802.11 header.  In particular
3273193240Ssam	 * this includes all crypto material including the MIC!
3274193240Ssam	 */
3275193240Ssam	tr->fwlen = htole16(pktlen - hdrlen);
3276193240Ssam
3277193240Ssam	/*
3278193240Ssam	 * Load the DMA map so any coalescing is done.  This
3279193240Ssam	 * also calculates the number of descriptors we need.
3280193240Ssam	 */
3281193240Ssam	error = mwl_tx_dmasetup(sc, bf, m0);
3282193240Ssam	if (error != 0) {
3283193240Ssam		/* NB: stat collected in mwl_tx_dmasetup */
3284193240Ssam		DPRINTF(sc, MWL_DEBUG_XMIT,
3285193240Ssam		    "%s: unable to setup dma\n", __func__);
3286193240Ssam		return error;
3287193240Ssam	}
3288193240Ssam	bf->bf_node = ni;			/* NB: held reference */
3289193240Ssam	m0 = bf->bf_m;				/* NB: may have changed */
3290193240Ssam	tr = mtod(m0, struct mwltxrec *);
3291193240Ssam	wh = (struct ieee80211_frame *)&tr->wh;
3292193240Ssam
3293193240Ssam	/*
3294193240Ssam	 * Formulate tx descriptor.
3295193240Ssam	 */
3296193240Ssam	ds = bf->bf_desc;
3297193240Ssam	txq = bf->bf_txq;
3298193240Ssam
3299193240Ssam	ds->QosCtrl = qos;			/* NB: already little-endian */
3300193240Ssam#if MWL_TXDESC == 1
3301193240Ssam	/*
3302193240Ssam	 * NB: multiframes should be zero because the descriptors
3303193240Ssam	 *     are initialized to zero.  This should handle the case
3304193240Ssam	 *     where the driver is built with MWL_TXDESC=1 but we are
3305193240Ssam	 *     using firmware with multi-segment support.
3306193240Ssam	 */
3307193240Ssam	ds->PktPtr = htole32(bf->bf_segs[0].ds_addr);
3308193240Ssam	ds->PktLen = htole16(bf->bf_segs[0].ds_len);
3309193240Ssam#else
3310193240Ssam	ds->multiframes = htole32(bf->bf_nseg);
3311193240Ssam	ds->PktLen = htole16(m0->m_pkthdr.len);
3312193240Ssam	for (i = 0; i < bf->bf_nseg; i++) {
3313193240Ssam		ds->PktPtrArray[i] = htole32(bf->bf_segs[i].ds_addr);
3314193240Ssam		ds->PktLenArray[i] = htole16(bf->bf_segs[i].ds_len);
3315193240Ssam	}
3316193240Ssam#endif
3317193240Ssam	/* NB: pPhysNext, DataRate, and SapPktInfo setup once, don't touch */
3318193240Ssam	ds->Format = 0;
3319193240Ssam	ds->pad = 0;
3320193240Ssam
3321193240Ssam	mn = MWL_NODE(ni);
3322193240Ssam	/*
3323193240Ssam	 * Select transmit rate.
3324193240Ssam	 */
3325193240Ssam	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
3326193240Ssam	case IEEE80211_FC0_TYPE_MGT:
3327193240Ssam		sc->sc_stats.mst_tx_mgmt++;
3328193240Ssam		/* fall thru... */
3329193240Ssam	case IEEE80211_FC0_TYPE_CTL:
3330193240Ssam		/* NB: assign to BE q to avoid bursting */
3331193240Ssam		ds->TxPriority = MWL_WME_AC_BE;
3332193240Ssam		break;
3333193240Ssam	case IEEE80211_FC0_TYPE_DATA:
3334193240Ssam		if (!ismcast) {
3335193240Ssam			const struct ieee80211_txparam *tp = ni->ni_txparms;
3336193240Ssam			/*
3337193240Ssam			 * EAPOL frames get forced to a fixed rate and w/o
3338193240Ssam			 * aggregation; otherwise check for any fixed rate
3339193240Ssam			 * for the client (may depend on association state).
3340193240Ssam			 */
3341193240Ssam			if (m0->m_flags & M_EAPOL) {
3342193240Ssam				const struct mwl_vap *mvp = MWL_VAP_CONST(vap);
3343193240Ssam				ds->Format = mvp->mv_eapolformat;
3344193240Ssam				ds->pad = htole16(
3345193240Ssam				    EAGLE_TXD_FIXED_RATE | EAGLE_TXD_DONT_AGGR);
3346193240Ssam			} else if (tp != NULL && /* XXX temp dwds WAR */
3347193240Ssam			    tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
3348193240Ssam				/* XXX pre-calculate per node */
3349193240Ssam				ds->Format = htole16(
3350193240Ssam				    mwl_calcformat(tp->ucastrate, ni));
3351193240Ssam				ds->pad = htole16(EAGLE_TXD_FIXED_RATE);
3352193240Ssam			}
3353193240Ssam			/* NB: EAPOL frames will never have qos set */
3354193240Ssam			if (qos == 0)
3355193240Ssam				ds->TxPriority = txq->qnum;
3356193240Ssam#if MWL_MAXBA > 3
3357193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[3], qos))
3358193240Ssam				ds->TxPriority = mn->mn_ba[3].txq;
3359193240Ssam#endif
3360193240Ssam#if MWL_MAXBA > 2
3361193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[2], qos))
3362193240Ssam				ds->TxPriority = mn->mn_ba[2].txq;
3363193240Ssam#endif
3364193240Ssam#if MWL_MAXBA > 1
3365193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[1], qos))
3366193240Ssam				ds->TxPriority = mn->mn_ba[1].txq;
3367193240Ssam#endif
3368193240Ssam#if MWL_MAXBA > 0
3369193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[0], qos))
3370193240Ssam				ds->TxPriority = mn->mn_ba[0].txq;
3371193240Ssam#endif
3372193240Ssam			else
3373193240Ssam				ds->TxPriority = txq->qnum;
3374193240Ssam		} else
3375193240Ssam			ds->TxPriority = txq->qnum;
3376193240Ssam		break;
3377193240Ssam	default:
3378193240Ssam		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
3379193240Ssam			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
3380193240Ssam		sc->sc_stats.mst_tx_badframetype++;
3381193240Ssam		m_freem(m0);
3382193240Ssam		return EIO;
3383193240Ssam	}
3384193240Ssam
3385193240Ssam	if (IFF_DUMPPKTS_XMIT(sc))
3386193240Ssam		ieee80211_dump_pkt(ic,
3387193240Ssam		    mtod(m0, const uint8_t *)+sizeof(uint16_t),
3388193240Ssam		    m0->m_len - sizeof(uint16_t), ds->DataRate, -1);
3389193240Ssam
3390193240Ssam	MWL_TXQ_LOCK(txq);
3391193240Ssam	ds->Status = htole32(EAGLE_TXD_STATUS_FW_OWNED);
3392193240Ssam	STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
3393193240Ssam	MWL_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3394193240Ssam
3395193240Ssam	ifp->if_opackets++;
3396193240Ssam	ifp->if_timer = 5;
3397193240Ssam	MWL_TXQ_UNLOCK(txq);
3398193240Ssam
3399193240Ssam	return 0;
3400193240Ssam#undef	IEEE80211_DIR_DSTODS
3401193240Ssam}
3402193240Ssam
3403193240Ssamstatic __inline int
3404193240Ssammwl_cvtlegacyrix(int rix)
3405193240Ssam{
3406193240Ssam#define	N(x)	(sizeof(x)/sizeof(x[0]))
3407193240Ssam	static const int ieeerates[] =
3408193240Ssam	    { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 72, 96, 108 };
3409193240Ssam	return (rix < N(ieeerates) ? ieeerates[rix] : 0);
3410193240Ssam#undef N
3411193240Ssam}
3412193240Ssam
3413193240Ssam/*
3414193240Ssam * Process completed xmit descriptors from the specified queue.
3415193240Ssam */
3416193240Ssamstatic int
3417193240Ssammwl_tx_processq(struct mwl_softc *sc, struct mwl_txq *txq)
3418193240Ssam{
3419193240Ssam#define	EAGLE_TXD_STATUS_MCAST \
3420193240Ssam	(EAGLE_TXD_STATUS_MULTICAST_TX | EAGLE_TXD_STATUS_BROADCAST_TX)
3421193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3422193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3423193240Ssam	struct mwl_txbuf *bf;
3424193240Ssam	struct mwl_txdesc *ds;
3425193240Ssam	struct ieee80211_node *ni;
3426193240Ssam	struct mwl_node *an;
3427193240Ssam	int nreaped;
3428193240Ssam	uint32_t status;
3429193240Ssam
3430193240Ssam	DPRINTF(sc, MWL_DEBUG_TX_PROC, "%s: tx queue %u\n", __func__, txq->qnum);
3431193240Ssam	for (nreaped = 0;; nreaped++) {
3432193240Ssam		MWL_TXQ_LOCK(txq);
3433193240Ssam		bf = STAILQ_FIRST(&txq->active);
3434193240Ssam		if (bf == NULL) {
3435193240Ssam			MWL_TXQ_UNLOCK(txq);
3436193240Ssam			break;
3437193240Ssam		}
3438193240Ssam		ds = bf->bf_desc;
3439193240Ssam		MWL_TXDESC_SYNC(txq, ds,
3440193240Ssam		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
3441193240Ssam		if (ds->Status & htole32(EAGLE_TXD_STATUS_FW_OWNED)) {
3442193240Ssam			MWL_TXQ_UNLOCK(txq);
3443193240Ssam			break;
3444193240Ssam		}
3445193240Ssam		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
3446193240Ssam		MWL_TXQ_UNLOCK(txq);
3447193240Ssam
3448193240Ssam#ifdef MWL_DEBUG
3449193240Ssam		if (sc->sc_debug & MWL_DEBUG_XMIT_DESC)
3450193240Ssam			mwl_printtxbuf(bf, txq->qnum, nreaped);
3451193240Ssam#endif
3452193240Ssam		ni = bf->bf_node;
3453193240Ssam		if (ni != NULL) {
3454193240Ssam			an = MWL_NODE(ni);
3455193240Ssam			status = le32toh(ds->Status);
3456193240Ssam			if (status & EAGLE_TXD_STATUS_OK) {
3457193240Ssam				uint16_t Format = le16toh(ds->Format);
3458193240Ssam				uint8_t txant = MS(Format, EAGLE_TXD_ANTENNA);
3459193240Ssam
3460193240Ssam				sc->sc_stats.mst_ant_tx[txant]++;
3461193240Ssam				if (status & EAGLE_TXD_STATUS_OK_RETRY)
3462193240Ssam					sc->sc_stats.mst_tx_retries++;
3463193240Ssam				if (status & EAGLE_TXD_STATUS_OK_MORE_RETRY)
3464193240Ssam					sc->sc_stats.mst_tx_mretries++;
3465193240Ssam				if (txq->qnum >= MWL_WME_AC_VO)
3466193240Ssam					ic->ic_wme.wme_hipri_traffic++;
3467193240Ssam				ni->ni_txrate = MS(Format, EAGLE_TXD_RATE);
3468193240Ssam				if ((Format & EAGLE_TXD_FORMAT_HT) == 0) {
3469193240Ssam					ni->ni_txrate = mwl_cvtlegacyrix(
3470193240Ssam					    ni->ni_txrate);
3471193240Ssam				} else
3472193240Ssam					ni->ni_txrate |= IEEE80211_RATE_MCS;
3473193240Ssam				sc->sc_stats.mst_tx_rate = ni->ni_txrate;
3474193240Ssam			} else {
3475193240Ssam				if (status & EAGLE_TXD_STATUS_FAILED_LINK_ERROR)
3476193240Ssam					sc->sc_stats.mst_tx_linkerror++;
3477193240Ssam				if (status & EAGLE_TXD_STATUS_FAILED_XRETRY)
3478193240Ssam					sc->sc_stats.mst_tx_xretries++;
3479193240Ssam				if (status & EAGLE_TXD_STATUS_FAILED_AGING)
3480193240Ssam					sc->sc_stats.mst_tx_aging++;
3481193240Ssam				if (bf->bf_m->m_flags & M_FF)
3482193240Ssam					sc->sc_stats.mst_ff_txerr++;
3483193240Ssam			}
3484193240Ssam			/*
3485193240Ssam			 * Do any tx complete callback.  Note this must
3486193240Ssam			 * be done before releasing the node reference.
3487193240Ssam			 * XXX no way to figure out if frame was ACK'd
3488193240Ssam			 */
3489193240Ssam			if (bf->bf_m->m_flags & M_TXCB) {
3490193240Ssam				/* XXX strip fw len in case header inspected */
3491193240Ssam				m_adj(bf->bf_m, sizeof(uint16_t));
3492193240Ssam				ieee80211_process_callback(ni, bf->bf_m,
3493193240Ssam					(status & EAGLE_TXD_STATUS_OK) == 0);
3494193240Ssam			}
3495193240Ssam			/*
3496193240Ssam			 * Reclaim reference to node.
3497193240Ssam			 *
3498193240Ssam			 * NB: the node may be reclaimed here if, for example
3499193240Ssam			 *     this is a DEAUTH message that was sent and the
3500193240Ssam			 *     node was timed out due to inactivity.
3501193240Ssam			 */
3502193240Ssam			ieee80211_free_node(ni);
3503193240Ssam		}
3504193240Ssam		ds->Status = htole32(EAGLE_TXD_STATUS_IDLE);
3505193240Ssam
3506193240Ssam		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3507193240Ssam		    BUS_DMASYNC_POSTWRITE);
3508193240Ssam		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3509193240Ssam		m_freem(bf->bf_m);
3510193240Ssam
3511193240Ssam		mwl_puttxbuf_tail(txq, bf);
3512193240Ssam	}
3513193240Ssam	return nreaped;
3514193240Ssam#undef EAGLE_TXD_STATUS_MCAST
3515193240Ssam}
3516193240Ssam
3517193240Ssam/*
3518193240Ssam * Deferred processing of transmit interrupt; special-cased
3519193240Ssam * for four hardware queues, 0-3.
3520193240Ssam */
3521193240Ssamstatic void
3522193240Ssammwl_tx_proc(void *arg, int npending)
3523193240Ssam{
3524193240Ssam	struct mwl_softc *sc = arg;
3525193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3526193240Ssam	int nreaped;
3527193240Ssam
3528193240Ssam	/*
3529193240Ssam	 * Process each active queue.
3530193240Ssam	 */
3531193240Ssam	nreaped = 0;
3532193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[0].active))
3533193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[0]);
3534193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[1].active))
3535193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[1]);
3536193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[2].active))
3537193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[2]);
3538193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[3].active))
3539193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[3]);
3540193240Ssam
3541193240Ssam	if (nreaped != 0) {
3542193240Ssam		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3543193240Ssam		ifp->if_timer = 0;
3544193240Ssam		if (!IFQ_IS_EMPTY(&ifp->if_snd)) {
3545193240Ssam			/* NB: kick fw; the tx thread may have been preempted */
3546193240Ssam			mwl_hal_txstart(sc->sc_mh, 0);
3547193240Ssam			mwl_start(ifp);
3548193240Ssam		}
3549193240Ssam	}
3550193240Ssam}
3551193240Ssam
3552193240Ssamstatic void
3553193240Ssammwl_tx_draintxq(struct mwl_softc *sc, struct mwl_txq *txq)
3554193240Ssam{
3555193240Ssam	struct ieee80211_node *ni;
3556193240Ssam	struct mwl_txbuf *bf;
3557193240Ssam	u_int ix;
3558193240Ssam
3559193240Ssam	/*
3560193240Ssam	 * NB: this assumes output has been stopped and
3561193240Ssam	 *     we do not need to block mwl_tx_tasklet
3562193240Ssam	 */
3563193240Ssam	for (ix = 0;; ix++) {
3564193240Ssam		MWL_TXQ_LOCK(txq);
3565193240Ssam		bf = STAILQ_FIRST(&txq->active);
3566193240Ssam		if (bf == NULL) {
3567193240Ssam			MWL_TXQ_UNLOCK(txq);
3568193240Ssam			break;
3569193240Ssam		}
3570193240Ssam		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
3571193240Ssam		MWL_TXQ_UNLOCK(txq);
3572193240Ssam#ifdef MWL_DEBUG
3573193240Ssam		if (sc->sc_debug & MWL_DEBUG_RESET) {
3574193240Ssam			struct ifnet *ifp = sc->sc_ifp;
3575193240Ssam			struct ieee80211com *ic = ifp->if_l2com;
3576193240Ssam			const struct mwltxrec *tr =
3577193240Ssam			    mtod(bf->bf_m, const struct mwltxrec *);
3578193240Ssam			mwl_printtxbuf(bf, txq->qnum, ix);
3579193240Ssam			ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
3580193240Ssam				bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
3581193240Ssam		}
3582193240Ssam#endif /* MWL_DEBUG */
3583193240Ssam		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3584193240Ssam		ni = bf->bf_node;
3585193240Ssam		if (ni != NULL) {
3586193240Ssam			/*
3587193240Ssam			 * Reclaim node reference.
3588193240Ssam			 */
3589193240Ssam			ieee80211_free_node(ni);
3590193240Ssam		}
3591193240Ssam		m_freem(bf->bf_m);
3592193240Ssam
3593193240Ssam		mwl_puttxbuf_tail(txq, bf);
3594193240Ssam	}
3595193240Ssam}
3596193240Ssam
3597193240Ssam/*
3598193240Ssam * Drain the transmit queues and reclaim resources.
3599193240Ssam */
3600193240Ssamstatic void
3601193240Ssammwl_draintxq(struct mwl_softc *sc)
3602193240Ssam{
3603193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3604193240Ssam	int i;
3605193240Ssam
3606193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
3607193240Ssam		mwl_tx_draintxq(sc, &sc->sc_txq[i]);
3608193240Ssam	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3609193240Ssam	ifp->if_timer = 0;
3610193240Ssam}
3611193240Ssam
3612193240Ssam#ifdef MWL_DIAGAPI
3613193240Ssam/*
3614193240Ssam * Reset the transmit queues to a pristine state after a fw download.
3615193240Ssam */
3616193240Ssamstatic void
3617193240Ssammwl_resettxq(struct mwl_softc *sc)
3618193240Ssam{
3619193240Ssam	int i;
3620193240Ssam
3621193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
3622193240Ssam		mwl_txq_reset(sc, &sc->sc_txq[i]);
3623193240Ssam}
3624193240Ssam#endif /* MWL_DIAGAPI */
3625193240Ssam
3626193240Ssam/*
3627193240Ssam * Clear the transmit queues of any frames submitted for the
3628193240Ssam * specified vap.  This is done when the vap is deleted so we
3629193240Ssam * don't potentially reference the vap after it is gone.
3630193240Ssam * Note we cannot remove the frames; we only reclaim the node
3631193240Ssam * reference.
3632193240Ssam */
3633193240Ssamstatic void
3634193240Ssammwl_cleartxq(struct mwl_softc *sc, struct ieee80211vap *vap)
3635193240Ssam{
3636193240Ssam	struct mwl_txq *txq;
3637193240Ssam	struct mwl_txbuf *bf;
3638193240Ssam	int i;
3639193240Ssam
3640193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++) {
3641193240Ssam		txq = &sc->sc_txq[i];
3642193240Ssam		MWL_TXQ_LOCK(txq);
3643193240Ssam		STAILQ_FOREACH(bf, &txq->active, bf_list) {
3644193240Ssam			struct ieee80211_node *ni = bf->bf_node;
3645193240Ssam			if (ni != NULL && ni->ni_vap == vap) {
3646193240Ssam				bf->bf_node = NULL;
3647193240Ssam				ieee80211_free_node(ni);
3648193240Ssam			}
3649193240Ssam		}
3650193240Ssam		MWL_TXQ_UNLOCK(txq);
3651193240Ssam	}
3652193240Ssam}
3653193240Ssam
3654193240Ssamstatic void
3655193240Ssammwl_recv_action(struct ieee80211_node *ni, const uint8_t *frm, const uint8_t *efrm)
3656193240Ssam{
3657193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3658193240Ssam	const struct ieee80211_action *ia;
3659193240Ssam
3660193240Ssam	ia = (const struct ieee80211_action *) frm;
3661193240Ssam	if (ia->ia_category == IEEE80211_ACTION_CAT_HT &&
3662193240Ssam	    ia->ia_action == IEEE80211_ACTION_HT_MIMOPWRSAVE) {
3663193240Ssam		const struct ieee80211_action_ht_mimopowersave *mps =
3664193240Ssam		    (const struct ieee80211_action_ht_mimopowersave *) ia;
3665193240Ssam
3666193240Ssam		mwl_hal_setmimops(sc->sc_mh, ni->ni_macaddr,
3667193240Ssam		    mps->am_control & IEEE80211_A_HT_MIMOPWRSAVE_ENA,
3668193240Ssam		    MS(mps->am_control, IEEE80211_A_HT_MIMOPWRSAVE_MODE));
3669193240Ssam	} else
3670193240Ssam		sc->sc_recv_action(ni, frm, efrm);
3671193240Ssam}
3672193240Ssam
3673193240Ssamstatic int
3674193240Ssammwl_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3675193240Ssam	int dialogtoken, int baparamset, int batimeout)
3676193240Ssam{
3677193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3678193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
3679193240Ssam	struct mwl_bastate *bas;
3680193240Ssam
3681193240Ssam	bas = tap->txa_private;
3682193240Ssam	if (bas == NULL) {
3683193240Ssam		const MWL_HAL_BASTREAM *sp;
3684193240Ssam		/*
3685193240Ssam		 * Check for a free BA stream slot.
3686193240Ssam		 */
3687193240Ssam#if MWL_MAXBA > 3
3688193240Ssam		if (mn->mn_ba[3].bastream == NULL)
3689193240Ssam			bas = &mn->mn_ba[3];
3690193240Ssam		else
3691193240Ssam#endif
3692193240Ssam#if MWL_MAXBA > 2
3693193240Ssam		if (mn->mn_ba[2].bastream == NULL)
3694193240Ssam			bas = &mn->mn_ba[2];
3695193240Ssam		else
3696193240Ssam#endif
3697193240Ssam#if MWL_MAXBA > 1
3698193240Ssam		if (mn->mn_ba[1].bastream == NULL)
3699193240Ssam			bas = &mn->mn_ba[1];
3700193240Ssam		else
3701193240Ssam#endif
3702193240Ssam#if MWL_MAXBA > 0
3703193240Ssam		if (mn->mn_ba[0].bastream == NULL)
3704193240Ssam			bas = &mn->mn_ba[0];
3705193240Ssam		else
3706193240Ssam#endif
3707193240Ssam		{
3708193240Ssam			/* sta already has max BA streams */
3709193240Ssam			/* XXX assign BA stream to highest priority tid */
3710193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
3711193240Ssam			    "%s: already has max bastreams\n", __func__);
3712193240Ssam			sc->sc_stats.mst_ampdu_reject++;
3713193240Ssam			return 0;
3714193240Ssam		}
3715193240Ssam		/* NB: no held reference to ni */
3716193240Ssam		sp = mwl_hal_bastream_alloc(sc->sc_mh,
3717193240Ssam		    1/* XXX immediate*/, ni->ni_macaddr, tap->txa_ac,
3718193240Ssam		    ni->ni_htparam, ni, tap);
3719193240Ssam		if (sp == NULL) {
3720193240Ssam			/*
3721193240Ssam			 * No available stream, return 0 so no
3722193240Ssam			 * a-mpdu aggregation will be done.
3723193240Ssam			 */
3724193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
3725193240Ssam			    "%s: no bastream available\n", __func__);
3726193240Ssam			sc->sc_stats.mst_ampdu_nostream++;
3727193240Ssam			return 0;
3728193240Ssam		}
3729193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: alloc bastream %p\n",
3730193240Ssam		    __func__, sp);
3731193240Ssam		/* NB: qos is left zero so we won't match in mwl_tx_start */
3732193240Ssam		bas->bastream = sp;
3733193240Ssam		tap->txa_private = bas;
3734193240Ssam	}
3735193240Ssam	/* fetch current seq# from the firmware; if available */
3736193240Ssam	if (mwl_hal_bastream_get_seqno(sc->sc_mh, bas->bastream,
3737193240Ssam	    &tap->txa_start) != 0)
3738193240Ssam		tap->txa_start = 0;
3739193240Ssam	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, batimeout);
3740193240Ssam}
3741193240Ssam
3742193240Ssamstatic int
3743193240Ssammwl_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3744193240Ssam	int code, int baparamset, int batimeout)
3745193240Ssam{
3746193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3747193240Ssam	struct mwl_bastate *bas;
3748193240Ssam
3749193240Ssam	bas = tap->txa_private;
3750193240Ssam	if (bas == NULL) {
3751193240Ssam		/* XXX should not happen */
3752193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
3753193240Ssam		    "%s: no BA stream allocated, AC %d\n",
3754193240Ssam		    __func__, tap->txa_ac);
3755193240Ssam		sc->sc_stats.mst_addba_nostream++;
3756193240Ssam		return 0;
3757193240Ssam	}
3758193240Ssam	if (code == IEEE80211_STATUS_SUCCESS) {
3759193240Ssam		int bufsiz, error;
3760193240Ssam
3761193240Ssam		/*
3762193240Ssam		 * Tell the firmware to setup the BA stream;
3763193240Ssam		 * we know resources are available because we
3764193240Ssam		 * pre-allocated one before forming the request.
3765193240Ssam		 */
3766193240Ssam		bufsiz = MS(baparamset, IEEE80211_BAPS_BUFSIZ);
3767193240Ssam		if (bufsiz == 0)
3768193240Ssam			bufsiz = IEEE80211_AGGR_BAWMAX;
3769193240Ssam		error = mwl_hal_bastream_create(sc->sc_mh, bas->bastream,
3770193240Ssam		    bufsiz, bufsiz-1, tap->txa_start);
3771193240Ssam		if (error != 0) {
3772193240Ssam			/*
3773193240Ssam			 * Setup failed, return immediately so no a-mpdu
3774193240Ssam			 * aggregation will be done.
3775193240Ssam			 */
3776193240Ssam			mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream);
3777193240Ssam			mwl_bastream_free(bas);
3778193240Ssam			tap->txa_private = NULL;
3779193240Ssam
3780193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
3781193240Ssam			    "%s: create failed, error %d, bufsiz %d AC %d "
3782193240Ssam			    "htparam 0x%x\n", __func__, error, bufsiz,
3783193240Ssam			    tap->txa_ac, ni->ni_htparam);
3784193240Ssam			sc->sc_stats.mst_bacreate_failed++;
3785193240Ssam			return 0;
3786193240Ssam		}
3787193240Ssam		/* NB: cache txq to avoid ptr indirect */
3788193240Ssam		mwl_bastream_setup(bas, tap->txa_ac, bas->bastream->txq);
3789193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
3790193240Ssam		    "%s: bastream %p assigned to txq %d AC %d bufsiz %d "
3791193240Ssam		    "htparam 0x%x\n", __func__, bas->bastream,
3792193240Ssam		    bas->txq, tap->txa_ac, bufsiz, ni->ni_htparam);
3793193240Ssam	} else {
3794193240Ssam		/*
3795193240Ssam		 * Other side NAK'd us; return the resources.
3796193240Ssam		 */
3797193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
3798193240Ssam		    "%s: request failed with code %d, destroy bastream %p\n",
3799193240Ssam		    __func__, code, bas->bastream);
3800193240Ssam		mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream);
3801193240Ssam		mwl_bastream_free(bas);
3802193240Ssam		tap->txa_private = NULL;
3803193240Ssam	}
3804193240Ssam	/* NB: firmware sends BAR so we don't need to */
3805193240Ssam	return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
3806193240Ssam}
3807193240Ssam
3808193240Ssamstatic void
3809193240Ssammwl_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
3810193240Ssam{
3811193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3812193240Ssam	struct mwl_bastate *bas;
3813193240Ssam
3814193240Ssam	bas = tap->txa_private;
3815193240Ssam	if (bas != NULL) {
3816193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: destroy bastream %p\n",
3817193240Ssam		    __func__, bas->bastream);
3818193240Ssam		mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream);
3819193240Ssam		mwl_bastream_free(bas);
3820193240Ssam		tap->txa_private = NULL;
3821193240Ssam	}
3822193240Ssam	sc->sc_addba_stop(ni, tap);
3823193240Ssam}
3824193240Ssam
3825193240Ssam/*
3826193240Ssam * Setup the rx data structures.  This should only be
3827193240Ssam * done once or we may get out of sync with the firmware.
3828193240Ssam */
3829193240Ssamstatic int
3830193240Ssammwl_startrecv(struct mwl_softc *sc)
3831193240Ssam{
3832193240Ssam	if (!sc->sc_recvsetup) {
3833193240Ssam		struct mwl_rxbuf *bf, *prev;
3834193240Ssam		struct mwl_rxdesc *ds;
3835193240Ssam
3836193240Ssam		prev = NULL;
3837193240Ssam		STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
3838193240Ssam			int error = mwl_rxbuf_init(sc, bf);
3839193240Ssam			if (error != 0) {
3840193240Ssam				DPRINTF(sc, MWL_DEBUG_RECV,
3841193240Ssam					"%s: mwl_rxbuf_init failed %d\n",
3842193240Ssam					__func__, error);
3843193240Ssam				return error;
3844193240Ssam			}
3845193240Ssam			if (prev != NULL) {
3846193240Ssam				ds = prev->bf_desc;
3847193240Ssam				ds->pPhysNext = htole32(bf->bf_daddr);
3848193240Ssam			}
3849193240Ssam			prev = bf;
3850193240Ssam		}
3851193240Ssam		if (prev != NULL) {
3852193240Ssam			ds = prev->bf_desc;
3853193240Ssam			ds->pPhysNext =
3854193240Ssam			    htole32(STAILQ_FIRST(&sc->sc_rxbuf)->bf_daddr);
3855193240Ssam		}
3856193240Ssam		sc->sc_recvsetup = 1;
3857193240Ssam	}
3858193240Ssam	mwl_mode_init(sc);		/* set filters, etc. */
3859193240Ssam	return 0;
3860193240Ssam}
3861193240Ssam
3862193240Ssamstatic MWL_HAL_APMODE
3863193240Ssammwl_getapmode(const struct ieee80211vap *vap, struct ieee80211_channel *chan)
3864193240Ssam{
3865193240Ssam	MWL_HAL_APMODE mode;
3866193240Ssam
3867193240Ssam	if (IEEE80211_IS_CHAN_HT(chan)) {
3868193240Ssam		if (vap->iv_flags_ext & IEEE80211_FEXT_PUREN)
3869193240Ssam			mode = AP_MODE_N_ONLY;
3870193240Ssam		else if (IEEE80211_IS_CHAN_5GHZ(chan))
3871193240Ssam			mode = AP_MODE_AandN;
3872193240Ssam		else if (vap->iv_flags & IEEE80211_F_PUREG)
3873193240Ssam			mode = AP_MODE_GandN;
3874193240Ssam		else
3875193240Ssam			mode = AP_MODE_BandGandN;
3876193240Ssam	} else if (IEEE80211_IS_CHAN_ANYG(chan)) {
3877193240Ssam		if (vap->iv_flags & IEEE80211_F_PUREG)
3878193240Ssam			mode = AP_MODE_G_ONLY;
3879193240Ssam		else
3880193240Ssam			mode = AP_MODE_MIXED;
3881193240Ssam	} else if (IEEE80211_IS_CHAN_B(chan))
3882193240Ssam		mode = AP_MODE_B_ONLY;
3883193240Ssam	else if (IEEE80211_IS_CHAN_A(chan))
3884193240Ssam		mode = AP_MODE_A_ONLY;
3885193240Ssam	else
3886193240Ssam		mode = AP_MODE_MIXED;		/* XXX should not happen? */
3887193240Ssam	return mode;
3888193240Ssam}
3889193240Ssam
3890193240Ssamstatic int
3891193240Ssammwl_setapmode(struct ieee80211vap *vap, struct ieee80211_channel *chan)
3892193240Ssam{
3893193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
3894193240Ssam	return mwl_hal_setapmode(hvap, mwl_getapmode(vap, chan));
3895193240Ssam}
3896193240Ssam
3897193240Ssam/*
3898193240Ssam * Set/change channels.
3899193240Ssam */
3900193240Ssamstatic int
3901193240Ssammwl_chan_set(struct mwl_softc *sc, struct ieee80211_channel *chan)
3902193240Ssam{
3903193240Ssam	struct mwl_hal *mh = sc->sc_mh;
3904193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3905193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3906193240Ssam	MWL_HAL_CHANNEL hchan;
3907193240Ssam	int maxtxpow;
3908193240Ssam
3909193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
3910193240Ssam	    __func__, chan->ic_freq, chan->ic_flags);
3911193240Ssam
3912193240Ssam	/*
3913193240Ssam	 * Convert to a HAL channel description with
3914193240Ssam	 * the flags constrained to reflect the current
3915193240Ssam	 * operating mode.
3916193240Ssam	 */
3917193240Ssam	mwl_mapchan(&hchan, chan);
3918193240Ssam	mwl_hal_intrset(mh, 0);		/* disable interrupts */
3919193240Ssam#if 0
3920193240Ssam	mwl_draintxq(sc);		/* clear pending tx frames */
3921193240Ssam#endif
3922193240Ssam	mwl_hal_setchannel(mh, &hchan);
3923193240Ssam	/*
3924193240Ssam	 * Tx power is cap'd by the regulatory setting and
3925193240Ssam	 * possibly a user-set limit.  We pass the min of
3926193240Ssam	 * these to the hal to apply them to the cal data
3927193240Ssam	 * for this channel.
3928193240Ssam	 * XXX min bound?
3929193240Ssam	 */
3930193240Ssam	maxtxpow = 2*chan->ic_maxregpower;
3931193240Ssam	if (maxtxpow > ic->ic_txpowlimit)
3932193240Ssam		maxtxpow = ic->ic_txpowlimit;
3933193240Ssam	mwl_hal_settxpower(mh, &hchan, maxtxpow / 2);
3934193240Ssam	/* NB: potentially change mcast/mgt rates */
3935193240Ssam	mwl_setcurchanrates(sc);
3936193240Ssam
3937193240Ssam	/*
3938193240Ssam	 * Update internal state.
3939193240Ssam	 */
3940193240Ssam	sc->sc_tx_th.wt_chan_freq = htole16(chan->ic_freq);
3941193240Ssam	sc->sc_rx_th.wr_chan_freq = htole16(chan->ic_freq);
3942193240Ssam	if (IEEE80211_IS_CHAN_A(chan)) {
3943193240Ssam		sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_A);
3944193240Ssam		sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_A);
3945193240Ssam	} else if (IEEE80211_IS_CHAN_ANYG(chan)) {
3946193240Ssam		sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
3947193240Ssam		sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
3948193240Ssam	} else {
3949193240Ssam		sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
3950193240Ssam		sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
3951193240Ssam	}
3952193240Ssam	sc->sc_curchan = hchan;
3953193240Ssam	mwl_hal_intrset(mh, sc->sc_imask);
3954193240Ssam
3955193240Ssam	return 0;
3956193240Ssam}
3957193240Ssam
3958193240Ssamstatic void
3959193240Ssammwl_scan_start(struct ieee80211com *ic)
3960193240Ssam{
3961193240Ssam	struct ifnet *ifp = ic->ic_ifp;
3962193240Ssam	struct mwl_softc *sc = ifp->if_softc;
3963193240Ssam
3964193240Ssam	DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__);
3965193240Ssam}
3966193240Ssam
3967193240Ssamstatic void
3968193240Ssammwl_scan_end(struct ieee80211com *ic)
3969193240Ssam{
3970193240Ssam	struct ifnet *ifp = ic->ic_ifp;
3971193240Ssam	struct mwl_softc *sc = ifp->if_softc;
3972193240Ssam
3973193240Ssam	DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__);
3974193240Ssam}
3975193240Ssam
3976193240Ssamstatic void
3977193240Ssammwl_set_channel(struct ieee80211com *ic)
3978193240Ssam{
3979193240Ssam	struct ifnet *ifp = ic->ic_ifp;
3980193240Ssam	struct mwl_softc *sc = ifp->if_softc;
3981193240Ssam
3982193240Ssam	(void) mwl_chan_set(sc, ic->ic_curchan);
3983193240Ssam}
3984193240Ssam
3985193240Ssam/*
3986193240Ssam * Handle a channel switch request.  We inform the firmware
3987193240Ssam * and mark the global state to suppress various actions.
3988193240Ssam * NB: we issue only one request to the fw; we may be called
3989193240Ssam * multiple times if there are multiple vap's.
3990193240Ssam */
3991193240Ssamstatic void
3992193240Ssammwl_startcsa(struct ieee80211vap *vap)
3993193240Ssam{
3994193240Ssam	struct ieee80211com *ic = vap->iv_ic;
3995193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
3996193240Ssam	MWL_HAL_CHANNEL hchan;
3997193240Ssam
3998193240Ssam	if (sc->sc_csapending)
3999193240Ssam		return;
4000193240Ssam
4001193240Ssam	mwl_mapchan(&hchan, ic->ic_csa_newchan);
4002193240Ssam	/* 1 =>'s quiet channel */
4003193240Ssam	mwl_hal_setchannelswitchie(sc->sc_mh, &hchan, 1, ic->ic_csa_count);
4004193240Ssam	sc->sc_csapending = 1;
4005193240Ssam}
4006193240Ssam
4007193240Ssam/*
4008193240Ssam * Plumb any static WEP key for the station.  This is
4009193240Ssam * necessary as we must propagate the key from the
4010193240Ssam * global key table of the vap to each sta db entry.
4011193240Ssam */
4012193240Ssamstatic void
4013193240Ssammwl_setanywepkey(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
4014193240Ssam{
4015193240Ssam	if ((vap->iv_flags & (IEEE80211_F_PRIVACY|IEEE80211_F_WPA)) ==
4016193240Ssam		IEEE80211_F_PRIVACY &&
4017193240Ssam	    vap->iv_def_txkey != IEEE80211_KEYIX_NONE &&
4018193240Ssam	    vap->iv_nw_keys[vap->iv_def_txkey].wk_keyix != IEEE80211_KEYIX_NONE)
4019193240Ssam		(void) mwl_key_set(vap, &vap->iv_nw_keys[vap->iv_def_txkey], mac);
4020193240Ssam}
4021193240Ssam
4022193240Ssamstatic int
4023193240Ssammwl_peerstadb(struct ieee80211_node *ni, int aid, int staid, MWL_HAL_PEERINFO *pi)
4024193240Ssam{
4025193240Ssam#define	WME(ie) ((const struct ieee80211_wme_info *) ie)
4026193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
4027193240Ssam	struct mwl_hal_vap *hvap;
4028193240Ssam	int error;
4029193240Ssam
4030193240Ssam	if (vap->iv_opmode == IEEE80211_M_WDS) {
4031193240Ssam		/*
4032193240Ssam		 * WDS vap's do not have a f/w vap; instead they piggyback
4033193240Ssam		 * on an AP vap and we must install the sta db entry and
4034193240Ssam		 * crypto state using that AP's handle (the WDS vap has none).
4035193240Ssam		 */
4036193240Ssam		hvap = MWL_VAP(vap)->mv_ap_hvap;
4037193240Ssam	} else
4038193240Ssam		hvap = MWL_VAP(vap)->mv_hvap;
4039193240Ssam	error = mwl_hal_newstation(hvap, ni->ni_macaddr,
4040193240Ssam	    aid, staid, pi,
4041193240Ssam	    ni->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT),
4042193240Ssam	    ni->ni_ies.wme_ie != NULL ? WME(ni->ni_ies.wme_ie)->wme_info : 0);
4043193240Ssam	if (error == 0) {
4044193240Ssam		/*
4045193240Ssam		 * Setup security for this station.  For sta mode this is
4046193240Ssam		 * needed even though do the same thing on transition to
4047193240Ssam		 * AUTH state because the call to mwl_hal_newstation
4048193240Ssam		 * clobbers the crypto state we setup.
4049193240Ssam		 */
4050193240Ssam		mwl_setanywepkey(vap, ni->ni_macaddr);
4051193240Ssam	}
4052193240Ssam	return error;
4053193240Ssam#undef WME
4054193240Ssam}
4055193240Ssam
4056193240Ssamstatic void
4057193240Ssammwl_setglobalkeys(struct ieee80211vap *vap)
4058193240Ssam{
4059193240Ssam	struct ieee80211_key *wk;
4060193240Ssam
4061193240Ssam	wk = &vap->iv_nw_keys[0];
4062193240Ssam	for (; wk < &vap->iv_nw_keys[IEEE80211_WEP_NKID]; wk++)
4063193240Ssam		if (wk->wk_keyix != IEEE80211_KEYIX_NONE)
4064193240Ssam			(void) mwl_key_set(vap, wk, vap->iv_myaddr);
4065193240Ssam}
4066193240Ssam
4067193240Ssam/*
4068193240Ssam * Re-create the local sta db entry for a vap to ensure
4069193240Ssam * up to date WME state is pushed to the firmware.  Because
4070193240Ssam * this resets crypto state this must be followed by a
4071193240Ssam * reload of any keys in the global key table.
4072193240Ssam */
4073193240Ssamstatic int
4074193240Ssammwl_localstadb(struct ieee80211vap *vap)
4075193240Ssam{
4076193240Ssam#define	WME(ie) ((const struct ieee80211_wme_info *) ie)
4077193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
4078193240Ssam	struct ieee80211_node *bss;
4079193240Ssam	int error;
4080193240Ssam
4081193240Ssam	switch (vap->iv_opmode) {
4082193240Ssam	case IEEE80211_M_STA:
4083193240Ssam		bss = vap->iv_bss;
4084193240Ssam		error = mwl_hal_newstation(hvap, vap->iv_myaddr,
4085193240Ssam		    0, 0, NULL, bss->ni_flags & IEEE80211_NODE_QOS,
4086193240Ssam		    bss->ni_ies.wme_ie != NULL ?
4087193240Ssam			WME(bss->ni_ies.wme_ie)->wme_info : 0);
4088193240Ssam		if (error == 0)
4089193240Ssam			mwl_setglobalkeys(vap);
4090193240Ssam		break;
4091193240Ssam	case IEEE80211_M_HOSTAP:
4092193240Ssam		error = mwl_hal_newstation(hvap, vap->iv_myaddr,
4093193240Ssam		    0, 0, NULL, vap->iv_flags & IEEE80211_F_WME, 0);
4094193240Ssam		if (error == 0)
4095193240Ssam			mwl_setglobalkeys(vap);
4096193240Ssam		break;
4097193240Ssam	default:
4098193240Ssam		error = 0;
4099193240Ssam		break;
4100193240Ssam	}
4101193240Ssam	return error;
4102193240Ssam#undef WME
4103193240Ssam}
4104193240Ssam
4105193240Ssamstatic int
4106193240Ssammwl_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
4107193240Ssam{
4108193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
4109193240Ssam	struct mwl_hal_vap *hvap = mvp->mv_hvap;
4110193240Ssam	struct ieee80211com *ic = vap->iv_ic;
4111193240Ssam	struct ieee80211_node *ni = NULL;
4112193240Ssam	struct ifnet *ifp = ic->ic_ifp;
4113193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4114193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4115193240Ssam	enum ieee80211_state ostate = vap->iv_state;
4116193240Ssam	int error;
4117193240Ssam
4118193240Ssam	DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: %s -> %s\n",
4119193240Ssam	    vap->iv_ifp->if_xname, __func__,
4120193240Ssam	    ieee80211_state_name[ostate], ieee80211_state_name[nstate]);
4121193240Ssam
4122193240Ssam	callout_stop(&sc->sc_timer);
4123193240Ssam	/*
4124193240Ssam	 * Clear current radar detection state.
4125193240Ssam	 */
4126193240Ssam	if (ostate == IEEE80211_S_CAC) {
4127193240Ssam		/* stop quiet mode radar detection */
4128193240Ssam		mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_STOP);
4129193240Ssam	} else if (sc->sc_radarena) {
4130193240Ssam		/* stop in-service radar detection */
4131193240Ssam		mwl_hal_setradardetection(mh, DR_DFS_DISABLE);
4132193240Ssam		sc->sc_radarena = 0;
4133193240Ssam	}
4134193240Ssam	/*
4135193240Ssam	 * Carry out per-state actions before doing net80211 work.
4136193240Ssam	 */
4137193240Ssam	if (nstate == IEEE80211_S_INIT) {
4138193240Ssam		/* NB: only ap+sta vap's have a fw entity */
4139193240Ssam		if (hvap != NULL)
4140193240Ssam			mwl_hal_stop(hvap);
4141193240Ssam	} else if (nstate == IEEE80211_S_SCAN) {
4142193240Ssam		mwl_hal_start(hvap);
4143193240Ssam		/* NB: this disables beacon frames */
4144193240Ssam		mwl_hal_setinframode(hvap);
4145193240Ssam	} else if (nstate == IEEE80211_S_AUTH) {
4146193240Ssam		/*
4147193240Ssam		 * Must create a sta db entry in case a WEP key needs to
4148193240Ssam		 * be plumbed.  This entry will be overwritten if we
4149193240Ssam		 * associate; otherwise it will be reclaimed on node free.
4150193240Ssam		 */
4151193240Ssam		ni = vap->iv_bss;
4152193240Ssam		MWL_NODE(ni)->mn_hvap = hvap;
4153193240Ssam		(void) mwl_peerstadb(ni, 0, 0, NULL);
4154193240Ssam	} else if (nstate == IEEE80211_S_CSA) {
4155193240Ssam		/* XXX move to below? */
4156193240Ssam		if (vap->iv_opmode == IEEE80211_M_HOSTAP)
4157193240Ssam			mwl_startcsa(vap);
4158193240Ssam	} else if (nstate == IEEE80211_S_CAC) {
4159193240Ssam		/* XXX move to below? */
4160193240Ssam		/* stop ap xmit and enable quiet mode radar detection */
4161193240Ssam		mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_START);
4162193240Ssam	}
4163193240Ssam
4164193240Ssam	/*
4165193240Ssam	 * Invoke the parent method to do net80211 work.
4166193240Ssam	 */
4167193240Ssam	error = mvp->mv_newstate(vap, nstate, arg);
4168193240Ssam
4169193240Ssam	/*
4170193240Ssam	 * Carry out work that must be done after net80211 runs;
4171193240Ssam	 * this work requires up to date state (e.g. iv_bss).
4172193240Ssam	 */
4173193240Ssam	if (error == 0 && nstate == IEEE80211_S_RUN) {
4174193240Ssam		/* NB: collect bss node again, it may have changed */
4175193240Ssam		ni = vap->iv_bss;
4176193240Ssam
4177193240Ssam		DPRINTF(sc, MWL_DEBUG_STATE,
4178193240Ssam		    "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
4179193240Ssam		    "capinfo 0x%04x chan %d\n",
4180193240Ssam		    vap->iv_ifp->if_xname, __func__, vap->iv_flags,
4181193240Ssam		    ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
4182193240Ssam		    ieee80211_chan2ieee(ic, ic->ic_curchan));
4183193240Ssam
4184193240Ssam		/*
4185193240Ssam		 * Recreate local sta db entry to update WME state.
4186193240Ssam		 */
4187193240Ssam		mwl_localstadb(vap);
4188193240Ssam		switch (vap->iv_opmode) {
4189193240Ssam		case IEEE80211_M_HOSTAP:
4190193240Ssam			if (ostate == IEEE80211_S_CAC) {
4191193240Ssam				/* enable in-service radar detection */
4192193240Ssam				mwl_hal_setradardetection(mh,
4193193240Ssam				    DR_IN_SERVICE_MONITOR_START);
4194193240Ssam				sc->sc_radarena = 1;
4195193240Ssam			}
4196193240Ssam			/*
4197193240Ssam			 * Allocate and setup the beacon frame
4198193240Ssam			 * (and related state).
4199193240Ssam			 */
4200193240Ssam			error = mwl_reset_vap(vap, IEEE80211_S_RUN);
4201193240Ssam			if (error != 0) {
4202193240Ssam				DPRINTF(sc, MWL_DEBUG_STATE,
4203193240Ssam				    "%s: beacon setup failed, error %d\n",
4204193240Ssam				    __func__, error);
4205193240Ssam				goto bad;
4206193240Ssam			}
4207193240Ssam			/* NB: must be after setting up beacon */
4208193240Ssam			mwl_hal_start(hvap);
4209193240Ssam			break;
4210193240Ssam		case IEEE80211_M_STA:
4211193240Ssam			DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: aid 0x%x\n",
4212193240Ssam			    vap->iv_ifp->if_xname, __func__, ni->ni_associd);
4213193240Ssam			/*
4214193240Ssam			 * Set state now that we're associated.
4215193240Ssam			 */
4216193240Ssam			mwl_hal_setassocid(hvap, ni->ni_bssid, ni->ni_associd);
4217193240Ssam			mwl_setrates(vap);
4218193240Ssam			mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold);
4219193240Ssam			break;
4220193240Ssam		case IEEE80211_M_WDS:
4221193240Ssam			DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: bssid %s\n",
4222193240Ssam			    vap->iv_ifp->if_xname, __func__,
4223193240Ssam			    ether_sprintf(ni->ni_bssid));
4224193240Ssam			mwl_seteapolformat(vap);
4225193240Ssam			break;
4226193240Ssam		default:
4227193240Ssam			break;
4228193240Ssam		}
4229193240Ssam		/*
4230193240Ssam		 * Set CS mode according to operating channel;
4231193240Ssam		 * this mostly an optimization for 5GHz.
4232193240Ssam		 *
4233193240Ssam		 * NB: must follow mwl_hal_start which resets csmode
4234193240Ssam		 */
4235193240Ssam		if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
4236193240Ssam			mwl_hal_setcsmode(mh, CSMODE_AGGRESSIVE);
4237193240Ssam		else
4238193240Ssam			mwl_hal_setcsmode(mh, CSMODE_AUTO_ENA);
4239193240Ssam		/*
4240193240Ssam		 * Start timer to prod firmware.
4241193240Ssam		 */
4242193240Ssam		if (sc->sc_ageinterval != 0)
4243193240Ssam			callout_reset(&sc->sc_timer, sc->sc_ageinterval*hz,
4244193240Ssam			    mwl_agestations, sc);
4245193240Ssam	} else if (nstate == IEEE80211_S_SLEEP) {
4246193240Ssam		/* XXX set chip in power save */
4247193240Ssam	}
4248193240Ssambad:
4249193240Ssam	return error;
4250193240Ssam}
4251193240Ssam
4252193240Ssam/*
4253193240Ssam * Convert a legacy rate set to a firmware bitmask.
4254193240Ssam */
4255193240Ssamstatic uint32_t
4256193240Ssamget_rate_bitmap(const struct ieee80211_rateset *rs)
4257193240Ssam{
4258193240Ssam	uint32_t rates;
4259193240Ssam	int i;
4260193240Ssam
4261193240Ssam	rates = 0;
4262193240Ssam	for (i = 0; i < rs->rs_nrates; i++)
4263193240Ssam		switch (rs->rs_rates[i] & IEEE80211_RATE_VAL) {
4264193240Ssam		case 2:	  rates |= 0x001; break;
4265193240Ssam		case 4:	  rates |= 0x002; break;
4266193240Ssam		case 11:  rates |= 0x004; break;
4267193240Ssam		case 22:  rates |= 0x008; break;
4268193240Ssam		case 44:  rates |= 0x010; break;
4269193240Ssam		case 12:  rates |= 0x020; break;
4270193240Ssam		case 18:  rates |= 0x040; break;
4271193240Ssam		case 24:  rates |= 0x080; break;
4272193240Ssam		case 36:  rates |= 0x100; break;
4273193240Ssam		case 48:  rates |= 0x200; break;
4274193240Ssam		case 72:  rates |= 0x400; break;
4275193240Ssam		case 96:  rates |= 0x800; break;
4276193240Ssam		case 108: rates |= 0x1000; break;
4277193240Ssam		}
4278193240Ssam	return rates;
4279193240Ssam}
4280193240Ssam
4281193240Ssam/*
4282193240Ssam * Construct an HT firmware bitmask from an HT rate set.
4283193240Ssam */
4284193240Ssamstatic uint32_t
4285193240Ssamget_htrate_bitmap(const struct ieee80211_htrateset *rs)
4286193240Ssam{
4287193240Ssam	uint32_t rates;
4288193240Ssam	int i;
4289193240Ssam
4290193240Ssam	rates = 0;
4291193240Ssam	for (i = 0; i < rs->rs_nrates; i++) {
4292193240Ssam		if (rs->rs_rates[i] < 16)
4293193240Ssam			rates |= 1<<rs->rs_rates[i];
4294193240Ssam	}
4295193240Ssam	return rates;
4296193240Ssam}
4297193240Ssam
4298193240Ssam/*
4299193240Ssam * Manage station id's; these are separate from AID's
4300193240Ssam * as AID's may have values out of the range of possible
4301193240Ssam * station id's acceptable to the firmware.
4302193240Ssam */
4303193240Ssamstatic int
4304193240Ssamallocstaid(struct mwl_softc *sc, int aid)
4305193240Ssam{
4306193240Ssam	int staid;
4307193240Ssam
4308193240Ssam	if (!(0 < aid && aid < MWL_MAXSTAID) || isset(sc->sc_staid, aid)) {
4309193240Ssam		/* NB: don't use 0 */
4310193240Ssam		for (staid = 1; staid < MWL_MAXSTAID; staid++)
4311193240Ssam			if (isclr(sc->sc_staid, staid))
4312193240Ssam				break;
4313193240Ssam	} else
4314193240Ssam		staid = aid;
4315193240Ssam	setbit(sc->sc_staid, staid);
4316193240Ssam	return staid;
4317193240Ssam}
4318193240Ssam
4319193240Ssamstatic void
4320193240Ssamdelstaid(struct mwl_softc *sc, int staid)
4321193240Ssam{
4322193240Ssam	clrbit(sc->sc_staid, staid);
4323193240Ssam}
4324193240Ssam
4325193240Ssam/*
4326193240Ssam * Setup driver-specific state for a newly associated node.
4327193240Ssam * Note that we're called also on a re-associate, the isnew
4328193240Ssam * param tells us if this is the first time or not.
4329193240Ssam */
4330193240Ssamstatic void
4331193240Ssammwl_newassoc(struct ieee80211_node *ni, int isnew)
4332193240Ssam{
4333193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
4334193240Ssam        struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
4335193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
4336193240Ssam	MWL_HAL_PEERINFO pi;
4337193240Ssam	uint16_t aid;
4338193240Ssam	int error;
4339193240Ssam
4340193240Ssam	aid = IEEE80211_AID(ni->ni_associd);
4341193240Ssam	if (isnew) {
4342193240Ssam		mn->mn_staid = allocstaid(sc, aid);
4343193240Ssam		mn->mn_hvap = MWL_VAP(vap)->mv_hvap;
4344193240Ssam	} else {
4345193240Ssam		mn = MWL_NODE(ni);
4346193240Ssam		/* XXX reset BA stream? */
4347193240Ssam	}
4348193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: mac %s isnew %d aid %d staid %d\n",
4349193240Ssam	    __func__, ether_sprintf(ni->ni_macaddr), isnew, aid, mn->mn_staid);
4350193240Ssam	/*
4351193240Ssam	 * Craft station database entry for station.
4352193240Ssam	 * NB: use host byte order here, the hal handles byte swapping.
4353193240Ssam	 */
4354193240Ssam	memset(&pi, 0, sizeof(pi));
4355193240Ssam	pi.LegacyRateBitMap = get_rate_bitmap(&ni->ni_rates);
4356193240Ssam	pi.CapInfo = ni->ni_capinfo;
4357193240Ssam	if (ni->ni_flags & IEEE80211_NODE_HT) {
4358193240Ssam		/* HT capabilities, etc */
4359193240Ssam		pi.HTCapabilitiesInfo = ni->ni_htcap;
4360193240Ssam		/* XXX pi.HTCapabilitiesInfo */
4361193240Ssam	        pi.MacHTParamInfo = ni->ni_htparam;
4362193240Ssam		pi.HTRateBitMap = get_htrate_bitmap(&ni->ni_htrates);
4363193240Ssam		pi.AddHtInfo.ControlChan = ni->ni_htctlchan;
4364193240Ssam		pi.AddHtInfo.AddChan = ni->ni_ht2ndchan;
4365193240Ssam		pi.AddHtInfo.OpMode = ni->ni_htopmode;
4366193240Ssam		pi.AddHtInfo.stbc = ni->ni_htstbc;
4367193240Ssam
4368193240Ssam		/* constrain according to local configuration */
4369193240Ssam		if ((vap->iv_flags_ext & IEEE80211_FEXT_SHORTGI40) == 0)
4370193240Ssam			pi.HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI40;
4371193240Ssam		if ((vap->iv_flags_ext & IEEE80211_FEXT_SHORTGI20) == 0)
4372193240Ssam			pi.HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI20;
4373193240Ssam		if (ni->ni_chw != 40)
4374193240Ssam			pi.HTCapabilitiesInfo &= ~IEEE80211_HTCAP_CHWIDTH40;
4375193240Ssam	}
4376193240Ssam	error = mwl_peerstadb(ni, aid, mn->mn_staid, &pi);
4377193240Ssam	if (error != 0) {
4378193240Ssam		DPRINTF(sc, MWL_DEBUG_NODE,
4379193240Ssam		    "%s: error %d creating sta db entry\n",
4380193240Ssam		    __func__, error);
4381193240Ssam		/* XXX how to deal with error? */
4382193240Ssam	}
4383193240Ssam}
4384193240Ssam
4385193240Ssam/*
4386193240Ssam * Periodically poke the firmware to age out station state
4387193240Ssam * (power save queues, pending tx aggregates).
4388193240Ssam */
4389193240Ssamstatic void
4390193240Ssammwl_agestations(void *arg)
4391193240Ssam{
4392193240Ssam	struct mwl_softc *sc = arg;
4393193240Ssam
4394193240Ssam	mwl_hal_setkeepalive(sc->sc_mh);
4395193240Ssam	if (sc->sc_ageinterval != 0)		/* NB: catch dynamic changes */
4396193240Ssam		callout_reset(&sc->sc_timer, sc->sc_ageinterval*hz,
4397193240Ssam			mwl_agestations, sc);
4398193240Ssam}
4399193240Ssam
4400193240Ssamstatic const struct mwl_hal_channel *
4401193240Ssamfindhalchannel(const MWL_HAL_CHANNELINFO *ci, int ieee)
4402193240Ssam{
4403193240Ssam	int i;
4404193240Ssam
4405193240Ssam	for (i = 0; i < ci->nchannels; i++) {
4406193240Ssam		const struct mwl_hal_channel *hc = &ci->channels[i];
4407193240Ssam		if (hc->ieee == ieee)
4408193240Ssam			return hc;
4409193240Ssam	}
4410193240Ssam	return NULL;
4411193240Ssam}
4412193240Ssam
4413193240Ssamstatic int
4414193240Ssammwl_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
4415193240Ssam	int nchan, struct ieee80211_channel chans[])
4416193240Ssam{
4417193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
4418193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4419193240Ssam	const MWL_HAL_CHANNELINFO *ci;
4420193240Ssam	int i;
4421193240Ssam
4422193240Ssam	for (i = 0; i < nchan; i++) {
4423193240Ssam		struct ieee80211_channel *c = &chans[i];
4424193240Ssam		const struct mwl_hal_channel *hc;
4425193240Ssam
4426193240Ssam		if (IEEE80211_IS_CHAN_2GHZ(c)) {
4427193240Ssam			mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_2DOT4GHZ,
4428193240Ssam			    IEEE80211_IS_CHAN_HT40(c) ?
4429193240Ssam				MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci);
4430193240Ssam		} else if (IEEE80211_IS_CHAN_5GHZ(c)) {
4431193240Ssam			mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_5GHZ,
4432193240Ssam			    IEEE80211_IS_CHAN_HT40(c) ?
4433193240Ssam				MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci);
4434193240Ssam		} else {
4435193240Ssam			if_printf(ic->ic_ifp,
4436193240Ssam			    "%s: channel %u freq %u/0x%x not 2.4/5GHz\n",
4437193240Ssam			    __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
4438193240Ssam			return EINVAL;
4439193240Ssam		}
4440193240Ssam		/*
4441193240Ssam		 * Verify channel has cal data and cap tx power.
4442193240Ssam		 */
4443193240Ssam		hc = findhalchannel(ci, c->ic_ieee);
4444193240Ssam		if (hc != NULL) {
4445193240Ssam			if (c->ic_maxpower > 2*hc->maxTxPow)
4446193240Ssam				c->ic_maxpower = 2*hc->maxTxPow;
4447193240Ssam			goto next;
4448193240Ssam		}
4449193240Ssam		if (IEEE80211_IS_CHAN_HT40(c)) {
4450193240Ssam			/*
4451193240Ssam			 * Look for the extension channel since the
4452193240Ssam			 * hal table only has the primary channel.
4453193240Ssam			 */
4454193240Ssam			hc = findhalchannel(ci, c->ic_extieee);
4455193240Ssam			if (hc != NULL) {
4456193240Ssam				if (c->ic_maxpower > 2*hc->maxTxPow)
4457193240Ssam					c->ic_maxpower = 2*hc->maxTxPow;
4458193240Ssam				goto next;
4459193240Ssam			}
4460193240Ssam		}
4461193240Ssam		if_printf(ic->ic_ifp,
4462193240Ssam		    "%s: no cal data for channel %u ext %u freq %u/0x%x\n",
4463193240Ssam		    __func__, c->ic_ieee, c->ic_extieee,
4464193240Ssam		    c->ic_freq, c->ic_flags);
4465193240Ssam		return EINVAL;
4466193240Ssam	next:
4467193240Ssam		;
4468193240Ssam	}
4469193240Ssam	return 0;
4470193240Ssam}
4471193240Ssam
4472193240Ssam#define	IEEE80211_CHAN_HTG	(IEEE80211_CHAN_HT|IEEE80211_CHAN_G)
4473193240Ssam#define	IEEE80211_CHAN_HTA	(IEEE80211_CHAN_HT|IEEE80211_CHAN_A)
4474193240Ssam
4475193240Ssamstatic void
4476193240Ssamaddchan(struct ieee80211_channel *c, int freq, int flags, int ieee, int txpow)
4477193240Ssam{
4478193240Ssam	c->ic_freq = freq;
4479193240Ssam	c->ic_flags = flags;
4480193240Ssam	c->ic_ieee = ieee;
4481193240Ssam	c->ic_minpower = 0;
4482193240Ssam	c->ic_maxpower = 2*txpow;
4483193240Ssam	c->ic_maxregpower = txpow;
4484193240Ssam}
4485193240Ssam
4486193240Ssamstatic const struct ieee80211_channel *
4487193240Ssamfindchannel(const struct ieee80211_channel chans[], int nchans,
4488193240Ssam	int freq, int flags)
4489193240Ssam{
4490193240Ssam	const struct ieee80211_channel *c;
4491193240Ssam	int i;
4492193240Ssam
4493193240Ssam	for (i = 0; i < nchans; i++) {
4494193240Ssam		c = &chans[i];
4495193240Ssam		if (c->ic_freq == freq && c->ic_flags == flags)
4496193240Ssam			return c;
4497193240Ssam	}
4498193240Ssam	return NULL;
4499193240Ssam}
4500193240Ssam
4501193240Ssamstatic void
4502193240Ssamaddht40channels(struct ieee80211_channel chans[], int maxchans, int *nchans,
4503193240Ssam	const MWL_HAL_CHANNELINFO *ci, int flags)
4504193240Ssam{
4505193240Ssam	struct ieee80211_channel *c;
4506193240Ssam	const struct ieee80211_channel *extc;
4507193240Ssam	const struct mwl_hal_channel *hc;
4508193240Ssam	int i;
4509193240Ssam
4510193240Ssam	c = &chans[*nchans];
4511193240Ssam
4512193240Ssam	flags &= ~IEEE80211_CHAN_HT;
4513193240Ssam	for (i = 0; i < ci->nchannels; i++) {
4514193240Ssam		/*
4515193240Ssam		 * Each entry defines an HT40 channel pair; find the
4516193240Ssam		 * extension channel above and the insert the pair.
4517193240Ssam		 */
4518193240Ssam		hc = &ci->channels[i];
4519193240Ssam		extc = findchannel(chans, *nchans, hc->freq+20,
4520193240Ssam		    flags | IEEE80211_CHAN_HT20);
4521193240Ssam		if (extc != NULL) {
4522193240Ssam			if (*nchans >= maxchans)
4523193240Ssam				break;
4524193240Ssam			addchan(c, hc->freq, flags | IEEE80211_CHAN_HT40U,
4525193240Ssam			    hc->ieee, hc->maxTxPow);
4526193240Ssam			c->ic_extieee = extc->ic_ieee;
4527193240Ssam			c++, (*nchans)++;
4528193240Ssam			if (*nchans >= maxchans)
4529193240Ssam				break;
4530193240Ssam			addchan(c, extc->ic_freq, flags | IEEE80211_CHAN_HT40D,
4531193240Ssam			    extc->ic_ieee, hc->maxTxPow);
4532193240Ssam			c->ic_extieee = hc->ieee;
4533193240Ssam			c++, (*nchans)++;
4534193240Ssam		}
4535193240Ssam	}
4536193240Ssam}
4537193240Ssam
4538193240Ssamstatic void
4539193240Ssamaddchannels(struct ieee80211_channel chans[], int maxchans, int *nchans,
4540193240Ssam	const MWL_HAL_CHANNELINFO *ci, int flags)
4541193240Ssam{
4542193240Ssam	struct ieee80211_channel *c;
4543193240Ssam	int i;
4544193240Ssam
4545193240Ssam	c = &chans[*nchans];
4546193240Ssam
4547193240Ssam	for (i = 0; i < ci->nchannels; i++) {
4548193240Ssam		const struct mwl_hal_channel *hc;
4549193240Ssam
4550193240Ssam		hc = &ci->channels[i];
4551193240Ssam		if (*nchans >= maxchans)
4552193240Ssam			break;
4553193240Ssam		addchan(c, hc->freq, flags, hc->ieee, hc->maxTxPow);
4554193240Ssam		c++, (*nchans)++;
4555193240Ssam		if (flags == IEEE80211_CHAN_G || flags == IEEE80211_CHAN_HTG) {
4556193240Ssam			/* g channel have a separate b-only entry */
4557193240Ssam			if (*nchans >= maxchans)
4558193240Ssam				break;
4559193240Ssam			c[0] = c[-1];
4560193240Ssam			c[-1].ic_flags = IEEE80211_CHAN_B;
4561193240Ssam			c++, (*nchans)++;
4562193240Ssam		}
4563193240Ssam		if (flags == IEEE80211_CHAN_HTG) {
4564193240Ssam			/* HT g channel have a separate g-only entry */
4565193240Ssam			if (*nchans >= maxchans)
4566193240Ssam				break;
4567193240Ssam			c[-1].ic_flags = IEEE80211_CHAN_G;
4568193240Ssam			c[0] = c[-1];
4569193240Ssam			c[0].ic_flags &= ~IEEE80211_CHAN_HT;
4570193240Ssam			c[0].ic_flags |= IEEE80211_CHAN_HT20;	/* HT20 */
4571193240Ssam			c++, (*nchans)++;
4572193240Ssam		}
4573193240Ssam		if (flags == IEEE80211_CHAN_HTA) {
4574193240Ssam			/* HT a channel have a separate a-only entry */
4575193240Ssam			if (*nchans >= maxchans)
4576193240Ssam				break;
4577193240Ssam			c[-1].ic_flags = IEEE80211_CHAN_A;
4578193240Ssam			c[0] = c[-1];
4579193240Ssam			c[0].ic_flags &= ~IEEE80211_CHAN_HT;
4580193240Ssam			c[0].ic_flags |= IEEE80211_CHAN_HT20;	/* HT20 */
4581193240Ssam			c++, (*nchans)++;
4582193240Ssam		}
4583193240Ssam	}
4584193240Ssam}
4585193240Ssam
4586193240Ssamstatic void
4587193240Ssamgetchannels(struct mwl_softc *sc, int maxchans, int *nchans,
4588193240Ssam	struct ieee80211_channel chans[])
4589193240Ssam{
4590193240Ssam	const MWL_HAL_CHANNELINFO *ci;
4591193240Ssam
4592193240Ssam	/*
4593193240Ssam	 * Use the channel info from the hal to craft the
4594193240Ssam	 * channel list.  Note that we pass back an unsorted
4595193240Ssam	 * list; the caller is required to sort it for us
4596193240Ssam	 * (if desired).
4597193240Ssam	 */
4598193240Ssam	*nchans = 0;
4599193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4600193240Ssam	    MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0)
4601193240Ssam		addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG);
4602193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4603193240Ssam	    MWL_FREQ_BAND_5GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0)
4604193240Ssam		addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA);
4605193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4606193240Ssam	    MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0)
4607193240Ssam		addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG);
4608193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4609193240Ssam	    MWL_FREQ_BAND_5GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0)
4610193240Ssam		addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA);
4611193240Ssam}
4612193240Ssam
4613193240Ssamstatic void
4614193240Ssammwl_getradiocaps(struct ieee80211com *ic,
4615193240Ssam	int maxchans, int *nchans, struct ieee80211_channel chans[])
4616193240Ssam{
4617193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
4618193240Ssam
4619193240Ssam	getchannels(sc, maxchans, nchans, chans);
4620193240Ssam}
4621193240Ssam
4622193240Ssamstatic int
4623193240Ssammwl_getchannels(struct mwl_softc *sc)
4624193240Ssam{
4625193240Ssam	struct ifnet *ifp = sc->sc_ifp;
4626193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
4627193240Ssam
4628193240Ssam	/*
4629193240Ssam	 * Use the channel info from the hal to craft the
4630193240Ssam	 * channel list for net80211.  Note that we pass up
4631193240Ssam	 * an unsorted list; net80211 will sort it for us.
4632193240Ssam	 */
4633193240Ssam	memset(ic->ic_channels, 0, sizeof(ic->ic_channels));
4634193240Ssam	ic->ic_nchans = 0;
4635193240Ssam	getchannels(sc, IEEE80211_CHAN_MAX, &ic->ic_nchans, ic->ic_channels);
4636193240Ssam
4637193240Ssam	ic->ic_regdomain.regdomain = SKU_DEBUG;
4638193240Ssam	ic->ic_regdomain.country = CTRY_DEFAULT;
4639193240Ssam	ic->ic_regdomain.location = 'I';
4640193240Ssam	ic->ic_regdomain.isocc[0] = ' ';	/* XXX? */
4641193240Ssam	ic->ic_regdomain.isocc[1] = ' ';
4642193240Ssam	return (ic->ic_nchans == 0 ? EIO : 0);
4643193240Ssam}
4644193240Ssam#undef IEEE80211_CHAN_HTA
4645193240Ssam#undef IEEE80211_CHAN_HTG
4646193240Ssam
4647193240Ssam#ifdef MWL_DEBUG
4648193240Ssamstatic void
4649193240Ssammwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix)
4650193240Ssam{
4651193240Ssam	const struct mwl_rxdesc *ds = bf->bf_desc;
4652193240Ssam	uint32_t status = le32toh(ds->Status);
4653193240Ssam
4654193240Ssam	printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n"
4655193240Ssam	       "      STAT:%02x LEN:%04x RSSI:%02x CHAN:%02x RATE:%02x QOS:%04x HT:%04x\n",
4656193240Ssam	    ix, ds, (const struct mwl_desc *)bf->bf_daddr,
4657193240Ssam	    le32toh(ds->pPhysNext), le32toh(ds->pPhysBuffData),
4658193240Ssam	    ds->RxControl,
4659193240Ssam	    ds->RxControl != EAGLE_RXD_CTRL_DRIVER_OWN ?
4660193240Ssam	        "" : (status & EAGLE_RXD_STATUS_OK) ? " *" : " !",
4661193240Ssam	    ds->Status, le16toh(ds->PktLen), ds->RSSI, ds->Channel,
4662193240Ssam	    ds->Rate, le16toh(ds->QosCtrl), le16toh(ds->HtSig2));
4663193240Ssam}
4664193240Ssam
4665193240Ssamstatic void
4666193240Ssammwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix)
4667193240Ssam{
4668193240Ssam	const struct mwl_txdesc *ds = bf->bf_desc;
4669193240Ssam	uint32_t status = le32toh(ds->Status);
4670193240Ssam
4671193240Ssam	printf("Q%u[%3u]", qnum, ix);
4672193240Ssam	printf(" (DS.V:%p DS.P:%p)\n",
4673193240Ssam	    ds, (const struct mwl_txdesc *)bf->bf_daddr);
4674193240Ssam	printf("    NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
4675193240Ssam	    le32toh(ds->pPhysNext),
4676193240Ssam	    le32toh(ds->PktPtr), le16toh(ds->PktLen), status,
4677193240Ssam	    status & EAGLE_TXD_STATUS_USED ?
4678193240Ssam		"" : (status & 3) != 0 ? " *" : " !");
4679193240Ssam	printf("    RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
4680193240Ssam	    ds->DataRate, ds->TxPriority, le16toh(ds->QosCtrl),
4681193240Ssam	    le32toh(ds->SapPktInfo), le16toh(ds->Format));
4682193240Ssam#if MWL_TXDESC > 1
4683193240Ssam	printf("    MULTIFRAMES:%u LEN:%04x %04x %04x %04x %04x %04x\n"
4684193240Ssam	    , le32toh(ds->multiframes)
4685193240Ssam	    , le16toh(ds->PktLenArray[0]), le16toh(ds->PktLenArray[1])
4686193240Ssam	    , le16toh(ds->PktLenArray[2]), le16toh(ds->PktLenArray[3])
4687193240Ssam	    , le16toh(ds->PktLenArray[4]), le16toh(ds->PktLenArray[5])
4688193240Ssam	);
4689193240Ssam	printf("    DATA:%08x %08x %08x %08x %08x %08x\n"
4690193240Ssam	    , le32toh(ds->PktPtrArray[0]), le32toh(ds->PktPtrArray[1])
4691193240Ssam	    , le32toh(ds->PktPtrArray[2]), le32toh(ds->PktPtrArray[3])
4692193240Ssam	    , le32toh(ds->PktPtrArray[4]), le32toh(ds->PktPtrArray[5])
4693193240Ssam	);
4694193240Ssam#endif
4695193240Ssam#if 0
4696193240Ssam{ const uint8_t *cp = (const uint8_t *) ds;
4697193240Ssam  int i;
4698193240Ssam  for (i = 0; i < sizeof(struct mwl_txdesc); i++) {
4699193240Ssam	printf("%02x ", cp[i]);
4700193240Ssam	if (((i+1) % 16) == 0)
4701193240Ssam		printf("\n");
4702193240Ssam  }
4703193240Ssam  printf("\n");
4704193240Ssam}
4705193240Ssam#endif
4706193240Ssam}
4707193240Ssam#endif /* MWL_DEBUG */
4708193240Ssam
4709193240Ssam#if 0
4710193240Ssamstatic void
4711193240Ssammwl_txq_dump(struct mwl_txq *txq)
4712193240Ssam{
4713193240Ssam	struct mwl_txbuf *bf;
4714193240Ssam	int i = 0;
4715193240Ssam
4716193240Ssam	MWL_TXQ_LOCK(txq);
4717193240Ssam	STAILQ_FOREACH(bf, &txq->active, bf_list) {
4718193240Ssam		struct mwl_txdesc *ds = bf->bf_desc;
4719193240Ssam		MWL_TXDESC_SYNC(txq, ds,
4720193240Ssam		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
4721193240Ssam#ifdef MWL_DEBUG
4722193240Ssam		mwl_printtxbuf(bf, txq->qnum, i);
4723193240Ssam#endif
4724193240Ssam		i++;
4725193240Ssam	}
4726193240Ssam	MWL_TXQ_UNLOCK(txq);
4727193240Ssam}
4728193240Ssam#endif
4729193240Ssam
4730193240Ssamstatic void
4731193240Ssammwl_watchdog(struct ifnet *ifp)
4732193240Ssam{
4733193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4734193240Ssam
4735193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->sc_invalid) {
4736193240Ssam		if (mwl_hal_setkeepalive(sc->sc_mh))
4737193240Ssam			if_printf(ifp, "transmit timeout (firmware hung?)\n");
4738193240Ssam		else
4739193240Ssam			if_printf(ifp, "transmit timeout\n");
4740193240Ssam#if 0
4741193240Ssam		mwl_reset(ifp);
4742193240Ssammwl_txq_dump(&sc->sc_txq[0]);/*XXX*/
4743193240Ssam#endif
4744193240Ssam		ifp->if_oerrors++;
4745193240Ssam		sc->sc_stats.mst_watchdog++;
4746193240Ssam	}
4747193240Ssam}
4748193240Ssam
4749193240Ssam#ifdef MWL_DIAGAPI
4750193240Ssam/*
4751193240Ssam * Diagnostic interface to the HAL.  This is used by various
4752193240Ssam * tools to do things like retrieve register contents for
4753193240Ssam * debugging.  The mechanism is intentionally opaque so that
4754193240Ssam * it can change frequently w/o concern for compatiblity.
4755193240Ssam */
4756193240Ssamstatic int
4757193240Ssammwl_ioctl_diag(struct mwl_softc *sc, struct mwl_diag *md)
4758193240Ssam{
4759193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4760193240Ssam	u_int id = md->md_id & MWL_DIAG_ID;
4761193240Ssam	void *indata = NULL;
4762193240Ssam	void *outdata = NULL;
4763193240Ssam	u_int32_t insize = md->md_in_size;
4764193240Ssam	u_int32_t outsize = md->md_out_size;
4765193240Ssam	int error = 0;
4766193240Ssam
4767193240Ssam	if (md->md_id & MWL_DIAG_IN) {
4768193240Ssam		/*
4769193240Ssam		 * Copy in data.
4770193240Ssam		 */
4771193240Ssam		indata = malloc(insize, M_TEMP, M_NOWAIT);
4772193240Ssam		if (indata == NULL) {
4773193240Ssam			error = ENOMEM;
4774193240Ssam			goto bad;
4775193240Ssam		}
4776193240Ssam		error = copyin(md->md_in_data, indata, insize);
4777193240Ssam		if (error)
4778193240Ssam			goto bad;
4779193240Ssam	}
4780193240Ssam	if (md->md_id & MWL_DIAG_DYN) {
4781193240Ssam		/*
4782193240Ssam		 * Allocate a buffer for the results (otherwise the HAL
4783193240Ssam		 * returns a pointer to a buffer where we can read the
4784193240Ssam		 * results).  Note that we depend on the HAL leaving this
4785193240Ssam		 * pointer for us to use below in reclaiming the buffer;
4786193240Ssam		 * may want to be more defensive.
4787193240Ssam		 */
4788193240Ssam		outdata = malloc(outsize, M_TEMP, M_NOWAIT);
4789193240Ssam		if (outdata == NULL) {
4790193240Ssam			error = ENOMEM;
4791193240Ssam			goto bad;
4792193240Ssam		}
4793193240Ssam	}
4794193240Ssam	if (mwl_hal_getdiagstate(mh, id, indata, insize, &outdata, &outsize)) {
4795193240Ssam		if (outsize < md->md_out_size)
4796193240Ssam			md->md_out_size = outsize;
4797193240Ssam		if (outdata != NULL)
4798193240Ssam			error = copyout(outdata, md->md_out_data,
4799193240Ssam					md->md_out_size);
4800193240Ssam	} else {
4801193240Ssam		error = EINVAL;
4802193240Ssam	}
4803193240Ssambad:
4804193240Ssam	if ((md->md_id & MWL_DIAG_IN) && indata != NULL)
4805193240Ssam		free(indata, M_TEMP);
4806193240Ssam	if ((md->md_id & MWL_DIAG_DYN) && outdata != NULL)
4807193240Ssam		free(outdata, M_TEMP);
4808193240Ssam	return error;
4809193240Ssam}
4810193240Ssam
4811193240Ssamstatic int
4812193240Ssammwl_ioctl_reset(struct mwl_softc *sc, struct mwl_diag *md)
4813193240Ssam{
4814193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4815193240Ssam	int error;
4816193240Ssam
4817193240Ssam	MWL_LOCK_ASSERT(sc);
4818193240Ssam
4819193240Ssam	if (md->md_id == 0 && mwl_hal_fwload(mh, NULL) != 0) {
4820193240Ssam		device_printf(sc->sc_dev, "unable to load firmware\n");
4821193240Ssam		return EIO;
4822193240Ssam	}
4823193240Ssam	if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) {
4824193240Ssam		device_printf(sc->sc_dev, "unable to fetch h/w specs\n");
4825193240Ssam		return EIO;
4826193240Ssam	}
4827193240Ssam	error = mwl_setupdma(sc);
4828193240Ssam	if (error != 0) {
4829193240Ssam		/* NB: mwl_setupdma prints a msg */
4830193240Ssam		return error;
4831193240Ssam	}
4832193240Ssam	/*
4833193240Ssam	 * Reset tx/rx data structures; after reload we must
4834193240Ssam	 * re-start the driver's notion of the next xmit/recv.
4835193240Ssam	 */
4836193240Ssam	mwl_draintxq(sc);		/* clear pending frames */
4837193240Ssam	mwl_resettxq(sc);		/* rebuild tx q lists */
4838193240Ssam	sc->sc_rxnext = NULL;		/* force rx to start at the list head */
4839193240Ssam	return 0;
4840193240Ssam}
4841193240Ssam#endif /* MWL_DIAGAPI */
4842193240Ssam
4843193240Ssamstatic int
4844193240Ssammwl_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
4845193240Ssam{
4846193240Ssam#define	IS_RUNNING(ifp) \
4847193240Ssam	((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
4848193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4849193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
4850193240Ssam	struct ifreq *ifr = (struct ifreq *)data;
4851193240Ssam	int error = 0, startall;
4852193240Ssam
4853193240Ssam	switch (cmd) {
4854193240Ssam	case SIOCSIFFLAGS:
4855193240Ssam		MWL_LOCK(sc);
4856193240Ssam		startall = 0;
4857193240Ssam		if (IS_RUNNING(ifp)) {
4858193240Ssam			/*
4859193240Ssam			 * To avoid rescanning another access point,
4860193240Ssam			 * do not call mwl_init() here.  Instead,
4861193240Ssam			 * only reflect promisc mode settings.
4862193240Ssam			 */
4863193240Ssam			mwl_mode_init(sc);
4864193240Ssam		} else if (ifp->if_flags & IFF_UP) {
4865193240Ssam			/*
4866193240Ssam			 * Beware of being called during attach/detach
4867193240Ssam			 * to reset promiscuous mode.  In that case we
4868193240Ssam			 * will still be marked UP but not RUNNING.
4869193240Ssam			 * However trying to re-init the interface
4870193240Ssam			 * is the wrong thing to do as we've already
4871193240Ssam			 * torn down much of our state.  There's
4872193240Ssam			 * probably a better way to deal with this.
4873193240Ssam			 */
4874193240Ssam			if (!sc->sc_invalid) {
4875193240Ssam				mwl_init_locked(sc);	/* XXX lose error */
4876193240Ssam				startall = 1;
4877193240Ssam			}
4878193240Ssam		} else
4879193240Ssam			mwl_stop_locked(ifp, 1);
4880193240Ssam		MWL_UNLOCK(sc);
4881193240Ssam		if (startall)
4882193240Ssam			ieee80211_start_all(ic);
4883193240Ssam		break;
4884193240Ssam	case SIOCGMVSTATS:
4885193240Ssam		mwl_hal_gethwstats(sc->sc_mh, &sc->sc_stats.hw_stats);
4886193240Ssam		/* NB: embed these numbers to get a consistent view */
4887193240Ssam		sc->sc_stats.mst_tx_packets = ifp->if_opackets;
4888193240Ssam		sc->sc_stats.mst_rx_packets = ifp->if_ipackets;
4889193240Ssam		/*
4890193240Ssam		 * NB: Drop the softc lock in case of a page fault;
4891193240Ssam		 * we'll accept any potential inconsisentcy in the
4892193240Ssam		 * statistics.  The alternative is to copy the data
4893193240Ssam		 * to a local structure.
4894193240Ssam		 */
4895193240Ssam		return copyout(&sc->sc_stats,
4896193240Ssam				ifr->ifr_data, sizeof (sc->sc_stats));
4897193240Ssam#ifdef MWL_DIAGAPI
4898193240Ssam	case SIOCGMVDIAG:
4899193240Ssam		/* XXX check privs */
4900193240Ssam		return mwl_ioctl_diag(sc, (struct mwl_diag *) ifr);
4901193240Ssam	case SIOCGMVRESET:
4902193240Ssam		/* XXX check privs */
4903193240Ssam		MWL_LOCK(sc);
4904193240Ssam		error = mwl_ioctl_reset(sc,(struct mwl_diag *) ifr);
4905193240Ssam		MWL_UNLOCK(sc);
4906193240Ssam		break;
4907193240Ssam#endif /* MWL_DIAGAPI */
4908193240Ssam	case SIOCGIFMEDIA:
4909193240Ssam		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
4910193240Ssam		break;
4911193240Ssam	case SIOCGIFADDR:
4912193240Ssam		error = ether_ioctl(ifp, cmd, data);
4913193240Ssam		break;
4914193240Ssam	default:
4915193240Ssam		error = EINVAL;
4916193240Ssam		break;
4917193240Ssam	}
4918193240Ssam	return error;
4919193240Ssam#undef IS_RUNNING
4920193240Ssam}
4921193240Ssam
4922193240Ssam#ifdef	MWL_DEBUG
4923193240Ssamstatic int
4924193240Ssammwl_sysctl_debug(SYSCTL_HANDLER_ARGS)
4925193240Ssam{
4926193240Ssam	struct mwl_softc *sc = arg1;
4927193240Ssam	int debug, error;
4928193240Ssam
4929193240Ssam	debug = sc->sc_debug | (mwl_hal_getdebug(sc->sc_mh) << 24);
4930193240Ssam	error = sysctl_handle_int(oidp, &debug, 0, req);
4931193240Ssam	if (error || !req->newptr)
4932193240Ssam		return error;
4933193240Ssam	mwl_hal_setdebug(sc->sc_mh, debug >> 24);
4934193240Ssam	sc->sc_debug = debug & 0x00ffffff;
4935193240Ssam	return 0;
4936193240Ssam}
4937193240Ssam#endif /* MWL_DEBUG */
4938193240Ssam
4939193240Ssamstatic void
4940193240Ssammwl_sysctlattach(struct mwl_softc *sc)
4941193240Ssam{
4942193240Ssam#ifdef	MWL_DEBUG
4943193240Ssam	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
4944193240Ssam	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
4945193240Ssam
4946193240Ssam	sc->sc_debug = mwl_debug;
4947193240Ssam	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
4948193240Ssam		"debug", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
4949193240Ssam		mwl_sysctl_debug, "I", "control debugging printfs");
4950193240Ssam#endif
4951193240Ssam}
4952193240Ssam
4953193240Ssam/*
4954193240Ssam * Announce various information on device/driver attach.
4955193240Ssam */
4956193240Ssamstatic void
4957193240Ssammwl_announce(struct mwl_softc *sc)
4958193240Ssam{
4959193240Ssam	struct ifnet *ifp = sc->sc_ifp;
4960193240Ssam
4961193240Ssam	if_printf(ifp, "Rev A%d hardware, v%d.%d.%d.%d firmware (regioncode %d)\n",
4962193240Ssam		sc->sc_hwspecs.hwVersion,
4963193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>24) & 0xff,
4964193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>16) & 0xff,
4965193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>8) & 0xff,
4966193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>0) & 0xff,
4967193240Ssam		sc->sc_hwspecs.regionCode);
4968193240Ssam	sc->sc_fwrelease = sc->sc_hwspecs.fwReleaseNumber;
4969193240Ssam
4970193240Ssam	if (bootverbose) {
4971193240Ssam		int i;
4972193240Ssam		for (i = 0; i <= WME_AC_VO; i++) {
4973193240Ssam			struct mwl_txq *txq = sc->sc_ac2q[i];
4974193240Ssam			if_printf(ifp, "Use hw queue %u for %s traffic\n",
4975193240Ssam				txq->qnum, ieee80211_wme_acnames[i]);
4976193240Ssam		}
4977193240Ssam	}
4978193240Ssam	if (bootverbose || mwl_rxdesc != MWL_RXDESC)
4979193240Ssam		if_printf(ifp, "using %u rx descriptors\n", mwl_rxdesc);
4980193240Ssam	if (bootverbose || mwl_rxbuf != MWL_RXBUF)
4981193240Ssam		if_printf(ifp, "using %u rx buffers\n", mwl_rxbuf);
4982193240Ssam	if (bootverbose || mwl_txbuf != MWL_TXBUF)
4983193240Ssam		if_printf(ifp, "using %u tx buffers\n", mwl_txbuf);
4984193240Ssam	if (bootverbose && mwl_hal_ismbsscapable(sc->sc_mh))
4985193240Ssam		if_printf(ifp, "multi-bss support\n");
4986193240Ssam#ifdef MWL_TX_NODROP
4987193240Ssam	if (bootverbose)
4988193240Ssam		if_printf(ifp, "no tx drop\n");
4989193240Ssam#endif
4990193240Ssam}
4991