mvs_soc.c revision 261410
1207536Smav/*- 2207536Smav * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 3207536Smav * All rights reserved. 4207536Smav * 5207536Smav * Redistribution and use in source and binary forms, with or without 6207536Smav * modification, are permitted provided that the following conditions 7207536Smav * are met: 8207536Smav * 1. Redistributions of source code must retain the above copyright 9207536Smav * notice, this list of conditions and the following disclaimer, 10207536Smav * without modification, immediately at the beginning of the file. 11207536Smav * 2. Redistributions in binary form must reproduce the above copyright 12207536Smav * notice, this list of conditions and the following disclaimer in the 13207536Smav * documentation and/or other materials provided with the distribution. 14207536Smav * 15207536Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16207536Smav * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17207536Smav * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18207536Smav * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19207536Smav * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20207536Smav * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21207536Smav * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22207536Smav * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23207536Smav * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24207536Smav * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25207536Smav */ 26207536Smav 27207536Smav#include <sys/cdefs.h> 28207536Smav__FBSDID("$FreeBSD: head/sys/dev/mvs/mvs_soc.c 261410 2014-02-02 19:17:28Z ian $"); 29207536Smav 30207536Smav#include <sys/param.h> 31207536Smav#include <sys/module.h> 32207536Smav#include <sys/systm.h> 33207536Smav#include <sys/kernel.h> 34207536Smav#include <sys/bus.h> 35207536Smav#include <sys/endian.h> 36207536Smav#include <sys/malloc.h> 37207536Smav#include <sys/lock.h> 38207536Smav#include <sys/mutex.h> 39207536Smav#include <vm/uma.h> 40207536Smav#include <machine/stdarg.h> 41207536Smav#include <machine/resource.h> 42207536Smav#include <machine/bus.h> 43207536Smav#include <sys/rman.h> 44207536Smav#include <arm/mv/mvreg.h> 45207536Smav#include <arm/mv/mvvar.h> 46220097Smav#include <dev/ofw/ofw_bus.h> 47220097Smav#include <dev/ofw/ofw_bus_subr.h> 48207536Smav#include "mvs.h" 49207536Smav 50207536Smav/* local prototypes */ 51207536Smavstatic int mvs_setup_interrupt(device_t dev); 52207536Smavstatic void mvs_intr(void *data); 53207536Smavstatic int mvs_suspend(device_t dev); 54207536Smavstatic int mvs_resume(device_t dev); 55207536Smavstatic int mvs_ctlr_setup(device_t dev); 56207536Smav 57207536Smavstatic struct { 58207536Smav uint32_t id; 59207536Smav uint8_t rev; 60207536Smav const char *name; 61207536Smav int ports; 62207536Smav int quirks; 63207536Smav} mvs_ids[] = { 64207536Smav {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 65207536Smav {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 66238873Shrs {MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 67207536Smav {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 68207536Smav {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 69257240Szbb {MV_DEV_MV78260, 0x00, "Marvell MV78260", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 70257240Szbb {MV_DEV_MV78460, 0x00, "Marvell MV78460", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 71207536Smav {0, 0x00, NULL, 0, 0} 72207536Smav}; 73207536Smav 74207536Smavstatic int 75207536Smavmvs_probe(device_t dev) 76207536Smav{ 77207536Smav char buf[64]; 78207536Smav int i; 79207536Smav uint32_t devid, revid; 80207536Smav 81261410Sian if (!ofw_bus_status_okay(dev)) 82261410Sian return (ENXIO); 83261410Sian 84220097Smav if (!ofw_bus_is_compatible(dev, "mrvl,sata")) 85220097Smav return (ENXIO); 86220097Smav 87207536Smav soc_id(&devid, &revid); 88207536Smav for (i = 0; mvs_ids[i].id != 0; i++) { 89207536Smav if (mvs_ids[i].id == devid && 90207536Smav mvs_ids[i].rev <= revid) { 91207536Smav snprintf(buf, sizeof(buf), "%s SATA controller", 92207536Smav mvs_ids[i].name); 93207536Smav device_set_desc_copy(dev, buf); 94207536Smav return (BUS_PROBE_VENDOR); 95207536Smav } 96207536Smav } 97207536Smav return (ENXIO); 98207536Smav} 99207536Smav 100207536Smavstatic int 101207536Smavmvs_attach(device_t dev) 102207536Smav{ 103207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 104207536Smav device_t child; 105207536Smav int error, unit, i; 106207536Smav uint32_t devid, revid; 107207536Smav 108207536Smav soc_id(&devid, &revid); 109207536Smav ctlr->dev = dev; 110207536Smav i = 0; 111207536Smav while (mvs_ids[i].id != 0 && 112207536Smav (mvs_ids[i].id != devid || 113207536Smav mvs_ids[i].rev > revid)) 114207536Smav i++; 115207536Smav ctlr->channels = mvs_ids[i].ports; 116207536Smav ctlr->quirks = mvs_ids[i].quirks; 117207536Smav resource_int_value(device_get_name(dev), 118207536Smav device_get_unit(dev), "ccc", &ctlr->ccc); 119207536Smav ctlr->cccc = 8; 120207536Smav resource_int_value(device_get_name(dev), 121207536Smav device_get_unit(dev), "cccc", &ctlr->cccc); 122207536Smav if (ctlr->ccc == 0 || ctlr->cccc == 0) { 123207536Smav ctlr->ccc = 0; 124207536Smav ctlr->cccc = 0; 125207536Smav } 126207536Smav if (ctlr->ccc > 100000) 127207536Smav ctlr->ccc = 100000; 128207536Smav device_printf(dev, 129207536Smav "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n", 130207536Smav ((ctlr->quirks & MVS_Q_GENI) ? "I" : 131207536Smav ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")), 132207536Smav ctlr->channels, 133207536Smav ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"), 134207536Smav ((ctlr->quirks & MVS_Q_GENI) ? 135207536Smav "not supported" : "supported"), 136207536Smav ((ctlr->quirks & MVS_Q_GENIIE) ? 137207536Smav " with FBS" : "")); 138207536Smav mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF); 139207536Smav /* We should have a memory BAR(0). */ 140207536Smav ctlr->r_rid = 0; 141207536Smav if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 142207536Smav &ctlr->r_rid, RF_ACTIVE))) 143207536Smav return ENXIO; 144236952Smav if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0) 145236952Smav ctlr->quirks |= MVS_Q_SOC65; 146207536Smav /* Setup our own memory management for channels. */ 147208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 148208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 149207536Smav ctlr->sc_iomem.rm_type = RMAN_ARRAY; 150207536Smav ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 151207536Smav if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 152207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 153207536Smav return (error); 154207536Smav } 155207536Smav if ((error = rman_manage_region(&ctlr->sc_iomem, 156207536Smav rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 157207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 158207536Smav rman_fini(&ctlr->sc_iomem); 159207536Smav return (error); 160207536Smav } 161207536Smav mvs_ctlr_setup(dev); 162207536Smav /* Setup interrupts. */ 163207536Smav if (mvs_setup_interrupt(dev)) { 164207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 165207536Smav rman_fini(&ctlr->sc_iomem); 166207536Smav return ENXIO; 167207536Smav } 168207536Smav /* Attach all channels on this controller */ 169207536Smav for (unit = 0; unit < ctlr->channels; unit++) { 170207536Smav child = device_add_child(dev, "mvsch", -1); 171207536Smav if (child == NULL) 172207536Smav device_printf(dev, "failed to add channel device\n"); 173207536Smav else 174207536Smav device_set_ivars(child, (void *)(intptr_t)unit); 175207536Smav } 176207536Smav bus_generic_attach(dev); 177207536Smav return 0; 178207536Smav} 179207536Smav 180207536Smavstatic int 181207536Smavmvs_detach(device_t dev) 182207536Smav{ 183207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 184207536Smav 185207536Smav /* Detach & delete all children */ 186227849Shselasky device_delete_children(dev); 187227701Shselasky 188207536Smav /* Free interrupt. */ 189207536Smav if (ctlr->irq.r_irq) { 190207536Smav bus_teardown_intr(dev, ctlr->irq.r_irq, 191207536Smav ctlr->irq.handle); 192207536Smav bus_release_resource(dev, SYS_RES_IRQ, 193207536Smav ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 194207536Smav } 195207536Smav /* Free memory. */ 196207536Smav rman_fini(&ctlr->sc_iomem); 197207536Smav if (ctlr->r_mem) 198207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 199207536Smav mtx_destroy(&ctlr->mtx); 200207536Smav return (0); 201207536Smav} 202207536Smav 203207536Smavstatic int 204207536Smavmvs_ctlr_setup(device_t dev) 205207536Smav{ 206207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 207207536Smav int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0; 208207536Smav 209207536Smav /* Mask chip interrupts */ 210207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 211207536Smav /* Clear HC interrupts */ 212207536Smav ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000); 213207536Smav /* Clear chip interrupts */ 214207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0); 215207536Smav /* Configure per-HC CCC */ 216207536Smav if (ccc && bootverbose) { 217207536Smav device_printf(dev, 218207536Smav "CCC with %dus/%dcmd enabled\n", 219207536Smav ctlr->ccc, ctlr->cccc); 220207536Smav } 221207536Smav ccc *= 150; 222207536Smav ATA_OUTL(ctlr->r_mem, HC_ICT, cccc); 223207536Smav ATA_OUTL(ctlr->r_mem, HC_ITT, ccc); 224207536Smav if (ccc) 225207536Smav ccim |= IC_HC0_COAL_DONE; 226207536Smav /* Enable chip interrupts */ 227230865Sraj ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE : 228230865Sraj (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) | 229230865Sraj (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))); 230207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 231207536Smav return (0); 232207536Smav} 233207536Smav 234207536Smavstatic void 235207536Smavmvs_edma(device_t dev, device_t child, int mode) 236207536Smav{ 237207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 238207536Smav int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 239207536Smav int bit = IC_DONE_IRQ << (unit * 2); 240207536Smav 241207536Smav if (ctlr->ccc == 0) 242207536Smav return; 243207536Smav /* CCC is not working for non-EDMA mode. Unmask device interrupts. */ 244207536Smav mtx_lock(&ctlr->mtx); 245207536Smav if (mode == MVS_EDMA_OFF) 246207536Smav ctlr->pmim |= bit; 247207536Smav else 248207536Smav ctlr->pmim &= ~bit; 249207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 250207536Smav mtx_unlock(&ctlr->mtx); 251207536Smav} 252207536Smav 253207536Smavstatic int 254207536Smavmvs_suspend(device_t dev) 255207536Smav{ 256207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 257207536Smav 258207536Smav bus_generic_suspend(dev); 259207536Smav /* Mask chip interrupts */ 260207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 261207536Smav return 0; 262207536Smav} 263207536Smav 264207536Smavstatic int 265207536Smavmvs_resume(device_t dev) 266207536Smav{ 267207536Smav 268207536Smav mvs_ctlr_setup(dev); 269207536Smav return (bus_generic_resume(dev)); 270207536Smav} 271207536Smav 272207536Smavstatic int 273207536Smavmvs_setup_interrupt(device_t dev) 274207536Smav{ 275207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 276207536Smav 277207536Smav /* Allocate all IRQs. */ 278207536Smav ctlr->irq.r_irq_rid = 0; 279207536Smav if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 280207536Smav &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 281207536Smav device_printf(dev, "unable to map interrupt\n"); 282207536Smav return (ENXIO); 283207536Smav } 284207536Smav if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 285207536Smav mvs_intr, ctlr, &ctlr->irq.handle))) { 286207536Smav device_printf(dev, "unable to setup interrupt\n"); 287207536Smav bus_release_resource(dev, SYS_RES_IRQ, 288207536Smav ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 289207536Smav ctlr->irq.r_irq = 0; 290207536Smav return (ENXIO); 291207536Smav } 292207536Smav return (0); 293207536Smav} 294207536Smav 295207536Smav/* 296207536Smav * Common case interrupt handler. 297207536Smav */ 298207536Smavstatic void 299207536Smavmvs_intr(void *data) 300207536Smav{ 301207536Smav struct mvs_controller *ctlr = data; 302207536Smav struct mvs_intr_arg arg; 303207536Smav void (*function)(void *); 304230865Sraj int p, chan_num; 305207536Smav u_int32_t ic, aic; 306207536Smav 307207536Smav ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC); 308207536Smav if ((ic & IC_HC0) == 0) 309207536Smav return; 310230865Sraj 311207536Smav /* Acknowledge interrupts of this HC. */ 312207536Smav aic = 0; 313230865Sraj 314230865Sraj /* Processing interrupts from each initialized channel */ 315230865Sraj for (chan_num = 0; chan_num < ctlr->channels; chan_num++) { 316230865Sraj if (ic & (IC_DONE_IRQ << (chan_num * 2))) 317230865Sraj aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num); 318230865Sraj } 319230865Sraj 320207536Smav if (ic & IC_HC0_COAL_DONE) 321207536Smav aic |= HC_IC_COAL; 322207536Smav ATA_OUTL(ctlr->r_mem, HC_IC, ~aic); 323230865Sraj 324207536Smav /* Call per-port interrupt handler. */ 325207536Smav for (p = 0; p < ctlr->channels; p++) { 326207536Smav arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ); 327207536Smav if ((arg.cause != 0) && 328207536Smav (function = ctlr->interrupt[p].function)) { 329207536Smav arg.arg = ctlr->interrupt[p].argument; 330207536Smav function(&arg); 331207536Smav } 332207536Smav ic >>= 2; 333207536Smav } 334207536Smav} 335207536Smav 336207536Smavstatic struct resource * 337207536Smavmvs_alloc_resource(device_t dev, device_t child, int type, int *rid, 338207536Smav u_long start, u_long end, u_long count, u_int flags) 339207536Smav{ 340207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 341207536Smav int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 342207536Smav struct resource *res = NULL; 343207536Smav int offset = PORT_BASE(unit & 0x03); 344207536Smav long st; 345207536Smav 346207536Smav switch (type) { 347207536Smav case SYS_RES_MEMORY: 348207536Smav st = rman_get_start(ctlr->r_mem); 349207536Smav res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 350207536Smav st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child); 351207536Smav if (res) { 352207536Smav bus_space_handle_t bsh; 353207536Smav bus_space_tag_t bst; 354207536Smav bsh = rman_get_bushandle(ctlr->r_mem); 355207536Smav bst = rman_get_bustag(ctlr->r_mem); 356207536Smav bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh); 357207536Smav rman_set_bushandle(res, bsh); 358207536Smav rman_set_bustag(res, bst); 359207536Smav } 360207536Smav break; 361207536Smav case SYS_RES_IRQ: 362207536Smav if (*rid == ATA_IRQ_RID) 363207536Smav res = ctlr->irq.r_irq; 364207536Smav break; 365207536Smav } 366207536Smav return (res); 367207536Smav} 368207536Smav 369207536Smavstatic int 370207536Smavmvs_release_resource(device_t dev, device_t child, int type, int rid, 371207536Smav struct resource *r) 372207536Smav{ 373207536Smav 374207536Smav switch (type) { 375207536Smav case SYS_RES_MEMORY: 376207536Smav rman_release_resource(r); 377207536Smav return (0); 378207536Smav case SYS_RES_IRQ: 379207536Smav if (rid != ATA_IRQ_RID) 380207536Smav return ENOENT; 381207536Smav return (0); 382207536Smav } 383207536Smav return (EINVAL); 384207536Smav} 385207536Smav 386207536Smavstatic int 387207536Smavmvs_setup_intr(device_t dev, device_t child, struct resource *irq, 388207536Smav int flags, driver_filter_t *filter, driver_intr_t *function, 389207536Smav void *argument, void **cookiep) 390207536Smav{ 391207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 392207536Smav int unit = (intptr_t)device_get_ivars(child); 393207536Smav 394207536Smav if (filter != NULL) { 395207536Smav printf("mvs.c: we cannot use a filter here\n"); 396207536Smav return (EINVAL); 397207536Smav } 398207536Smav ctlr->interrupt[unit].function = function; 399207536Smav ctlr->interrupt[unit].argument = argument; 400207536Smav return (0); 401207536Smav} 402207536Smav 403207536Smavstatic int 404207536Smavmvs_teardown_intr(device_t dev, device_t child, struct resource *irq, 405207536Smav void *cookie) 406207536Smav{ 407207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 408207536Smav int unit = (intptr_t)device_get_ivars(child); 409207536Smav 410207536Smav ctlr->interrupt[unit].function = NULL; 411207536Smav ctlr->interrupt[unit].argument = NULL; 412207536Smav return (0); 413207536Smav} 414207536Smav 415207536Smavstatic int 416207536Smavmvs_print_child(device_t dev, device_t child) 417207536Smav{ 418207536Smav int retval; 419207536Smav 420207536Smav retval = bus_print_child_header(dev, child); 421207536Smav retval += printf(" at channel %d", 422207536Smav (int)(intptr_t)device_get_ivars(child)); 423207536Smav retval += bus_print_child_footer(dev, child); 424207536Smav 425207536Smav return (retval); 426207536Smav} 427207536Smav 428208410Smavstatic int 429208410Smavmvs_child_location_str(device_t dev, device_t child, char *buf, 430208410Smav size_t buflen) 431208410Smav{ 432208410Smav 433208410Smav snprintf(buf, buflen, "channel=%d", 434208410Smav (int)(intptr_t)device_get_ivars(child)); 435208410Smav return (0); 436208410Smav} 437208410Smav 438249622Smavstatic bus_dma_tag_t 439249622Smavmvs_get_dma_tag(device_t bus, device_t child) 440249622Smav{ 441249622Smav 442249622Smav return (bus_get_dma_tag(bus)); 443249622Smav} 444249622Smav 445207536Smavstatic device_method_t mvs_methods[] = { 446207536Smav DEVMETHOD(device_probe, mvs_probe), 447207536Smav DEVMETHOD(device_attach, mvs_attach), 448207536Smav DEVMETHOD(device_detach, mvs_detach), 449207536Smav DEVMETHOD(device_suspend, mvs_suspend), 450207536Smav DEVMETHOD(device_resume, mvs_resume), 451207536Smav DEVMETHOD(bus_print_child, mvs_print_child), 452207536Smav DEVMETHOD(bus_alloc_resource, mvs_alloc_resource), 453207536Smav DEVMETHOD(bus_release_resource, mvs_release_resource), 454207536Smav DEVMETHOD(bus_setup_intr, mvs_setup_intr), 455207536Smav DEVMETHOD(bus_teardown_intr,mvs_teardown_intr), 456249622Smav DEVMETHOD(bus_child_location_str, mvs_child_location_str), 457249622Smav DEVMETHOD(bus_get_dma_tag, mvs_get_dma_tag), 458207536Smav DEVMETHOD(mvs_edma, mvs_edma), 459207536Smav { 0, 0 } 460207536Smav}; 461207536Smavstatic driver_t mvs_driver = { 462220097Smav "mvs", 463207536Smav mvs_methods, 464207536Smav sizeof(struct mvs_controller) 465207536Smav}; 466220097SmavDRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0); 467220097SmavMODULE_VERSION(mvs, 1); 468220097SmavMODULE_DEPEND(mvs, cam, 1, 1, 1); 469