mvs_soc.c revision 249622
1207536Smav/*- 2207536Smav * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 3207536Smav * All rights reserved. 4207536Smav * 5207536Smav * Redistribution and use in source and binary forms, with or without 6207536Smav * modification, are permitted provided that the following conditions 7207536Smav * are met: 8207536Smav * 1. Redistributions of source code must retain the above copyright 9207536Smav * notice, this list of conditions and the following disclaimer, 10207536Smav * without modification, immediately at the beginning of the file. 11207536Smav * 2. Redistributions in binary form must reproduce the above copyright 12207536Smav * notice, this list of conditions and the following disclaimer in the 13207536Smav * documentation and/or other materials provided with the distribution. 14207536Smav * 15207536Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16207536Smav * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17207536Smav * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18207536Smav * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19207536Smav * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20207536Smav * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21207536Smav * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22207536Smav * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23207536Smav * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24207536Smav * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25207536Smav */ 26207536Smav 27207536Smav#include <sys/cdefs.h> 28207536Smav__FBSDID("$FreeBSD: head/sys/dev/mvs/mvs_soc.c 249622 2013-04-18 12:43:06Z mav $"); 29207536Smav 30207536Smav#include <sys/param.h> 31207536Smav#include <sys/module.h> 32207536Smav#include <sys/systm.h> 33207536Smav#include <sys/kernel.h> 34207536Smav#include <sys/bus.h> 35207536Smav#include <sys/endian.h> 36207536Smav#include <sys/malloc.h> 37207536Smav#include <sys/lock.h> 38207536Smav#include <sys/mutex.h> 39207536Smav#include <vm/uma.h> 40207536Smav#include <machine/stdarg.h> 41207536Smav#include <machine/resource.h> 42207536Smav#include <machine/bus.h> 43207536Smav#include <sys/rman.h> 44207536Smav#include <arm/mv/mvreg.h> 45207536Smav#include <arm/mv/mvvar.h> 46220097Smav#include <dev/ofw/ofw_bus.h> 47220097Smav#include <dev/ofw/ofw_bus_subr.h> 48207536Smav#include "mvs.h" 49207536Smav 50207536Smav/* local prototypes */ 51207536Smavstatic int mvs_setup_interrupt(device_t dev); 52207536Smavstatic void mvs_intr(void *data); 53207536Smavstatic int mvs_suspend(device_t dev); 54207536Smavstatic int mvs_resume(device_t dev); 55207536Smavstatic int mvs_ctlr_setup(device_t dev); 56207536Smav 57207536Smavstatic struct { 58207536Smav uint32_t id; 59207536Smav uint8_t rev; 60207536Smav const char *name; 61207536Smav int ports; 62207536Smav int quirks; 63207536Smav} mvs_ids[] = { 64207536Smav {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 65207536Smav {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 66238873Shrs {MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 67207536Smav {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 68207536Smav {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 69207536Smav {0, 0x00, NULL, 0, 0} 70207536Smav}; 71207536Smav 72207536Smavstatic int 73207536Smavmvs_probe(device_t dev) 74207536Smav{ 75207536Smav char buf[64]; 76207536Smav int i; 77207536Smav uint32_t devid, revid; 78207536Smav 79220097Smav if (!ofw_bus_is_compatible(dev, "mrvl,sata")) 80220097Smav return (ENXIO); 81220097Smav 82207536Smav soc_id(&devid, &revid); 83207536Smav for (i = 0; mvs_ids[i].id != 0; i++) { 84207536Smav if (mvs_ids[i].id == devid && 85207536Smav mvs_ids[i].rev <= revid) { 86207536Smav snprintf(buf, sizeof(buf), "%s SATA controller", 87207536Smav mvs_ids[i].name); 88207536Smav device_set_desc_copy(dev, buf); 89207536Smav return (BUS_PROBE_VENDOR); 90207536Smav } 91207536Smav } 92207536Smav return (ENXIO); 93207536Smav} 94207536Smav 95207536Smavstatic int 96207536Smavmvs_attach(device_t dev) 97207536Smav{ 98207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 99207536Smav device_t child; 100207536Smav int error, unit, i; 101207536Smav uint32_t devid, revid; 102207536Smav 103207536Smav soc_id(&devid, &revid); 104207536Smav ctlr->dev = dev; 105207536Smav i = 0; 106207536Smav while (mvs_ids[i].id != 0 && 107207536Smav (mvs_ids[i].id != devid || 108207536Smav mvs_ids[i].rev > revid)) 109207536Smav i++; 110207536Smav ctlr->channels = mvs_ids[i].ports; 111207536Smav ctlr->quirks = mvs_ids[i].quirks; 112207536Smav resource_int_value(device_get_name(dev), 113207536Smav device_get_unit(dev), "ccc", &ctlr->ccc); 114207536Smav ctlr->cccc = 8; 115207536Smav resource_int_value(device_get_name(dev), 116207536Smav device_get_unit(dev), "cccc", &ctlr->cccc); 117207536Smav if (ctlr->ccc == 0 || ctlr->cccc == 0) { 118207536Smav ctlr->ccc = 0; 119207536Smav ctlr->cccc = 0; 120207536Smav } 121207536Smav if (ctlr->ccc > 100000) 122207536Smav ctlr->ccc = 100000; 123207536Smav device_printf(dev, 124207536Smav "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n", 125207536Smav ((ctlr->quirks & MVS_Q_GENI) ? "I" : 126207536Smav ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")), 127207536Smav ctlr->channels, 128207536Smav ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"), 129207536Smav ((ctlr->quirks & MVS_Q_GENI) ? 130207536Smav "not supported" : "supported"), 131207536Smav ((ctlr->quirks & MVS_Q_GENIIE) ? 132207536Smav " with FBS" : "")); 133207536Smav mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF); 134207536Smav /* We should have a memory BAR(0). */ 135207536Smav ctlr->r_rid = 0; 136207536Smav if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 137207536Smav &ctlr->r_rid, RF_ACTIVE))) 138207536Smav return ENXIO; 139236952Smav if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0) 140236952Smav ctlr->quirks |= MVS_Q_SOC65; 141207536Smav /* Setup our own memory management for channels. */ 142208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 143208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 144207536Smav ctlr->sc_iomem.rm_type = RMAN_ARRAY; 145207536Smav ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 146207536Smav if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 147207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 148207536Smav return (error); 149207536Smav } 150207536Smav if ((error = rman_manage_region(&ctlr->sc_iomem, 151207536Smav rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 152207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 153207536Smav rman_fini(&ctlr->sc_iomem); 154207536Smav return (error); 155207536Smav } 156207536Smav mvs_ctlr_setup(dev); 157207536Smav /* Setup interrupts. */ 158207536Smav if (mvs_setup_interrupt(dev)) { 159207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 160207536Smav rman_fini(&ctlr->sc_iomem); 161207536Smav return ENXIO; 162207536Smav } 163207536Smav /* Attach all channels on this controller */ 164207536Smav for (unit = 0; unit < ctlr->channels; unit++) { 165207536Smav child = device_add_child(dev, "mvsch", -1); 166207536Smav if (child == NULL) 167207536Smav device_printf(dev, "failed to add channel device\n"); 168207536Smav else 169207536Smav device_set_ivars(child, (void *)(intptr_t)unit); 170207536Smav } 171207536Smav bus_generic_attach(dev); 172207536Smav return 0; 173207536Smav} 174207536Smav 175207536Smavstatic int 176207536Smavmvs_detach(device_t dev) 177207536Smav{ 178207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 179207536Smav 180207536Smav /* Detach & delete all children */ 181227849Shselasky device_delete_children(dev); 182227701Shselasky 183207536Smav /* Free interrupt. */ 184207536Smav if (ctlr->irq.r_irq) { 185207536Smav bus_teardown_intr(dev, ctlr->irq.r_irq, 186207536Smav ctlr->irq.handle); 187207536Smav bus_release_resource(dev, SYS_RES_IRQ, 188207536Smav ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 189207536Smav } 190207536Smav /* Free memory. */ 191207536Smav rman_fini(&ctlr->sc_iomem); 192207536Smav if (ctlr->r_mem) 193207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 194207536Smav mtx_destroy(&ctlr->mtx); 195207536Smav return (0); 196207536Smav} 197207536Smav 198207536Smavstatic int 199207536Smavmvs_ctlr_setup(device_t dev) 200207536Smav{ 201207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 202207536Smav int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0; 203207536Smav 204207536Smav /* Mask chip interrupts */ 205207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 206207536Smav /* Clear HC interrupts */ 207207536Smav ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000); 208207536Smav /* Clear chip interrupts */ 209207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0); 210207536Smav /* Configure per-HC CCC */ 211207536Smav if (ccc && bootverbose) { 212207536Smav device_printf(dev, 213207536Smav "CCC with %dus/%dcmd enabled\n", 214207536Smav ctlr->ccc, ctlr->cccc); 215207536Smav } 216207536Smav ccc *= 150; 217207536Smav ATA_OUTL(ctlr->r_mem, HC_ICT, cccc); 218207536Smav ATA_OUTL(ctlr->r_mem, HC_ITT, ccc); 219207536Smav if (ccc) 220207536Smav ccim |= IC_HC0_COAL_DONE; 221207536Smav /* Enable chip interrupts */ 222230865Sraj ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE : 223230865Sraj (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) | 224230865Sraj (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))); 225207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 226207536Smav return (0); 227207536Smav} 228207536Smav 229207536Smavstatic void 230207536Smavmvs_edma(device_t dev, device_t child, int mode) 231207536Smav{ 232207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 233207536Smav int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 234207536Smav int bit = IC_DONE_IRQ << (unit * 2); 235207536Smav 236207536Smav if (ctlr->ccc == 0) 237207536Smav return; 238207536Smav /* CCC is not working for non-EDMA mode. Unmask device interrupts. */ 239207536Smav mtx_lock(&ctlr->mtx); 240207536Smav if (mode == MVS_EDMA_OFF) 241207536Smav ctlr->pmim |= bit; 242207536Smav else 243207536Smav ctlr->pmim &= ~bit; 244207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 245207536Smav mtx_unlock(&ctlr->mtx); 246207536Smav} 247207536Smav 248207536Smavstatic int 249207536Smavmvs_suspend(device_t dev) 250207536Smav{ 251207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 252207536Smav 253207536Smav bus_generic_suspend(dev); 254207536Smav /* Mask chip interrupts */ 255207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 256207536Smav return 0; 257207536Smav} 258207536Smav 259207536Smavstatic int 260207536Smavmvs_resume(device_t dev) 261207536Smav{ 262207536Smav 263207536Smav mvs_ctlr_setup(dev); 264207536Smav return (bus_generic_resume(dev)); 265207536Smav} 266207536Smav 267207536Smavstatic int 268207536Smavmvs_setup_interrupt(device_t dev) 269207536Smav{ 270207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 271207536Smav 272207536Smav /* Allocate all IRQs. */ 273207536Smav ctlr->irq.r_irq_rid = 0; 274207536Smav if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 275207536Smav &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 276207536Smav device_printf(dev, "unable to map interrupt\n"); 277207536Smav return (ENXIO); 278207536Smav } 279207536Smav if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 280207536Smav mvs_intr, ctlr, &ctlr->irq.handle))) { 281207536Smav device_printf(dev, "unable to setup interrupt\n"); 282207536Smav bus_release_resource(dev, SYS_RES_IRQ, 283207536Smav ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 284207536Smav ctlr->irq.r_irq = 0; 285207536Smav return (ENXIO); 286207536Smav } 287207536Smav return (0); 288207536Smav} 289207536Smav 290207536Smav/* 291207536Smav * Common case interrupt handler. 292207536Smav */ 293207536Smavstatic void 294207536Smavmvs_intr(void *data) 295207536Smav{ 296207536Smav struct mvs_controller *ctlr = data; 297207536Smav struct mvs_intr_arg arg; 298207536Smav void (*function)(void *); 299230865Sraj int p, chan_num; 300207536Smav u_int32_t ic, aic; 301207536Smav 302207536Smav ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC); 303207536Smav if ((ic & IC_HC0) == 0) 304207536Smav return; 305230865Sraj 306207536Smav /* Acknowledge interrupts of this HC. */ 307207536Smav aic = 0; 308230865Sraj 309230865Sraj /* Processing interrupts from each initialized channel */ 310230865Sraj for (chan_num = 0; chan_num < ctlr->channels; chan_num++) { 311230865Sraj if (ic & (IC_DONE_IRQ << (chan_num * 2))) 312230865Sraj aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num); 313230865Sraj } 314230865Sraj 315207536Smav if (ic & IC_HC0_COAL_DONE) 316207536Smav aic |= HC_IC_COAL; 317207536Smav ATA_OUTL(ctlr->r_mem, HC_IC, ~aic); 318230865Sraj 319207536Smav /* Call per-port interrupt handler. */ 320207536Smav for (p = 0; p < ctlr->channels; p++) { 321207536Smav arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ); 322207536Smav if ((arg.cause != 0) && 323207536Smav (function = ctlr->interrupt[p].function)) { 324207536Smav arg.arg = ctlr->interrupt[p].argument; 325207536Smav function(&arg); 326207536Smav } 327207536Smav ic >>= 2; 328207536Smav } 329207536Smav} 330207536Smav 331207536Smavstatic struct resource * 332207536Smavmvs_alloc_resource(device_t dev, device_t child, int type, int *rid, 333207536Smav u_long start, u_long end, u_long count, u_int flags) 334207536Smav{ 335207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 336207536Smav int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 337207536Smav struct resource *res = NULL; 338207536Smav int offset = PORT_BASE(unit & 0x03); 339207536Smav long st; 340207536Smav 341207536Smav switch (type) { 342207536Smav case SYS_RES_MEMORY: 343207536Smav st = rman_get_start(ctlr->r_mem); 344207536Smav res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 345207536Smav st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child); 346207536Smav if (res) { 347207536Smav bus_space_handle_t bsh; 348207536Smav bus_space_tag_t bst; 349207536Smav bsh = rman_get_bushandle(ctlr->r_mem); 350207536Smav bst = rman_get_bustag(ctlr->r_mem); 351207536Smav bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh); 352207536Smav rman_set_bushandle(res, bsh); 353207536Smav rman_set_bustag(res, bst); 354207536Smav } 355207536Smav break; 356207536Smav case SYS_RES_IRQ: 357207536Smav if (*rid == ATA_IRQ_RID) 358207536Smav res = ctlr->irq.r_irq; 359207536Smav break; 360207536Smav } 361207536Smav return (res); 362207536Smav} 363207536Smav 364207536Smavstatic int 365207536Smavmvs_release_resource(device_t dev, device_t child, int type, int rid, 366207536Smav struct resource *r) 367207536Smav{ 368207536Smav 369207536Smav switch (type) { 370207536Smav case SYS_RES_MEMORY: 371207536Smav rman_release_resource(r); 372207536Smav return (0); 373207536Smav case SYS_RES_IRQ: 374207536Smav if (rid != ATA_IRQ_RID) 375207536Smav return ENOENT; 376207536Smav return (0); 377207536Smav } 378207536Smav return (EINVAL); 379207536Smav} 380207536Smav 381207536Smavstatic int 382207536Smavmvs_setup_intr(device_t dev, device_t child, struct resource *irq, 383207536Smav int flags, driver_filter_t *filter, driver_intr_t *function, 384207536Smav void *argument, void **cookiep) 385207536Smav{ 386207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 387207536Smav int unit = (intptr_t)device_get_ivars(child); 388207536Smav 389207536Smav if (filter != NULL) { 390207536Smav printf("mvs.c: we cannot use a filter here\n"); 391207536Smav return (EINVAL); 392207536Smav } 393207536Smav ctlr->interrupt[unit].function = function; 394207536Smav ctlr->interrupt[unit].argument = argument; 395207536Smav return (0); 396207536Smav} 397207536Smav 398207536Smavstatic int 399207536Smavmvs_teardown_intr(device_t dev, device_t child, struct resource *irq, 400207536Smav void *cookie) 401207536Smav{ 402207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 403207536Smav int unit = (intptr_t)device_get_ivars(child); 404207536Smav 405207536Smav ctlr->interrupt[unit].function = NULL; 406207536Smav ctlr->interrupt[unit].argument = NULL; 407207536Smav return (0); 408207536Smav} 409207536Smav 410207536Smavstatic int 411207536Smavmvs_print_child(device_t dev, device_t child) 412207536Smav{ 413207536Smav int retval; 414207536Smav 415207536Smav retval = bus_print_child_header(dev, child); 416207536Smav retval += printf(" at channel %d", 417207536Smav (int)(intptr_t)device_get_ivars(child)); 418207536Smav retval += bus_print_child_footer(dev, child); 419207536Smav 420207536Smav return (retval); 421207536Smav} 422207536Smav 423208410Smavstatic int 424208410Smavmvs_child_location_str(device_t dev, device_t child, char *buf, 425208410Smav size_t buflen) 426208410Smav{ 427208410Smav 428208410Smav snprintf(buf, buflen, "channel=%d", 429208410Smav (int)(intptr_t)device_get_ivars(child)); 430208410Smav return (0); 431208410Smav} 432208410Smav 433249622Smavstatic bus_dma_tag_t 434249622Smavmvs_get_dma_tag(device_t bus, device_t child) 435249622Smav{ 436249622Smav 437249622Smav return (bus_get_dma_tag(bus)); 438249622Smav} 439249622Smav 440207536Smavstatic device_method_t mvs_methods[] = { 441207536Smav DEVMETHOD(device_probe, mvs_probe), 442207536Smav DEVMETHOD(device_attach, mvs_attach), 443207536Smav DEVMETHOD(device_detach, mvs_detach), 444207536Smav DEVMETHOD(device_suspend, mvs_suspend), 445207536Smav DEVMETHOD(device_resume, mvs_resume), 446207536Smav DEVMETHOD(bus_print_child, mvs_print_child), 447207536Smav DEVMETHOD(bus_alloc_resource, mvs_alloc_resource), 448207536Smav DEVMETHOD(bus_release_resource, mvs_release_resource), 449207536Smav DEVMETHOD(bus_setup_intr, mvs_setup_intr), 450207536Smav DEVMETHOD(bus_teardown_intr,mvs_teardown_intr), 451249622Smav DEVMETHOD(bus_child_location_str, mvs_child_location_str), 452249622Smav DEVMETHOD(bus_get_dma_tag, mvs_get_dma_tag), 453207536Smav DEVMETHOD(mvs_edma, mvs_edma), 454207536Smav { 0, 0 } 455207536Smav}; 456207536Smavstatic driver_t mvs_driver = { 457220097Smav "mvs", 458207536Smav mvs_methods, 459207536Smav sizeof(struct mvs_controller) 460207536Smav}; 461220097SmavDRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0); 462220097SmavMODULE_VERSION(mvs, 1); 463220097SmavMODULE_DEPEND(mvs, cam, 1, 1, 1); 464