mvs_soc.c revision 236952
1207536Smav/*- 2207536Smav * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 3207536Smav * All rights reserved. 4207536Smav * 5207536Smav * Redistribution and use in source and binary forms, with or without 6207536Smav * modification, are permitted provided that the following conditions 7207536Smav * are met: 8207536Smav * 1. Redistributions of source code must retain the above copyright 9207536Smav * notice, this list of conditions and the following disclaimer, 10207536Smav * without modification, immediately at the beginning of the file. 11207536Smav * 2. Redistributions in binary form must reproduce the above copyright 12207536Smav * notice, this list of conditions and the following disclaimer in the 13207536Smav * documentation and/or other materials provided with the distribution. 14207536Smav * 15207536Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16207536Smav * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17207536Smav * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18207536Smav * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19207536Smav * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20207536Smav * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21207536Smav * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22207536Smav * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23207536Smav * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24207536Smav * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25207536Smav */ 26207536Smav 27207536Smav#include <sys/cdefs.h> 28207536Smav__FBSDID("$FreeBSD: head/sys/dev/mvs/mvs_soc.c 236952 2012-06-12 11:08:51Z mav $"); 29207536Smav 30207536Smav#include <sys/param.h> 31207536Smav#include <sys/module.h> 32207536Smav#include <sys/systm.h> 33207536Smav#include <sys/kernel.h> 34207536Smav#include <sys/bus.h> 35207536Smav#include <sys/endian.h> 36207536Smav#include <sys/malloc.h> 37207536Smav#include <sys/lock.h> 38207536Smav#include <sys/mutex.h> 39207536Smav#include <vm/uma.h> 40207536Smav#include <machine/stdarg.h> 41207536Smav#include <machine/resource.h> 42207536Smav#include <machine/bus.h> 43207536Smav#include <sys/rman.h> 44207536Smav#include <arm/mv/mvreg.h> 45207536Smav#include <arm/mv/mvvar.h> 46220097Smav#include <dev/ofw/ofw_bus.h> 47220097Smav#include <dev/ofw/ofw_bus_subr.h> 48207536Smav#include "mvs.h" 49207536Smav 50207536Smav/* local prototypes */ 51207536Smavstatic int mvs_setup_interrupt(device_t dev); 52207536Smavstatic void mvs_intr(void *data); 53207536Smavstatic int mvs_suspend(device_t dev); 54207536Smavstatic int mvs_resume(device_t dev); 55207536Smavstatic int mvs_ctlr_setup(device_t dev); 56207536Smav 57207536Smavstatic struct { 58207536Smav uint32_t id; 59207536Smav uint8_t rev; 60207536Smav const char *name; 61207536Smav int ports; 62207536Smav int quirks; 63207536Smav} mvs_ids[] = { 64207536Smav {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 65207536Smav {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 66207536Smav {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 67207536Smav {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 68207536Smav {0, 0x00, NULL, 0, 0} 69207536Smav}; 70207536Smav 71207536Smavstatic int 72207536Smavmvs_probe(device_t dev) 73207536Smav{ 74207536Smav char buf[64]; 75207536Smav int i; 76207536Smav uint32_t devid, revid; 77207536Smav 78220097Smav if (!ofw_bus_is_compatible(dev, "mrvl,sata")) 79220097Smav return (ENXIO); 80220097Smav 81207536Smav soc_id(&devid, &revid); 82207536Smav for (i = 0; mvs_ids[i].id != 0; i++) { 83207536Smav if (mvs_ids[i].id == devid && 84207536Smav mvs_ids[i].rev <= revid) { 85207536Smav snprintf(buf, sizeof(buf), "%s SATA controller", 86207536Smav mvs_ids[i].name); 87207536Smav device_set_desc_copy(dev, buf); 88207536Smav return (BUS_PROBE_VENDOR); 89207536Smav } 90207536Smav } 91207536Smav return (ENXIO); 92207536Smav} 93207536Smav 94207536Smavstatic int 95207536Smavmvs_attach(device_t dev) 96207536Smav{ 97207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 98207536Smav device_t child; 99207536Smav int error, unit, i; 100207536Smav uint32_t devid, revid; 101207536Smav 102207536Smav soc_id(&devid, &revid); 103207536Smav ctlr->dev = dev; 104207536Smav i = 0; 105207536Smav while (mvs_ids[i].id != 0 && 106207536Smav (mvs_ids[i].id != devid || 107207536Smav mvs_ids[i].rev > revid)) 108207536Smav i++; 109207536Smav ctlr->channels = mvs_ids[i].ports; 110207536Smav ctlr->quirks = mvs_ids[i].quirks; 111207536Smav resource_int_value(device_get_name(dev), 112207536Smav device_get_unit(dev), "ccc", &ctlr->ccc); 113207536Smav ctlr->cccc = 8; 114207536Smav resource_int_value(device_get_name(dev), 115207536Smav device_get_unit(dev), "cccc", &ctlr->cccc); 116207536Smav if (ctlr->ccc == 0 || ctlr->cccc == 0) { 117207536Smav ctlr->ccc = 0; 118207536Smav ctlr->cccc = 0; 119207536Smav } 120207536Smav if (ctlr->ccc > 100000) 121207536Smav ctlr->ccc = 100000; 122207536Smav device_printf(dev, 123207536Smav "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n", 124207536Smav ((ctlr->quirks & MVS_Q_GENI) ? "I" : 125207536Smav ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")), 126207536Smav ctlr->channels, 127207536Smav ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"), 128207536Smav ((ctlr->quirks & MVS_Q_GENI) ? 129207536Smav "not supported" : "supported"), 130207536Smav ((ctlr->quirks & MVS_Q_GENIIE) ? 131207536Smav " with FBS" : "")); 132207536Smav mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF); 133207536Smav /* We should have a memory BAR(0). */ 134207536Smav ctlr->r_rid = 0; 135207536Smav if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 136207536Smav &ctlr->r_rid, RF_ACTIVE))) 137207536Smav return ENXIO; 138236952Smav if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0) 139236952Smav ctlr->quirks |= MVS_Q_SOC65; 140207536Smav /* Setup our own memory management for channels. */ 141208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 142208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 143207536Smav ctlr->sc_iomem.rm_type = RMAN_ARRAY; 144207536Smav ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 145207536Smav if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 146207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 147207536Smav return (error); 148207536Smav } 149207536Smav if ((error = rman_manage_region(&ctlr->sc_iomem, 150207536Smav rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 151207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 152207536Smav rman_fini(&ctlr->sc_iomem); 153207536Smav return (error); 154207536Smav } 155207536Smav mvs_ctlr_setup(dev); 156207536Smav /* Setup interrupts. */ 157207536Smav if (mvs_setup_interrupt(dev)) { 158207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 159207536Smav rman_fini(&ctlr->sc_iomem); 160207536Smav return ENXIO; 161207536Smav } 162207536Smav /* Attach all channels on this controller */ 163207536Smav for (unit = 0; unit < ctlr->channels; unit++) { 164207536Smav child = device_add_child(dev, "mvsch", -1); 165207536Smav if (child == NULL) 166207536Smav device_printf(dev, "failed to add channel device\n"); 167207536Smav else 168207536Smav device_set_ivars(child, (void *)(intptr_t)unit); 169207536Smav } 170207536Smav bus_generic_attach(dev); 171207536Smav return 0; 172207536Smav} 173207536Smav 174207536Smavstatic int 175207536Smavmvs_detach(device_t dev) 176207536Smav{ 177207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 178207536Smav 179207536Smav /* Detach & delete all children */ 180227849Shselasky device_delete_children(dev); 181227701Shselasky 182207536Smav /* Free interrupt. */ 183207536Smav if (ctlr->irq.r_irq) { 184207536Smav bus_teardown_intr(dev, ctlr->irq.r_irq, 185207536Smav ctlr->irq.handle); 186207536Smav bus_release_resource(dev, SYS_RES_IRQ, 187207536Smav ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 188207536Smav } 189207536Smav /* Free memory. */ 190207536Smav rman_fini(&ctlr->sc_iomem); 191207536Smav if (ctlr->r_mem) 192207536Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 193207536Smav mtx_destroy(&ctlr->mtx); 194207536Smav return (0); 195207536Smav} 196207536Smav 197207536Smavstatic int 198207536Smavmvs_ctlr_setup(device_t dev) 199207536Smav{ 200207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 201207536Smav int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0; 202207536Smav 203207536Smav /* Mask chip interrupts */ 204207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 205207536Smav /* Clear HC interrupts */ 206207536Smav ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000); 207207536Smav /* Clear chip interrupts */ 208207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0); 209207536Smav /* Configure per-HC CCC */ 210207536Smav if (ccc && bootverbose) { 211207536Smav device_printf(dev, 212207536Smav "CCC with %dus/%dcmd enabled\n", 213207536Smav ctlr->ccc, ctlr->cccc); 214207536Smav } 215207536Smav ccc *= 150; 216207536Smav ATA_OUTL(ctlr->r_mem, HC_ICT, cccc); 217207536Smav ATA_OUTL(ctlr->r_mem, HC_ITT, ccc); 218207536Smav if (ccc) 219207536Smav ccim |= IC_HC0_COAL_DONE; 220207536Smav /* Enable chip interrupts */ 221230865Sraj ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE : 222230865Sraj (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) | 223230865Sraj (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))); 224207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 225207536Smav return (0); 226207536Smav} 227207536Smav 228207536Smavstatic void 229207536Smavmvs_edma(device_t dev, device_t child, int mode) 230207536Smav{ 231207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 232207536Smav int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 233207536Smav int bit = IC_DONE_IRQ << (unit * 2); 234207536Smav 235207536Smav if (ctlr->ccc == 0) 236207536Smav return; 237207536Smav /* CCC is not working for non-EDMA mode. Unmask device interrupts. */ 238207536Smav mtx_lock(&ctlr->mtx); 239207536Smav if (mode == MVS_EDMA_OFF) 240207536Smav ctlr->pmim |= bit; 241207536Smav else 242207536Smav ctlr->pmim &= ~bit; 243207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 244207536Smav mtx_unlock(&ctlr->mtx); 245207536Smav} 246207536Smav 247207536Smavstatic int 248207536Smavmvs_suspend(device_t dev) 249207536Smav{ 250207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 251207536Smav 252207536Smav bus_generic_suspend(dev); 253207536Smav /* Mask chip interrupts */ 254207536Smav ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 255207536Smav return 0; 256207536Smav} 257207536Smav 258207536Smavstatic int 259207536Smavmvs_resume(device_t dev) 260207536Smav{ 261207536Smav 262207536Smav mvs_ctlr_setup(dev); 263207536Smav return (bus_generic_resume(dev)); 264207536Smav} 265207536Smav 266207536Smavstatic int 267207536Smavmvs_setup_interrupt(device_t dev) 268207536Smav{ 269207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 270207536Smav 271207536Smav /* Allocate all IRQs. */ 272207536Smav ctlr->irq.r_irq_rid = 0; 273207536Smav if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 274207536Smav &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 275207536Smav device_printf(dev, "unable to map interrupt\n"); 276207536Smav return (ENXIO); 277207536Smav } 278207536Smav if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 279207536Smav mvs_intr, ctlr, &ctlr->irq.handle))) { 280207536Smav device_printf(dev, "unable to setup interrupt\n"); 281207536Smav bus_release_resource(dev, SYS_RES_IRQ, 282207536Smav ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 283207536Smav ctlr->irq.r_irq = 0; 284207536Smav return (ENXIO); 285207536Smav } 286207536Smav return (0); 287207536Smav} 288207536Smav 289207536Smav/* 290207536Smav * Common case interrupt handler. 291207536Smav */ 292207536Smavstatic void 293207536Smavmvs_intr(void *data) 294207536Smav{ 295207536Smav struct mvs_controller *ctlr = data; 296207536Smav struct mvs_intr_arg arg; 297207536Smav void (*function)(void *); 298230865Sraj int p, chan_num; 299207536Smav u_int32_t ic, aic; 300207536Smav 301207536Smav ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC); 302207536Smav if ((ic & IC_HC0) == 0) 303207536Smav return; 304230865Sraj 305207536Smav /* Acknowledge interrupts of this HC. */ 306207536Smav aic = 0; 307230865Sraj 308230865Sraj /* Processing interrupts from each initialized channel */ 309230865Sraj for (chan_num = 0; chan_num < ctlr->channels; chan_num++) { 310230865Sraj if (ic & (IC_DONE_IRQ << (chan_num * 2))) 311230865Sraj aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num); 312230865Sraj } 313230865Sraj 314207536Smav if (ic & IC_HC0_COAL_DONE) 315207536Smav aic |= HC_IC_COAL; 316207536Smav ATA_OUTL(ctlr->r_mem, HC_IC, ~aic); 317230865Sraj 318207536Smav /* Call per-port interrupt handler. */ 319207536Smav for (p = 0; p < ctlr->channels; p++) { 320207536Smav arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ); 321207536Smav if ((arg.cause != 0) && 322207536Smav (function = ctlr->interrupt[p].function)) { 323207536Smav arg.arg = ctlr->interrupt[p].argument; 324207536Smav function(&arg); 325207536Smav } 326207536Smav ic >>= 2; 327207536Smav } 328207536Smav} 329207536Smav 330207536Smavstatic struct resource * 331207536Smavmvs_alloc_resource(device_t dev, device_t child, int type, int *rid, 332207536Smav u_long start, u_long end, u_long count, u_int flags) 333207536Smav{ 334207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 335207536Smav int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 336207536Smav struct resource *res = NULL; 337207536Smav int offset = PORT_BASE(unit & 0x03); 338207536Smav long st; 339207536Smav 340207536Smav switch (type) { 341207536Smav case SYS_RES_MEMORY: 342207536Smav st = rman_get_start(ctlr->r_mem); 343207536Smav res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 344207536Smav st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child); 345207536Smav if (res) { 346207536Smav bus_space_handle_t bsh; 347207536Smav bus_space_tag_t bst; 348207536Smav bsh = rman_get_bushandle(ctlr->r_mem); 349207536Smav bst = rman_get_bustag(ctlr->r_mem); 350207536Smav bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh); 351207536Smav rman_set_bushandle(res, bsh); 352207536Smav rman_set_bustag(res, bst); 353207536Smav } 354207536Smav break; 355207536Smav case SYS_RES_IRQ: 356207536Smav if (*rid == ATA_IRQ_RID) 357207536Smav res = ctlr->irq.r_irq; 358207536Smav break; 359207536Smav } 360207536Smav return (res); 361207536Smav} 362207536Smav 363207536Smavstatic int 364207536Smavmvs_release_resource(device_t dev, device_t child, int type, int rid, 365207536Smav struct resource *r) 366207536Smav{ 367207536Smav 368207536Smav switch (type) { 369207536Smav case SYS_RES_MEMORY: 370207536Smav rman_release_resource(r); 371207536Smav return (0); 372207536Smav case SYS_RES_IRQ: 373207536Smav if (rid != ATA_IRQ_RID) 374207536Smav return ENOENT; 375207536Smav return (0); 376207536Smav } 377207536Smav return (EINVAL); 378207536Smav} 379207536Smav 380207536Smavstatic int 381207536Smavmvs_setup_intr(device_t dev, device_t child, struct resource *irq, 382207536Smav int flags, driver_filter_t *filter, driver_intr_t *function, 383207536Smav void *argument, void **cookiep) 384207536Smav{ 385207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 386207536Smav int unit = (intptr_t)device_get_ivars(child); 387207536Smav 388207536Smav if (filter != NULL) { 389207536Smav printf("mvs.c: we cannot use a filter here\n"); 390207536Smav return (EINVAL); 391207536Smav } 392207536Smav ctlr->interrupt[unit].function = function; 393207536Smav ctlr->interrupt[unit].argument = argument; 394207536Smav return (0); 395207536Smav} 396207536Smav 397207536Smavstatic int 398207536Smavmvs_teardown_intr(device_t dev, device_t child, struct resource *irq, 399207536Smav void *cookie) 400207536Smav{ 401207536Smav struct mvs_controller *ctlr = device_get_softc(dev); 402207536Smav int unit = (intptr_t)device_get_ivars(child); 403207536Smav 404207536Smav ctlr->interrupt[unit].function = NULL; 405207536Smav ctlr->interrupt[unit].argument = NULL; 406207536Smav return (0); 407207536Smav} 408207536Smav 409207536Smavstatic int 410207536Smavmvs_print_child(device_t dev, device_t child) 411207536Smav{ 412207536Smav int retval; 413207536Smav 414207536Smav retval = bus_print_child_header(dev, child); 415207536Smav retval += printf(" at channel %d", 416207536Smav (int)(intptr_t)device_get_ivars(child)); 417207536Smav retval += bus_print_child_footer(dev, child); 418207536Smav 419207536Smav return (retval); 420207536Smav} 421207536Smav 422208410Smavstatic int 423208410Smavmvs_child_location_str(device_t dev, device_t child, char *buf, 424208410Smav size_t buflen) 425208410Smav{ 426208410Smav 427208410Smav snprintf(buf, buflen, "channel=%d", 428208410Smav (int)(intptr_t)device_get_ivars(child)); 429208410Smav return (0); 430208410Smav} 431208410Smav 432207536Smavstatic device_method_t mvs_methods[] = { 433207536Smav DEVMETHOD(device_probe, mvs_probe), 434207536Smav DEVMETHOD(device_attach, mvs_attach), 435207536Smav DEVMETHOD(device_detach, mvs_detach), 436207536Smav DEVMETHOD(device_suspend, mvs_suspend), 437207536Smav DEVMETHOD(device_resume, mvs_resume), 438207536Smav DEVMETHOD(bus_print_child, mvs_print_child), 439207536Smav DEVMETHOD(bus_alloc_resource, mvs_alloc_resource), 440207536Smav DEVMETHOD(bus_release_resource, mvs_release_resource), 441207536Smav DEVMETHOD(bus_setup_intr, mvs_setup_intr), 442207536Smav DEVMETHOD(bus_teardown_intr,mvs_teardown_intr), 443207536Smav DEVMETHOD(mvs_edma, mvs_edma), 444208410Smav DEVMETHOD(bus_child_location_str, mvs_child_location_str), 445207536Smav { 0, 0 } 446207536Smav}; 447207536Smavstatic driver_t mvs_driver = { 448220097Smav "mvs", 449207536Smav mvs_methods, 450207536Smav sizeof(struct mvs_controller) 451207536Smav}; 452220097SmavDRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0); 453220097SmavMODULE_VERSION(mvs, 1); 454220097SmavMODULE_DEPEND(mvs, cam, 1, 1, 1); 455