mvs_soc.c revision 207536
1207536Smav/*-
2207536Smav * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
3207536Smav * All rights reserved.
4207536Smav *
5207536Smav * Redistribution and use in source and binary forms, with or without
6207536Smav * modification, are permitted provided that the following conditions
7207536Smav * are met:
8207536Smav * 1. Redistributions of source code must retain the above copyright
9207536Smav *    notice, this list of conditions and the following disclaimer,
10207536Smav *    without modification, immediately at the beginning of the file.
11207536Smav * 2. Redistributions in binary form must reproduce the above copyright
12207536Smav *    notice, this list of conditions and the following disclaimer in the
13207536Smav *    documentation and/or other materials provided with the distribution.
14207536Smav *
15207536Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16207536Smav * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17207536Smav * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18207536Smav * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19207536Smav * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20207536Smav * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21207536Smav * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22207536Smav * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23207536Smav * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24207536Smav * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25207536Smav */
26207536Smav
27207536Smav#include <sys/cdefs.h>
28207536Smav__FBSDID("$FreeBSD: head/sys/dev/mvs/mvs_soc.c 207536 2010-05-02 19:28:30Z mav $");
29207536Smav
30207536Smav#include <sys/param.h>
31207536Smav#include <sys/module.h>
32207536Smav#include <sys/systm.h>
33207536Smav#include <sys/kernel.h>
34207536Smav#include <sys/bus.h>
35207536Smav#include <sys/endian.h>
36207536Smav#include <sys/malloc.h>
37207536Smav#include <sys/lock.h>
38207536Smav#include <sys/mutex.h>
39207536Smav#include <vm/uma.h>
40207536Smav#include <machine/stdarg.h>
41207536Smav#include <machine/resource.h>
42207536Smav#include <machine/bus.h>
43207536Smav#include <sys/rman.h>
44207536Smav#include <arm/mv/mvreg.h>
45207536Smav#include <arm/mv/mvvar.h>
46207536Smav#include "mvs.h"
47207536Smav
48207536Smav/* local prototypes */
49207536Smavstatic int mvs_setup_interrupt(device_t dev);
50207536Smavstatic void mvs_intr(void *data);
51207536Smavstatic int mvs_suspend(device_t dev);
52207536Smavstatic int mvs_resume(device_t dev);
53207536Smavstatic int mvs_ctlr_setup(device_t dev);
54207536Smav
55207536Smavstatic struct {
56207536Smav	uint32_t	id;
57207536Smav	uint8_t		rev;
58207536Smav	const char	*name;
59207536Smav	int		ports;
60207536Smav	int		quirks;
61207536Smav} mvs_ids[] = {
62207536Smav	{MV_DEV_88F5182, 0x00,   "Marvell 88F5182",	2, MVS_Q_GENIIE|MVS_Q_SOC},
63207536Smav	{MV_DEV_88F6281, 0x00,   "Marvell 88F6281",	2, MVS_Q_GENIIE|MVS_Q_SOC},
64207536Smav	{MV_DEV_MV78100, 0x00,   "Marvell MV78100",	2, MVS_Q_GENIIE|MVS_Q_SOC},
65207536Smav	{MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100",	2, MVS_Q_GENIIE|MVS_Q_SOC},
66207536Smav	{0,              0x00,   NULL,			0, 0}
67207536Smav};
68207536Smav
69207536Smavstatic int
70207536Smavmvs_probe(device_t dev)
71207536Smav{
72207536Smav	char buf[64];
73207536Smav	int i;
74207536Smav	uint32_t devid, revid;
75207536Smav
76207536Smav	soc_id(&devid, &revid);
77207536Smav	for (i = 0; mvs_ids[i].id != 0; i++) {
78207536Smav		if (mvs_ids[i].id == devid &&
79207536Smav		    mvs_ids[i].rev <= revid) {
80207536Smav			snprintf(buf, sizeof(buf), "%s SATA controller",
81207536Smav			    mvs_ids[i].name);
82207536Smav			device_set_desc_copy(dev, buf);
83207536Smav			return (BUS_PROBE_VENDOR);
84207536Smav		}
85207536Smav	}
86207536Smav	return (ENXIO);
87207536Smav}
88207536Smav
89207536Smavstatic int
90207536Smavmvs_attach(device_t dev)
91207536Smav{
92207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
93207536Smav	device_t child;
94207536Smav	int	error, unit, i;
95207536Smav	uint32_t devid, revid;
96207536Smav
97207536Smav	soc_id(&devid, &revid);
98207536Smav	ctlr->dev = dev;
99207536Smav	i = 0;
100207536Smav	while (mvs_ids[i].id != 0 &&
101207536Smav	    (mvs_ids[i].id != devid ||
102207536Smav	     mvs_ids[i].rev > revid))
103207536Smav		i++;
104207536Smav	ctlr->channels = mvs_ids[i].ports;
105207536Smav	ctlr->quirks = mvs_ids[i].quirks;
106207536Smav	resource_int_value(device_get_name(dev),
107207536Smav	    device_get_unit(dev), "ccc", &ctlr->ccc);
108207536Smav	ctlr->cccc = 8;
109207536Smav	resource_int_value(device_get_name(dev),
110207536Smav	    device_get_unit(dev), "cccc", &ctlr->cccc);
111207536Smav	if (ctlr->ccc == 0 || ctlr->cccc == 0) {
112207536Smav		ctlr->ccc = 0;
113207536Smav		ctlr->cccc = 0;
114207536Smav	}
115207536Smav	if (ctlr->ccc > 100000)
116207536Smav		ctlr->ccc = 100000;
117207536Smav	device_printf(dev,
118207536Smav	    "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
119207536Smav	    ((ctlr->quirks & MVS_Q_GENI) ? "I" :
120207536Smav	     ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
121207536Smav	    ctlr->channels,
122207536Smav	    ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
123207536Smav	    ((ctlr->quirks & MVS_Q_GENI) ?
124207536Smav	    "not supported" : "supported"),
125207536Smav	    ((ctlr->quirks & MVS_Q_GENIIE) ?
126207536Smav	    " with FBS" : ""));
127207536Smav	mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
128207536Smav	/* We should have a memory BAR(0). */
129207536Smav	ctlr->r_rid = 0;
130207536Smav	if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
131207536Smav	    &ctlr->r_rid, RF_ACTIVE)))
132207536Smav		return ENXIO;
133207536Smav	/* Setup our own memory management for channels. */
134207536Smav	ctlr->sc_iomem.rm_type = RMAN_ARRAY;
135207536Smav	ctlr->sc_iomem.rm_descr = "I/O memory addresses";
136207536Smav	if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
137207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
138207536Smav		return (error);
139207536Smav	}
140207536Smav	if ((error = rman_manage_region(&ctlr->sc_iomem,
141207536Smav	    rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
142207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
143207536Smav		rman_fini(&ctlr->sc_iomem);
144207536Smav		return (error);
145207536Smav	}
146207536Smav	mvs_ctlr_setup(dev);
147207536Smav	/* Setup interrupts. */
148207536Smav	if (mvs_setup_interrupt(dev)) {
149207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
150207536Smav		rman_fini(&ctlr->sc_iomem);
151207536Smav		return ENXIO;
152207536Smav	}
153207536Smav	/* Attach all channels on this controller */
154207536Smav	for (unit = 0; unit < ctlr->channels; unit++) {
155207536Smav		child = device_add_child(dev, "mvsch", -1);
156207536Smav		if (child == NULL)
157207536Smav			device_printf(dev, "failed to add channel device\n");
158207536Smav		else
159207536Smav			device_set_ivars(child, (void *)(intptr_t)unit);
160207536Smav	}
161207536Smav	bus_generic_attach(dev);
162207536Smav	return 0;
163207536Smav}
164207536Smav
165207536Smavstatic int
166207536Smavmvs_detach(device_t dev)
167207536Smav{
168207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
169207536Smav	device_t *children;
170207536Smav	int nchildren, i;
171207536Smav
172207536Smav	/* Detach & delete all children */
173207536Smav	if (!device_get_children(dev, &children, &nchildren)) {
174207536Smav		for (i = 0; i < nchildren; i++)
175207536Smav			device_delete_child(dev, children[i]);
176207536Smav		free(children, M_TEMP);
177207536Smav	}
178207536Smav	/* Free interrupt. */
179207536Smav	if (ctlr->irq.r_irq) {
180207536Smav		bus_teardown_intr(dev, ctlr->irq.r_irq,
181207536Smav		    ctlr->irq.handle);
182207536Smav		bus_release_resource(dev, SYS_RES_IRQ,
183207536Smav		    ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
184207536Smav	}
185207536Smav	/* Free memory. */
186207536Smav	rman_fini(&ctlr->sc_iomem);
187207536Smav	if (ctlr->r_mem)
188207536Smav		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
189207536Smav	mtx_destroy(&ctlr->mtx);
190207536Smav	return (0);
191207536Smav}
192207536Smav
193207536Smavstatic int
194207536Smavmvs_ctlr_setup(device_t dev)
195207536Smav{
196207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
197207536Smav	int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0;
198207536Smav
199207536Smav	/* Mask chip interrupts */
200207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
201207536Smav	/* Clear HC interrupts */
202207536Smav	ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000);
203207536Smav	/* Clear chip interrupts */
204207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0);
205207536Smav	/* Configure per-HC CCC */
206207536Smav	if (ccc && bootverbose) {
207207536Smav		device_printf(dev,
208207536Smav		    "CCC with %dus/%dcmd enabled\n",
209207536Smav		    ctlr->ccc, ctlr->cccc);
210207536Smav	}
211207536Smav	ccc *= 150;
212207536Smav	ATA_OUTL(ctlr->r_mem, HC_ICT, cccc);
213207536Smav	ATA_OUTL(ctlr->r_mem, HC_ITT, ccc);
214207536Smav	if (ccc)
215207536Smav		ccim |= IC_HC0_COAL_DONE;
216207536Smav	/* Enable chip interrupts */
217207536Smav	ctlr->gmim = (ccc ? IC_HC0_COAL_DONE : IC_DONE_HC0) | IC_ERR_HC0;
218207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
219207536Smav	return (0);
220207536Smav}
221207536Smav
222207536Smavstatic void
223207536Smavmvs_edma(device_t dev, device_t child, int mode)
224207536Smav{
225207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
226207536Smav	int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
227207536Smav	int bit = IC_DONE_IRQ << (unit * 2);
228207536Smav
229207536Smav	if (ctlr->ccc == 0)
230207536Smav		return;
231207536Smav	/* CCC is not working for non-EDMA mode. Unmask device interrupts. */
232207536Smav	mtx_lock(&ctlr->mtx);
233207536Smav	if (mode == MVS_EDMA_OFF)
234207536Smav		ctlr->pmim |= bit;
235207536Smav	else
236207536Smav		ctlr->pmim &= ~bit;
237207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
238207536Smav	mtx_unlock(&ctlr->mtx);
239207536Smav}
240207536Smav
241207536Smavstatic int
242207536Smavmvs_suspend(device_t dev)
243207536Smav{
244207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
245207536Smav
246207536Smav	bus_generic_suspend(dev);
247207536Smav	/* Mask chip interrupts */
248207536Smav	ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
249207536Smav	return 0;
250207536Smav}
251207536Smav
252207536Smavstatic int
253207536Smavmvs_resume(device_t dev)
254207536Smav{
255207536Smav
256207536Smav	mvs_ctlr_setup(dev);
257207536Smav	return (bus_generic_resume(dev));
258207536Smav}
259207536Smav
260207536Smavstatic int
261207536Smavmvs_setup_interrupt(device_t dev)
262207536Smav{
263207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
264207536Smav
265207536Smav	/* Allocate all IRQs. */
266207536Smav	ctlr->irq.r_irq_rid = 0;
267207536Smav	if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
268207536Smav	    &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
269207536Smav		device_printf(dev, "unable to map interrupt\n");
270207536Smav		return (ENXIO);
271207536Smav	}
272207536Smav	if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
273207536Smav	    mvs_intr, ctlr, &ctlr->irq.handle))) {
274207536Smav		device_printf(dev, "unable to setup interrupt\n");
275207536Smav		bus_release_resource(dev, SYS_RES_IRQ,
276207536Smav		    ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
277207536Smav		ctlr->irq.r_irq = 0;
278207536Smav		return (ENXIO);
279207536Smav	}
280207536Smav	return (0);
281207536Smav}
282207536Smav
283207536Smav/*
284207536Smav * Common case interrupt handler.
285207536Smav */
286207536Smavstatic void
287207536Smavmvs_intr(void *data)
288207536Smav{
289207536Smav	struct mvs_controller *ctlr = data;
290207536Smav	struct mvs_intr_arg arg;
291207536Smav	void (*function)(void *);
292207536Smav	int p;
293207536Smav	u_int32_t ic, aic;
294207536Smav
295207536Smav	ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC);
296207536Smav//device_printf(ctlr->dev, "irq MIC:%08x\n", ic);
297207536Smav	if ((ic & IC_HC0) == 0)
298207536Smav		return;
299207536Smav	/* Acknowledge interrupts of this HC. */
300207536Smav	aic = 0;
301207536Smav	if (ic & (IC_DONE_IRQ << 0))
302207536Smav		aic |= HC_IC_DONE(0) | HC_IC_DEV(0);
303207536Smav	if (ic & (IC_DONE_IRQ << 2))
304207536Smav		aic |= HC_IC_DONE(1) | HC_IC_DEV(1);
305207536Smav	if (ic & (IC_DONE_IRQ << 4))
306207536Smav		aic |= HC_IC_DONE(2) | HC_IC_DEV(2);
307207536Smav	if (ic & (IC_DONE_IRQ << 6))
308207536Smav		aic |= HC_IC_DONE(3) | HC_IC_DEV(3);
309207536Smav	if (ic & IC_HC0_COAL_DONE)
310207536Smav		aic |= HC_IC_COAL;
311207536Smav	ATA_OUTL(ctlr->r_mem, HC_IC, ~aic);
312207536Smav	/* Call per-port interrupt handler. */
313207536Smav	for (p = 0; p < ctlr->channels; p++) {
314207536Smav		arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
315207536Smav		if ((arg.cause != 0) &&
316207536Smav		    (function = ctlr->interrupt[p].function)) {
317207536Smav			arg.arg = ctlr->interrupt[p].argument;
318207536Smav			function(&arg);
319207536Smav		}
320207536Smav		ic >>= 2;
321207536Smav	}
322207536Smav}
323207536Smav
324207536Smavstatic struct resource *
325207536Smavmvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
326207536Smav		       u_long start, u_long end, u_long count, u_int flags)
327207536Smav{
328207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
329207536Smav	int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
330207536Smav	struct resource *res = NULL;
331207536Smav	int offset = PORT_BASE(unit & 0x03);
332207536Smav	long st;
333207536Smav
334207536Smav	switch (type) {
335207536Smav	case SYS_RES_MEMORY:
336207536Smav		st = rman_get_start(ctlr->r_mem);
337207536Smav		res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
338207536Smav		    st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
339207536Smav		if (res) {
340207536Smav			bus_space_handle_t bsh;
341207536Smav			bus_space_tag_t bst;
342207536Smav			bsh = rman_get_bushandle(ctlr->r_mem);
343207536Smav			bst = rman_get_bustag(ctlr->r_mem);
344207536Smav			bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
345207536Smav			rman_set_bushandle(res, bsh);
346207536Smav			rman_set_bustag(res, bst);
347207536Smav		}
348207536Smav		break;
349207536Smav	case SYS_RES_IRQ:
350207536Smav		if (*rid == ATA_IRQ_RID)
351207536Smav			res = ctlr->irq.r_irq;
352207536Smav		break;
353207536Smav	}
354207536Smav	return (res);
355207536Smav}
356207536Smav
357207536Smavstatic int
358207536Smavmvs_release_resource(device_t dev, device_t child, int type, int rid,
359207536Smav			 struct resource *r)
360207536Smav{
361207536Smav
362207536Smav	switch (type) {
363207536Smav	case SYS_RES_MEMORY:
364207536Smav		rman_release_resource(r);
365207536Smav		return (0);
366207536Smav	case SYS_RES_IRQ:
367207536Smav		if (rid != ATA_IRQ_RID)
368207536Smav			return ENOENT;
369207536Smav		return (0);
370207536Smav	}
371207536Smav	return (EINVAL);
372207536Smav}
373207536Smav
374207536Smavstatic int
375207536Smavmvs_setup_intr(device_t dev, device_t child, struct resource *irq,
376207536Smav		   int flags, driver_filter_t *filter, driver_intr_t *function,
377207536Smav		   void *argument, void **cookiep)
378207536Smav{
379207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
380207536Smav	int unit = (intptr_t)device_get_ivars(child);
381207536Smav
382207536Smav	if (filter != NULL) {
383207536Smav		printf("mvs.c: we cannot use a filter here\n");
384207536Smav		return (EINVAL);
385207536Smav	}
386207536Smav	ctlr->interrupt[unit].function = function;
387207536Smav	ctlr->interrupt[unit].argument = argument;
388207536Smav	return (0);
389207536Smav}
390207536Smav
391207536Smavstatic int
392207536Smavmvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
393207536Smav		      void *cookie)
394207536Smav{
395207536Smav	struct mvs_controller *ctlr = device_get_softc(dev);
396207536Smav	int unit = (intptr_t)device_get_ivars(child);
397207536Smav
398207536Smav	ctlr->interrupt[unit].function = NULL;
399207536Smav	ctlr->interrupt[unit].argument = NULL;
400207536Smav	return (0);
401207536Smav}
402207536Smav
403207536Smavstatic int
404207536Smavmvs_print_child(device_t dev, device_t child)
405207536Smav{
406207536Smav	int retval;
407207536Smav
408207536Smav	retval = bus_print_child_header(dev, child);
409207536Smav	retval += printf(" at channel %d",
410207536Smav	    (int)(intptr_t)device_get_ivars(child));
411207536Smav	retval += bus_print_child_footer(dev, child);
412207536Smav
413207536Smav	return (retval);
414207536Smav}
415207536Smav
416207536Smavstatic device_method_t mvs_methods[] = {
417207536Smav	DEVMETHOD(device_probe,     mvs_probe),
418207536Smav	DEVMETHOD(device_attach,    mvs_attach),
419207536Smav	DEVMETHOD(device_detach,    mvs_detach),
420207536Smav	DEVMETHOD(device_suspend,   mvs_suspend),
421207536Smav	DEVMETHOD(device_resume,    mvs_resume),
422207536Smav	DEVMETHOD(bus_print_child,  mvs_print_child),
423207536Smav	DEVMETHOD(bus_alloc_resource,       mvs_alloc_resource),
424207536Smav	DEVMETHOD(bus_release_resource,     mvs_release_resource),
425207536Smav	DEVMETHOD(bus_setup_intr,   mvs_setup_intr),
426207536Smav	DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
427207536Smav	DEVMETHOD(mvs_edma,         mvs_edma),
428207536Smav	{ 0, 0 }
429207536Smav};
430207536Smavstatic driver_t mvs_driver = {
431207536Smav        "sata",
432207536Smav        mvs_methods,
433207536Smav        sizeof(struct mvs_controller)
434207536Smav};
435207536SmavDRIVER_MODULE(sata, mbus, mvs_driver, mvs_devclass, 0, 0);
436207536SmavMODULE_VERSION(sata, 1);
437207536Smav
438