1318427Sslm/*- 2318427Sslm * Copyright (c) 2012-2015 LSI Corp. 3318427Sslm * Copyright (c) 2013-2016 Avago Technologies 4318427Sslm * All rights reserved. 5318427Sslm * 6318427Sslm * Redistribution and use in source and binary forms, with or without 7318427Sslm * modification, are permitted provided that the following conditions 8318427Sslm * are met: 9318427Sslm * 1. Redistributions of source code must retain the above copyright 10318427Sslm * notice, this list of conditions and the following disclaimer. 11318427Sslm * 2. Redistributions in binary form must reproduce the above copyright 12318427Sslm * notice, this list of conditions and the following disclaimer in the 13318427Sslm * documentation and/or other materials provided with the distribution. 14318427Sslm * 3. Neither the name of the author nor the names of any co-contributors 15318427Sslm * may be used to endorse or promote products derived from this software 16318427Sslm * without specific prior written permission. 17318427Sslm * 18318427Sslm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19318427Sslm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20318427Sslm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21318427Sslm * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22318427Sslm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23318427Sslm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24318427Sslm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25318427Sslm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26318427Sslm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27318427Sslm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28318427Sslm * SUCH DAMAGE. 29318427Sslm * 30318427Sslm * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31318427Sslm * 32318427Sslm * $FreeBSD: stable/11/sys/dev/mpr/mpi/mpi2_pci.h 319435 2017-06-01 15:39:09Z slm $ 33318427Sslm */ 34318427Sslm 35318427Sslm/* 36318427Sslm * Copyright (c) 2000-2015 LSI Corporation. 37318427Sslm * Copyright (c) 2013-2016 Avago Technologies 38318427Sslm * All rights reserved. 39318427Sslm * 40318427Sslm * 41318427Sslm * Name: mpi2_pci.h 42318427Sslm * Title: MPI PCIe Attached Devices structures and definitions. 43318427Sslm * Creation Date: October 9, 2012 44318427Sslm * 45318427Sslm * mpi2_pci.h Version: 02.00.02 46318427Sslm * 47318427Sslm * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 48318427Sslm * prefix are for use only on MPI v2.5 products, and must not be used 49318427Sslm * with MPI v2.0 products. Unless otherwise noted, names beginning with 50318427Sslm * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 51318427Sslm * 52318427Sslm * Version History 53318427Sslm * --------------- 54318427Sslm * 55318427Sslm * Date Version Description 56318427Sslm * -------- -------- ------------------------------------------------------ 57318427Sslm * 03-16-15 02.00.00 Initial version. 58318427Sslm * 02-17-16 02.00.01 Removed AHCI support. 59318427Sslm * Removed SOP support. 60318427Sslm * 07-01-16 02.00.02 Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to 61318427Sslm * NVME Encapsulated Request. 62318427Sslm * -------------------------------------------------------------------------- 63318427Sslm */ 64318427Sslm 65318427Sslm#ifndef MPI2_PCI_H 66318427Sslm#define MPI2_PCI_H 67318427Sslm 68318427Sslm 69318427Sslm/* 70318427Sslm * Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event 71318427Sslm * data and PCIe Configuration pages. 72318427Sslm */ 73318427Sslm#define MPI26_PCIE_DEVINFO_DIRECT_ATTACH (0x00000010) 74318427Sslm 75318427Sslm#define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE (0x0000000F) 76318427Sslm#define MPI26_PCIE_DEVINFO_NO_DEVICE (0x00000000) 77318427Sslm#define MPI26_PCIE_DEVINFO_PCI_SWITCH (0x00000001) 78318427Sslm#define MPI26_PCIE_DEVINFO_NVME (0x00000003) 79318427Sslm 80318427Sslm 81318427Sslm/**************************************************************************** 82318427Sslm* NVMe Encapsulated message 83318427Sslm****************************************************************************/ 84318427Sslm 85318427Sslm/* NVME Encapsulated Request Message */ 86318427Sslmtypedef struct _MPI26_NVME_ENCAPSULATED_REQUEST 87318427Sslm{ 88318427Sslm U16 DevHandle; /* 0x00 */ 89318427Sslm U8 ChainOffset; /* 0x02 */ 90318427Sslm U8 Function; /* 0x03 */ 91318427Sslm U16 EncapsulatedCommandLength; /* 0x04 */ 92318427Sslm U8 Reserved1; /* 0x06 */ 93318427Sslm U8 MsgFlags; /* 0x07 */ 94318427Sslm U8 VP_ID; /* 0x08 */ 95318427Sslm U8 VF_ID; /* 0x09 */ 96318427Sslm U16 Reserved2; /* 0x0A */ 97318427Sslm U32 Reserved3; /* 0x0C */ 98318427Sslm U64 ErrorResponseBaseAddress; /* 0x10 */ 99318427Sslm U16 ErrorResponseAllocationLength; /* 0x18 */ 100318427Sslm U16 Flags; /* 0x1A */ 101318427Sslm U32 DataLength; /* 0x1C */ 102318427Sslm U8 NVMe_Command[4]; /* 0x20 */ /* variable length */ 103318427Sslm 104318427Sslm} MPI26_NVME_ENCAPSULATED_REQUEST, MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_REQUEST, 105318427Sslm Mpi26NVMeEncapsulatedRequest_t, MPI2_POINTER pMpi26NVMeEncapsulatedRequest_t; 106318427Sslm 107318427Sslm/* defines for the Flags field */ 108318427Sslm#define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP (0x0020) 109318427Sslm/* Submission Queue Type*/ 110318427Sslm#define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK (0x0010) 111318427Sslm#define MPI26_NVME_FLAGS_SUBMISSIONQ_IO (0x0000) 112318427Sslm#define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0010) 113318427Sslm/* Error Response Address Space */ 114318427Sslm#define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR (0x000C) 115318427Sslm#define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR (0x0000) 116318427Sslm#define MPI26_NVME_FLAGS_IOCPLB_RSP_ADDR (0x0008) 117318427Sslm#define MPI26_NVME_FLAGS_IOCPLBNTA_RSP_ADDR (0x000C) 118318427Sslm/* Data Direction*/ 119318427Sslm#define MPI26_NVME_FLAGS_DATADIRECTION_MASK (0x0003) 120318427Sslm#define MPI26_NVME_FLAGS_NODATATRANSFER (0x0000) 121318427Sslm#define MPI26_NVME_FLAGS_WRITE (0x0001) 122318427Sslm#define MPI26_NVME_FLAGS_READ (0x0002) 123318427Sslm#define MPI26_NVME_FLAGS_BIDIRECTIONAL (0x0003) 124318427Sslm 125318427Sslm 126318427Sslm/* NVMe Encapuslated Reply Message */ 127318427Sslmtypedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY 128318427Sslm{ 129318427Sslm U16 DevHandle; /* 0x00 */ 130318427Sslm U8 MsgLength; /* 0x02 */ 131318427Sslm U8 Function; /* 0x03 */ 132318427Sslm U16 EncapsulatedCommandLength; /* 0x04 */ 133318427Sslm U8 Reserved1; /* 0x06 */ 134318427Sslm U8 MsgFlags; /* 0x07 */ 135318427Sslm U8 VP_ID; /* 0x08 */ 136318427Sslm U8 VF_ID; /* 0x09 */ 137318427Sslm U16 Reserved2; /* 0x0A */ 138318427Sslm U16 Reserved3; /* 0x0C */ 139318427Sslm U16 IOCStatus; /* 0x0E */ 140318427Sslm U32 IOCLogInfo; /* 0x10 */ 141318427Sslm U16 ErrorResponseCount; /* 0x14 */ 142318427Sslm U16 Reserved4; /* 0x16 */ 143318427Sslm} MPI26_NVME_ENCAPSULATED_ERROR_REPLY, 144318427Sslm MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY, 145318427Sslm Mpi26NVMeEncapsulatedErrorReply_t, 146318427Sslm MPI2_POINTER pMpi26NVMeEncapsulatedErrorReply_t; 147318427Sslm 148318427Sslm 149318427Sslm#endif 150318427Sslm 151318427Sslm 152