1/*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * Portions of this software may have been developed with reference to 27 * the SD Simplified Specification. The following disclaimer may apply: 28 * 29 * The following conditions apply to the release of the simplified 30 * specification ("Simplified Specification") by the SD Card Association and 31 * the SD Group. The Simplified Specification is a subset of the complete SD 32 * Specification which is owned by the SD Card Association and the SD 33 * Group. This Simplified Specification is provided on a non-confidential 34 * basis subject to the disclaimers below. Any implementation of the 35 * Simplified Specification may require a license from the SD Card 36 * Association, SD Group, SD-3C LLC or other third parties. 37 * 38 * Disclaimers: 39 * 40 * The information contained in the Simplified Specification is presented only 41 * as a standard specification for SD Cards and SD Host/Ancillary products and 42 * is provided "AS-IS" without any representations or warranties of any 43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44 * Card Association for any damages, any infringements of patents or other 45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46 * parties, which may result from its use. No license is granted by 47 * implication, estoppel or otherwise under any patent or other rights of the 48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50 * or the SD Card Association to disclose or distribute any technical 51 * information, know-how or other confidential information to any third party. 52 */ 53 54#include <sys/cdefs.h> 55__FBSDID("$FreeBSD: stable/11/sys/dev/mmc/mmc.c 340740 2018-11-21 18:53:30Z marius $"); 56 57#include <sys/param.h> 58#include <sys/systm.h> 59#include <sys/kernel.h> 60#include <sys/malloc.h> 61#include <sys/lock.h> 62#include <sys/module.h> 63#include <sys/mutex.h> 64#include <sys/bus.h> 65#include <sys/endian.h> 66#include <sys/sysctl.h> 67#include <sys/time.h> 68 69#include <dev/mmc/bridge.h> 70#include <dev/mmc/mmc_private.h> 71#include <dev/mmc/mmc_subr.h> 72#include <dev/mmc/mmcreg.h> 73#include <dev/mmc/mmcbrvar.h> 74#include <dev/mmc/mmcvar.h> 75 76#include "mmcbr_if.h" 77#include "mmcbus_if.h" 78 79CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 80 81/* 82 * Per-card data 83 */ 84struct mmc_ivars { 85 uint32_t raw_cid[4]; /* Raw bits of the CID */ 86 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 87 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 88 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 89 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 90 uint16_t rca; 91 u_char read_only; /* True when the device is read-only */ 92 u_char high_cap; /* High Capacity device (block addressed) */ 93 enum mmc_card_mode mode; 94 enum mmc_bus_width bus_width; /* Bus width to use */ 95 struct mmc_cid cid; /* cid decoded */ 96 struct mmc_csd csd; /* csd decoded */ 97 struct mmc_scr scr; /* scr decoded */ 98 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 99 uint32_t sec_count; /* Card capacity in 512byte blocks */ 100 uint32_t timings; /* Mask of bus timings supported */ 101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 103 uint32_t tran_speed; /* Max speed in normal mode */ 104 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 105 uint32_t erase_sector; /* Card native erase sector size */ 106 uint32_t cmd6_time; /* Generic switch timeout [us] */ 107 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */ 108 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 109 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 110}; 111 112#define CMD_RETRIES 3 113 114static const struct mmc_quirk mmc_quirks[] = { 115 /* 116 * For some SanDisk iNAND devices, the CMD38 argument needs to be 117 * provided in EXT_CSD[113]. 118 */ 119 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 }, 120 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 }, 121 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 }, 122 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 }, 123 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 }, 124 125 /* 126 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to 127 * unrecoverable data corruption. 128 */ 129 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM }, 130 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM }, 131 132 { 0x0, 0x0, NULL, 0x0 } 133}; 134 135static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver"); 136 137static int mmc_debug; 138SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, 139 "Debug level"); 140 141/* bus entry points */ 142static int mmc_acquire_bus(device_t busdev, device_t dev); 143static int mmc_attach(device_t dev); 144static int mmc_child_location_str(device_t dev, device_t child, char *buf, 145 size_t buflen); 146static int mmc_detach(device_t dev); 147static int mmc_probe(device_t dev); 148static int mmc_read_ivar(device_t bus, device_t child, int which, 149 uintptr_t *result); 150static int mmc_release_bus(device_t busdev, device_t dev); 151static int mmc_resume(device_t dev); 152static void mmc_retune_pause(device_t busdev, device_t dev, bool retune); 153static void mmc_retune_unpause(device_t busdev, device_t dev); 154static int mmc_suspend(device_t dev); 155static int mmc_wait_for_request(device_t busdev, device_t dev, 156 struct mmc_request *req); 157static int mmc_write_ivar(device_t bus, device_t child, int which, 158 uintptr_t value); 159 160#define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 161#define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 162#define MMC_LOCK_INIT(_sc) \ 163 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \ 164 "mmc", MTX_DEF) 165#define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 166#define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED); 167#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED); 168 169static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 170static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 171static void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 172 struct mmc_sd_status *sd_status); 173static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 174 uint32_t *rawsdstatus); 175static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 176 uint32_t *rawscr); 177static int mmc_calculate_clock(struct mmc_softc *sc); 178static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 179 bool is_4_41p); 180static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 181static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 182static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 183static void mmc_delayed_attach(void *xsc); 184static int mmc_delete_cards(struct mmc_softc *sc, bool final); 185static void mmc_discover_cards(struct mmc_softc *sc); 186static void mmc_format_card_id_string(struct mmc_ivars *ivar); 187static void mmc_go_discovery(struct mmc_softc *sc); 188static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 189 int size); 190static int mmc_highest_voltage(uint32_t ocr); 191static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing); 192static void mmc_idle_cards(struct mmc_softc *sc); 193static void mmc_ms_delay(int ms); 194static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 195static void mmc_power_down(struct mmc_softc *sc); 196static void mmc_power_up(struct mmc_softc *sc); 197static void mmc_rescan_cards(struct mmc_softc *sc); 198static int mmc_retune(device_t busdev, device_t dev, bool reset); 199static void mmc_scan(struct mmc_softc *sc); 200static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 201 uint8_t value, uint8_t *res); 202static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 203static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 204static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 205 uint32_t *rocr); 206static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 207static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 208static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 209 uint32_t *rocr); 210static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 211static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 212static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 213 enum mmc_bus_timing timing); 214static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 215static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 216static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 217 enum mmc_bus_timing timing); 218static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 219 enum mmc_bus_timing timing); 220static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 221 uint32_t clock); 222static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 223 uint32_t max_dtr, enum mmc_bus_timing max_timing); 224static int mmc_test_bus_width(struct mmc_softc *sc); 225static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 226 enum mmc_bus_timing timing); 227static const char *mmc_timing_to_string(enum mmc_bus_timing timing); 228static void mmc_update_child_list(struct mmc_softc *sc); 229static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 230 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 231static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 232static void mmc_wakeup(struct mmc_request *req); 233 234static void 235mmc_ms_delay(int ms) 236{ 237 238 DELAY(1000 * ms); /* XXX BAD */ 239} 240 241static int 242mmc_probe(device_t dev) 243{ 244 245 device_set_desc(dev, "MMC/SD bus"); 246 return (0); 247} 248 249static int 250mmc_attach(device_t dev) 251{ 252 struct mmc_softc *sc; 253 254 sc = device_get_softc(dev); 255 sc->dev = dev; 256 MMC_LOCK_INIT(sc); 257 258 /* We'll probe and attach our children later, but before / mount */ 259 sc->config_intrhook.ich_func = mmc_delayed_attach; 260 sc->config_intrhook.ich_arg = sc; 261 if (config_intrhook_establish(&sc->config_intrhook) != 0) 262 device_printf(dev, "config_intrhook_establish failed\n"); 263 return (0); 264} 265 266static int 267mmc_detach(device_t dev) 268{ 269 struct mmc_softc *sc = device_get_softc(dev); 270 int err; 271 272 err = mmc_delete_cards(sc, true); 273 if (err != 0) 274 return (err); 275 mmc_power_down(sc); 276 MMC_LOCK_DESTROY(sc); 277 278 return (0); 279} 280 281static int 282mmc_suspend(device_t dev) 283{ 284 struct mmc_softc *sc = device_get_softc(dev); 285 int err; 286 287 err = bus_generic_suspend(dev); 288 if (err != 0) 289 return (err); 290 /* 291 * We power down with the bus acquired here, mainly so that no device 292 * is selected any longer and sc->last_rca gets set to 0. Otherwise, 293 * the deselect as part of the bus acquisition in mmc_scan() may fail 294 * during resume, as the bus isn't powered up again before later in 295 * mmc_go_discovery(). 296 */ 297 err = mmc_acquire_bus(dev, dev); 298 if (err != 0) 299 return (err); 300 mmc_power_down(sc); 301 err = mmc_release_bus(dev, dev); 302 return (err); 303} 304 305static int 306mmc_resume(device_t dev) 307{ 308 struct mmc_softc *sc = device_get_softc(dev); 309 310 mmc_scan(sc); 311 return (bus_generic_resume(dev)); 312} 313 314static int 315mmc_acquire_bus(device_t busdev, device_t dev) 316{ 317 struct mmc_softc *sc; 318 struct mmc_ivars *ivar; 319 int err; 320 uint16_t rca; 321 enum mmc_bus_timing timing; 322 323 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 324 if (err) 325 return (err); 326 sc = device_get_softc(busdev); 327 MMC_LOCK(sc); 328 if (sc->owner) 329 panic("mmc: host bridge didn't serialize us."); 330 sc->owner = dev; 331 MMC_UNLOCK(sc); 332 333 if (busdev != dev) { 334 /* 335 * Keep track of the last rca that we've selected. If 336 * we're asked to do it again, don't. We never 337 * unselect unless the bus code itself wants the mmc 338 * bus, and constantly reselecting causes problems. 339 */ 340 ivar = device_get_ivars(dev); 341 rca = ivar->rca; 342 if (sc->last_rca != rca) { 343 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 344 device_printf(busdev, "Card at relative " 345 "address %d failed to select\n", rca); 346 return (ENXIO); 347 } 348 sc->last_rca = rca; 349 timing = mmcbr_get_timing(busdev); 350 /* 351 * For eMMC modes, setting/updating bus width and VCCQ 352 * only really is necessary if there actually is more 353 * than one device on the bus as generally that already 354 * had to be done by mmc_calculate_clock() or one of 355 * its calees. Moreover, setting the bus width anew 356 * can trigger re-tuning (via a CRC error on the next 357 * CMD), even if not switching between devices an the 358 * previously selected one is still tuned. Obviously, 359 * we need to re-tune the host controller if devices 360 * are actually switched, though. 361 */ 362 if (timing >= bus_timing_mmc_ddr52 && 363 sc->child_count == 1) 364 return (0); 365 /* Prepare bus width for the new card. */ 366 if (bootverbose || mmc_debug) { 367 device_printf(busdev, 368 "setting bus width to %d bits %s timing\n", 369 (ivar->bus_width == bus_width_4) ? 4 : 370 (ivar->bus_width == bus_width_8) ? 8 : 1, 371 mmc_timing_to_string(timing)); 372 } 373 if (mmc_set_card_bus_width(sc, ivar, timing) != 374 MMC_ERR_NONE) { 375 device_printf(busdev, "Card at relative " 376 "address %d failed to set bus width\n", 377 rca); 378 return (ENXIO); 379 } 380 mmcbr_set_bus_width(busdev, ivar->bus_width); 381 mmcbr_update_ios(busdev); 382 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 383 device_printf(busdev, "Failed to set VCCQ " 384 "for card at relative address %d\n", rca); 385 return (ENXIO); 386 } 387 if (timing >= bus_timing_mmc_hs200 && 388 mmc_retune(busdev, dev, true) != 0) { 389 device_printf(busdev, "Card at relative " 390 "address %d failed to re-tune\n", rca); 391 return (ENXIO); 392 } 393 } 394 } else { 395 /* 396 * If there's a card selected, stand down. 397 */ 398 if (sc->last_rca != 0) { 399 if (mmc_select_card(sc, 0) != MMC_ERR_NONE) 400 return (ENXIO); 401 sc->last_rca = 0; 402 } 403 } 404 405 return (0); 406} 407 408static int 409mmc_release_bus(device_t busdev, device_t dev) 410{ 411 struct mmc_softc *sc; 412 int err; 413 414 sc = device_get_softc(busdev); 415 416 MMC_LOCK(sc); 417 if (!sc->owner) 418 panic("mmc: releasing unowned bus."); 419 if (sc->owner != dev) 420 panic("mmc: you don't own the bus. game over."); 421 MMC_UNLOCK(sc); 422 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 423 if (err) 424 return (err); 425 MMC_LOCK(sc); 426 sc->owner = NULL; 427 MMC_UNLOCK(sc); 428 return (0); 429} 430 431static uint32_t 432mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 433{ 434 435 return (ocr & MMC_OCR_VOLTAGE); 436} 437 438static int 439mmc_highest_voltage(uint32_t ocr) 440{ 441 int i; 442 443 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 444 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 445 if (ocr & (1 << i)) 446 return (i); 447 return (-1); 448} 449 450static void 451mmc_wakeup(struct mmc_request *req) 452{ 453 struct mmc_softc *sc; 454 455 sc = (struct mmc_softc *)req->done_data; 456 MMC_LOCK(sc); 457 req->flags |= MMC_REQ_DONE; 458 MMC_UNLOCK(sc); 459 wakeup(req); 460} 461 462static int 463mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 464{ 465 466 req->done = mmc_wakeup; 467 req->done_data = sc; 468 if (__predict_false(mmc_debug > 1)) { 469 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 470 req->cmd->opcode, req->cmd->arg, req->cmd->flags); 471 if (req->cmd->data) { 472 printf(" data %d\n", (int)req->cmd->data->len); 473 } else 474 printf("\n"); 475 } 476 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 477 MMC_LOCK(sc); 478 while ((req->flags & MMC_REQ_DONE) == 0) 479 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 480 MMC_UNLOCK(sc); 481 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 && 482 req->cmd->error != MMC_ERR_NONE))) 483 device_printf(sc->dev, "CMD%d RESULT: %d\n", 484 req->cmd->opcode, req->cmd->error); 485 return (0); 486} 487 488static int 489mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req) 490{ 491 struct mmc_softc *sc; 492 struct mmc_ivars *ivar; 493 int err, i; 494 enum mmc_retune_req retune_req; 495 496 sc = device_get_softc(busdev); 497 KASSERT(sc->owner != NULL, 498 ("%s: Request from %s without bus being acquired.", __func__, 499 device_get_nameunit(dev))); 500 501 /* 502 * Unless no device is selected or re-tuning is already ongoing, 503 * execute re-tuning if a) the bridge is requesting to do so and 504 * re-tuning hasn't been otherwise paused, or b) if a child asked 505 * to be re-tuned prior to pausing (see also mmc_retune_pause()). 506 */ 507 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 && 508 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none && 509 sc->retune_paused == 0) || sc->retune_needed == 1))) { 510 if (__predict_false(mmc_debug > 1)) { 511 device_printf(busdev, 512 "Re-tuning with%s circuit reset required\n", 513 retune_req == retune_req_reset ? "" : "out"); 514 } 515 if (device_get_parent(dev) == busdev) 516 ivar = device_get_ivars(dev); 517 else { 518 for (i = 0; i < sc->child_count; i++) { 519 ivar = device_get_ivars(sc->child_list[i]); 520 if (ivar->rca == sc->last_rca) 521 break; 522 } 523 if (ivar->rca != sc->last_rca) 524 return (EINVAL); 525 } 526 sc->retune_ongoing = 1; 527 err = mmc_retune(busdev, dev, retune_req == retune_req_reset); 528 sc->retune_ongoing = 0; 529 switch (err) { 530 case MMC_ERR_NONE: 531 case MMC_ERR_FAILED: /* Re-tune error but still might work */ 532 break; 533 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */ 534 return (ENXIO); 535 case MMC_ERR_INVALID: /* Driver implementation b0rken */ 536 default: /* Unknown error, should not happen */ 537 return (EINVAL); 538 } 539 sc->retune_needed = 0; 540 } 541 return (mmc_wait_for_req(sc, req)); 542} 543 544static int 545mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 546 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 547{ 548 struct mmc_command cmd; 549 int err; 550 551 memset(&cmd, 0, sizeof(cmd)); 552 cmd.opcode = opcode; 553 cmd.arg = arg; 554 cmd.flags = flags; 555 cmd.data = NULL; 556 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 557 if (err) 558 return (err); 559 if (resp) { 560 if (flags & MMC_RSP_136) 561 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 562 else 563 *resp = cmd.resp[0]; 564 } 565 return (0); 566} 567 568static void 569mmc_idle_cards(struct mmc_softc *sc) 570{ 571 device_t dev; 572 struct mmc_command cmd; 573 574 dev = sc->dev; 575 mmcbr_set_chip_select(dev, cs_high); 576 mmcbr_update_ios(dev); 577 mmc_ms_delay(1); 578 579 memset(&cmd, 0, sizeof(cmd)); 580 cmd.opcode = MMC_GO_IDLE_STATE; 581 cmd.arg = 0; 582 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 583 cmd.data = NULL; 584 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 585 mmc_ms_delay(1); 586 587 mmcbr_set_chip_select(dev, cs_dontcare); 588 mmcbr_update_ios(dev); 589 mmc_ms_delay(1); 590} 591 592static int 593mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 594{ 595 struct mmc_command cmd; 596 int err = MMC_ERR_NONE, i; 597 598 memset(&cmd, 0, sizeof(cmd)); 599 cmd.opcode = ACMD_SD_SEND_OP_COND; 600 cmd.arg = ocr; 601 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 602 cmd.data = NULL; 603 604 for (i = 0; i < 1000; i++) { 605 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 606 CMD_RETRIES); 607 if (err != MMC_ERR_NONE) 608 break; 609 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 610 (ocr & MMC_OCR_VOLTAGE) == 0) 611 break; 612 err = MMC_ERR_TIMEOUT; 613 mmc_ms_delay(10); 614 } 615 if (rocr && err == MMC_ERR_NONE) 616 *rocr = cmd.resp[0]; 617 return (err); 618} 619 620static int 621mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 622{ 623 struct mmc_command cmd; 624 int err = MMC_ERR_NONE, i; 625 626 memset(&cmd, 0, sizeof(cmd)); 627 cmd.opcode = MMC_SEND_OP_COND; 628 cmd.arg = ocr; 629 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 630 cmd.data = NULL; 631 632 for (i = 0; i < 1000; i++) { 633 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 634 if (err != MMC_ERR_NONE) 635 break; 636 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 637 (ocr & MMC_OCR_VOLTAGE) == 0) 638 break; 639 err = MMC_ERR_TIMEOUT; 640 mmc_ms_delay(10); 641 } 642 if (rocr && err == MMC_ERR_NONE) 643 *rocr = cmd.resp[0]; 644 return (err); 645} 646 647static int 648mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 649{ 650 struct mmc_command cmd; 651 int err; 652 653 memset(&cmd, 0, sizeof(cmd)); 654 cmd.opcode = SD_SEND_IF_COND; 655 cmd.arg = (vhs << 8) + 0xAA; 656 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 657 cmd.data = NULL; 658 659 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 660 return (err); 661} 662 663static void 664mmc_power_up(struct mmc_softc *sc) 665{ 666 device_t dev; 667 enum mmc_vccq vccq; 668 669 dev = sc->dev; 670 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 671 mmcbr_set_bus_mode(dev, opendrain); 672 mmcbr_set_chip_select(dev, cs_dontcare); 673 mmcbr_set_bus_width(dev, bus_width_1); 674 mmcbr_set_power_mode(dev, power_up); 675 mmcbr_set_clock(dev, 0); 676 mmcbr_update_ios(dev); 677 for (vccq = vccq_330; ; vccq--) { 678 mmcbr_set_vccq(dev, vccq); 679 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 680 break; 681 } 682 mmc_ms_delay(1); 683 684 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 685 mmcbr_set_timing(dev, bus_timing_normal); 686 mmcbr_set_power_mode(dev, power_on); 687 mmcbr_update_ios(dev); 688 mmc_ms_delay(2); 689} 690 691static void 692mmc_power_down(struct mmc_softc *sc) 693{ 694 device_t dev = sc->dev; 695 696 mmcbr_set_bus_mode(dev, opendrain); 697 mmcbr_set_chip_select(dev, cs_dontcare); 698 mmcbr_set_bus_width(dev, bus_width_1); 699 mmcbr_set_power_mode(dev, power_off); 700 mmcbr_set_clock(dev, 0); 701 mmcbr_set_timing(dev, bus_timing_normal); 702 mmcbr_update_ios(dev); 703} 704 705static int 706mmc_select_card(struct mmc_softc *sc, uint16_t rca) 707{ 708 int err, flags; 709 710 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 711 sc->retune_paused++; 712 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 713 flags, NULL, CMD_RETRIES); 714 sc->retune_paused--; 715 return (err); 716} 717 718static int 719mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 720 uint8_t *res) 721{ 722 int err; 723 struct mmc_command cmd; 724 struct mmc_data data; 725 726 memset(&cmd, 0, sizeof(cmd)); 727 memset(&data, 0, sizeof(data)); 728 memset(res, 0, 64); 729 730 cmd.opcode = SD_SWITCH_FUNC; 731 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 732 cmd.arg = mode << 31; /* 0 - check, 1 - set */ 733 cmd.arg |= 0x00FFFFFF; 734 cmd.arg &= ~(0xF << (grp * 4)); 735 cmd.arg |= value << (grp * 4); 736 cmd.data = &data; 737 738 data.data = res; 739 data.len = 64; 740 data.flags = MMC_DATA_READ; 741 742 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 743 return (err); 744} 745 746static int 747mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 748 enum mmc_bus_timing timing) 749{ 750 struct mmc_command cmd; 751 int err; 752 uint8_t value; 753 754 if (mmcbr_get_mode(sc->dev) == mode_sd) { 755 memset(&cmd, 0, sizeof(cmd)); 756 cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 757 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 758 cmd.arg = SD_CLR_CARD_DETECT; 759 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 760 CMD_RETRIES); 761 if (err != 0) 762 return (err); 763 memset(&cmd, 0, sizeof(cmd)); 764 cmd.opcode = ACMD_SET_BUS_WIDTH; 765 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 766 switch (ivar->bus_width) { 767 case bus_width_1: 768 cmd.arg = SD_BUS_WIDTH_1; 769 break; 770 case bus_width_4: 771 cmd.arg = SD_BUS_WIDTH_4; 772 break; 773 default: 774 return (MMC_ERR_INVALID); 775 } 776 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 777 CMD_RETRIES); 778 } else { 779 switch (ivar->bus_width) { 780 case bus_width_1: 781 if (timing == bus_timing_mmc_hs400 || 782 timing == bus_timing_mmc_hs400es) 783 return (MMC_ERR_INVALID); 784 value = EXT_CSD_BUS_WIDTH_1; 785 break; 786 case bus_width_4: 787 switch (timing) { 788 case bus_timing_mmc_ddr52: 789 value = EXT_CSD_BUS_WIDTH_4_DDR; 790 break; 791 case bus_timing_mmc_hs400: 792 case bus_timing_mmc_hs400es: 793 return (MMC_ERR_INVALID); 794 default: 795 value = EXT_CSD_BUS_WIDTH_4; 796 break; 797 } 798 break; 799 case bus_width_8: 800 value = 0; 801 switch (timing) { 802 case bus_timing_mmc_hs400es: 803 value = EXT_CSD_BUS_WIDTH_ES; 804 /* FALLTHROUGH */ 805 case bus_timing_mmc_ddr52: 806 case bus_timing_mmc_hs400: 807 value |= EXT_CSD_BUS_WIDTH_8_DDR; 808 break; 809 default: 810 value = EXT_CSD_BUS_WIDTH_8; 811 break; 812 } 813 break; 814 default: 815 return (MMC_ERR_INVALID); 816 } 817 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 818 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 819 ivar->cmd6_time, true); 820 } 821 return (err); 822} 823 824static int 825mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 826{ 827 device_t dev; 828 const uint8_t *ext_csd; 829 uint32_t clock; 830 uint8_t value; 831 enum mmc_bus_timing timing; 832 enum mmc_bus_width bus_width; 833 834 dev = sc->dev; 835 timing = mmcbr_get_timing(dev); 836 bus_width = ivar->bus_width; 837 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 || 838 timing == bus_timing_normal || bus_width == bus_width_1) 839 return (MMC_ERR_NONE); 840 841 value = 0; 842 ext_csd = ivar->raw_ext_csd; 843 clock = mmcbr_get_clock(dev); 844 switch (1 << mmcbr_get_vdd(dev)) { 845 case MMC_OCR_LOW_VOLTAGE: 846 if (clock <= MMC_TYPE_HS_26_MAX) 847 value = ext_csd[EXT_CSD_PWR_CL_26_195]; 848 else if (clock <= MMC_TYPE_HS_52_MAX) { 849 if (timing >= bus_timing_mmc_ddr52 && 850 bus_width >= bus_width_4) 851 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 852 else 853 value = ext_csd[EXT_CSD_PWR_CL_52_195]; 854 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) 855 value = ext_csd[EXT_CSD_PWR_CL_200_195]; 856 break; 857 case MMC_OCR_270_280: 858 case MMC_OCR_280_290: 859 case MMC_OCR_290_300: 860 case MMC_OCR_300_310: 861 case MMC_OCR_310_320: 862 case MMC_OCR_320_330: 863 case MMC_OCR_330_340: 864 case MMC_OCR_340_350: 865 case MMC_OCR_350_360: 866 if (clock <= MMC_TYPE_HS_26_MAX) 867 value = ext_csd[EXT_CSD_PWR_CL_26_360]; 868 else if (clock <= MMC_TYPE_HS_52_MAX) { 869 if (timing == bus_timing_mmc_ddr52 && 870 bus_width >= bus_width_4) 871 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 872 else 873 value = ext_csd[EXT_CSD_PWR_CL_52_360]; 874 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 875 if (bus_width == bus_width_8) 876 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 877 else 878 value = ext_csd[EXT_CSD_PWR_CL_200_360]; 879 } 880 break; 881 default: 882 device_printf(dev, "No power class support for VDD 0x%x\n", 883 1 << mmcbr_get_vdd(dev)); 884 return (MMC_ERR_INVALID); 885 } 886 887 if (bus_width == bus_width_8) 888 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 889 EXT_CSD_POWER_CLASS_8BIT_SHIFT; 890 else 891 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 892 EXT_CSD_POWER_CLASS_4BIT_SHIFT; 893 894 if (value == 0) 895 return (MMC_ERR_NONE); 896 897 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 898 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 899} 900 901static int 902mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 903 enum mmc_bus_timing timing) 904{ 905 u_char switch_res[64]; 906 uint8_t value; 907 int err; 908 909 if (mmcbr_get_mode(sc->dev) == mode_sd) { 910 switch (timing) { 911 case bus_timing_normal: 912 value = SD_SWITCH_NORMAL_MODE; 913 break; 914 case bus_timing_hs: 915 value = SD_SWITCH_HS_MODE; 916 break; 917 default: 918 return (MMC_ERR_INVALID); 919 } 920 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 921 value, switch_res); 922 if (err != MMC_ERR_NONE) 923 return (err); 924 if ((switch_res[16] & 0xf) != value) 925 return (MMC_ERR_FAILED); 926 mmcbr_set_timing(sc->dev, timing); 927 mmcbr_update_ios(sc->dev); 928 } else { 929 switch (timing) { 930 case bus_timing_normal: 931 value = EXT_CSD_HS_TIMING_BC; 932 break; 933 case bus_timing_hs: 934 case bus_timing_mmc_ddr52: 935 value = EXT_CSD_HS_TIMING_HS; 936 break; 937 case bus_timing_mmc_hs200: 938 value = EXT_CSD_HS_TIMING_HS200; 939 break; 940 case bus_timing_mmc_hs400: 941 case bus_timing_mmc_hs400es: 942 value = EXT_CSD_HS_TIMING_HS400; 943 break; 944 default: 945 return (MMC_ERR_INVALID); 946 } 947 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 948 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 949 ivar->cmd6_time, false); 950 if (err != MMC_ERR_NONE) 951 return (err); 952 mmcbr_set_timing(sc->dev, timing); 953 mmcbr_update_ios(sc->dev); 954 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 955 ivar->cmd6_time); 956 } 957 return (err); 958} 959 960static int 961mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 962 enum mmc_bus_timing timing) 963{ 964 965 if (isset(&ivar->vccq_120, timing)) 966 mmcbr_set_vccq(sc->dev, vccq_120); 967 else if (isset(&ivar->vccq_180, timing)) 968 mmcbr_set_vccq(sc->dev, vccq_180); 969 else 970 mmcbr_set_vccq(sc->dev, vccq_330); 971 if (mmcbr_switch_vccq(sc->dev) != 0) 972 return (MMC_ERR_INVALID); 973 else 974 return (MMC_ERR_NONE); 975} 976 977static const uint8_t p8[8] = { 978 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 979}; 980 981static const uint8_t p8ok[8] = { 982 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 983}; 984 985static const uint8_t p4[4] = { 986 0x5A, 0x00, 0x00, 0x00 987}; 988 989static const uint8_t p4ok[4] = { 990 0xA5, 0x00, 0x00, 0x00 991}; 992 993static int 994mmc_test_bus_width(struct mmc_softc *sc) 995{ 996 struct mmc_command cmd; 997 struct mmc_data data; 998 uint8_t buf[8]; 999 int err; 1000 1001 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 1002 mmcbr_set_bus_width(sc->dev, bus_width_8); 1003 mmcbr_update_ios(sc->dev); 1004 1005 sc->squelched++; /* Errors are expected, squelch reporting. */ 1006 memset(&cmd, 0, sizeof(cmd)); 1007 memset(&data, 0, sizeof(data)); 1008 cmd.opcode = MMC_BUSTEST_W; 1009 cmd.arg = 0; 1010 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1011 cmd.data = &data; 1012 1013 data.data = __DECONST(void *, p8); 1014 data.len = 8; 1015 data.flags = MMC_DATA_WRITE; 1016 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1017 1018 memset(&cmd, 0, sizeof(cmd)); 1019 memset(&data, 0, sizeof(data)); 1020 cmd.opcode = MMC_BUSTEST_R; 1021 cmd.arg = 0; 1022 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1023 cmd.data = &data; 1024 1025 data.data = buf; 1026 data.len = 8; 1027 data.flags = MMC_DATA_READ; 1028 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1029 sc->squelched--; 1030 1031 mmcbr_set_bus_width(sc->dev, bus_width_1); 1032 mmcbr_update_ios(sc->dev); 1033 1034 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 1035 return (bus_width_8); 1036 } 1037 1038 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 1039 mmcbr_set_bus_width(sc->dev, bus_width_4); 1040 mmcbr_update_ios(sc->dev); 1041 1042 sc->squelched++; /* Errors are expected, squelch reporting. */ 1043 memset(&cmd, 0, sizeof(cmd)); 1044 memset(&data, 0, sizeof(data)); 1045 cmd.opcode = MMC_BUSTEST_W; 1046 cmd.arg = 0; 1047 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1048 cmd.data = &data; 1049 1050 data.data = __DECONST(void *, p4); 1051 data.len = 4; 1052 data.flags = MMC_DATA_WRITE; 1053 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1054 1055 memset(&cmd, 0, sizeof(cmd)); 1056 memset(&data, 0, sizeof(data)); 1057 cmd.opcode = MMC_BUSTEST_R; 1058 cmd.arg = 0; 1059 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1060 cmd.data = &data; 1061 1062 data.data = buf; 1063 data.len = 4; 1064 data.flags = MMC_DATA_READ; 1065 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1066 sc->squelched--; 1067 1068 mmcbr_set_bus_width(sc->dev, bus_width_1); 1069 mmcbr_update_ios(sc->dev); 1070 1071 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 1072 return (bus_width_4); 1073 } 1074 return (bus_width_1); 1075} 1076 1077static uint32_t 1078mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 1079{ 1080 const int i = (bit_len / 32) - (start / 32) - 1; 1081 const int shift = start & 31; 1082 uint32_t retval = bits[i] >> shift; 1083 1084 if (size + shift > 32) 1085 retval |= bits[i - 1] << (32 - shift); 1086 return (retval & ((1llu << size) - 1)); 1087} 1088 1089static void 1090mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 1091{ 1092 int i; 1093 1094 /* There's no version info, so we take it on faith */ 1095 memset(cid, 0, sizeof(*cid)); 1096 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1097 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 1098 for (i = 0; i < 5; i++) 1099 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1100 cid->pnm[5] = 0; 1101 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 1102 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 1103 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 1104 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 1105} 1106 1107static void 1108mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 1109{ 1110 int i; 1111 1112 /* There's no version info, so we take it on faith */ 1113 memset(cid, 0, sizeof(*cid)); 1114 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1115 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 1116 for (i = 0; i < 6; i++) 1117 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1118 cid->pnm[6] = 0; 1119 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 1120 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 1121 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 1122 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 1123 if (is_4_41p) 1124 cid->mdt_year += 2013; 1125 else 1126 cid->mdt_year += 1997; 1127} 1128 1129static void 1130mmc_format_card_id_string(struct mmc_ivars *ivar) 1131{ 1132 char oidstr[8]; 1133 uint8_t c1; 1134 uint8_t c2; 1135 1136 /* 1137 * Format a card ID string for use by the mmcsd driver, it's what 1138 * appears between the <> in the following: 1139 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0 1140 * 22.5MHz/4bit/128-block 1141 * 1142 * Also format just the card serial number, which the mmcsd driver will 1143 * use as the disk->d_ident string. 1144 * 1145 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1146 * and our max formatted length is currently 55 bytes if every field 1147 * contains the largest value. 1148 * 1149 * Sometimes the oid is two printable ascii chars; when it's not, 1150 * format it as 0xnnnn instead. 1151 */ 1152 c1 = (ivar->cid.oid >> 8) & 0x0ff; 1153 c2 = ivar->cid.oid & 0x0ff; 1154 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1155 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1156 else 1157 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1158 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1159 "%08X", ivar->cid.psn); 1160 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1161 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1162 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1163 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1164 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1165 ivar->cid.mid, oidstr); 1166} 1167 1168static const int exp[8] = { 1169 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1170}; 1171 1172static const int mant[16] = { 1173 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1174}; 1175 1176static const int cur_min[8] = { 1177 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1178}; 1179 1180static const int cur_max[8] = { 1181 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1182}; 1183 1184static int 1185mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1186{ 1187 int v; 1188 int m; 1189 int e; 1190 1191 memset(csd, 0, sizeof(*csd)); 1192 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1193 if (v == 0) { 1194 m = mmc_get_bits(raw_csd, 128, 115, 4); 1195 e = mmc_get_bits(raw_csd, 128, 112, 3); 1196 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1197 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1198 m = mmc_get_bits(raw_csd, 128, 99, 4); 1199 e = mmc_get_bits(raw_csd, 128, 96, 3); 1200 csd->tran_speed = exp[e] * 10000 * mant[m]; 1201 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1202 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1203 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1204 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1205 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1206 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1207 csd->vdd_r_curr_min = 1208 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1209 csd->vdd_r_curr_max = 1210 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1211 csd->vdd_w_curr_min = 1212 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1213 csd->vdd_w_curr_max = 1214 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1215 m = mmc_get_bits(raw_csd, 128, 62, 12); 1216 e = mmc_get_bits(raw_csd, 128, 47, 3); 1217 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1218 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1219 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1220 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1221 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1222 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1223 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1224 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1225 return (MMC_ERR_NONE); 1226 } else if (v == 1) { 1227 m = mmc_get_bits(raw_csd, 128, 115, 4); 1228 e = mmc_get_bits(raw_csd, 128, 112, 3); 1229 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1230 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1231 m = mmc_get_bits(raw_csd, 128, 99, 4); 1232 e = mmc_get_bits(raw_csd, 128, 96, 3); 1233 csd->tran_speed = exp[e] * 10000 * mant[m]; 1234 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1235 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1236 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1237 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1238 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1239 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1240 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1241 1) * 512 * 1024; 1242 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1243 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1244 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1245 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1246 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1247 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1248 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1249 return (MMC_ERR_NONE); 1250 } 1251 return (MMC_ERR_INVALID); 1252} 1253 1254static void 1255mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1256{ 1257 int m; 1258 int e; 1259 1260 memset(csd, 0, sizeof(*csd)); 1261 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1262 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1263 m = mmc_get_bits(raw_csd, 128, 115, 4); 1264 e = mmc_get_bits(raw_csd, 128, 112, 3); 1265 csd->tacc = exp[e] * mant[m] + 9 / 10; 1266 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1267 m = mmc_get_bits(raw_csd, 128, 99, 4); 1268 e = mmc_get_bits(raw_csd, 128, 96, 3); 1269 csd->tran_speed = exp[e] * 10000 * mant[m]; 1270 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1271 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1272 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1273 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1274 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1275 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1276 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1277 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1278 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1279 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1280 m = mmc_get_bits(raw_csd, 128, 62, 12); 1281 e = mmc_get_bits(raw_csd, 128, 47, 3); 1282 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1283 csd->erase_blk_en = 0; 1284 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1285 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1286 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1287 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1288 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1289 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1290 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1291} 1292 1293static void 1294mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1295{ 1296 unsigned int scr_struct; 1297 1298 memset(scr, 0, sizeof(*scr)); 1299 1300 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1301 if (scr_struct != 0) { 1302 printf("Unrecognised SCR structure version %d\n", 1303 scr_struct); 1304 return; 1305 } 1306 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1307 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1308} 1309 1310static void 1311mmc_app_decode_sd_status(uint32_t *raw_sd_status, 1312 struct mmc_sd_status *sd_status) 1313{ 1314 1315 memset(sd_status, 0, sizeof(*sd_status)); 1316 1317 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1318 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1319 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1320 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1321 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1322 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1323 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1324 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1325 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1326 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1327} 1328 1329static int 1330mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1331{ 1332 struct mmc_command cmd; 1333 int err; 1334 1335 memset(&cmd, 0, sizeof(cmd)); 1336 cmd.opcode = MMC_ALL_SEND_CID; 1337 cmd.arg = 0; 1338 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1339 cmd.data = NULL; 1340 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1341 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1342 return (err); 1343} 1344 1345static int 1346mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1347{ 1348 struct mmc_command cmd; 1349 int err; 1350 1351 memset(&cmd, 0, sizeof(cmd)); 1352 cmd.opcode = MMC_SEND_CSD; 1353 cmd.arg = rca << 16; 1354 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1355 cmd.data = NULL; 1356 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1357 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1358 return (err); 1359} 1360 1361static int 1362mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1363{ 1364 int err; 1365 struct mmc_command cmd; 1366 struct mmc_data data; 1367 1368 memset(&cmd, 0, sizeof(cmd)); 1369 memset(&data, 0, sizeof(data)); 1370 1371 memset(rawscr, 0, 8); 1372 cmd.opcode = ACMD_SEND_SCR; 1373 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1374 cmd.arg = 0; 1375 cmd.data = &data; 1376 1377 data.data = rawscr; 1378 data.len = 8; 1379 data.flags = MMC_DATA_READ; 1380 1381 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1382 rawscr[0] = be32toh(rawscr[0]); 1383 rawscr[1] = be32toh(rawscr[1]); 1384 return (err); 1385} 1386 1387static int 1388mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1389{ 1390 struct mmc_command cmd; 1391 struct mmc_data data; 1392 int err, i; 1393 1394 memset(&cmd, 0, sizeof(cmd)); 1395 memset(&data, 0, sizeof(data)); 1396 1397 memset(rawsdstatus, 0, 64); 1398 cmd.opcode = ACMD_SD_STATUS; 1399 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1400 cmd.arg = 0; 1401 cmd.data = &data; 1402 1403 data.data = rawsdstatus; 1404 data.len = 64; 1405 data.flags = MMC_DATA_READ; 1406 1407 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1408 for (i = 0; i < 16; i++) 1409 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1410 return (err); 1411} 1412 1413static int 1414mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1415{ 1416 struct mmc_command cmd; 1417 int err; 1418 1419 memset(&cmd, 0, sizeof(cmd)); 1420 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1421 cmd.arg = resp << 16; 1422 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1423 cmd.data = NULL; 1424 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1425 return (err); 1426} 1427 1428static int 1429mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1430{ 1431 struct mmc_command cmd; 1432 int err; 1433 1434 memset(&cmd, 0, sizeof(cmd)); 1435 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1436 cmd.arg = 0; 1437 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1438 cmd.data = NULL; 1439 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1440 *resp = cmd.resp[0]; 1441 return (err); 1442} 1443 1444static int 1445mmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1446{ 1447 struct mmc_command cmd; 1448 int err; 1449 1450 memset(&cmd, 0, sizeof(cmd)); 1451 cmd.opcode = MMC_SET_BLOCKLEN; 1452 cmd.arg = len; 1453 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1454 cmd.data = NULL; 1455 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1456 return (err); 1457} 1458 1459static uint32_t 1460mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1461{ 1462 1463 switch (timing) { 1464 case bus_timing_normal: 1465 return (ivar->tran_speed); 1466 case bus_timing_hs: 1467 return (ivar->hs_tran_speed); 1468 case bus_timing_uhs_sdr12: 1469 return (SD_SDR12_MAX); 1470 case bus_timing_uhs_sdr25: 1471 return (SD_SDR25_MAX); 1472 case bus_timing_uhs_ddr50: 1473 return (SD_DDR50_MAX); 1474 case bus_timing_uhs_sdr50: 1475 return (SD_SDR50_MAX); 1476 case bus_timing_uhs_sdr104: 1477 return (SD_SDR104_MAX); 1478 case bus_timing_mmc_ddr52: 1479 return (MMC_TYPE_DDR52_MAX); 1480 case bus_timing_mmc_hs200: 1481 case bus_timing_mmc_hs400: 1482 case bus_timing_mmc_hs400es: 1483 return (MMC_TYPE_HS200_HS400ES_MAX); 1484 } 1485 return (0); 1486} 1487 1488static const char * 1489mmc_timing_to_string(enum mmc_bus_timing timing) 1490{ 1491 1492 switch (timing) { 1493 case bus_timing_normal: 1494 return ("normal speed"); 1495 case bus_timing_hs: 1496 return ("high speed"); 1497 case bus_timing_uhs_sdr12: 1498 case bus_timing_uhs_sdr25: 1499 case bus_timing_uhs_sdr50: 1500 case bus_timing_uhs_sdr104: 1501 return ("single data rate"); 1502 case bus_timing_uhs_ddr50: 1503 case bus_timing_mmc_ddr52: 1504 return ("dual data rate"); 1505 case bus_timing_mmc_hs200: 1506 return ("HS200"); 1507 case bus_timing_mmc_hs400: 1508 return ("HS400"); 1509 case bus_timing_mmc_hs400es: 1510 return ("HS400 with enhanced strobe"); 1511 } 1512 return (""); 1513} 1514 1515static bool 1516mmc_host_timing(device_t dev, enum mmc_bus_timing timing) 1517{ 1518 int host_caps; 1519 1520 host_caps = mmcbr_get_caps(dev); 1521 1522#define HOST_TIMING_CAP(host_caps, cap) ({ \ 1523 bool retval; \ 1524 if (((host_caps) & (cap)) == (cap)) \ 1525 retval = true; \ 1526 else \ 1527 retval = false; \ 1528 retval; \ 1529}) 1530 1531 switch (timing) { 1532 case bus_timing_normal: 1533 return (true); 1534 case bus_timing_hs: 1535 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED)); 1536 case bus_timing_uhs_sdr12: 1537 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12)); 1538 case bus_timing_uhs_sdr25: 1539 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25)); 1540 case bus_timing_uhs_ddr50: 1541 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50)); 1542 case bus_timing_uhs_sdr50: 1543 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50)); 1544 case bus_timing_uhs_sdr104: 1545 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104)); 1546 case bus_timing_mmc_ddr52: 1547 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52)); 1548 case bus_timing_mmc_hs200: 1549 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200)); 1550 case bus_timing_mmc_hs400: 1551 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400)); 1552 case bus_timing_mmc_hs400es: 1553 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 | 1554 MMC_CAP_MMC_ENH_STROBE)); 1555 } 1556 1557#undef HOST_TIMING_CAP 1558 1559 return (false); 1560} 1561 1562static void 1563mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1564{ 1565 enum mmc_bus_timing max_timing, timing; 1566 1567 device_printf(dev, "Card at relative address 0x%04x%s:\n", 1568 ivar->rca, newcard ? " added" : ""); 1569 device_printf(dev, " card: %s\n", ivar->card_id_string); 1570 max_timing = bus_timing_normal; 1571 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1572 if (isset(&ivar->timings, timing)) { 1573 max_timing = timing; 1574 break; 1575 } 1576 } 1577 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT); 1578 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1579 (ivar->bus_width == bus_width_1 ? 1 : 1580 (ivar->bus_width == bus_width_4 ? 4 : 8)), 1581 mmc_timing_to_dtr(ivar, timing) / 1000000, 1582 mmc_timing_to_string(timing)); 1583 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1584 ivar->sec_count, ivar->erase_sector, 1585 ivar->read_only ? ", read-only" : ""); 1586} 1587 1588static void 1589mmc_discover_cards(struct mmc_softc *sc) 1590{ 1591 u_char switch_res[64]; 1592 uint32_t raw_cid[4]; 1593 struct mmc_ivars *ivar = NULL; 1594 const struct mmc_quirk *quirk; 1595 const uint8_t *ext_csd; 1596 device_t child; 1597 int err, host_caps, i, newcard; 1598 uint32_t resp, sec_count, status; 1599 uint16_t rca = 2; 1600 int16_t rev; 1601 uint8_t card_type; 1602 1603 host_caps = mmcbr_get_caps(sc->dev); 1604 if (bootverbose || mmc_debug) 1605 device_printf(sc->dev, "Probing cards\n"); 1606 while (1) { 1607 child = NULL; 1608 sc->squelched++; /* Errors are expected, squelch reporting. */ 1609 err = mmc_all_send_cid(sc, raw_cid); 1610 sc->squelched--; 1611 if (err == MMC_ERR_TIMEOUT) 1612 break; 1613 if (err != MMC_ERR_NONE) { 1614 device_printf(sc->dev, "Error reading CID %d\n", err); 1615 break; 1616 } 1617 newcard = 1; 1618 for (i = 0; i < sc->child_count; i++) { 1619 ivar = device_get_ivars(sc->child_list[i]); 1620 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 1621 0) { 1622 newcard = 0; 1623 break; 1624 } 1625 } 1626 if (bootverbose || mmc_debug) { 1627 device_printf(sc->dev, 1628 "%sard detected (CID %08x%08x%08x%08x)\n", 1629 newcard ? "New c" : "C", 1630 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1631 } 1632 if (newcard) { 1633 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1634 M_WAITOK | M_ZERO); 1635 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1636 } 1637 if (mmcbr_get_ro(sc->dev)) 1638 ivar->read_only = 1; 1639 ivar->bus_width = bus_width_1; 1640 setbit(&ivar->timings, bus_timing_normal); 1641 ivar->mode = mmcbr_get_mode(sc->dev); 1642 if (ivar->mode == mode_sd) { 1643 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1644 err = mmc_send_relative_addr(sc, &resp); 1645 if (err != MMC_ERR_NONE) { 1646 device_printf(sc->dev, 1647 "Error getting RCA %d\n", err); 1648 goto free_ivar; 1649 } 1650 ivar->rca = resp >> 16; 1651 /* Get card CSD. */ 1652 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1653 if (err != MMC_ERR_NONE) { 1654 device_printf(sc->dev, 1655 "Error getting CSD %d\n", err); 1656 goto free_ivar; 1657 } 1658 if (bootverbose || mmc_debug) 1659 device_printf(sc->dev, 1660 "%sard detected (CSD %08x%08x%08x%08x)\n", 1661 newcard ? "New c" : "C", ivar->raw_csd[0], 1662 ivar->raw_csd[1], ivar->raw_csd[2], 1663 ivar->raw_csd[3]); 1664 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1665 if (err != MMC_ERR_NONE) { 1666 device_printf(sc->dev, "Error decoding CSD\n"); 1667 goto free_ivar; 1668 } 1669 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1670 if (ivar->csd.csd_structure > 0) 1671 ivar->high_cap = 1; 1672 ivar->tran_speed = ivar->csd.tran_speed; 1673 ivar->erase_sector = ivar->csd.erase_sector * 1674 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1675 1676 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1677 &status); 1678 if (err != MMC_ERR_NONE) { 1679 device_printf(sc->dev, 1680 "Error reading card status %d\n", err); 1681 goto free_ivar; 1682 } 1683 if ((status & R1_CARD_IS_LOCKED) != 0) { 1684 device_printf(sc->dev, 1685 "Card is password protected, skipping\n"); 1686 goto free_ivar; 1687 } 1688 1689 /* Get card SCR. Card must be selected to fetch it. */ 1690 err = mmc_select_card(sc, ivar->rca); 1691 if (err != MMC_ERR_NONE) { 1692 device_printf(sc->dev, 1693 "Error selecting card %d\n", err); 1694 goto free_ivar; 1695 } 1696 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1697 if (err != MMC_ERR_NONE) { 1698 device_printf(sc->dev, 1699 "Error reading SCR %d\n", err); 1700 goto free_ivar; 1701 } 1702 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1703 /* Get card switch capabilities (command class 10). */ 1704 if ((ivar->scr.sda_vsn >= 1) && 1705 (ivar->csd.ccc & (1 << 10))) { 1706 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1707 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1708 switch_res); 1709 if (err == MMC_ERR_NONE && 1710 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1711 setbit(&ivar->timings, bus_timing_hs); 1712 ivar->hs_tran_speed = SD_HS_MAX; 1713 } 1714 } 1715 1716 /* 1717 * We deselect then reselect the card here. Some cards 1718 * become unselected and timeout with the above two 1719 * commands, although the state tables / diagrams in the 1720 * standard suggest they go back to the transfer state. 1721 * Other cards don't become deselected, and if we 1722 * attempt to blindly re-select them, we get timeout 1723 * errors from some controllers. So we deselect then 1724 * reselect to handle all situations. The only thing we 1725 * use from the sd_status is the erase sector size, but 1726 * it is still nice to get that right. 1727 */ 1728 (void)mmc_select_card(sc, 0); 1729 (void)mmc_select_card(sc, ivar->rca); 1730 (void)mmc_app_sd_status(sc, ivar->rca, 1731 ivar->raw_sd_status); 1732 mmc_app_decode_sd_status(ivar->raw_sd_status, 1733 &ivar->sd_status); 1734 if (ivar->sd_status.au_size != 0) { 1735 ivar->erase_sector = 1736 16 << ivar->sd_status.au_size; 1737 } 1738 /* Find maximum supported bus width. */ 1739 if ((host_caps & MMC_CAP_4_BIT_DATA) && 1740 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1741 ivar->bus_width = bus_width_4; 1742 1743 goto child_common; 1744 } 1745 ivar->rca = rca++; 1746 err = mmc_set_relative_addr(sc, ivar->rca); 1747 if (err != MMC_ERR_NONE) { 1748 device_printf(sc->dev, "Error setting RCA %d\n", err); 1749 goto free_ivar; 1750 } 1751 /* Get card CSD. */ 1752 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1753 if (err != MMC_ERR_NONE) { 1754 device_printf(sc->dev, "Error getting CSD %d\n", err); 1755 goto free_ivar; 1756 } 1757 if (bootverbose || mmc_debug) 1758 device_printf(sc->dev, 1759 "%sard detected (CSD %08x%08x%08x%08x)\n", 1760 newcard ? "New c" : "C", ivar->raw_csd[0], 1761 ivar->raw_csd[1], ivar->raw_csd[2], 1762 ivar->raw_csd[3]); 1763 1764 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1765 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1766 ivar->tran_speed = ivar->csd.tran_speed; 1767 ivar->erase_sector = ivar->csd.erase_sector * 1768 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1769 1770 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1771 if (err != MMC_ERR_NONE) { 1772 device_printf(sc->dev, 1773 "Error reading card status %d\n", err); 1774 goto free_ivar; 1775 } 1776 if ((status & R1_CARD_IS_LOCKED) != 0) { 1777 device_printf(sc->dev, 1778 "Card is password protected, skipping\n"); 1779 goto free_ivar; 1780 } 1781 1782 err = mmc_select_card(sc, ivar->rca); 1783 if (err != MMC_ERR_NONE) { 1784 device_printf(sc->dev, "Error selecting card %d\n", 1785 err); 1786 goto free_ivar; 1787 } 1788 1789 rev = -1; 1790 /* Only MMC >= 4.x devices support EXT_CSD. */ 1791 if (ivar->csd.spec_vers >= 4) { 1792 err = mmc_send_ext_csd(sc->dev, sc->dev, 1793 ivar->raw_ext_csd); 1794 if (err != MMC_ERR_NONE) { 1795 device_printf(sc->dev, 1796 "Error reading EXT_CSD %d\n", err); 1797 goto free_ivar; 1798 } 1799 ext_csd = ivar->raw_ext_csd; 1800 rev = ext_csd[EXT_CSD_REV]; 1801 /* Handle extended capacity from EXT_CSD */ 1802 sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]); 1803 if (sec_count != 0) { 1804 ivar->sec_count = sec_count; 1805 ivar->high_cap = 1; 1806 } 1807 /* Find maximum supported bus width. */ 1808 ivar->bus_width = mmc_test_bus_width(sc); 1809 /* Get device speeds beyond normal mode. */ 1810 card_type = ext_csd[EXT_CSD_CARD_TYPE]; 1811 if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) { 1812 setbit(&ivar->timings, bus_timing_hs); 1813 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1814 } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) { 1815 setbit(&ivar->timings, bus_timing_hs); 1816 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1817 } 1818 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1819 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1820 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1821 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1822 } 1823 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1824 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1825 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1826 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1827 } 1828 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1829 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1830 setbit(&ivar->timings, bus_timing_mmc_hs200); 1831 setbit(&ivar->vccq_120, bus_timing_mmc_hs200); 1832 } 1833 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1834 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1835 setbit(&ivar->timings, bus_timing_mmc_hs200); 1836 setbit(&ivar->vccq_180, bus_timing_mmc_hs200); 1837 } 1838 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1839 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1840 ivar->bus_width == bus_width_8) { 1841 setbit(&ivar->timings, bus_timing_mmc_hs400); 1842 setbit(&ivar->vccq_120, bus_timing_mmc_hs400); 1843 } 1844 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1845 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1846 ivar->bus_width == bus_width_8) { 1847 setbit(&ivar->timings, bus_timing_mmc_hs400); 1848 setbit(&ivar->vccq_180, bus_timing_mmc_hs400); 1849 } 1850 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1851 (ext_csd[EXT_CSD_STROBE_SUPPORT] & 1852 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1853 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1854 ivar->bus_width == bus_width_8) { 1855 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1856 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es); 1857 } 1858 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1859 (ext_csd[EXT_CSD_STROBE_SUPPORT] & 1860 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1861 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1862 ivar->bus_width == bus_width_8) { 1863 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1864 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es); 1865 } 1866 /* 1867 * Determine generic switch timeout (provided in 1868 * units of 10 ms), defaulting to 500 ms. 1869 */ 1870 ivar->cmd6_time = 500 * 1000; 1871 if (rev >= 6) 1872 ivar->cmd6_time = 10 * 1873 ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1874 /* Handle HC erase sector size. */ 1875 if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1876 ivar->erase_sector = 1024 * 1877 ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1878 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1879 EXT_CSD_CMD_SET_NORMAL, 1880 EXT_CSD_ERASE_GRP_DEF, 1881 EXT_CSD_ERASE_GRP_DEF_EN, 1882 ivar->cmd6_time, true); 1883 if (err != MMC_ERR_NONE) { 1884 device_printf(sc->dev, 1885 "Error setting erase group %d\n", 1886 err); 1887 goto free_ivar; 1888 } 1889 } 1890 } 1891 1892 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5); 1893 1894child_common: 1895 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) { 1896 if ((quirk->mid == MMC_QUIRK_MID_ANY || 1897 quirk->mid == ivar->cid.mid) && 1898 (quirk->oid == MMC_QUIRK_OID_ANY || 1899 quirk->oid == ivar->cid.oid) && 1900 strncmp(quirk->pnm, ivar->cid.pnm, 1901 sizeof(ivar->cid.pnm)) == 0) { 1902 ivar->quirks = quirk->quirks; 1903 break; 1904 } 1905 } 1906 1907 /* 1908 * Some cards that report maximum I/O block sizes greater 1909 * than 512 require the block length to be set to 512, even 1910 * though that is supposed to be the default. Example: 1911 * 1912 * Transcend 2GB SDSC card, CID: 1913 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1914 */ 1915 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1916 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1917 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1918 1919 mmc_format_card_id_string(ivar); 1920 1921 if (bootverbose || mmc_debug) 1922 mmc_log_card(sc->dev, ivar, newcard); 1923 if (newcard) { 1924 /* Add device. */ 1925 child = device_add_child(sc->dev, NULL, -1); 1926 if (child != NULL) { 1927 device_set_ivars(child, ivar); 1928 sc->child_list = realloc(sc->child_list, 1929 sizeof(device_t) * sc->child_count + 1, 1930 M_DEVBUF, M_WAITOK); 1931 sc->child_list[sc->child_count++] = child; 1932 } else 1933 device_printf(sc->dev, "Error adding child\n"); 1934 } 1935 1936free_ivar: 1937 if (newcard && child == NULL) 1938 free(ivar, M_DEVBUF); 1939 (void)mmc_select_card(sc, 0); 1940 /* 1941 * Not returning here when one MMC device could no be added 1942 * potentially would mean looping forever when that device 1943 * is broken (in which case it also may impact the remainder 1944 * of the bus anyway, though). 1945 */ 1946 if ((newcard && child == NULL) || 1947 mmcbr_get_mode(sc->dev) == mode_sd) 1948 return; 1949 } 1950} 1951 1952static void 1953mmc_update_child_list(struct mmc_softc *sc) 1954{ 1955 device_t child; 1956 int i, j; 1957 1958 if (sc->child_count == 0) { 1959 free(sc->child_list, M_DEVBUF); 1960 return; 1961 } 1962 for (i = j = 0; i < sc->child_count; i++) { 1963 for (;;) { 1964 child = sc->child_list[j++]; 1965 if (child != NULL) 1966 break; 1967 } 1968 if (i != j) 1969 sc->child_list[i] = child; 1970 } 1971 sc->child_list = realloc(sc->child_list, sizeof(device_t) * 1972 sc->child_count, M_DEVBUF, M_WAITOK); 1973} 1974 1975static void 1976mmc_rescan_cards(struct mmc_softc *sc) 1977{ 1978 struct mmc_ivars *ivar; 1979 int err, i, j; 1980 1981 for (i = j = 0; i < sc->child_count; i++) { 1982 ivar = device_get_ivars(sc->child_list[i]); 1983 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1984 if (bootverbose || mmc_debug) 1985 device_printf(sc->dev, 1986 "Card at relative address %d lost\n", 1987 ivar->rca); 1988 err = device_delete_child(sc->dev, sc->child_list[i]); 1989 if (err != 0) { 1990 j++; 1991 continue; 1992 } 1993 free(ivar, M_DEVBUF); 1994 } else 1995 j++; 1996 } 1997 if (sc->child_count == j) 1998 goto out; 1999 sc->child_count = j; 2000 mmc_update_child_list(sc); 2001out: 2002 (void)mmc_select_card(sc, 0); 2003} 2004 2005static int 2006mmc_delete_cards(struct mmc_softc *sc, bool final) 2007{ 2008 struct mmc_ivars *ivar; 2009 int err, i, j; 2010 2011 err = 0; 2012 for (i = j = 0; i < sc->child_count; i++) { 2013 ivar = device_get_ivars(sc->child_list[i]); 2014 if (bootverbose || mmc_debug) 2015 device_printf(sc->dev, 2016 "Card at relative address %d deleted\n", 2017 ivar->rca); 2018 err = device_delete_child(sc->dev, sc->child_list[i]); 2019 if (err != 0) { 2020 j++; 2021 if (final == false) 2022 continue; 2023 else 2024 break; 2025 } 2026 free(ivar, M_DEVBUF); 2027 } 2028 sc->child_count = j; 2029 mmc_update_child_list(sc); 2030 return (err); 2031} 2032 2033static void 2034mmc_go_discovery(struct mmc_softc *sc) 2035{ 2036 uint32_t ocr; 2037 device_t dev; 2038 int err; 2039 2040 dev = sc->dev; 2041 if (mmcbr_get_power_mode(dev) != power_on) { 2042 /* 2043 * First, try SD modes 2044 */ 2045 sc->squelched++; /* Errors are expected, squelch reporting. */ 2046 mmcbr_set_mode(dev, mode_sd); 2047 mmc_power_up(sc); 2048 mmcbr_set_bus_mode(dev, pushpull); 2049 if (bootverbose || mmc_debug) 2050 device_printf(sc->dev, "Probing bus\n"); 2051 mmc_idle_cards(sc); 2052 err = mmc_send_if_cond(sc, 1); 2053 if ((bootverbose || mmc_debug) && err == 0) 2054 device_printf(sc->dev, 2055 "SD 2.0 interface conditions: OK\n"); 2056 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2057 if (bootverbose || mmc_debug) 2058 device_printf(sc->dev, "SD probe: failed\n"); 2059 /* 2060 * Failed, try MMC 2061 */ 2062 mmcbr_set_mode(dev, mode_mmc); 2063 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2064 if (bootverbose || mmc_debug) 2065 device_printf(sc->dev, 2066 "MMC probe: failed\n"); 2067 ocr = 0; /* Failed both, powerdown. */ 2068 } else if (bootverbose || mmc_debug) 2069 device_printf(sc->dev, 2070 "MMC probe: OK (OCR: 0x%08x)\n", ocr); 2071 } else if (bootverbose || mmc_debug) 2072 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", 2073 ocr); 2074 sc->squelched--; 2075 2076 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 2077 if (mmcbr_get_ocr(dev) != 0) 2078 mmc_idle_cards(sc); 2079 } else { 2080 mmcbr_set_bus_mode(dev, opendrain); 2081 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 2082 mmcbr_update_ios(dev); 2083 /* XXX recompute vdd based on new cards? */ 2084 } 2085 /* 2086 * Make sure that we have a mutually agreeable voltage to at least 2087 * one card on the bus. 2088 */ 2089 if (bootverbose || mmc_debug) 2090 device_printf(sc->dev, "Current OCR: 0x%08x\n", 2091 mmcbr_get_ocr(dev)); 2092 if (mmcbr_get_ocr(dev) == 0) { 2093 device_printf(sc->dev, "No compatible cards found on bus\n"); 2094 (void)mmc_delete_cards(sc, false); 2095 mmc_power_down(sc); 2096 return; 2097 } 2098 /* 2099 * Reselect the cards after we've idled them above. 2100 */ 2101 if (mmcbr_get_mode(dev) == mode_sd) { 2102 err = mmc_send_if_cond(sc, 1); 2103 mmc_send_app_op_cond(sc, 2104 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 2105 } else 2106 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 2107 mmc_discover_cards(sc); 2108 mmc_rescan_cards(sc); 2109 2110 mmcbr_set_bus_mode(dev, pushpull); 2111 mmcbr_update_ios(dev); 2112 mmc_calculate_clock(sc); 2113} 2114 2115static int 2116mmc_calculate_clock(struct mmc_softc *sc) 2117{ 2118 device_t dev; 2119 struct mmc_ivars *ivar; 2120 int i; 2121 uint32_t dtr, max_dtr; 2122 uint16_t rca; 2123 enum mmc_bus_timing max_timing, timing; 2124 bool changed, hs400; 2125 2126 dev = sc->dev; 2127 max_dtr = mmcbr_get_f_max(dev); 2128 max_timing = bus_timing_max; 2129 do { 2130 changed = false; 2131 for (i = 0; i < sc->child_count; i++) { 2132 ivar = device_get_ivars(sc->child_list[i]); 2133 if (isclr(&ivar->timings, max_timing) || 2134 !mmc_host_timing(dev, max_timing)) { 2135 for (timing = max_timing - 1; timing >= 2136 bus_timing_normal; timing--) { 2137 if (isset(&ivar->timings, timing) && 2138 mmc_host_timing(dev, timing)) { 2139 max_timing = timing; 2140 break; 2141 } 2142 } 2143 changed = true; 2144 } 2145 dtr = mmc_timing_to_dtr(ivar, max_timing); 2146 if (dtr < max_dtr) { 2147 max_dtr = dtr; 2148 changed = true; 2149 } 2150 } 2151 } while (changed == true); 2152 2153 if (bootverbose || mmc_debug) { 2154 device_printf(dev, 2155 "setting transfer rate to %d.%03dMHz (%s timing)\n", 2156 max_dtr / 1000000, (max_dtr / 1000) % 1000, 2157 mmc_timing_to_string(max_timing)); 2158 } 2159 2160 /* 2161 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin 2162 * with HS200 following the sequence as described in "6.6.2.2 HS200 2163 * timing mode selection" of the eMMC specification v5.1, too, and 2164 * switch to max_timing later. HS400ES requires no tuning and, thus, 2165 * can be switch to directly, but requires the same detour via high 2166 * speed mode as does HS400 (see mmc_switch_to_hs400()). 2167 */ 2168 hs400 = max_timing == bus_timing_mmc_hs400; 2169 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing; 2170 for (i = 0; i < sc->child_count; i++) { 2171 ivar = device_get_ivars(sc->child_list[i]); 2172 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 2173 goto clock; 2174 2175 rca = ivar->rca; 2176 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 2177 device_printf(dev, "Card at relative address %d " 2178 "failed to select\n", rca); 2179 continue; 2180 } 2181 2182 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */ 2183 timing == bus_timing_mmc_hs400es) { 2184 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2185 device_printf(dev, "Failed to set VCCQ for " 2186 "card at relative address %d\n", rca); 2187 continue; 2188 } 2189 } 2190 2191 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */ 2192 /* Set bus width (required for initial tuning). */ 2193 if (mmc_set_card_bus_width(sc, ivar, timing) != 2194 MMC_ERR_NONE) { 2195 device_printf(dev, "Card at relative address " 2196 "%d failed to set bus width\n", rca); 2197 continue; 2198 } 2199 mmcbr_set_bus_width(dev, ivar->bus_width); 2200 mmcbr_update_ios(dev); 2201 } else if (timing == bus_timing_mmc_hs400es) { 2202 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) != 2203 MMC_ERR_NONE) { 2204 device_printf(dev, "Card at relative address " 2205 "%d failed to set %s timing\n", rca, 2206 mmc_timing_to_string(timing)); 2207 continue; 2208 } 2209 goto power_class; 2210 } 2211 2212 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) { 2213 device_printf(dev, "Card at relative address %d " 2214 "failed to set %s timing\n", rca, 2215 mmc_timing_to_string(timing)); 2216 continue; 2217 } 2218 2219 if (timing == bus_timing_mmc_ddr52) { 2220 /* 2221 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH 2222 * (must be done after switching to EXT_CSD_HS_TIMING). 2223 */ 2224 if (mmc_set_card_bus_width(sc, ivar, timing) != 2225 MMC_ERR_NONE) { 2226 device_printf(dev, "Card at relative address " 2227 "%d failed to set bus width\n", rca); 2228 continue; 2229 } 2230 mmcbr_set_bus_width(dev, ivar->bus_width); 2231 mmcbr_update_ios(dev); 2232 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2233 device_printf(dev, "Failed to set VCCQ for " 2234 "card at relative address %d\n", rca); 2235 continue; 2236 } 2237 } 2238 2239clock: 2240 /* Set clock (must be done before initial tuning). */ 2241 mmcbr_set_clock(dev, max_dtr); 2242 mmcbr_update_ios(dev); 2243 2244 if (mmcbr_tune(dev, hs400) != 0) { 2245 device_printf(dev, "Card at relative address %d " 2246 "failed to execute initial tuning\n", rca); 2247 continue; 2248 } 2249 2250 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr, 2251 max_timing) != MMC_ERR_NONE) { 2252 device_printf(dev, "Card at relative address %d " 2253 "failed to set %s timing\n", rca, 2254 mmc_timing_to_string(max_timing)); 2255 continue; 2256 } 2257 2258power_class: 2259 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 2260 device_printf(dev, "Card at relative address %d " 2261 "failed to set power class\n", rca); 2262 } 2263 } 2264 (void)mmc_select_card(sc, 0); 2265 return (max_dtr); 2266} 2267 2268/* 2269 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly 2270 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing 2271 * mode selection" of the eMMC specification v5.1. 2272 */ 2273static int 2274mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 2275 uint32_t clock, enum mmc_bus_timing max_timing) 2276{ 2277 device_t dev; 2278 int err; 2279 uint16_t rca; 2280 2281 dev = sc->dev; 2282 rca = ivar->rca; 2283 2284 /* 2285 * Both clock and timing must be set as appropriate for high speed 2286 * before eventually switching to HS400/HS400ES; mmc_set_timing() 2287 * will issue mmcbr_update_ios(). 2288 */ 2289 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2290 err = mmc_set_timing(sc, ivar, bus_timing_hs); 2291 if (err != MMC_ERR_NONE) 2292 return (err); 2293 2294 /* 2295 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally 2296 * EXT_CSD_BUS_WIDTH_ES for HS400ES). 2297 */ 2298 err = mmc_set_card_bus_width(sc, ivar, max_timing); 2299 if (err != MMC_ERR_NONE) 2300 return (err); 2301 mmcbr_set_bus_width(dev, ivar->bus_width); 2302 mmcbr_update_ios(dev); 2303 2304 /* Finally, switch to HS400/HS400ES mode. */ 2305 err = mmc_set_timing(sc, ivar, max_timing); 2306 if (err != MMC_ERR_NONE) 2307 return (err); 2308 mmcbr_set_clock(dev, clock); 2309 mmcbr_update_ios(dev); 2310 return (MMC_ERR_NONE); 2311} 2312 2313/* 2314 * Switch from HS400 to HS200 (for re-tuning). 2315 */ 2316static int 2317mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 2318 uint32_t clock) 2319{ 2320 device_t dev; 2321 int err; 2322 uint16_t rca; 2323 2324 dev = sc->dev; 2325 rca = ivar->rca; 2326 2327 /* 2328 * Both clock and timing must initially be set as appropriate for 2329 * DDR52 before eventually switching to HS200; mmc_set_timing() 2330 * will issue mmcbr_update_ios(). 2331 */ 2332 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2333 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52); 2334 if (err != MMC_ERR_NONE) 2335 return (err); 2336 2337 /* 2338 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR 2339 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios. 2340 */ 2341 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs); 2342 if (err != MMC_ERR_NONE) 2343 return (err); 2344 mmcbr_set_bus_width(dev, ivar->bus_width); 2345 mmcbr_set_timing(sc->dev, bus_timing_hs); 2346 mmcbr_update_ios(dev); 2347 2348 /* Finally, switch to HS200 mode. */ 2349 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200); 2350 if (err != MMC_ERR_NONE) 2351 return (err); 2352 mmcbr_set_clock(dev, clock); 2353 mmcbr_update_ios(dev); 2354 return (MMC_ERR_NONE); 2355} 2356 2357static int 2358mmc_retune(device_t busdev, device_t dev, bool reset) 2359{ 2360 struct mmc_softc *sc; 2361 struct mmc_ivars *ivar; 2362 int err; 2363 uint32_t clock; 2364 enum mmc_bus_timing timing; 2365 2366 if (device_get_parent(dev) != busdev) 2367 return (MMC_ERR_INVALID); 2368 2369 sc = device_get_softc(busdev); 2370 if (sc->retune_needed != 1 && sc->retune_paused != 0) 2371 return (MMC_ERR_INVALID); 2372 2373 timing = mmcbr_get_timing(busdev); 2374 if (timing == bus_timing_mmc_hs400) { 2375 /* 2376 * Controllers use the data strobe line to latch data from 2377 * the devices in HS400 mode so periodic re-tuning isn't 2378 * expected to be required, i. e. only if a CRC or tuning 2379 * error is signaled to the bridge. In these latter cases 2380 * we are asked to reset the tuning circuit and need to do 2381 * the switch timing dance. 2382 */ 2383 if (reset == false) 2384 return (0); 2385 ivar = device_get_ivars(dev); 2386 clock = mmcbr_get_clock(busdev); 2387 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE) 2388 return (MMC_ERR_BADCRC); 2389 } 2390 err = mmcbr_retune(busdev, reset); 2391 if (err != 0 && timing == bus_timing_mmc_hs400) 2392 return (MMC_ERR_BADCRC); 2393 switch (err) { 2394 case 0: 2395 break; 2396 case EIO: 2397 return (MMC_ERR_FAILED); 2398 default: 2399 return (MMC_ERR_INVALID); 2400 } 2401 if (timing == bus_timing_mmc_hs400) { 2402 if (mmc_switch_to_hs400(sc, ivar, clock, timing) != 2403 MMC_ERR_NONE) 2404 return (MMC_ERR_BADCRC); 2405 } 2406 return (MMC_ERR_NONE); 2407} 2408 2409static void 2410mmc_retune_pause(device_t busdev, device_t dev, bool retune) 2411{ 2412 struct mmc_softc *sc; 2413 2414 sc = device_get_softc(busdev); 2415 KASSERT(device_get_parent(dev) == busdev, 2416 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2417 device_get_nameunit(busdev))); 2418 KASSERT(sc->owner != NULL, 2419 ("%s: Request from %s without bus being acquired.", __func__, 2420 device_get_nameunit(dev))); 2421 2422 if (retune == true && sc->retune_paused == 0) 2423 sc->retune_needed = 1; 2424 sc->retune_paused++; 2425} 2426 2427static void 2428mmc_retune_unpause(device_t busdev, device_t dev) 2429{ 2430 struct mmc_softc *sc; 2431 2432 sc = device_get_softc(busdev); 2433 KASSERT(device_get_parent(dev) == busdev, 2434 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2435 device_get_nameunit(busdev))); 2436 KASSERT(sc->owner != NULL, 2437 ("%s: Request from %s without bus being acquired.", __func__, 2438 device_get_nameunit(dev))); 2439 KASSERT(sc->retune_paused != 0, 2440 ("%s: Re-tune pause count already at 0", __func__)); 2441 2442 sc->retune_paused--; 2443} 2444 2445static void 2446mmc_scan(struct mmc_softc *sc) 2447{ 2448 device_t dev = sc->dev; 2449 int err; 2450 2451 err = mmc_acquire_bus(dev, dev); 2452 if (err != 0) { 2453 device_printf(dev, "Failed to acquire bus for scanning\n"); 2454 return; 2455 } 2456 mmc_go_discovery(sc); 2457 err = mmc_release_bus(dev, dev); 2458 if (err != 0) { 2459 device_printf(dev, "Failed to release bus after scanning\n"); 2460 return; 2461 } 2462 (void)bus_generic_attach(dev); 2463} 2464 2465static int 2466mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 2467{ 2468 struct mmc_ivars *ivar = device_get_ivars(child); 2469 2470 switch (which) { 2471 default: 2472 return (EINVAL); 2473 case MMC_IVAR_SPEC_VERS: 2474 *result = ivar->csd.spec_vers; 2475 break; 2476 case MMC_IVAR_DSR_IMP: 2477 *result = ivar->csd.dsr_imp; 2478 break; 2479 case MMC_IVAR_MEDIA_SIZE: 2480 *result = ivar->sec_count; 2481 break; 2482 case MMC_IVAR_RCA: 2483 *result = ivar->rca; 2484 break; 2485 case MMC_IVAR_SECTOR_SIZE: 2486 *result = MMC_SECTOR_SIZE; 2487 break; 2488 case MMC_IVAR_TRAN_SPEED: 2489 *result = mmcbr_get_clock(bus); 2490 break; 2491 case MMC_IVAR_READ_ONLY: 2492 *result = ivar->read_only; 2493 break; 2494 case MMC_IVAR_HIGH_CAP: 2495 *result = ivar->high_cap; 2496 break; 2497 case MMC_IVAR_CARD_TYPE: 2498 *result = ivar->mode; 2499 break; 2500 case MMC_IVAR_BUS_WIDTH: 2501 *result = ivar->bus_width; 2502 break; 2503 case MMC_IVAR_ERASE_SECTOR: 2504 *result = ivar->erase_sector; 2505 break; 2506 case MMC_IVAR_MAX_DATA: 2507 *result = mmcbr_get_max_data(bus); 2508 break; 2509 case MMC_IVAR_CMD6_TIMEOUT: 2510 *result = ivar->cmd6_time; 2511 break; 2512 case MMC_IVAR_QUIRKS: 2513 *result = ivar->quirks; 2514 break; 2515 case MMC_IVAR_CARD_ID_STRING: 2516 *(char **)result = ivar->card_id_string; 2517 break; 2518 case MMC_IVAR_CARD_SN_STRING: 2519 *(char **)result = ivar->card_sn_string; 2520 break; 2521 } 2522 return (0); 2523} 2524 2525static int 2526mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 2527{ 2528 2529 /* 2530 * None are writable ATM 2531 */ 2532 return (EINVAL); 2533} 2534 2535static void 2536mmc_delayed_attach(void *xsc) 2537{ 2538 struct mmc_softc *sc = xsc; 2539 2540 mmc_scan(sc); 2541 config_intrhook_disestablish(&sc->config_intrhook); 2542} 2543 2544static int 2545mmc_child_location_str(device_t dev, device_t child, char *buf, 2546 size_t buflen) 2547{ 2548 2549 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child)); 2550 return (0); 2551} 2552 2553static device_method_t mmc_methods[] = { 2554 /* device_if */ 2555 DEVMETHOD(device_probe, mmc_probe), 2556 DEVMETHOD(device_attach, mmc_attach), 2557 DEVMETHOD(device_detach, mmc_detach), 2558 DEVMETHOD(device_suspend, mmc_suspend), 2559 DEVMETHOD(device_resume, mmc_resume), 2560 2561 /* Bus interface */ 2562 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2563 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2564 DEVMETHOD(bus_child_location_str, mmc_child_location_str), 2565 2566 /* MMC Bus interface */ 2567 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause), 2568 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause), 2569 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2570 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2571 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2572 2573 DEVMETHOD_END 2574}; 2575 2576driver_t mmc_driver = { 2577 "mmc", 2578 mmc_methods, 2579 sizeof(struct mmc_softc), 2580}; 2581devclass_t mmc_devclass; 2582 2583MODULE_VERSION(mmc, MMC_VERSION); 2584