1/*
2 * Copyright 2015 Andrew Turner.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *
9 *  1. Redistributions of source code must retain the above copyright
10 *     notice, this list of conditions and the following disclaimer.
11 *  2. Redistributions in binary form must reproduce the above copyright
12 *     notice, this list of conditions and the following disclaimer in the
13 *     documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD$");
30
31#include <sys/param.h>
32#include <sys/kernel.h>
33#include <sys/bus.h>
34#include <sys/module.h>
35
36#include <machine/bus.h>
37
38#include <dev/mmc/bridge.h>
39
40#include <dev/ofw/ofw_bus_subr.h>
41
42#include <dev/mmc/host/dwmmc_var.h>
43
44static device_probe_t hisi_dwmmc_probe;
45static device_attach_t hisi_dwmmc_attach;
46
47static int
48hisi_dwmmc_probe(device_t dev)
49{
50
51	if (!ofw_bus_status_okay(dev))
52		return (ENXIO);
53
54	if (!ofw_bus_is_compatible(dev, "hisilicon,hi6220-dw-mshc"))
55		return (ENXIO);
56
57	device_set_desc(dev, "Synopsys DesignWare Mobile "
58	    "Storage Host Controller (HiSilicon)");
59
60	return (BUS_PROBE_VENDOR);
61}
62
63static int
64hisi_dwmmc_attach(device_t dev)
65{
66	struct dwmmc_softc *sc;
67
68	sc = device_get_softc(dev);
69	sc->hwtype = HWTYPE_HISILICON;
70	/* TODO: Calculate this from a clock driver */
71	sc->bus_hz = 24000000; /* 24MHz */
72
73	/*
74	 * ARM64TODO: This is likely because we lack support for
75	 * DMA when the controller is not cache-coherent on arm64.
76	 */
77	sc->use_pio = 1;
78	sc->desc_count = 1;
79
80	return (dwmmc_attach(dev));
81}
82
83static device_method_t hisi_dwmmc_methods[] = {
84	/* bus interface */
85	DEVMETHOD(device_probe, hisi_dwmmc_probe),
86	DEVMETHOD(device_attach, hisi_dwmmc_attach),
87
88	DEVMETHOD_END
89};
90
91static devclass_t hisi_dwmmc_devclass;
92
93DEFINE_CLASS_1(hisi_dwmmc, hisi_dwmmc_driver, hisi_dwmmc_methods,
94    sizeof(struct dwmmc_softc), dwmmc_driver);
95DRIVER_MODULE(hisi_dwmmc, simplebus, hisi_dwmmc_driver,
96    hisi_dwmmc_devclass, 0, 0);
97