mlx5_ib_main.c revision 347860
1322810Shselasky/*- 2322810Shselasky * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 3322810Shselasky * 4322810Shselasky * Redistribution and use in source and binary forms, with or without 5322810Shselasky * modification, are permitted provided that the following conditions 6322810Shselasky * are met: 7322810Shselasky * 1. Redistributions of source code must retain the above copyright 8322810Shselasky * notice, this list of conditions and the following disclaimer. 9322810Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10322810Shselasky * notice, this list of conditions and the following disclaimer in the 11322810Shselasky * documentation and/or other materials provided with the distribution. 12322810Shselasky * 13322810Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14322810Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15322810Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16322810Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17322810Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18322810Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19322810Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20322810Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21322810Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22322810Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23322810Shselasky * SUCH DAMAGE. 24322810Shselasky * 25322810Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c 347860 2019-05-16 18:11:25Z hselasky $ 26322810Shselasky */ 27322810Shselasky 28331769Shselasky#include <linux/module.h> 29322810Shselasky#include <linux/errno.h> 30322810Shselasky#include <linux/pci.h> 31322810Shselasky#include <linux/dma-mapping.h> 32322810Shselasky#include <linux/slab.h> 33331769Shselasky#if defined(CONFIG_X86) 34331769Shselasky#include <asm/pat.h> 35331769Shselasky#endif 36322810Shselasky#include <linux/sched.h> 37331769Shselasky#include <linux/delay.h> 38322810Shselasky#include <linux/fs.h> 39322810Shselasky#undef inode 40322810Shselasky#include <rdma/ib_user_verbs.h> 41331769Shselasky#include <rdma/ib_addr.h> 42331769Shselasky#include <rdma/ib_cache.h> 43331769Shselasky#include <dev/mlx5/port.h> 44331769Shselasky#include <dev/mlx5/vport.h> 45331769Shselasky#include <linux/list.h> 46322810Shselasky#include <rdma/ib_smi.h> 47322810Shselasky#include <rdma/ib_umem.h> 48331769Shselasky#include <linux/in.h> 49331769Shselasky#include <linux/etherdevice.h> 50331769Shselasky#include <dev/mlx5/fs.h> 51322810Shselasky#include "mlx5_ib.h" 52322810Shselasky 53341948Shselasky#define DRIVER_NAME "mlx5ib" 54337101Shselasky#ifndef DRIVER_VERSION 55341987Shselasky#define DRIVER_VERSION "3.5.0" 56337101Shselasky#endif 57341987Shselasky#define DRIVER_RELDATE "November 2018" 58322810Shselasky 59322810ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 60322810ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 61322810ShselaskyMODULE_DEPEND(mlx5ib, linuxkpi, 1, 1, 1); 62322810ShselaskyMODULE_DEPEND(mlx5ib, mlx5, 1, 1, 1); 63322810ShselaskyMODULE_DEPEND(mlx5ib, ibcore, 1, 1, 1); 64322810ShselaskyMODULE_VERSION(mlx5ib, 1); 65322810Shselasky 66337101Shselaskystatic const char mlx5_version[] = 67337101Shselasky DRIVER_NAME ": Mellanox Connect-IB Infiniband driver " 68331769Shselasky DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 69331769Shselasky 70322810Shselaskyenum { 71331769Shselasky MLX5_ATOMIC_SIZE_QP_8BYTES = 1 << 3, 72322810Shselasky}; 73322810Shselasky 74331769Shselaskystatic enum rdma_link_layer 75331769Shselaskymlx5_port_type_cap_to_rdma_ll(int port_type_cap) 76331769Shselasky{ 77331769Shselasky switch (port_type_cap) { 78331769Shselasky case MLX5_CAP_PORT_TYPE_IB: 79331769Shselasky return IB_LINK_LAYER_INFINIBAND; 80331769Shselasky case MLX5_CAP_PORT_TYPE_ETH: 81331769Shselasky return IB_LINK_LAYER_ETHERNET; 82331769Shselasky default: 83331769Shselasky return IB_LINK_LAYER_UNSPECIFIED; 84331769Shselasky } 85331769Shselasky} 86322810Shselasky 87331769Shselaskystatic enum rdma_link_layer 88331769Shselaskymlx5_ib_port_link_layer(struct ib_device *device, u8 port_num) 89331769Shselasky{ 90331769Shselasky struct mlx5_ib_dev *dev = to_mdev(device); 91331769Shselasky int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type); 92322810Shselasky 93331769Shselasky return mlx5_port_type_cap_to_rdma_ll(port_type_cap); 94331769Shselasky} 95331769Shselasky 96331769Shselaskystatic bool mlx5_netdev_match(struct net_device *ndev, 97331769Shselasky struct mlx5_core_dev *mdev, 98331769Shselasky const char *dname) 99322810Shselasky{ 100331769Shselasky return ndev->if_type == IFT_ETHER && 101331769Shselasky ndev->if_dname != NULL && 102331769Shselasky strcmp(ndev->if_dname, dname) == 0 && 103331769Shselasky ndev->if_softc != NULL && 104331769Shselasky *(struct mlx5_core_dev **)ndev->if_softc == mdev; 105331769Shselasky} 106322810Shselasky 107331769Shselaskystatic int mlx5_netdev_event(struct notifier_block *this, 108331769Shselasky unsigned long event, void *ptr) 109331769Shselasky{ 110331769Shselasky struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 111331769Shselasky struct mlx5_ib_dev *ibdev = container_of(this, struct mlx5_ib_dev, 112331769Shselasky roce.nb); 113322810Shselasky 114331769Shselasky switch (event) { 115331769Shselasky case NETDEV_REGISTER: 116331769Shselasky case NETDEV_UNREGISTER: 117331769Shselasky write_lock(&ibdev->roce.netdev_lock); 118331769Shselasky /* check if network interface belongs to mlx5en */ 119331769Shselasky if (mlx5_netdev_match(ndev, ibdev->mdev, "mce")) 120331769Shselasky ibdev->roce.netdev = (event == NETDEV_UNREGISTER) ? 121331769Shselasky NULL : ndev; 122331769Shselasky write_unlock(&ibdev->roce.netdev_lock); 123331769Shselasky break; 124331769Shselasky 125331769Shselasky case NETDEV_UP: 126331769Shselasky case NETDEV_DOWN: { 127331769Shselasky struct net_device *upper = NULL; 128331769Shselasky 129331769Shselasky if ((upper == ndev || (!upper && ndev == ibdev->roce.netdev)) 130331769Shselasky && ibdev->ib_active) { 131331769Shselasky struct ib_event ibev = {0}; 132331769Shselasky 133331769Shselasky ibev.device = &ibdev->ib_dev; 134331769Shselasky ibev.event = (event == NETDEV_UP) ? 135331769Shselasky IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 136331769Shselasky ibev.element.port_num = 1; 137331769Shselasky ib_dispatch_event(&ibev); 138322810Shselasky } 139331769Shselasky break; 140322810Shselasky } 141322810Shselasky 142331769Shselasky default: 143331769Shselasky break; 144322810Shselasky } 145331769Shselasky 146331769Shselasky return NOTIFY_DONE; 147322810Shselasky} 148322810Shselasky 149331769Shselaskystatic struct net_device *mlx5_ib_get_netdev(struct ib_device *device, 150331769Shselasky u8 port_num) 151322810Shselasky{ 152331769Shselasky struct mlx5_ib_dev *ibdev = to_mdev(device); 153331769Shselasky struct net_device *ndev; 154331769Shselasky 155331769Shselasky /* Ensure ndev does not disappear before we invoke dev_hold() 156331769Shselasky */ 157331769Shselasky read_lock(&ibdev->roce.netdev_lock); 158331769Shselasky ndev = ibdev->roce.netdev; 159331769Shselasky if (ndev) 160331769Shselasky dev_hold(ndev); 161331769Shselasky read_unlock(&ibdev->roce.netdev_lock); 162331769Shselasky 163331769Shselasky return ndev; 164331769Shselasky} 165331769Shselasky 166331805Shselaskystatic int translate_eth_proto_oper(u32 eth_proto_oper, u8 *active_speed, 167331805Shselasky u8 *active_width) 168331805Shselasky{ 169331805Shselasky switch (eth_proto_oper) { 170331805Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII): 171331805Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_KX): 172331805Shselasky case MLX5E_PROT_MASK(MLX5E_100BASE_TX): 173331805Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_T): 174331805Shselasky *active_width = IB_WIDTH_1X; 175331805Shselasky *active_speed = IB_SPEED_SDR; 176331805Shselasky break; 177331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_T): 178331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_CX4): 179331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_KX4): 180331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_KR): 181331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_CR): 182331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_SR): 183347855Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_ER_LR): 184331805Shselasky *active_width = IB_WIDTH_1X; 185331805Shselasky *active_speed = IB_SPEED_QDR; 186331805Shselasky break; 187331805Shselasky case MLX5E_PROT_MASK(MLX5E_25GBASE_CR): 188331805Shselasky case MLX5E_PROT_MASK(MLX5E_25GBASE_KR): 189331805Shselasky case MLX5E_PROT_MASK(MLX5E_25GBASE_SR): 190331805Shselasky *active_width = IB_WIDTH_1X; 191331805Shselasky *active_speed = IB_SPEED_EDR; 192331805Shselasky break; 193331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_CR4): 194331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_KR4): 195331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_SR4): 196347855Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_LR4_ER4): 197331805Shselasky *active_width = IB_WIDTH_4X; 198331805Shselasky *active_speed = IB_SPEED_QDR; 199331805Shselasky break; 200331805Shselasky case MLX5E_PROT_MASK(MLX5E_50GBASE_CR2): 201331805Shselasky case MLX5E_PROT_MASK(MLX5E_50GBASE_KR2): 202331805Shselasky case MLX5E_PROT_MASK(MLX5E_50GBASE_SR2): 203331805Shselasky *active_width = IB_WIDTH_1X; 204331805Shselasky *active_speed = IB_SPEED_HDR; 205331805Shselasky break; 206331805Shselasky case MLX5E_PROT_MASK(MLX5E_56GBASE_R4): 207331805Shselasky *active_width = IB_WIDTH_4X; 208331805Shselasky *active_speed = IB_SPEED_FDR; 209331805Shselasky break; 210331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_CR4): 211331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_SR4): 212331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_KR4): 213331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_LR4): 214331805Shselasky *active_width = IB_WIDTH_4X; 215331805Shselasky *active_speed = IB_SPEED_EDR; 216331805Shselasky break; 217331805Shselasky default: 218341956Shselasky *active_width = IB_WIDTH_4X; 219341956Shselasky *active_speed = IB_SPEED_QDR; 220331805Shselasky return -EINVAL; 221331805Shselasky } 222331805Shselasky 223331805Shselasky return 0; 224331805Shselasky} 225331805Shselasky 226347859Shselaskystatic int translate_eth_ext_proto_oper(u32 eth_proto_oper, u8 *active_speed, 227347859Shselasky u8 *active_width) 228347859Shselasky{ 229347859Shselasky switch (eth_proto_oper) { 230347859Shselasky case MLX5E_PROT_MASK(MLX5E_SGMII_100M): 231347859Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_X_SGMII): 232347859Shselasky *active_width = IB_WIDTH_1X; 233347859Shselasky *active_speed = IB_SPEED_SDR; 234347859Shselasky break; 235347859Shselasky case MLX5E_PROT_MASK(MLX5E_5GBASE_R): 236347859Shselasky *active_width = IB_WIDTH_1X; 237347859Shselasky *active_speed = IB_SPEED_DDR; 238347859Shselasky break; 239347859Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_XFI_XAUI_1): 240347859Shselasky *active_width = IB_WIDTH_1X; 241347859Shselasky *active_speed = IB_SPEED_QDR; 242347859Shselasky break; 243347859Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_XLAUI_4_XLPPI_4): 244347859Shselasky *active_width = IB_WIDTH_4X; 245347859Shselasky *active_speed = IB_SPEED_QDR; 246347859Shselasky break; 247347859Shselasky case MLX5E_PROT_MASK(MLX5E_25GAUI_1_25GBASE_CR_KR): 248347859Shselasky *active_width = IB_WIDTH_1X; 249347859Shselasky *active_speed = IB_SPEED_EDR; 250347859Shselasky break; 251347859Shselasky case MLX5E_PROT_MASK(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2): 252347859Shselasky *active_width = IB_WIDTH_2X; 253347859Shselasky *active_speed = IB_SPEED_EDR; 254347859Shselasky break; 255347859Shselasky case MLX5E_PROT_MASK(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR): 256347859Shselasky *active_width = IB_WIDTH_1X; 257347859Shselasky *active_speed = IB_SPEED_HDR; 258347859Shselasky break; 259347859Shselasky case MLX5E_PROT_MASK(MLX5E_CAUI_4_100GBASE_CR4_KR4): 260347859Shselasky *active_width = IB_WIDTH_4X; 261347859Shselasky *active_speed = IB_SPEED_EDR; 262347859Shselasky break; 263347859Shselasky case MLX5E_PROT_MASK(MLX5E_100GAUI_2_100GBASE_CR2_KR2): 264347859Shselasky *active_width = IB_WIDTH_2X; 265347859Shselasky *active_speed = IB_SPEED_HDR; 266347859Shselasky break; 267347859Shselasky case MLX5E_PROT_MASK(MLX5E_200GAUI_4_200GBASE_CR4_KR4): 268347859Shselasky *active_width = IB_WIDTH_4X; 269347859Shselasky *active_speed = IB_SPEED_HDR; 270347859Shselasky break; 271347859Shselasky default: 272347859Shselasky *active_width = IB_WIDTH_4X; 273347859Shselasky *active_speed = IB_SPEED_QDR; 274347859Shselasky return -EINVAL; 275347859Shselasky } 276347859Shselasky 277347859Shselasky return 0; 278347859Shselasky} 279347859Shselasky 280331769Shselaskystatic int mlx5_query_port_roce(struct ib_device *device, u8 port_num, 281331769Shselasky struct ib_port_attr *props) 282331769Shselasky{ 283322810Shselasky struct mlx5_ib_dev *dev = to_mdev(device); 284347859Shselasky u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {}; 285331769Shselasky struct net_device *ndev; 286331769Shselasky enum ib_mtu ndev_ib_mtu; 287331769Shselasky u16 qkey_viol_cntr; 288331805Shselasky u32 eth_prot_oper; 289347859Shselasky bool ext; 290331805Shselasky int err; 291322810Shselasky 292331769Shselasky memset(props, 0, sizeof(*props)); 293331769Shselasky 294331805Shselasky /* Possible bad flows are checked before filling out props so in case 295331805Shselasky * of an error it will still be zeroed out. 296331805Shselasky */ 297347859Shselasky err = mlx5_query_port_ptys(dev->mdev, out, sizeof(out), MLX5_PTYS_EN, 298347859Shselasky port_num); 299331805Shselasky if (err) 300331805Shselasky return err; 301331805Shselasky 302347859Shselasky ext = MLX5_CAP_PCAM_FEATURE(dev->mdev, ptys_extended_ethernet); 303347859Shselasky eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper); 304331805Shselasky 305347859Shselasky if (ext) 306347859Shselasky translate_eth_ext_proto_oper(eth_prot_oper, &props->active_speed, 307347859Shselasky &props->active_width); 308347859Shselasky else 309347859Shselasky translate_eth_proto_oper(eth_prot_oper, &props->active_speed, 310347859Shselasky &props->active_width); 311347859Shselasky 312331769Shselasky props->port_cap_flags |= IB_PORT_CM_SUP; 313331769Shselasky props->port_cap_flags |= IB_PORT_IP_BASED_GIDS; 314331769Shselasky 315331769Shselasky props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev, 316331769Shselasky roce_address_table_size); 317331769Shselasky props->max_mtu = IB_MTU_4096; 318331769Shselasky props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg); 319331769Shselasky props->pkey_tbl_len = 1; 320331769Shselasky props->state = IB_PORT_DOWN; 321331769Shselasky props->phys_state = 3; 322331769Shselasky 323331769Shselasky mlx5_query_nic_vport_qkey_viol_cntr(dev->mdev, &qkey_viol_cntr); 324331769Shselasky props->qkey_viol_cntr = qkey_viol_cntr; 325331769Shselasky 326331769Shselasky ndev = mlx5_ib_get_netdev(device, port_num); 327331769Shselasky if (!ndev) 328331769Shselasky return 0; 329331769Shselasky 330331769Shselasky if (netif_running(ndev) && netif_carrier_ok(ndev)) { 331331769Shselasky props->state = IB_PORT_ACTIVE; 332331769Shselasky props->phys_state = 5; 333331769Shselasky } 334331769Shselasky 335331769Shselasky ndev_ib_mtu = iboe_get_mtu(ndev->if_mtu); 336331769Shselasky 337331769Shselasky dev_put(ndev); 338331769Shselasky 339331769Shselasky props->active_mtu = min(props->max_mtu, ndev_ib_mtu); 340331769Shselasky return 0; 341331769Shselasky} 342331769Shselasky 343331769Shselaskystatic void ib_gid_to_mlx5_roce_addr(const union ib_gid *gid, 344331769Shselasky const struct ib_gid_attr *attr, 345331769Shselasky void *mlx5_addr) 346331769Shselasky{ 347331769Shselasky#define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v) 348331769Shselasky char *mlx5_addr_l3_addr = MLX5_ADDR_OF(roce_addr_layout, mlx5_addr, 349331769Shselasky source_l3_address); 350331769Shselasky void *mlx5_addr_mac = MLX5_ADDR_OF(roce_addr_layout, mlx5_addr, 351331769Shselasky source_mac_47_32); 352337078Shselasky u16 vlan_id; 353331769Shselasky 354331769Shselasky if (!gid) 355331769Shselasky return; 356331769Shselasky ether_addr_copy(mlx5_addr_mac, IF_LLADDR(attr->ndev)); 357331769Shselasky 358337078Shselasky vlan_id = rdma_vlan_dev_vlan_id(attr->ndev); 359337078Shselasky if (vlan_id != 0xffff) { 360331769Shselasky MLX5_SET_RA(mlx5_addr, vlan_valid, 1); 361337078Shselasky MLX5_SET_RA(mlx5_addr, vlan_id, vlan_id); 362331769Shselasky } 363331769Shselasky 364331769Shselasky switch (attr->gid_type) { 365331769Shselasky case IB_GID_TYPE_IB: 366331769Shselasky MLX5_SET_RA(mlx5_addr, roce_version, MLX5_ROCE_VERSION_1); 367331769Shselasky break; 368331769Shselasky case IB_GID_TYPE_ROCE_UDP_ENCAP: 369331769Shselasky MLX5_SET_RA(mlx5_addr, roce_version, MLX5_ROCE_VERSION_2); 370331769Shselasky break; 371331769Shselasky 372322810Shselasky default: 373331769Shselasky WARN_ON(true); 374322810Shselasky } 375331769Shselasky 376331769Shselasky if (attr->gid_type != IB_GID_TYPE_IB) { 377331769Shselasky if (ipv6_addr_v4mapped((void *)gid)) 378331769Shselasky MLX5_SET_RA(mlx5_addr, roce_l3_type, 379331769Shselasky MLX5_ROCE_L3_TYPE_IPV4); 380331769Shselasky else 381331769Shselasky MLX5_SET_RA(mlx5_addr, roce_l3_type, 382331769Shselasky MLX5_ROCE_L3_TYPE_IPV6); 383331769Shselasky } 384331769Shselasky 385331769Shselasky if ((attr->gid_type == IB_GID_TYPE_IB) || 386331769Shselasky !ipv6_addr_v4mapped((void *)gid)) 387331769Shselasky memcpy(mlx5_addr_l3_addr, gid, sizeof(*gid)); 388331769Shselasky else 389331769Shselasky memcpy(&mlx5_addr_l3_addr[12], &gid->raw[12], 4); 390322810Shselasky} 391322810Shselasky 392331769Shselaskystatic int set_roce_addr(struct ib_device *device, u8 port_num, 393331769Shselasky unsigned int index, 394331769Shselasky const union ib_gid *gid, 395331769Shselasky const struct ib_gid_attr *attr) 396331769Shselasky{ 397331769Shselasky struct mlx5_ib_dev *dev = to_mdev(device); 398331769Shselasky u32 in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0}; 399331769Shselasky u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0}; 400331769Shselasky void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address); 401331769Shselasky enum rdma_link_layer ll = mlx5_ib_port_link_layer(device, port_num); 402331769Shselasky 403331769Shselasky if (ll != IB_LINK_LAYER_ETHERNET) 404331769Shselasky return -EINVAL; 405331769Shselasky 406331769Shselasky ib_gid_to_mlx5_roce_addr(gid, attr, in_addr); 407331769Shselasky 408331769Shselasky MLX5_SET(set_roce_address_in, in, roce_address_index, index); 409331769Shselasky MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS); 410331769Shselasky return mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out)); 411331769Shselasky} 412331769Shselasky 413331769Shselaskystatic int mlx5_ib_add_gid(struct ib_device *device, u8 port_num, 414331769Shselasky unsigned int index, const union ib_gid *gid, 415331769Shselasky const struct ib_gid_attr *attr, 416331769Shselasky __always_unused void **context) 417331769Shselasky{ 418331769Shselasky return set_roce_addr(device, port_num, index, gid, attr); 419331769Shselasky} 420331769Shselasky 421331769Shselaskystatic int mlx5_ib_del_gid(struct ib_device *device, u8 port_num, 422331769Shselasky unsigned int index, __always_unused void **context) 423331769Shselasky{ 424331769Shselasky return set_roce_addr(device, port_num, index, NULL, NULL); 425331769Shselasky} 426331769Shselasky 427331769Shselasky__be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num, 428331769Shselasky int index) 429331769Shselasky{ 430331769Shselasky struct ib_gid_attr attr; 431331769Shselasky union ib_gid gid; 432331769Shselasky 433331769Shselasky if (ib_get_cached_gid(&dev->ib_dev, port_num, index, &gid, &attr)) 434331769Shselasky return 0; 435331769Shselasky 436331769Shselasky if (!attr.ndev) 437331769Shselasky return 0; 438331769Shselasky 439331769Shselasky dev_put(attr.ndev); 440331769Shselasky 441331769Shselasky if (attr.gid_type != IB_GID_TYPE_ROCE_UDP_ENCAP) 442331769Shselasky return 0; 443331769Shselasky 444331769Shselasky return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port)); 445331769Shselasky} 446331769Shselasky 447337098Shselaskyint mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num, 448337098Shselasky int index, enum ib_gid_type *gid_type) 449337098Shselasky{ 450337098Shselasky struct ib_gid_attr attr; 451337098Shselasky union ib_gid gid; 452337098Shselasky int ret; 453337098Shselasky 454337098Shselasky ret = ib_get_cached_gid(&dev->ib_dev, port_num, index, &gid, &attr); 455337098Shselasky if (ret) 456337098Shselasky return ret; 457337098Shselasky 458337098Shselasky if (!attr.ndev) 459337098Shselasky return -ENODEV; 460337098Shselasky 461337098Shselasky dev_put(attr.ndev); 462337098Shselasky 463337098Shselasky *gid_type = attr.gid_type; 464337098Shselasky 465337098Shselasky return 0; 466337098Shselasky} 467337098Shselasky 468322810Shselaskystatic int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev) 469322810Shselasky{ 470331769Shselasky if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB) 471331769Shselasky return !MLX5_CAP_GEN(dev->mdev, ib_virt); 472331769Shselasky return 0; 473322810Shselasky} 474322810Shselasky 475322810Shselaskyenum { 476322810Shselasky MLX5_VPORT_ACCESS_METHOD_MAD, 477322810Shselasky MLX5_VPORT_ACCESS_METHOD_HCA, 478322810Shselasky MLX5_VPORT_ACCESS_METHOD_NIC, 479322810Shselasky}; 480322810Shselasky 481322810Shselaskystatic int mlx5_get_vport_access_method(struct ib_device *ibdev) 482322810Shselasky{ 483322810Shselasky if (mlx5_use_mad_ifc(to_mdev(ibdev))) 484322810Shselasky return MLX5_VPORT_ACCESS_METHOD_MAD; 485322810Shselasky 486322810Shselasky if (mlx5_ib_port_link_layer(ibdev, 1) == 487322810Shselasky IB_LINK_LAYER_ETHERNET) 488322810Shselasky return MLX5_VPORT_ACCESS_METHOD_NIC; 489322810Shselasky 490322810Shselasky return MLX5_VPORT_ACCESS_METHOD_HCA; 491322810Shselasky} 492322810Shselasky 493331769Shselaskystatic void get_atomic_caps(struct mlx5_ib_dev *dev, 494331769Shselasky struct ib_device_attr *props) 495331769Shselasky{ 496331769Shselasky u8 tmp; 497331769Shselasky u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 498331769Shselasky u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 499331769Shselasky u8 atomic_req_8B_endianness_mode = 500331769Shselasky MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianess_mode); 501331769Shselasky 502331769Shselasky /* Check if HW supports 8 bytes standard atomic operations and capable 503331769Shselasky * of host endianness respond 504331769Shselasky */ 505331769Shselasky tmp = MLX5_ATOMIC_OPS_CMP_SWAP | MLX5_ATOMIC_OPS_FETCH_ADD; 506331769Shselasky if (((atomic_operations & tmp) == tmp) && 507331769Shselasky (atomic_size_qp & MLX5_ATOMIC_SIZE_QP_8BYTES) && 508331769Shselasky (atomic_req_8B_endianness_mode)) { 509331769Shselasky props->atomic_cap = IB_ATOMIC_HCA; 510331769Shselasky } else { 511331769Shselasky props->atomic_cap = IB_ATOMIC_NONE; 512331769Shselasky } 513331769Shselasky} 514331769Shselasky 515322810Shselaskystatic int mlx5_query_system_image_guid(struct ib_device *ibdev, 516322810Shselasky __be64 *sys_image_guid) 517322810Shselasky{ 518322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 519322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 520322810Shselasky u64 tmp; 521322810Shselasky int err; 522322810Shselasky 523322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 524322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 525331769Shselasky return mlx5_query_mad_ifc_system_image_guid(ibdev, 526322810Shselasky sys_image_guid); 527322810Shselasky 528322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 529322810Shselasky err = mlx5_query_hca_vport_system_image_guid(mdev, &tmp); 530331769Shselasky break; 531322810Shselasky 532322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 533322810Shselasky err = mlx5_query_nic_vport_system_image_guid(mdev, &tmp); 534331769Shselasky break; 535322810Shselasky 536322810Shselasky default: 537322810Shselasky return -EINVAL; 538322810Shselasky } 539331769Shselasky 540331769Shselasky if (!err) 541331769Shselasky *sys_image_guid = cpu_to_be64(tmp); 542331769Shselasky 543331769Shselasky return err; 544331769Shselasky 545322810Shselasky} 546322810Shselasky 547322810Shselaskystatic int mlx5_query_max_pkeys(struct ib_device *ibdev, 548322810Shselasky u16 *max_pkeys) 549322810Shselasky{ 550322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 551322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 552322810Shselasky 553322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 554322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 555331769Shselasky return mlx5_query_mad_ifc_max_pkeys(ibdev, max_pkeys); 556322810Shselasky 557322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 558322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 559322810Shselasky *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, 560322810Shselasky pkey_table_size)); 561322810Shselasky return 0; 562322810Shselasky 563322810Shselasky default: 564322810Shselasky return -EINVAL; 565322810Shselasky } 566322810Shselasky} 567322810Shselasky 568322810Shselaskystatic int mlx5_query_vendor_id(struct ib_device *ibdev, 569322810Shselasky u32 *vendor_id) 570322810Shselasky{ 571322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 572322810Shselasky 573322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 574322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 575331769Shselasky return mlx5_query_mad_ifc_vendor_id(ibdev, vendor_id); 576322810Shselasky 577322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 578322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 579322810Shselasky return mlx5_core_query_vendor_id(dev->mdev, vendor_id); 580322810Shselasky 581322810Shselasky default: 582322810Shselasky return -EINVAL; 583322810Shselasky } 584322810Shselasky} 585322810Shselasky 586322810Shselaskystatic int mlx5_query_node_guid(struct mlx5_ib_dev *dev, 587322810Shselasky __be64 *node_guid) 588322810Shselasky{ 589322810Shselasky u64 tmp; 590322810Shselasky int err; 591322810Shselasky 592322810Shselasky switch (mlx5_get_vport_access_method(&dev->ib_dev)) { 593322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 594331769Shselasky return mlx5_query_mad_ifc_node_guid(dev, node_guid); 595322810Shselasky 596322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 597322810Shselasky err = mlx5_query_hca_vport_node_guid(dev->mdev, &tmp); 598331769Shselasky break; 599322810Shselasky 600322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 601322810Shselasky err = mlx5_query_nic_vport_node_guid(dev->mdev, &tmp); 602331769Shselasky break; 603322810Shselasky 604322810Shselasky default: 605322810Shselasky return -EINVAL; 606322810Shselasky } 607331769Shselasky 608331769Shselasky if (!err) 609331769Shselasky *node_guid = cpu_to_be64(tmp); 610331769Shselasky 611331769Shselasky return err; 612322810Shselasky} 613322810Shselasky 614322810Shselaskystruct mlx5_reg_node_desc { 615331769Shselasky u8 desc[IB_DEVICE_NODE_DESC_MAX]; 616322810Shselasky}; 617322810Shselasky 618322810Shselaskystatic int mlx5_query_node_desc(struct mlx5_ib_dev *dev, char *node_desc) 619322810Shselasky{ 620322810Shselasky struct mlx5_reg_node_desc in; 621322810Shselasky 622322810Shselasky if (mlx5_use_mad_ifc(dev)) 623331769Shselasky return mlx5_query_mad_ifc_node_desc(dev, node_desc); 624322810Shselasky 625322810Shselasky memset(&in, 0, sizeof(in)); 626322810Shselasky 627322810Shselasky return mlx5_core_access_reg(dev->mdev, &in, sizeof(in), node_desc, 628322810Shselasky sizeof(struct mlx5_reg_node_desc), 629322810Shselasky MLX5_REG_NODE_DESC, 0, 0); 630322810Shselasky} 631322810Shselasky 632322810Shselaskystatic int mlx5_ib_query_device(struct ib_device *ibdev, 633331769Shselasky struct ib_device_attr *props, 634331769Shselasky struct ib_udata *uhw) 635322810Shselasky{ 636322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 637322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 638331769Shselasky int err = -ENOMEM; 639322810Shselasky int max_rq_sg; 640322810Shselasky int max_sq_sg; 641331769Shselasky u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); 642331769Shselasky struct mlx5_ib_query_device_resp resp = {}; 643331769Shselasky size_t resp_len; 644331769Shselasky u64 max_tso; 645322810Shselasky 646331769Shselasky resp_len = sizeof(resp.comp_mask) + sizeof(resp.response_length); 647331769Shselasky if (uhw->outlen && uhw->outlen < resp_len) 648331769Shselasky return -EINVAL; 649331769Shselasky else 650331769Shselasky resp.response_length = resp_len; 651322810Shselasky 652331769Shselasky if (uhw->inlen && !ib_is_udata_cleared(uhw, 0, uhw->inlen)) 653331769Shselasky return -EINVAL; 654331769Shselasky 655322810Shselasky memset(props, 0, sizeof(*props)); 656322810Shselasky err = mlx5_query_system_image_guid(ibdev, 657322810Shselasky &props->sys_image_guid); 658322810Shselasky if (err) 659322810Shselasky return err; 660322810Shselasky 661322810Shselasky err = mlx5_query_max_pkeys(ibdev, &props->max_pkeys); 662322810Shselasky if (err) 663322810Shselasky return err; 664322810Shselasky 665322810Shselasky err = mlx5_query_vendor_id(ibdev, &props->vendor_id); 666322810Shselasky if (err) 667322810Shselasky return err; 668322810Shselasky 669322810Shselasky props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 670341950Shselasky ((u32)fw_rev_min(dev->mdev) << 16) | 671322810Shselasky fw_rev_sub(dev->mdev); 672322810Shselasky props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 673322810Shselasky IB_DEVICE_PORT_ACTIVE_EVENT | 674322810Shselasky IB_DEVICE_SYS_IMAGE_GUID | 675322810Shselasky IB_DEVICE_RC_RNR_NAK_GEN; 676322810Shselasky 677322810Shselasky if (MLX5_CAP_GEN(mdev, pkv)) 678322810Shselasky props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 679322810Shselasky if (MLX5_CAP_GEN(mdev, qkv)) 680322810Shselasky props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 681322810Shselasky if (MLX5_CAP_GEN(mdev, apm)) 682322810Shselasky props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 683322810Shselasky if (MLX5_CAP_GEN(mdev, xrc)) 684322810Shselasky props->device_cap_flags |= IB_DEVICE_XRC; 685331769Shselasky if (MLX5_CAP_GEN(mdev, imaicl)) { 686331769Shselasky props->device_cap_flags |= IB_DEVICE_MEM_WINDOW | 687331769Shselasky IB_DEVICE_MEM_WINDOW_TYPE_2B; 688331769Shselasky props->max_mw = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 689331769Shselasky /* We support 'Gappy' memory registration too */ 690331769Shselasky props->device_cap_flags |= IB_DEVICE_SG_GAPS_REG; 691331769Shselasky } 692322810Shselasky props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 693331769Shselasky if (MLX5_CAP_GEN(mdev, sho)) { 694331769Shselasky props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 695331769Shselasky /* At this stage no support for signature handover */ 696331769Shselasky props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 697331769Shselasky IB_PROT_T10DIF_TYPE_2 | 698331769Shselasky IB_PROT_T10DIF_TYPE_3; 699331769Shselasky props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 700331769Shselasky IB_GUARD_T10DIF_CSUM; 701331769Shselasky } 702322810Shselasky if (MLX5_CAP_GEN(mdev, block_lb_mc)) 703322810Shselasky props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 704322810Shselasky 705331769Shselasky if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads)) { 706331769Shselasky if (MLX5_CAP_ETH(mdev, csum_cap)) 707331769Shselasky props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 708331769Shselasky 709331769Shselasky if (field_avail(typeof(resp), tso_caps, uhw->outlen)) { 710331769Shselasky max_tso = MLX5_CAP_ETH(mdev, max_lso_cap); 711331769Shselasky if (max_tso) { 712331769Shselasky resp.tso_caps.max_tso = 1 << max_tso; 713331769Shselasky resp.tso_caps.supported_qpts |= 714331769Shselasky 1 << IB_QPT_RAW_PACKET; 715331769Shselasky resp.response_length += sizeof(resp.tso_caps); 716331769Shselasky } 717331769Shselasky } 718331769Shselasky 719331769Shselasky if (field_avail(typeof(resp), rss_caps, uhw->outlen)) { 720331769Shselasky resp.rss_caps.rx_hash_function = 721331769Shselasky MLX5_RX_HASH_FUNC_TOEPLITZ; 722331769Shselasky resp.rss_caps.rx_hash_fields_mask = 723331769Shselasky MLX5_RX_HASH_SRC_IPV4 | 724331769Shselasky MLX5_RX_HASH_DST_IPV4 | 725331769Shselasky MLX5_RX_HASH_SRC_IPV6 | 726331769Shselasky MLX5_RX_HASH_DST_IPV6 | 727331769Shselasky MLX5_RX_HASH_SRC_PORT_TCP | 728331769Shselasky MLX5_RX_HASH_DST_PORT_TCP | 729331769Shselasky MLX5_RX_HASH_SRC_PORT_UDP | 730331769Shselasky MLX5_RX_HASH_DST_PORT_UDP; 731331769Shselasky resp.response_length += sizeof(resp.rss_caps); 732331769Shselasky } 733331769Shselasky } else { 734331769Shselasky if (field_avail(typeof(resp), tso_caps, uhw->outlen)) 735331769Shselasky resp.response_length += sizeof(resp.tso_caps); 736331769Shselasky if (field_avail(typeof(resp), rss_caps, uhw->outlen)) 737331769Shselasky resp.response_length += sizeof(resp.rss_caps); 738331769Shselasky } 739331769Shselasky 740331769Shselasky if (MLX5_CAP_GEN(mdev, ipoib_ipoib_offloads)) { 741331769Shselasky props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 742331769Shselasky props->device_cap_flags |= IB_DEVICE_UD_TSO; 743331769Shselasky } 744331769Shselasky 745331769Shselasky if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 746331769Shselasky MLX5_CAP_ETH(dev->mdev, scatter_fcs)) 747331769Shselasky props->device_cap_flags |= IB_DEVICE_RAW_SCATTER_FCS; 748331769Shselasky 749331769Shselasky if (mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) 750331769Shselasky props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 751331769Shselasky 752322810Shselasky props->vendor_part_id = mdev->pdev->device; 753322810Shselasky props->hw_ver = mdev->pdev->revision; 754322810Shselasky 755322810Shselasky props->max_mr_size = ~0ull; 756331769Shselasky props->page_size_cap = ~(min_page_size - 1); 757322810Shselasky props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); 758322810Shselasky props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 759322810Shselasky max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / 760322810Shselasky sizeof(struct mlx5_wqe_data_seg); 761331769Shselasky max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - 762331769Shselasky sizeof(struct mlx5_wqe_ctrl_seg)) / 763331769Shselasky sizeof(struct mlx5_wqe_data_seg); 764322810Shselasky props->max_sge = min(max_rq_sg, max_sq_sg); 765331769Shselasky props->max_sge_rd = MLX5_MAX_SGE_RD; 766322810Shselasky props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); 767322810Shselasky props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1; 768322810Shselasky props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 769322810Shselasky props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); 770322810Shselasky props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); 771322810Shselasky props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); 772322810Shselasky props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); 773322810Shselasky props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; 774322810Shselasky props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); 775322810Shselasky props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 776322810Shselasky props->max_srq_sge = max_rq_sg - 1; 777331769Shselasky props->max_fast_reg_page_list_len = 778331769Shselasky 1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size); 779322810Shselasky get_atomic_caps(dev, props); 780331769Shselasky props->masked_atomic_cap = IB_ATOMIC_NONE; 781322810Shselasky props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); 782322810Shselasky props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); 783322810Shselasky props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 784322810Shselasky props->max_mcast_grp; 785322810Shselasky props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 786331769Shselasky props->hca_core_clock = MLX5_CAP_GEN(mdev, device_frequency_khz); 787331769Shselasky props->timestamp_mask = 0x7FFFFFFFFFFFFFFFULL; 788322810Shselasky 789331769Shselasky#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 790331769Shselasky if (MLX5_CAP_GEN(mdev, pg)) 791331769Shselasky props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; 792331769Shselasky props->odp_caps = dev->odp_caps; 793331769Shselasky#endif 794331769Shselasky 795331769Shselasky if (MLX5_CAP_GEN(mdev, cd)) 796331769Shselasky props->device_cap_flags |= IB_DEVICE_CROSS_CHANNEL; 797331769Shselasky 798331769Shselasky if (!mlx5_core_is_pf(mdev)) 799331769Shselasky props->device_cap_flags |= IB_DEVICE_VIRTUAL_FUNCTION; 800331769Shselasky 801331769Shselasky if (mlx5_ib_port_link_layer(ibdev, 1) == 802331769Shselasky IB_LINK_LAYER_ETHERNET) { 803331769Shselasky props->rss_caps.max_rwq_indirection_tables = 804331769Shselasky 1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt); 805331769Shselasky props->rss_caps.max_rwq_indirection_table_size = 806331769Shselasky 1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt_size); 807331769Shselasky props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET; 808331769Shselasky props->max_wq_type_rq = 809331769Shselasky 1 << MLX5_CAP_GEN(dev->mdev, log_max_rq); 810331769Shselasky } 811331769Shselasky 812331769Shselasky if (uhw->outlen) { 813331769Shselasky err = ib_copy_to_udata(uhw, &resp, resp.response_length); 814331769Shselasky 815331769Shselasky if (err) 816331769Shselasky return err; 817331769Shselasky } 818331769Shselasky 819322810Shselasky return 0; 820322810Shselasky} 821322810Shselasky 822322810Shselaskyenum mlx5_ib_width { 823322810Shselasky MLX5_IB_WIDTH_1X = 1 << 0, 824322810Shselasky MLX5_IB_WIDTH_2X = 1 << 1, 825322810Shselasky MLX5_IB_WIDTH_4X = 1 << 2, 826322810Shselasky MLX5_IB_WIDTH_8X = 1 << 3, 827322810Shselasky MLX5_IB_WIDTH_12X = 1 << 4 828322810Shselasky}; 829322810Shselasky 830322810Shselaskystatic int translate_active_width(struct ib_device *ibdev, u8 active_width, 831322810Shselasky u8 *ib_width) 832322810Shselasky{ 833322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 834322810Shselasky int err = 0; 835322810Shselasky 836322810Shselasky if (active_width & MLX5_IB_WIDTH_1X) { 837322810Shselasky *ib_width = IB_WIDTH_1X; 838322810Shselasky } else if (active_width & MLX5_IB_WIDTH_2X) { 839347859Shselasky *ib_width = IB_WIDTH_2X; 840322810Shselasky } else if (active_width & MLX5_IB_WIDTH_4X) { 841322810Shselasky *ib_width = IB_WIDTH_4X; 842322810Shselasky } else if (active_width & MLX5_IB_WIDTH_8X) { 843322810Shselasky *ib_width = IB_WIDTH_8X; 844322810Shselasky } else if (active_width & MLX5_IB_WIDTH_12X) { 845322810Shselasky *ib_width = IB_WIDTH_12X; 846322810Shselasky } else { 847322810Shselasky mlx5_ib_dbg(dev, "Invalid active_width %d\n", 848322810Shselasky (int)active_width); 849322810Shselasky err = -EINVAL; 850322810Shselasky } 851322810Shselasky 852322810Shselasky return err; 853322810Shselasky} 854322810Shselasky 855322810Shselaskyenum ib_max_vl_num { 856322810Shselasky __IB_MAX_VL_0 = 1, 857322810Shselasky __IB_MAX_VL_0_1 = 2, 858322810Shselasky __IB_MAX_VL_0_3 = 3, 859322810Shselasky __IB_MAX_VL_0_7 = 4, 860322810Shselasky __IB_MAX_VL_0_14 = 5, 861322810Shselasky}; 862322810Shselasky 863322810Shselaskyenum mlx5_vl_hw_cap { 864322810Shselasky MLX5_VL_HW_0 = 1, 865322810Shselasky MLX5_VL_HW_0_1 = 2, 866322810Shselasky MLX5_VL_HW_0_2 = 3, 867322810Shselasky MLX5_VL_HW_0_3 = 4, 868322810Shselasky MLX5_VL_HW_0_4 = 5, 869322810Shselasky MLX5_VL_HW_0_5 = 6, 870322810Shselasky MLX5_VL_HW_0_6 = 7, 871322810Shselasky MLX5_VL_HW_0_7 = 8, 872322810Shselasky MLX5_VL_HW_0_14 = 15 873322810Shselasky}; 874322810Shselasky 875322810Shselaskystatic int translate_max_vl_num(struct ib_device *ibdev, u8 vl_hw_cap, 876322810Shselasky u8 *max_vl_num) 877322810Shselasky{ 878322810Shselasky switch (vl_hw_cap) { 879322810Shselasky case MLX5_VL_HW_0: 880322810Shselasky *max_vl_num = __IB_MAX_VL_0; 881322810Shselasky break; 882322810Shselasky case MLX5_VL_HW_0_1: 883322810Shselasky *max_vl_num = __IB_MAX_VL_0_1; 884322810Shselasky break; 885322810Shselasky case MLX5_VL_HW_0_3: 886322810Shselasky *max_vl_num = __IB_MAX_VL_0_3; 887322810Shselasky break; 888322810Shselasky case MLX5_VL_HW_0_7: 889322810Shselasky *max_vl_num = __IB_MAX_VL_0_7; 890322810Shselasky break; 891322810Shselasky case MLX5_VL_HW_0_14: 892322810Shselasky *max_vl_num = __IB_MAX_VL_0_14; 893322810Shselasky break; 894322810Shselasky 895322810Shselasky default: 896322810Shselasky return -EINVAL; 897322810Shselasky } 898322810Shselasky 899322810Shselasky return 0; 900322810Shselasky} 901322810Shselasky 902331769Shselaskystatic int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, 903331769Shselasky struct ib_port_attr *props) 904322810Shselasky{ 905322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 906322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 907322810Shselasky u32 *rep; 908331769Shselasky int replen = MLX5_ST_SZ_BYTES(query_hca_vport_context_out); 909322810Shselasky struct mlx5_ptys_reg *ptys; 910322810Shselasky struct mlx5_pmtu_reg *pmtu; 911322810Shselasky struct mlx5_pvlc_reg pvlc; 912322810Shselasky void *ctx; 913322810Shselasky int err; 914322810Shselasky 915331769Shselasky rep = mlx5_vzalloc(replen); 916322810Shselasky ptys = kzalloc(sizeof(*ptys), GFP_KERNEL); 917322810Shselasky pmtu = kzalloc(sizeof(*pmtu), GFP_KERNEL); 918322810Shselasky if (!rep || !ptys || !pmtu) { 919322810Shselasky err = -ENOMEM; 920322810Shselasky goto out; 921322810Shselasky } 922322810Shselasky 923322810Shselasky memset(props, 0, sizeof(*props)); 924322810Shselasky 925331769Shselasky err = mlx5_query_hca_vport_context(mdev, port, 0, rep, replen); 926322810Shselasky if (err) 927322810Shselasky goto out; 928322810Shselasky 929322810Shselasky ctx = MLX5_ADDR_OF(query_hca_vport_context_out, rep, hca_vport_context); 930322810Shselasky 931322810Shselasky props->lid = MLX5_GET(hca_vport_context, ctx, lid); 932322810Shselasky props->lmc = MLX5_GET(hca_vport_context, ctx, lmc); 933322810Shselasky props->sm_lid = MLX5_GET(hca_vport_context, ctx, sm_lid); 934322810Shselasky props->sm_sl = MLX5_GET(hca_vport_context, ctx, sm_sl); 935322810Shselasky props->state = MLX5_GET(hca_vport_context, ctx, vport_state); 936322810Shselasky props->phys_state = MLX5_GET(hca_vport_context, ctx, 937322810Shselasky port_physical_state); 938322810Shselasky props->port_cap_flags = MLX5_GET(hca_vport_context, ctx, cap_mask1); 939322810Shselasky props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size)); 940322810Shselasky props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); 941322810Shselasky props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size)); 942322810Shselasky props->bad_pkey_cntr = MLX5_GET(hca_vport_context, ctx, 943331769Shselasky pkey_violation_counter); 944322810Shselasky props->qkey_viol_cntr = MLX5_GET(hca_vport_context, ctx, 945331769Shselasky qkey_violation_counter); 946322810Shselasky props->subnet_timeout = MLX5_GET(hca_vport_context, ctx, 947331769Shselasky subnet_timeout); 948322810Shselasky props->init_type_reply = MLX5_GET(hca_vport_context, ctx, 949331769Shselasky init_type_reply); 950331769Shselasky props->grh_required = MLX5_GET(hca_vport_context, ctx, grh_required); 951322810Shselasky 952322810Shselasky ptys->proto_mask |= MLX5_PTYS_IB; 953322810Shselasky ptys->local_port = port; 954322810Shselasky err = mlx5_core_access_ptys(mdev, ptys, 0); 955322810Shselasky if (err) 956322810Shselasky goto out; 957322810Shselasky 958322810Shselasky err = translate_active_width(ibdev, ptys->ib_link_width_oper, 959322810Shselasky &props->active_width); 960322810Shselasky if (err) 961322810Shselasky goto out; 962322810Shselasky 963322810Shselasky props->active_speed = (u8)ptys->ib_proto_oper; 964322810Shselasky 965322810Shselasky pmtu->local_port = port; 966322810Shselasky err = mlx5_core_access_pmtu(mdev, pmtu, 0); 967322810Shselasky if (err) 968322810Shselasky goto out; 969322810Shselasky 970322810Shselasky props->max_mtu = pmtu->max_mtu; 971322810Shselasky props->active_mtu = pmtu->oper_mtu; 972322810Shselasky 973322810Shselasky memset(&pvlc, 0, sizeof(pvlc)); 974322810Shselasky pvlc.local_port = port; 975322810Shselasky err = mlx5_core_access_pvlc(mdev, &pvlc, 0); 976322810Shselasky if (err) 977322810Shselasky goto out; 978322810Shselasky 979322810Shselasky err = translate_max_vl_num(ibdev, pvlc.vl_hw_cap, 980322810Shselasky &props->max_vl_num); 981322810Shselaskyout: 982322810Shselasky kvfree(rep); 983322810Shselasky kfree(ptys); 984322810Shselasky kfree(pmtu); 985322810Shselasky return err; 986322810Shselasky} 987322810Shselasky 988322810Shselaskyint mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 989322810Shselasky struct ib_port_attr *props) 990322810Shselasky{ 991322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 992322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 993331769Shselasky return mlx5_query_mad_ifc_port(ibdev, port, props); 994322810Shselasky 995322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 996331769Shselasky return mlx5_query_hca_port(ibdev, port, props); 997322810Shselasky 998322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 999322810Shselasky return mlx5_query_port_roce(ibdev, port, props); 1000322810Shselasky 1001322810Shselasky default: 1002322810Shselasky return -EINVAL; 1003322810Shselasky } 1004322810Shselasky} 1005322810Shselasky 1006322810Shselaskystatic int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 1007322810Shselasky union ib_gid *gid) 1008322810Shselasky{ 1009322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 1010322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 1011322810Shselasky 1012322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 1013322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 1014331769Shselasky return mlx5_query_mad_ifc_gids(ibdev, port, index, gid); 1015322810Shselasky 1016322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 1017322810Shselasky return mlx5_query_hca_vport_gid(mdev, port, 0, index, gid); 1018322810Shselasky 1019322810Shselasky default: 1020322810Shselasky return -EINVAL; 1021322810Shselasky } 1022331769Shselasky 1023322810Shselasky} 1024322810Shselasky 1025322810Shselaskystatic int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 1026322810Shselasky u16 *pkey) 1027322810Shselasky{ 1028322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 1029322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 1030322810Shselasky 1031322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 1032322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 1033331769Shselasky return mlx5_query_mad_ifc_pkey(ibdev, port, index, pkey); 1034322810Shselasky 1035322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 1036322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 1037331769Shselasky return mlx5_query_hca_vport_pkey(mdev, 0, port, 0, index, 1038322810Shselasky pkey); 1039322810Shselasky default: 1040322810Shselasky return -EINVAL; 1041322810Shselasky } 1042322810Shselasky} 1043322810Shselasky 1044322810Shselaskystatic int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 1045322810Shselasky struct ib_device_modify *props) 1046322810Shselasky{ 1047322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 1048322810Shselasky struct mlx5_reg_node_desc in; 1049322810Shselasky struct mlx5_reg_node_desc out; 1050322810Shselasky int err; 1051322810Shselasky 1052322810Shselasky if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 1053322810Shselasky return -EOPNOTSUPP; 1054322810Shselasky 1055322810Shselasky if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 1056322810Shselasky return 0; 1057322810Shselasky 1058322810Shselasky /* 1059322810Shselasky * If possible, pass node desc to FW, so it can generate 1060322810Shselasky * a 144 trap. If cmd fails, just ignore. 1061322810Shselasky */ 1062331769Shselasky memcpy(&in, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1063322810Shselasky err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 1064322810Shselasky sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 1065322810Shselasky if (err) 1066322810Shselasky return err; 1067322810Shselasky 1068331769Shselasky memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1069322810Shselasky 1070322810Shselasky return err; 1071322810Shselasky} 1072322810Shselasky 1073322810Shselaskystatic int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 1074322810Shselasky struct ib_port_modify *props) 1075322810Shselasky{ 1076322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 1077322810Shselasky struct ib_port_attr attr; 1078322810Shselasky u32 tmp; 1079322810Shselasky int err; 1080322810Shselasky 1081347860Shselasky /* 1082347860Shselasky * CM layer calls ib_modify_port() regardless of the link 1083347860Shselasky * layer. For Ethernet ports, qkey violation and Port 1084347860Shselasky * capabilities are meaningless. 1085347860Shselasky */ 1086347860Shselasky if (mlx5_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_ETHERNET) 1087347860Shselasky return 0; 1088347860Shselasky 1089322810Shselasky mutex_lock(&dev->cap_mask_mutex); 1090322810Shselasky 1091322810Shselasky err = mlx5_ib_query_port(ibdev, port, &attr); 1092322810Shselasky if (err) 1093322810Shselasky goto out; 1094322810Shselasky 1095322810Shselasky tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 1096322810Shselasky ~props->clr_port_cap_mask; 1097322810Shselasky 1098322810Shselasky err = mlx5_set_port_caps(dev->mdev, port, tmp); 1099322810Shselasky 1100322810Shselaskyout: 1101322810Shselasky mutex_unlock(&dev->cap_mask_mutex); 1102322810Shselasky return err; 1103322810Shselasky} 1104322810Shselasky 1105322810Shselaskystatic struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 1106322810Shselasky struct ib_udata *udata) 1107322810Shselasky{ 1108322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 1109331769Shselasky struct mlx5_ib_alloc_ucontext_req_v2 req = {}; 1110331769Shselasky struct mlx5_ib_alloc_ucontext_resp resp = {}; 1111322810Shselasky struct mlx5_ib_ucontext *context; 1112322810Shselasky struct mlx5_uuar_info *uuari; 1113322810Shselasky struct mlx5_uar *uars; 1114322810Shselasky int gross_uuars; 1115322810Shselasky int num_uars; 1116322810Shselasky int ver; 1117322810Shselasky int uuarn; 1118322810Shselasky int err; 1119322810Shselasky int i; 1120322810Shselasky size_t reqlen; 1121331769Shselasky size_t min_req_v2 = offsetof(struct mlx5_ib_alloc_ucontext_req_v2, 1122331769Shselasky max_cqe_version); 1123322810Shselasky 1124322810Shselasky if (!dev->ib_active) 1125322810Shselasky return ERR_PTR(-EAGAIN); 1126322810Shselasky 1127331769Shselasky if (udata->inlen < sizeof(struct ib_uverbs_cmd_hdr)) 1128331769Shselasky return ERR_PTR(-EINVAL); 1129322810Shselasky 1130322810Shselasky reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 1131322810Shselasky if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 1132322810Shselasky ver = 0; 1133331769Shselasky else if (reqlen >= min_req_v2) 1134322810Shselasky ver = 2; 1135331769Shselasky else 1136322810Shselasky return ERR_PTR(-EINVAL); 1137322810Shselasky 1138331769Shselasky err = ib_copy_from_udata(&req, udata, min(reqlen, sizeof(req))); 1139331769Shselasky if (err) 1140322810Shselasky return ERR_PTR(err); 1141322810Shselasky 1142331769Shselasky if (req.flags) 1143322810Shselasky return ERR_PTR(-EINVAL); 1144322810Shselasky 1145331769Shselasky if (req.total_num_uuars > MLX5_MAX_UUARS) 1146322810Shselasky return ERR_PTR(-ENOMEM); 1147322810Shselasky 1148331769Shselasky if (req.total_num_uuars == 0) 1149331769Shselasky return ERR_PTR(-EINVAL); 1150331769Shselasky 1151331769Shselasky if (req.comp_mask || req.reserved0 || req.reserved1 || req.reserved2) 1152331769Shselasky return ERR_PTR(-EOPNOTSUPP); 1153331769Shselasky 1154331769Shselasky if (reqlen > sizeof(req) && 1155331769Shselasky !ib_is_udata_cleared(udata, sizeof(req), 1156331769Shselasky reqlen - sizeof(req))) 1157331769Shselasky return ERR_PTR(-EOPNOTSUPP); 1158331769Shselasky 1159322810Shselasky req.total_num_uuars = ALIGN(req.total_num_uuars, 1160322810Shselasky MLX5_NON_FP_BF_REGS_PER_PAGE); 1161331769Shselasky if (req.num_low_latency_uuars > req.total_num_uuars - 1) 1162322810Shselasky return ERR_PTR(-EINVAL); 1163322810Shselasky 1164322810Shselasky num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 1165322810Shselasky gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 1166322810Shselasky resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); 1167322810Shselasky if (mlx5_core_is_pf(dev->mdev) && MLX5_CAP_GEN(dev->mdev, bf)) 1168322810Shselasky resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); 1169331769Shselasky resp.cache_line_size = cache_line_size(); 1170322810Shselasky resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); 1171322810Shselasky resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); 1172322810Shselasky resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 1173322810Shselasky resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 1174322810Shselasky resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); 1175331769Shselasky resp.cqe_version = min_t(__u8, 1176331769Shselasky (__u8)MLX5_CAP_GEN(dev->mdev, cqe_version), 1177331769Shselasky req.max_cqe_version); 1178331769Shselasky resp.response_length = min(offsetof(typeof(resp), response_length) + 1179331769Shselasky sizeof(resp.response_length), udata->outlen); 1180322810Shselasky 1181322810Shselasky context = kzalloc(sizeof(*context), GFP_KERNEL); 1182322810Shselasky if (!context) 1183322810Shselasky return ERR_PTR(-ENOMEM); 1184322810Shselasky 1185322810Shselasky uuari = &context->uuari; 1186322810Shselasky mutex_init(&uuari->lock); 1187322810Shselasky uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 1188322810Shselasky if (!uars) { 1189322810Shselasky err = -ENOMEM; 1190322810Shselasky goto out_ctx; 1191322810Shselasky } 1192322810Shselasky 1193322810Shselasky uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 1194322810Shselasky sizeof(*uuari->bitmap), 1195322810Shselasky GFP_KERNEL); 1196322810Shselasky if (!uuari->bitmap) { 1197322810Shselasky err = -ENOMEM; 1198322810Shselasky goto out_uar_ctx; 1199322810Shselasky } 1200322810Shselasky /* 1201322810Shselasky * clear all fast path uuars 1202322810Shselasky */ 1203322810Shselasky for (i = 0; i < gross_uuars; i++) { 1204322810Shselasky uuarn = i & 3; 1205322810Shselasky if (uuarn == 2 || uuarn == 3) 1206322810Shselasky set_bit(i, uuari->bitmap); 1207322810Shselasky } 1208322810Shselasky 1209322810Shselasky uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 1210322810Shselasky if (!uuari->count) { 1211322810Shselasky err = -ENOMEM; 1212322810Shselasky goto out_bitmap; 1213322810Shselasky } 1214322810Shselasky 1215322810Shselasky for (i = 0; i < num_uars; i++) { 1216322810Shselasky err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 1217331769Shselasky if (err) 1218331769Shselasky goto out_count; 1219331769Shselasky } 1220331769Shselasky 1221331769Shselasky#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 1222331769Shselasky context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; 1223331769Shselasky#endif 1224331769Shselasky 1225331769Shselasky if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) { 1226331769Shselasky err = mlx5_alloc_transport_domain(dev->mdev, 1227331769Shselasky &context->tdn); 1228331769Shselasky if (err) 1229322810Shselasky goto out_uars; 1230322810Shselasky } 1231322810Shselasky 1232331769Shselasky INIT_LIST_HEAD(&context->vma_private_list); 1233322810Shselasky INIT_LIST_HEAD(&context->db_page_list); 1234322810Shselasky mutex_init(&context->db_page_mutex); 1235322810Shselasky 1236322810Shselasky resp.tot_uuars = req.total_num_uuars; 1237322810Shselasky resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports); 1238331769Shselasky 1239331769Shselasky if (field_avail(typeof(resp), cqe_version, udata->outlen)) 1240331769Shselasky resp.response_length += sizeof(resp.cqe_version); 1241331769Shselasky 1242331769Shselasky if (field_avail(typeof(resp), cmds_supp_uhw, udata->outlen)) { 1243331784Shselasky resp.cmds_supp_uhw |= MLX5_USER_CMDS_SUPP_UHW_QUERY_DEVICE | 1244331784Shselasky MLX5_USER_CMDS_SUPP_UHW_CREATE_AH; 1245331769Shselasky resp.response_length += sizeof(resp.cmds_supp_uhw); 1246331769Shselasky } 1247331769Shselasky 1248331769Shselasky /* 1249331769Shselasky * We don't want to expose information from the PCI bar that is located 1250331769Shselasky * after 4096 bytes, so if the arch only supports larger pages, let's 1251331769Shselasky * pretend we don't support reading the HCA's core clock. This is also 1252331769Shselasky * forced by mmap function. 1253331769Shselasky */ 1254331769Shselasky if (PAGE_SIZE <= 4096 && 1255331769Shselasky field_avail(typeof(resp), hca_core_clock_offset, udata->outlen)) { 1256331769Shselasky resp.comp_mask |= 1257331769Shselasky MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET; 1258331769Shselasky resp.hca_core_clock_offset = 1259331769Shselasky offsetof(struct mlx5_init_seg, internal_timer_h) % 1260331769Shselasky PAGE_SIZE; 1261331769Shselasky resp.response_length += sizeof(resp.hca_core_clock_offset) + 1262331769Shselasky sizeof(resp.reserved2); 1263331769Shselasky } 1264331769Shselasky 1265331769Shselasky err = ib_copy_to_udata(udata, &resp, resp.response_length); 1266322810Shselasky if (err) 1267331769Shselasky goto out_td; 1268322810Shselasky 1269322810Shselasky uuari->ver = ver; 1270322810Shselasky uuari->num_low_latency_uuars = req.num_low_latency_uuars; 1271322810Shselasky uuari->uars = uars; 1272322810Shselasky uuari->num_uars = num_uars; 1273331769Shselasky context->cqe_version = resp.cqe_version; 1274322810Shselasky 1275322810Shselasky return &context->ibucontext; 1276322810Shselasky 1277331769Shselaskyout_td: 1278331769Shselasky if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) 1279331769Shselasky mlx5_dealloc_transport_domain(dev->mdev, context->tdn); 1280331769Shselasky 1281322810Shselaskyout_uars: 1282322810Shselasky for (i--; i >= 0; i--) 1283322810Shselasky mlx5_cmd_free_uar(dev->mdev, uars[i].index); 1284331769Shselaskyout_count: 1285322810Shselasky kfree(uuari->count); 1286322810Shselasky 1287322810Shselaskyout_bitmap: 1288322810Shselasky kfree(uuari->bitmap); 1289322810Shselasky 1290322810Shselaskyout_uar_ctx: 1291322810Shselasky kfree(uars); 1292322810Shselasky 1293322810Shselaskyout_ctx: 1294322810Shselasky kfree(context); 1295322810Shselasky return ERR_PTR(err); 1296322810Shselasky} 1297322810Shselasky 1298322810Shselaskystatic int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1299322810Shselasky{ 1300322810Shselasky struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 1301322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 1302322810Shselasky struct mlx5_uuar_info *uuari = &context->uuari; 1303322810Shselasky int i; 1304322810Shselasky 1305331769Shselasky if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) 1306322810Shselasky mlx5_dealloc_transport_domain(dev->mdev, context->tdn); 1307322810Shselasky 1308322810Shselasky for (i = 0; i < uuari->num_uars; i++) { 1309322810Shselasky if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 1310322810Shselasky mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 1311322810Shselasky } 1312322810Shselasky 1313322810Shselasky kfree(uuari->count); 1314322810Shselasky kfree(uuari->bitmap); 1315322810Shselasky kfree(uuari->uars); 1316322810Shselasky kfree(context); 1317322810Shselasky 1318322810Shselasky return 0; 1319322810Shselasky} 1320322810Shselasky 1321322810Shselaskystatic phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 1322322810Shselasky{ 1323322810Shselasky return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 1324322810Shselasky} 1325322810Shselasky 1326322810Shselaskystatic int get_command(unsigned long offset) 1327322810Shselasky{ 1328322810Shselasky return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 1329322810Shselasky} 1330322810Shselasky 1331322810Shselaskystatic int get_arg(unsigned long offset) 1332322810Shselasky{ 1333322810Shselasky return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 1334322810Shselasky} 1335322810Shselasky 1336322810Shselaskystatic int get_index(unsigned long offset) 1337322810Shselasky{ 1338322810Shselasky return get_arg(offset); 1339322810Shselasky} 1340322810Shselasky 1341331769Shselaskystatic void mlx5_ib_vma_open(struct vm_area_struct *area) 1342331769Shselasky{ 1343331769Shselasky /* vma_open is called when a new VMA is created on top of our VMA. This 1344331769Shselasky * is done through either mremap flow or split_vma (usually due to 1345331769Shselasky * mlock, madvise, munmap, etc.) We do not support a clone of the VMA, 1346331769Shselasky * as this VMA is strongly hardware related. Therefore we set the 1347331769Shselasky * vm_ops of the newly created/cloned VMA to NULL, to prevent it from 1348331769Shselasky * calling us again and trying to do incorrect actions. We assume that 1349331769Shselasky * the original VMA size is exactly a single page, and therefore all 1350331769Shselasky * "splitting" operation will not happen to it. 1351331769Shselasky */ 1352331769Shselasky area->vm_ops = NULL; 1353331769Shselasky} 1354331769Shselasky 1355331769Shselaskystatic void mlx5_ib_vma_close(struct vm_area_struct *area) 1356331769Shselasky{ 1357331769Shselasky struct mlx5_ib_vma_private_data *mlx5_ib_vma_priv_data; 1358331769Shselasky 1359331769Shselasky /* It's guaranteed that all VMAs opened on a FD are closed before the 1360331769Shselasky * file itself is closed, therefore no sync is needed with the regular 1361331769Shselasky * closing flow. (e.g. mlx5 ib_dealloc_ucontext) 1362331769Shselasky * However need a sync with accessing the vma as part of 1363331769Shselasky * mlx5_ib_disassociate_ucontext. 1364331769Shselasky * The close operation is usually called under mm->mmap_sem except when 1365331769Shselasky * process is exiting. 1366331769Shselasky * The exiting case is handled explicitly as part of 1367331769Shselasky * mlx5_ib_disassociate_ucontext. 1368331769Shselasky */ 1369331769Shselasky mlx5_ib_vma_priv_data = (struct mlx5_ib_vma_private_data *)area->vm_private_data; 1370331769Shselasky 1371331769Shselasky /* setting the vma context pointer to null in the mlx5_ib driver's 1372331769Shselasky * private data, to protect a race condition in 1373331769Shselasky * mlx5_ib_disassociate_ucontext(). 1374331769Shselasky */ 1375331769Shselasky mlx5_ib_vma_priv_data->vma = NULL; 1376331769Shselasky list_del(&mlx5_ib_vma_priv_data->list); 1377331769Shselasky kfree(mlx5_ib_vma_priv_data); 1378331769Shselasky} 1379331769Shselasky 1380331769Shselaskystatic const struct vm_operations_struct mlx5_ib_vm_ops = { 1381331769Shselasky .open = mlx5_ib_vma_open, 1382331769Shselasky .close = mlx5_ib_vma_close 1383331769Shselasky}; 1384331769Shselasky 1385331769Shselaskystatic int mlx5_ib_set_vma_data(struct vm_area_struct *vma, 1386331769Shselasky struct mlx5_ib_ucontext *ctx) 1387331769Shselasky{ 1388331769Shselasky struct mlx5_ib_vma_private_data *vma_prv; 1389331769Shselasky struct list_head *vma_head = &ctx->vma_private_list; 1390331769Shselasky 1391331769Shselasky vma_prv = kzalloc(sizeof(*vma_prv), GFP_KERNEL); 1392331769Shselasky if (!vma_prv) 1393331769Shselasky return -ENOMEM; 1394331769Shselasky 1395331769Shselasky vma_prv->vma = vma; 1396331769Shselasky vma->vm_private_data = vma_prv; 1397331769Shselasky vma->vm_ops = &mlx5_ib_vm_ops; 1398331769Shselasky 1399331769Shselasky list_add(&vma_prv->list, vma_head); 1400331769Shselasky 1401331769Shselasky return 0; 1402331769Shselasky} 1403331769Shselasky 1404347801Shselaskystatic void mlx5_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1405347801Shselasky{ 1406347801Shselasky int ret; 1407347801Shselasky struct vm_area_struct *vma; 1408347801Shselasky struct mlx5_ib_vma_private_data *vma_private, *n; 1409347801Shselasky struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 1410347801Shselasky struct task_struct *owning_process = NULL; 1411347801Shselasky struct mm_struct *owning_mm = NULL; 1412347801Shselasky 1413347801Shselasky owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID); 1414347801Shselasky if (!owning_process) 1415347801Shselasky return; 1416347801Shselasky 1417347801Shselasky owning_mm = get_task_mm(owning_process); 1418347801Shselasky if (!owning_mm) { 1419347801Shselasky pr_info("no mm, disassociate ucontext is pending task termination\n"); 1420347801Shselasky while (1) { 1421347801Shselasky put_task_struct(owning_process); 1422347801Shselasky usleep_range(1000, 2000); 1423347801Shselasky owning_process = get_pid_task(ibcontext->tgid, 1424347801Shselasky PIDTYPE_PID); 1425347801Shselasky if (!owning_process || owning_process->task_thread-> 1426347801Shselasky td_proc->p_state == PRS_ZOMBIE) { 1427347801Shselasky pr_info("disassociate ucontext done, task was terminated\n"); 1428347801Shselasky /* in case task was dead need to release the 1429347801Shselasky * task struct. 1430347801Shselasky */ 1431347801Shselasky if (owning_process) 1432347801Shselasky put_task_struct(owning_process); 1433347801Shselasky return; 1434347801Shselasky } 1435347801Shselasky } 1436347801Shselasky } 1437347801Shselasky 1438347801Shselasky /* need to protect from a race on closing the vma as part of 1439347801Shselasky * mlx5_ib_vma_close. 1440347801Shselasky */ 1441347801Shselasky down_write(&owning_mm->mmap_sem); 1442347801Shselasky list_for_each_entry_safe(vma_private, n, &context->vma_private_list, 1443347801Shselasky list) { 1444347801Shselasky vma = vma_private->vma; 1445347801Shselasky ret = zap_vma_ptes(vma, vma->vm_start, 1446347801Shselasky PAGE_SIZE); 1447347801Shselasky if (ret == -ENOTSUP) { 1448347801Shselasky if (bootverbose) 1449347801Shselasky WARN_ONCE( 1450347801Shselasky "%s: zap_vma_ptes not implemented for unmanaged mappings", __func__); 1451347801Shselasky } else { 1452347801Shselasky WARN(ret, "%s: zap_vma_ptes failed, error %d", 1453347801Shselasky __func__, -ret); 1454347801Shselasky } 1455347801Shselasky /* context going to be destroyed, should 1456347801Shselasky * not access ops any more. 1457347801Shselasky */ 1458347801Shselasky /* XXXKIB vma->vm_flags &= ~(VM_SHARED | VM_MAYSHARE); */ 1459347801Shselasky vma->vm_ops = NULL; 1460347801Shselasky list_del(&vma_private->list); 1461347801Shselasky kfree(vma_private); 1462347801Shselasky } 1463347801Shselasky up_write(&owning_mm->mmap_sem); 1464347801Shselasky mmput(owning_mm); 1465347801Shselasky put_task_struct(owning_process); 1466347801Shselasky} 1467347801Shselasky 1468331769Shselaskystatic inline char *mmap_cmd2str(enum mlx5_ib_mmap_cmd cmd) 1469331769Shselasky{ 1470331769Shselasky switch (cmd) { 1471331769Shselasky case MLX5_IB_MMAP_WC_PAGE: 1472331769Shselasky return "WC"; 1473331769Shselasky case MLX5_IB_MMAP_REGULAR_PAGE: 1474331769Shselasky return "best effort WC"; 1475331769Shselasky case MLX5_IB_MMAP_NC_PAGE: 1476331769Shselasky return "NC"; 1477331769Shselasky default: 1478331769Shselasky return NULL; 1479331769Shselasky } 1480331769Shselasky} 1481331769Shselasky 1482331769Shselaskystatic int uar_mmap(struct mlx5_ib_dev *dev, enum mlx5_ib_mmap_cmd cmd, 1483331769Shselasky struct vm_area_struct *vma, 1484322810Shselasky struct mlx5_ib_ucontext *context) 1485322810Shselasky{ 1486331769Shselasky struct mlx5_uuar_info *uuari = &context->uuari; 1487331769Shselasky int err; 1488322810Shselasky unsigned long idx; 1489331769Shselasky phys_addr_t pfn, pa; 1490331769Shselasky pgprot_t prot; 1491322810Shselasky 1492331769Shselasky switch (cmd) { 1493331769Shselasky case MLX5_IB_MMAP_WC_PAGE: 1494331769Shselasky/* Some architectures don't support WC memory */ 1495331769Shselasky#if defined(CONFIG_X86) 1496331769Shselasky if (!pat_enabled()) 1497331769Shselasky return -EPERM; 1498331769Shselasky#elif !(defined(CONFIG_PPC) || (defined(CONFIG_ARM) && defined(CONFIG_MMU))) 1499331769Shselasky return -EPERM; 1500331769Shselasky#endif 1501331769Shselasky /* fall through */ 1502331769Shselasky case MLX5_IB_MMAP_REGULAR_PAGE: 1503331769Shselasky /* For MLX5_IB_MMAP_REGULAR_PAGE do the best effort to get WC */ 1504331769Shselasky prot = pgprot_writecombine(vma->vm_page_prot); 1505331769Shselasky break; 1506331769Shselasky case MLX5_IB_MMAP_NC_PAGE: 1507331769Shselasky prot = pgprot_noncached(vma->vm_page_prot); 1508331769Shselasky break; 1509331769Shselasky default: 1510322810Shselasky return -EINVAL; 1511322810Shselasky } 1512322810Shselasky 1513331769Shselasky if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1514331769Shselasky return -EINVAL; 1515331769Shselasky 1516322810Shselasky idx = get_index(vma->vm_pgoff); 1517331769Shselasky if (idx >= uuari->num_uars) 1518322810Shselasky return -EINVAL; 1519322810Shselasky 1520322810Shselasky pfn = uar_index2pfn(dev, uuari->uars[idx].index); 1521331769Shselasky mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn %pa\n", idx, &pfn); 1522322810Shselasky 1523322810Shselasky vma->vm_page_prot = prot; 1524331769Shselasky err = io_remap_pfn_range(vma, vma->vm_start, pfn, 1525331769Shselasky PAGE_SIZE, vma->vm_page_prot); 1526331769Shselasky if (err) { 1527331769Shselasky mlx5_ib_err(dev, "io_remap_pfn_range failed with error=%d, vm_start=0x%llx, pfn=%pa, mmap_cmd=%s\n", 1528331769Shselasky err, (unsigned long long)vma->vm_start, &pfn, mmap_cmd2str(cmd)); 1529322810Shselasky return -EAGAIN; 1530322810Shselasky } 1531322810Shselasky 1532331769Shselasky pa = pfn << PAGE_SHIFT; 1533331769Shselasky mlx5_ib_dbg(dev, "mapped %s at 0x%llx, PA %pa\n", mmap_cmd2str(cmd), 1534331769Shselasky (unsigned long long)vma->vm_start, &pa); 1535322810Shselasky 1536331769Shselasky return mlx5_ib_set_vma_data(vma, context); 1537322810Shselasky} 1538322810Shselasky 1539322810Shselaskystatic int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 1540322810Shselasky{ 1541322810Shselasky struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 1542322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 1543322810Shselasky unsigned long command; 1544331769Shselasky phys_addr_t pfn; 1545322810Shselasky 1546322810Shselasky command = get_command(vma->vm_pgoff); 1547322810Shselasky switch (command) { 1548331769Shselasky case MLX5_IB_MMAP_WC_PAGE: 1549331769Shselasky case MLX5_IB_MMAP_NC_PAGE: 1550322810Shselasky case MLX5_IB_MMAP_REGULAR_PAGE: 1551331769Shselasky return uar_mmap(dev, command, vma, context); 1552322810Shselasky 1553331769Shselasky case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 1554331769Shselasky return -ENOSYS; 1555322810Shselasky 1556331769Shselasky case MLX5_IB_MMAP_CORE_CLOCK: 1557331769Shselasky if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1558331769Shselasky return -EINVAL; 1559322810Shselasky 1560331769Shselasky if (vma->vm_flags & VM_WRITE) 1561331769Shselasky return -EPERM; 1562331769Shselasky 1563331769Shselasky /* Don't expose to user-space information it shouldn't have */ 1564331769Shselasky if (PAGE_SIZE > 4096) 1565331769Shselasky return -EOPNOTSUPP; 1566331769Shselasky 1567331769Shselasky vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1568331769Shselasky pfn = (dev->mdev->iseg_base + 1569331769Shselasky offsetof(struct mlx5_init_seg, internal_timer_h)) >> 1570331769Shselasky PAGE_SHIFT; 1571331769Shselasky if (io_remap_pfn_range(vma, vma->vm_start, pfn, 1572331769Shselasky PAGE_SIZE, vma->vm_page_prot)) 1573331769Shselasky return -EAGAIN; 1574331769Shselasky 1575331769Shselasky mlx5_ib_dbg(dev, "mapped internal timer at 0x%llx, PA 0x%llx\n", 1576331769Shselasky (unsigned long long)vma->vm_start, 1577331769Shselasky (unsigned long long)pfn << PAGE_SHIFT); 1578322810Shselasky break; 1579322810Shselasky 1580322810Shselasky default: 1581322810Shselasky return -EINVAL; 1582322810Shselasky } 1583322810Shselasky 1584322810Shselasky return 0; 1585322810Shselasky} 1586322810Shselasky 1587322810Shselaskystatic struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 1588322810Shselasky struct ib_ucontext *context, 1589322810Shselasky struct ib_udata *udata) 1590322810Shselasky{ 1591322810Shselasky struct mlx5_ib_alloc_pd_resp resp; 1592322810Shselasky struct mlx5_ib_pd *pd; 1593322810Shselasky int err; 1594322810Shselasky 1595322810Shselasky pd = kmalloc(sizeof(*pd), GFP_KERNEL); 1596322810Shselasky if (!pd) 1597322810Shselasky return ERR_PTR(-ENOMEM); 1598322810Shselasky 1599322810Shselasky err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 1600322810Shselasky if (err) { 1601322810Shselasky kfree(pd); 1602322810Shselasky return ERR_PTR(err); 1603322810Shselasky } 1604322810Shselasky 1605322810Shselasky if (context) { 1606322810Shselasky resp.pdn = pd->pdn; 1607322810Shselasky if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 1608322810Shselasky mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 1609322810Shselasky kfree(pd); 1610322810Shselasky return ERR_PTR(-EFAULT); 1611322810Shselasky } 1612322810Shselasky } 1613322810Shselasky 1614322810Shselasky return &pd->ibpd; 1615322810Shselasky} 1616322810Shselasky 1617322810Shselaskystatic int mlx5_ib_dealloc_pd(struct ib_pd *pd) 1618322810Shselasky{ 1619322810Shselasky struct mlx5_ib_dev *mdev = to_mdev(pd->device); 1620322810Shselasky struct mlx5_ib_pd *mpd = to_mpd(pd); 1621322810Shselasky 1622322810Shselasky mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 1623322810Shselasky kfree(mpd); 1624322810Shselasky 1625322810Shselasky return 0; 1626322810Shselasky} 1627322810Shselasky 1628331769Shselaskyenum { 1629331769Shselasky MATCH_CRITERIA_ENABLE_OUTER_BIT, 1630331769Shselasky MATCH_CRITERIA_ENABLE_MISC_BIT, 1631331769Shselasky MATCH_CRITERIA_ENABLE_INNER_BIT 1632331769Shselasky}; 1633331769Shselasky 1634331769Shselasky#define HEADER_IS_ZERO(match_criteria, headers) \ 1635331769Shselasky !(memchr_inv(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \ 1636331769Shselasky 0, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \ 1637331769Shselasky 1638331769Shselaskystatic u8 get_match_criteria_enable(u32 *match_criteria) 1639331769Shselasky{ 1640331769Shselasky u8 match_criteria_enable; 1641331769Shselasky 1642331769Shselasky match_criteria_enable = 1643331769Shselasky (!HEADER_IS_ZERO(match_criteria, outer_headers)) << 1644331769Shselasky MATCH_CRITERIA_ENABLE_OUTER_BIT; 1645331769Shselasky match_criteria_enable |= 1646331769Shselasky (!HEADER_IS_ZERO(match_criteria, misc_parameters)) << 1647331769Shselasky MATCH_CRITERIA_ENABLE_MISC_BIT; 1648331769Shselasky match_criteria_enable |= 1649331769Shselasky (!HEADER_IS_ZERO(match_criteria, inner_headers)) << 1650331769Shselasky MATCH_CRITERIA_ENABLE_INNER_BIT; 1651331769Shselasky 1652331769Shselasky return match_criteria_enable; 1653331769Shselasky} 1654331769Shselasky 1655331769Shselaskystatic void set_proto(void *outer_c, void *outer_v, u8 mask, u8 val) 1656331769Shselasky{ 1657331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_c, ip_protocol, mask); 1658331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_protocol, val); 1659331769Shselasky} 1660331769Shselasky 1661331769Shselaskystatic void set_tos(void *outer_c, void *outer_v, u8 mask, u8 val) 1662331769Shselasky{ 1663331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_c, ip_ecn, mask); 1664331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_ecn, val); 1665331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_c, ip_dscp, mask >> 2); 1666331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_dscp, val >> 2); 1667331769Shselasky} 1668331769Shselasky 1669331769Shselasky#define LAST_ETH_FIELD vlan_tag 1670331769Shselasky#define LAST_IB_FIELD sl 1671331769Shselasky#define LAST_IPV4_FIELD tos 1672331769Shselasky#define LAST_IPV6_FIELD traffic_class 1673331769Shselasky#define LAST_TCP_UDP_FIELD src_port 1674331769Shselasky 1675331769Shselasky/* Field is the last supported field */ 1676331769Shselasky#define FIELDS_NOT_SUPPORTED(filter, field)\ 1677331769Shselasky memchr_inv((void *)&filter.field +\ 1678331769Shselasky sizeof(filter.field), 0,\ 1679331769Shselasky sizeof(filter) -\ 1680331769Shselasky offsetof(typeof(filter), field) -\ 1681331769Shselasky sizeof(filter.field)) 1682331769Shselasky 1683331769Shselaskystatic int parse_flow_attr(u32 *match_c, u32 *match_v, 1684331769Shselasky const union ib_flow_spec *ib_spec) 1685331769Shselasky{ 1686331769Shselasky void *outer_headers_c = MLX5_ADDR_OF(fte_match_param, match_c, 1687331769Shselasky outer_headers); 1688331769Shselasky void *outer_headers_v = MLX5_ADDR_OF(fte_match_param, match_v, 1689331769Shselasky outer_headers); 1690331769Shselasky void *misc_params_c = MLX5_ADDR_OF(fte_match_param, match_c, 1691331769Shselasky misc_parameters); 1692331769Shselasky void *misc_params_v = MLX5_ADDR_OF(fte_match_param, match_v, 1693331769Shselasky misc_parameters); 1694331769Shselasky 1695331769Shselasky switch (ib_spec->type) { 1696331769Shselasky case IB_FLOW_SPEC_ETH: 1697331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1698331769Shselasky return -ENOTSUPP; 1699331769Shselasky 1700331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1701331769Shselasky dmac_47_16), 1702331769Shselasky ib_spec->eth.mask.dst_mac); 1703331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1704331769Shselasky dmac_47_16), 1705331769Shselasky ib_spec->eth.val.dst_mac); 1706331769Shselasky 1707331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1708331769Shselasky smac_47_16), 1709331769Shselasky ib_spec->eth.mask.src_mac); 1710331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1711331769Shselasky smac_47_16), 1712331769Shselasky ib_spec->eth.val.src_mac); 1713331769Shselasky 1714331769Shselasky if (ib_spec->eth.mask.vlan_tag) { 1715331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1716331769Shselasky cvlan_tag, 1); 1717331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1718331769Shselasky cvlan_tag, 1); 1719331769Shselasky 1720331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1721331769Shselasky first_vid, ntohs(ib_spec->eth.mask.vlan_tag)); 1722331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1723331769Shselasky first_vid, ntohs(ib_spec->eth.val.vlan_tag)); 1724331769Shselasky 1725331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1726331769Shselasky first_cfi, 1727331769Shselasky ntohs(ib_spec->eth.mask.vlan_tag) >> 12); 1728331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1729331769Shselasky first_cfi, 1730331769Shselasky ntohs(ib_spec->eth.val.vlan_tag) >> 12); 1731331769Shselasky 1732331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1733331769Shselasky first_prio, 1734331769Shselasky ntohs(ib_spec->eth.mask.vlan_tag) >> 13); 1735331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1736331769Shselasky first_prio, 1737331769Shselasky ntohs(ib_spec->eth.val.vlan_tag) >> 13); 1738331769Shselasky } 1739331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1740331769Shselasky ethertype, ntohs(ib_spec->eth.mask.ether_type)); 1741331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1742331769Shselasky ethertype, ntohs(ib_spec->eth.val.ether_type)); 1743331769Shselasky break; 1744331769Shselasky case IB_FLOW_SPEC_IPV4: 1745331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1746331769Shselasky return -ENOTSUPP; 1747331769Shselasky 1748331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1749331769Shselasky ethertype, 0xffff); 1750331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1751331769Shselasky ethertype, ETH_P_IP); 1752331769Shselasky 1753331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1754331769Shselasky src_ipv4_src_ipv6.ipv4_layout.ipv4), 1755331769Shselasky &ib_spec->ipv4.mask.src_ip, 1756331769Shselasky sizeof(ib_spec->ipv4.mask.src_ip)); 1757331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1758331769Shselasky src_ipv4_src_ipv6.ipv4_layout.ipv4), 1759331769Shselasky &ib_spec->ipv4.val.src_ip, 1760331769Shselasky sizeof(ib_spec->ipv4.val.src_ip)); 1761331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1762331769Shselasky dst_ipv4_dst_ipv6.ipv4_layout.ipv4), 1763331769Shselasky &ib_spec->ipv4.mask.dst_ip, 1764331769Shselasky sizeof(ib_spec->ipv4.mask.dst_ip)); 1765331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1766331769Shselasky dst_ipv4_dst_ipv6.ipv4_layout.ipv4), 1767331769Shselasky &ib_spec->ipv4.val.dst_ip, 1768331769Shselasky sizeof(ib_spec->ipv4.val.dst_ip)); 1769331769Shselasky 1770331769Shselasky set_tos(outer_headers_c, outer_headers_v, 1771331769Shselasky ib_spec->ipv4.mask.tos, ib_spec->ipv4.val.tos); 1772331769Shselasky 1773331769Shselasky set_proto(outer_headers_c, outer_headers_v, 1774331769Shselasky ib_spec->ipv4.mask.proto, ib_spec->ipv4.val.proto); 1775331769Shselasky break; 1776331769Shselasky case IB_FLOW_SPEC_IPV6: 1777331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->ipv6.mask, LAST_IPV6_FIELD)) 1778331769Shselasky return -ENOTSUPP; 1779331769Shselasky 1780331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1781331769Shselasky ethertype, 0xffff); 1782331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1783331769Shselasky ethertype, IPPROTO_IPV6); 1784331769Shselasky 1785331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1786331769Shselasky src_ipv4_src_ipv6.ipv6_layout.ipv6), 1787331769Shselasky &ib_spec->ipv6.mask.src_ip, 1788331769Shselasky sizeof(ib_spec->ipv6.mask.src_ip)); 1789331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1790331769Shselasky src_ipv4_src_ipv6.ipv6_layout.ipv6), 1791331769Shselasky &ib_spec->ipv6.val.src_ip, 1792331769Shselasky sizeof(ib_spec->ipv6.val.src_ip)); 1793331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1794331769Shselasky dst_ipv4_dst_ipv6.ipv6_layout.ipv6), 1795331769Shselasky &ib_spec->ipv6.mask.dst_ip, 1796331769Shselasky sizeof(ib_spec->ipv6.mask.dst_ip)); 1797331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1798331769Shselasky dst_ipv4_dst_ipv6.ipv6_layout.ipv6), 1799331769Shselasky &ib_spec->ipv6.val.dst_ip, 1800331769Shselasky sizeof(ib_spec->ipv6.val.dst_ip)); 1801331769Shselasky 1802331769Shselasky set_tos(outer_headers_c, outer_headers_v, 1803331769Shselasky ib_spec->ipv6.mask.traffic_class, 1804331769Shselasky ib_spec->ipv6.val.traffic_class); 1805331769Shselasky 1806331769Shselasky set_proto(outer_headers_c, outer_headers_v, 1807331769Shselasky ib_spec->ipv6.mask.next_hdr, 1808331769Shselasky ib_spec->ipv6.val.next_hdr); 1809331769Shselasky 1810331769Shselasky MLX5_SET(fte_match_set_misc, misc_params_c, 1811331769Shselasky outer_ipv6_flow_label, 1812331769Shselasky ntohl(ib_spec->ipv6.mask.flow_label)); 1813331769Shselasky MLX5_SET(fte_match_set_misc, misc_params_v, 1814331769Shselasky outer_ipv6_flow_label, 1815331769Shselasky ntohl(ib_spec->ipv6.val.flow_label)); 1816331769Shselasky break; 1817331769Shselasky case IB_FLOW_SPEC_TCP: 1818331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, 1819331769Shselasky LAST_TCP_UDP_FIELD)) 1820331769Shselasky return -ENOTSUPP; 1821331769Shselasky 1822331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, ip_protocol, 1823331769Shselasky 0xff); 1824331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, ip_protocol, 1825331769Shselasky IPPROTO_TCP); 1826331769Shselasky 1827331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, tcp_sport, 1828331769Shselasky ntohs(ib_spec->tcp_udp.mask.src_port)); 1829331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, tcp_sport, 1830331769Shselasky ntohs(ib_spec->tcp_udp.val.src_port)); 1831331769Shselasky 1832331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, tcp_dport, 1833331769Shselasky ntohs(ib_spec->tcp_udp.mask.dst_port)); 1834331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, tcp_dport, 1835331769Shselasky ntohs(ib_spec->tcp_udp.val.dst_port)); 1836331769Shselasky break; 1837331769Shselasky case IB_FLOW_SPEC_UDP: 1838331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, 1839331769Shselasky LAST_TCP_UDP_FIELD)) 1840331769Shselasky return -ENOTSUPP; 1841331769Shselasky 1842331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, ip_protocol, 1843331769Shselasky 0xff); 1844331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, ip_protocol, 1845331769Shselasky IPPROTO_UDP); 1846331769Shselasky 1847331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, udp_sport, 1848331769Shselasky ntohs(ib_spec->tcp_udp.mask.src_port)); 1849331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, udp_sport, 1850331769Shselasky ntohs(ib_spec->tcp_udp.val.src_port)); 1851331769Shselasky 1852331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, udp_dport, 1853331769Shselasky ntohs(ib_spec->tcp_udp.mask.dst_port)); 1854331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, udp_dport, 1855331769Shselasky ntohs(ib_spec->tcp_udp.val.dst_port)); 1856331769Shselasky break; 1857331769Shselasky default: 1858331769Shselasky return -EINVAL; 1859331769Shselasky } 1860331769Shselasky 1861331769Shselasky return 0; 1862331769Shselasky} 1863331769Shselasky 1864331769Shselasky/* If a flow could catch both multicast and unicast packets, 1865331769Shselasky * it won't fall into the multicast flow steering table and this rule 1866331769Shselasky * could steal other multicast packets. 1867331769Shselasky */ 1868331769Shselaskystatic bool flow_is_multicast_only(struct ib_flow_attr *ib_attr) 1869331769Shselasky{ 1870331769Shselasky struct ib_flow_spec_eth *eth_spec; 1871331769Shselasky 1872331769Shselasky if (ib_attr->type != IB_FLOW_ATTR_NORMAL || 1873331769Shselasky ib_attr->size < sizeof(struct ib_flow_attr) + 1874331769Shselasky sizeof(struct ib_flow_spec_eth) || 1875331769Shselasky ib_attr->num_of_specs < 1) 1876331769Shselasky return false; 1877331769Shselasky 1878331769Shselasky eth_spec = (struct ib_flow_spec_eth *)(ib_attr + 1); 1879331769Shselasky if (eth_spec->type != IB_FLOW_SPEC_ETH || 1880331769Shselasky eth_spec->size != sizeof(*eth_spec)) 1881331769Shselasky return false; 1882331769Shselasky 1883331769Shselasky return is_multicast_ether_addr(eth_spec->mask.dst_mac) && 1884331769Shselasky is_multicast_ether_addr(eth_spec->val.dst_mac); 1885331769Shselasky} 1886331769Shselasky 1887331769Shselaskystatic bool is_valid_attr(const struct ib_flow_attr *flow_attr) 1888331769Shselasky{ 1889331769Shselasky union ib_flow_spec *ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1890331769Shselasky bool has_ipv4_spec = false; 1891331769Shselasky bool eth_type_ipv4 = true; 1892331769Shselasky unsigned int spec_index; 1893331769Shselasky 1894331769Shselasky /* Validate that ethertype is correct */ 1895331769Shselasky for (spec_index = 0; spec_index < flow_attr->num_of_specs; spec_index++) { 1896331769Shselasky if (ib_spec->type == IB_FLOW_SPEC_ETH && 1897331769Shselasky ib_spec->eth.mask.ether_type) { 1898331769Shselasky if (!((ib_spec->eth.mask.ether_type == htons(0xffff)) && 1899331769Shselasky ib_spec->eth.val.ether_type == htons(ETH_P_IP))) 1900331769Shselasky eth_type_ipv4 = false; 1901331769Shselasky } else if (ib_spec->type == IB_FLOW_SPEC_IPV4) { 1902331769Shselasky has_ipv4_spec = true; 1903331769Shselasky } 1904331769Shselasky ib_spec = (void *)ib_spec + ib_spec->size; 1905331769Shselasky } 1906331769Shselasky return !has_ipv4_spec || eth_type_ipv4; 1907331769Shselasky} 1908331769Shselasky 1909331769Shselaskystatic void put_flow_table(struct mlx5_ib_dev *dev, 1910331769Shselasky struct mlx5_ib_flow_prio *prio, bool ft_added) 1911331769Shselasky{ 1912331769Shselasky prio->refcount -= !!ft_added; 1913331769Shselasky if (!prio->refcount) { 1914331769Shselasky mlx5_destroy_flow_table(prio->flow_table); 1915331769Shselasky prio->flow_table = NULL; 1916331769Shselasky } 1917331769Shselasky} 1918331769Shselasky 1919331769Shselaskystatic int mlx5_ib_destroy_flow(struct ib_flow *flow_id) 1920331769Shselasky{ 1921331769Shselasky struct mlx5_ib_dev *dev = to_mdev(flow_id->qp->device); 1922331769Shselasky struct mlx5_ib_flow_handler *handler = container_of(flow_id, 1923331769Shselasky struct mlx5_ib_flow_handler, 1924331769Shselasky ibflow); 1925331769Shselasky struct mlx5_ib_flow_handler *iter, *tmp; 1926331769Shselasky 1927331769Shselasky mutex_lock(&dev->flow_db.lock); 1928331769Shselasky 1929331769Shselasky list_for_each_entry_safe(iter, tmp, &handler->list, list) { 1930331769Shselasky mlx5_del_flow_rule(iter->rule); 1931331769Shselasky put_flow_table(dev, iter->prio, true); 1932331769Shselasky list_del(&iter->list); 1933331769Shselasky kfree(iter); 1934331769Shselasky } 1935331769Shselasky 1936331769Shselasky mlx5_del_flow_rule(handler->rule); 1937331769Shselasky put_flow_table(dev, handler->prio, true); 1938331769Shselasky mutex_unlock(&dev->flow_db.lock); 1939331769Shselasky 1940331769Shselasky kfree(handler); 1941331769Shselasky 1942331769Shselasky return 0; 1943331769Shselasky} 1944331769Shselasky 1945331769Shselaskystatic int ib_prio_to_core_prio(unsigned int priority, bool dont_trap) 1946331769Shselasky{ 1947331769Shselasky priority *= 2; 1948331769Shselasky if (!dont_trap) 1949331769Shselasky priority++; 1950331769Shselasky return priority; 1951331769Shselasky} 1952331769Shselasky 1953331769Shselaskyenum flow_table_type { 1954331769Shselasky MLX5_IB_FT_RX, 1955331769Shselasky MLX5_IB_FT_TX 1956331769Shselasky}; 1957331769Shselasky 1958331769Shselasky#define MLX5_FS_MAX_TYPES 10 1959331769Shselasky#define MLX5_FS_MAX_ENTRIES 32000UL 1960331769Shselaskystatic struct mlx5_ib_flow_prio *get_flow_table(struct mlx5_ib_dev *dev, 1961331769Shselasky struct ib_flow_attr *flow_attr, 1962331769Shselasky enum flow_table_type ft_type) 1963331769Shselasky{ 1964331769Shselasky bool dont_trap = flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP; 1965331769Shselasky struct mlx5_flow_namespace *ns = NULL; 1966331769Shselasky struct mlx5_ib_flow_prio *prio; 1967331769Shselasky struct mlx5_flow_table *ft; 1968331769Shselasky int num_entries; 1969331769Shselasky int num_groups; 1970331769Shselasky int priority; 1971331769Shselasky int err = 0; 1972331769Shselasky 1973331769Shselasky if (flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1974331769Shselasky if (flow_is_multicast_only(flow_attr) && 1975331769Shselasky !dont_trap) 1976331769Shselasky priority = MLX5_IB_FLOW_MCAST_PRIO; 1977331769Shselasky else 1978331769Shselasky priority = ib_prio_to_core_prio(flow_attr->priority, 1979331769Shselasky dont_trap); 1980331769Shselasky ns = mlx5_get_flow_namespace(dev->mdev, 1981331769Shselasky MLX5_FLOW_NAMESPACE_BYPASS); 1982331769Shselasky num_entries = MLX5_FS_MAX_ENTRIES; 1983331769Shselasky num_groups = MLX5_FS_MAX_TYPES; 1984331769Shselasky prio = &dev->flow_db.prios[priority]; 1985331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT || 1986331769Shselasky flow_attr->type == IB_FLOW_ATTR_MC_DEFAULT) { 1987331769Shselasky ns = mlx5_get_flow_namespace(dev->mdev, 1988331769Shselasky MLX5_FLOW_NAMESPACE_LEFTOVERS); 1989331769Shselasky build_leftovers_ft_param("bypass", &priority, 1990331769Shselasky &num_entries, 1991331769Shselasky &num_groups); 1992331769Shselasky prio = &dev->flow_db.prios[MLX5_IB_FLOW_LEFTOVERS_PRIO]; 1993331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_SNIFFER) { 1994331769Shselasky if (!MLX5_CAP_FLOWTABLE(dev->mdev, 1995331769Shselasky allow_sniffer_and_nic_rx_shared_tir)) 1996331769Shselasky return ERR_PTR(-ENOTSUPP); 1997331769Shselasky 1998331769Shselasky ns = mlx5_get_flow_namespace(dev->mdev, ft_type == MLX5_IB_FT_RX ? 1999331769Shselasky MLX5_FLOW_NAMESPACE_SNIFFER_RX : 2000331769Shselasky MLX5_FLOW_NAMESPACE_SNIFFER_TX); 2001331769Shselasky 2002331769Shselasky prio = &dev->flow_db.sniffer[ft_type]; 2003331769Shselasky priority = 0; 2004331769Shselasky num_entries = 1; 2005331769Shselasky num_groups = 1; 2006331769Shselasky } 2007331769Shselasky 2008331769Shselasky if (!ns) 2009331769Shselasky return ERR_PTR(-ENOTSUPP); 2010331769Shselasky 2011331769Shselasky ft = prio->flow_table; 2012331769Shselasky if (!ft) { 2013331769Shselasky ft = mlx5_create_auto_grouped_flow_table(ns, priority, "bypass", 2014331769Shselasky num_entries, 2015331769Shselasky num_groups); 2016331769Shselasky 2017331769Shselasky if (!IS_ERR(ft)) { 2018331769Shselasky prio->refcount = 0; 2019331769Shselasky prio->flow_table = ft; 2020331769Shselasky } else { 2021331769Shselasky err = PTR_ERR(ft); 2022331769Shselasky } 2023331769Shselasky } 2024331769Shselasky 2025331769Shselasky return err ? ERR_PTR(err) : prio; 2026331769Shselasky} 2027331769Shselasky 2028331769Shselaskystatic struct mlx5_ib_flow_handler *create_flow_rule(struct mlx5_ib_dev *dev, 2029331769Shselasky struct mlx5_ib_flow_prio *ft_prio, 2030331769Shselasky const struct ib_flow_attr *flow_attr, 2031331769Shselasky struct mlx5_flow_destination *dst) 2032331769Shselasky{ 2033331769Shselasky struct mlx5_flow_table *ft = ft_prio->flow_table; 2034331769Shselasky struct mlx5_ib_flow_handler *handler; 2035331769Shselasky struct mlx5_flow_spec *spec; 2036331769Shselasky const void *ib_flow = (const void *)flow_attr + sizeof(*flow_attr); 2037331769Shselasky unsigned int spec_index; 2038331769Shselasky u32 action; 2039331769Shselasky int err = 0; 2040331769Shselasky 2041331769Shselasky if (!is_valid_attr(flow_attr)) 2042331769Shselasky return ERR_PTR(-EINVAL); 2043331769Shselasky 2044331769Shselasky spec = mlx5_vzalloc(sizeof(*spec)); 2045331769Shselasky handler = kzalloc(sizeof(*handler), GFP_KERNEL); 2046331769Shselasky if (!handler || !spec) { 2047331769Shselasky err = -ENOMEM; 2048331769Shselasky goto free; 2049331769Shselasky } 2050331769Shselasky 2051331769Shselasky INIT_LIST_HEAD(&handler->list); 2052331769Shselasky 2053331769Shselasky for (spec_index = 0; spec_index < flow_attr->num_of_specs; spec_index++) { 2054331769Shselasky err = parse_flow_attr(spec->match_criteria, 2055331769Shselasky spec->match_value, ib_flow); 2056331769Shselasky if (err < 0) 2057331769Shselasky goto free; 2058331769Shselasky 2059331769Shselasky ib_flow += ((union ib_flow_spec *)ib_flow)->size; 2060331769Shselasky } 2061331769Shselasky 2062331769Shselasky spec->match_criteria_enable = get_match_criteria_enable(spec->match_criteria); 2063331769Shselasky action = dst ? MLX5_FLOW_CONTEXT_ACTION_FWD_DEST : 2064331769Shselasky MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_PRIO; 2065331769Shselasky handler->rule = mlx5_add_flow_rule(ft, spec->match_criteria_enable, 2066331769Shselasky spec->match_criteria, 2067331769Shselasky spec->match_value, 2068331769Shselasky action, 2069331769Shselasky MLX5_FS_DEFAULT_FLOW_TAG, 2070331769Shselasky dst); 2071331769Shselasky 2072331769Shselasky if (IS_ERR(handler->rule)) { 2073331769Shselasky err = PTR_ERR(handler->rule); 2074331769Shselasky goto free; 2075331769Shselasky } 2076331769Shselasky 2077331769Shselasky ft_prio->refcount++; 2078331769Shselasky handler->prio = ft_prio; 2079331769Shselasky 2080331769Shselasky ft_prio->flow_table = ft; 2081331769Shselaskyfree: 2082331769Shselasky if (err) 2083331769Shselasky kfree(handler); 2084331769Shselasky kvfree(spec); 2085331769Shselasky return err ? ERR_PTR(err) : handler; 2086331769Shselasky} 2087331769Shselasky 2088331769Shselaskystatic struct mlx5_ib_flow_handler *create_dont_trap_rule(struct mlx5_ib_dev *dev, 2089331769Shselasky struct mlx5_ib_flow_prio *ft_prio, 2090331769Shselasky struct ib_flow_attr *flow_attr, 2091331769Shselasky struct mlx5_flow_destination *dst) 2092331769Shselasky{ 2093331769Shselasky struct mlx5_ib_flow_handler *handler_dst = NULL; 2094331769Shselasky struct mlx5_ib_flow_handler *handler = NULL; 2095331769Shselasky 2096331769Shselasky handler = create_flow_rule(dev, ft_prio, flow_attr, NULL); 2097331769Shselasky if (!IS_ERR(handler)) { 2098331769Shselasky handler_dst = create_flow_rule(dev, ft_prio, 2099331769Shselasky flow_attr, dst); 2100331769Shselasky if (IS_ERR(handler_dst)) { 2101331769Shselasky mlx5_del_flow_rule(handler->rule); 2102331769Shselasky ft_prio->refcount--; 2103331769Shselasky kfree(handler); 2104331769Shselasky handler = handler_dst; 2105331769Shselasky } else { 2106331769Shselasky list_add(&handler_dst->list, &handler->list); 2107331769Shselasky } 2108331769Shselasky } 2109331769Shselasky 2110331769Shselasky return handler; 2111331769Shselasky} 2112331769Shselaskyenum { 2113331769Shselasky LEFTOVERS_MC, 2114331769Shselasky LEFTOVERS_UC, 2115331769Shselasky}; 2116331769Shselasky 2117331769Shselaskystatic struct mlx5_ib_flow_handler *create_leftovers_rule(struct mlx5_ib_dev *dev, 2118331769Shselasky struct mlx5_ib_flow_prio *ft_prio, 2119331769Shselasky struct ib_flow_attr *flow_attr, 2120331769Shselasky struct mlx5_flow_destination *dst) 2121331769Shselasky{ 2122331769Shselasky struct mlx5_ib_flow_handler *handler_ucast = NULL; 2123331769Shselasky struct mlx5_ib_flow_handler *handler = NULL; 2124331769Shselasky 2125331769Shselasky static struct { 2126331769Shselasky struct ib_flow_attr flow_attr; 2127331769Shselasky struct ib_flow_spec_eth eth_flow; 2128331769Shselasky } leftovers_specs[] = { 2129331769Shselasky [LEFTOVERS_MC] = { 2130331769Shselasky .flow_attr = { 2131331769Shselasky .num_of_specs = 1, 2132331769Shselasky .size = sizeof(leftovers_specs[0]) 2133331769Shselasky }, 2134331769Shselasky .eth_flow = { 2135331769Shselasky .type = IB_FLOW_SPEC_ETH, 2136331769Shselasky .size = sizeof(struct ib_flow_spec_eth), 2137331769Shselasky .mask = {.dst_mac = {0x1} }, 2138331769Shselasky .val = {.dst_mac = {0x1} } 2139331769Shselasky } 2140331769Shselasky }, 2141331769Shselasky [LEFTOVERS_UC] = { 2142331769Shselasky .flow_attr = { 2143331769Shselasky .num_of_specs = 1, 2144331769Shselasky .size = sizeof(leftovers_specs[0]) 2145331769Shselasky }, 2146331769Shselasky .eth_flow = { 2147331769Shselasky .type = IB_FLOW_SPEC_ETH, 2148331769Shselasky .size = sizeof(struct ib_flow_spec_eth), 2149331769Shselasky .mask = {.dst_mac = {0x1} }, 2150331769Shselasky .val = {.dst_mac = {} } 2151331769Shselasky } 2152331769Shselasky } 2153331769Shselasky }; 2154331769Shselasky 2155331769Shselasky handler = create_flow_rule(dev, ft_prio, 2156331769Shselasky &leftovers_specs[LEFTOVERS_MC].flow_attr, 2157331769Shselasky dst); 2158331769Shselasky if (!IS_ERR(handler) && 2159331769Shselasky flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT) { 2160331769Shselasky handler_ucast = create_flow_rule(dev, ft_prio, 2161331769Shselasky &leftovers_specs[LEFTOVERS_UC].flow_attr, 2162331769Shselasky dst); 2163331769Shselasky if (IS_ERR(handler_ucast)) { 2164331769Shselasky mlx5_del_flow_rule(handler->rule); 2165331769Shselasky ft_prio->refcount--; 2166331769Shselasky kfree(handler); 2167331769Shselasky handler = handler_ucast; 2168331769Shselasky } else { 2169331769Shselasky list_add(&handler_ucast->list, &handler->list); 2170331769Shselasky } 2171331769Shselasky } 2172331769Shselasky 2173331769Shselasky return handler; 2174331769Shselasky} 2175331769Shselasky 2176331769Shselaskystatic struct mlx5_ib_flow_handler *create_sniffer_rule(struct mlx5_ib_dev *dev, 2177331769Shselasky struct mlx5_ib_flow_prio *ft_rx, 2178331769Shselasky struct mlx5_ib_flow_prio *ft_tx, 2179331769Shselasky struct mlx5_flow_destination *dst) 2180331769Shselasky{ 2181331769Shselasky struct mlx5_ib_flow_handler *handler_rx; 2182331769Shselasky struct mlx5_ib_flow_handler *handler_tx; 2183331769Shselasky int err; 2184331769Shselasky static const struct ib_flow_attr flow_attr = { 2185331769Shselasky .num_of_specs = 0, 2186331769Shselasky .size = sizeof(flow_attr) 2187331769Shselasky }; 2188331769Shselasky 2189331769Shselasky handler_rx = create_flow_rule(dev, ft_rx, &flow_attr, dst); 2190331769Shselasky if (IS_ERR(handler_rx)) { 2191331769Shselasky err = PTR_ERR(handler_rx); 2192331769Shselasky goto err; 2193331769Shselasky } 2194331769Shselasky 2195331769Shselasky handler_tx = create_flow_rule(dev, ft_tx, &flow_attr, dst); 2196331769Shselasky if (IS_ERR(handler_tx)) { 2197331769Shselasky err = PTR_ERR(handler_tx); 2198331769Shselasky goto err_tx; 2199331769Shselasky } 2200331769Shselasky 2201331769Shselasky list_add(&handler_tx->list, &handler_rx->list); 2202331769Shselasky 2203331769Shselasky return handler_rx; 2204331769Shselasky 2205331769Shselaskyerr_tx: 2206331769Shselasky mlx5_del_flow_rule(handler_rx->rule); 2207331769Shselasky ft_rx->refcount--; 2208331769Shselasky kfree(handler_rx); 2209331769Shselaskyerr: 2210331769Shselasky return ERR_PTR(err); 2211331769Shselasky} 2212331769Shselasky 2213331769Shselaskystatic struct ib_flow *mlx5_ib_create_flow(struct ib_qp *qp, 2214331769Shselasky struct ib_flow_attr *flow_attr, 2215331769Shselasky int domain) 2216331769Shselasky{ 2217331769Shselasky struct mlx5_ib_dev *dev = to_mdev(qp->device); 2218331769Shselasky struct mlx5_ib_qp *mqp = to_mqp(qp); 2219331769Shselasky struct mlx5_ib_flow_handler *handler = NULL; 2220331769Shselasky struct mlx5_flow_destination *dst = NULL; 2221331769Shselasky struct mlx5_ib_flow_prio *ft_prio_tx = NULL; 2222331769Shselasky struct mlx5_ib_flow_prio *ft_prio; 2223331769Shselasky int err; 2224331769Shselasky 2225331769Shselasky if (flow_attr->priority > MLX5_IB_FLOW_LAST_PRIO) 2226331769Shselasky return ERR_PTR(-ENOSPC); 2227331769Shselasky 2228331769Shselasky if (domain != IB_FLOW_DOMAIN_USER || 2229331769Shselasky flow_attr->port > MLX5_CAP_GEN(dev->mdev, num_ports) || 2230331769Shselasky (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP)) 2231331769Shselasky return ERR_PTR(-EINVAL); 2232331769Shselasky 2233331769Shselasky dst = kzalloc(sizeof(*dst), GFP_KERNEL); 2234331769Shselasky if (!dst) 2235331769Shselasky return ERR_PTR(-ENOMEM); 2236331769Shselasky 2237331769Shselasky mutex_lock(&dev->flow_db.lock); 2238331769Shselasky 2239331769Shselasky ft_prio = get_flow_table(dev, flow_attr, MLX5_IB_FT_RX); 2240331769Shselasky if (IS_ERR(ft_prio)) { 2241331769Shselasky err = PTR_ERR(ft_prio); 2242331769Shselasky goto unlock; 2243331769Shselasky } 2244331769Shselasky if (flow_attr->type == IB_FLOW_ATTR_SNIFFER) { 2245331769Shselasky ft_prio_tx = get_flow_table(dev, flow_attr, MLX5_IB_FT_TX); 2246331769Shselasky if (IS_ERR(ft_prio_tx)) { 2247331769Shselasky err = PTR_ERR(ft_prio_tx); 2248331769Shselasky ft_prio_tx = NULL; 2249331769Shselasky goto destroy_ft; 2250331769Shselasky } 2251331769Shselasky } 2252331769Shselasky 2253331769Shselasky dst->type = MLX5_FLOW_DESTINATION_TYPE_TIR; 2254331769Shselasky if (mqp->flags & MLX5_IB_QP_RSS) 2255331769Shselasky dst->tir_num = mqp->rss_qp.tirn; 2256331769Shselasky else 2257331769Shselasky dst->tir_num = mqp->raw_packet_qp.rq.tirn; 2258331769Shselasky 2259331769Shselasky if (flow_attr->type == IB_FLOW_ATTR_NORMAL) { 2260331769Shselasky if (flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) { 2261331769Shselasky handler = create_dont_trap_rule(dev, ft_prio, 2262331769Shselasky flow_attr, dst); 2263331769Shselasky } else { 2264331769Shselasky handler = create_flow_rule(dev, ft_prio, flow_attr, 2265331769Shselasky dst); 2266331769Shselasky } 2267331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT || 2268331769Shselasky flow_attr->type == IB_FLOW_ATTR_MC_DEFAULT) { 2269331769Shselasky handler = create_leftovers_rule(dev, ft_prio, flow_attr, 2270331769Shselasky dst); 2271331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_SNIFFER) { 2272331769Shselasky handler = create_sniffer_rule(dev, ft_prio, ft_prio_tx, dst); 2273331769Shselasky } else { 2274331769Shselasky err = -EINVAL; 2275331769Shselasky goto destroy_ft; 2276331769Shselasky } 2277331769Shselasky 2278331769Shselasky if (IS_ERR(handler)) { 2279331769Shselasky err = PTR_ERR(handler); 2280331769Shselasky handler = NULL; 2281331769Shselasky goto destroy_ft; 2282331769Shselasky } 2283331769Shselasky 2284331769Shselasky mutex_unlock(&dev->flow_db.lock); 2285331769Shselasky kfree(dst); 2286331769Shselasky 2287331769Shselasky return &handler->ibflow; 2288331769Shselasky 2289331769Shselaskydestroy_ft: 2290331769Shselasky put_flow_table(dev, ft_prio, false); 2291331769Shselasky if (ft_prio_tx) 2292331769Shselasky put_flow_table(dev, ft_prio_tx, false); 2293331769Shselaskyunlock: 2294331769Shselasky mutex_unlock(&dev->flow_db.lock); 2295331769Shselasky kfree(dst); 2296331769Shselasky kfree(handler); 2297331769Shselasky return ERR_PTR(err); 2298331769Shselasky} 2299331769Shselasky 2300322810Shselaskystatic int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2301322810Shselasky{ 2302322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2303322810Shselasky int err; 2304322810Shselasky 2305331769Shselasky err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 2306322810Shselasky if (err) 2307322810Shselasky mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 2308322810Shselasky ibqp->qp_num, gid->raw); 2309322810Shselasky 2310322810Shselasky return err; 2311322810Shselasky} 2312322810Shselasky 2313322810Shselaskystatic int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2314322810Shselasky{ 2315322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2316322810Shselasky int err; 2317322810Shselasky 2318331769Shselasky err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 2319322810Shselasky if (err) 2320322810Shselasky mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 2321322810Shselasky ibqp->qp_num, gid->raw); 2322322810Shselasky 2323322810Shselasky return err; 2324322810Shselasky} 2325322810Shselasky 2326322810Shselaskystatic int init_node_data(struct mlx5_ib_dev *dev) 2327322810Shselasky{ 2328322810Shselasky int err; 2329322810Shselasky 2330322810Shselasky err = mlx5_query_node_desc(dev, dev->ib_dev.node_desc); 2331322810Shselasky if (err) 2332322810Shselasky return err; 2333322810Shselasky 2334322810Shselasky return mlx5_query_node_guid(dev, &dev->ib_dev.node_guid); 2335322810Shselasky} 2336322810Shselasky 2337322810Shselaskystatic ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 2338322810Shselasky char *buf) 2339322810Shselasky{ 2340322810Shselasky struct mlx5_ib_dev *dev = 2341322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2342322810Shselasky 2343322810Shselasky return sprintf(buf, "%lld\n", (long long)dev->mdev->priv.fw_pages); 2344322810Shselasky} 2345322810Shselasky 2346322810Shselaskystatic ssize_t show_reg_pages(struct device *device, 2347322810Shselasky struct device_attribute *attr, char *buf) 2348322810Shselasky{ 2349322810Shselasky struct mlx5_ib_dev *dev = 2350322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2351322810Shselasky 2352322810Shselasky return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); 2353322810Shselasky} 2354322810Shselasky 2355322810Shselaskystatic ssize_t show_hca(struct device *device, struct device_attribute *attr, 2356322810Shselasky char *buf) 2357322810Shselasky{ 2358322810Shselasky struct mlx5_ib_dev *dev = 2359322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2360322810Shselasky return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 2361322810Shselasky} 2362322810Shselasky 2363322810Shselaskystatic ssize_t show_rev(struct device *device, struct device_attribute *attr, 2364322810Shselasky char *buf) 2365322810Shselasky{ 2366322810Shselasky struct mlx5_ib_dev *dev = 2367322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2368331769Shselasky return sprintf(buf, "%x\n", dev->mdev->pdev->revision); 2369322810Shselasky} 2370322810Shselasky 2371322810Shselaskystatic ssize_t show_board(struct device *device, struct device_attribute *attr, 2372322810Shselasky char *buf) 2373322810Shselasky{ 2374322810Shselasky struct mlx5_ib_dev *dev = 2375322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2376322810Shselasky return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 2377322810Shselasky dev->mdev->board_id); 2378322810Shselasky} 2379322810Shselasky 2380322810Shselaskystatic DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 2381322810Shselaskystatic DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 2382322810Shselaskystatic DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 2383322810Shselaskystatic DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 2384322810Shselaskystatic DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 2385322810Shselasky 2386322810Shselaskystatic struct device_attribute *mlx5_class_attributes[] = { 2387322810Shselasky &dev_attr_hw_rev, 2388322810Shselasky &dev_attr_hca_type, 2389322810Shselasky &dev_attr_board_id, 2390322810Shselasky &dev_attr_fw_pages, 2391322810Shselasky &dev_attr_reg_pages, 2392322810Shselasky}; 2393322810Shselasky 2394331769Shselaskystatic void pkey_change_handler(struct work_struct *work) 2395331769Shselasky{ 2396331769Shselasky struct mlx5_ib_port_resources *ports = 2397331769Shselasky container_of(work, struct mlx5_ib_port_resources, 2398331769Shselasky pkey_change_work); 2399331769Shselasky 2400331769Shselasky mutex_lock(&ports->devr->mutex); 2401331769Shselasky mlx5_ib_gsi_pkey_change(ports->gsi); 2402331769Shselasky mutex_unlock(&ports->devr->mutex); 2403331769Shselasky} 2404331769Shselasky 2405322810Shselaskystatic void mlx5_ib_handle_internal_error(struct mlx5_ib_dev *ibdev) 2406322810Shselasky{ 2407322810Shselasky struct mlx5_ib_qp *mqp; 2408322810Shselasky struct mlx5_ib_cq *send_mcq, *recv_mcq; 2409322810Shselasky struct mlx5_core_cq *mcq; 2410322810Shselasky struct list_head cq_armed_list; 2411322810Shselasky unsigned long flags_qp; 2412322810Shselasky unsigned long flags_cq; 2413322810Shselasky unsigned long flags; 2414322810Shselasky 2415322810Shselasky INIT_LIST_HEAD(&cq_armed_list); 2416322810Shselasky 2417322810Shselasky /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 2418322810Shselasky spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 2419322810Shselasky list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 2420322810Shselasky spin_lock_irqsave(&mqp->sq.lock, flags_qp); 2421322810Shselasky if (mqp->sq.tail != mqp->sq.head) { 2422322810Shselasky send_mcq = to_mcq(mqp->ibqp.send_cq); 2423322810Shselasky spin_lock_irqsave(&send_mcq->lock, flags_cq); 2424322810Shselasky if (send_mcq->mcq.comp && 2425322810Shselasky mqp->ibqp.send_cq->comp_handler) { 2426322810Shselasky if (!send_mcq->mcq.reset_notify_added) { 2427322810Shselasky send_mcq->mcq.reset_notify_added = 1; 2428322810Shselasky list_add_tail(&send_mcq->mcq.reset_notify, 2429322810Shselasky &cq_armed_list); 2430322810Shselasky } 2431322810Shselasky } 2432322810Shselasky spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 2433322810Shselasky } 2434322810Shselasky spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 2435322810Shselasky spin_lock_irqsave(&mqp->rq.lock, flags_qp); 2436322810Shselasky /* no handling is needed for SRQ */ 2437322810Shselasky if (!mqp->ibqp.srq) { 2438322810Shselasky if (mqp->rq.tail != mqp->rq.head) { 2439322810Shselasky recv_mcq = to_mcq(mqp->ibqp.recv_cq); 2440322810Shselasky spin_lock_irqsave(&recv_mcq->lock, flags_cq); 2441322810Shselasky if (recv_mcq->mcq.comp && 2442322810Shselasky mqp->ibqp.recv_cq->comp_handler) { 2443322810Shselasky if (!recv_mcq->mcq.reset_notify_added) { 2444322810Shselasky recv_mcq->mcq.reset_notify_added = 1; 2445322810Shselasky list_add_tail(&recv_mcq->mcq.reset_notify, 2446322810Shselasky &cq_armed_list); 2447322810Shselasky } 2448322810Shselasky } 2449322810Shselasky spin_unlock_irqrestore(&recv_mcq->lock, 2450322810Shselasky flags_cq); 2451322810Shselasky } 2452322810Shselasky } 2453322810Shselasky spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 2454322810Shselasky } 2455322810Shselasky /*At that point all inflight post send were put to be executed as of we 2456322810Shselasky * lock/unlock above locks Now need to arm all involved CQs. 2457322810Shselasky */ 2458322810Shselasky list_for_each_entry(mcq, &cq_armed_list, reset_notify) { 2459322810Shselasky mcq->comp(mcq); 2460322810Shselasky } 2461322810Shselasky spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 2462322810Shselasky} 2463322810Shselasky 2464322810Shselaskystatic void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 2465322810Shselasky enum mlx5_dev_event event, unsigned long param) 2466322810Shselasky{ 2467322810Shselasky struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 2468322810Shselasky struct ib_event ibev; 2469331769Shselasky bool fatal = false; 2470341922Shselasky u8 port = (u8)param; 2471322810Shselasky 2472322810Shselasky switch (event) { 2473322810Shselasky case MLX5_DEV_EVENT_SYS_ERROR: 2474322810Shselasky ibev.event = IB_EVENT_DEVICE_FATAL; 2475322810Shselasky mlx5_ib_handle_internal_error(ibdev); 2476331769Shselasky fatal = true; 2477322810Shselasky break; 2478322810Shselasky 2479322810Shselasky case MLX5_DEV_EVENT_PORT_UP: 2480322810Shselasky case MLX5_DEV_EVENT_PORT_DOWN: 2481322810Shselasky case MLX5_DEV_EVENT_PORT_INITIALIZED: 2482331769Shselasky /* In RoCE, port up/down events are handled in 2483331769Shselasky * mlx5_netdev_event(). 2484331769Shselasky */ 2485331769Shselasky if (mlx5_ib_port_link_layer(&ibdev->ib_dev, port) == 2486331769Shselasky IB_LINK_LAYER_ETHERNET) 2487331769Shselasky return; 2488331769Shselasky 2489331769Shselasky ibev.event = (event == MLX5_DEV_EVENT_PORT_UP) ? 2490331769Shselasky IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 2491322810Shselasky break; 2492322810Shselasky 2493322810Shselasky case MLX5_DEV_EVENT_LID_CHANGE: 2494322810Shselasky ibev.event = IB_EVENT_LID_CHANGE; 2495322810Shselasky break; 2496322810Shselasky 2497322810Shselasky case MLX5_DEV_EVENT_PKEY_CHANGE: 2498322810Shselasky ibev.event = IB_EVENT_PKEY_CHANGE; 2499331769Shselasky 2500331769Shselasky schedule_work(&ibdev->devr.ports[port - 1].pkey_change_work); 2501322810Shselasky break; 2502322810Shselasky 2503322810Shselasky case MLX5_DEV_EVENT_GUID_CHANGE: 2504322810Shselasky ibev.event = IB_EVENT_GID_CHANGE; 2505322810Shselasky break; 2506322810Shselasky 2507322810Shselasky case MLX5_DEV_EVENT_CLIENT_REREG: 2508322810Shselasky ibev.event = IB_EVENT_CLIENT_REREGISTER; 2509322810Shselasky break; 2510322810Shselasky 2511322810Shselasky default: 2512337100Shselasky /* unsupported event */ 2513337100Shselasky return; 2514322810Shselasky } 2515322810Shselasky 2516322810Shselasky ibev.device = &ibdev->ib_dev; 2517322810Shselasky ibev.element.port_num = port; 2518322810Shselasky 2519341922Shselasky if (!rdma_is_port_valid(&ibdev->ib_dev, port)) { 2520337100Shselasky mlx5_ib_warn(ibdev, "warning: event(%d) on port %d\n", event, port); 2521322810Shselasky return; 2522322810Shselasky } 2523322810Shselasky 2524322810Shselasky if (ibdev->ib_active) 2525322810Shselasky ib_dispatch_event(&ibev); 2526331769Shselasky 2527331769Shselasky if (fatal) 2528331769Shselasky ibdev->ib_active = false; 2529322810Shselasky} 2530322810Shselasky 2531322810Shselaskystatic void get_ext_port_caps(struct mlx5_ib_dev *dev) 2532322810Shselasky{ 2533322810Shselasky int port; 2534322810Shselasky 2535322810Shselasky for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) 2536322810Shselasky mlx5_query_ext_port_caps(dev, port); 2537322810Shselasky} 2538322810Shselasky 2539322810Shselaskystatic int get_port_caps(struct mlx5_ib_dev *dev) 2540322810Shselasky{ 2541322810Shselasky struct ib_device_attr *dprops = NULL; 2542322810Shselasky struct ib_port_attr *pprops = NULL; 2543322810Shselasky int err = -ENOMEM; 2544322810Shselasky int port; 2545331769Shselasky struct ib_udata uhw = {.inlen = 0, .outlen = 0}; 2546322810Shselasky 2547322810Shselasky pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 2548322810Shselasky if (!pprops) 2549322810Shselasky goto out; 2550322810Shselasky 2551322810Shselasky dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 2552322810Shselasky if (!dprops) 2553322810Shselasky goto out; 2554322810Shselasky 2555331769Shselasky err = mlx5_ib_query_device(&dev->ib_dev, dprops, &uhw); 2556322810Shselasky if (err) { 2557322810Shselasky mlx5_ib_warn(dev, "query_device failed %d\n", err); 2558322810Shselasky goto out; 2559322810Shselasky } 2560322810Shselasky 2561322810Shselasky for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) { 2562322810Shselasky err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 2563322810Shselasky if (err) { 2564322810Shselasky mlx5_ib_warn(dev, "query_port %d failed %d\n", 2565322810Shselasky port, err); 2566322810Shselasky break; 2567322810Shselasky } 2568331769Shselasky dev->mdev->port_caps[port - 1].pkey_table_len = 2569331769Shselasky dprops->max_pkeys; 2570331769Shselasky dev->mdev->port_caps[port - 1].gid_table_len = 2571331769Shselasky pprops->gid_tbl_len; 2572322810Shselasky mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 2573322810Shselasky dprops->max_pkeys, pprops->gid_tbl_len); 2574322810Shselasky } 2575322810Shselasky 2576322810Shselaskyout: 2577322810Shselasky kfree(pprops); 2578322810Shselasky kfree(dprops); 2579322810Shselasky 2580322810Shselasky return err; 2581322810Shselasky} 2582322810Shselasky 2583322810Shselaskystatic void destroy_umrc_res(struct mlx5_ib_dev *dev) 2584322810Shselasky{ 2585322810Shselasky int err; 2586322810Shselasky 2587322810Shselasky err = mlx5_mr_cache_cleanup(dev); 2588322810Shselasky if (err) 2589322810Shselasky mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 2590322810Shselasky 2591331769Shselasky mlx5_ib_destroy_qp(dev->umrc.qp); 2592331769Shselasky ib_free_cq(dev->umrc.cq); 2593322810Shselasky ib_dealloc_pd(dev->umrc.pd); 2594322810Shselasky} 2595322810Shselasky 2596322810Shselaskyenum { 2597322810Shselasky MAX_UMR_WR = 128, 2598322810Shselasky}; 2599322810Shselasky 2600322810Shselaskystatic int create_umr_res(struct mlx5_ib_dev *dev) 2601322810Shselasky{ 2602331769Shselasky struct ib_qp_init_attr *init_attr = NULL; 2603331769Shselasky struct ib_qp_attr *attr = NULL; 2604322810Shselasky struct ib_pd *pd; 2605331769Shselasky struct ib_cq *cq; 2606331769Shselasky struct ib_qp *qp; 2607322810Shselasky int ret; 2608322810Shselasky 2609331769Shselasky attr = kzalloc(sizeof(*attr), GFP_KERNEL); 2610331769Shselasky init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 2611331769Shselasky if (!attr || !init_attr) { 2612331769Shselasky ret = -ENOMEM; 2613331769Shselasky goto error_0; 2614331769Shselasky } 2615331769Shselasky 2616331769Shselasky pd = ib_alloc_pd(&dev->ib_dev, 0); 2617322810Shselasky if (IS_ERR(pd)) { 2618322810Shselasky mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 2619322810Shselasky ret = PTR_ERR(pd); 2620322810Shselasky goto error_0; 2621322810Shselasky } 2622322810Shselasky 2623331769Shselasky cq = ib_alloc_cq(&dev->ib_dev, NULL, 128, 0, IB_POLL_SOFTIRQ); 2624331769Shselasky if (IS_ERR(cq)) { 2625331769Shselasky mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 2626331769Shselasky ret = PTR_ERR(cq); 2627331769Shselasky goto error_2; 2628322810Shselasky } 2629322810Shselasky 2630331769Shselasky init_attr->send_cq = cq; 2631331769Shselasky init_attr->recv_cq = cq; 2632331769Shselasky init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 2633331769Shselasky init_attr->cap.max_send_wr = MAX_UMR_WR; 2634331769Shselasky init_attr->cap.max_send_sge = 1; 2635331769Shselasky init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 2636331769Shselasky init_attr->port_num = 1; 2637331769Shselasky qp = mlx5_ib_create_qp(pd, init_attr, NULL); 2638331769Shselasky if (IS_ERR(qp)) { 2639331769Shselasky mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 2640331769Shselasky ret = PTR_ERR(qp); 2641331769Shselasky goto error_3; 2642331769Shselasky } 2643331769Shselasky qp->device = &dev->ib_dev; 2644331769Shselasky qp->real_qp = qp; 2645331769Shselasky qp->uobject = NULL; 2646331769Shselasky qp->qp_type = MLX5_IB_QPT_REG_UMR; 2647331769Shselasky 2648331769Shselasky attr->qp_state = IB_QPS_INIT; 2649331769Shselasky attr->port_num = 1; 2650331769Shselasky ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 2651331769Shselasky IB_QP_PORT, NULL); 2652331769Shselasky if (ret) { 2653331769Shselasky mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 2654331769Shselasky goto error_4; 2655331769Shselasky } 2656331769Shselasky 2657331769Shselasky memset(attr, 0, sizeof(*attr)); 2658331769Shselasky attr->qp_state = IB_QPS_RTR; 2659331769Shselasky attr->path_mtu = IB_MTU_256; 2660331769Shselasky 2661331769Shselasky ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 2662331769Shselasky if (ret) { 2663331769Shselasky mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 2664331769Shselasky goto error_4; 2665331769Shselasky } 2666331769Shselasky 2667331769Shselasky memset(attr, 0, sizeof(*attr)); 2668331769Shselasky attr->qp_state = IB_QPS_RTS; 2669331769Shselasky ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 2670331769Shselasky if (ret) { 2671331769Shselasky mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 2672331769Shselasky goto error_4; 2673331769Shselasky } 2674331769Shselasky 2675331769Shselasky dev->umrc.qp = qp; 2676331769Shselasky dev->umrc.cq = cq; 2677322810Shselasky dev->umrc.pd = pd; 2678322810Shselasky 2679331769Shselasky sema_init(&dev->umrc.sem, MAX_UMR_WR); 2680322810Shselasky ret = mlx5_mr_cache_init(dev); 2681322810Shselasky if (ret) { 2682322810Shselasky mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 2683322810Shselasky goto error_4; 2684322810Shselasky } 2685322810Shselasky 2686331769Shselasky kfree(attr); 2687331769Shselasky kfree(init_attr); 2688331769Shselasky 2689322810Shselasky return 0; 2690322810Shselasky 2691322810Shselaskyerror_4: 2692331769Shselasky mlx5_ib_destroy_qp(qp); 2693331769Shselasky 2694331769Shselaskyerror_3: 2695331769Shselasky ib_free_cq(cq); 2696331769Shselasky 2697331769Shselaskyerror_2: 2698322810Shselasky ib_dealloc_pd(pd); 2699331769Shselasky 2700322810Shselaskyerror_0: 2701331769Shselasky kfree(attr); 2702331769Shselasky kfree(init_attr); 2703322810Shselasky return ret; 2704322810Shselasky} 2705322810Shselasky 2706322810Shselaskystatic int create_dev_resources(struct mlx5_ib_resources *devr) 2707322810Shselasky{ 2708322810Shselasky struct ib_srq_init_attr attr; 2709322810Shselasky struct mlx5_ib_dev *dev; 2710331769Shselasky struct ib_cq_init_attr cq_attr = {.cqe = 1}; 2711331769Shselasky int port; 2712322810Shselasky int ret = 0; 2713322810Shselasky 2714322810Shselasky dev = container_of(devr, struct mlx5_ib_dev, devr); 2715322810Shselasky 2716331769Shselasky mutex_init(&devr->mutex); 2717331769Shselasky 2718322810Shselasky devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 2719322810Shselasky if (IS_ERR(devr->p0)) { 2720322810Shselasky ret = PTR_ERR(devr->p0); 2721322810Shselasky goto error0; 2722322810Shselasky } 2723322810Shselasky devr->p0->device = &dev->ib_dev; 2724322810Shselasky devr->p0->uobject = NULL; 2725322810Shselasky atomic_set(&devr->p0->usecnt, 0); 2726322810Shselasky 2727322810Shselasky devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, &cq_attr, NULL, NULL); 2728322810Shselasky if (IS_ERR(devr->c0)) { 2729322810Shselasky ret = PTR_ERR(devr->c0); 2730322810Shselasky goto error1; 2731322810Shselasky } 2732322810Shselasky devr->c0->device = &dev->ib_dev; 2733322810Shselasky devr->c0->uobject = NULL; 2734322810Shselasky devr->c0->comp_handler = NULL; 2735322810Shselasky devr->c0->event_handler = NULL; 2736322810Shselasky devr->c0->cq_context = NULL; 2737322810Shselasky atomic_set(&devr->c0->usecnt, 0); 2738322810Shselasky 2739322810Shselasky devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 2740322810Shselasky if (IS_ERR(devr->x0)) { 2741322810Shselasky ret = PTR_ERR(devr->x0); 2742322810Shselasky goto error2; 2743322810Shselasky } 2744322810Shselasky devr->x0->device = &dev->ib_dev; 2745322810Shselasky devr->x0->inode = NULL; 2746322810Shselasky atomic_set(&devr->x0->usecnt, 0); 2747322810Shselasky mutex_init(&devr->x0->tgt_qp_mutex); 2748322810Shselasky INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 2749322810Shselasky 2750322810Shselasky devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 2751322810Shselasky if (IS_ERR(devr->x1)) { 2752322810Shselasky ret = PTR_ERR(devr->x1); 2753322810Shselasky goto error3; 2754322810Shselasky } 2755322810Shselasky devr->x1->device = &dev->ib_dev; 2756322810Shselasky devr->x1->inode = NULL; 2757322810Shselasky atomic_set(&devr->x1->usecnt, 0); 2758322810Shselasky mutex_init(&devr->x1->tgt_qp_mutex); 2759322810Shselasky INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 2760322810Shselasky 2761322810Shselasky memset(&attr, 0, sizeof(attr)); 2762322810Shselasky attr.attr.max_sge = 1; 2763322810Shselasky attr.attr.max_wr = 1; 2764322810Shselasky attr.srq_type = IB_SRQT_XRC; 2765322810Shselasky attr.ext.xrc.cq = devr->c0; 2766322810Shselasky attr.ext.xrc.xrcd = devr->x0; 2767322810Shselasky 2768322810Shselasky devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 2769322810Shselasky if (IS_ERR(devr->s0)) { 2770322810Shselasky ret = PTR_ERR(devr->s0); 2771322810Shselasky goto error4; 2772322810Shselasky } 2773322810Shselasky devr->s0->device = &dev->ib_dev; 2774322810Shselasky devr->s0->pd = devr->p0; 2775322810Shselasky devr->s0->uobject = NULL; 2776322810Shselasky devr->s0->event_handler = NULL; 2777322810Shselasky devr->s0->srq_context = NULL; 2778322810Shselasky devr->s0->srq_type = IB_SRQT_XRC; 2779331769Shselasky devr->s0->ext.xrc.xrcd = devr->x0; 2780322810Shselasky devr->s0->ext.xrc.cq = devr->c0; 2781322810Shselasky atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 2782322810Shselasky atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 2783322810Shselasky atomic_inc(&devr->p0->usecnt); 2784322810Shselasky atomic_set(&devr->s0->usecnt, 0); 2785322810Shselasky 2786322810Shselasky memset(&attr, 0, sizeof(attr)); 2787322810Shselasky attr.attr.max_sge = 1; 2788322810Shselasky attr.attr.max_wr = 1; 2789322810Shselasky attr.srq_type = IB_SRQT_BASIC; 2790322810Shselasky devr->s1 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 2791322810Shselasky if (IS_ERR(devr->s1)) { 2792322810Shselasky ret = PTR_ERR(devr->s1); 2793322810Shselasky goto error5; 2794322810Shselasky } 2795322810Shselasky devr->s1->device = &dev->ib_dev; 2796322810Shselasky devr->s1->pd = devr->p0; 2797322810Shselasky devr->s1->uobject = NULL; 2798322810Shselasky devr->s1->event_handler = NULL; 2799322810Shselasky devr->s1->srq_context = NULL; 2800322810Shselasky devr->s1->srq_type = IB_SRQT_BASIC; 2801322810Shselasky devr->s1->ext.xrc.cq = devr->c0; 2802322810Shselasky atomic_inc(&devr->p0->usecnt); 2803331769Shselasky atomic_set(&devr->s0->usecnt, 0); 2804322810Shselasky 2805331769Shselasky for (port = 0; port < ARRAY_SIZE(devr->ports); ++port) { 2806331769Shselasky INIT_WORK(&devr->ports[port].pkey_change_work, 2807331769Shselasky pkey_change_handler); 2808331769Shselasky devr->ports[port].devr = devr; 2809331769Shselasky } 2810331769Shselasky 2811322810Shselasky return 0; 2812322810Shselasky 2813322810Shselaskyerror5: 2814322810Shselasky mlx5_ib_destroy_srq(devr->s0); 2815322810Shselaskyerror4: 2816322810Shselasky mlx5_ib_dealloc_xrcd(devr->x1); 2817322810Shselaskyerror3: 2818322810Shselasky mlx5_ib_dealloc_xrcd(devr->x0); 2819322810Shselaskyerror2: 2820322810Shselasky mlx5_ib_destroy_cq(devr->c0); 2821322810Shselaskyerror1: 2822322810Shselasky mlx5_ib_dealloc_pd(devr->p0); 2823322810Shselaskyerror0: 2824322810Shselasky return ret; 2825322810Shselasky} 2826322810Shselasky 2827322810Shselaskystatic void destroy_dev_resources(struct mlx5_ib_resources *devr) 2828322810Shselasky{ 2829331769Shselasky struct mlx5_ib_dev *dev = 2830331769Shselasky container_of(devr, struct mlx5_ib_dev, devr); 2831331769Shselasky int port; 2832331769Shselasky 2833322810Shselasky mlx5_ib_destroy_srq(devr->s1); 2834322810Shselasky mlx5_ib_destroy_srq(devr->s0); 2835322810Shselasky mlx5_ib_dealloc_xrcd(devr->x0); 2836322810Shselasky mlx5_ib_dealloc_xrcd(devr->x1); 2837322810Shselasky mlx5_ib_destroy_cq(devr->c0); 2838322810Shselasky mlx5_ib_dealloc_pd(devr->p0); 2839331769Shselasky 2840331769Shselasky /* Make sure no change P_Key work items are still executing */ 2841331769Shselasky for (port = 0; port < dev->num_ports; ++port) 2842331769Shselasky cancel_work_sync(&devr->ports[port].pkey_change_work); 2843322810Shselasky} 2844322810Shselasky 2845325604Shselaskystatic u32 get_core_cap_flags(struct ib_device *ibdev) 2846325604Shselasky{ 2847325604Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 2848325604Shselasky enum rdma_link_layer ll = mlx5_ib_port_link_layer(ibdev, 1); 2849325604Shselasky u8 l3_type_cap = MLX5_CAP_ROCE(dev->mdev, l3_type); 2850325604Shselasky u8 roce_version_cap = MLX5_CAP_ROCE(dev->mdev, roce_version); 2851325604Shselasky u32 ret = 0; 2852325604Shselasky 2853325604Shselasky if (ll == IB_LINK_LAYER_INFINIBAND) 2854325604Shselasky return RDMA_CORE_PORT_IBA_IB; 2855325604Shselasky 2856325604Shselasky if (!(l3_type_cap & MLX5_ROCE_L3_TYPE_IPV4_CAP)) 2857331769Shselasky return 0; 2858325604Shselasky 2859325604Shselasky if (!(l3_type_cap & MLX5_ROCE_L3_TYPE_IPV6_CAP)) 2860331769Shselasky return 0; 2861325604Shselasky 2862325604Shselasky if (roce_version_cap & MLX5_ROCE_VERSION_1_CAP) 2863325604Shselasky ret |= RDMA_CORE_PORT_IBA_ROCE; 2864325604Shselasky 2865325604Shselasky if (roce_version_cap & MLX5_ROCE_VERSION_2_CAP) 2866325604Shselasky ret |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2867325604Shselasky 2868325604Shselasky return ret; 2869325604Shselasky} 2870325604Shselasky 2871325604Shselaskystatic int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num, 2872325604Shselasky struct ib_port_immutable *immutable) 2873325604Shselasky{ 2874325604Shselasky struct ib_port_attr attr; 2875325604Shselasky int err; 2876325604Shselasky 2877331769Shselasky err = mlx5_ib_query_port(ibdev, port_num, &attr); 2878325604Shselasky if (err) 2879325604Shselasky return err; 2880325604Shselasky 2881325604Shselasky immutable->pkey_tbl_len = attr.pkey_tbl_len; 2882325604Shselasky immutable->gid_tbl_len = attr.gid_tbl_len; 2883325604Shselasky immutable->core_cap_flags = get_core_cap_flags(ibdev); 2884331769Shselasky immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2885325604Shselasky 2886325604Shselasky return 0; 2887325604Shselasky} 2888325604Shselasky 2889331769Shselaskystatic void get_dev_fw_str(struct ib_device *ibdev, char *str, 2890331769Shselasky size_t str_len) 2891322810Shselasky{ 2892331769Shselasky struct mlx5_ib_dev *dev = 2893331769Shselasky container_of(ibdev, struct mlx5_ib_dev, ib_dev); 2894331769Shselasky snprintf(str, str_len, "%d.%d.%04d", fw_rev_maj(dev->mdev), 2895331769Shselasky fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 2896331769Shselasky} 2897322810Shselasky 2898331769Shselaskystatic int mlx5_roce_lag_init(struct mlx5_ib_dev *dev) 2899331769Shselasky{ 2900331769Shselasky return 0; 2901331769Shselasky} 2902322810Shselasky 2903331769Shselaskystatic void mlx5_roce_lag_cleanup(struct mlx5_ib_dev *dev) 2904331769Shselasky{ 2905331769Shselasky} 2906322810Shselasky 2907331769Shselaskystatic void mlx5_remove_roce_notifier(struct mlx5_ib_dev *dev) 2908331769Shselasky{ 2909331769Shselasky if (dev->roce.nb.notifier_call) { 2910331769Shselasky unregister_netdevice_notifier(&dev->roce.nb); 2911331769Shselasky dev->roce.nb.notifier_call = NULL; 2912322810Shselasky } 2913322810Shselasky} 2914322810Shselasky 2915331769Shselaskystatic int mlx5_enable_roce(struct mlx5_ib_dev *dev) 2916322810Shselasky{ 2917331769Shselasky VNET_ITERATOR_DECL(vnet_iter); 2918331769Shselasky struct net_device *idev; 2919322810Shselasky int err; 2920322810Shselasky 2921331769Shselasky /* Check if mlx5en net device already exists */ 2922331769Shselasky VNET_LIST_RLOCK(); 2923331769Shselasky VNET_FOREACH(vnet_iter) { 2924331769Shselasky IFNET_RLOCK(); 2925331769Shselasky CURVNET_SET_QUIET(vnet_iter); 2926331769Shselasky TAILQ_FOREACH(idev, &V_ifnet, if_link) { 2927331769Shselasky /* check if network interface belongs to mlx5en */ 2928331769Shselasky if (!mlx5_netdev_match(idev, dev->mdev, "mce")) 2929331769Shselasky continue; 2930331769Shselasky write_lock(&dev->roce.netdev_lock); 2931331769Shselasky dev->roce.netdev = idev; 2932331769Shselasky write_unlock(&dev->roce.netdev_lock); 2933331769Shselasky } 2934331769Shselasky CURVNET_RESTORE(); 2935331769Shselasky IFNET_RUNLOCK(); 2936331769Shselasky } 2937331769Shselasky VNET_LIST_RUNLOCK(); 2938322810Shselasky 2939331769Shselasky dev->roce.nb.notifier_call = mlx5_netdev_event; 2940331769Shselasky err = register_netdevice_notifier(&dev->roce.nb); 2941322810Shselasky if (err) { 2942331769Shselasky dev->roce.nb.notifier_call = NULL; 2943331769Shselasky return err; 2944322810Shselasky } 2945322810Shselasky 2946331769Shselasky err = mlx5_nic_vport_enable_roce(dev->mdev); 2947331769Shselasky if (err) 2948331769Shselasky goto err_unregister_netdevice_notifier; 2949322810Shselasky 2950331769Shselasky err = mlx5_roce_lag_init(dev); 2951331769Shselasky if (err) 2952331769Shselasky goto err_disable_roce; 2953322810Shselasky 2954331769Shselasky return 0; 2955322810Shselasky 2956331769Shselaskyerr_disable_roce: 2957331769Shselasky mlx5_nic_vport_disable_roce(dev->mdev); 2958322810Shselasky 2959331769Shselaskyerr_unregister_netdevice_notifier: 2960331769Shselasky mlx5_remove_roce_notifier(dev); 2961331769Shselasky return err; 2962322810Shselasky} 2963322810Shselasky 2964331769Shselaskystatic void mlx5_disable_roce(struct mlx5_ib_dev *dev) 2965322810Shselasky{ 2966331769Shselasky mlx5_roce_lag_cleanup(dev); 2967331769Shselasky mlx5_nic_vport_disable_roce(dev->mdev); 2968322810Shselasky} 2969322810Shselasky 2970322810Shselaskystatic void mlx5_ib_dealloc_q_port_counter(struct mlx5_ib_dev *dev, u8 port_num) 2971322810Shselasky{ 2972322810Shselasky mlx5_vport_dealloc_q_counter(dev->mdev, 2973322810Shselasky MLX5_INTERFACE_PROTOCOL_IB, 2974322810Shselasky dev->port[port_num].q_cnt_id); 2975322810Shselasky dev->port[port_num].q_cnt_id = 0; 2976322810Shselasky} 2977322810Shselasky 2978322810Shselaskystatic void mlx5_ib_dealloc_q_counters(struct mlx5_ib_dev *dev) 2979322810Shselasky{ 2980322810Shselasky unsigned int i; 2981322810Shselasky 2982322810Shselasky for (i = 0; i < dev->num_ports; i++) 2983322810Shselasky mlx5_ib_dealloc_q_port_counter(dev, i); 2984322810Shselasky} 2985322810Shselasky 2986322810Shselaskystatic int mlx5_ib_alloc_q_counters(struct mlx5_ib_dev *dev) 2987322810Shselasky{ 2988322810Shselasky int i; 2989322810Shselasky int ret; 2990322810Shselasky 2991322810Shselasky for (i = 0; i < dev->num_ports; i++) { 2992322810Shselasky ret = mlx5_vport_alloc_q_counter(dev->mdev, 2993322810Shselasky MLX5_INTERFACE_PROTOCOL_IB, 2994322810Shselasky &dev->port[i].q_cnt_id); 2995322810Shselasky if (ret) { 2996322810Shselasky mlx5_ib_warn(dev, 2997331769Shselasky "couldn't allocate queue counter for port %d, err %d\n", 2998331769Shselasky i + 1, ret); 2999322810Shselasky goto dealloc_counters; 3000322810Shselasky } 3001322810Shselasky } 3002322810Shselasky 3003322810Shselasky return 0; 3004322810Shselasky 3005322810Shselaskydealloc_counters: 3006322810Shselasky while (--i >= 0) 3007322810Shselasky mlx5_ib_dealloc_q_port_counter(dev, i); 3008322810Shselasky 3009322810Shselasky return ret; 3010322810Shselasky} 3011322810Shselasky 3012331769Shselaskystatic const char * const names[] = { 3013331769Shselasky "rx_write_requests", 3014331769Shselasky "rx_read_requests", 3015331769Shselasky "rx_atomic_requests", 3016331769Shselasky "out_of_buffer", 3017331769Shselasky "out_of_sequence", 3018331769Shselasky "duplicate_request", 3019331769Shselasky "rnr_nak_retry_err", 3020331769Shselasky "packet_seq_err", 3021331769Shselasky "implied_nak_seq_err", 3022331769Shselasky "local_ack_timeout_err", 3023322810Shselasky}; 3024322810Shselasky 3025331769Shselaskystatic const size_t stats_offsets[] = { 3026331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rx_write_requests), 3027331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rx_read_requests), 3028331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rx_atomic_requests), 3029331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, out_of_buffer), 3030331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, out_of_sequence), 3031331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, duplicate_request), 3032331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rnr_nak_retry_err), 3033331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, packet_seq_err), 3034331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, implied_nak_seq_err), 3035331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, local_ack_timeout_err), 3036322810Shselasky}; 3037322810Shselasky 3038331769Shselaskystatic struct rdma_hw_stats *mlx5_ib_alloc_hw_stats(struct ib_device *ibdev, 3039331769Shselasky u8 port_num) 3040322810Shselasky{ 3041331769Shselasky BUILD_BUG_ON(ARRAY_SIZE(names) != ARRAY_SIZE(stats_offsets)); 3042322810Shselasky 3043331769Shselasky /* We support only per port stats */ 3044331769Shselasky if (port_num == 0) 3045331769Shselasky return NULL; 3046322810Shselasky 3047331769Shselasky return rdma_alloc_hw_stats_struct(names, ARRAY_SIZE(names), 3048331769Shselasky RDMA_HW_STATS_DEFAULT_LIFESPAN); 3049322810Shselasky} 3050322810Shselasky 3051331769Shselaskystatic int mlx5_ib_get_hw_stats(struct ib_device *ibdev, 3052331769Shselasky struct rdma_hw_stats *stats, 3053331769Shselasky u8 port, int index) 3054322810Shselasky{ 3055331769Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 3056322810Shselasky int outlen = MLX5_ST_SZ_BYTES(query_q_counter_out); 3057322810Shselasky void *out; 3058331769Shselasky __be32 val; 3059322810Shselasky int ret; 3060331769Shselasky int i; 3061322810Shselasky 3062331769Shselasky if (!port || !stats) 3063331769Shselasky return -ENOSYS; 3064331769Shselasky 3065322810Shselasky out = mlx5_vzalloc(outlen); 3066322810Shselasky if (!out) 3067322810Shselasky return -ENOMEM; 3068322810Shselasky 3069331769Shselasky ret = mlx5_vport_query_q_counter(dev->mdev, 3070331769Shselasky dev->port[port - 1].q_cnt_id, 0, 3071331769Shselasky out, outlen); 3072322810Shselasky if (ret) 3073322810Shselasky goto free; 3074322810Shselasky 3075331769Shselasky for (i = 0; i < ARRAY_SIZE(names); i++) { 3076331769Shselasky val = *(__be32 *)(out + stats_offsets[i]); 3077331769Shselasky stats->value[i] = (u64)be32_to_cpu(val); 3078331769Shselasky } 3079322810Shselaskyfree: 3080331769Shselasky kvfree(out); 3081331769Shselasky return ARRAY_SIZE(names); 3082322810Shselasky} 3083322810Shselasky 3084322810Shselaskystatic void *mlx5_ib_add(struct mlx5_core_dev *mdev) 3085322810Shselasky{ 3086322810Shselasky struct mlx5_ib_dev *dev; 3087331769Shselasky enum rdma_link_layer ll; 3088331769Shselasky int port_type_cap; 3089322810Shselasky int err; 3090322810Shselasky int i; 3091322810Shselasky 3092331769Shselasky port_type_cap = MLX5_CAP_GEN(mdev, port_type); 3093331769Shselasky ll = mlx5_port_type_cap_to_rdma_ll(port_type_cap); 3094331769Shselasky 3095331769Shselasky if ((ll == IB_LINK_LAYER_ETHERNET) && !MLX5_CAP_GEN(mdev, roce)) 3096331769Shselasky return NULL; 3097331769Shselasky 3098322810Shselasky dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 3099322810Shselasky if (!dev) 3100322810Shselasky return NULL; 3101322810Shselasky 3102322810Shselasky dev->mdev = mdev; 3103322810Shselasky 3104322810Shselasky dev->port = kcalloc(MLX5_CAP_GEN(mdev, num_ports), sizeof(*dev->port), 3105331769Shselasky GFP_KERNEL); 3106322810Shselasky if (!dev->port) 3107322810Shselasky goto err_dealloc; 3108322810Shselasky 3109331769Shselasky rwlock_init(&dev->roce.netdev_lock); 3110322810Shselasky err = get_port_caps(dev); 3111322810Shselasky if (err) 3112322810Shselasky goto err_free_port; 3113322810Shselasky 3114322810Shselasky if (mlx5_use_mad_ifc(dev)) 3115322810Shselasky get_ext_port_caps(dev); 3116322810Shselasky 3117322810Shselasky MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 3118322810Shselasky 3119337099Shselasky snprintf(dev->ib_dev.name, IB_DEVICE_NAME_MAX, "mlx5_%d", device_get_unit(mdev->pdev->dev.bsddev)); 3120322810Shselasky dev->ib_dev.owner = THIS_MODULE; 3121322810Shselasky dev->ib_dev.node_type = RDMA_NODE_IB_CA; 3122331769Shselasky dev->ib_dev.local_dma_lkey = 0 /* not supported for now */; 3123322810Shselasky dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); 3124322810Shselasky dev->ib_dev.phys_port_cnt = dev->num_ports; 3125322810Shselasky dev->ib_dev.num_comp_vectors = 3126322810Shselasky dev->mdev->priv.eq_table.num_comp_vectors; 3127322810Shselasky dev->ib_dev.dma_device = &mdev->pdev->dev; 3128322810Shselasky 3129322810Shselasky dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 3130322810Shselasky dev->ib_dev.uverbs_cmd_mask = 3131322810Shselasky (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 3132322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 3133322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 3134322810Shselasky (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 3135322810Shselasky (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 3136331784Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 3137331784Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_AH) | 3138322810Shselasky (1ull << IB_USER_VERBS_CMD_REG_MR) | 3139331769Shselasky (1ull << IB_USER_VERBS_CMD_REREG_MR) | 3140322810Shselasky (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 3141322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 3142322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 3143322810Shselasky (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 3144322810Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 3145322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 3146322810Shselasky (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 3147322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 3148322810Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 3149322810Shselasky (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 3150322810Shselasky (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 3151322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 3152322810Shselasky (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 3153322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 3154322810Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 3155322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 3156322810Shselasky (1ull << IB_USER_VERBS_CMD_OPEN_QP); 3157331769Shselasky dev->ib_dev.uverbs_ex_cmd_mask = 3158331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 3159331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 3160331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 3161322810Shselasky 3162322810Shselasky dev->ib_dev.query_device = mlx5_ib_query_device; 3163322810Shselasky dev->ib_dev.query_port = mlx5_ib_query_port; 3164322810Shselasky dev->ib_dev.get_link_layer = mlx5_ib_port_link_layer; 3165331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) 3166331769Shselasky dev->ib_dev.get_netdev = mlx5_ib_get_netdev; 3167322810Shselasky dev->ib_dev.query_gid = mlx5_ib_query_gid; 3168331769Shselasky dev->ib_dev.add_gid = mlx5_ib_add_gid; 3169331769Shselasky dev->ib_dev.del_gid = mlx5_ib_del_gid; 3170322810Shselasky dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 3171322810Shselasky dev->ib_dev.modify_device = mlx5_ib_modify_device; 3172322810Shselasky dev->ib_dev.modify_port = mlx5_ib_modify_port; 3173322810Shselasky dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 3174322810Shselasky dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 3175322810Shselasky dev->ib_dev.mmap = mlx5_ib_mmap; 3176322810Shselasky dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 3177322810Shselasky dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 3178322810Shselasky dev->ib_dev.create_ah = mlx5_ib_create_ah; 3179322810Shselasky dev->ib_dev.query_ah = mlx5_ib_query_ah; 3180322810Shselasky dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 3181322810Shselasky dev->ib_dev.create_srq = mlx5_ib_create_srq; 3182322810Shselasky dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 3183322810Shselasky dev->ib_dev.query_srq = mlx5_ib_query_srq; 3184322810Shselasky dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 3185322810Shselasky dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 3186322810Shselasky dev->ib_dev.create_qp = mlx5_ib_create_qp; 3187322810Shselasky dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 3188322810Shselasky dev->ib_dev.query_qp = mlx5_ib_query_qp; 3189322810Shselasky dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 3190322810Shselasky dev->ib_dev.post_send = mlx5_ib_post_send; 3191322810Shselasky dev->ib_dev.post_recv = mlx5_ib_post_recv; 3192322810Shselasky dev->ib_dev.create_cq = mlx5_ib_create_cq; 3193322810Shselasky dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 3194322810Shselasky dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 3195322810Shselasky dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 3196322810Shselasky dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 3197322810Shselasky dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 3198322810Shselasky dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 3199322810Shselasky dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 3200331769Shselasky dev->ib_dev.rereg_user_mr = mlx5_ib_rereg_user_mr; 3201322810Shselasky dev->ib_dev.reg_phys_mr = mlx5_ib_reg_phys_mr; 3202322810Shselasky dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 3203322810Shselasky dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 3204322810Shselasky dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 3205322810Shselasky dev->ib_dev.process_mad = mlx5_ib_process_mad; 3206331769Shselasky dev->ib_dev.alloc_mr = mlx5_ib_alloc_mr; 3207331769Shselasky dev->ib_dev.map_mr_sg = mlx5_ib_map_mr_sg; 3208331769Shselasky dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 3209325604Shselasky dev->ib_dev.get_port_immutable = mlx5_port_immutable; 3210331769Shselasky dev->ib_dev.get_dev_fw_str = get_dev_fw_str; 3211331769Shselasky if (mlx5_core_is_pf(mdev)) { 3212331769Shselasky dev->ib_dev.get_vf_config = mlx5_ib_get_vf_config; 3213331769Shselasky dev->ib_dev.set_vf_link_state = mlx5_ib_set_vf_link_state; 3214331769Shselasky dev->ib_dev.get_vf_stats = mlx5_ib_get_vf_stats; 3215331769Shselasky dev->ib_dev.set_vf_guid = mlx5_ib_set_vf_guid; 3216331769Shselasky } 3217322810Shselasky 3218347801Shselasky dev->ib_dev.disassociate_ucontext = mlx5_ib_disassociate_ucontext; 3219347801Shselasky 3220331769Shselasky mlx5_ib_internal_fill_odp_caps(dev); 3221331769Shselasky 3222331769Shselasky if (MLX5_CAP_GEN(mdev, imaicl)) { 3223331769Shselasky dev->ib_dev.alloc_mw = mlx5_ib_alloc_mw; 3224331769Shselasky dev->ib_dev.dealloc_mw = mlx5_ib_dealloc_mw; 3225331769Shselasky dev->ib_dev.uverbs_cmd_mask |= 3226331769Shselasky (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 3227331769Shselasky (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 3228331769Shselasky } 3229331769Shselasky 3230331769Shselasky if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt) && 3231331769Shselasky MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) { 3232331769Shselasky dev->ib_dev.get_hw_stats = mlx5_ib_get_hw_stats; 3233331769Shselasky dev->ib_dev.alloc_hw_stats = mlx5_ib_alloc_hw_stats; 3234331769Shselasky } 3235331769Shselasky 3236322810Shselasky if (MLX5_CAP_GEN(mdev, xrc)) { 3237322810Shselasky dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 3238322810Shselasky dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 3239322810Shselasky dev->ib_dev.uverbs_cmd_mask |= 3240322810Shselasky (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 3241322810Shselasky (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 3242322810Shselasky } 3243322810Shselasky 3244331769Shselasky if (mlx5_ib_port_link_layer(&dev->ib_dev, 1) == 3245331769Shselasky IB_LINK_LAYER_ETHERNET) { 3246331769Shselasky dev->ib_dev.create_flow = mlx5_ib_create_flow; 3247331769Shselasky dev->ib_dev.destroy_flow = mlx5_ib_destroy_flow; 3248331769Shselasky dev->ib_dev.create_wq = mlx5_ib_create_wq; 3249331769Shselasky dev->ib_dev.modify_wq = mlx5_ib_modify_wq; 3250331769Shselasky dev->ib_dev.destroy_wq = mlx5_ib_destroy_wq; 3251331769Shselasky dev->ib_dev.create_rwq_ind_table = mlx5_ib_create_rwq_ind_table; 3252331769Shselasky dev->ib_dev.destroy_rwq_ind_table = mlx5_ib_destroy_rwq_ind_table; 3253331769Shselasky dev->ib_dev.uverbs_ex_cmd_mask |= 3254331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 3255331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW) | 3256331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) | 3257331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) | 3258331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) | 3259331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) | 3260331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL); 3261331769Shselasky } 3262322810Shselasky err = init_node_data(dev); 3263322810Shselasky if (err) 3264331769Shselasky goto err_free_port; 3265322810Shselasky 3266331769Shselasky mutex_init(&dev->flow_db.lock); 3267322810Shselasky mutex_init(&dev->cap_mask_mutex); 3268322810Shselasky INIT_LIST_HEAD(&dev->qp_list); 3269322810Shselasky spin_lock_init(&dev->reset_flow_resource_lock); 3270322810Shselasky 3271331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) { 3272331769Shselasky err = mlx5_enable_roce(dev); 3273331769Shselasky if (err) 3274331769Shselasky goto err_free_port; 3275331769Shselasky } 3276331769Shselasky 3277322810Shselasky err = create_dev_resources(&dev->devr); 3278322810Shselasky if (err) 3279322810Shselasky goto err_disable_roce; 3280322810Shselasky 3281331769Shselasky err = mlx5_ib_odp_init_one(dev); 3282331769Shselasky if (err) 3283331769Shselasky goto err_rsrc; 3284322810Shselasky 3285322810Shselasky err = mlx5_ib_alloc_q_counters(dev); 3286322810Shselasky if (err) 3287322810Shselasky goto err_odp; 3288322810Shselasky 3289322810Shselasky err = ib_register_device(&dev->ib_dev, NULL); 3290322810Shselasky if (err) 3291322810Shselasky goto err_q_cnt; 3292322810Shselasky 3293322810Shselasky err = create_umr_res(dev); 3294322810Shselasky if (err) 3295322810Shselasky goto err_dev; 3296322810Shselasky 3297322810Shselasky for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 3298322810Shselasky err = device_create_file(&dev->ib_dev.dev, 3299322810Shselasky mlx5_class_attributes[i]); 3300322810Shselasky if (err) 3301331769Shselasky goto err_umrc; 3302322810Shselasky } 3303322810Shselasky 3304331808Shselasky err = mlx5_ib_init_congestion(dev); 3305331808Shselasky if (err) 3306331808Shselasky goto err_umrc; 3307331808Shselasky 3308322810Shselasky dev->ib_active = true; 3309322810Shselasky 3310322810Shselasky return dev; 3311322810Shselasky 3312331769Shselaskyerr_umrc: 3313322810Shselasky destroy_umrc_res(dev); 3314322810Shselasky 3315322810Shselaskyerr_dev: 3316322810Shselasky ib_unregister_device(&dev->ib_dev); 3317322810Shselasky 3318322810Shselaskyerr_q_cnt: 3319322810Shselasky mlx5_ib_dealloc_q_counters(dev); 3320322810Shselasky 3321322810Shselaskyerr_odp: 3322331769Shselasky mlx5_ib_odp_remove_one(dev); 3323331769Shselasky 3324331769Shselaskyerr_rsrc: 3325322810Shselasky destroy_dev_resources(&dev->devr); 3326322810Shselasky 3327322810Shselaskyerr_disable_roce: 3328331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) { 3329331769Shselasky mlx5_disable_roce(dev); 3330331769Shselasky mlx5_remove_roce_notifier(dev); 3331331769Shselasky } 3332331769Shselasky 3333322810Shselaskyerr_free_port: 3334322810Shselasky kfree(dev->port); 3335322810Shselasky 3336322810Shselaskyerr_dealloc: 3337322810Shselasky ib_dealloc_device((struct ib_device *)dev); 3338322810Shselasky 3339322810Shselasky return NULL; 3340322810Shselasky} 3341322810Shselasky 3342322810Shselaskystatic void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 3343322810Shselasky{ 3344322810Shselasky struct mlx5_ib_dev *dev = context; 3345331769Shselasky enum rdma_link_layer ll = mlx5_ib_port_link_layer(&dev->ib_dev, 1); 3346322810Shselasky 3347331808Shselasky mlx5_ib_cleanup_congestion(dev); 3348331769Shselasky mlx5_remove_roce_notifier(dev); 3349331769Shselasky ib_unregister_device(&dev->ib_dev); 3350322810Shselasky mlx5_ib_dealloc_q_counters(dev); 3351322810Shselasky destroy_umrc_res(dev); 3352331769Shselasky mlx5_ib_odp_remove_one(dev); 3353322810Shselasky destroy_dev_resources(&dev->devr); 3354331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) 3355331769Shselasky mlx5_disable_roce(dev); 3356322810Shselasky kfree(dev->port); 3357322810Shselasky ib_dealloc_device(&dev->ib_dev); 3358322810Shselasky} 3359322810Shselasky 3360322810Shselaskystatic struct mlx5_interface mlx5_ib_interface = { 3361322810Shselasky .add = mlx5_ib_add, 3362322810Shselasky .remove = mlx5_ib_remove, 3363322810Shselasky .event = mlx5_ib_event, 3364322810Shselasky .protocol = MLX5_INTERFACE_PROTOCOL_IB, 3365322810Shselasky}; 3366322810Shselasky 3367322810Shselaskystatic int __init mlx5_ib_init(void) 3368322810Shselasky{ 3369322810Shselasky int err; 3370322810Shselasky 3371331769Shselasky err = mlx5_ib_odp_init(); 3372331769Shselasky if (err) 3373331769Shselasky return err; 3374331769Shselasky 3375322810Shselasky err = mlx5_register_interface(&mlx5_ib_interface); 3376322810Shselasky if (err) 3377322810Shselasky goto clean_odp; 3378322810Shselasky 3379322810Shselasky return err; 3380322810Shselasky 3381322810Shselaskyclean_odp: 3382331769Shselasky mlx5_ib_odp_cleanup(); 3383322810Shselasky return err; 3384322810Shselasky} 3385322810Shselasky 3386322810Shselaskystatic void __exit mlx5_ib_cleanup(void) 3387322810Shselasky{ 3388322810Shselasky mlx5_unregister_interface(&mlx5_ib_interface); 3389331769Shselasky mlx5_ib_odp_cleanup(); 3390322810Shselasky} 3391322810Shselasky 3392341948Shselaskystatic void 3393341948Shselaskymlx5_ib_show_version(void __unused *arg) 3394341948Shselasky{ 3395341948Shselasky 3396341948Shselasky printf("%s", mlx5_version); 3397341948Shselasky} 3398341948ShselaskySYSINIT(mlx5_ib_show_version, SI_SUB_DRIVERS, SI_ORDER_ANY, mlx5_ib_show_version, NULL); 3399341948Shselasky 3400322810Shselaskymodule_init_order(mlx5_ib_init, SI_ORDER_THIRD); 3401322810Shselaskymodule_exit_order(mlx5_ib_cleanup, SI_ORDER_THIRD); 3402