mlx5_ib_main.c revision 331808
1322810Shselasky/*- 2322810Shselasky * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 3322810Shselasky * 4322810Shselasky * Redistribution and use in source and binary forms, with or without 5322810Shselasky * modification, are permitted provided that the following conditions 6322810Shselasky * are met: 7322810Shselasky * 1. Redistributions of source code must retain the above copyright 8322810Shselasky * notice, this list of conditions and the following disclaimer. 9322810Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10322810Shselasky * notice, this list of conditions and the following disclaimer in the 11322810Shselasky * documentation and/or other materials provided with the distribution. 12322810Shselasky * 13322810Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14322810Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15322810Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16322810Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17322810Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18322810Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19322810Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20322810Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21322810Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22322810Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23322810Shselasky * SUCH DAMAGE. 24322810Shselasky * 25322810Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c 331808 2018-03-30 19:15:04Z hselasky $ 26322810Shselasky */ 27322810Shselasky 28331769Shselasky#include <linux/module.h> 29322810Shselasky#include <linux/errno.h> 30322810Shselasky#include <linux/pci.h> 31322810Shselasky#include <linux/dma-mapping.h> 32322810Shselasky#include <linux/slab.h> 33331769Shselasky#if defined(CONFIG_X86) 34331769Shselasky#include <asm/pat.h> 35331769Shselasky#endif 36322810Shselasky#include <linux/sched.h> 37331769Shselasky#include <linux/delay.h> 38322810Shselasky#include <linux/fs.h> 39322810Shselasky#undef inode 40322810Shselasky#include <rdma/ib_user_verbs.h> 41331769Shselasky#include <rdma/ib_addr.h> 42331769Shselasky#include <rdma/ib_cache.h> 43331769Shselasky#include <dev/mlx5/port.h> 44331769Shselasky#include <dev/mlx5/vport.h> 45331769Shselasky#include <linux/list.h> 46322810Shselasky#include <rdma/ib_smi.h> 47322810Shselasky#include <rdma/ib_umem.h> 48331769Shselasky#include <linux/in.h> 49331769Shselasky#include <linux/etherdevice.h> 50331769Shselasky#include <dev/mlx5/fs.h> 51322810Shselasky#include "mlx5_ib.h" 52322810Shselasky 53322810Shselasky#define DRIVER_NAME "mlx5_ib" 54331769Shselasky#define DRIVER_VERSION "3.4.1-BETA" 55331769Shselasky#define DRIVER_RELDATE "October 2017" 56322810Shselasky 57322810ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 58322810ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 59322810ShselaskyMODULE_DEPEND(mlx5ib, linuxkpi, 1, 1, 1); 60322810ShselaskyMODULE_DEPEND(mlx5ib, mlx5, 1, 1, 1); 61322810ShselaskyMODULE_DEPEND(mlx5ib, ibcore, 1, 1, 1); 62322810ShselaskyMODULE_VERSION(mlx5ib, 1); 63322810Shselasky 64322810Shselaskystatic int deprecated_prof_sel = 2; 65322810Shselaskymodule_param_named(prof_sel, deprecated_prof_sel, int, 0444); 66322810ShselaskyMODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); 67322810Shselasky 68331769Shselaskystatic char mlx5_version[] = 69331769Shselasky DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 70331769Shselasky DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 71331769Shselasky 72322810Shselaskyenum { 73331769Shselasky MLX5_ATOMIC_SIZE_QP_8BYTES = 1 << 3, 74322810Shselasky}; 75322810Shselasky 76331769Shselaskystatic enum rdma_link_layer 77331769Shselaskymlx5_port_type_cap_to_rdma_ll(int port_type_cap) 78331769Shselasky{ 79331769Shselasky switch (port_type_cap) { 80331769Shselasky case MLX5_CAP_PORT_TYPE_IB: 81331769Shselasky return IB_LINK_LAYER_INFINIBAND; 82331769Shselasky case MLX5_CAP_PORT_TYPE_ETH: 83331769Shselasky return IB_LINK_LAYER_ETHERNET; 84331769Shselasky default: 85331769Shselasky return IB_LINK_LAYER_UNSPECIFIED; 86331769Shselasky } 87331769Shselasky} 88322810Shselasky 89331769Shselaskystatic enum rdma_link_layer 90331769Shselaskymlx5_ib_port_link_layer(struct ib_device *device, u8 port_num) 91331769Shselasky{ 92331769Shselasky struct mlx5_ib_dev *dev = to_mdev(device); 93331769Shselasky int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type); 94322810Shselasky 95331769Shselasky return mlx5_port_type_cap_to_rdma_ll(port_type_cap); 96331769Shselasky} 97331769Shselasky 98331769Shselaskystatic bool mlx5_netdev_match(struct net_device *ndev, 99331769Shselasky struct mlx5_core_dev *mdev, 100331769Shselasky const char *dname) 101322810Shselasky{ 102331769Shselasky return ndev->if_type == IFT_ETHER && 103331769Shselasky ndev->if_dname != NULL && 104331769Shselasky strcmp(ndev->if_dname, dname) == 0 && 105331769Shselasky ndev->if_softc != NULL && 106331769Shselasky *(struct mlx5_core_dev **)ndev->if_softc == mdev; 107331769Shselasky} 108322810Shselasky 109331769Shselaskystatic int mlx5_netdev_event(struct notifier_block *this, 110331769Shselasky unsigned long event, void *ptr) 111331769Shselasky{ 112331769Shselasky struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 113331769Shselasky struct mlx5_ib_dev *ibdev = container_of(this, struct mlx5_ib_dev, 114331769Shselasky roce.nb); 115322810Shselasky 116331769Shselasky switch (event) { 117331769Shselasky case NETDEV_REGISTER: 118331769Shselasky case NETDEV_UNREGISTER: 119331769Shselasky write_lock(&ibdev->roce.netdev_lock); 120331769Shselasky /* check if network interface belongs to mlx5en */ 121331769Shselasky if (mlx5_netdev_match(ndev, ibdev->mdev, "mce")) 122331769Shselasky ibdev->roce.netdev = (event == NETDEV_UNREGISTER) ? 123331769Shselasky NULL : ndev; 124331769Shselasky write_unlock(&ibdev->roce.netdev_lock); 125331769Shselasky break; 126331769Shselasky 127331769Shselasky case NETDEV_UP: 128331769Shselasky case NETDEV_DOWN: { 129331769Shselasky struct net_device *upper = NULL; 130331769Shselasky 131331769Shselasky if ((upper == ndev || (!upper && ndev == ibdev->roce.netdev)) 132331769Shselasky && ibdev->ib_active) { 133331769Shselasky struct ib_event ibev = {0}; 134331769Shselasky 135331769Shselasky ibev.device = &ibdev->ib_dev; 136331769Shselasky ibev.event = (event == NETDEV_UP) ? 137331769Shselasky IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 138331769Shselasky ibev.element.port_num = 1; 139331769Shselasky ib_dispatch_event(&ibev); 140322810Shselasky } 141331769Shselasky break; 142322810Shselasky } 143322810Shselasky 144331769Shselasky default: 145331769Shselasky break; 146322810Shselasky } 147331769Shselasky 148331769Shselasky return NOTIFY_DONE; 149322810Shselasky} 150322810Shselasky 151331769Shselaskystatic struct net_device *mlx5_ib_get_netdev(struct ib_device *device, 152331769Shselasky u8 port_num) 153322810Shselasky{ 154331769Shselasky struct mlx5_ib_dev *ibdev = to_mdev(device); 155331769Shselasky struct net_device *ndev; 156331769Shselasky 157331769Shselasky /* Ensure ndev does not disappear before we invoke dev_hold() 158331769Shselasky */ 159331769Shselasky read_lock(&ibdev->roce.netdev_lock); 160331769Shselasky ndev = ibdev->roce.netdev; 161331769Shselasky if (ndev) 162331769Shselasky dev_hold(ndev); 163331769Shselasky read_unlock(&ibdev->roce.netdev_lock); 164331769Shselasky 165331769Shselasky return ndev; 166331769Shselasky} 167331769Shselasky 168331805Shselaskystatic int translate_eth_proto_oper(u32 eth_proto_oper, u8 *active_speed, 169331805Shselasky u8 *active_width) 170331805Shselasky{ 171331805Shselasky switch (eth_proto_oper) { 172331805Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII): 173331805Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_KX): 174331805Shselasky case MLX5E_PROT_MASK(MLX5E_100BASE_TX): 175331805Shselasky case MLX5E_PROT_MASK(MLX5E_1000BASE_T): 176331805Shselasky *active_width = IB_WIDTH_1X; 177331805Shselasky *active_speed = IB_SPEED_SDR; 178331805Shselasky break; 179331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_T): 180331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_CX4): 181331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_KX4): 182331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_KR): 183331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_CR): 184331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_SR): 185331805Shselasky case MLX5E_PROT_MASK(MLX5E_10GBASE_ER): 186331805Shselasky *active_width = IB_WIDTH_1X; 187331805Shselasky *active_speed = IB_SPEED_QDR; 188331805Shselasky break; 189331805Shselasky case MLX5E_PROT_MASK(MLX5E_25GBASE_CR): 190331805Shselasky case MLX5E_PROT_MASK(MLX5E_25GBASE_KR): 191331805Shselasky case MLX5E_PROT_MASK(MLX5E_25GBASE_SR): 192331805Shselasky *active_width = IB_WIDTH_1X; 193331805Shselasky *active_speed = IB_SPEED_EDR; 194331805Shselasky break; 195331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_CR4): 196331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_KR4): 197331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_SR4): 198331805Shselasky case MLX5E_PROT_MASK(MLX5E_40GBASE_LR4): 199331805Shselasky *active_width = IB_WIDTH_4X; 200331805Shselasky *active_speed = IB_SPEED_QDR; 201331805Shselasky break; 202331805Shselasky case MLX5E_PROT_MASK(MLX5E_50GBASE_CR2): 203331805Shselasky case MLX5E_PROT_MASK(MLX5E_50GBASE_KR2): 204331805Shselasky case MLX5E_PROT_MASK(MLX5E_50GBASE_SR2): 205331805Shselasky *active_width = IB_WIDTH_1X; 206331805Shselasky *active_speed = IB_SPEED_HDR; 207331805Shselasky break; 208331805Shselasky case MLX5E_PROT_MASK(MLX5E_56GBASE_R4): 209331805Shselasky *active_width = IB_WIDTH_4X; 210331805Shselasky *active_speed = IB_SPEED_FDR; 211331805Shselasky break; 212331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_CR4): 213331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_SR4): 214331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_KR4): 215331805Shselasky case MLX5E_PROT_MASK(MLX5E_100GBASE_LR4): 216331805Shselasky *active_width = IB_WIDTH_4X; 217331805Shselasky *active_speed = IB_SPEED_EDR; 218331805Shselasky break; 219331805Shselasky default: 220331805Shselasky return -EINVAL; 221331805Shselasky } 222331805Shselasky 223331805Shselasky return 0; 224331805Shselasky} 225331805Shselasky 226331769Shselaskystatic int mlx5_query_port_roce(struct ib_device *device, u8 port_num, 227331769Shselasky struct ib_port_attr *props) 228331769Shselasky{ 229322810Shselasky struct mlx5_ib_dev *dev = to_mdev(device); 230331769Shselasky struct net_device *ndev; 231331769Shselasky enum ib_mtu ndev_ib_mtu; 232331769Shselasky u16 qkey_viol_cntr; 233331805Shselasky u32 eth_prot_oper; 234331805Shselasky int err; 235322810Shselasky 236331769Shselasky memset(props, 0, sizeof(*props)); 237331769Shselasky 238331805Shselasky /* Possible bad flows are checked before filling out props so in case 239331805Shselasky * of an error it will still be zeroed out. 240331805Shselasky */ 241331805Shselasky err = mlx5_query_port_eth_proto_oper(dev->mdev, ð_prot_oper, port_num); 242331805Shselasky if (err) 243331805Shselasky return err; 244331805Shselasky 245331805Shselasky translate_eth_proto_oper(eth_prot_oper, &props->active_speed, 246331805Shselasky &props->active_width); 247331805Shselasky 248331769Shselasky props->port_cap_flags |= IB_PORT_CM_SUP; 249331769Shselasky props->port_cap_flags |= IB_PORT_IP_BASED_GIDS; 250331769Shselasky 251331769Shselasky props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev, 252331769Shselasky roce_address_table_size); 253331769Shselasky props->max_mtu = IB_MTU_4096; 254331769Shselasky props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg); 255331769Shselasky props->pkey_tbl_len = 1; 256331769Shselasky props->state = IB_PORT_DOWN; 257331769Shselasky props->phys_state = 3; 258331769Shselasky 259331769Shselasky mlx5_query_nic_vport_qkey_viol_cntr(dev->mdev, &qkey_viol_cntr); 260331769Shselasky props->qkey_viol_cntr = qkey_viol_cntr; 261331769Shselasky 262331769Shselasky ndev = mlx5_ib_get_netdev(device, port_num); 263331769Shselasky if (!ndev) 264331769Shselasky return 0; 265331769Shselasky 266331769Shselasky if (netif_running(ndev) && netif_carrier_ok(ndev)) { 267331769Shselasky props->state = IB_PORT_ACTIVE; 268331769Shselasky props->phys_state = 5; 269331769Shselasky } 270331769Shselasky 271331769Shselasky ndev_ib_mtu = iboe_get_mtu(ndev->if_mtu); 272331769Shselasky 273331769Shselasky dev_put(ndev); 274331769Shselasky 275331769Shselasky props->active_mtu = min(props->max_mtu, ndev_ib_mtu); 276331769Shselasky return 0; 277331769Shselasky} 278331769Shselasky 279331769Shselaskystatic void ib_gid_to_mlx5_roce_addr(const union ib_gid *gid, 280331769Shselasky const struct ib_gid_attr *attr, 281331769Shselasky void *mlx5_addr) 282331769Shselasky{ 283331769Shselasky#define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v) 284331769Shselasky char *mlx5_addr_l3_addr = MLX5_ADDR_OF(roce_addr_layout, mlx5_addr, 285331769Shselasky source_l3_address); 286331769Shselasky void *mlx5_addr_mac = MLX5_ADDR_OF(roce_addr_layout, mlx5_addr, 287331769Shselasky source_mac_47_32); 288331769Shselasky 289331769Shselasky if (!gid) 290331769Shselasky return; 291331769Shselasky ether_addr_copy(mlx5_addr_mac, IF_LLADDR(attr->ndev)); 292331769Shselasky 293331769Shselasky if (is_vlan_dev(attr->ndev)) { 294331769Shselasky MLX5_SET_RA(mlx5_addr, vlan_valid, 1); 295331769Shselasky MLX5_SET_RA(mlx5_addr, vlan_id, vlan_dev_vlan_id(attr->ndev)); 296331769Shselasky } 297331769Shselasky 298331769Shselasky switch (attr->gid_type) { 299331769Shselasky case IB_GID_TYPE_IB: 300331769Shselasky MLX5_SET_RA(mlx5_addr, roce_version, MLX5_ROCE_VERSION_1); 301331769Shselasky break; 302331769Shselasky case IB_GID_TYPE_ROCE_UDP_ENCAP: 303331769Shselasky MLX5_SET_RA(mlx5_addr, roce_version, MLX5_ROCE_VERSION_2); 304331769Shselasky break; 305331769Shselasky 306322810Shselasky default: 307331769Shselasky WARN_ON(true); 308322810Shselasky } 309331769Shselasky 310331769Shselasky if (attr->gid_type != IB_GID_TYPE_IB) { 311331769Shselasky if (ipv6_addr_v4mapped((void *)gid)) 312331769Shselasky MLX5_SET_RA(mlx5_addr, roce_l3_type, 313331769Shselasky MLX5_ROCE_L3_TYPE_IPV4); 314331769Shselasky else 315331769Shselasky MLX5_SET_RA(mlx5_addr, roce_l3_type, 316331769Shselasky MLX5_ROCE_L3_TYPE_IPV6); 317331769Shselasky } 318331769Shselasky 319331769Shselasky if ((attr->gid_type == IB_GID_TYPE_IB) || 320331769Shselasky !ipv6_addr_v4mapped((void *)gid)) 321331769Shselasky memcpy(mlx5_addr_l3_addr, gid, sizeof(*gid)); 322331769Shselasky else 323331769Shselasky memcpy(&mlx5_addr_l3_addr[12], &gid->raw[12], 4); 324322810Shselasky} 325322810Shselasky 326331769Shselaskystatic int set_roce_addr(struct ib_device *device, u8 port_num, 327331769Shselasky unsigned int index, 328331769Shselasky const union ib_gid *gid, 329331769Shselasky const struct ib_gid_attr *attr) 330331769Shselasky{ 331331769Shselasky struct mlx5_ib_dev *dev = to_mdev(device); 332331769Shselasky u32 in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0}; 333331769Shselasky u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0}; 334331769Shselasky void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address); 335331769Shselasky enum rdma_link_layer ll = mlx5_ib_port_link_layer(device, port_num); 336331769Shselasky 337331769Shselasky if (ll != IB_LINK_LAYER_ETHERNET) 338331769Shselasky return -EINVAL; 339331769Shselasky 340331769Shselasky ib_gid_to_mlx5_roce_addr(gid, attr, in_addr); 341331769Shselasky 342331769Shselasky MLX5_SET(set_roce_address_in, in, roce_address_index, index); 343331769Shselasky MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS); 344331769Shselasky return mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out)); 345331769Shselasky} 346331769Shselasky 347331769Shselaskystatic int mlx5_ib_add_gid(struct ib_device *device, u8 port_num, 348331769Shselasky unsigned int index, const union ib_gid *gid, 349331769Shselasky const struct ib_gid_attr *attr, 350331769Shselasky __always_unused void **context) 351331769Shselasky{ 352331769Shselasky return set_roce_addr(device, port_num, index, gid, attr); 353331769Shselasky} 354331769Shselasky 355331769Shselaskystatic int mlx5_ib_del_gid(struct ib_device *device, u8 port_num, 356331769Shselasky unsigned int index, __always_unused void **context) 357331769Shselasky{ 358331769Shselasky return set_roce_addr(device, port_num, index, NULL, NULL); 359331769Shselasky} 360331769Shselasky 361331769Shselasky__be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num, 362331769Shselasky int index) 363331769Shselasky{ 364331769Shselasky struct ib_gid_attr attr; 365331769Shselasky union ib_gid gid; 366331769Shselasky 367331769Shselasky if (ib_get_cached_gid(&dev->ib_dev, port_num, index, &gid, &attr)) 368331769Shselasky return 0; 369331769Shselasky 370331769Shselasky if (!attr.ndev) 371331769Shselasky return 0; 372331769Shselasky 373331769Shselasky dev_put(attr.ndev); 374331769Shselasky 375331769Shselasky if (attr.gid_type != IB_GID_TYPE_ROCE_UDP_ENCAP) 376331769Shselasky return 0; 377331769Shselasky 378331769Shselasky return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port)); 379331769Shselasky} 380331769Shselasky 381322810Shselaskystatic int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev) 382322810Shselasky{ 383331769Shselasky if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB) 384331769Shselasky return !MLX5_CAP_GEN(dev->mdev, ib_virt); 385331769Shselasky return 0; 386322810Shselasky} 387322810Shselasky 388322810Shselaskyenum { 389322810Shselasky MLX5_VPORT_ACCESS_METHOD_MAD, 390322810Shselasky MLX5_VPORT_ACCESS_METHOD_HCA, 391322810Shselasky MLX5_VPORT_ACCESS_METHOD_NIC, 392322810Shselasky}; 393322810Shselasky 394322810Shselaskystatic int mlx5_get_vport_access_method(struct ib_device *ibdev) 395322810Shselasky{ 396322810Shselasky if (mlx5_use_mad_ifc(to_mdev(ibdev))) 397322810Shselasky return MLX5_VPORT_ACCESS_METHOD_MAD; 398322810Shselasky 399322810Shselasky if (mlx5_ib_port_link_layer(ibdev, 1) == 400322810Shselasky IB_LINK_LAYER_ETHERNET) 401322810Shselasky return MLX5_VPORT_ACCESS_METHOD_NIC; 402322810Shselasky 403322810Shselasky return MLX5_VPORT_ACCESS_METHOD_HCA; 404322810Shselasky} 405322810Shselasky 406331769Shselaskystatic void get_atomic_caps(struct mlx5_ib_dev *dev, 407331769Shselasky struct ib_device_attr *props) 408331769Shselasky{ 409331769Shselasky u8 tmp; 410331769Shselasky u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 411331769Shselasky u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 412331769Shselasky u8 atomic_req_8B_endianness_mode = 413331769Shselasky MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianess_mode); 414331769Shselasky 415331769Shselasky /* Check if HW supports 8 bytes standard atomic operations and capable 416331769Shselasky * of host endianness respond 417331769Shselasky */ 418331769Shselasky tmp = MLX5_ATOMIC_OPS_CMP_SWAP | MLX5_ATOMIC_OPS_FETCH_ADD; 419331769Shselasky if (((atomic_operations & tmp) == tmp) && 420331769Shselasky (atomic_size_qp & MLX5_ATOMIC_SIZE_QP_8BYTES) && 421331769Shselasky (atomic_req_8B_endianness_mode)) { 422331769Shselasky props->atomic_cap = IB_ATOMIC_HCA; 423331769Shselasky } else { 424331769Shselasky props->atomic_cap = IB_ATOMIC_NONE; 425331769Shselasky } 426331769Shselasky} 427331769Shselasky 428322810Shselaskystatic int mlx5_query_system_image_guid(struct ib_device *ibdev, 429322810Shselasky __be64 *sys_image_guid) 430322810Shselasky{ 431322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 432322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 433322810Shselasky u64 tmp; 434322810Shselasky int err; 435322810Shselasky 436322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 437322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 438331769Shselasky return mlx5_query_mad_ifc_system_image_guid(ibdev, 439322810Shselasky sys_image_guid); 440322810Shselasky 441322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 442322810Shselasky err = mlx5_query_hca_vport_system_image_guid(mdev, &tmp); 443331769Shselasky break; 444322810Shselasky 445322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 446322810Shselasky err = mlx5_query_nic_vport_system_image_guid(mdev, &tmp); 447331769Shselasky break; 448322810Shselasky 449322810Shselasky default: 450322810Shselasky return -EINVAL; 451322810Shselasky } 452331769Shselasky 453331769Shselasky if (!err) 454331769Shselasky *sys_image_guid = cpu_to_be64(tmp); 455331769Shselasky 456331769Shselasky return err; 457331769Shselasky 458322810Shselasky} 459322810Shselasky 460322810Shselaskystatic int mlx5_query_max_pkeys(struct ib_device *ibdev, 461322810Shselasky u16 *max_pkeys) 462322810Shselasky{ 463322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 464322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 465322810Shselasky 466322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 467322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 468331769Shselasky return mlx5_query_mad_ifc_max_pkeys(ibdev, max_pkeys); 469322810Shselasky 470322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 471322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 472322810Shselasky *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, 473322810Shselasky pkey_table_size)); 474322810Shselasky return 0; 475322810Shselasky 476322810Shselasky default: 477322810Shselasky return -EINVAL; 478322810Shselasky } 479322810Shselasky} 480322810Shselasky 481322810Shselaskystatic int mlx5_query_vendor_id(struct ib_device *ibdev, 482322810Shselasky u32 *vendor_id) 483322810Shselasky{ 484322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 485322810Shselasky 486322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 487322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 488331769Shselasky return mlx5_query_mad_ifc_vendor_id(ibdev, vendor_id); 489322810Shselasky 490322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 491322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 492322810Shselasky return mlx5_core_query_vendor_id(dev->mdev, vendor_id); 493322810Shselasky 494322810Shselasky default: 495322810Shselasky return -EINVAL; 496322810Shselasky } 497322810Shselasky} 498322810Shselasky 499322810Shselaskystatic int mlx5_query_node_guid(struct mlx5_ib_dev *dev, 500322810Shselasky __be64 *node_guid) 501322810Shselasky{ 502322810Shselasky u64 tmp; 503322810Shselasky int err; 504322810Shselasky 505322810Shselasky switch (mlx5_get_vport_access_method(&dev->ib_dev)) { 506322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 507331769Shselasky return mlx5_query_mad_ifc_node_guid(dev, node_guid); 508322810Shselasky 509322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 510322810Shselasky err = mlx5_query_hca_vport_node_guid(dev->mdev, &tmp); 511331769Shselasky break; 512322810Shselasky 513322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 514322810Shselasky err = mlx5_query_nic_vport_node_guid(dev->mdev, &tmp); 515331769Shselasky break; 516322810Shselasky 517322810Shselasky default: 518322810Shselasky return -EINVAL; 519322810Shselasky } 520331769Shselasky 521331769Shselasky if (!err) 522331769Shselasky *node_guid = cpu_to_be64(tmp); 523331769Shselasky 524331769Shselasky return err; 525322810Shselasky} 526322810Shselasky 527322810Shselaskystruct mlx5_reg_node_desc { 528331769Shselasky u8 desc[IB_DEVICE_NODE_DESC_MAX]; 529322810Shselasky}; 530322810Shselasky 531322810Shselaskystatic int mlx5_query_node_desc(struct mlx5_ib_dev *dev, char *node_desc) 532322810Shselasky{ 533322810Shselasky struct mlx5_reg_node_desc in; 534322810Shselasky 535322810Shselasky if (mlx5_use_mad_ifc(dev)) 536331769Shselasky return mlx5_query_mad_ifc_node_desc(dev, node_desc); 537322810Shselasky 538322810Shselasky memset(&in, 0, sizeof(in)); 539322810Shselasky 540322810Shselasky return mlx5_core_access_reg(dev->mdev, &in, sizeof(in), node_desc, 541322810Shselasky sizeof(struct mlx5_reg_node_desc), 542322810Shselasky MLX5_REG_NODE_DESC, 0, 0); 543322810Shselasky} 544322810Shselasky 545322810Shselaskystatic int mlx5_ib_query_device(struct ib_device *ibdev, 546331769Shselasky struct ib_device_attr *props, 547331769Shselasky struct ib_udata *uhw) 548322810Shselasky{ 549322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 550322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 551331769Shselasky int err = -ENOMEM; 552322810Shselasky int max_rq_sg; 553322810Shselasky int max_sq_sg; 554331769Shselasky u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); 555331769Shselasky struct mlx5_ib_query_device_resp resp = {}; 556331769Shselasky size_t resp_len; 557331769Shselasky u64 max_tso; 558322810Shselasky 559331769Shselasky resp_len = sizeof(resp.comp_mask) + sizeof(resp.response_length); 560331769Shselasky if (uhw->outlen && uhw->outlen < resp_len) 561331769Shselasky return -EINVAL; 562331769Shselasky else 563331769Shselasky resp.response_length = resp_len; 564322810Shselasky 565331769Shselasky if (uhw->inlen && !ib_is_udata_cleared(uhw, 0, uhw->inlen)) 566331769Shselasky return -EINVAL; 567331769Shselasky 568322810Shselasky memset(props, 0, sizeof(*props)); 569322810Shselasky err = mlx5_query_system_image_guid(ibdev, 570322810Shselasky &props->sys_image_guid); 571322810Shselasky if (err) 572322810Shselasky return err; 573322810Shselasky 574322810Shselasky err = mlx5_query_max_pkeys(ibdev, &props->max_pkeys); 575322810Shselasky if (err) 576322810Shselasky return err; 577322810Shselasky 578322810Shselasky err = mlx5_query_vendor_id(ibdev, &props->vendor_id); 579322810Shselasky if (err) 580322810Shselasky return err; 581322810Shselasky 582322810Shselasky props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 583331769Shselasky (fw_rev_min(dev->mdev) << 16) | 584322810Shselasky fw_rev_sub(dev->mdev); 585322810Shselasky props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 586322810Shselasky IB_DEVICE_PORT_ACTIVE_EVENT | 587322810Shselasky IB_DEVICE_SYS_IMAGE_GUID | 588322810Shselasky IB_DEVICE_RC_RNR_NAK_GEN; 589322810Shselasky 590322810Shselasky if (MLX5_CAP_GEN(mdev, pkv)) 591322810Shselasky props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 592322810Shselasky if (MLX5_CAP_GEN(mdev, qkv)) 593322810Shselasky props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 594322810Shselasky if (MLX5_CAP_GEN(mdev, apm)) 595322810Shselasky props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 596322810Shselasky if (MLX5_CAP_GEN(mdev, xrc)) 597322810Shselasky props->device_cap_flags |= IB_DEVICE_XRC; 598331769Shselasky if (MLX5_CAP_GEN(mdev, imaicl)) { 599331769Shselasky props->device_cap_flags |= IB_DEVICE_MEM_WINDOW | 600331769Shselasky IB_DEVICE_MEM_WINDOW_TYPE_2B; 601331769Shselasky props->max_mw = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 602331769Shselasky /* We support 'Gappy' memory registration too */ 603331769Shselasky props->device_cap_flags |= IB_DEVICE_SG_GAPS_REG; 604331769Shselasky } 605322810Shselasky props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 606331769Shselasky if (MLX5_CAP_GEN(mdev, sho)) { 607331769Shselasky props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 608331769Shselasky /* At this stage no support for signature handover */ 609331769Shselasky props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 610331769Shselasky IB_PROT_T10DIF_TYPE_2 | 611331769Shselasky IB_PROT_T10DIF_TYPE_3; 612331769Shselasky props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 613331769Shselasky IB_GUARD_T10DIF_CSUM; 614331769Shselasky } 615322810Shselasky if (MLX5_CAP_GEN(mdev, block_lb_mc)) 616322810Shselasky props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 617322810Shselasky 618331769Shselasky if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads)) { 619331769Shselasky if (MLX5_CAP_ETH(mdev, csum_cap)) 620331769Shselasky props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 621331769Shselasky 622331769Shselasky if (field_avail(typeof(resp), tso_caps, uhw->outlen)) { 623331769Shselasky max_tso = MLX5_CAP_ETH(mdev, max_lso_cap); 624331769Shselasky if (max_tso) { 625331769Shselasky resp.tso_caps.max_tso = 1 << max_tso; 626331769Shselasky resp.tso_caps.supported_qpts |= 627331769Shselasky 1 << IB_QPT_RAW_PACKET; 628331769Shselasky resp.response_length += sizeof(resp.tso_caps); 629331769Shselasky } 630331769Shselasky } 631331769Shselasky 632331769Shselasky if (field_avail(typeof(resp), rss_caps, uhw->outlen)) { 633331769Shselasky resp.rss_caps.rx_hash_function = 634331769Shselasky MLX5_RX_HASH_FUNC_TOEPLITZ; 635331769Shselasky resp.rss_caps.rx_hash_fields_mask = 636331769Shselasky MLX5_RX_HASH_SRC_IPV4 | 637331769Shselasky MLX5_RX_HASH_DST_IPV4 | 638331769Shselasky MLX5_RX_HASH_SRC_IPV6 | 639331769Shselasky MLX5_RX_HASH_DST_IPV6 | 640331769Shselasky MLX5_RX_HASH_SRC_PORT_TCP | 641331769Shselasky MLX5_RX_HASH_DST_PORT_TCP | 642331769Shselasky MLX5_RX_HASH_SRC_PORT_UDP | 643331769Shselasky MLX5_RX_HASH_DST_PORT_UDP; 644331769Shselasky resp.response_length += sizeof(resp.rss_caps); 645331769Shselasky } 646331769Shselasky } else { 647331769Shselasky if (field_avail(typeof(resp), tso_caps, uhw->outlen)) 648331769Shselasky resp.response_length += sizeof(resp.tso_caps); 649331769Shselasky if (field_avail(typeof(resp), rss_caps, uhw->outlen)) 650331769Shselasky resp.response_length += sizeof(resp.rss_caps); 651331769Shselasky } 652331769Shselasky 653331769Shselasky if (MLX5_CAP_GEN(mdev, ipoib_ipoib_offloads)) { 654331769Shselasky props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 655331769Shselasky props->device_cap_flags |= IB_DEVICE_UD_TSO; 656331769Shselasky } 657331769Shselasky 658331769Shselasky if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 659331769Shselasky MLX5_CAP_ETH(dev->mdev, scatter_fcs)) 660331769Shselasky props->device_cap_flags |= IB_DEVICE_RAW_SCATTER_FCS; 661331769Shselasky 662331769Shselasky if (mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) 663331769Shselasky props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 664331769Shselasky 665322810Shselasky props->vendor_part_id = mdev->pdev->device; 666322810Shselasky props->hw_ver = mdev->pdev->revision; 667322810Shselasky 668322810Shselasky props->max_mr_size = ~0ull; 669331769Shselasky props->page_size_cap = ~(min_page_size - 1); 670322810Shselasky props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); 671322810Shselasky props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 672322810Shselasky max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / 673322810Shselasky sizeof(struct mlx5_wqe_data_seg); 674331769Shselasky max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - 675331769Shselasky sizeof(struct mlx5_wqe_ctrl_seg)) / 676331769Shselasky sizeof(struct mlx5_wqe_data_seg); 677322810Shselasky props->max_sge = min(max_rq_sg, max_sq_sg); 678331769Shselasky props->max_sge_rd = MLX5_MAX_SGE_RD; 679322810Shselasky props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); 680322810Shselasky props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1; 681322810Shselasky props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 682322810Shselasky props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); 683322810Shselasky props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); 684322810Shselasky props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); 685322810Shselasky props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); 686322810Shselasky props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; 687322810Shselasky props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); 688322810Shselasky props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 689322810Shselasky props->max_srq_sge = max_rq_sg - 1; 690331769Shselasky props->max_fast_reg_page_list_len = 691331769Shselasky 1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size); 692322810Shselasky get_atomic_caps(dev, props); 693331769Shselasky props->masked_atomic_cap = IB_ATOMIC_NONE; 694322810Shselasky props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); 695322810Shselasky props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); 696322810Shselasky props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 697322810Shselasky props->max_mcast_grp; 698322810Shselasky props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 699331769Shselasky props->hca_core_clock = MLX5_CAP_GEN(mdev, device_frequency_khz); 700331769Shselasky props->timestamp_mask = 0x7FFFFFFFFFFFFFFFULL; 701322810Shselasky 702331769Shselasky#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 703331769Shselasky if (MLX5_CAP_GEN(mdev, pg)) 704331769Shselasky props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; 705331769Shselasky props->odp_caps = dev->odp_caps; 706331769Shselasky#endif 707331769Shselasky 708331769Shselasky if (MLX5_CAP_GEN(mdev, cd)) 709331769Shselasky props->device_cap_flags |= IB_DEVICE_CROSS_CHANNEL; 710331769Shselasky 711331769Shselasky if (!mlx5_core_is_pf(mdev)) 712331769Shselasky props->device_cap_flags |= IB_DEVICE_VIRTUAL_FUNCTION; 713331769Shselasky 714331769Shselasky if (mlx5_ib_port_link_layer(ibdev, 1) == 715331769Shselasky IB_LINK_LAYER_ETHERNET) { 716331769Shselasky props->rss_caps.max_rwq_indirection_tables = 717331769Shselasky 1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt); 718331769Shselasky props->rss_caps.max_rwq_indirection_table_size = 719331769Shselasky 1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt_size); 720331769Shselasky props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET; 721331769Shselasky props->max_wq_type_rq = 722331769Shselasky 1 << MLX5_CAP_GEN(dev->mdev, log_max_rq); 723331769Shselasky } 724331769Shselasky 725331769Shselasky if (uhw->outlen) { 726331769Shselasky err = ib_copy_to_udata(uhw, &resp, resp.response_length); 727331769Shselasky 728331769Shselasky if (err) 729331769Shselasky return err; 730331769Shselasky } 731331769Shselasky 732322810Shselasky return 0; 733322810Shselasky} 734322810Shselasky 735322810Shselaskyenum mlx5_ib_width { 736322810Shselasky MLX5_IB_WIDTH_1X = 1 << 0, 737322810Shselasky MLX5_IB_WIDTH_2X = 1 << 1, 738322810Shselasky MLX5_IB_WIDTH_4X = 1 << 2, 739322810Shselasky MLX5_IB_WIDTH_8X = 1 << 3, 740322810Shselasky MLX5_IB_WIDTH_12X = 1 << 4 741322810Shselasky}; 742322810Shselasky 743322810Shselaskystatic int translate_active_width(struct ib_device *ibdev, u8 active_width, 744322810Shselasky u8 *ib_width) 745322810Shselasky{ 746322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 747322810Shselasky int err = 0; 748322810Shselasky 749322810Shselasky if (active_width & MLX5_IB_WIDTH_1X) { 750322810Shselasky *ib_width = IB_WIDTH_1X; 751322810Shselasky } else if (active_width & MLX5_IB_WIDTH_2X) { 752331769Shselasky mlx5_ib_dbg(dev, "active_width %d is not supported by IB spec\n", 753331769Shselasky (int)active_width); 754322810Shselasky err = -EINVAL; 755322810Shselasky } else if (active_width & MLX5_IB_WIDTH_4X) { 756322810Shselasky *ib_width = IB_WIDTH_4X; 757322810Shselasky } else if (active_width & MLX5_IB_WIDTH_8X) { 758322810Shselasky *ib_width = IB_WIDTH_8X; 759322810Shselasky } else if (active_width & MLX5_IB_WIDTH_12X) { 760322810Shselasky *ib_width = IB_WIDTH_12X; 761322810Shselasky } else { 762322810Shselasky mlx5_ib_dbg(dev, "Invalid active_width %d\n", 763322810Shselasky (int)active_width); 764322810Shselasky err = -EINVAL; 765322810Shselasky } 766322810Shselasky 767322810Shselasky return err; 768322810Shselasky} 769322810Shselasky 770322810Shselaskyenum ib_max_vl_num { 771322810Shselasky __IB_MAX_VL_0 = 1, 772322810Shselasky __IB_MAX_VL_0_1 = 2, 773322810Shselasky __IB_MAX_VL_0_3 = 3, 774322810Shselasky __IB_MAX_VL_0_7 = 4, 775322810Shselasky __IB_MAX_VL_0_14 = 5, 776322810Shselasky}; 777322810Shselasky 778322810Shselaskyenum mlx5_vl_hw_cap { 779322810Shselasky MLX5_VL_HW_0 = 1, 780322810Shselasky MLX5_VL_HW_0_1 = 2, 781322810Shselasky MLX5_VL_HW_0_2 = 3, 782322810Shselasky MLX5_VL_HW_0_3 = 4, 783322810Shselasky MLX5_VL_HW_0_4 = 5, 784322810Shselasky MLX5_VL_HW_0_5 = 6, 785322810Shselasky MLX5_VL_HW_0_6 = 7, 786322810Shselasky MLX5_VL_HW_0_7 = 8, 787322810Shselasky MLX5_VL_HW_0_14 = 15 788322810Shselasky}; 789322810Shselasky 790322810Shselaskystatic int translate_max_vl_num(struct ib_device *ibdev, u8 vl_hw_cap, 791322810Shselasky u8 *max_vl_num) 792322810Shselasky{ 793322810Shselasky switch (vl_hw_cap) { 794322810Shselasky case MLX5_VL_HW_0: 795322810Shselasky *max_vl_num = __IB_MAX_VL_0; 796322810Shselasky break; 797322810Shselasky case MLX5_VL_HW_0_1: 798322810Shselasky *max_vl_num = __IB_MAX_VL_0_1; 799322810Shselasky break; 800322810Shselasky case MLX5_VL_HW_0_3: 801322810Shselasky *max_vl_num = __IB_MAX_VL_0_3; 802322810Shselasky break; 803322810Shselasky case MLX5_VL_HW_0_7: 804322810Shselasky *max_vl_num = __IB_MAX_VL_0_7; 805322810Shselasky break; 806322810Shselasky case MLX5_VL_HW_0_14: 807322810Shselasky *max_vl_num = __IB_MAX_VL_0_14; 808322810Shselasky break; 809322810Shselasky 810322810Shselasky default: 811322810Shselasky return -EINVAL; 812322810Shselasky } 813322810Shselasky 814322810Shselasky return 0; 815322810Shselasky} 816322810Shselasky 817331769Shselaskystatic int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, 818331769Shselasky struct ib_port_attr *props) 819322810Shselasky{ 820322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 821322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 822322810Shselasky u32 *rep; 823331769Shselasky int replen = MLX5_ST_SZ_BYTES(query_hca_vport_context_out); 824322810Shselasky struct mlx5_ptys_reg *ptys; 825322810Shselasky struct mlx5_pmtu_reg *pmtu; 826322810Shselasky struct mlx5_pvlc_reg pvlc; 827322810Shselasky void *ctx; 828322810Shselasky int err; 829322810Shselasky 830331769Shselasky rep = mlx5_vzalloc(replen); 831322810Shselasky ptys = kzalloc(sizeof(*ptys), GFP_KERNEL); 832322810Shselasky pmtu = kzalloc(sizeof(*pmtu), GFP_KERNEL); 833322810Shselasky if (!rep || !ptys || !pmtu) { 834322810Shselasky err = -ENOMEM; 835322810Shselasky goto out; 836322810Shselasky } 837322810Shselasky 838322810Shselasky memset(props, 0, sizeof(*props)); 839322810Shselasky 840331769Shselasky err = mlx5_query_hca_vport_context(mdev, port, 0, rep, replen); 841322810Shselasky if (err) 842322810Shselasky goto out; 843322810Shselasky 844322810Shselasky ctx = MLX5_ADDR_OF(query_hca_vport_context_out, rep, hca_vport_context); 845322810Shselasky 846322810Shselasky props->lid = MLX5_GET(hca_vport_context, ctx, lid); 847322810Shselasky props->lmc = MLX5_GET(hca_vport_context, ctx, lmc); 848322810Shselasky props->sm_lid = MLX5_GET(hca_vport_context, ctx, sm_lid); 849322810Shselasky props->sm_sl = MLX5_GET(hca_vport_context, ctx, sm_sl); 850322810Shselasky props->state = MLX5_GET(hca_vport_context, ctx, vport_state); 851322810Shselasky props->phys_state = MLX5_GET(hca_vport_context, ctx, 852322810Shselasky port_physical_state); 853322810Shselasky props->port_cap_flags = MLX5_GET(hca_vport_context, ctx, cap_mask1); 854322810Shselasky props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size)); 855322810Shselasky props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); 856322810Shselasky props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size)); 857322810Shselasky props->bad_pkey_cntr = MLX5_GET(hca_vport_context, ctx, 858331769Shselasky pkey_violation_counter); 859322810Shselasky props->qkey_viol_cntr = MLX5_GET(hca_vport_context, ctx, 860331769Shselasky qkey_violation_counter); 861322810Shselasky props->subnet_timeout = MLX5_GET(hca_vport_context, ctx, 862331769Shselasky subnet_timeout); 863322810Shselasky props->init_type_reply = MLX5_GET(hca_vport_context, ctx, 864331769Shselasky init_type_reply); 865331769Shselasky props->grh_required = MLX5_GET(hca_vport_context, ctx, grh_required); 866322810Shselasky 867322810Shselasky ptys->proto_mask |= MLX5_PTYS_IB; 868322810Shselasky ptys->local_port = port; 869322810Shselasky err = mlx5_core_access_ptys(mdev, ptys, 0); 870322810Shselasky if (err) 871322810Shselasky goto out; 872322810Shselasky 873322810Shselasky err = translate_active_width(ibdev, ptys->ib_link_width_oper, 874322810Shselasky &props->active_width); 875322810Shselasky if (err) 876322810Shselasky goto out; 877322810Shselasky 878322810Shselasky props->active_speed = (u8)ptys->ib_proto_oper; 879322810Shselasky 880322810Shselasky pmtu->local_port = port; 881322810Shselasky err = mlx5_core_access_pmtu(mdev, pmtu, 0); 882322810Shselasky if (err) 883322810Shselasky goto out; 884322810Shselasky 885322810Shselasky props->max_mtu = pmtu->max_mtu; 886322810Shselasky props->active_mtu = pmtu->oper_mtu; 887322810Shselasky 888322810Shselasky memset(&pvlc, 0, sizeof(pvlc)); 889322810Shselasky pvlc.local_port = port; 890322810Shselasky err = mlx5_core_access_pvlc(mdev, &pvlc, 0); 891322810Shselasky if (err) 892322810Shselasky goto out; 893322810Shselasky 894322810Shselasky err = translate_max_vl_num(ibdev, pvlc.vl_hw_cap, 895322810Shselasky &props->max_vl_num); 896322810Shselaskyout: 897322810Shselasky kvfree(rep); 898322810Shselasky kfree(ptys); 899322810Shselasky kfree(pmtu); 900322810Shselasky return err; 901322810Shselasky} 902322810Shselasky 903322810Shselaskyint mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 904322810Shselasky struct ib_port_attr *props) 905322810Shselasky{ 906322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 907322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 908331769Shselasky return mlx5_query_mad_ifc_port(ibdev, port, props); 909322810Shselasky 910322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 911331769Shselasky return mlx5_query_hca_port(ibdev, port, props); 912322810Shselasky 913322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 914322810Shselasky return mlx5_query_port_roce(ibdev, port, props); 915322810Shselasky 916322810Shselasky default: 917322810Shselasky return -EINVAL; 918322810Shselasky } 919322810Shselasky} 920322810Shselasky 921322810Shselaskystatic int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 922322810Shselasky union ib_gid *gid) 923322810Shselasky{ 924322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 925322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 926322810Shselasky 927322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 928322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 929331769Shselasky return mlx5_query_mad_ifc_gids(ibdev, port, index, gid); 930322810Shselasky 931322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 932322810Shselasky return mlx5_query_hca_vport_gid(mdev, port, 0, index, gid); 933322810Shselasky 934322810Shselasky default: 935322810Shselasky return -EINVAL; 936322810Shselasky } 937331769Shselasky 938322810Shselasky} 939322810Shselasky 940322810Shselaskystatic int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 941322810Shselasky u16 *pkey) 942322810Shselasky{ 943322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 944322810Shselasky struct mlx5_core_dev *mdev = dev->mdev; 945322810Shselasky 946322810Shselasky switch (mlx5_get_vport_access_method(ibdev)) { 947322810Shselasky case MLX5_VPORT_ACCESS_METHOD_MAD: 948331769Shselasky return mlx5_query_mad_ifc_pkey(ibdev, port, index, pkey); 949322810Shselasky 950322810Shselasky case MLX5_VPORT_ACCESS_METHOD_HCA: 951322810Shselasky case MLX5_VPORT_ACCESS_METHOD_NIC: 952331769Shselasky return mlx5_query_hca_vport_pkey(mdev, 0, port, 0, index, 953322810Shselasky pkey); 954322810Shselasky default: 955322810Shselasky return -EINVAL; 956322810Shselasky } 957322810Shselasky} 958322810Shselasky 959322810Shselaskystatic int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 960322810Shselasky struct ib_device_modify *props) 961322810Shselasky{ 962322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 963322810Shselasky struct mlx5_reg_node_desc in; 964322810Shselasky struct mlx5_reg_node_desc out; 965322810Shselasky int err; 966322810Shselasky 967322810Shselasky if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 968322810Shselasky return -EOPNOTSUPP; 969322810Shselasky 970322810Shselasky if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 971322810Shselasky return 0; 972322810Shselasky 973322810Shselasky /* 974322810Shselasky * If possible, pass node desc to FW, so it can generate 975322810Shselasky * a 144 trap. If cmd fails, just ignore. 976322810Shselasky */ 977331769Shselasky memcpy(&in, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 978322810Shselasky err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 979322810Shselasky sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 980322810Shselasky if (err) 981322810Shselasky return err; 982322810Shselasky 983331769Shselasky memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 984322810Shselasky 985322810Shselasky return err; 986322810Shselasky} 987322810Shselasky 988322810Shselaskystatic int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 989322810Shselasky struct ib_port_modify *props) 990322810Shselasky{ 991322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 992322810Shselasky struct ib_port_attr attr; 993322810Shselasky u32 tmp; 994322810Shselasky int err; 995322810Shselasky 996322810Shselasky mutex_lock(&dev->cap_mask_mutex); 997322810Shselasky 998322810Shselasky err = mlx5_ib_query_port(ibdev, port, &attr); 999322810Shselasky if (err) 1000322810Shselasky goto out; 1001322810Shselasky 1002322810Shselasky tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 1003322810Shselasky ~props->clr_port_cap_mask; 1004322810Shselasky 1005322810Shselasky err = mlx5_set_port_caps(dev->mdev, port, tmp); 1006322810Shselasky 1007322810Shselaskyout: 1008322810Shselasky mutex_unlock(&dev->cap_mask_mutex); 1009322810Shselasky return err; 1010322810Shselasky} 1011322810Shselasky 1012322810Shselaskystatic struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 1013322810Shselasky struct ib_udata *udata) 1014322810Shselasky{ 1015322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 1016331769Shselasky struct mlx5_ib_alloc_ucontext_req_v2 req = {}; 1017331769Shselasky struct mlx5_ib_alloc_ucontext_resp resp = {}; 1018322810Shselasky struct mlx5_ib_ucontext *context; 1019322810Shselasky struct mlx5_uuar_info *uuari; 1020322810Shselasky struct mlx5_uar *uars; 1021322810Shselasky int gross_uuars; 1022322810Shselasky int num_uars; 1023322810Shselasky int ver; 1024322810Shselasky int uuarn; 1025322810Shselasky int err; 1026322810Shselasky int i; 1027322810Shselasky size_t reqlen; 1028331769Shselasky size_t min_req_v2 = offsetof(struct mlx5_ib_alloc_ucontext_req_v2, 1029331769Shselasky max_cqe_version); 1030322810Shselasky 1031322810Shselasky if (!dev->ib_active) 1032322810Shselasky return ERR_PTR(-EAGAIN); 1033322810Shselasky 1034331769Shselasky if (udata->inlen < sizeof(struct ib_uverbs_cmd_hdr)) 1035331769Shselasky return ERR_PTR(-EINVAL); 1036322810Shselasky 1037322810Shselasky reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 1038322810Shselasky if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 1039322810Shselasky ver = 0; 1040331769Shselasky else if (reqlen >= min_req_v2) 1041322810Shselasky ver = 2; 1042331769Shselasky else 1043322810Shselasky return ERR_PTR(-EINVAL); 1044322810Shselasky 1045331769Shselasky err = ib_copy_from_udata(&req, udata, min(reqlen, sizeof(req))); 1046331769Shselasky if (err) 1047322810Shselasky return ERR_PTR(err); 1048322810Shselasky 1049331769Shselasky if (req.flags) 1050322810Shselasky return ERR_PTR(-EINVAL); 1051322810Shselasky 1052331769Shselasky if (req.total_num_uuars > MLX5_MAX_UUARS) 1053322810Shselasky return ERR_PTR(-ENOMEM); 1054322810Shselasky 1055331769Shselasky if (req.total_num_uuars == 0) 1056331769Shselasky return ERR_PTR(-EINVAL); 1057331769Shselasky 1058331769Shselasky if (req.comp_mask || req.reserved0 || req.reserved1 || req.reserved2) 1059331769Shselasky return ERR_PTR(-EOPNOTSUPP); 1060331769Shselasky 1061331769Shselasky if (reqlen > sizeof(req) && 1062331769Shselasky !ib_is_udata_cleared(udata, sizeof(req), 1063331769Shselasky reqlen - sizeof(req))) 1064331769Shselasky return ERR_PTR(-EOPNOTSUPP); 1065331769Shselasky 1066322810Shselasky req.total_num_uuars = ALIGN(req.total_num_uuars, 1067322810Shselasky MLX5_NON_FP_BF_REGS_PER_PAGE); 1068331769Shselasky if (req.num_low_latency_uuars > req.total_num_uuars - 1) 1069322810Shselasky return ERR_PTR(-EINVAL); 1070322810Shselasky 1071322810Shselasky num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 1072322810Shselasky gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 1073322810Shselasky resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); 1074322810Shselasky if (mlx5_core_is_pf(dev->mdev) && MLX5_CAP_GEN(dev->mdev, bf)) 1075322810Shselasky resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); 1076331769Shselasky resp.cache_line_size = cache_line_size(); 1077322810Shselasky resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); 1078322810Shselasky resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); 1079322810Shselasky resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 1080322810Shselasky resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 1081322810Shselasky resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); 1082331769Shselasky resp.cqe_version = min_t(__u8, 1083331769Shselasky (__u8)MLX5_CAP_GEN(dev->mdev, cqe_version), 1084331769Shselasky req.max_cqe_version); 1085331769Shselasky resp.response_length = min(offsetof(typeof(resp), response_length) + 1086331769Shselasky sizeof(resp.response_length), udata->outlen); 1087322810Shselasky 1088322810Shselasky context = kzalloc(sizeof(*context), GFP_KERNEL); 1089322810Shselasky if (!context) 1090322810Shselasky return ERR_PTR(-ENOMEM); 1091322810Shselasky 1092322810Shselasky uuari = &context->uuari; 1093322810Shselasky mutex_init(&uuari->lock); 1094322810Shselasky uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 1095322810Shselasky if (!uars) { 1096322810Shselasky err = -ENOMEM; 1097322810Shselasky goto out_ctx; 1098322810Shselasky } 1099322810Shselasky 1100322810Shselasky uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 1101322810Shselasky sizeof(*uuari->bitmap), 1102322810Shselasky GFP_KERNEL); 1103322810Shselasky if (!uuari->bitmap) { 1104322810Shselasky err = -ENOMEM; 1105322810Shselasky goto out_uar_ctx; 1106322810Shselasky } 1107322810Shselasky /* 1108322810Shselasky * clear all fast path uuars 1109322810Shselasky */ 1110322810Shselasky for (i = 0; i < gross_uuars; i++) { 1111322810Shselasky uuarn = i & 3; 1112322810Shselasky if (uuarn == 2 || uuarn == 3) 1113322810Shselasky set_bit(i, uuari->bitmap); 1114322810Shselasky } 1115322810Shselasky 1116322810Shselasky uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 1117322810Shselasky if (!uuari->count) { 1118322810Shselasky err = -ENOMEM; 1119322810Shselasky goto out_bitmap; 1120322810Shselasky } 1121322810Shselasky 1122322810Shselasky for (i = 0; i < num_uars; i++) { 1123322810Shselasky err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 1124331769Shselasky if (err) 1125331769Shselasky goto out_count; 1126331769Shselasky } 1127331769Shselasky 1128331769Shselasky#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 1129331769Shselasky context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; 1130331769Shselasky#endif 1131331769Shselasky 1132331769Shselasky if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) { 1133331769Shselasky err = mlx5_alloc_transport_domain(dev->mdev, 1134331769Shselasky &context->tdn); 1135331769Shselasky if (err) 1136322810Shselasky goto out_uars; 1137322810Shselasky } 1138322810Shselasky 1139331769Shselasky INIT_LIST_HEAD(&context->vma_private_list); 1140322810Shselasky INIT_LIST_HEAD(&context->db_page_list); 1141322810Shselasky mutex_init(&context->db_page_mutex); 1142322810Shselasky 1143322810Shselasky resp.tot_uuars = req.total_num_uuars; 1144322810Shselasky resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports); 1145331769Shselasky 1146331769Shselasky if (field_avail(typeof(resp), cqe_version, udata->outlen)) 1147331769Shselasky resp.response_length += sizeof(resp.cqe_version); 1148331769Shselasky 1149331769Shselasky if (field_avail(typeof(resp), cmds_supp_uhw, udata->outlen)) { 1150331784Shselasky resp.cmds_supp_uhw |= MLX5_USER_CMDS_SUPP_UHW_QUERY_DEVICE | 1151331784Shselasky MLX5_USER_CMDS_SUPP_UHW_CREATE_AH; 1152331769Shselasky resp.response_length += sizeof(resp.cmds_supp_uhw); 1153331769Shselasky } 1154331769Shselasky 1155331769Shselasky /* 1156331769Shselasky * We don't want to expose information from the PCI bar that is located 1157331769Shselasky * after 4096 bytes, so if the arch only supports larger pages, let's 1158331769Shselasky * pretend we don't support reading the HCA's core clock. This is also 1159331769Shselasky * forced by mmap function. 1160331769Shselasky */ 1161331769Shselasky if (PAGE_SIZE <= 4096 && 1162331769Shselasky field_avail(typeof(resp), hca_core_clock_offset, udata->outlen)) { 1163331769Shselasky resp.comp_mask |= 1164331769Shselasky MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET; 1165331769Shselasky resp.hca_core_clock_offset = 1166331769Shselasky offsetof(struct mlx5_init_seg, internal_timer_h) % 1167331769Shselasky PAGE_SIZE; 1168331769Shselasky resp.response_length += sizeof(resp.hca_core_clock_offset) + 1169331769Shselasky sizeof(resp.reserved2); 1170331769Shselasky } 1171331769Shselasky 1172331769Shselasky err = ib_copy_to_udata(udata, &resp, resp.response_length); 1173322810Shselasky if (err) 1174331769Shselasky goto out_td; 1175322810Shselasky 1176322810Shselasky uuari->ver = ver; 1177322810Shselasky uuari->num_low_latency_uuars = req.num_low_latency_uuars; 1178322810Shselasky uuari->uars = uars; 1179322810Shselasky uuari->num_uars = num_uars; 1180331769Shselasky context->cqe_version = resp.cqe_version; 1181322810Shselasky 1182322810Shselasky return &context->ibucontext; 1183322810Shselasky 1184331769Shselaskyout_td: 1185331769Shselasky if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) 1186331769Shselasky mlx5_dealloc_transport_domain(dev->mdev, context->tdn); 1187331769Shselasky 1188322810Shselaskyout_uars: 1189322810Shselasky for (i--; i >= 0; i--) 1190322810Shselasky mlx5_cmd_free_uar(dev->mdev, uars[i].index); 1191331769Shselaskyout_count: 1192322810Shselasky kfree(uuari->count); 1193322810Shselasky 1194322810Shselaskyout_bitmap: 1195322810Shselasky kfree(uuari->bitmap); 1196322810Shselasky 1197322810Shselaskyout_uar_ctx: 1198322810Shselasky kfree(uars); 1199322810Shselasky 1200322810Shselaskyout_ctx: 1201322810Shselasky kfree(context); 1202322810Shselasky return ERR_PTR(err); 1203322810Shselasky} 1204322810Shselasky 1205322810Shselaskystatic int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1206322810Shselasky{ 1207322810Shselasky struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 1208322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 1209322810Shselasky struct mlx5_uuar_info *uuari = &context->uuari; 1210322810Shselasky int i; 1211322810Shselasky 1212331769Shselasky if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) 1213322810Shselasky mlx5_dealloc_transport_domain(dev->mdev, context->tdn); 1214322810Shselasky 1215322810Shselasky for (i = 0; i < uuari->num_uars; i++) { 1216322810Shselasky if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 1217322810Shselasky mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 1218322810Shselasky } 1219322810Shselasky 1220322810Shselasky kfree(uuari->count); 1221322810Shselasky kfree(uuari->bitmap); 1222322810Shselasky kfree(uuari->uars); 1223322810Shselasky kfree(context); 1224322810Shselasky 1225322810Shselasky return 0; 1226322810Shselasky} 1227322810Shselasky 1228322810Shselaskystatic phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 1229322810Shselasky{ 1230322810Shselasky return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 1231322810Shselasky} 1232322810Shselasky 1233322810Shselaskystatic int get_command(unsigned long offset) 1234322810Shselasky{ 1235322810Shselasky return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 1236322810Shselasky} 1237322810Shselasky 1238322810Shselaskystatic int get_arg(unsigned long offset) 1239322810Shselasky{ 1240322810Shselasky return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 1241322810Shselasky} 1242322810Shselasky 1243322810Shselaskystatic int get_index(unsigned long offset) 1244322810Shselasky{ 1245322810Shselasky return get_arg(offset); 1246322810Shselasky} 1247322810Shselasky 1248331769Shselaskystatic void mlx5_ib_vma_open(struct vm_area_struct *area) 1249331769Shselasky{ 1250331769Shselasky /* vma_open is called when a new VMA is created on top of our VMA. This 1251331769Shselasky * is done through either mremap flow or split_vma (usually due to 1252331769Shselasky * mlock, madvise, munmap, etc.) We do not support a clone of the VMA, 1253331769Shselasky * as this VMA is strongly hardware related. Therefore we set the 1254331769Shselasky * vm_ops of the newly created/cloned VMA to NULL, to prevent it from 1255331769Shselasky * calling us again and trying to do incorrect actions. We assume that 1256331769Shselasky * the original VMA size is exactly a single page, and therefore all 1257331769Shselasky * "splitting" operation will not happen to it. 1258331769Shselasky */ 1259331769Shselasky area->vm_ops = NULL; 1260331769Shselasky} 1261331769Shselasky 1262331769Shselaskystatic void mlx5_ib_vma_close(struct vm_area_struct *area) 1263331769Shselasky{ 1264331769Shselasky struct mlx5_ib_vma_private_data *mlx5_ib_vma_priv_data; 1265331769Shselasky 1266331769Shselasky /* It's guaranteed that all VMAs opened on a FD are closed before the 1267331769Shselasky * file itself is closed, therefore no sync is needed with the regular 1268331769Shselasky * closing flow. (e.g. mlx5 ib_dealloc_ucontext) 1269331769Shselasky * However need a sync with accessing the vma as part of 1270331769Shselasky * mlx5_ib_disassociate_ucontext. 1271331769Shselasky * The close operation is usually called under mm->mmap_sem except when 1272331769Shselasky * process is exiting. 1273331769Shselasky * The exiting case is handled explicitly as part of 1274331769Shselasky * mlx5_ib_disassociate_ucontext. 1275331769Shselasky */ 1276331769Shselasky mlx5_ib_vma_priv_data = (struct mlx5_ib_vma_private_data *)area->vm_private_data; 1277331769Shselasky 1278331769Shselasky /* setting the vma context pointer to null in the mlx5_ib driver's 1279331769Shselasky * private data, to protect a race condition in 1280331769Shselasky * mlx5_ib_disassociate_ucontext(). 1281331769Shselasky */ 1282331769Shselasky mlx5_ib_vma_priv_data->vma = NULL; 1283331769Shselasky list_del(&mlx5_ib_vma_priv_data->list); 1284331769Shselasky kfree(mlx5_ib_vma_priv_data); 1285331769Shselasky} 1286331769Shselasky 1287331769Shselaskystatic const struct vm_operations_struct mlx5_ib_vm_ops = { 1288331769Shselasky .open = mlx5_ib_vma_open, 1289331769Shselasky .close = mlx5_ib_vma_close 1290331769Shselasky}; 1291331769Shselasky 1292331769Shselaskystatic int mlx5_ib_set_vma_data(struct vm_area_struct *vma, 1293331769Shselasky struct mlx5_ib_ucontext *ctx) 1294331769Shselasky{ 1295331769Shselasky struct mlx5_ib_vma_private_data *vma_prv; 1296331769Shselasky struct list_head *vma_head = &ctx->vma_private_list; 1297331769Shselasky 1298331769Shselasky vma_prv = kzalloc(sizeof(*vma_prv), GFP_KERNEL); 1299331769Shselasky if (!vma_prv) 1300331769Shselasky return -ENOMEM; 1301331769Shselasky 1302331769Shselasky vma_prv->vma = vma; 1303331769Shselasky vma->vm_private_data = vma_prv; 1304331769Shselasky vma->vm_ops = &mlx5_ib_vm_ops; 1305331769Shselasky 1306331769Shselasky list_add(&vma_prv->list, vma_head); 1307331769Shselasky 1308331769Shselasky return 0; 1309331769Shselasky} 1310331769Shselasky 1311331769Shselaskystatic inline char *mmap_cmd2str(enum mlx5_ib_mmap_cmd cmd) 1312331769Shselasky{ 1313331769Shselasky switch (cmd) { 1314331769Shselasky case MLX5_IB_MMAP_WC_PAGE: 1315331769Shselasky return "WC"; 1316331769Shselasky case MLX5_IB_MMAP_REGULAR_PAGE: 1317331769Shselasky return "best effort WC"; 1318331769Shselasky case MLX5_IB_MMAP_NC_PAGE: 1319331769Shselasky return "NC"; 1320331769Shselasky default: 1321331769Shselasky return NULL; 1322331769Shselasky } 1323331769Shselasky} 1324331769Shselasky 1325331769Shselaskystatic int uar_mmap(struct mlx5_ib_dev *dev, enum mlx5_ib_mmap_cmd cmd, 1326331769Shselasky struct vm_area_struct *vma, 1327322810Shselasky struct mlx5_ib_ucontext *context) 1328322810Shselasky{ 1329331769Shselasky struct mlx5_uuar_info *uuari = &context->uuari; 1330331769Shselasky int err; 1331322810Shselasky unsigned long idx; 1332331769Shselasky phys_addr_t pfn, pa; 1333331769Shselasky pgprot_t prot; 1334322810Shselasky 1335331769Shselasky switch (cmd) { 1336331769Shselasky case MLX5_IB_MMAP_WC_PAGE: 1337331769Shselasky/* Some architectures don't support WC memory */ 1338331769Shselasky#if defined(CONFIG_X86) 1339331769Shselasky if (!pat_enabled()) 1340331769Shselasky return -EPERM; 1341331769Shselasky#elif !(defined(CONFIG_PPC) || (defined(CONFIG_ARM) && defined(CONFIG_MMU))) 1342331769Shselasky return -EPERM; 1343331769Shselasky#endif 1344331769Shselasky /* fall through */ 1345331769Shselasky case MLX5_IB_MMAP_REGULAR_PAGE: 1346331769Shselasky /* For MLX5_IB_MMAP_REGULAR_PAGE do the best effort to get WC */ 1347331769Shselasky prot = pgprot_writecombine(vma->vm_page_prot); 1348331769Shselasky break; 1349331769Shselasky case MLX5_IB_MMAP_NC_PAGE: 1350331769Shselasky prot = pgprot_noncached(vma->vm_page_prot); 1351331769Shselasky break; 1352331769Shselasky default: 1353322810Shselasky return -EINVAL; 1354322810Shselasky } 1355322810Shselasky 1356331769Shselasky if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1357331769Shselasky return -EINVAL; 1358331769Shselasky 1359322810Shselasky idx = get_index(vma->vm_pgoff); 1360331769Shselasky if (idx >= uuari->num_uars) 1361322810Shselasky return -EINVAL; 1362322810Shselasky 1363322810Shselasky pfn = uar_index2pfn(dev, uuari->uars[idx].index); 1364331769Shselasky mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn %pa\n", idx, &pfn); 1365322810Shselasky 1366322810Shselasky vma->vm_page_prot = prot; 1367331769Shselasky err = io_remap_pfn_range(vma, vma->vm_start, pfn, 1368331769Shselasky PAGE_SIZE, vma->vm_page_prot); 1369331769Shselasky if (err) { 1370331769Shselasky mlx5_ib_err(dev, "io_remap_pfn_range failed with error=%d, vm_start=0x%llx, pfn=%pa, mmap_cmd=%s\n", 1371331769Shselasky err, (unsigned long long)vma->vm_start, &pfn, mmap_cmd2str(cmd)); 1372322810Shselasky return -EAGAIN; 1373322810Shselasky } 1374322810Shselasky 1375331769Shselasky pa = pfn << PAGE_SHIFT; 1376331769Shselasky mlx5_ib_dbg(dev, "mapped %s at 0x%llx, PA %pa\n", mmap_cmd2str(cmd), 1377331769Shselasky (unsigned long long)vma->vm_start, &pa); 1378322810Shselasky 1379331769Shselasky return mlx5_ib_set_vma_data(vma, context); 1380322810Shselasky} 1381322810Shselasky 1382322810Shselaskystatic int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 1383322810Shselasky{ 1384322810Shselasky struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 1385322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 1386322810Shselasky unsigned long command; 1387331769Shselasky phys_addr_t pfn; 1388322810Shselasky 1389322810Shselasky command = get_command(vma->vm_pgoff); 1390322810Shselasky switch (command) { 1391331769Shselasky case MLX5_IB_MMAP_WC_PAGE: 1392331769Shselasky case MLX5_IB_MMAP_NC_PAGE: 1393322810Shselasky case MLX5_IB_MMAP_REGULAR_PAGE: 1394331769Shselasky return uar_mmap(dev, command, vma, context); 1395322810Shselasky 1396331769Shselasky case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 1397331769Shselasky return -ENOSYS; 1398322810Shselasky 1399331769Shselasky case MLX5_IB_MMAP_CORE_CLOCK: 1400331769Shselasky if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1401331769Shselasky return -EINVAL; 1402322810Shselasky 1403331769Shselasky if (vma->vm_flags & VM_WRITE) 1404331769Shselasky return -EPERM; 1405331769Shselasky 1406331769Shselasky /* Don't expose to user-space information it shouldn't have */ 1407331769Shselasky if (PAGE_SIZE > 4096) 1408331769Shselasky return -EOPNOTSUPP; 1409331769Shselasky 1410331769Shselasky vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1411331769Shselasky pfn = (dev->mdev->iseg_base + 1412331769Shselasky offsetof(struct mlx5_init_seg, internal_timer_h)) >> 1413331769Shselasky PAGE_SHIFT; 1414331769Shselasky if (io_remap_pfn_range(vma, vma->vm_start, pfn, 1415331769Shselasky PAGE_SIZE, vma->vm_page_prot)) 1416331769Shselasky return -EAGAIN; 1417331769Shselasky 1418331769Shselasky mlx5_ib_dbg(dev, "mapped internal timer at 0x%llx, PA 0x%llx\n", 1419331769Shselasky (unsigned long long)vma->vm_start, 1420331769Shselasky (unsigned long long)pfn << PAGE_SHIFT); 1421322810Shselasky break; 1422322810Shselasky 1423322810Shselasky default: 1424322810Shselasky return -EINVAL; 1425322810Shselasky } 1426322810Shselasky 1427322810Shselasky return 0; 1428322810Shselasky} 1429322810Shselasky 1430322810Shselaskystatic struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 1431322810Shselasky struct ib_ucontext *context, 1432322810Shselasky struct ib_udata *udata) 1433322810Shselasky{ 1434322810Shselasky struct mlx5_ib_alloc_pd_resp resp; 1435322810Shselasky struct mlx5_ib_pd *pd; 1436322810Shselasky int err; 1437322810Shselasky 1438322810Shselasky pd = kmalloc(sizeof(*pd), GFP_KERNEL); 1439322810Shselasky if (!pd) 1440322810Shselasky return ERR_PTR(-ENOMEM); 1441322810Shselasky 1442322810Shselasky err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 1443322810Shselasky if (err) { 1444322810Shselasky kfree(pd); 1445322810Shselasky return ERR_PTR(err); 1446322810Shselasky } 1447322810Shselasky 1448322810Shselasky if (context) { 1449322810Shselasky resp.pdn = pd->pdn; 1450322810Shselasky if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 1451322810Shselasky mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 1452322810Shselasky kfree(pd); 1453322810Shselasky return ERR_PTR(-EFAULT); 1454322810Shselasky } 1455322810Shselasky } 1456322810Shselasky 1457322810Shselasky return &pd->ibpd; 1458322810Shselasky} 1459322810Shselasky 1460322810Shselaskystatic int mlx5_ib_dealloc_pd(struct ib_pd *pd) 1461322810Shselasky{ 1462322810Shselasky struct mlx5_ib_dev *mdev = to_mdev(pd->device); 1463322810Shselasky struct mlx5_ib_pd *mpd = to_mpd(pd); 1464322810Shselasky 1465322810Shselasky mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 1466322810Shselasky kfree(mpd); 1467322810Shselasky 1468322810Shselasky return 0; 1469322810Shselasky} 1470322810Shselasky 1471331769Shselaskyenum { 1472331769Shselasky MATCH_CRITERIA_ENABLE_OUTER_BIT, 1473331769Shselasky MATCH_CRITERIA_ENABLE_MISC_BIT, 1474331769Shselasky MATCH_CRITERIA_ENABLE_INNER_BIT 1475331769Shselasky}; 1476331769Shselasky 1477331769Shselasky#define HEADER_IS_ZERO(match_criteria, headers) \ 1478331769Shselasky !(memchr_inv(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \ 1479331769Shselasky 0, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \ 1480331769Shselasky 1481331769Shselaskystatic u8 get_match_criteria_enable(u32 *match_criteria) 1482331769Shselasky{ 1483331769Shselasky u8 match_criteria_enable; 1484331769Shselasky 1485331769Shselasky match_criteria_enable = 1486331769Shselasky (!HEADER_IS_ZERO(match_criteria, outer_headers)) << 1487331769Shselasky MATCH_CRITERIA_ENABLE_OUTER_BIT; 1488331769Shselasky match_criteria_enable |= 1489331769Shselasky (!HEADER_IS_ZERO(match_criteria, misc_parameters)) << 1490331769Shselasky MATCH_CRITERIA_ENABLE_MISC_BIT; 1491331769Shselasky match_criteria_enable |= 1492331769Shselasky (!HEADER_IS_ZERO(match_criteria, inner_headers)) << 1493331769Shselasky MATCH_CRITERIA_ENABLE_INNER_BIT; 1494331769Shselasky 1495331769Shselasky return match_criteria_enable; 1496331769Shselasky} 1497331769Shselasky 1498331769Shselaskystatic void set_proto(void *outer_c, void *outer_v, u8 mask, u8 val) 1499331769Shselasky{ 1500331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_c, ip_protocol, mask); 1501331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_protocol, val); 1502331769Shselasky} 1503331769Shselasky 1504331769Shselaskystatic void set_tos(void *outer_c, void *outer_v, u8 mask, u8 val) 1505331769Shselasky{ 1506331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_c, ip_ecn, mask); 1507331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_ecn, val); 1508331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_c, ip_dscp, mask >> 2); 1509331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_dscp, val >> 2); 1510331769Shselasky} 1511331769Shselasky 1512331769Shselasky#define LAST_ETH_FIELD vlan_tag 1513331769Shselasky#define LAST_IB_FIELD sl 1514331769Shselasky#define LAST_IPV4_FIELD tos 1515331769Shselasky#define LAST_IPV6_FIELD traffic_class 1516331769Shselasky#define LAST_TCP_UDP_FIELD src_port 1517331769Shselasky 1518331769Shselasky/* Field is the last supported field */ 1519331769Shselasky#define FIELDS_NOT_SUPPORTED(filter, field)\ 1520331769Shselasky memchr_inv((void *)&filter.field +\ 1521331769Shselasky sizeof(filter.field), 0,\ 1522331769Shselasky sizeof(filter) -\ 1523331769Shselasky offsetof(typeof(filter), field) -\ 1524331769Shselasky sizeof(filter.field)) 1525331769Shselasky 1526331769Shselaskystatic int parse_flow_attr(u32 *match_c, u32 *match_v, 1527331769Shselasky const union ib_flow_spec *ib_spec) 1528331769Shselasky{ 1529331769Shselasky void *outer_headers_c = MLX5_ADDR_OF(fte_match_param, match_c, 1530331769Shselasky outer_headers); 1531331769Shselasky void *outer_headers_v = MLX5_ADDR_OF(fte_match_param, match_v, 1532331769Shselasky outer_headers); 1533331769Shselasky void *misc_params_c = MLX5_ADDR_OF(fte_match_param, match_c, 1534331769Shselasky misc_parameters); 1535331769Shselasky void *misc_params_v = MLX5_ADDR_OF(fte_match_param, match_v, 1536331769Shselasky misc_parameters); 1537331769Shselasky 1538331769Shselasky switch (ib_spec->type) { 1539331769Shselasky case IB_FLOW_SPEC_ETH: 1540331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1541331769Shselasky return -ENOTSUPP; 1542331769Shselasky 1543331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1544331769Shselasky dmac_47_16), 1545331769Shselasky ib_spec->eth.mask.dst_mac); 1546331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1547331769Shselasky dmac_47_16), 1548331769Shselasky ib_spec->eth.val.dst_mac); 1549331769Shselasky 1550331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1551331769Shselasky smac_47_16), 1552331769Shselasky ib_spec->eth.mask.src_mac); 1553331769Shselasky ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1554331769Shselasky smac_47_16), 1555331769Shselasky ib_spec->eth.val.src_mac); 1556331769Shselasky 1557331769Shselasky if (ib_spec->eth.mask.vlan_tag) { 1558331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1559331769Shselasky cvlan_tag, 1); 1560331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1561331769Shselasky cvlan_tag, 1); 1562331769Shselasky 1563331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1564331769Shselasky first_vid, ntohs(ib_spec->eth.mask.vlan_tag)); 1565331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1566331769Shselasky first_vid, ntohs(ib_spec->eth.val.vlan_tag)); 1567331769Shselasky 1568331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1569331769Shselasky first_cfi, 1570331769Shselasky ntohs(ib_spec->eth.mask.vlan_tag) >> 12); 1571331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1572331769Shselasky first_cfi, 1573331769Shselasky ntohs(ib_spec->eth.val.vlan_tag) >> 12); 1574331769Shselasky 1575331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1576331769Shselasky first_prio, 1577331769Shselasky ntohs(ib_spec->eth.mask.vlan_tag) >> 13); 1578331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1579331769Shselasky first_prio, 1580331769Shselasky ntohs(ib_spec->eth.val.vlan_tag) >> 13); 1581331769Shselasky } 1582331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1583331769Shselasky ethertype, ntohs(ib_spec->eth.mask.ether_type)); 1584331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1585331769Shselasky ethertype, ntohs(ib_spec->eth.val.ether_type)); 1586331769Shselasky break; 1587331769Shselasky case IB_FLOW_SPEC_IPV4: 1588331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1589331769Shselasky return -ENOTSUPP; 1590331769Shselasky 1591331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1592331769Shselasky ethertype, 0xffff); 1593331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1594331769Shselasky ethertype, ETH_P_IP); 1595331769Shselasky 1596331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1597331769Shselasky src_ipv4_src_ipv6.ipv4_layout.ipv4), 1598331769Shselasky &ib_spec->ipv4.mask.src_ip, 1599331769Shselasky sizeof(ib_spec->ipv4.mask.src_ip)); 1600331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1601331769Shselasky src_ipv4_src_ipv6.ipv4_layout.ipv4), 1602331769Shselasky &ib_spec->ipv4.val.src_ip, 1603331769Shselasky sizeof(ib_spec->ipv4.val.src_ip)); 1604331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1605331769Shselasky dst_ipv4_dst_ipv6.ipv4_layout.ipv4), 1606331769Shselasky &ib_spec->ipv4.mask.dst_ip, 1607331769Shselasky sizeof(ib_spec->ipv4.mask.dst_ip)); 1608331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1609331769Shselasky dst_ipv4_dst_ipv6.ipv4_layout.ipv4), 1610331769Shselasky &ib_spec->ipv4.val.dst_ip, 1611331769Shselasky sizeof(ib_spec->ipv4.val.dst_ip)); 1612331769Shselasky 1613331769Shselasky set_tos(outer_headers_c, outer_headers_v, 1614331769Shselasky ib_spec->ipv4.mask.tos, ib_spec->ipv4.val.tos); 1615331769Shselasky 1616331769Shselasky set_proto(outer_headers_c, outer_headers_v, 1617331769Shselasky ib_spec->ipv4.mask.proto, ib_spec->ipv4.val.proto); 1618331769Shselasky break; 1619331769Shselasky case IB_FLOW_SPEC_IPV6: 1620331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->ipv6.mask, LAST_IPV6_FIELD)) 1621331769Shselasky return -ENOTSUPP; 1622331769Shselasky 1623331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, 1624331769Shselasky ethertype, 0xffff); 1625331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, 1626331769Shselasky ethertype, IPPROTO_IPV6); 1627331769Shselasky 1628331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1629331769Shselasky src_ipv4_src_ipv6.ipv6_layout.ipv6), 1630331769Shselasky &ib_spec->ipv6.mask.src_ip, 1631331769Shselasky sizeof(ib_spec->ipv6.mask.src_ip)); 1632331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1633331769Shselasky src_ipv4_src_ipv6.ipv6_layout.ipv6), 1634331769Shselasky &ib_spec->ipv6.val.src_ip, 1635331769Shselasky sizeof(ib_spec->ipv6.val.src_ip)); 1636331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_c, 1637331769Shselasky dst_ipv4_dst_ipv6.ipv6_layout.ipv6), 1638331769Shselasky &ib_spec->ipv6.mask.dst_ip, 1639331769Shselasky sizeof(ib_spec->ipv6.mask.dst_ip)); 1640331769Shselasky memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, outer_headers_v, 1641331769Shselasky dst_ipv4_dst_ipv6.ipv6_layout.ipv6), 1642331769Shselasky &ib_spec->ipv6.val.dst_ip, 1643331769Shselasky sizeof(ib_spec->ipv6.val.dst_ip)); 1644331769Shselasky 1645331769Shselasky set_tos(outer_headers_c, outer_headers_v, 1646331769Shselasky ib_spec->ipv6.mask.traffic_class, 1647331769Shselasky ib_spec->ipv6.val.traffic_class); 1648331769Shselasky 1649331769Shselasky set_proto(outer_headers_c, outer_headers_v, 1650331769Shselasky ib_spec->ipv6.mask.next_hdr, 1651331769Shselasky ib_spec->ipv6.val.next_hdr); 1652331769Shselasky 1653331769Shselasky MLX5_SET(fte_match_set_misc, misc_params_c, 1654331769Shselasky outer_ipv6_flow_label, 1655331769Shselasky ntohl(ib_spec->ipv6.mask.flow_label)); 1656331769Shselasky MLX5_SET(fte_match_set_misc, misc_params_v, 1657331769Shselasky outer_ipv6_flow_label, 1658331769Shselasky ntohl(ib_spec->ipv6.val.flow_label)); 1659331769Shselasky break; 1660331769Shselasky case IB_FLOW_SPEC_TCP: 1661331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, 1662331769Shselasky LAST_TCP_UDP_FIELD)) 1663331769Shselasky return -ENOTSUPP; 1664331769Shselasky 1665331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, ip_protocol, 1666331769Shselasky 0xff); 1667331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, ip_protocol, 1668331769Shselasky IPPROTO_TCP); 1669331769Shselasky 1670331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, tcp_sport, 1671331769Shselasky ntohs(ib_spec->tcp_udp.mask.src_port)); 1672331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, tcp_sport, 1673331769Shselasky ntohs(ib_spec->tcp_udp.val.src_port)); 1674331769Shselasky 1675331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, tcp_dport, 1676331769Shselasky ntohs(ib_spec->tcp_udp.mask.dst_port)); 1677331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, tcp_dport, 1678331769Shselasky ntohs(ib_spec->tcp_udp.val.dst_port)); 1679331769Shselasky break; 1680331769Shselasky case IB_FLOW_SPEC_UDP: 1681331769Shselasky if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, 1682331769Shselasky LAST_TCP_UDP_FIELD)) 1683331769Shselasky return -ENOTSUPP; 1684331769Shselasky 1685331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, ip_protocol, 1686331769Shselasky 0xff); 1687331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, ip_protocol, 1688331769Shselasky IPPROTO_UDP); 1689331769Shselasky 1690331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, udp_sport, 1691331769Shselasky ntohs(ib_spec->tcp_udp.mask.src_port)); 1692331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, udp_sport, 1693331769Shselasky ntohs(ib_spec->tcp_udp.val.src_port)); 1694331769Shselasky 1695331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_c, udp_dport, 1696331769Shselasky ntohs(ib_spec->tcp_udp.mask.dst_port)); 1697331769Shselasky MLX5_SET(fte_match_set_lyr_2_4, outer_headers_v, udp_dport, 1698331769Shselasky ntohs(ib_spec->tcp_udp.val.dst_port)); 1699331769Shselasky break; 1700331769Shselasky default: 1701331769Shselasky return -EINVAL; 1702331769Shselasky } 1703331769Shselasky 1704331769Shselasky return 0; 1705331769Shselasky} 1706331769Shselasky 1707331769Shselasky/* If a flow could catch both multicast and unicast packets, 1708331769Shselasky * it won't fall into the multicast flow steering table and this rule 1709331769Shselasky * could steal other multicast packets. 1710331769Shselasky */ 1711331769Shselaskystatic bool flow_is_multicast_only(struct ib_flow_attr *ib_attr) 1712331769Shselasky{ 1713331769Shselasky struct ib_flow_spec_eth *eth_spec; 1714331769Shselasky 1715331769Shselasky if (ib_attr->type != IB_FLOW_ATTR_NORMAL || 1716331769Shselasky ib_attr->size < sizeof(struct ib_flow_attr) + 1717331769Shselasky sizeof(struct ib_flow_spec_eth) || 1718331769Shselasky ib_attr->num_of_specs < 1) 1719331769Shselasky return false; 1720331769Shselasky 1721331769Shselasky eth_spec = (struct ib_flow_spec_eth *)(ib_attr + 1); 1722331769Shselasky if (eth_spec->type != IB_FLOW_SPEC_ETH || 1723331769Shselasky eth_spec->size != sizeof(*eth_spec)) 1724331769Shselasky return false; 1725331769Shselasky 1726331769Shselasky return is_multicast_ether_addr(eth_spec->mask.dst_mac) && 1727331769Shselasky is_multicast_ether_addr(eth_spec->val.dst_mac); 1728331769Shselasky} 1729331769Shselasky 1730331769Shselaskystatic bool is_valid_attr(const struct ib_flow_attr *flow_attr) 1731331769Shselasky{ 1732331769Shselasky union ib_flow_spec *ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1733331769Shselasky bool has_ipv4_spec = false; 1734331769Shselasky bool eth_type_ipv4 = true; 1735331769Shselasky unsigned int spec_index; 1736331769Shselasky 1737331769Shselasky /* Validate that ethertype is correct */ 1738331769Shselasky for (spec_index = 0; spec_index < flow_attr->num_of_specs; spec_index++) { 1739331769Shselasky if (ib_spec->type == IB_FLOW_SPEC_ETH && 1740331769Shselasky ib_spec->eth.mask.ether_type) { 1741331769Shselasky if (!((ib_spec->eth.mask.ether_type == htons(0xffff)) && 1742331769Shselasky ib_spec->eth.val.ether_type == htons(ETH_P_IP))) 1743331769Shselasky eth_type_ipv4 = false; 1744331769Shselasky } else if (ib_spec->type == IB_FLOW_SPEC_IPV4) { 1745331769Shselasky has_ipv4_spec = true; 1746331769Shselasky } 1747331769Shselasky ib_spec = (void *)ib_spec + ib_spec->size; 1748331769Shselasky } 1749331769Shselasky return !has_ipv4_spec || eth_type_ipv4; 1750331769Shselasky} 1751331769Shselasky 1752331769Shselaskystatic void put_flow_table(struct mlx5_ib_dev *dev, 1753331769Shselasky struct mlx5_ib_flow_prio *prio, bool ft_added) 1754331769Shselasky{ 1755331769Shselasky prio->refcount -= !!ft_added; 1756331769Shselasky if (!prio->refcount) { 1757331769Shselasky mlx5_destroy_flow_table(prio->flow_table); 1758331769Shselasky prio->flow_table = NULL; 1759331769Shselasky } 1760331769Shselasky} 1761331769Shselasky 1762331769Shselaskystatic int mlx5_ib_destroy_flow(struct ib_flow *flow_id) 1763331769Shselasky{ 1764331769Shselasky struct mlx5_ib_dev *dev = to_mdev(flow_id->qp->device); 1765331769Shselasky struct mlx5_ib_flow_handler *handler = container_of(flow_id, 1766331769Shselasky struct mlx5_ib_flow_handler, 1767331769Shselasky ibflow); 1768331769Shselasky struct mlx5_ib_flow_handler *iter, *tmp; 1769331769Shselasky 1770331769Shselasky mutex_lock(&dev->flow_db.lock); 1771331769Shselasky 1772331769Shselasky list_for_each_entry_safe(iter, tmp, &handler->list, list) { 1773331769Shselasky mlx5_del_flow_rule(iter->rule); 1774331769Shselasky put_flow_table(dev, iter->prio, true); 1775331769Shselasky list_del(&iter->list); 1776331769Shselasky kfree(iter); 1777331769Shselasky } 1778331769Shselasky 1779331769Shselasky mlx5_del_flow_rule(handler->rule); 1780331769Shselasky put_flow_table(dev, handler->prio, true); 1781331769Shselasky mutex_unlock(&dev->flow_db.lock); 1782331769Shselasky 1783331769Shselasky kfree(handler); 1784331769Shselasky 1785331769Shselasky return 0; 1786331769Shselasky} 1787331769Shselasky 1788331769Shselaskystatic int ib_prio_to_core_prio(unsigned int priority, bool dont_trap) 1789331769Shselasky{ 1790331769Shselasky priority *= 2; 1791331769Shselasky if (!dont_trap) 1792331769Shselasky priority++; 1793331769Shselasky return priority; 1794331769Shselasky} 1795331769Shselasky 1796331769Shselaskyenum flow_table_type { 1797331769Shselasky MLX5_IB_FT_RX, 1798331769Shselasky MLX5_IB_FT_TX 1799331769Shselasky}; 1800331769Shselasky 1801331769Shselasky#define MLX5_FS_MAX_TYPES 10 1802331769Shselasky#define MLX5_FS_MAX_ENTRIES 32000UL 1803331769Shselaskystatic struct mlx5_ib_flow_prio *get_flow_table(struct mlx5_ib_dev *dev, 1804331769Shselasky struct ib_flow_attr *flow_attr, 1805331769Shselasky enum flow_table_type ft_type) 1806331769Shselasky{ 1807331769Shselasky bool dont_trap = flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP; 1808331769Shselasky struct mlx5_flow_namespace *ns = NULL; 1809331769Shselasky struct mlx5_ib_flow_prio *prio; 1810331769Shselasky struct mlx5_flow_table *ft; 1811331769Shselasky int num_entries; 1812331769Shselasky int num_groups; 1813331769Shselasky int priority; 1814331769Shselasky int err = 0; 1815331769Shselasky 1816331769Shselasky if (flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1817331769Shselasky if (flow_is_multicast_only(flow_attr) && 1818331769Shselasky !dont_trap) 1819331769Shselasky priority = MLX5_IB_FLOW_MCAST_PRIO; 1820331769Shselasky else 1821331769Shselasky priority = ib_prio_to_core_prio(flow_attr->priority, 1822331769Shselasky dont_trap); 1823331769Shselasky ns = mlx5_get_flow_namespace(dev->mdev, 1824331769Shselasky MLX5_FLOW_NAMESPACE_BYPASS); 1825331769Shselasky num_entries = MLX5_FS_MAX_ENTRIES; 1826331769Shselasky num_groups = MLX5_FS_MAX_TYPES; 1827331769Shselasky prio = &dev->flow_db.prios[priority]; 1828331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT || 1829331769Shselasky flow_attr->type == IB_FLOW_ATTR_MC_DEFAULT) { 1830331769Shselasky ns = mlx5_get_flow_namespace(dev->mdev, 1831331769Shselasky MLX5_FLOW_NAMESPACE_LEFTOVERS); 1832331769Shselasky build_leftovers_ft_param("bypass", &priority, 1833331769Shselasky &num_entries, 1834331769Shselasky &num_groups); 1835331769Shselasky prio = &dev->flow_db.prios[MLX5_IB_FLOW_LEFTOVERS_PRIO]; 1836331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_SNIFFER) { 1837331769Shselasky if (!MLX5_CAP_FLOWTABLE(dev->mdev, 1838331769Shselasky allow_sniffer_and_nic_rx_shared_tir)) 1839331769Shselasky return ERR_PTR(-ENOTSUPP); 1840331769Shselasky 1841331769Shselasky ns = mlx5_get_flow_namespace(dev->mdev, ft_type == MLX5_IB_FT_RX ? 1842331769Shselasky MLX5_FLOW_NAMESPACE_SNIFFER_RX : 1843331769Shselasky MLX5_FLOW_NAMESPACE_SNIFFER_TX); 1844331769Shselasky 1845331769Shselasky prio = &dev->flow_db.sniffer[ft_type]; 1846331769Shselasky priority = 0; 1847331769Shselasky num_entries = 1; 1848331769Shselasky num_groups = 1; 1849331769Shselasky } 1850331769Shselasky 1851331769Shselasky if (!ns) 1852331769Shselasky return ERR_PTR(-ENOTSUPP); 1853331769Shselasky 1854331769Shselasky ft = prio->flow_table; 1855331769Shselasky if (!ft) { 1856331769Shselasky ft = mlx5_create_auto_grouped_flow_table(ns, priority, "bypass", 1857331769Shselasky num_entries, 1858331769Shselasky num_groups); 1859331769Shselasky 1860331769Shselasky if (!IS_ERR(ft)) { 1861331769Shselasky prio->refcount = 0; 1862331769Shselasky prio->flow_table = ft; 1863331769Shselasky } else { 1864331769Shselasky err = PTR_ERR(ft); 1865331769Shselasky } 1866331769Shselasky } 1867331769Shselasky 1868331769Shselasky return err ? ERR_PTR(err) : prio; 1869331769Shselasky} 1870331769Shselasky 1871331769Shselaskystatic struct mlx5_ib_flow_handler *create_flow_rule(struct mlx5_ib_dev *dev, 1872331769Shselasky struct mlx5_ib_flow_prio *ft_prio, 1873331769Shselasky const struct ib_flow_attr *flow_attr, 1874331769Shselasky struct mlx5_flow_destination *dst) 1875331769Shselasky{ 1876331769Shselasky struct mlx5_flow_table *ft = ft_prio->flow_table; 1877331769Shselasky struct mlx5_ib_flow_handler *handler; 1878331769Shselasky struct mlx5_flow_spec *spec; 1879331769Shselasky const void *ib_flow = (const void *)flow_attr + sizeof(*flow_attr); 1880331769Shselasky unsigned int spec_index; 1881331769Shselasky u32 action; 1882331769Shselasky int err = 0; 1883331769Shselasky 1884331769Shselasky if (!is_valid_attr(flow_attr)) 1885331769Shselasky return ERR_PTR(-EINVAL); 1886331769Shselasky 1887331769Shselasky spec = mlx5_vzalloc(sizeof(*spec)); 1888331769Shselasky handler = kzalloc(sizeof(*handler), GFP_KERNEL); 1889331769Shselasky if (!handler || !spec) { 1890331769Shselasky err = -ENOMEM; 1891331769Shselasky goto free; 1892331769Shselasky } 1893331769Shselasky 1894331769Shselasky INIT_LIST_HEAD(&handler->list); 1895331769Shselasky 1896331769Shselasky for (spec_index = 0; spec_index < flow_attr->num_of_specs; spec_index++) { 1897331769Shselasky err = parse_flow_attr(spec->match_criteria, 1898331769Shselasky spec->match_value, ib_flow); 1899331769Shselasky if (err < 0) 1900331769Shselasky goto free; 1901331769Shselasky 1902331769Shselasky ib_flow += ((union ib_flow_spec *)ib_flow)->size; 1903331769Shselasky } 1904331769Shselasky 1905331769Shselasky spec->match_criteria_enable = get_match_criteria_enable(spec->match_criteria); 1906331769Shselasky action = dst ? MLX5_FLOW_CONTEXT_ACTION_FWD_DEST : 1907331769Shselasky MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_PRIO; 1908331769Shselasky handler->rule = mlx5_add_flow_rule(ft, spec->match_criteria_enable, 1909331769Shselasky spec->match_criteria, 1910331769Shselasky spec->match_value, 1911331769Shselasky action, 1912331769Shselasky MLX5_FS_DEFAULT_FLOW_TAG, 1913331769Shselasky dst); 1914331769Shselasky 1915331769Shselasky if (IS_ERR(handler->rule)) { 1916331769Shselasky err = PTR_ERR(handler->rule); 1917331769Shselasky goto free; 1918331769Shselasky } 1919331769Shselasky 1920331769Shselasky ft_prio->refcount++; 1921331769Shselasky handler->prio = ft_prio; 1922331769Shselasky 1923331769Shselasky ft_prio->flow_table = ft; 1924331769Shselaskyfree: 1925331769Shselasky if (err) 1926331769Shselasky kfree(handler); 1927331769Shselasky kvfree(spec); 1928331769Shselasky return err ? ERR_PTR(err) : handler; 1929331769Shselasky} 1930331769Shselasky 1931331769Shselaskystatic struct mlx5_ib_flow_handler *create_dont_trap_rule(struct mlx5_ib_dev *dev, 1932331769Shselasky struct mlx5_ib_flow_prio *ft_prio, 1933331769Shselasky struct ib_flow_attr *flow_attr, 1934331769Shselasky struct mlx5_flow_destination *dst) 1935331769Shselasky{ 1936331769Shselasky struct mlx5_ib_flow_handler *handler_dst = NULL; 1937331769Shselasky struct mlx5_ib_flow_handler *handler = NULL; 1938331769Shselasky 1939331769Shselasky handler = create_flow_rule(dev, ft_prio, flow_attr, NULL); 1940331769Shselasky if (!IS_ERR(handler)) { 1941331769Shselasky handler_dst = create_flow_rule(dev, ft_prio, 1942331769Shselasky flow_attr, dst); 1943331769Shselasky if (IS_ERR(handler_dst)) { 1944331769Shselasky mlx5_del_flow_rule(handler->rule); 1945331769Shselasky ft_prio->refcount--; 1946331769Shselasky kfree(handler); 1947331769Shselasky handler = handler_dst; 1948331769Shselasky } else { 1949331769Shselasky list_add(&handler_dst->list, &handler->list); 1950331769Shselasky } 1951331769Shselasky } 1952331769Shselasky 1953331769Shselasky return handler; 1954331769Shselasky} 1955331769Shselaskyenum { 1956331769Shselasky LEFTOVERS_MC, 1957331769Shselasky LEFTOVERS_UC, 1958331769Shselasky}; 1959331769Shselasky 1960331769Shselaskystatic struct mlx5_ib_flow_handler *create_leftovers_rule(struct mlx5_ib_dev *dev, 1961331769Shselasky struct mlx5_ib_flow_prio *ft_prio, 1962331769Shselasky struct ib_flow_attr *flow_attr, 1963331769Shselasky struct mlx5_flow_destination *dst) 1964331769Shselasky{ 1965331769Shselasky struct mlx5_ib_flow_handler *handler_ucast = NULL; 1966331769Shselasky struct mlx5_ib_flow_handler *handler = NULL; 1967331769Shselasky 1968331769Shselasky static struct { 1969331769Shselasky struct ib_flow_attr flow_attr; 1970331769Shselasky struct ib_flow_spec_eth eth_flow; 1971331769Shselasky } leftovers_specs[] = { 1972331769Shselasky [LEFTOVERS_MC] = { 1973331769Shselasky .flow_attr = { 1974331769Shselasky .num_of_specs = 1, 1975331769Shselasky .size = sizeof(leftovers_specs[0]) 1976331769Shselasky }, 1977331769Shselasky .eth_flow = { 1978331769Shselasky .type = IB_FLOW_SPEC_ETH, 1979331769Shselasky .size = sizeof(struct ib_flow_spec_eth), 1980331769Shselasky .mask = {.dst_mac = {0x1} }, 1981331769Shselasky .val = {.dst_mac = {0x1} } 1982331769Shselasky } 1983331769Shselasky }, 1984331769Shselasky [LEFTOVERS_UC] = { 1985331769Shselasky .flow_attr = { 1986331769Shselasky .num_of_specs = 1, 1987331769Shselasky .size = sizeof(leftovers_specs[0]) 1988331769Shselasky }, 1989331769Shselasky .eth_flow = { 1990331769Shselasky .type = IB_FLOW_SPEC_ETH, 1991331769Shselasky .size = sizeof(struct ib_flow_spec_eth), 1992331769Shselasky .mask = {.dst_mac = {0x1} }, 1993331769Shselasky .val = {.dst_mac = {} } 1994331769Shselasky } 1995331769Shselasky } 1996331769Shselasky }; 1997331769Shselasky 1998331769Shselasky handler = create_flow_rule(dev, ft_prio, 1999331769Shselasky &leftovers_specs[LEFTOVERS_MC].flow_attr, 2000331769Shselasky dst); 2001331769Shselasky if (!IS_ERR(handler) && 2002331769Shselasky flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT) { 2003331769Shselasky handler_ucast = create_flow_rule(dev, ft_prio, 2004331769Shselasky &leftovers_specs[LEFTOVERS_UC].flow_attr, 2005331769Shselasky dst); 2006331769Shselasky if (IS_ERR(handler_ucast)) { 2007331769Shselasky mlx5_del_flow_rule(handler->rule); 2008331769Shselasky ft_prio->refcount--; 2009331769Shselasky kfree(handler); 2010331769Shselasky handler = handler_ucast; 2011331769Shselasky } else { 2012331769Shselasky list_add(&handler_ucast->list, &handler->list); 2013331769Shselasky } 2014331769Shselasky } 2015331769Shselasky 2016331769Shselasky return handler; 2017331769Shselasky} 2018331769Shselasky 2019331769Shselaskystatic struct mlx5_ib_flow_handler *create_sniffer_rule(struct mlx5_ib_dev *dev, 2020331769Shselasky struct mlx5_ib_flow_prio *ft_rx, 2021331769Shselasky struct mlx5_ib_flow_prio *ft_tx, 2022331769Shselasky struct mlx5_flow_destination *dst) 2023331769Shselasky{ 2024331769Shselasky struct mlx5_ib_flow_handler *handler_rx; 2025331769Shselasky struct mlx5_ib_flow_handler *handler_tx; 2026331769Shselasky int err; 2027331769Shselasky static const struct ib_flow_attr flow_attr = { 2028331769Shselasky .num_of_specs = 0, 2029331769Shselasky .size = sizeof(flow_attr) 2030331769Shselasky }; 2031331769Shselasky 2032331769Shselasky handler_rx = create_flow_rule(dev, ft_rx, &flow_attr, dst); 2033331769Shselasky if (IS_ERR(handler_rx)) { 2034331769Shselasky err = PTR_ERR(handler_rx); 2035331769Shselasky goto err; 2036331769Shselasky } 2037331769Shselasky 2038331769Shselasky handler_tx = create_flow_rule(dev, ft_tx, &flow_attr, dst); 2039331769Shselasky if (IS_ERR(handler_tx)) { 2040331769Shselasky err = PTR_ERR(handler_tx); 2041331769Shselasky goto err_tx; 2042331769Shselasky } 2043331769Shselasky 2044331769Shselasky list_add(&handler_tx->list, &handler_rx->list); 2045331769Shselasky 2046331769Shselasky return handler_rx; 2047331769Shselasky 2048331769Shselaskyerr_tx: 2049331769Shselasky mlx5_del_flow_rule(handler_rx->rule); 2050331769Shselasky ft_rx->refcount--; 2051331769Shselasky kfree(handler_rx); 2052331769Shselaskyerr: 2053331769Shselasky return ERR_PTR(err); 2054331769Shselasky} 2055331769Shselasky 2056331769Shselaskystatic struct ib_flow *mlx5_ib_create_flow(struct ib_qp *qp, 2057331769Shselasky struct ib_flow_attr *flow_attr, 2058331769Shselasky int domain) 2059331769Shselasky{ 2060331769Shselasky struct mlx5_ib_dev *dev = to_mdev(qp->device); 2061331769Shselasky struct mlx5_ib_qp *mqp = to_mqp(qp); 2062331769Shselasky struct mlx5_ib_flow_handler *handler = NULL; 2063331769Shselasky struct mlx5_flow_destination *dst = NULL; 2064331769Shselasky struct mlx5_ib_flow_prio *ft_prio_tx = NULL; 2065331769Shselasky struct mlx5_ib_flow_prio *ft_prio; 2066331769Shselasky int err; 2067331769Shselasky 2068331769Shselasky if (flow_attr->priority > MLX5_IB_FLOW_LAST_PRIO) 2069331769Shselasky return ERR_PTR(-ENOSPC); 2070331769Shselasky 2071331769Shselasky if (domain != IB_FLOW_DOMAIN_USER || 2072331769Shselasky flow_attr->port > MLX5_CAP_GEN(dev->mdev, num_ports) || 2073331769Shselasky (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP)) 2074331769Shselasky return ERR_PTR(-EINVAL); 2075331769Shselasky 2076331769Shselasky dst = kzalloc(sizeof(*dst), GFP_KERNEL); 2077331769Shselasky if (!dst) 2078331769Shselasky return ERR_PTR(-ENOMEM); 2079331769Shselasky 2080331769Shselasky mutex_lock(&dev->flow_db.lock); 2081331769Shselasky 2082331769Shselasky ft_prio = get_flow_table(dev, flow_attr, MLX5_IB_FT_RX); 2083331769Shselasky if (IS_ERR(ft_prio)) { 2084331769Shselasky err = PTR_ERR(ft_prio); 2085331769Shselasky goto unlock; 2086331769Shselasky } 2087331769Shselasky if (flow_attr->type == IB_FLOW_ATTR_SNIFFER) { 2088331769Shselasky ft_prio_tx = get_flow_table(dev, flow_attr, MLX5_IB_FT_TX); 2089331769Shselasky if (IS_ERR(ft_prio_tx)) { 2090331769Shselasky err = PTR_ERR(ft_prio_tx); 2091331769Shselasky ft_prio_tx = NULL; 2092331769Shselasky goto destroy_ft; 2093331769Shselasky } 2094331769Shselasky } 2095331769Shselasky 2096331769Shselasky dst->type = MLX5_FLOW_DESTINATION_TYPE_TIR; 2097331769Shselasky if (mqp->flags & MLX5_IB_QP_RSS) 2098331769Shselasky dst->tir_num = mqp->rss_qp.tirn; 2099331769Shselasky else 2100331769Shselasky dst->tir_num = mqp->raw_packet_qp.rq.tirn; 2101331769Shselasky 2102331769Shselasky if (flow_attr->type == IB_FLOW_ATTR_NORMAL) { 2103331769Shselasky if (flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) { 2104331769Shselasky handler = create_dont_trap_rule(dev, ft_prio, 2105331769Shselasky flow_attr, dst); 2106331769Shselasky } else { 2107331769Shselasky handler = create_flow_rule(dev, ft_prio, flow_attr, 2108331769Shselasky dst); 2109331769Shselasky } 2110331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT || 2111331769Shselasky flow_attr->type == IB_FLOW_ATTR_MC_DEFAULT) { 2112331769Shselasky handler = create_leftovers_rule(dev, ft_prio, flow_attr, 2113331769Shselasky dst); 2114331769Shselasky } else if (flow_attr->type == IB_FLOW_ATTR_SNIFFER) { 2115331769Shselasky handler = create_sniffer_rule(dev, ft_prio, ft_prio_tx, dst); 2116331769Shselasky } else { 2117331769Shselasky err = -EINVAL; 2118331769Shselasky goto destroy_ft; 2119331769Shselasky } 2120331769Shselasky 2121331769Shselasky if (IS_ERR(handler)) { 2122331769Shselasky err = PTR_ERR(handler); 2123331769Shselasky handler = NULL; 2124331769Shselasky goto destroy_ft; 2125331769Shselasky } 2126331769Shselasky 2127331769Shselasky mutex_unlock(&dev->flow_db.lock); 2128331769Shselasky kfree(dst); 2129331769Shselasky 2130331769Shselasky return &handler->ibflow; 2131331769Shselasky 2132331769Shselaskydestroy_ft: 2133331769Shselasky put_flow_table(dev, ft_prio, false); 2134331769Shselasky if (ft_prio_tx) 2135331769Shselasky put_flow_table(dev, ft_prio_tx, false); 2136331769Shselaskyunlock: 2137331769Shselasky mutex_unlock(&dev->flow_db.lock); 2138331769Shselasky kfree(dst); 2139331769Shselasky kfree(handler); 2140331769Shselasky return ERR_PTR(err); 2141331769Shselasky} 2142331769Shselasky 2143322810Shselaskystatic int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2144322810Shselasky{ 2145322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2146322810Shselasky int err; 2147322810Shselasky 2148331769Shselasky err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 2149322810Shselasky if (err) 2150322810Shselasky mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 2151322810Shselasky ibqp->qp_num, gid->raw); 2152322810Shselasky 2153322810Shselasky return err; 2154322810Shselasky} 2155322810Shselasky 2156322810Shselaskystatic int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2157322810Shselasky{ 2158322810Shselasky struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 2159322810Shselasky int err; 2160322810Shselasky 2161331769Shselasky err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 2162322810Shselasky if (err) 2163322810Shselasky mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 2164322810Shselasky ibqp->qp_num, gid->raw); 2165322810Shselasky 2166322810Shselasky return err; 2167322810Shselasky} 2168322810Shselasky 2169322810Shselaskystatic int init_node_data(struct mlx5_ib_dev *dev) 2170322810Shselasky{ 2171322810Shselasky int err; 2172322810Shselasky 2173322810Shselasky err = mlx5_query_node_desc(dev, dev->ib_dev.node_desc); 2174322810Shselasky if (err) 2175322810Shselasky return err; 2176322810Shselasky 2177322810Shselasky return mlx5_query_node_guid(dev, &dev->ib_dev.node_guid); 2178322810Shselasky} 2179322810Shselasky 2180322810Shselaskystatic ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 2181322810Shselasky char *buf) 2182322810Shselasky{ 2183322810Shselasky struct mlx5_ib_dev *dev = 2184322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2185322810Shselasky 2186322810Shselasky return sprintf(buf, "%lld\n", (long long)dev->mdev->priv.fw_pages); 2187322810Shselasky} 2188322810Shselasky 2189322810Shselaskystatic ssize_t show_reg_pages(struct device *device, 2190322810Shselasky struct device_attribute *attr, char *buf) 2191322810Shselasky{ 2192322810Shselasky struct mlx5_ib_dev *dev = 2193322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2194322810Shselasky 2195322810Shselasky return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); 2196322810Shselasky} 2197322810Shselasky 2198322810Shselaskystatic ssize_t show_hca(struct device *device, struct device_attribute *attr, 2199322810Shselasky char *buf) 2200322810Shselasky{ 2201322810Shselasky struct mlx5_ib_dev *dev = 2202322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2203322810Shselasky return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 2204322810Shselasky} 2205322810Shselasky 2206322810Shselaskystatic ssize_t show_rev(struct device *device, struct device_attribute *attr, 2207322810Shselasky char *buf) 2208322810Shselasky{ 2209322810Shselasky struct mlx5_ib_dev *dev = 2210322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2211331769Shselasky return sprintf(buf, "%x\n", dev->mdev->pdev->revision); 2212322810Shselasky} 2213322810Shselasky 2214322810Shselaskystatic ssize_t show_board(struct device *device, struct device_attribute *attr, 2215322810Shselasky char *buf) 2216322810Shselasky{ 2217322810Shselasky struct mlx5_ib_dev *dev = 2218322810Shselasky container_of(device, struct mlx5_ib_dev, ib_dev.dev); 2219322810Shselasky return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 2220322810Shselasky dev->mdev->board_id); 2221322810Shselasky} 2222322810Shselasky 2223322810Shselaskystatic DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 2224322810Shselaskystatic DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 2225322810Shselaskystatic DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 2226322810Shselaskystatic DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 2227322810Shselaskystatic DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 2228322810Shselasky 2229322810Shselaskystatic struct device_attribute *mlx5_class_attributes[] = { 2230322810Shselasky &dev_attr_hw_rev, 2231322810Shselasky &dev_attr_hca_type, 2232322810Shselasky &dev_attr_board_id, 2233322810Shselasky &dev_attr_fw_pages, 2234322810Shselasky &dev_attr_reg_pages, 2235322810Shselasky}; 2236322810Shselasky 2237331769Shselaskystatic void pkey_change_handler(struct work_struct *work) 2238331769Shselasky{ 2239331769Shselasky struct mlx5_ib_port_resources *ports = 2240331769Shselasky container_of(work, struct mlx5_ib_port_resources, 2241331769Shselasky pkey_change_work); 2242331769Shselasky 2243331769Shselasky mutex_lock(&ports->devr->mutex); 2244331769Shselasky mlx5_ib_gsi_pkey_change(ports->gsi); 2245331769Shselasky mutex_unlock(&ports->devr->mutex); 2246331769Shselasky} 2247331769Shselasky 2248322810Shselaskystatic void mlx5_ib_handle_internal_error(struct mlx5_ib_dev *ibdev) 2249322810Shselasky{ 2250322810Shselasky struct mlx5_ib_qp *mqp; 2251322810Shselasky struct mlx5_ib_cq *send_mcq, *recv_mcq; 2252322810Shselasky struct mlx5_core_cq *mcq; 2253322810Shselasky struct list_head cq_armed_list; 2254322810Shselasky unsigned long flags_qp; 2255322810Shselasky unsigned long flags_cq; 2256322810Shselasky unsigned long flags; 2257322810Shselasky 2258322810Shselasky INIT_LIST_HEAD(&cq_armed_list); 2259322810Shselasky 2260322810Shselasky /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 2261322810Shselasky spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 2262322810Shselasky list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 2263322810Shselasky spin_lock_irqsave(&mqp->sq.lock, flags_qp); 2264322810Shselasky if (mqp->sq.tail != mqp->sq.head) { 2265322810Shselasky send_mcq = to_mcq(mqp->ibqp.send_cq); 2266322810Shselasky spin_lock_irqsave(&send_mcq->lock, flags_cq); 2267322810Shselasky if (send_mcq->mcq.comp && 2268322810Shselasky mqp->ibqp.send_cq->comp_handler) { 2269322810Shselasky if (!send_mcq->mcq.reset_notify_added) { 2270322810Shselasky send_mcq->mcq.reset_notify_added = 1; 2271322810Shselasky list_add_tail(&send_mcq->mcq.reset_notify, 2272322810Shselasky &cq_armed_list); 2273322810Shselasky } 2274322810Shselasky } 2275322810Shselasky spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 2276322810Shselasky } 2277322810Shselasky spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 2278322810Shselasky spin_lock_irqsave(&mqp->rq.lock, flags_qp); 2279322810Shselasky /* no handling is needed for SRQ */ 2280322810Shselasky if (!mqp->ibqp.srq) { 2281322810Shselasky if (mqp->rq.tail != mqp->rq.head) { 2282322810Shselasky recv_mcq = to_mcq(mqp->ibqp.recv_cq); 2283322810Shselasky spin_lock_irqsave(&recv_mcq->lock, flags_cq); 2284322810Shselasky if (recv_mcq->mcq.comp && 2285322810Shselasky mqp->ibqp.recv_cq->comp_handler) { 2286322810Shselasky if (!recv_mcq->mcq.reset_notify_added) { 2287322810Shselasky recv_mcq->mcq.reset_notify_added = 1; 2288322810Shselasky list_add_tail(&recv_mcq->mcq.reset_notify, 2289322810Shselasky &cq_armed_list); 2290322810Shselasky } 2291322810Shselasky } 2292322810Shselasky spin_unlock_irqrestore(&recv_mcq->lock, 2293322810Shselasky flags_cq); 2294322810Shselasky } 2295322810Shselasky } 2296322810Shselasky spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 2297322810Shselasky } 2298322810Shselasky /*At that point all inflight post send were put to be executed as of we 2299322810Shselasky * lock/unlock above locks Now need to arm all involved CQs. 2300322810Shselasky */ 2301322810Shselasky list_for_each_entry(mcq, &cq_armed_list, reset_notify) { 2302322810Shselasky mcq->comp(mcq); 2303322810Shselasky } 2304322810Shselasky spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 2305322810Shselasky} 2306322810Shselasky 2307322810Shselaskystatic void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 2308322810Shselasky enum mlx5_dev_event event, unsigned long param) 2309322810Shselasky{ 2310322810Shselasky struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 2311322810Shselasky struct ib_event ibev; 2312331769Shselasky bool fatal = false; 2313322810Shselasky u8 port = 0; 2314322810Shselasky 2315322810Shselasky switch (event) { 2316322810Shselasky case MLX5_DEV_EVENT_SYS_ERROR: 2317322810Shselasky ibev.event = IB_EVENT_DEVICE_FATAL; 2318322810Shselasky mlx5_ib_handle_internal_error(ibdev); 2319331769Shselasky fatal = true; 2320322810Shselasky break; 2321322810Shselasky 2322322810Shselasky case MLX5_DEV_EVENT_PORT_UP: 2323322810Shselasky case MLX5_DEV_EVENT_PORT_DOWN: 2324322810Shselasky case MLX5_DEV_EVENT_PORT_INITIALIZED: 2325322810Shselasky port = (u8)param; 2326331769Shselasky 2327331769Shselasky /* In RoCE, port up/down events are handled in 2328331769Shselasky * mlx5_netdev_event(). 2329331769Shselasky */ 2330331769Shselasky if (mlx5_ib_port_link_layer(&ibdev->ib_dev, port) == 2331331769Shselasky IB_LINK_LAYER_ETHERNET) 2332331769Shselasky return; 2333331769Shselasky 2334331769Shselasky ibev.event = (event == MLX5_DEV_EVENT_PORT_UP) ? 2335331769Shselasky IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 2336322810Shselasky break; 2337322810Shselasky 2338322810Shselasky case MLX5_DEV_EVENT_LID_CHANGE: 2339322810Shselasky ibev.event = IB_EVENT_LID_CHANGE; 2340322810Shselasky port = (u8)param; 2341322810Shselasky break; 2342322810Shselasky 2343322810Shselasky case MLX5_DEV_EVENT_PKEY_CHANGE: 2344322810Shselasky ibev.event = IB_EVENT_PKEY_CHANGE; 2345322810Shselasky port = (u8)param; 2346331769Shselasky 2347331769Shselasky schedule_work(&ibdev->devr.ports[port - 1].pkey_change_work); 2348322810Shselasky break; 2349322810Shselasky 2350322810Shselasky case MLX5_DEV_EVENT_GUID_CHANGE: 2351322810Shselasky ibev.event = IB_EVENT_GID_CHANGE; 2352322810Shselasky port = (u8)param; 2353322810Shselasky break; 2354322810Shselasky 2355322810Shselasky case MLX5_DEV_EVENT_CLIENT_REREG: 2356322810Shselasky ibev.event = IB_EVENT_CLIENT_REREGISTER; 2357322810Shselasky port = (u8)param; 2358322810Shselasky break; 2359322810Shselasky 2360322810Shselasky default: 2361322810Shselasky break; 2362322810Shselasky } 2363322810Shselasky 2364322810Shselasky ibev.device = &ibdev->ib_dev; 2365322810Shselasky ibev.element.port_num = port; 2366322810Shselasky 2367331769Shselasky if (port < 1 || port > ibdev->num_ports) { 2368322810Shselasky mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 2369322810Shselasky return; 2370322810Shselasky } 2371322810Shselasky 2372322810Shselasky if (ibdev->ib_active) 2373322810Shselasky ib_dispatch_event(&ibev); 2374331769Shselasky 2375331769Shselasky if (fatal) 2376331769Shselasky ibdev->ib_active = false; 2377322810Shselasky} 2378322810Shselasky 2379322810Shselaskystatic void get_ext_port_caps(struct mlx5_ib_dev *dev) 2380322810Shselasky{ 2381322810Shselasky int port; 2382322810Shselasky 2383322810Shselasky for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) 2384322810Shselasky mlx5_query_ext_port_caps(dev, port); 2385322810Shselasky} 2386322810Shselasky 2387322810Shselaskystatic int get_port_caps(struct mlx5_ib_dev *dev) 2388322810Shselasky{ 2389322810Shselasky struct ib_device_attr *dprops = NULL; 2390322810Shselasky struct ib_port_attr *pprops = NULL; 2391322810Shselasky int err = -ENOMEM; 2392322810Shselasky int port; 2393331769Shselasky struct ib_udata uhw = {.inlen = 0, .outlen = 0}; 2394322810Shselasky 2395322810Shselasky pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 2396322810Shselasky if (!pprops) 2397322810Shselasky goto out; 2398322810Shselasky 2399322810Shselasky dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 2400322810Shselasky if (!dprops) 2401322810Shselasky goto out; 2402322810Shselasky 2403331769Shselasky err = mlx5_ib_query_device(&dev->ib_dev, dprops, &uhw); 2404322810Shselasky if (err) { 2405322810Shselasky mlx5_ib_warn(dev, "query_device failed %d\n", err); 2406322810Shselasky goto out; 2407322810Shselasky } 2408322810Shselasky 2409322810Shselasky for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) { 2410322810Shselasky err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 2411322810Shselasky if (err) { 2412322810Shselasky mlx5_ib_warn(dev, "query_port %d failed %d\n", 2413322810Shselasky port, err); 2414322810Shselasky break; 2415322810Shselasky } 2416331769Shselasky dev->mdev->port_caps[port - 1].pkey_table_len = 2417331769Shselasky dprops->max_pkeys; 2418331769Shselasky dev->mdev->port_caps[port - 1].gid_table_len = 2419331769Shselasky pprops->gid_tbl_len; 2420322810Shselasky mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 2421322810Shselasky dprops->max_pkeys, pprops->gid_tbl_len); 2422322810Shselasky } 2423322810Shselasky 2424322810Shselaskyout: 2425322810Shselasky kfree(pprops); 2426322810Shselasky kfree(dprops); 2427322810Shselasky 2428322810Shselasky return err; 2429322810Shselasky} 2430322810Shselasky 2431322810Shselaskystatic void destroy_umrc_res(struct mlx5_ib_dev *dev) 2432322810Shselasky{ 2433322810Shselasky int err; 2434322810Shselasky 2435322810Shselasky err = mlx5_mr_cache_cleanup(dev); 2436322810Shselasky if (err) 2437322810Shselasky mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 2438322810Shselasky 2439331769Shselasky mlx5_ib_destroy_qp(dev->umrc.qp); 2440331769Shselasky ib_free_cq(dev->umrc.cq); 2441322810Shselasky ib_dealloc_pd(dev->umrc.pd); 2442322810Shselasky} 2443322810Shselasky 2444322810Shselaskyenum { 2445322810Shselasky MAX_UMR_WR = 128, 2446322810Shselasky}; 2447322810Shselasky 2448322810Shselaskystatic int create_umr_res(struct mlx5_ib_dev *dev) 2449322810Shselasky{ 2450331769Shselasky struct ib_qp_init_attr *init_attr = NULL; 2451331769Shselasky struct ib_qp_attr *attr = NULL; 2452322810Shselasky struct ib_pd *pd; 2453331769Shselasky struct ib_cq *cq; 2454331769Shselasky struct ib_qp *qp; 2455322810Shselasky int ret; 2456322810Shselasky 2457331769Shselasky attr = kzalloc(sizeof(*attr), GFP_KERNEL); 2458331769Shselasky init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 2459331769Shselasky if (!attr || !init_attr) { 2460331769Shselasky ret = -ENOMEM; 2461331769Shselasky goto error_0; 2462331769Shselasky } 2463331769Shselasky 2464331769Shselasky pd = ib_alloc_pd(&dev->ib_dev, 0); 2465322810Shselasky if (IS_ERR(pd)) { 2466322810Shselasky mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 2467322810Shselasky ret = PTR_ERR(pd); 2468322810Shselasky goto error_0; 2469322810Shselasky } 2470322810Shselasky 2471331769Shselasky cq = ib_alloc_cq(&dev->ib_dev, NULL, 128, 0, IB_POLL_SOFTIRQ); 2472331769Shselasky if (IS_ERR(cq)) { 2473331769Shselasky mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 2474331769Shselasky ret = PTR_ERR(cq); 2475331769Shselasky goto error_2; 2476322810Shselasky } 2477322810Shselasky 2478331769Shselasky init_attr->send_cq = cq; 2479331769Shselasky init_attr->recv_cq = cq; 2480331769Shselasky init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 2481331769Shselasky init_attr->cap.max_send_wr = MAX_UMR_WR; 2482331769Shselasky init_attr->cap.max_send_sge = 1; 2483331769Shselasky init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 2484331769Shselasky init_attr->port_num = 1; 2485331769Shselasky qp = mlx5_ib_create_qp(pd, init_attr, NULL); 2486331769Shselasky if (IS_ERR(qp)) { 2487331769Shselasky mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 2488331769Shselasky ret = PTR_ERR(qp); 2489331769Shselasky goto error_3; 2490331769Shselasky } 2491331769Shselasky qp->device = &dev->ib_dev; 2492331769Shselasky qp->real_qp = qp; 2493331769Shselasky qp->uobject = NULL; 2494331769Shselasky qp->qp_type = MLX5_IB_QPT_REG_UMR; 2495331769Shselasky 2496331769Shselasky attr->qp_state = IB_QPS_INIT; 2497331769Shselasky attr->port_num = 1; 2498331769Shselasky ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 2499331769Shselasky IB_QP_PORT, NULL); 2500331769Shselasky if (ret) { 2501331769Shselasky mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 2502331769Shselasky goto error_4; 2503331769Shselasky } 2504331769Shselasky 2505331769Shselasky memset(attr, 0, sizeof(*attr)); 2506331769Shselasky attr->qp_state = IB_QPS_RTR; 2507331769Shselasky attr->path_mtu = IB_MTU_256; 2508331769Shselasky 2509331769Shselasky ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 2510331769Shselasky if (ret) { 2511331769Shselasky mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 2512331769Shselasky goto error_4; 2513331769Shselasky } 2514331769Shselasky 2515331769Shselasky memset(attr, 0, sizeof(*attr)); 2516331769Shselasky attr->qp_state = IB_QPS_RTS; 2517331769Shselasky ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 2518331769Shselasky if (ret) { 2519331769Shselasky mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 2520331769Shselasky goto error_4; 2521331769Shselasky } 2522331769Shselasky 2523331769Shselasky dev->umrc.qp = qp; 2524331769Shselasky dev->umrc.cq = cq; 2525322810Shselasky dev->umrc.pd = pd; 2526322810Shselasky 2527331769Shselasky sema_init(&dev->umrc.sem, MAX_UMR_WR); 2528322810Shselasky ret = mlx5_mr_cache_init(dev); 2529322810Shselasky if (ret) { 2530322810Shselasky mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 2531322810Shselasky goto error_4; 2532322810Shselasky } 2533322810Shselasky 2534331769Shselasky kfree(attr); 2535331769Shselasky kfree(init_attr); 2536331769Shselasky 2537322810Shselasky return 0; 2538322810Shselasky 2539322810Shselaskyerror_4: 2540331769Shselasky mlx5_ib_destroy_qp(qp); 2541331769Shselasky 2542331769Shselaskyerror_3: 2543331769Shselasky ib_free_cq(cq); 2544331769Shselasky 2545331769Shselaskyerror_2: 2546322810Shselasky ib_dealloc_pd(pd); 2547331769Shselasky 2548322810Shselaskyerror_0: 2549331769Shselasky kfree(attr); 2550331769Shselasky kfree(init_attr); 2551322810Shselasky return ret; 2552322810Shselasky} 2553322810Shselasky 2554322810Shselaskystatic int create_dev_resources(struct mlx5_ib_resources *devr) 2555322810Shselasky{ 2556322810Shselasky struct ib_srq_init_attr attr; 2557322810Shselasky struct mlx5_ib_dev *dev; 2558331769Shselasky struct ib_cq_init_attr cq_attr = {.cqe = 1}; 2559331769Shselasky int port; 2560322810Shselasky int ret = 0; 2561322810Shselasky 2562322810Shselasky dev = container_of(devr, struct mlx5_ib_dev, devr); 2563322810Shselasky 2564331769Shselasky mutex_init(&devr->mutex); 2565331769Shselasky 2566322810Shselasky devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 2567322810Shselasky if (IS_ERR(devr->p0)) { 2568322810Shselasky ret = PTR_ERR(devr->p0); 2569322810Shselasky goto error0; 2570322810Shselasky } 2571322810Shselasky devr->p0->device = &dev->ib_dev; 2572322810Shselasky devr->p0->uobject = NULL; 2573322810Shselasky atomic_set(&devr->p0->usecnt, 0); 2574322810Shselasky 2575322810Shselasky devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, &cq_attr, NULL, NULL); 2576322810Shselasky if (IS_ERR(devr->c0)) { 2577322810Shselasky ret = PTR_ERR(devr->c0); 2578322810Shselasky goto error1; 2579322810Shselasky } 2580322810Shselasky devr->c0->device = &dev->ib_dev; 2581322810Shselasky devr->c0->uobject = NULL; 2582322810Shselasky devr->c0->comp_handler = NULL; 2583322810Shselasky devr->c0->event_handler = NULL; 2584322810Shselasky devr->c0->cq_context = NULL; 2585322810Shselasky atomic_set(&devr->c0->usecnt, 0); 2586322810Shselasky 2587322810Shselasky devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 2588322810Shselasky if (IS_ERR(devr->x0)) { 2589322810Shselasky ret = PTR_ERR(devr->x0); 2590322810Shselasky goto error2; 2591322810Shselasky } 2592322810Shselasky devr->x0->device = &dev->ib_dev; 2593322810Shselasky devr->x0->inode = NULL; 2594322810Shselasky atomic_set(&devr->x0->usecnt, 0); 2595322810Shselasky mutex_init(&devr->x0->tgt_qp_mutex); 2596322810Shselasky INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 2597322810Shselasky 2598322810Shselasky devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 2599322810Shselasky if (IS_ERR(devr->x1)) { 2600322810Shselasky ret = PTR_ERR(devr->x1); 2601322810Shselasky goto error3; 2602322810Shselasky } 2603322810Shselasky devr->x1->device = &dev->ib_dev; 2604322810Shselasky devr->x1->inode = NULL; 2605322810Shselasky atomic_set(&devr->x1->usecnt, 0); 2606322810Shselasky mutex_init(&devr->x1->tgt_qp_mutex); 2607322810Shselasky INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 2608322810Shselasky 2609322810Shselasky memset(&attr, 0, sizeof(attr)); 2610322810Shselasky attr.attr.max_sge = 1; 2611322810Shselasky attr.attr.max_wr = 1; 2612322810Shselasky attr.srq_type = IB_SRQT_XRC; 2613322810Shselasky attr.ext.xrc.cq = devr->c0; 2614322810Shselasky attr.ext.xrc.xrcd = devr->x0; 2615322810Shselasky 2616322810Shselasky devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 2617322810Shselasky if (IS_ERR(devr->s0)) { 2618322810Shselasky ret = PTR_ERR(devr->s0); 2619322810Shselasky goto error4; 2620322810Shselasky } 2621322810Shselasky devr->s0->device = &dev->ib_dev; 2622322810Shselasky devr->s0->pd = devr->p0; 2623322810Shselasky devr->s0->uobject = NULL; 2624322810Shselasky devr->s0->event_handler = NULL; 2625322810Shselasky devr->s0->srq_context = NULL; 2626322810Shselasky devr->s0->srq_type = IB_SRQT_XRC; 2627331769Shselasky devr->s0->ext.xrc.xrcd = devr->x0; 2628322810Shselasky devr->s0->ext.xrc.cq = devr->c0; 2629322810Shselasky atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 2630322810Shselasky atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 2631322810Shselasky atomic_inc(&devr->p0->usecnt); 2632322810Shselasky atomic_set(&devr->s0->usecnt, 0); 2633322810Shselasky 2634322810Shselasky memset(&attr, 0, sizeof(attr)); 2635322810Shselasky attr.attr.max_sge = 1; 2636322810Shselasky attr.attr.max_wr = 1; 2637322810Shselasky attr.srq_type = IB_SRQT_BASIC; 2638322810Shselasky devr->s1 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 2639322810Shselasky if (IS_ERR(devr->s1)) { 2640322810Shselasky ret = PTR_ERR(devr->s1); 2641322810Shselasky goto error5; 2642322810Shselasky } 2643322810Shselasky devr->s1->device = &dev->ib_dev; 2644322810Shselasky devr->s1->pd = devr->p0; 2645322810Shselasky devr->s1->uobject = NULL; 2646322810Shselasky devr->s1->event_handler = NULL; 2647322810Shselasky devr->s1->srq_context = NULL; 2648322810Shselasky devr->s1->srq_type = IB_SRQT_BASIC; 2649322810Shselasky devr->s1->ext.xrc.cq = devr->c0; 2650322810Shselasky atomic_inc(&devr->p0->usecnt); 2651331769Shselasky atomic_set(&devr->s0->usecnt, 0); 2652322810Shselasky 2653331769Shselasky for (port = 0; port < ARRAY_SIZE(devr->ports); ++port) { 2654331769Shselasky INIT_WORK(&devr->ports[port].pkey_change_work, 2655331769Shselasky pkey_change_handler); 2656331769Shselasky devr->ports[port].devr = devr; 2657331769Shselasky } 2658331769Shselasky 2659322810Shselasky return 0; 2660322810Shselasky 2661322810Shselaskyerror5: 2662322810Shselasky mlx5_ib_destroy_srq(devr->s0); 2663322810Shselaskyerror4: 2664322810Shselasky mlx5_ib_dealloc_xrcd(devr->x1); 2665322810Shselaskyerror3: 2666322810Shselasky mlx5_ib_dealloc_xrcd(devr->x0); 2667322810Shselaskyerror2: 2668322810Shselasky mlx5_ib_destroy_cq(devr->c0); 2669322810Shselaskyerror1: 2670322810Shselasky mlx5_ib_dealloc_pd(devr->p0); 2671322810Shselaskyerror0: 2672322810Shselasky return ret; 2673322810Shselasky} 2674322810Shselasky 2675322810Shselaskystatic void destroy_dev_resources(struct mlx5_ib_resources *devr) 2676322810Shselasky{ 2677331769Shselasky struct mlx5_ib_dev *dev = 2678331769Shselasky container_of(devr, struct mlx5_ib_dev, devr); 2679331769Shselasky int port; 2680331769Shselasky 2681322810Shselasky mlx5_ib_destroy_srq(devr->s1); 2682322810Shselasky mlx5_ib_destroy_srq(devr->s0); 2683322810Shselasky mlx5_ib_dealloc_xrcd(devr->x0); 2684322810Shselasky mlx5_ib_dealloc_xrcd(devr->x1); 2685322810Shselasky mlx5_ib_destroy_cq(devr->c0); 2686322810Shselasky mlx5_ib_dealloc_pd(devr->p0); 2687331769Shselasky 2688331769Shselasky /* Make sure no change P_Key work items are still executing */ 2689331769Shselasky for (port = 0; port < dev->num_ports; ++port) 2690331769Shselasky cancel_work_sync(&devr->ports[port].pkey_change_work); 2691322810Shselasky} 2692322810Shselasky 2693325604Shselaskystatic u32 get_core_cap_flags(struct ib_device *ibdev) 2694325604Shselasky{ 2695325604Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 2696325604Shselasky enum rdma_link_layer ll = mlx5_ib_port_link_layer(ibdev, 1); 2697325604Shselasky u8 l3_type_cap = MLX5_CAP_ROCE(dev->mdev, l3_type); 2698325604Shselasky u8 roce_version_cap = MLX5_CAP_ROCE(dev->mdev, roce_version); 2699325604Shselasky u32 ret = 0; 2700325604Shselasky 2701325604Shselasky if (ll == IB_LINK_LAYER_INFINIBAND) 2702325604Shselasky return RDMA_CORE_PORT_IBA_IB; 2703325604Shselasky 2704325604Shselasky if (!(l3_type_cap & MLX5_ROCE_L3_TYPE_IPV4_CAP)) 2705331769Shselasky return 0; 2706325604Shselasky 2707325604Shselasky if (!(l3_type_cap & MLX5_ROCE_L3_TYPE_IPV6_CAP)) 2708331769Shselasky return 0; 2709325604Shselasky 2710325604Shselasky if (roce_version_cap & MLX5_ROCE_VERSION_1_CAP) 2711325604Shselasky ret |= RDMA_CORE_PORT_IBA_ROCE; 2712325604Shselasky 2713325604Shselasky if (roce_version_cap & MLX5_ROCE_VERSION_2_CAP) 2714325604Shselasky ret |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2715325604Shselasky 2716325604Shselasky return ret; 2717325604Shselasky} 2718325604Shselasky 2719325604Shselaskystatic int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num, 2720325604Shselasky struct ib_port_immutable *immutable) 2721325604Shselasky{ 2722325604Shselasky struct ib_port_attr attr; 2723325604Shselasky int err; 2724325604Shselasky 2725331769Shselasky err = mlx5_ib_query_port(ibdev, port_num, &attr); 2726325604Shselasky if (err) 2727325604Shselasky return err; 2728325604Shselasky 2729325604Shselasky immutable->pkey_tbl_len = attr.pkey_tbl_len; 2730325604Shselasky immutable->gid_tbl_len = attr.gid_tbl_len; 2731325604Shselasky immutable->core_cap_flags = get_core_cap_flags(ibdev); 2732331769Shselasky immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2733325604Shselasky 2734325604Shselasky return 0; 2735325604Shselasky} 2736325604Shselasky 2737331769Shselaskystatic void get_dev_fw_str(struct ib_device *ibdev, char *str, 2738331769Shselasky size_t str_len) 2739322810Shselasky{ 2740331769Shselasky struct mlx5_ib_dev *dev = 2741331769Shselasky container_of(ibdev, struct mlx5_ib_dev, ib_dev); 2742331769Shselasky snprintf(str, str_len, "%d.%d.%04d", fw_rev_maj(dev->mdev), 2743331769Shselasky fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 2744331769Shselasky} 2745322810Shselasky 2746331769Shselaskystatic int mlx5_roce_lag_init(struct mlx5_ib_dev *dev) 2747331769Shselasky{ 2748331769Shselasky return 0; 2749331769Shselasky} 2750322810Shselasky 2751331769Shselaskystatic void mlx5_roce_lag_cleanup(struct mlx5_ib_dev *dev) 2752331769Shselasky{ 2753331769Shselasky} 2754322810Shselasky 2755331769Shselaskystatic void mlx5_remove_roce_notifier(struct mlx5_ib_dev *dev) 2756331769Shselasky{ 2757331769Shselasky if (dev->roce.nb.notifier_call) { 2758331769Shselasky unregister_netdevice_notifier(&dev->roce.nb); 2759331769Shselasky dev->roce.nb.notifier_call = NULL; 2760322810Shselasky } 2761322810Shselasky} 2762322810Shselasky 2763331769Shselaskystatic int mlx5_enable_roce(struct mlx5_ib_dev *dev) 2764322810Shselasky{ 2765331769Shselasky VNET_ITERATOR_DECL(vnet_iter); 2766331769Shselasky struct net_device *idev; 2767322810Shselasky int err; 2768322810Shselasky 2769331769Shselasky /* Check if mlx5en net device already exists */ 2770331769Shselasky VNET_LIST_RLOCK(); 2771331769Shselasky VNET_FOREACH(vnet_iter) { 2772331769Shselasky IFNET_RLOCK(); 2773331769Shselasky CURVNET_SET_QUIET(vnet_iter); 2774331769Shselasky TAILQ_FOREACH(idev, &V_ifnet, if_link) { 2775331769Shselasky /* check if network interface belongs to mlx5en */ 2776331769Shselasky if (!mlx5_netdev_match(idev, dev->mdev, "mce")) 2777331769Shselasky continue; 2778331769Shselasky write_lock(&dev->roce.netdev_lock); 2779331769Shselasky dev->roce.netdev = idev; 2780331769Shselasky write_unlock(&dev->roce.netdev_lock); 2781331769Shselasky } 2782331769Shselasky CURVNET_RESTORE(); 2783331769Shselasky IFNET_RUNLOCK(); 2784331769Shselasky } 2785331769Shselasky VNET_LIST_RUNLOCK(); 2786322810Shselasky 2787331769Shselasky dev->roce.nb.notifier_call = mlx5_netdev_event; 2788331769Shselasky err = register_netdevice_notifier(&dev->roce.nb); 2789322810Shselasky if (err) { 2790331769Shselasky dev->roce.nb.notifier_call = NULL; 2791331769Shselasky return err; 2792322810Shselasky } 2793322810Shselasky 2794331769Shselasky err = mlx5_nic_vport_enable_roce(dev->mdev); 2795331769Shselasky if (err) 2796331769Shselasky goto err_unregister_netdevice_notifier; 2797322810Shselasky 2798331769Shselasky err = mlx5_roce_lag_init(dev); 2799331769Shselasky if (err) 2800331769Shselasky goto err_disable_roce; 2801322810Shselasky 2802331769Shselasky return 0; 2803322810Shselasky 2804331769Shselaskyerr_disable_roce: 2805331769Shselasky mlx5_nic_vport_disable_roce(dev->mdev); 2806322810Shselasky 2807331769Shselaskyerr_unregister_netdevice_notifier: 2808331769Shselasky mlx5_remove_roce_notifier(dev); 2809331769Shselasky return err; 2810322810Shselasky} 2811322810Shselasky 2812331769Shselaskystatic void mlx5_disable_roce(struct mlx5_ib_dev *dev) 2813322810Shselasky{ 2814331769Shselasky mlx5_roce_lag_cleanup(dev); 2815331769Shselasky mlx5_nic_vport_disable_roce(dev->mdev); 2816322810Shselasky} 2817322810Shselasky 2818322810Shselaskystatic void mlx5_ib_dealloc_q_port_counter(struct mlx5_ib_dev *dev, u8 port_num) 2819322810Shselasky{ 2820322810Shselasky mlx5_vport_dealloc_q_counter(dev->mdev, 2821322810Shselasky MLX5_INTERFACE_PROTOCOL_IB, 2822322810Shselasky dev->port[port_num].q_cnt_id); 2823322810Shselasky dev->port[port_num].q_cnt_id = 0; 2824322810Shselasky} 2825322810Shselasky 2826322810Shselaskystatic void mlx5_ib_dealloc_q_counters(struct mlx5_ib_dev *dev) 2827322810Shselasky{ 2828322810Shselasky unsigned int i; 2829322810Shselasky 2830322810Shselasky for (i = 0; i < dev->num_ports; i++) 2831322810Shselasky mlx5_ib_dealloc_q_port_counter(dev, i); 2832322810Shselasky} 2833322810Shselasky 2834322810Shselaskystatic int mlx5_ib_alloc_q_counters(struct mlx5_ib_dev *dev) 2835322810Shselasky{ 2836322810Shselasky int i; 2837322810Shselasky int ret; 2838322810Shselasky 2839322810Shselasky for (i = 0; i < dev->num_ports; i++) { 2840322810Shselasky ret = mlx5_vport_alloc_q_counter(dev->mdev, 2841322810Shselasky MLX5_INTERFACE_PROTOCOL_IB, 2842322810Shselasky &dev->port[i].q_cnt_id); 2843322810Shselasky if (ret) { 2844322810Shselasky mlx5_ib_warn(dev, 2845331769Shselasky "couldn't allocate queue counter for port %d, err %d\n", 2846331769Shselasky i + 1, ret); 2847322810Shselasky goto dealloc_counters; 2848322810Shselasky } 2849322810Shselasky } 2850322810Shselasky 2851322810Shselasky return 0; 2852322810Shselasky 2853322810Shselaskydealloc_counters: 2854322810Shselasky while (--i >= 0) 2855322810Shselasky mlx5_ib_dealloc_q_port_counter(dev, i); 2856322810Shselasky 2857322810Shselasky return ret; 2858322810Shselasky} 2859322810Shselasky 2860331769Shselaskystatic const char * const names[] = { 2861331769Shselasky "rx_write_requests", 2862331769Shselasky "rx_read_requests", 2863331769Shselasky "rx_atomic_requests", 2864331769Shselasky "out_of_buffer", 2865331769Shselasky "out_of_sequence", 2866331769Shselasky "duplicate_request", 2867331769Shselasky "rnr_nak_retry_err", 2868331769Shselasky "packet_seq_err", 2869331769Shselasky "implied_nak_seq_err", 2870331769Shselasky "local_ack_timeout_err", 2871322810Shselasky}; 2872322810Shselasky 2873331769Shselaskystatic const size_t stats_offsets[] = { 2874331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rx_write_requests), 2875331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rx_read_requests), 2876331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rx_atomic_requests), 2877331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, out_of_buffer), 2878331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, out_of_sequence), 2879331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, duplicate_request), 2880331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, rnr_nak_retry_err), 2881331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, packet_seq_err), 2882331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, implied_nak_seq_err), 2883331769Shselasky MLX5_BYTE_OFF(query_q_counter_out, local_ack_timeout_err), 2884322810Shselasky}; 2885322810Shselasky 2886331769Shselaskystatic struct rdma_hw_stats *mlx5_ib_alloc_hw_stats(struct ib_device *ibdev, 2887331769Shselasky u8 port_num) 2888322810Shselasky{ 2889331769Shselasky BUILD_BUG_ON(ARRAY_SIZE(names) != ARRAY_SIZE(stats_offsets)); 2890322810Shselasky 2891331769Shselasky /* We support only per port stats */ 2892331769Shselasky if (port_num == 0) 2893331769Shselasky return NULL; 2894322810Shselasky 2895331769Shselasky return rdma_alloc_hw_stats_struct(names, ARRAY_SIZE(names), 2896331769Shselasky RDMA_HW_STATS_DEFAULT_LIFESPAN); 2897322810Shselasky} 2898322810Shselasky 2899331769Shselaskystatic int mlx5_ib_get_hw_stats(struct ib_device *ibdev, 2900331769Shselasky struct rdma_hw_stats *stats, 2901331769Shselasky u8 port, int index) 2902322810Shselasky{ 2903331769Shselasky struct mlx5_ib_dev *dev = to_mdev(ibdev); 2904322810Shselasky int outlen = MLX5_ST_SZ_BYTES(query_q_counter_out); 2905322810Shselasky void *out; 2906331769Shselasky __be32 val; 2907322810Shselasky int ret; 2908331769Shselasky int i; 2909322810Shselasky 2910331769Shselasky if (!port || !stats) 2911331769Shselasky return -ENOSYS; 2912331769Shselasky 2913322810Shselasky out = mlx5_vzalloc(outlen); 2914322810Shselasky if (!out) 2915322810Shselasky return -ENOMEM; 2916322810Shselasky 2917331769Shselasky ret = mlx5_vport_query_q_counter(dev->mdev, 2918331769Shselasky dev->port[port - 1].q_cnt_id, 0, 2919331769Shselasky out, outlen); 2920322810Shselasky if (ret) 2921322810Shselasky goto free; 2922322810Shselasky 2923331769Shselasky for (i = 0; i < ARRAY_SIZE(names); i++) { 2924331769Shselasky val = *(__be32 *)(out + stats_offsets[i]); 2925331769Shselasky stats->value[i] = (u64)be32_to_cpu(val); 2926331769Shselasky } 2927322810Shselaskyfree: 2928331769Shselasky kvfree(out); 2929331769Shselasky return ARRAY_SIZE(names); 2930322810Shselasky} 2931322810Shselasky 2932322810Shselaskystatic void *mlx5_ib_add(struct mlx5_core_dev *mdev) 2933322810Shselasky{ 2934322810Shselasky struct mlx5_ib_dev *dev; 2935331769Shselasky enum rdma_link_layer ll; 2936331769Shselasky int port_type_cap; 2937331769Shselasky const char *name; 2938322810Shselasky int err; 2939322810Shselasky int i; 2940322810Shselasky 2941331769Shselasky port_type_cap = MLX5_CAP_GEN(mdev, port_type); 2942331769Shselasky ll = mlx5_port_type_cap_to_rdma_ll(port_type_cap); 2943331769Shselasky 2944331769Shselasky if ((ll == IB_LINK_LAYER_ETHERNET) && !MLX5_CAP_GEN(mdev, roce)) 2945331769Shselasky return NULL; 2946331769Shselasky 2947322810Shselasky printk_once(KERN_INFO "%s", mlx5_version); 2948322810Shselasky 2949322810Shselasky dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 2950322810Shselasky if (!dev) 2951322810Shselasky return NULL; 2952322810Shselasky 2953322810Shselasky dev->mdev = mdev; 2954322810Shselasky 2955322810Shselasky dev->port = kcalloc(MLX5_CAP_GEN(mdev, num_ports), sizeof(*dev->port), 2956331769Shselasky GFP_KERNEL); 2957322810Shselasky if (!dev->port) 2958322810Shselasky goto err_dealloc; 2959322810Shselasky 2960331769Shselasky rwlock_init(&dev->roce.netdev_lock); 2961322810Shselasky err = get_port_caps(dev); 2962322810Shselasky if (err) 2963322810Shselasky goto err_free_port; 2964322810Shselasky 2965322810Shselasky if (mlx5_use_mad_ifc(dev)) 2966322810Shselasky get_ext_port_caps(dev); 2967322810Shselasky 2968322810Shselasky MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 2969322810Shselasky 2970331769Shselasky name = "mlx5_%d"; 2971331769Shselasky 2972331769Shselasky strlcpy(dev->ib_dev.name, name, IB_DEVICE_NAME_MAX); 2973322810Shselasky dev->ib_dev.owner = THIS_MODULE; 2974322810Shselasky dev->ib_dev.node_type = RDMA_NODE_IB_CA; 2975331769Shselasky dev->ib_dev.local_dma_lkey = 0 /* not supported for now */; 2976322810Shselasky dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); 2977322810Shselasky dev->ib_dev.phys_port_cnt = dev->num_ports; 2978322810Shselasky dev->ib_dev.num_comp_vectors = 2979322810Shselasky dev->mdev->priv.eq_table.num_comp_vectors; 2980322810Shselasky dev->ib_dev.dma_device = &mdev->pdev->dev; 2981322810Shselasky 2982322810Shselasky dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 2983322810Shselasky dev->ib_dev.uverbs_cmd_mask = 2984322810Shselasky (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2985322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2986322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2987322810Shselasky (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2988322810Shselasky (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2989331784Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 2990331784Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_AH) | 2991322810Shselasky (1ull << IB_USER_VERBS_CMD_REG_MR) | 2992331769Shselasky (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2993322810Shselasky (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2994322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2995322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2996322810Shselasky (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2997322810Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2998322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2999322810Shselasky (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 3000322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 3001322810Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 3002322810Shselasky (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 3003322810Shselasky (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 3004322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 3005322810Shselasky (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 3006322810Shselasky (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 3007322810Shselasky (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 3008322810Shselasky (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 3009322810Shselasky (1ull << IB_USER_VERBS_CMD_OPEN_QP); 3010331769Shselasky dev->ib_dev.uverbs_ex_cmd_mask = 3011331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 3012331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 3013331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 3014322810Shselasky 3015322810Shselasky dev->ib_dev.query_device = mlx5_ib_query_device; 3016322810Shselasky dev->ib_dev.query_port = mlx5_ib_query_port; 3017322810Shselasky dev->ib_dev.get_link_layer = mlx5_ib_port_link_layer; 3018331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) 3019331769Shselasky dev->ib_dev.get_netdev = mlx5_ib_get_netdev; 3020322810Shselasky dev->ib_dev.query_gid = mlx5_ib_query_gid; 3021331769Shselasky dev->ib_dev.add_gid = mlx5_ib_add_gid; 3022331769Shselasky dev->ib_dev.del_gid = mlx5_ib_del_gid; 3023322810Shselasky dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 3024322810Shselasky dev->ib_dev.modify_device = mlx5_ib_modify_device; 3025322810Shselasky dev->ib_dev.modify_port = mlx5_ib_modify_port; 3026322810Shselasky dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 3027322810Shselasky dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 3028322810Shselasky dev->ib_dev.mmap = mlx5_ib_mmap; 3029322810Shselasky dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 3030322810Shselasky dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 3031322810Shselasky dev->ib_dev.create_ah = mlx5_ib_create_ah; 3032322810Shselasky dev->ib_dev.query_ah = mlx5_ib_query_ah; 3033322810Shselasky dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 3034322810Shselasky dev->ib_dev.create_srq = mlx5_ib_create_srq; 3035322810Shselasky dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 3036322810Shselasky dev->ib_dev.query_srq = mlx5_ib_query_srq; 3037322810Shselasky dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 3038322810Shselasky dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 3039322810Shselasky dev->ib_dev.create_qp = mlx5_ib_create_qp; 3040322810Shselasky dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 3041322810Shselasky dev->ib_dev.query_qp = mlx5_ib_query_qp; 3042322810Shselasky dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 3043322810Shselasky dev->ib_dev.post_send = mlx5_ib_post_send; 3044322810Shselasky dev->ib_dev.post_recv = mlx5_ib_post_recv; 3045322810Shselasky dev->ib_dev.create_cq = mlx5_ib_create_cq; 3046322810Shselasky dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 3047322810Shselasky dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 3048322810Shselasky dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 3049322810Shselasky dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 3050322810Shselasky dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 3051322810Shselasky dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 3052322810Shselasky dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 3053331769Shselasky dev->ib_dev.rereg_user_mr = mlx5_ib_rereg_user_mr; 3054322810Shselasky dev->ib_dev.reg_phys_mr = mlx5_ib_reg_phys_mr; 3055322810Shselasky dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 3056322810Shselasky dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 3057322810Shselasky dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 3058322810Shselasky dev->ib_dev.process_mad = mlx5_ib_process_mad; 3059331769Shselasky dev->ib_dev.alloc_mr = mlx5_ib_alloc_mr; 3060331769Shselasky dev->ib_dev.map_mr_sg = mlx5_ib_map_mr_sg; 3061331769Shselasky dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 3062325604Shselasky dev->ib_dev.get_port_immutable = mlx5_port_immutable; 3063331769Shselasky dev->ib_dev.get_dev_fw_str = get_dev_fw_str; 3064331769Shselasky if (mlx5_core_is_pf(mdev)) { 3065331769Shselasky dev->ib_dev.get_vf_config = mlx5_ib_get_vf_config; 3066331769Shselasky dev->ib_dev.set_vf_link_state = mlx5_ib_set_vf_link_state; 3067331769Shselasky dev->ib_dev.get_vf_stats = mlx5_ib_get_vf_stats; 3068331769Shselasky dev->ib_dev.set_vf_guid = mlx5_ib_set_vf_guid; 3069331769Shselasky } 3070322810Shselasky 3071331769Shselasky mlx5_ib_internal_fill_odp_caps(dev); 3072331769Shselasky 3073331769Shselasky if (MLX5_CAP_GEN(mdev, imaicl)) { 3074331769Shselasky dev->ib_dev.alloc_mw = mlx5_ib_alloc_mw; 3075331769Shselasky dev->ib_dev.dealloc_mw = mlx5_ib_dealloc_mw; 3076331769Shselasky dev->ib_dev.uverbs_cmd_mask |= 3077331769Shselasky (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 3078331769Shselasky (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 3079331769Shselasky } 3080331769Shselasky 3081331769Shselasky if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt) && 3082331769Shselasky MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) { 3083331769Shselasky dev->ib_dev.get_hw_stats = mlx5_ib_get_hw_stats; 3084331769Shselasky dev->ib_dev.alloc_hw_stats = mlx5_ib_alloc_hw_stats; 3085331769Shselasky } 3086331769Shselasky 3087322810Shselasky if (MLX5_CAP_GEN(mdev, xrc)) { 3088322810Shselasky dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 3089322810Shselasky dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 3090322810Shselasky dev->ib_dev.uverbs_cmd_mask |= 3091322810Shselasky (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 3092322810Shselasky (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 3093322810Shselasky } 3094322810Shselasky 3095331769Shselasky if (mlx5_ib_port_link_layer(&dev->ib_dev, 1) == 3096331769Shselasky IB_LINK_LAYER_ETHERNET) { 3097331769Shselasky dev->ib_dev.create_flow = mlx5_ib_create_flow; 3098331769Shselasky dev->ib_dev.destroy_flow = mlx5_ib_destroy_flow; 3099331769Shselasky dev->ib_dev.create_wq = mlx5_ib_create_wq; 3100331769Shselasky dev->ib_dev.modify_wq = mlx5_ib_modify_wq; 3101331769Shselasky dev->ib_dev.destroy_wq = mlx5_ib_destroy_wq; 3102331769Shselasky dev->ib_dev.create_rwq_ind_table = mlx5_ib_create_rwq_ind_table; 3103331769Shselasky dev->ib_dev.destroy_rwq_ind_table = mlx5_ib_destroy_rwq_ind_table; 3104331769Shselasky dev->ib_dev.uverbs_ex_cmd_mask |= 3105331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 3106331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW) | 3107331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) | 3108331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) | 3109331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) | 3110331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) | 3111331769Shselasky (1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL); 3112331769Shselasky } 3113322810Shselasky err = init_node_data(dev); 3114322810Shselasky if (err) 3115331769Shselasky goto err_free_port; 3116322810Shselasky 3117331769Shselasky mutex_init(&dev->flow_db.lock); 3118322810Shselasky mutex_init(&dev->cap_mask_mutex); 3119322810Shselasky INIT_LIST_HEAD(&dev->qp_list); 3120322810Shselasky spin_lock_init(&dev->reset_flow_resource_lock); 3121322810Shselasky 3122331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) { 3123331769Shselasky err = mlx5_enable_roce(dev); 3124331769Shselasky if (err) 3125331769Shselasky goto err_free_port; 3126331769Shselasky } 3127331769Shselasky 3128322810Shselasky err = create_dev_resources(&dev->devr); 3129322810Shselasky if (err) 3130322810Shselasky goto err_disable_roce; 3131322810Shselasky 3132331769Shselasky err = mlx5_ib_odp_init_one(dev); 3133331769Shselasky if (err) 3134331769Shselasky goto err_rsrc; 3135322810Shselasky 3136322810Shselasky err = mlx5_ib_alloc_q_counters(dev); 3137322810Shselasky if (err) 3138322810Shselasky goto err_odp; 3139322810Shselasky 3140322810Shselasky err = ib_register_device(&dev->ib_dev, NULL); 3141322810Shselasky if (err) 3142322810Shselasky goto err_q_cnt; 3143322810Shselasky 3144322810Shselasky err = create_umr_res(dev); 3145322810Shselasky if (err) 3146322810Shselasky goto err_dev; 3147322810Shselasky 3148322810Shselasky for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 3149322810Shselasky err = device_create_file(&dev->ib_dev.dev, 3150322810Shselasky mlx5_class_attributes[i]); 3151322810Shselasky if (err) 3152331769Shselasky goto err_umrc; 3153322810Shselasky } 3154322810Shselasky 3155331808Shselasky err = mlx5_ib_init_congestion(dev); 3156331808Shselasky if (err) 3157331808Shselasky goto err_umrc; 3158331808Shselasky 3159322810Shselasky dev->ib_active = true; 3160322810Shselasky 3161322810Shselasky return dev; 3162322810Shselasky 3163331769Shselaskyerr_umrc: 3164322810Shselasky destroy_umrc_res(dev); 3165322810Shselasky 3166322810Shselaskyerr_dev: 3167322810Shselasky ib_unregister_device(&dev->ib_dev); 3168322810Shselasky 3169322810Shselaskyerr_q_cnt: 3170322810Shselasky mlx5_ib_dealloc_q_counters(dev); 3171322810Shselasky 3172322810Shselaskyerr_odp: 3173331769Shselasky mlx5_ib_odp_remove_one(dev); 3174331769Shselasky 3175331769Shselaskyerr_rsrc: 3176322810Shselasky destroy_dev_resources(&dev->devr); 3177322810Shselasky 3178322810Shselaskyerr_disable_roce: 3179331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) { 3180331769Shselasky mlx5_disable_roce(dev); 3181331769Shselasky mlx5_remove_roce_notifier(dev); 3182331769Shselasky } 3183331769Shselasky 3184322810Shselaskyerr_free_port: 3185322810Shselasky kfree(dev->port); 3186322810Shselasky 3187322810Shselaskyerr_dealloc: 3188322810Shselasky ib_dealloc_device((struct ib_device *)dev); 3189322810Shselasky 3190322810Shselasky return NULL; 3191322810Shselasky} 3192322810Shselasky 3193322810Shselaskystatic void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 3194322810Shselasky{ 3195322810Shselasky struct mlx5_ib_dev *dev = context; 3196331769Shselasky enum rdma_link_layer ll = mlx5_ib_port_link_layer(&dev->ib_dev, 1); 3197322810Shselasky 3198331808Shselasky mlx5_ib_cleanup_congestion(dev); 3199331769Shselasky mlx5_remove_roce_notifier(dev); 3200331769Shselasky ib_unregister_device(&dev->ib_dev); 3201322810Shselasky mlx5_ib_dealloc_q_counters(dev); 3202322810Shselasky destroy_umrc_res(dev); 3203331769Shselasky mlx5_ib_odp_remove_one(dev); 3204322810Shselasky destroy_dev_resources(&dev->devr); 3205331769Shselasky if (ll == IB_LINK_LAYER_ETHERNET) 3206331769Shselasky mlx5_disable_roce(dev); 3207322810Shselasky kfree(dev->port); 3208322810Shselasky ib_dealloc_device(&dev->ib_dev); 3209322810Shselasky} 3210322810Shselasky 3211322810Shselaskystatic struct mlx5_interface mlx5_ib_interface = { 3212322810Shselasky .add = mlx5_ib_add, 3213322810Shselasky .remove = mlx5_ib_remove, 3214322810Shselasky .event = mlx5_ib_event, 3215322810Shselasky .protocol = MLX5_INTERFACE_PROTOCOL_IB, 3216322810Shselasky}; 3217322810Shselasky 3218322810Shselaskystatic int __init mlx5_ib_init(void) 3219322810Shselasky{ 3220322810Shselasky int err; 3221322810Shselasky 3222322810Shselasky if (deprecated_prof_sel != 2) 3223331769Shselasky pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); 3224322810Shselasky 3225331769Shselasky err = mlx5_ib_odp_init(); 3226331769Shselasky if (err) 3227331769Shselasky return err; 3228331769Shselasky 3229322810Shselasky err = mlx5_register_interface(&mlx5_ib_interface); 3230322810Shselasky if (err) 3231322810Shselasky goto clean_odp; 3232322810Shselasky 3233322810Shselasky return err; 3234322810Shselasky 3235322810Shselaskyclean_odp: 3236331769Shselasky mlx5_ib_odp_cleanup(); 3237322810Shselasky return err; 3238322810Shselasky} 3239322810Shselasky 3240322810Shselaskystatic void __exit mlx5_ib_cleanup(void) 3241322810Shselasky{ 3242322810Shselasky mlx5_unregister_interface(&mlx5_ib_interface); 3243331769Shselasky mlx5_ib_odp_cleanup(); 3244322810Shselasky} 3245322810Shselasky 3246322810Shselaskymodule_init_order(mlx5_ib_init, SI_ORDER_THIRD); 3247322810Shselaskymodule_exit_order(mlx5_ib_cleanup, SI_ORDER_THIRD); 3248