1/* 2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34#include <linux/slab.h> 35#include <linux/module.h> 36#include <linux/sched.h> 37 38#include <asm/atomic64.h> 39 40#include "mlx4_ib.h" 41 42static u32 convert_access(int acc) 43{ 44 return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC : 0) | 45 (acc & IB_ACCESS_REMOTE_WRITE ? MLX4_PERM_REMOTE_WRITE : 0) | 46 (acc & IB_ACCESS_REMOTE_READ ? MLX4_PERM_REMOTE_READ : 0) | 47 (acc & IB_ACCESS_LOCAL_WRITE ? MLX4_PERM_LOCAL_WRITE : 0) | 48 (acc & IB_ACCESS_MW_BIND ? MLX4_PERM_BIND_MW : 0) | 49 MLX4_PERM_LOCAL_READ; 50} 51 52static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type) 53{ 54 switch (type) { 55 case IB_MW_TYPE_1: return MLX4_MW_TYPE_1; 56 case IB_MW_TYPE_2: return MLX4_MW_TYPE_2; 57 default: return -1; 58 } 59} 60 61struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc) 62{ 63 struct mlx4_ib_mr *mr; 64 int err; 65 66 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 67 if (!mr) 68 return ERR_PTR(-ENOMEM); 69 70 err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0, 71 ~0ull, convert_access(acc), 0, 0, &mr->mmr); 72 if (err) 73 goto err_free; 74 75 err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr); 76 if (err) 77 goto err_mr; 78 79 mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key; 80 mr->umem = NULL; 81 82 return &mr->ibmr; 83 84err_mr: 85 (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr); 86 87err_free: 88 kfree(mr); 89 90 return ERR_PTR(err); 91} 92 93int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt, 94 struct ib_umem *umem) 95{ 96 u64 *pages; 97 int i, k, entry; 98 int n; 99 int len; 100 int err = 0; 101 struct scatterlist *sg; 102 103 pages = (u64 *) __get_free_page(GFP_KERNEL); 104 if (!pages) 105 return -ENOMEM; 106 107 i = n = 0; 108 109 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { 110 len = sg_dma_len(sg) >> mtt->page_shift; 111 for (k = 0; k < len; ++k) { 112 pages[i++] = sg_dma_address(sg) + 113 umem->page_size * k; 114 /* 115 * Be friendly to mlx4_write_mtt() and 116 * pass it chunks of appropriate size. 117 */ 118 if (i == PAGE_SIZE / sizeof (u64)) { 119 err = mlx4_write_mtt(dev->dev, mtt, n, 120 i, pages); 121 if (err) 122 goto out; 123 n += i; 124 i = 0; 125 } 126 } 127 } 128 129 if (i) 130 err = mlx4_write_mtt(dev->dev, mtt, n, i, pages); 131 132out: 133 free_page((unsigned long) pages); 134 return err; 135} 136 137struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, 138 u64 virt_addr, int access_flags, 139 struct ib_udata *udata) 140{ 141 struct mlx4_ib_dev *dev = to_mdev(pd->device); 142 struct mlx4_ib_mr *mr; 143 int shift; 144 int err; 145 int n; 146 147 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 148 if (!mr) 149 return ERR_PTR(-ENOMEM); 150 151 /* Force registering the memory as writable. */ 152 /* Used for memory re-registeration. HCA protects the access */ 153 mr->umem = ib_umem_get(pd->uobject->context, start, length, 154 access_flags | IB_ACCESS_LOCAL_WRITE, 0); 155 if (IS_ERR(mr->umem)) { 156 err = PTR_ERR(mr->umem); 157 goto err_free; 158 } 159 160 n = ib_umem_page_count(mr->umem); 161 shift = ilog2(mr->umem->page_size); 162 163 err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length, 164 convert_access(access_flags), n, shift, &mr->mmr); 165 if (err) 166 goto err_umem; 167 168 err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem); 169 if (err) 170 goto err_mr; 171 172 err = mlx4_mr_enable(dev->dev, &mr->mmr); 173 if (err) 174 goto err_mr; 175 176 mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key; 177 178 return &mr->ibmr; 179 180err_mr: 181 (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr); 182 183err_umem: 184 ib_umem_release(mr->umem); 185 186err_free: 187 kfree(mr); 188 189 return ERR_PTR(err); 190} 191 192int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, 193 u64 start, u64 length, u64 virt_addr, 194 int mr_access_flags, struct ib_pd *pd, 195 struct ib_udata *udata) 196{ 197 struct mlx4_ib_dev *dev = to_mdev(mr->device); 198 struct mlx4_ib_mr *mmr = to_mmr(mr); 199 struct mlx4_mpt_entry *mpt_entry; 200 struct mlx4_mpt_entry **pmpt_entry = &mpt_entry; 201 int err; 202 203 /* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs, 204 * we assume that the calls can't run concurrently. Otherwise, a 205 * race exists. 206 */ 207 err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry); 208 209 if (err) 210 return err; 211 212 if (flags & IB_MR_REREG_PD) { 213 err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry, 214 to_mpd(pd)->pdn); 215 216 if (err) 217 goto release_mpt_entry; 218 } 219 220 if (flags & IB_MR_REREG_ACCESS) { 221 err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry, 222 convert_access(mr_access_flags)); 223 224 if (err) 225 goto release_mpt_entry; 226 } 227 228 if (flags & IB_MR_REREG_TRANS) { 229 int shift; 230 int n; 231 232 mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr); 233 ib_umem_release(mmr->umem); 234 mmr->umem = ib_umem_get(mr->uobject->context, start, length, 235 mr_access_flags | 236 IB_ACCESS_LOCAL_WRITE, 237 0); 238 if (IS_ERR(mmr->umem)) { 239 err = PTR_ERR(mmr->umem); 240 /* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */ 241 mmr->umem = NULL; 242 goto release_mpt_entry; 243 } 244 n = ib_umem_page_count(mmr->umem); 245 shift = ilog2(mmr->umem->page_size); 246 247 err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr, 248 virt_addr, length, n, shift, 249 *pmpt_entry); 250 if (err) { 251 ib_umem_release(mmr->umem); 252 goto release_mpt_entry; 253 } 254 mmr->mmr.iova = virt_addr; 255 mmr->mmr.size = length; 256 257 err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem); 258 if (err) { 259 mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr); 260 ib_umem_release(mmr->umem); 261 goto release_mpt_entry; 262 } 263 } 264 265 /* If we couldn't transfer the MR to the HCA, just remember to 266 * return a failure. But dereg_mr will free the resources. 267 */ 268 err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry); 269 if (!err && flags & IB_MR_REREG_ACCESS) 270 mmr->mmr.access = mr_access_flags; 271 272release_mpt_entry: 273 mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry); 274 275 return err; 276} 277 278static int 279mlx4_alloc_priv_pages(struct ib_device *device, 280 struct mlx4_ib_mr *mr, 281 int max_pages) 282{ 283 int ret; 284 285 /* Ensure that size is aligned to DMA cacheline 286 * requirements. 287 * max_pages is limited to MLX4_MAX_FAST_REG_PAGES 288 * so page_map_size will never cross PAGE_SIZE. 289 */ 290 mr->page_map_size = roundup(max_pages * sizeof(u64), 291 MLX4_MR_PAGES_ALIGN); 292 293 /* Prevent cross page boundary allocation. */ 294 mr->pages = (__be64 *)get_zeroed_page(GFP_KERNEL); 295 if (!mr->pages) 296 return -ENOMEM; 297 298 mr->page_map = dma_map_single(device->dma_device, mr->pages, 299 mr->page_map_size, DMA_TO_DEVICE); 300 301 if (dma_mapping_error(device->dma_device, mr->page_map)) { 302 ret = -ENOMEM; 303 goto err; 304 } 305 306 return 0; 307 308err: 309 free_page((unsigned long)mr->pages); 310 return ret; 311} 312 313static void 314mlx4_free_priv_pages(struct mlx4_ib_mr *mr) 315{ 316 if (mr->pages) { 317 struct ib_device *device = mr->ibmr.device; 318 319 dma_unmap_single(device->dma_device, mr->page_map, 320 mr->page_map_size, DMA_TO_DEVICE); 321 free_page((unsigned long)mr->pages); 322 mr->pages = NULL; 323 } 324} 325 326int mlx4_ib_dereg_mr(struct ib_mr *ibmr) 327{ 328 struct mlx4_ib_mr *mr = to_mmr(ibmr); 329 int ret; 330 331 mlx4_free_priv_pages(mr); 332 333 ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr); 334 if (ret) 335 return ret; 336 if (mr->umem) 337 ib_umem_release(mr->umem); 338 kfree(mr); 339 340 return 0; 341} 342 343struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type, 344 struct ib_udata *udata) 345{ 346 struct mlx4_ib_dev *dev = to_mdev(pd->device); 347 struct mlx4_ib_mw *mw; 348 int err; 349 350 mw = kmalloc(sizeof(*mw), GFP_KERNEL); 351 if (!mw) 352 return ERR_PTR(-ENOMEM); 353 354 err = mlx4_mw_alloc(dev->dev, to_mpd(pd)->pdn, 355 to_mlx4_type(type), &mw->mmw); 356 if (err) 357 goto err_free; 358 359 err = mlx4_mw_enable(dev->dev, &mw->mmw); 360 if (err) 361 goto err_mw; 362 363 mw->ibmw.rkey = mw->mmw.key; 364 365 return &mw->ibmw; 366 367err_mw: 368 mlx4_mw_free(dev->dev, &mw->mmw); 369 370err_free: 371 kfree(mw); 372 373 return ERR_PTR(err); 374} 375 376int mlx4_ib_dealloc_mw(struct ib_mw *ibmw) 377{ 378 struct mlx4_ib_mw *mw = to_mmw(ibmw); 379 380 mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw); 381 kfree(mw); 382 383 return 0; 384} 385 386struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd, 387 enum ib_mr_type mr_type, 388 u32 max_num_sg) 389{ 390 struct mlx4_ib_dev *dev = to_mdev(pd->device); 391 struct mlx4_ib_mr *mr; 392 int err; 393 394 if (mr_type != IB_MR_TYPE_MEM_REG || 395 max_num_sg > MLX4_MAX_FAST_REG_PAGES) 396 return ERR_PTR(-EINVAL); 397 398 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 399 if (!mr) 400 return ERR_PTR(-ENOMEM); 401 402 err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0, 403 max_num_sg, 0, &mr->mmr); 404 if (err) 405 goto err_free; 406 407 err = mlx4_alloc_priv_pages(pd->device, mr, max_num_sg); 408 if (err) 409 goto err_free_mr; 410 411 mr->max_pages = max_num_sg; 412 413 err = mlx4_mr_enable(dev->dev, &mr->mmr); 414 if (err) 415 goto err_free_pl; 416 417 mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key; 418 mr->umem = NULL; 419 420 return &mr->ibmr; 421 422err_free_pl: 423 mlx4_free_priv_pages(mr); 424err_free_mr: 425 (void) mlx4_mr_free(dev->dev, &mr->mmr); 426err_free: 427 kfree(mr); 428 return ERR_PTR(err); 429} 430 431struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int acc, 432 struct ib_fmr_attr *fmr_attr) 433{ 434 struct mlx4_ib_dev *dev = to_mdev(pd->device); 435 struct mlx4_ib_fmr *fmr; 436 int err = -ENOMEM; 437 438 fmr = kmalloc(sizeof *fmr, GFP_KERNEL); 439 if (!fmr) 440 return ERR_PTR(-ENOMEM); 441 442 err = mlx4_fmr_alloc(dev->dev, to_mpd(pd)->pdn, convert_access(acc), 443 fmr_attr->max_pages, fmr_attr->max_maps, 444 fmr_attr->page_shift, &fmr->mfmr); 445 if (err) 446 goto err_free; 447 448 err = mlx4_fmr_enable(to_mdev(pd->device)->dev, &fmr->mfmr); 449 if (err) 450 goto err_mr; 451 452 fmr->ibfmr.rkey = fmr->ibfmr.lkey = fmr->mfmr.mr.key; 453 454 return &fmr->ibfmr; 455 456err_mr: 457 (void) mlx4_mr_free(to_mdev(pd->device)->dev, &fmr->mfmr.mr); 458 459err_free: 460 kfree(fmr); 461 462 return ERR_PTR(err); 463} 464 465int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, 466 int npages, u64 iova) 467{ 468 struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr); 469 struct mlx4_ib_dev *dev = to_mdev(ifmr->ibfmr.device); 470 471 return mlx4_map_phys_fmr(dev->dev, &ifmr->mfmr, page_list, npages, iova, 472 &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey); 473} 474 475int mlx4_ib_unmap_fmr(struct list_head *fmr_list) 476{ 477 struct ib_fmr *ibfmr; 478 int err; 479 struct mlx4_dev *mdev = NULL; 480 481 list_for_each_entry(ibfmr, fmr_list, list) { 482 if (mdev && to_mdev(ibfmr->device)->dev != mdev) 483 return -EINVAL; 484 mdev = to_mdev(ibfmr->device)->dev; 485 } 486 487 if (!mdev) 488 return 0; 489 490 list_for_each_entry(ibfmr, fmr_list, list) { 491 struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr); 492 493 mlx4_fmr_unmap(mdev, &ifmr->mfmr, &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey); 494 } 495 496 /* 497 * Make sure all MPT status updates are visible before issuing 498 * SYNC_TPT firmware command. 499 */ 500 wmb(); 501 502 err = mlx4_SYNC_TPT(mdev); 503 if (err) 504 pr_warn("SYNC_TPT error %d when " 505 "unmapping FMRs\n", err); 506 507 return 0; 508} 509 510int mlx4_ib_fmr_dealloc(struct ib_fmr *ibfmr) 511{ 512 struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr); 513 struct mlx4_ib_dev *dev = to_mdev(ibfmr->device); 514 int err; 515 516 err = mlx4_fmr_free(dev->dev, &ifmr->mfmr); 517 518 if (!err) 519 kfree(ifmr); 520 521 return err; 522} 523 524static int mlx4_set_page(struct ib_mr *ibmr, u64 addr) 525{ 526 struct mlx4_ib_mr *mr = to_mmr(ibmr); 527 528 if (unlikely(mr->npages == mr->max_pages)) 529 return -ENOMEM; 530 531 mr->pages[mr->npages++] = cpu_to_be64(addr | MLX4_MTT_FLAG_PRESENT); 532 533 return 0; 534} 535 536int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, 537 unsigned int *sg_offset) 538{ 539 struct mlx4_ib_mr *mr = to_mmr(ibmr); 540 int rc; 541 542 mr->npages = 0; 543 544 ib_dma_sync_single_for_cpu(ibmr->device, mr->page_map, 545 mr->page_map_size, DMA_TO_DEVICE); 546 547 rc = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, mlx4_set_page); 548 549 ib_dma_sync_single_for_device(ibmr->device, mr->page_map, 550 mr->page_map_size, DMA_TO_DEVICE); 551 552 return rc; 553} 554 555CTASSERT(sizeof(((struct ib_phys_buf *)0)->size) == 8); 556 557struct ib_mr * 558mlx4_ib_reg_phys_mr(struct ib_pd *pd, 559 struct ib_phys_buf *buffer_list, 560 int num_phys_buf, 561 int access_flags, 562 u64 *virt_addr) 563{ 564 struct mlx4_ib_dev *dev = to_mdev(pd->device); 565 struct mlx4_ib_mr *mr; 566 u64 *pages; 567 u64 total_size; 568 unsigned long mask; 569 int shift; 570 int npages; 571 int err; 572 int i, j, n; 573 574 mask = buffer_list[0].addr ^ *virt_addr; 575 total_size = 0; 576 for (i = 0; i < num_phys_buf; ++i) { 577 if (i != 0) 578 mask |= buffer_list[i].addr; 579 if (i != num_phys_buf - 1) 580 mask |= buffer_list[i].addr + buffer_list[i].size; 581 582 total_size += buffer_list[i].size; 583 } 584 585 if (mask & ~PAGE_MASK) 586 return ERR_PTR(-EINVAL); 587 588 shift = __ffs(mask | 1 << 31); 589 590 buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1); 591 buffer_list[0].addr &= ~0ULL << shift; 592 593 npages = 0; 594 for (i = 0; i < num_phys_buf; ++i) 595 npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift; 596 597 if (!npages) 598 return ERR_PTR(-EINVAL); 599 600 mr = kzalloc(sizeof *mr, GFP_KERNEL); 601 if (!mr) 602 return ERR_PTR(-ENOMEM); 603 604 pages = kzalloc(sizeof(pages[0]) * npages, GFP_KERNEL); 605 if (!pages) { 606 kfree(mr); 607 return ERR_PTR(-ENOMEM); 608 } 609 610 err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, *virt_addr, total_size, 611 convert_access(access_flags), npages, shift, &mr->mmr); 612 if (err) { 613 kfree(mr); 614 kfree(pages); 615 return ERR_PTR(err); 616 } 617 618 n = 0; 619 for (i = 0; i < num_phys_buf; ++i) { 620 for (j = 0; 621 j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift; 622 ++j) { 623 u64 temp = buffer_list[i].addr + ((u64) j << shift); 624 pages[n++] = temp; 625 } 626 } 627 628 mr->npages = npages; 629 mr->max_pages = npages; 630 631 err = mlx4_write_mtt(dev->dev, &mr->mmr.mtt, 0, npages, pages); 632 if (err) 633 goto err_mr; 634 635 err = mlx4_mr_enable(dev->dev, &mr->mmr); 636 if (err) 637 goto err_mr; 638 639 mr->umem = NULL; 640 mr->ibmr.lkey = mr->mmr.key; 641 mr->ibmr.rkey = mr->mmr.key; 642 mr->ibmr.length = total_size; 643 644 kfree(pages); 645 646 return &mr->ibmr; 647 648err_mr: 649 (void) mlx4_mr_free(dev->dev, &mr->mmr); 650 kfree(mr); 651 kfree(pages); 652 653 return ERR_PTR(err); 654} 655