1/* 2 * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33#define LINUXKPI_PARAM_PREFIX mlx4_ 34 35#include <linux/errno.h> 36#include <linux/if_ether.h> 37#include <linux/module.h> 38#include <linux/err.h> 39 40#include <dev/mlx4/cmd.h> 41#include <linux/moduleparam.h> 42 43#include <rdma/ib_verbs.h> 44 45#include "mlx4.h" 46#include <dev/mlx4/stats.h> 47 48#define MLX4_MAC_VALID (1ull << 63) 49 50#define MLX4_VLAN_VALID (1u << 31) 51#define MLX4_VLAN_MASK 0xfff 52 53#define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL 54#define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL 55#define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL 56#define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL 57 58#define MLX4_FLAG_V_IGNORE_FCS_MASK 0x2 59#define MLX4_IGNORE_FCS_MASK 0x1 60#define MLX4_TC_MAX_NUMBER 8 61 62void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table) 63{ 64 int i; 65 66 mutex_init(&table->mutex); 67 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 68 table->entries[i] = 0; 69 table->refs[i] = 0; 70 table->is_dup[i] = false; 71 } 72 table->max = 1 << dev->caps.log_num_macs; 73 table->total = 0; 74} 75 76void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table) 77{ 78 int i; 79 80 mutex_init(&table->mutex); 81 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 82 table->entries[i] = 0; 83 table->refs[i] = 0; 84 table->is_dup[i] = false; 85 } 86 table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR; 87 table->total = 0; 88} 89 90void mlx4_init_roce_gid_table(struct mlx4_dev *dev, 91 struct mlx4_roce_gid_table *table) 92{ 93 int i; 94 95 mutex_init(&table->mutex); 96 for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) 97 memset(table->roce_gids[i].raw, 0, MLX4_ROCE_GID_ENTRY_SIZE); 98} 99 100static int validate_index(struct mlx4_dev *dev, 101 struct mlx4_mac_table *table, int index) 102{ 103 int err = 0; 104 105 if (index < 0 || index >= table->max || !table->entries[index]) { 106 mlx4_warn(dev, "No valid Mac entry for the given index\n"); 107 err = -EINVAL; 108 } 109 return err; 110} 111 112static int find_index(struct mlx4_dev *dev, 113 struct mlx4_mac_table *table, u64 mac) 114{ 115 int i; 116 117 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 118 if (table->refs[i] && 119 (MLX4_MAC_MASK & mac) == 120 (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) 121 return i; 122 } 123 /* Mac not found */ 124 return -EINVAL; 125} 126 127static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port, 128 __be64 *entries) 129{ 130 struct mlx4_cmd_mailbox *mailbox; 131 u32 in_mod; 132 int err; 133 134 mailbox = mlx4_alloc_cmd_mailbox(dev); 135 if (IS_ERR(mailbox)) 136 return PTR_ERR(mailbox); 137 138 memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); 139 140 in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port; 141 142 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 143 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 144 MLX4_CMD_NATIVE); 145 146 mlx4_free_cmd_mailbox(dev, mailbox); 147 return err; 148} 149 150int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx) 151{ 152 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 153 struct mlx4_mac_table *table = &info->mac_table; 154 int i; 155 156 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 157 if (!table->refs[i]) 158 continue; 159 160 if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { 161 *idx = i; 162 return 0; 163 } 164 } 165 166 return -ENOENT; 167} 168EXPORT_SYMBOL_GPL(mlx4_find_cached_mac); 169 170static bool mlx4_need_mf_bond(struct mlx4_dev *dev) 171{ 172 int i, num_eth_ports = 0; 173 174 if (!mlx4_is_mfunc(dev)) 175 return false; 176 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 177 ++num_eth_ports; 178 179 return (num_eth_ports == 2) ? true : false; 180} 181 182int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) 183{ 184 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 185 struct mlx4_mac_table *table = &info->mac_table; 186 int i, err = 0; 187 int free = -1; 188 int free_for_dup = -1; 189 bool dup = mlx4_is_mf_bonded(dev); 190 u8 dup_port = (port == 1) ? 2 : 1; 191 struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; 192 bool need_mf_bond = mlx4_need_mf_bond(dev); 193 bool can_mf_bond = true; 194 195 mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d %s duplicate\n", 196 (unsigned long long)mac, port, 197 dup ? "with" : "without"); 198 199 if (need_mf_bond) { 200 if (port == 1) { 201 mutex_lock(&table->mutex); 202 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 203 } else { 204 mutex_lock(&dup_table->mutex); 205 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 206 } 207 } else { 208 mutex_lock(&table->mutex); 209 } 210 211 if (need_mf_bond) { 212 int index_at_port = -1; 213 int index_at_dup_port = -1; 214 215 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 216 if (((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))) 217 index_at_port = i; 218 if (((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(dup_table->entries[i])))) 219 index_at_dup_port = i; 220 } 221 222 /* check that same mac is not in the tables at different indices */ 223 if ((index_at_port != index_at_dup_port) && 224 (index_at_port >= 0) && 225 (index_at_dup_port >= 0)) 226 can_mf_bond = false; 227 228 /* If the mac is already in the primary table, the slot must be 229 * available in the duplicate table as well. 230 */ 231 if (index_at_port >= 0 && index_at_dup_port < 0 && 232 dup_table->refs[index_at_port]) { 233 can_mf_bond = false; 234 } 235 /* If the mac is already in the duplicate table, check that the 236 * corresponding index is not occupied in the primary table, or 237 * the primary table already contains the mac at the same index. 238 * Otherwise, you cannot bond (primary contains a different mac 239 * at that index). 240 */ 241 if (index_at_dup_port >= 0) { 242 if (!table->refs[index_at_dup_port] || 243 ((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(table->entries[index_at_dup_port])))) 244 free_for_dup = index_at_dup_port; 245 else 246 can_mf_bond = false; 247 } 248 } 249 250 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 251 if (!table->refs[i]) { 252 if (free < 0) 253 free = i; 254 if (free_for_dup < 0 && need_mf_bond && can_mf_bond) { 255 if (!dup_table->refs[i]) 256 free_for_dup = i; 257 } 258 continue; 259 } 260 261 if ((MLX4_MAC_MASK & mac) == 262 (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { 263 /* MAC already registered, increment ref count */ 264 err = i; 265 ++table->refs[i]; 266 if (dup) { 267 u64 dup_mac = MLX4_MAC_MASK & be64_to_cpu(dup_table->entries[i]); 268 269 if (dup_mac != mac || !dup_table->is_dup[i]) { 270 mlx4_warn(dev, "register mac: expect duplicate mac 0x%llx on port %d index %d\n", 271 (long long)mac, dup_port, i); 272 } 273 } 274 goto out; 275 } 276 } 277 278 if (need_mf_bond && (free_for_dup < 0)) { 279 if (dup) { 280 mlx4_warn(dev, "Fail to allocate duplicate MAC table entry\n"); 281 mlx4_warn(dev, "High Availability for virtual functions may not work as expected\n"); 282 dup = false; 283 } 284 can_mf_bond = false; 285 } 286 287 if (need_mf_bond && can_mf_bond) 288 free = free_for_dup; 289 290 mlx4_dbg(dev, "Free MAC index is %d\n", free); 291 292 if (table->total == table->max) { 293 /* No free mac entries */ 294 err = -ENOSPC; 295 goto out; 296 } 297 298 /* Register new MAC */ 299 table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); 300 301 err = mlx4_set_port_mac_table(dev, port, table->entries); 302 if (unlikely(err)) { 303 mlx4_err(dev, "Failed adding MAC: 0x%llx\n", 304 (unsigned long long) mac); 305 table->entries[free] = 0; 306 goto out; 307 } 308 table->refs[free] = 1; 309 table->is_dup[free] = false; 310 ++table->total; 311 if (dup) { 312 dup_table->refs[free] = 0; 313 dup_table->is_dup[free] = true; 314 dup_table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); 315 316 err = mlx4_set_port_mac_table(dev, dup_port, dup_table->entries); 317 if (unlikely(err)) { 318 mlx4_warn(dev, "Failed adding duplicate mac: 0x%llx\n", (long long)mac); 319 dup_table->is_dup[free] = false; 320 dup_table->entries[free] = 0; 321 goto out; 322 } 323 ++dup_table->total; 324 } 325 err = free; 326out: 327 if (need_mf_bond) { 328 if (port == 2) { 329 mutex_unlock(&table->mutex); 330 mutex_unlock(&dup_table->mutex); 331 } else { 332 mutex_unlock(&dup_table->mutex); 333 mutex_unlock(&table->mutex); 334 } 335 } else { 336 mutex_unlock(&table->mutex); 337 } 338 return err; 339} 340EXPORT_SYMBOL_GPL(__mlx4_register_mac); 341 342int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) 343{ 344 u64 out_param = 0; 345 int err = -EINVAL; 346 347 if (mlx4_is_mfunc(dev)) { 348 if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { 349 err = mlx4_cmd_imm(dev, mac, &out_param, 350 ((u32) port) << 8 | (u32) RES_MAC, 351 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, 352 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 353 } 354 if (err && err == -EINVAL && mlx4_is_slave(dev)) { 355 /* retry using old REG_MAC format */ 356 set_param_l(&out_param, port); 357 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, 358 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, 359 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 360 if (!err) 361 dev->flags |= MLX4_FLAG_OLD_REG_MAC; 362 } 363 if (err) 364 return err; 365 366 return get_param_l(&out_param); 367 } 368 return __mlx4_register_mac(dev, port, mac); 369} 370EXPORT_SYMBOL_GPL(mlx4_register_mac); 371 372int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port) 373{ 374 return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] + 375 (port - 1) * (1 << dev->caps.log_num_macs); 376} 377EXPORT_SYMBOL_GPL(mlx4_get_base_qpn); 378 379void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) 380{ 381 struct mlx4_port_info *info; 382 struct mlx4_mac_table *table; 383 int index; 384 bool dup = mlx4_is_mf_bonded(dev); 385 u8 dup_port = (port == 1) ? 2 : 1; 386 struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; 387 388 if (port < 1 || port > dev->caps.num_ports) { 389 mlx4_warn(dev, "invalid port number (%d), aborting...\n", port); 390 return; 391 } 392 info = &mlx4_priv(dev)->port[port]; 393 table = &info->mac_table; 394 395 if (dup) { 396 if (port == 1) { 397 mutex_lock(&table->mutex); 398 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 399 } else { 400 mutex_lock(&dup_table->mutex); 401 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 402 } 403 } else { 404 mutex_lock(&table->mutex); 405 } 406 407 index = find_index(dev, table, mac); 408 409 if (validate_index(dev, table, index)) 410 goto out; 411 412 if (--table->refs[index] || table->is_dup[index]) { 413 mlx4_dbg(dev, "Have more references for index %d, no need to modify mac table\n", 414 index); 415 if (!table->refs[index]) 416 dup_table->is_dup[index] = false; 417 goto out; 418 } 419 420 table->entries[index] = 0; 421 if (mlx4_set_port_mac_table(dev, port, table->entries)) 422 mlx4_warn(dev, "Fail to set mac in port %d during unregister\n", port); 423 --table->total; 424 425 if (dup) { 426 dup_table->is_dup[index] = false; 427 if (dup_table->refs[index]) 428 goto out; 429 dup_table->entries[index] = 0; 430 if (mlx4_set_port_mac_table(dev, dup_port, dup_table->entries)) 431 mlx4_warn(dev, "Fail to set mac in duplicate port %d during unregister\n", dup_port); 432 433 --table->total; 434 } 435out: 436 if (dup) { 437 if (port == 2) { 438 mutex_unlock(&table->mutex); 439 mutex_unlock(&dup_table->mutex); 440 } else { 441 mutex_unlock(&dup_table->mutex); 442 mutex_unlock(&table->mutex); 443 } 444 } else { 445 mutex_unlock(&table->mutex); 446 } 447} 448EXPORT_SYMBOL_GPL(__mlx4_unregister_mac); 449 450void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) 451{ 452 u64 out_param = 0; 453 454 if (mlx4_is_mfunc(dev)) { 455 if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { 456 (void) mlx4_cmd_imm(dev, mac, &out_param, 457 ((u32) port) << 8 | (u32) RES_MAC, 458 RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, 459 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 460 } else { 461 /* use old unregister mac format */ 462 set_param_l(&out_param, port); 463 (void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, 464 RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, 465 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 466 } 467 return; 468 } 469 __mlx4_unregister_mac(dev, port, mac); 470 return; 471} 472EXPORT_SYMBOL_GPL(mlx4_unregister_mac); 473 474int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac) 475{ 476 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 477 struct mlx4_mac_table *table = &info->mac_table; 478 int index = qpn - info->base_qpn; 479 int err = 0; 480 bool dup = mlx4_is_mf_bonded(dev); 481 u8 dup_port = (port == 1) ? 2 : 1; 482 struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; 483 484 /* CX1 doesn't support multi-functions */ 485 if (dup) { 486 if (port == 1) { 487 mutex_lock(&table->mutex); 488 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 489 } else { 490 mutex_lock(&dup_table->mutex); 491 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 492 } 493 } else { 494 mutex_lock(&table->mutex); 495 } 496 497 err = validate_index(dev, table, index); 498 if (err) 499 goto out; 500 501 table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); 502 503 err = mlx4_set_port_mac_table(dev, port, table->entries); 504 if (unlikely(err)) { 505 mlx4_err(dev, "Failed adding MAC: 0x%llx\n", 506 (unsigned long long) new_mac); 507 table->entries[index] = 0; 508 } else { 509 if (dup) { 510 dup_table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); 511 512 err = mlx4_set_port_mac_table(dev, dup_port, dup_table->entries); 513 if (unlikely(err)) { 514 mlx4_err(dev, "Failed adding duplicate MAC: 0x%llx\n", 515 (unsigned long long)new_mac); 516 dup_table->entries[index] = 0; 517 } 518 } 519 } 520out: 521 if (dup) { 522 if (port == 2) { 523 mutex_unlock(&table->mutex); 524 mutex_unlock(&dup_table->mutex); 525 } else { 526 mutex_unlock(&dup_table->mutex); 527 mutex_unlock(&table->mutex); 528 } 529 } else { 530 mutex_unlock(&table->mutex); 531 } 532 return err; 533} 534EXPORT_SYMBOL_GPL(__mlx4_replace_mac); 535 536static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port, 537 __be32 *entries) 538{ 539 struct mlx4_cmd_mailbox *mailbox; 540 u32 in_mod; 541 int err; 542 543 mailbox = mlx4_alloc_cmd_mailbox(dev); 544 if (IS_ERR(mailbox)) 545 return PTR_ERR(mailbox); 546 547 memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE); 548 in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port; 549 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 550 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 551 MLX4_CMD_NATIVE); 552 553 mlx4_free_cmd_mailbox(dev, mailbox); 554 555 return err; 556} 557 558int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx) 559{ 560 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 561 int i; 562 563 for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) { 564 if (table->refs[i] && 565 (vid == (MLX4_VLAN_MASK & 566 be32_to_cpu(table->entries[i])))) { 567 /* VLAN already registered, increase reference count */ 568 *idx = i; 569 return 0; 570 } 571 } 572 573 return -ENOENT; 574} 575EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan); 576 577int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, 578 int *index) 579{ 580 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 581 int i, err = 0; 582 int free = -1; 583 int free_for_dup = -1; 584 bool dup = mlx4_is_mf_bonded(dev); 585 u8 dup_port = (port == 1) ? 2 : 1; 586 struct mlx4_vlan_table *dup_table = &mlx4_priv(dev)->port[dup_port].vlan_table; 587 bool need_mf_bond = mlx4_need_mf_bond(dev); 588 bool can_mf_bond = true; 589 590 mlx4_dbg(dev, "Registering VLAN: %d for port %d %s duplicate\n", 591 vlan, port, 592 dup ? "with" : "without"); 593 594 if (need_mf_bond) { 595 if (port == 1) { 596 mutex_lock(&table->mutex); 597 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 598 } else { 599 mutex_lock(&dup_table->mutex); 600 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 601 } 602 } else { 603 mutex_lock(&table->mutex); 604 } 605 606 if (table->total == table->max) { 607 /* No free vlan entries */ 608 err = -ENOSPC; 609 goto out; 610 } 611 612 if (need_mf_bond) { 613 int index_at_port = -1; 614 int index_at_dup_port = -1; 615 616 for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { 617 if (vlan == (MLX4_VLAN_MASK & be32_to_cpu(table->entries[i]))) 618 index_at_port = i; 619 if (vlan == (MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[i]))) 620 index_at_dup_port = i; 621 } 622 /* check that same vlan is not in the tables at different indices */ 623 if ((index_at_port != index_at_dup_port) && 624 (index_at_port >= 0) && 625 (index_at_dup_port >= 0)) 626 can_mf_bond = false; 627 628 /* If the vlan is already in the primary table, the slot must be 629 * available in the duplicate table as well. 630 */ 631 if (index_at_port >= 0 && index_at_dup_port < 0 && 632 dup_table->refs[index_at_port]) { 633 can_mf_bond = false; 634 } 635 /* If the vlan is already in the duplicate table, check that the 636 * corresponding index is not occupied in the primary table, or 637 * the primary table already contains the vlan at the same index. 638 * Otherwise, you cannot bond (primary contains a different vlan 639 * at that index). 640 */ 641 if (index_at_dup_port >= 0) { 642 if (!table->refs[index_at_dup_port] || 643 (vlan == (MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[index_at_dup_port])))) 644 free_for_dup = index_at_dup_port; 645 else 646 can_mf_bond = false; 647 } 648 } 649 650 for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { 651 if (!table->refs[i]) { 652 if (free < 0) 653 free = i; 654 if (free_for_dup < 0 && need_mf_bond && can_mf_bond) { 655 if (!dup_table->refs[i]) 656 free_for_dup = i; 657 } 658 } 659 660 if ((table->refs[i] || table->is_dup[i]) && 661 (vlan == (MLX4_VLAN_MASK & 662 be32_to_cpu(table->entries[i])))) { 663 /* Vlan already registered, increase references count */ 664 mlx4_dbg(dev, "vlan %u is already registered.\n", vlan); 665 *index = i; 666 ++table->refs[i]; 667 if (dup) { 668 u16 dup_vlan = MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[i]); 669 670 if (dup_vlan != vlan || !dup_table->is_dup[i]) { 671 mlx4_warn(dev, "register vlan: expected duplicate vlan %u on port %d index %d\n", 672 vlan, dup_port, i); 673 } 674 } 675 goto out; 676 } 677 } 678 679 if (need_mf_bond && (free_for_dup < 0)) { 680 if (dup) { 681 mlx4_warn(dev, "Fail to allocate duplicate VLAN table entry\n"); 682 mlx4_warn(dev, "High Availability for virtual functions may not work as expected\n"); 683 dup = false; 684 } 685 can_mf_bond = false; 686 } 687 688 if (need_mf_bond && can_mf_bond) 689 free = free_for_dup; 690 691 if (free < 0) { 692 err = -ENOMEM; 693 goto out; 694 } 695 696 /* Register new VLAN */ 697 table->refs[free] = 1; 698 table->is_dup[free] = false; 699 table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); 700 701 err = mlx4_set_port_vlan_table(dev, port, table->entries); 702 if (unlikely(err)) { 703 mlx4_warn(dev, "Failed adding vlan: %u\n", vlan); 704 table->refs[free] = 0; 705 table->entries[free] = 0; 706 goto out; 707 } 708 ++table->total; 709 if (dup) { 710 dup_table->refs[free] = 0; 711 dup_table->is_dup[free] = true; 712 dup_table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); 713 714 err = mlx4_set_port_vlan_table(dev, dup_port, dup_table->entries); 715 if (unlikely(err)) { 716 mlx4_warn(dev, "Failed adding duplicate vlan: %u\n", vlan); 717 dup_table->is_dup[free] = false; 718 dup_table->entries[free] = 0; 719 goto out; 720 } 721 ++dup_table->total; 722 } 723 724 *index = free; 725out: 726 if (need_mf_bond) { 727 if (port == 2) { 728 mutex_unlock(&table->mutex); 729 mutex_unlock(&dup_table->mutex); 730 } else { 731 mutex_unlock(&dup_table->mutex); 732 mutex_unlock(&table->mutex); 733 } 734 } else { 735 mutex_unlock(&table->mutex); 736 } 737 return err; 738} 739 740int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) 741{ 742 u64 out_param = 0; 743 int err; 744 745 if (vlan > 4095) 746 return -EINVAL; 747 748 if (mlx4_is_mfunc(dev)) { 749 err = mlx4_cmd_imm(dev, vlan, &out_param, 750 ((u32) port) << 8 | (u32) RES_VLAN, 751 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, 752 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 753 if (!err) 754 *index = get_param_l(&out_param); 755 756 return err; 757 } 758 return __mlx4_register_vlan(dev, port, vlan, index); 759} 760EXPORT_SYMBOL_GPL(mlx4_register_vlan); 761 762void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) 763{ 764 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; 765 int index; 766 bool dup = mlx4_is_mf_bonded(dev); 767 u8 dup_port = (port == 1) ? 2 : 1; 768 struct mlx4_vlan_table *dup_table = &mlx4_priv(dev)->port[dup_port].vlan_table; 769 770 if (dup) { 771 if (port == 1) { 772 mutex_lock(&table->mutex); 773 mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); 774 } else { 775 mutex_lock(&dup_table->mutex); 776 mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); 777 } 778 } else { 779 mutex_lock(&table->mutex); 780 } 781 782 if (mlx4_find_cached_vlan(dev, port, vlan, &index)) { 783 mlx4_warn(dev, "vlan 0x%x is not in the vlan table\n", vlan); 784 goto out; 785 } 786 787 if (index < MLX4_VLAN_REGULAR) { 788 mlx4_warn(dev, "Trying to free special vlan index %d\n", index); 789 goto out; 790 } 791 792 if (--table->refs[index] || table->is_dup[index]) { 793 mlx4_dbg(dev, "Have %d more references for index %d, no need to modify vlan table\n", 794 table->refs[index], index); 795 if (!table->refs[index]) 796 dup_table->is_dup[index] = false; 797 goto out; 798 } 799 table->entries[index] = 0; 800 if (mlx4_set_port_vlan_table(dev, port, table->entries)) 801 mlx4_warn(dev, "Fail to set vlan in port %d during unregister\n", port); 802 --table->total; 803 if (dup) { 804 dup_table->is_dup[index] = false; 805 if (dup_table->refs[index]) 806 goto out; 807 dup_table->entries[index] = 0; 808 if (mlx4_set_port_vlan_table(dev, dup_port, dup_table->entries)) 809 mlx4_warn(dev, "Fail to set vlan in duplicate port %d during unregister\n", dup_port); 810 --dup_table->total; 811 } 812out: 813 if (dup) { 814 if (port == 2) { 815 mutex_unlock(&table->mutex); 816 mutex_unlock(&dup_table->mutex); 817 } else { 818 mutex_unlock(&dup_table->mutex); 819 mutex_unlock(&table->mutex); 820 } 821 } else { 822 mutex_unlock(&table->mutex); 823 } 824} 825 826void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) 827{ 828 u64 out_param = 0; 829 830 if (mlx4_is_mfunc(dev)) { 831 (void) mlx4_cmd_imm(dev, vlan, &out_param, 832 ((u32) port) << 8 | (u32) RES_VLAN, 833 RES_OP_RESERVE_AND_MAP, 834 MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, 835 MLX4_CMD_WRAPPED); 836 return; 837 } 838 __mlx4_unregister_vlan(dev, port, vlan); 839} 840EXPORT_SYMBOL_GPL(mlx4_unregister_vlan); 841 842int mlx4_bond_mac_table(struct mlx4_dev *dev) 843{ 844 struct mlx4_mac_table *t1 = &mlx4_priv(dev)->port[1].mac_table; 845 struct mlx4_mac_table *t2 = &mlx4_priv(dev)->port[2].mac_table; 846 int ret = 0; 847 int i; 848 bool update1 = false; 849 bool update2 = false; 850 851 mutex_lock(&t1->mutex); 852 mutex_lock(&t2->mutex); 853 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 854 if ((t1->entries[i] != t2->entries[i]) && 855 t1->entries[i] && t2->entries[i]) { 856 mlx4_warn(dev, "can't duplicate entry %d in mac table\n", i); 857 ret = -EINVAL; 858 goto unlock; 859 } 860 } 861 862 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 863 if (t1->entries[i] && !t2->entries[i]) { 864 t2->entries[i] = t1->entries[i]; 865 t2->is_dup[i] = true; 866 update2 = true; 867 } else if (!t1->entries[i] && t2->entries[i]) { 868 t1->entries[i] = t2->entries[i]; 869 t1->is_dup[i] = true; 870 update1 = true; 871 } else if (t1->entries[i] && t2->entries[i]) { 872 t1->is_dup[i] = true; 873 t2->is_dup[i] = true; 874 } 875 } 876 877 if (update1) { 878 ret = mlx4_set_port_mac_table(dev, 1, t1->entries); 879 if (ret) 880 mlx4_warn(dev, "failed to set MAC table for port 1 (%d)\n", ret); 881 } 882 if (!ret && update2) { 883 ret = mlx4_set_port_mac_table(dev, 2, t2->entries); 884 if (ret) 885 mlx4_warn(dev, "failed to set MAC table for port 2 (%d)\n", ret); 886 } 887 888 if (ret) 889 mlx4_warn(dev, "failed to create mirror MAC tables\n"); 890unlock: 891 mutex_unlock(&t2->mutex); 892 mutex_unlock(&t1->mutex); 893 return ret; 894} 895 896int mlx4_unbond_mac_table(struct mlx4_dev *dev) 897{ 898 struct mlx4_mac_table *t1 = &mlx4_priv(dev)->port[1].mac_table; 899 struct mlx4_mac_table *t2 = &mlx4_priv(dev)->port[2].mac_table; 900 int ret = 0; 901 int ret1; 902 int i; 903 bool update1 = false; 904 bool update2 = false; 905 906 mutex_lock(&t1->mutex); 907 mutex_lock(&t2->mutex); 908 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 909 if (t1->entries[i] != t2->entries[i]) { 910 mlx4_warn(dev, "mac table is in an unexpected state when trying to unbond\n"); 911 ret = -EINVAL; 912 goto unlock; 913 } 914 } 915 916 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { 917 if (!t1->entries[i]) 918 continue; 919 t1->is_dup[i] = false; 920 if (!t1->refs[i]) { 921 t1->entries[i] = 0; 922 update1 = true; 923 } 924 t2->is_dup[i] = false; 925 if (!t2->refs[i]) { 926 t2->entries[i] = 0; 927 update2 = true; 928 } 929 } 930 931 if (update1) { 932 ret = mlx4_set_port_mac_table(dev, 1, t1->entries); 933 if (ret) 934 mlx4_warn(dev, "failed to unmirror MAC tables for port 1(%d)\n", ret); 935 } 936 if (update2) { 937 ret1 = mlx4_set_port_mac_table(dev, 2, t2->entries); 938 if (ret1) { 939 mlx4_warn(dev, "failed to unmirror MAC tables for port 2(%d)\n", ret1); 940 ret = ret1; 941 } 942 } 943unlock: 944 mutex_unlock(&t2->mutex); 945 mutex_unlock(&t1->mutex); 946 return ret; 947} 948 949int mlx4_bond_vlan_table(struct mlx4_dev *dev) 950{ 951 struct mlx4_vlan_table *t1 = &mlx4_priv(dev)->port[1].vlan_table; 952 struct mlx4_vlan_table *t2 = &mlx4_priv(dev)->port[2].vlan_table; 953 int ret = 0; 954 int i; 955 bool update1 = false; 956 bool update2 = false; 957 958 mutex_lock(&t1->mutex); 959 mutex_lock(&t2->mutex); 960 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 961 if ((t1->entries[i] != t2->entries[i]) && 962 t1->entries[i] && t2->entries[i]) { 963 mlx4_warn(dev, "can't duplicate entry %d in vlan table\n", i); 964 ret = -EINVAL; 965 goto unlock; 966 } 967 } 968 969 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 970 if (t1->entries[i] && !t2->entries[i]) { 971 t2->entries[i] = t1->entries[i]; 972 t2->is_dup[i] = true; 973 update2 = true; 974 } else if (!t1->entries[i] && t2->entries[i]) { 975 t1->entries[i] = t2->entries[i]; 976 t1->is_dup[i] = true; 977 update1 = true; 978 } else if (t1->entries[i] && t2->entries[i]) { 979 t1->is_dup[i] = true; 980 t2->is_dup[i] = true; 981 } 982 } 983 984 if (update1) { 985 ret = mlx4_set_port_vlan_table(dev, 1, t1->entries); 986 if (ret) 987 mlx4_warn(dev, "failed to set VLAN table for port 1 (%d)\n", ret); 988 } 989 if (!ret && update2) { 990 ret = mlx4_set_port_vlan_table(dev, 2, t2->entries); 991 if (ret) 992 mlx4_warn(dev, "failed to set VLAN table for port 2 (%d)\n", ret); 993 } 994 995 if (ret) 996 mlx4_warn(dev, "failed to create mirror VLAN tables\n"); 997unlock: 998 mutex_unlock(&t2->mutex); 999 mutex_unlock(&t1->mutex); 1000 return ret; 1001} 1002 1003int mlx4_unbond_vlan_table(struct mlx4_dev *dev) 1004{ 1005 struct mlx4_vlan_table *t1 = &mlx4_priv(dev)->port[1].vlan_table; 1006 struct mlx4_vlan_table *t2 = &mlx4_priv(dev)->port[2].vlan_table; 1007 int ret = 0; 1008 int ret1; 1009 int i; 1010 bool update1 = false; 1011 bool update2 = false; 1012 1013 mutex_lock(&t1->mutex); 1014 mutex_lock(&t2->mutex); 1015 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 1016 if (t1->entries[i] != t2->entries[i]) { 1017 mlx4_warn(dev, "vlan table is in an unexpected state when trying to unbond\n"); 1018 ret = -EINVAL; 1019 goto unlock; 1020 } 1021 } 1022 1023 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { 1024 if (!t1->entries[i]) 1025 continue; 1026 t1->is_dup[i] = false; 1027 if (!t1->refs[i]) { 1028 t1->entries[i] = 0; 1029 update1 = true; 1030 } 1031 t2->is_dup[i] = false; 1032 if (!t2->refs[i]) { 1033 t2->entries[i] = 0; 1034 update2 = true; 1035 } 1036 } 1037 1038 if (update1) { 1039 ret = mlx4_set_port_vlan_table(dev, 1, t1->entries); 1040 if (ret) 1041 mlx4_warn(dev, "failed to unmirror VLAN tables for port 1(%d)\n", ret); 1042 } 1043 if (update2) { 1044 ret1 = mlx4_set_port_vlan_table(dev, 2, t2->entries); 1045 if (ret1) { 1046 mlx4_warn(dev, "failed to unmirror VLAN tables for port 2(%d)\n", ret1); 1047 ret = ret1; 1048 } 1049 } 1050unlock: 1051 mutex_unlock(&t2->mutex); 1052 mutex_unlock(&t1->mutex); 1053 return ret; 1054} 1055 1056int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) 1057{ 1058 struct mlx4_cmd_mailbox *inmailbox, *outmailbox; 1059 u8 *inbuf, *outbuf; 1060 int err; 1061 1062 inmailbox = mlx4_alloc_cmd_mailbox(dev); 1063 if (IS_ERR(inmailbox)) 1064 return PTR_ERR(inmailbox); 1065 1066 outmailbox = mlx4_alloc_cmd_mailbox(dev); 1067 if (IS_ERR(outmailbox)) { 1068 mlx4_free_cmd_mailbox(dev, inmailbox); 1069 return PTR_ERR(outmailbox); 1070 } 1071 1072 inbuf = inmailbox->buf; 1073 outbuf = outmailbox->buf; 1074 inbuf[0] = 1; 1075 inbuf[1] = 1; 1076 inbuf[2] = 1; 1077 inbuf[3] = 1; 1078 *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015); 1079 *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); 1080 1081 err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, 1082 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, 1083 MLX4_CMD_NATIVE); 1084 if (!err) 1085 *caps = *(__be32 *) (outbuf + 84); 1086 mlx4_free_cmd_mailbox(dev, inmailbox); 1087 mlx4_free_cmd_mailbox(dev, outmailbox); 1088 return err; 1089} 1090static struct mlx4_roce_gid_entry zgid_entry; 1091 1092int mlx4_get_slave_num_gids(struct mlx4_dev *dev, int slave, int port) 1093{ 1094 int vfs; 1095 int slave_gid = slave; 1096 unsigned i; 1097 struct mlx4_slaves_pport slaves_pport; 1098 struct mlx4_active_ports actv_ports; 1099 unsigned max_port_p_one; 1100 1101 if (slave == 0) 1102 return MLX4_ROCE_PF_GIDS; 1103 1104 /* Slave is a VF */ 1105 slaves_pport = mlx4_phys_to_slaves_pport(dev, port); 1106 actv_ports = mlx4_get_active_ports(dev, slave); 1107 max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + 1108 bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; 1109 1110 for (i = 1; i < max_port_p_one; i++) { 1111 struct mlx4_active_ports exclusive_ports; 1112 struct mlx4_slaves_pport slaves_pport_actv; 1113 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1114 set_bit(i - 1, exclusive_ports.ports); 1115 if (i == port) 1116 continue; 1117 slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( 1118 dev, &exclusive_ports); 1119 slave_gid -= bitmap_weight(slaves_pport_actv.slaves, 1120 dev->persist->num_vfs + 1); 1121 } 1122 vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; 1123 if (slave_gid <= ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) % vfs)) 1124 return ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs) + 1; 1125 return (MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs; 1126} 1127 1128int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port) 1129{ 1130 int gids; 1131 unsigned i; 1132 int slave_gid = slave; 1133 int vfs; 1134 1135 struct mlx4_slaves_pport slaves_pport; 1136 struct mlx4_active_ports actv_ports; 1137 unsigned max_port_p_one; 1138 1139 if (slave == 0) 1140 return 0; 1141 1142 slaves_pport = mlx4_phys_to_slaves_pport(dev, port); 1143 actv_ports = mlx4_get_active_ports(dev, slave); 1144 max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + 1145 bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; 1146 1147 for (i = 1; i < max_port_p_one; i++) { 1148 struct mlx4_active_ports exclusive_ports; 1149 struct mlx4_slaves_pport slaves_pport_actv; 1150 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1151 set_bit(i - 1, exclusive_ports.ports); 1152 if (i == port) 1153 continue; 1154 slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( 1155 dev, &exclusive_ports); 1156 slave_gid -= bitmap_weight(slaves_pport_actv.slaves, 1157 dev->persist->num_vfs + 1); 1158 } 1159 gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; 1160 vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; 1161 if (slave_gid <= gids % vfs) 1162 return MLX4_ROCE_PF_GIDS + ((gids / vfs) + 1) * (slave_gid - 1); 1163 1164 return MLX4_ROCE_PF_GIDS + (gids % vfs) + 1165 ((gids / vfs) * (slave_gid - 1)); 1166} 1167EXPORT_SYMBOL_GPL(mlx4_get_base_gid_ix); 1168 1169static int mlx4_reset_roce_port_gids(struct mlx4_dev *dev, int slave, 1170 int port, struct mlx4_cmd_mailbox *mailbox) 1171{ 1172 struct mlx4_roce_gid_entry *gid_entry_mbox; 1173 struct mlx4_priv *priv = mlx4_priv(dev); 1174 int num_gids, base, offset; 1175 int i, err; 1176 1177 num_gids = mlx4_get_slave_num_gids(dev, slave, port); 1178 base = mlx4_get_base_gid_ix(dev, slave, port); 1179 1180 memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE); 1181 1182 mutex_lock(&(priv->port[port].gid_table.mutex)); 1183 /* Zero-out gids belonging to that slave in the port GID table */ 1184 for (i = 0, offset = base; i < num_gids; offset++, i++) 1185 memcpy(priv->port[port].gid_table.roce_gids[offset].raw, 1186 zgid_entry.raw, MLX4_ROCE_GID_ENTRY_SIZE); 1187 1188 /* Now, copy roce port gids table to mailbox for passing to FW */ 1189 gid_entry_mbox = (struct mlx4_roce_gid_entry *)mailbox->buf; 1190 for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) 1191 memcpy(gid_entry_mbox->raw, 1192 priv->port[port].gid_table.roce_gids[i].raw, 1193 MLX4_ROCE_GID_ENTRY_SIZE); 1194 1195 err = mlx4_cmd(dev, mailbox->dma, 1196 ((u32)port) | (MLX4_SET_PORT_GID_TABLE << 8), 1197 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT, 1198 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 1199 mutex_unlock(&(priv->port[port].gid_table.mutex)); 1200 return err; 1201} 1202 1203 1204void mlx4_reset_roce_gids(struct mlx4_dev *dev, int slave) 1205{ 1206 struct mlx4_active_ports actv_ports; 1207 struct mlx4_cmd_mailbox *mailbox; 1208 int num_eth_ports, err; 1209 int i; 1210 1211 if (slave < 0 || slave > dev->persist->num_vfs) 1212 return; 1213 1214 actv_ports = mlx4_get_active_ports(dev, slave); 1215 1216 for (i = 0, num_eth_ports = 0; i < dev->caps.num_ports; i++) { 1217 if (test_bit(i, actv_ports.ports)) { 1218 if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) 1219 continue; 1220 num_eth_ports++; 1221 } 1222 } 1223 1224 if (!num_eth_ports) 1225 return; 1226 1227 /* have ETH ports. Alloc mailbox for SET_PORT command */ 1228 mailbox = mlx4_alloc_cmd_mailbox(dev); 1229 if (IS_ERR(mailbox)) 1230 return; 1231 1232 for (i = 0; i < dev->caps.num_ports; i++) { 1233 if (test_bit(i, actv_ports.ports)) { 1234 if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) 1235 continue; 1236 err = mlx4_reset_roce_port_gids(dev, slave, i + 1, mailbox); 1237 if (err) 1238 mlx4_warn(dev, "Could not reset ETH port GID table for slave %d, port %d (%d)\n", 1239 slave, i + 1, err); 1240 } 1241 } 1242 1243 mlx4_free_cmd_mailbox(dev, mailbox); 1244 return; 1245} 1246 1247static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod, 1248 u8 op_mod, struct mlx4_cmd_mailbox *inbox) 1249{ 1250 struct mlx4_priv *priv = mlx4_priv(dev); 1251 struct mlx4_port_info *port_info; 1252 struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; 1253 struct mlx4_slave_state *slave_st = &master->slave_state[slave]; 1254 struct mlx4_set_port_rqp_calc_context *qpn_context; 1255 struct mlx4_set_port_general_context *gen_context; 1256 struct mlx4_roce_gid_entry *gid_entry_tbl, *gid_entry_mbox, *gid_entry_mb1; 1257 int reset_qkey_viols; 1258 int port; 1259 int is_eth; 1260 int num_gids; 1261 int base; 1262 u32 in_modifier; 1263 u32 promisc; 1264 u16 mtu, prev_mtu; 1265 int err; 1266 int i, j; 1267 int offset; 1268 __be32 agg_cap_mask; 1269 __be32 slave_cap_mask; 1270 __be32 new_cap_mask; 1271 1272 port = in_mod & 0xff; 1273 in_modifier = in_mod >> 8; 1274 is_eth = op_mod; 1275 port_info = &priv->port[port]; 1276 1277 /* Slaves cannot perform SET_PORT operations except changing MTU */ 1278 if (is_eth) { 1279 if (slave != dev->caps.function && 1280 in_modifier != MLX4_SET_PORT_GENERAL && 1281 in_modifier != MLX4_SET_PORT_GID_TABLE) { 1282 mlx4_warn(dev, "denying SET_PORT for slave:%d\n", 1283 slave); 1284 return -EINVAL; 1285 } 1286 switch (in_modifier) { 1287 case MLX4_SET_PORT_RQP_CALC: 1288 qpn_context = inbox->buf; 1289 qpn_context->base_qpn = 1290 cpu_to_be32(port_info->base_qpn); 1291 qpn_context->n_mac = 0x7; 1292 promisc = be32_to_cpu(qpn_context->promisc) >> 1293 SET_PORT_PROMISC_SHIFT; 1294 qpn_context->promisc = cpu_to_be32( 1295 promisc << SET_PORT_PROMISC_SHIFT | 1296 port_info->base_qpn); 1297 promisc = be32_to_cpu(qpn_context->mcast) >> 1298 SET_PORT_MC_PROMISC_SHIFT; 1299 qpn_context->mcast = cpu_to_be32( 1300 promisc << SET_PORT_MC_PROMISC_SHIFT | 1301 port_info->base_qpn); 1302 break; 1303 case MLX4_SET_PORT_GENERAL: 1304 gen_context = inbox->buf; 1305 /* Mtu is configured as the max MTU among all the 1306 * the functions on the port. */ 1307 mtu = be16_to_cpu(gen_context->mtu); 1308 mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] + 1309 ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); 1310 prev_mtu = slave_st->mtu[port]; 1311 slave_st->mtu[port] = mtu; 1312 if (mtu > master->max_mtu[port]) 1313 master->max_mtu[port] = mtu; 1314 if (mtu < prev_mtu && prev_mtu == 1315 master->max_mtu[port]) { 1316 slave_st->mtu[port] = mtu; 1317 master->max_mtu[port] = mtu; 1318 for (i = 0; i < dev->num_slaves; i++) { 1319 master->max_mtu[port] = 1320 max(master->max_mtu[port], 1321 master->slave_state[i].mtu[port]); 1322 } 1323 } 1324 1325 gen_context->mtu = cpu_to_be16(master->max_mtu[port]); 1326 /* Slave cannot change Global Pause configuration */ 1327 if (slave != mlx4_master_func_num(dev) && 1328 ((gen_context->pptx != master->pptx) || 1329 (gen_context->pprx != master->pprx))) { 1330 gen_context->pptx = master->pptx; 1331 gen_context->pprx = master->pprx; 1332 mlx4_warn(dev, 1333 "denying Global Pause change for slave:%d\n", 1334 slave); 1335 } else { 1336 master->pptx = gen_context->pptx; 1337 master->pprx = gen_context->pprx; 1338 } 1339 break; 1340 case MLX4_SET_PORT_GID_TABLE: 1341 /* change to MULTIPLE entries: number of guest's gids 1342 * need a FOR-loop here over number of gids the guest has. 1343 * 1. Check no duplicates in gids passed by slave 1344 */ 1345 num_gids = mlx4_get_slave_num_gids(dev, slave, port); 1346 base = mlx4_get_base_gid_ix(dev, slave, port); 1347 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1348 for (i = 0; i < num_gids; gid_entry_mbox++, i++) { 1349 if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, 1350 sizeof(zgid_entry))) 1351 continue; 1352 gid_entry_mb1 = gid_entry_mbox + 1; 1353 for (j = i + 1; j < num_gids; gid_entry_mb1++, j++) { 1354 if (!memcmp(gid_entry_mb1->raw, 1355 zgid_entry.raw, sizeof(zgid_entry))) 1356 continue; 1357 if (!memcmp(gid_entry_mb1->raw, gid_entry_mbox->raw, 1358 sizeof(gid_entry_mbox->raw))) { 1359 /* found duplicate */ 1360 return -EINVAL; 1361 } 1362 } 1363 } 1364 1365 /* 2. Check that do not have duplicates in OTHER 1366 * entries in the port GID table 1367 */ 1368 1369 mutex_lock(&(priv->port[port].gid_table.mutex)); 1370 for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { 1371 if (i >= base && i < base + num_gids) 1372 continue; /* don't compare to slave's current gids */ 1373 gid_entry_tbl = &priv->port[port].gid_table.roce_gids[i]; 1374 if (!memcmp(gid_entry_tbl->raw, zgid_entry.raw, sizeof(zgid_entry))) 1375 continue; 1376 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1377 for (j = 0; j < num_gids; gid_entry_mbox++, j++) { 1378 if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, 1379 sizeof(zgid_entry))) 1380 continue; 1381 if (!memcmp(gid_entry_mbox->raw, gid_entry_tbl->raw, 1382 sizeof(gid_entry_tbl->raw))) { 1383 /* found duplicate */ 1384 mlx4_warn(dev, "requested gid entry for slave:%d is a duplicate of gid at index %d\n", 1385 slave, i); 1386 mutex_unlock(&(priv->port[port].gid_table.mutex)); 1387 return -EINVAL; 1388 } 1389 } 1390 } 1391 1392 /* insert slave GIDs with memcpy, starting at slave's base index */ 1393 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1394 for (i = 0, offset = base; i < num_gids; gid_entry_mbox++, offset++, i++) 1395 memcpy(priv->port[port].gid_table.roce_gids[offset].raw, 1396 gid_entry_mbox->raw, MLX4_ROCE_GID_ENTRY_SIZE); 1397 1398 /* Now, copy roce port gids table to current mailbox for passing to FW */ 1399 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); 1400 for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) 1401 memcpy(gid_entry_mbox->raw, 1402 priv->port[port].gid_table.roce_gids[i].raw, 1403 MLX4_ROCE_GID_ENTRY_SIZE); 1404 1405 err = mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, 1406 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1407 MLX4_CMD_NATIVE); 1408 mutex_unlock(&(priv->port[port].gid_table.mutex)); 1409 return err; 1410 } 1411 1412 return mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, 1413 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1414 MLX4_CMD_NATIVE); 1415 } 1416 1417 /* Slaves are not allowed to SET_PORT beacon (LED) blink */ 1418 if (op_mod == MLX4_SET_PORT_BEACON_OPCODE) { 1419 mlx4_warn(dev, "denying SET_PORT Beacon slave:%d\n", slave); 1420 return -EPERM; 1421 } 1422 1423 /* For IB, we only consider: 1424 * - The capability mask, which is set to the aggregate of all 1425 * slave function capabilities 1426 * - The QKey violatin counter - reset according to each request. 1427 */ 1428 1429 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1430 reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40; 1431 new_cap_mask = ((__be32 *) inbox->buf)[2]; 1432 } else { 1433 reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1; 1434 new_cap_mask = ((__be32 *) inbox->buf)[1]; 1435 } 1436 1437 /* slave may not set the IS_SM capability for the port */ 1438 if (slave != mlx4_master_func_num(dev) && 1439 (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_IS_SM)) 1440 return -EINVAL; 1441 1442 /* No DEV_MGMT in multifunc mode */ 1443 if (mlx4_is_mfunc(dev) && 1444 (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP)) 1445 return -EINVAL; 1446 1447 agg_cap_mask = 0; 1448 slave_cap_mask = 1449 priv->mfunc.master.slave_state[slave].ib_cap_mask[port]; 1450 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask; 1451 for (i = 0; i < dev->num_slaves; i++) 1452 agg_cap_mask |= 1453 priv->mfunc.master.slave_state[i].ib_cap_mask[port]; 1454 1455 /* only clear mailbox for guests. Master may be setting 1456 * MTU or PKEY table size 1457 */ 1458 if (slave != dev->caps.function) 1459 memset(inbox->buf, 0, 256); 1460 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1461 *(u8 *) inbox->buf |= !!reset_qkey_viols << 6; 1462 ((__be32 *) inbox->buf)[2] = agg_cap_mask; 1463 } else { 1464 ((u8 *) inbox->buf)[3] |= !!reset_qkey_viols; 1465 ((__be32 *) inbox->buf)[1] = agg_cap_mask; 1466 } 1467 1468 err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT, 1469 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 1470 if (err) 1471 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = 1472 slave_cap_mask; 1473 return err; 1474} 1475 1476int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, 1477 struct mlx4_vhcr *vhcr, 1478 struct mlx4_cmd_mailbox *inbox, 1479 struct mlx4_cmd_mailbox *outbox, 1480 struct mlx4_cmd_info *cmd) 1481{ 1482 int port = mlx4_slave_convert_port( 1483 dev, slave, vhcr->in_modifier & 0xFF); 1484 1485 if (port < 0) 1486 return -EINVAL; 1487 1488 vhcr->in_modifier = (vhcr->in_modifier & ~0xFF) | 1489 (port & 0xFF); 1490 1491 return mlx4_common_set_port(dev, slave, vhcr->in_modifier, 1492 vhcr->op_modifier, inbox); 1493} 1494 1495/* bit locations for set port command with zero op modifier */ 1496enum { 1497 MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */ 1498 MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */ 1499 MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20, 1500 MLX4_CHANGE_PORT_VL_CAP = 21, 1501 MLX4_CHANGE_PORT_MTU_CAP = 22, 1502}; 1503 1504int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz) 1505{ 1506 struct mlx4_cmd_mailbox *mailbox; 1507 int err, vl_cap, pkey_tbl_flag = 0; 1508 1509 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) 1510 return 0; 1511 1512 mailbox = mlx4_alloc_cmd_mailbox(dev); 1513 if (IS_ERR(mailbox)) 1514 return PTR_ERR(mailbox); 1515 1516 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; 1517 1518 if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) { 1519 pkey_tbl_flag = 1; 1520 ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz); 1521 } 1522 1523 /* IB VL CAP enum isn't used by the firmware, just numerical values */ 1524 for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) { 1525 ((__be32 *) mailbox->buf)[0] = cpu_to_be32( 1526 (1 << MLX4_CHANGE_PORT_MTU_CAP) | 1527 (1 << MLX4_CHANGE_PORT_VL_CAP) | 1528 (pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) | 1529 (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | 1530 (vl_cap << MLX4_SET_PORT_VL_CAP)); 1531 err = mlx4_cmd(dev, mailbox->dma, port, 1532 MLX4_SET_PORT_IB_OPCODE, MLX4_CMD_SET_PORT, 1533 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); 1534 if (err != -ENOMEM) 1535 break; 1536 } 1537 1538 mlx4_free_cmd_mailbox(dev, mailbox); 1539 return err; 1540} 1541 1542#define SET_PORT_ROCE_2_FLAGS 0x10 1543#define MLX4_SET_PORT_ROCE_V1_V2 0x2 1544int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, 1545 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx) 1546{ 1547 struct mlx4_cmd_mailbox *mailbox; 1548 struct mlx4_set_port_general_context *context; 1549 int err; 1550 u32 in_mod; 1551 1552 mailbox = mlx4_alloc_cmd_mailbox(dev); 1553 if (IS_ERR(mailbox)) 1554 return PTR_ERR(mailbox); 1555 context = mailbox->buf; 1556 context->flags = SET_PORT_GEN_ALL_VALID; 1557 context->mtu = cpu_to_be16(mtu); 1558 context->pptx = (pptx * (!pfctx)) << 7; 1559 context->pfctx = pfctx; 1560 context->pprx = (pprx * (!pfcrx)) << 7; 1561 context->pfcrx = pfcrx; 1562 1563 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 1564 context->flags |= SET_PORT_ROCE_2_FLAGS; 1565 context->roce_mode |= 1566 MLX4_SET_PORT_ROCE_V1_V2 << 4; 1567 } 1568 in_mod = MLX4_SET_PORT_GENERAL << 8 | port; 1569 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1570 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1571 MLX4_CMD_WRAPPED); 1572 1573 mlx4_free_cmd_mailbox(dev, mailbox); 1574 return err; 1575} 1576EXPORT_SYMBOL(mlx4_SET_PORT_general); 1577 1578int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, 1579 u8 promisc) 1580{ 1581 struct mlx4_cmd_mailbox *mailbox; 1582 struct mlx4_set_port_rqp_calc_context *context; 1583 int err; 1584 u32 in_mod; 1585 u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ? 1586 MCAST_DIRECT : MCAST_DEFAULT; 1587 1588 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1589 return 0; 1590 1591 mailbox = mlx4_alloc_cmd_mailbox(dev); 1592 if (IS_ERR(mailbox)) 1593 return PTR_ERR(mailbox); 1594 context = mailbox->buf; 1595 context->base_qpn = cpu_to_be32(base_qpn); 1596 context->n_mac = dev->caps.log_num_macs; 1597 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | 1598 base_qpn); 1599 context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT | 1600 base_qpn); 1601 context->intra_no_vlan = 0; 1602 context->no_vlan = MLX4_NO_VLAN_IDX; 1603 context->intra_vlan_miss = 0; 1604 context->vlan_miss = MLX4_VLAN_MISS_IDX; 1605 1606 in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port; 1607 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1608 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1609 MLX4_CMD_WRAPPED); 1610 1611 mlx4_free_cmd_mailbox(dev, mailbox); 1612 return err; 1613} 1614EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc); 1615 1616int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value) 1617{ 1618 struct mlx4_cmd_mailbox *mailbox; 1619 struct mlx4_set_port_general_context *context; 1620 u32 in_mod; 1621 int err; 1622 1623 mailbox = mlx4_alloc_cmd_mailbox(dev); 1624 if (IS_ERR(mailbox)) 1625 return PTR_ERR(mailbox); 1626 context = mailbox->buf; 1627 context->v_ignore_fcs |= MLX4_FLAG_V_IGNORE_FCS_MASK; 1628 if (ignore_fcs_value) 1629 context->ignore_fcs |= MLX4_IGNORE_FCS_MASK; 1630 else 1631 context->ignore_fcs &= ~MLX4_IGNORE_FCS_MASK; 1632 1633 in_mod = MLX4_SET_PORT_GENERAL << 8 | port; 1634 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, 1635 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); 1636 1637 mlx4_free_cmd_mailbox(dev, mailbox); 1638 return err; 1639} 1640EXPORT_SYMBOL(mlx4_SET_PORT_fcs_check); 1641 1642enum { 1643 VXLAN_ENABLE_MODIFY = 1 << 7, 1644 VXLAN_STEERING_MODIFY = 1 << 6, 1645 1646 VXLAN_ENABLE = 1 << 7, 1647}; 1648 1649struct mlx4_set_port_vxlan_context { 1650 u32 reserved1; 1651 u8 modify_flags; 1652 u8 reserved2; 1653 u8 enable_flags; 1654 u8 steering; 1655}; 1656 1657int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable) 1658{ 1659 int err; 1660 u32 in_mod; 1661 struct mlx4_cmd_mailbox *mailbox; 1662 struct mlx4_set_port_vxlan_context *context; 1663 1664 mailbox = mlx4_alloc_cmd_mailbox(dev); 1665 if (IS_ERR(mailbox)) 1666 return PTR_ERR(mailbox); 1667 context = mailbox->buf; 1668 memset(context, 0, sizeof(*context)); 1669 1670 context->modify_flags = VXLAN_ENABLE_MODIFY | VXLAN_STEERING_MODIFY; 1671 if (enable) 1672 context->enable_flags = VXLAN_ENABLE; 1673 context->steering = steering; 1674 1675 in_mod = MLX4_SET_PORT_VXLAN << 8 | port; 1676 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, 1677 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1678 MLX4_CMD_NATIVE); 1679 1680 mlx4_free_cmd_mailbox(dev, mailbox); 1681 return err; 1682} 1683EXPORT_SYMBOL(mlx4_SET_PORT_VXLAN); 1684 1685int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time) 1686{ 1687 int err; 1688 struct mlx4_cmd_mailbox *mailbox; 1689 1690 mailbox = mlx4_alloc_cmd_mailbox(dev); 1691 if (IS_ERR(mailbox)) 1692 return PTR_ERR(mailbox); 1693 1694 *((__be32 *)mailbox->buf) = cpu_to_be32(time); 1695 1696 err = mlx4_cmd(dev, mailbox->dma, port, MLX4_SET_PORT_BEACON_OPCODE, 1697 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1698 MLX4_CMD_NATIVE); 1699 1700 mlx4_free_cmd_mailbox(dev, mailbox); 1701 return err; 1702} 1703EXPORT_SYMBOL(mlx4_SET_PORT_BEACON); 1704 1705int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1706 struct mlx4_vhcr *vhcr, 1707 struct mlx4_cmd_mailbox *inbox, 1708 struct mlx4_cmd_mailbox *outbox, 1709 struct mlx4_cmd_info *cmd) 1710{ 1711 int err = 0; 1712 1713 return err; 1714} 1715 1716int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, 1717 u64 mac, u64 clear, u8 mode) 1718{ 1719 return mlx4_cmd(dev, (mac | (clear << 63)), port, mode, 1720 MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B, 1721 MLX4_CMD_WRAPPED); 1722} 1723EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR); 1724 1725int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, 1726 struct mlx4_vhcr *vhcr, 1727 struct mlx4_cmd_mailbox *inbox, 1728 struct mlx4_cmd_mailbox *outbox, 1729 struct mlx4_cmd_info *cmd) 1730{ 1731 int err = 0; 1732 1733 return err; 1734} 1735 1736int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, 1737 struct mlx4_vhcr *vhcr, 1738 struct mlx4_cmd_mailbox *inbox, 1739 struct mlx4_cmd_mailbox *outbox, 1740 struct mlx4_cmd_info *cmd) 1741{ 1742 return 0; 1743} 1744 1745int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, 1746 int *slave_id) 1747{ 1748 struct mlx4_priv *priv = mlx4_priv(dev); 1749 int i, found_ix = -1; 1750 int vf_gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; 1751 struct mlx4_slaves_pport slaves_pport; 1752 unsigned num_vfs; 1753 int slave_gid; 1754 1755 if (!mlx4_is_mfunc(dev)) 1756 return -EINVAL; 1757 1758 slaves_pport = mlx4_phys_to_slaves_pport(dev, port); 1759 num_vfs = bitmap_weight(slaves_pport.slaves, 1760 dev->persist->num_vfs + 1) - 1; 1761 1762 for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { 1763 if (!memcmp(priv->port[port].gid_table.roce_gids[i].raw, gid, 1764 MLX4_ROCE_GID_ENTRY_SIZE)) { 1765 found_ix = i; 1766 break; 1767 } 1768 } 1769 1770 if (found_ix >= 0) { 1771 /* Calculate a slave_gid which is the slave number in the gid 1772 * table and not a globally unique slave number. 1773 */ 1774 if (found_ix < MLX4_ROCE_PF_GIDS) 1775 slave_gid = 0; 1776 else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * 1777 (vf_gids / num_vfs + 1)) 1778 slave_gid = ((found_ix - MLX4_ROCE_PF_GIDS) / 1779 (vf_gids / num_vfs + 1)) + 1; 1780 else 1781 slave_gid = 1782 ((found_ix - MLX4_ROCE_PF_GIDS - 1783 ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / 1784 (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; 1785 1786 /* Calculate the globally unique slave id */ 1787 if (slave_gid) { 1788 struct mlx4_active_ports exclusive_ports; 1789 struct mlx4_active_ports actv_ports; 1790 struct mlx4_slaves_pport slaves_pport_actv; 1791 unsigned max_port_p_one; 1792 int num_vfs_before = 0; 1793 int candidate_slave_gid; 1794 1795 /* Calculate how many VFs are on the previous port, if exists */ 1796 for (i = 1; i < port; i++) { 1797 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); 1798 set_bit(i - 1, exclusive_ports.ports); 1799 slaves_pport_actv = 1800 mlx4_phys_to_slaves_pport_actv( 1801 dev, &exclusive_ports); 1802 num_vfs_before += bitmap_weight( 1803 slaves_pport_actv.slaves, 1804 dev->persist->num_vfs + 1); 1805 } 1806 1807 /* candidate_slave_gid isn't necessarily the correct slave, but 1808 * it has the same number of ports and is assigned to the same 1809 * ports as the real slave we're looking for. On dual port VF, 1810 * slave_gid = [single port VFs on port <port>] + 1811 * [offset of the current slave from the first dual port VF] + 1812 * 1 (for the PF). 1813 */ 1814 candidate_slave_gid = slave_gid + num_vfs_before; 1815 1816 actv_ports = mlx4_get_active_ports(dev, candidate_slave_gid); 1817 max_port_p_one = find_first_bit( 1818 actv_ports.ports, dev->caps.num_ports) + 1819 bitmap_weight(actv_ports.ports, 1820 dev->caps.num_ports) + 1; 1821 1822 /* Calculate the real slave number */ 1823 for (i = 1; i < max_port_p_one; i++) { 1824 if (i == port) 1825 continue; 1826 bitmap_zero(exclusive_ports.ports, 1827 dev->caps.num_ports); 1828 set_bit(i - 1, exclusive_ports.ports); 1829 slaves_pport_actv = 1830 mlx4_phys_to_slaves_pport_actv( 1831 dev, &exclusive_ports); 1832 slave_gid += bitmap_weight( 1833 slaves_pport_actv.slaves, 1834 dev->persist->num_vfs + 1); 1835 } 1836 } 1837 *slave_id = slave_gid; 1838 } 1839 1840 return (found_ix >= 0) ? 0 : -EINVAL; 1841} 1842EXPORT_SYMBOL(mlx4_get_slave_from_roce_gid); 1843 1844int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, 1845 u8 *gid) 1846{ 1847 struct mlx4_priv *priv = mlx4_priv(dev); 1848 1849 if (!mlx4_is_master(dev)) 1850 return -EINVAL; 1851 1852 memcpy(gid, priv->port[port].gid_table.roce_gids[slave_id].raw, 1853 MLX4_ROCE_GID_ENTRY_SIZE); 1854 return 0; 1855} 1856EXPORT_SYMBOL(mlx4_get_roce_gid_from_slave); 1857 1858/* Cable Module Info */ 1859#define MODULE_INFO_MAX_READ 48 1860 1861#define I2C_ADDR_LOW 0x50 1862#define I2C_ADDR_HIGH 0x51 1863#define I2C_PAGE_SIZE 256 1864 1865/* Module Info Data */ 1866struct mlx4_cable_info { 1867 u8 i2c_addr; 1868 u8 page_num; 1869 __be16 dev_mem_address; 1870 __be16 reserved1; 1871 __be16 size; 1872 __be32 reserved2[2]; 1873 u8 data[MODULE_INFO_MAX_READ]; 1874}; 1875 1876enum cable_info_err { 1877 CABLE_INF_INV_PORT = 0x1, 1878 CABLE_INF_OP_NOSUP = 0x2, 1879 CABLE_INF_NOT_CONN = 0x3, 1880 CABLE_INF_NO_EEPRM = 0x4, 1881 CABLE_INF_PAGE_ERR = 0x5, 1882 CABLE_INF_INV_ADDR = 0x6, 1883 CABLE_INF_I2C_ADDR = 0x7, 1884 CABLE_INF_QSFP_VIO = 0x8, 1885 CABLE_INF_I2C_BUSY = 0x9, 1886}; 1887 1888#define MAD_STATUS_2_CABLE_ERR(mad_status) ((mad_status >> 8) & 0xFF) 1889 1890#ifdef DEBUG 1891static inline const char *cable_info_mad_err_str(u16 mad_status) 1892{ 1893 u8 err = MAD_STATUS_2_CABLE_ERR(mad_status); 1894 1895 switch (err) { 1896 case CABLE_INF_INV_PORT: 1897 return "invalid port selected"; 1898 case CABLE_INF_OP_NOSUP: 1899 return "operation not supported for this port (the port is of type CX4 or internal)"; 1900 case CABLE_INF_NOT_CONN: 1901 return "cable is not connected"; 1902 case CABLE_INF_NO_EEPRM: 1903 return "the connected cable has no EPROM (passive copper cable)"; 1904 case CABLE_INF_PAGE_ERR: 1905 return "page number is greater than 15"; 1906 case CABLE_INF_INV_ADDR: 1907 return "invalid device_address or size (that is, size equals 0 or address+size is greater than 256)"; 1908 case CABLE_INF_I2C_ADDR: 1909 return "invalid I2C slave address"; 1910 case CABLE_INF_QSFP_VIO: 1911 return "at least one cable violates the QSFP specification and ignores the modsel signal"; 1912 case CABLE_INF_I2C_BUSY: 1913 return "I2C bus is constantly busy"; 1914 } 1915 return "Unknown Error"; 1916} 1917#endif /* DEBUG */ 1918 1919/** 1920 * mlx4_get_module_info - Read cable module eeprom data 1921 * @dev: mlx4_dev. 1922 * @port: port number. 1923 * @offset: byte offset in eeprom to start reading data from. 1924 * @size: num of bytes to read. 1925 * @data: output buffer to put the requested data into. 1926 * 1927 * Reads cable module eeprom data, puts the outcome data into 1928 * data pointer paramer. 1929 * Returns num of read bytes on success or a negative error 1930 * code. 1931 */ 1932int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, 1933 u16 offset, u16 size, u8 *data) 1934{ 1935 struct mlx4_cmd_mailbox *inbox, *outbox; 1936 struct mlx4_mad_ifc *inmad, *outmad; 1937 struct mlx4_cable_info *cable_info; 1938 u16 i2c_addr; 1939 int ret; 1940 1941 if (size > MODULE_INFO_MAX_READ) 1942 size = MODULE_INFO_MAX_READ; 1943 1944 inbox = mlx4_alloc_cmd_mailbox(dev); 1945 if (IS_ERR(inbox)) 1946 return PTR_ERR(inbox); 1947 1948 outbox = mlx4_alloc_cmd_mailbox(dev); 1949 if (IS_ERR(outbox)) { 1950 mlx4_free_cmd_mailbox(dev, inbox); 1951 return PTR_ERR(outbox); 1952 } 1953 1954 inmad = (struct mlx4_mad_ifc *)(inbox->buf); 1955 outmad = (struct mlx4_mad_ifc *)(outbox->buf); 1956 1957 inmad->method = 0x1; /* Get */ 1958 inmad->class_version = 0x1; 1959 inmad->mgmt_class = 0x1; 1960 inmad->base_version = 0x1; 1961 inmad->attr_id = cpu_to_be16(0xFF60); /* Module Info */ 1962 1963 if (offset < I2C_PAGE_SIZE && offset + size > I2C_PAGE_SIZE) 1964 /* Cross pages reads are not allowed 1965 * read until offset 256 in low page 1966 */ 1967 size -= offset + size - I2C_PAGE_SIZE; 1968 1969 i2c_addr = I2C_ADDR_LOW; 1970 if (offset >= I2C_PAGE_SIZE) { 1971 /* Reset offset to high page */ 1972 i2c_addr = I2C_ADDR_HIGH; 1973 offset -= I2C_PAGE_SIZE; 1974 } 1975 1976 cable_info = (struct mlx4_cable_info *)inmad->data; 1977 cable_info->dev_mem_address = cpu_to_be16(offset); 1978 cable_info->page_num = 0; 1979 cable_info->i2c_addr = i2c_addr; 1980 cable_info->size = cpu_to_be16(size); 1981 1982 ret = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3, 1983 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, 1984 MLX4_CMD_NATIVE); 1985 if (ret) 1986 goto out; 1987 1988 if (be16_to_cpu(outmad->status)) { 1989 /* Mad returned with bad status */ 1990 ret = be16_to_cpu(outmad->status); 1991#ifdef DEBUG 1992 mlx4_warn(dev, 1993 "MLX4_CMD_MAD_IFC Get Module info attr(%x) port(%d) i2c_addr(%x) offset(%d) size(%d): Response Mad Status(%x) - %s\n", 1994 0xFF60, port, i2c_addr, offset, size, 1995 ret, cable_info_mad_err_str(ret)); 1996#endif 1997 if (i2c_addr == I2C_ADDR_HIGH && 1998 MAD_STATUS_2_CABLE_ERR(ret) == CABLE_INF_I2C_ADDR) 1999 /* Some SFP cables do not support i2c slave 2000 * address 0x51 (high page), abort silently. 2001 */ 2002 ret = 0; 2003 else 2004 ret = -ret; 2005 goto out; 2006 } 2007 cable_info = (struct mlx4_cable_info *)outmad->data; 2008 memcpy(data, cable_info->data, size); 2009 ret = size; 2010out: 2011 mlx4_free_cmd_mailbox(dev, inbox); 2012 mlx4_free_cmd_mailbox(dev, outbox); 2013 return ret; 2014} 2015EXPORT_SYMBOL(mlx4_get_module_info); 2016