e1000phy.c revision 271073
1139749Simp/*- 275353Smjacob * Principal Author: Parag Patel 375353Smjacob * Copyright (c) 2001 475353Smjacob * All rights reserved. 575353Smjacob * 675353Smjacob * Redistribution and use in source and binary forms, with or without 775353Smjacob * modification, are permitted provided that the following conditions 875353Smjacob * are met: 975353Smjacob * 1. Redistributions of source code must retain the above copyright 1075353Smjacob * notice unmodified, this list of conditions, and the following 1175353Smjacob * disclaimer. 1275353Smjacob * 2. Redistributions in binary form must reproduce the above copyright 1375353Smjacob * notice, this list of conditions and the following disclaimer in the 1475353Smjacob * documentation and/or other materials provided with the distribution. 1575353Smjacob * 1675353Smjacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1775353Smjacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1875353Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1975353Smjacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2075353Smjacob * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2175353Smjacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2275353Smjacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2375353Smjacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2475353Smjacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2575353Smjacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2675353Smjacob * SUCH DAMAGE. 2775353Smjacob * 28220938Smarius * Additional Copyright (c) 2001 by Traakan Software under same licence. 2975353Smjacob * Secondary Author: Matthew Jacob 3075353Smjacob */ 3175353Smjacob 32129843Smarius#include <sys/cdefs.h> 33129843Smarius__FBSDID("$FreeBSD: head/sys/dev/mii/e1000phy.c 271073 2014-09-04 01:04:37Z yongari $"); 34129843Smarius 3575353Smjacob/* 3675353Smjacob * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 3775353Smjacob */ 3875353Smjacob 39120281Swilko/* 40120281Swilko * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41120281Swilko * 1000baseSX PHY. 42120281Swilko * Nathan Binkert <nate@openbsd.org> 43120281Swilko * Jung-uk Kim <jkim@niksun.com> 44120281Swilko */ 45120281Swilko 4675353Smjacob#include <sys/param.h> 4775353Smjacob#include <sys/systm.h> 4875353Smjacob#include <sys/kernel.h> 49129876Sphk#include <sys/module.h> 5075353Smjacob#include <sys/socket.h> 5175353Smjacob#include <sys/bus.h> 5275353Smjacob 5375353Smjacob#include <net/if.h> 54257184Sglebius#include <net/if_var.h> 5575353Smjacob#include <net/if_media.h> 5675353Smjacob 5775353Smjacob#include <dev/mii/mii.h> 5875353Smjacob#include <dev/mii/miivar.h> 59109514Sobrien#include "miidevs.h" 6075353Smjacob 6175353Smjacob#include <dev/mii/e1000phyreg.h> 6275353Smjacob 6375353Smjacob#include "miibus_if.h" 6475353Smjacob 65165095Syongaristatic int e1000phy_probe(device_t); 66165095Syongaristatic int e1000phy_attach(device_t); 6775353Smjacob 6875353Smjacobstatic device_method_t e1000phy_methods[] = { 6975353Smjacob /* device interface */ 7075353Smjacob DEVMETHOD(device_probe, e1000phy_probe), 7175353Smjacob DEVMETHOD(device_attach, e1000phy_attach), 7295722Sphk DEVMETHOD(device_detach, mii_phy_detach), 7375353Smjacob DEVMETHOD(device_shutdown, bus_generic_shutdown), 74227908Smarius DEVMETHOD_END 7575353Smjacob}; 7675353Smjacob 7775353Smjacobstatic devclass_t e1000phy_devclass; 7875353Smjacobstatic driver_t e1000phy_driver = { 79165099Syongari "e1000phy", 80165099Syongari e1000phy_methods, 81221407Smarius sizeof(struct mii_softc) 8275353Smjacob}; 83165099Syongari 8475353SmjacobDRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 8575353Smjacob 8684145Sjlemonstatic int e1000phy_service(struct mii_softc *, struct mii_data *, int); 8784145Sjlemonstatic void e1000phy_status(struct mii_softc *); 8884145Sjlemonstatic void e1000phy_reset(struct mii_softc *); 89221407Smariusstatic int e1000phy_mii_phy_auto(struct mii_softc *, int); 9075353Smjacob 91165099Syongaristatic const struct mii_phydesc e1000phys[] = { 92165099Syongari MII_PHY_DESC(MARVELL, E1000), 93165099Syongari MII_PHY_DESC(MARVELL, E1011), 94165099Syongari MII_PHY_DESC(MARVELL, E1000_3), 95165099Syongari MII_PHY_DESC(MARVELL, E1000_5), 96165099Syongari MII_PHY_DESC(MARVELL, E1111), 97165099Syongari MII_PHY_DESC(xxMARVELL, E1000), 98165099Syongari MII_PHY_DESC(xxMARVELL, E1011), 99165099Syongari MII_PHY_DESC(xxMARVELL, E1000_3), 100221407Smarius MII_PHY_DESC(xxMARVELL, E1000S), 101165099Syongari MII_PHY_DESC(xxMARVELL, E1000_5), 102221407Smarius MII_PHY_DESC(xxMARVELL, E1101), 103221407Smarius MII_PHY_DESC(xxMARVELL, E3082), 104221407Smarius MII_PHY_DESC(xxMARVELL, E1112), 105221407Smarius MII_PHY_DESC(xxMARVELL, E1149), 106165099Syongari MII_PHY_DESC(xxMARVELL, E1111), 107221407Smarius MII_PHY_DESC(xxMARVELL, E1116), 108221407Smarius MII_PHY_DESC(xxMARVELL, E1116R), 109238874Shrs MII_PHY_DESC(xxMARVELL, E1116R_29), 110221407Smarius MII_PHY_DESC(xxMARVELL, E1118), 111242272Sjmallett MII_PHY_DESC(xxMARVELL, E1145), 112223688Simp MII_PHY_DESC(xxMARVELL, E1149R), 113221407Smarius MII_PHY_DESC(xxMARVELL, E3016), 114221407Smarius MII_PHY_DESC(xxMARVELL, PHYG65G), 115165099Syongari MII_PHY_END 116165099Syongari}; 11775353Smjacob 118221407Smariusstatic const struct mii_phy_funcs e1000phy_funcs = { 119221407Smarius e1000phy_service, 120221407Smarius e1000phy_status, 121221407Smarius e1000phy_reset 122221407Smarius}; 123221407Smarius 12475353Smjacobstatic int 12575353Smjacobe1000phy_probe(device_t dev) 12675353Smjacob{ 12775353Smjacob 128165099Syongari return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 12975353Smjacob} 13075353Smjacob 13175353Smjacobstatic int 13275353Smjacobe1000phy_attach(device_t dev) 13375353Smjacob{ 13475353Smjacob struct mii_softc *sc; 135266974Smarcel if_t ifp; 13675353Smjacob 137221407Smarius sc = device_get_softc(dev); 13875353Smjacob 139221407Smarius mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &e1000phy_funcs, 0); 14075353Smjacob 141197590Syongari ifp = sc->mii_pdata->mii_ifp; 142266974Smarcel if (strcmp(if_getdname(ifp), "msk") == 0 && 143213893Smarius (sc->mii_flags & MIIF_MACPRIV0) != 0) 144213893Smarius sc->mii_flags |= MIIF_PHYPRIV0; 145197590Syongari 146221407Smarius switch (sc->mii_mpd_model) { 147221407Smarius case MII_MODEL_xxMARVELL_E1011: 148221407Smarius case MII_MODEL_xxMARVELL_E1112: 149165099Syongari if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 150165099Syongari sc->mii_flags |= MIIF_HAVEFIBER; 151165099Syongari break; 152221407Smarius case MII_MODEL_xxMARVELL_E1149: 153223688Simp case MII_MODEL_xxMARVELL_E1149R: 154183966Syongari /* 155183966Syongari * Some 88E1149 PHY's page select is initialized to 156183966Syongari * point to other bank instead of copper/fiber bank 157183966Syongari * which in turn resulted in wrong registers were 158183966Syongari * accessed during PHY operation. It is believed that 159183966Syongari * page 0 should be used for copper PHY so reinitialize 160183966Syongari * E1000_EADR to select default copper PHY. If parent 161183966Syongari * device know the type of PHY(either copper or fiber), 162183966Syongari * that information should be used to select default 163183966Syongari * type of PHY. 164183966Syongari */ 165183966Syongari PHY_WRITE(sc, E1000_EADR, 0); 166183966Syongari break; 167165099Syongari } 168165099Syongari 169221407Smarius PHY_RESET(sc); 17075353Smjacob 171221407Smarius sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; 172271073Syongari if (sc->mii_capabilities & BMSR_EXTSTAT) { 173192708Syongari sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 174271073Syongari if ((sc->mii_extcapabilities & 175271073Syongari (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 176271073Syongari sc->mii_flags |= MIIF_HAVE_GTCR; 177271073Syongari } 17884144Sjlemon device_printf(dev, " "); 179192708Syongari mii_phy_add_media(sc); 180192708Syongari printf("\n"); 18184144Sjlemon 18275353Smjacob MIIBUS_MEDIAINIT(sc->mii_dev); 183165095Syongari return (0); 18475353Smjacob} 18575353Smjacob 18675353Smjacobstatic void 18775353Smjacobe1000phy_reset(struct mii_softc *sc) 18875353Smjacob{ 189183493Syongari uint16_t reg, page; 19075353Smjacob 19175353Smjacob reg = PHY_READ(sc, E1000_SCR); 192165099Syongari if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 193165099Syongari reg &= ~E1000_SCR_AUTO_X_MODE; 194165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 195221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1112) { 196165099Syongari /* Select 1000BASE-X only mode. */ 197183493Syongari page = PHY_READ(sc, E1000_EADR); 198165099Syongari PHY_WRITE(sc, E1000_EADR, 2); 199165099Syongari reg = PHY_READ(sc, E1000_SCR); 200165099Syongari reg &= ~E1000_SCR_MODE_MASK; 201165099Syongari reg |= E1000_SCR_MODE_1000BX; 202165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 203214566Smarius if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { 204197590Syongari /* Set SIGDET polarity low for SFP module. */ 205197590Syongari PHY_WRITE(sc, E1000_EADR, 1); 206197590Syongari reg = PHY_READ(sc, E1000_SCR); 207197590Syongari reg |= E1000_SCR_FIB_SIGDET_POLARITY; 208197590Syongari PHY_WRITE(sc, E1000_SCR, reg); 209197590Syongari } 210183493Syongari PHY_WRITE(sc, E1000_EADR, page); 211165099Syongari } 212165099Syongari } else { 213221407Smarius switch (sc->mii_mpd_model) { 214221407Smarius case MII_MODEL_xxMARVELL_E1111: 215221407Smarius case MII_MODEL_xxMARVELL_E1112: 216221407Smarius case MII_MODEL_xxMARVELL_E1116: 217238874Shrs case MII_MODEL_xxMARVELL_E1116R_29: 218221407Smarius case MII_MODEL_xxMARVELL_E1118: 219221407Smarius case MII_MODEL_xxMARVELL_E1149: 220223688Simp case MII_MODEL_xxMARVELL_E1149R: 221221407Smarius case MII_MODEL_xxMARVELL_PHYG65G: 222165099Syongari /* Disable energy detect mode. */ 223165099Syongari reg &= ~E1000_SCR_EN_DETECT_MASK; 224165099Syongari reg |= E1000_SCR_AUTO_X_MODE; 225238874Shrs if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || 226238874Shrs sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116R_29) 227173133Syongari reg &= ~E1000_SCR_POWER_DOWN; 228192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 229165099Syongari break; 230221407Smarius case MII_MODEL_xxMARVELL_E3082: 231165099Syongari reg |= (E1000_SCR_AUTO_X_MODE >> 1); 232192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 233165099Syongari break; 234221407Smarius case MII_MODEL_xxMARVELL_E3016: 235192713Syongari reg |= E1000_SCR_AUTO_MDIX; 236192713Syongari reg &= ~(E1000_SCR_EN_DETECT | 237192713Syongari E1000_SCR_SCRAMBLER_DISABLE); 238192713Syongari reg |= E1000_SCR_LPNP; 239192713Syongari /* XXX Enable class A driver for Yukon FE+ A0. */ 240192713Syongari PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); 241192713Syongari break; 242165099Syongari default: 243165099Syongari reg &= ~E1000_SCR_AUTO_X_MODE; 244192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 245165099Syongari break; 246165099Syongari } 247221407Smarius if (sc->mii_mpd_model != MII_MODEL_xxMARVELL_E3016) { 248192713Syongari /* Auto correction for reversed cable polarity. */ 249192713Syongari reg &= ~E1000_SCR_POLARITY_REVERSAL; 250192713Syongari } 251165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 252173133Syongari 253221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || 254238874Shrs sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116R_29 || 255223688Simp sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149 || 256223688Simp sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149R) { 257173133Syongari PHY_WRITE(sc, E1000_EADR, 2); 258173133Syongari reg = PHY_READ(sc, E1000_SCR); 259173133Syongari reg |= E1000_SCR_RGMII_POWER_UP; 260173133Syongari PHY_WRITE(sc, E1000_SCR, reg); 261196366Syongari PHY_WRITE(sc, E1000_EADR, 0); 262173133Syongari } 263165099Syongari } 26475353Smjacob 265221407Smarius switch (sc->mii_mpd_model) { 266221407Smarius case MII_MODEL_xxMARVELL_E3082: 267221407Smarius case MII_MODEL_xxMARVELL_E1112: 268221407Smarius case MII_MODEL_xxMARVELL_E1118: 269193291Syongari break; 270221407Smarius case MII_MODEL_xxMARVELL_E1116: 271238874Shrs case MII_MODEL_xxMARVELL_E1116R_29: 272193291Syongari page = PHY_READ(sc, E1000_EADR); 273193291Syongari /* Select page 3, LED control register. */ 274193291Syongari PHY_WRITE(sc, E1000_EADR, 3); 275193291Syongari PHY_WRITE(sc, E1000_SCR, 276193291Syongari E1000_SCR_LED_LOS(1) | /* Link/Act */ 277193291Syongari E1000_SCR_LED_INIT(8) | /* 10Mbps */ 278193291Syongari E1000_SCR_LED_STAT1(7) | /* 100Mbps */ 279193291Syongari E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ 280193291Syongari /* Set blink rate. */ 281193291Syongari PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | 282193291Syongari E1000_BLINK_RATE(E1000_BLINK_84MS)); 283193291Syongari PHY_WRITE(sc, E1000_EADR, page); 284165099Syongari break; 285221407Smarius case MII_MODEL_xxMARVELL_E3016: 286192713Syongari /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ 287192713Syongari PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); 288192713Syongari /* Integrated register calibration workaround. */ 289192713Syongari PHY_WRITE(sc, 0x1D, 17); 290192713Syongari PHY_WRITE(sc, 0x1E, 0x3F60); 291192713Syongari break; 292165099Syongari default: 293165099Syongari /* Force TX_CLK to 25MHz clock. */ 294165099Syongari reg = PHY_READ(sc, E1000_ESCR); 295165099Syongari reg |= E1000_ESCR_TX_CLK_25; 296165099Syongari PHY_WRITE(sc, E1000_ESCR, reg); 297165099Syongari break; 298165099Syongari } 299165099Syongari 300165099Syongari /* Reset the PHY so all changes take effect. */ 30175353Smjacob reg = PHY_READ(sc, E1000_CR); 30275353Smjacob reg |= E1000_CR_RESET; 30375353Smjacob PHY_WRITE(sc, E1000_CR, reg); 30475353Smjacob} 30575353Smjacob 30684145Sjlemonstatic int 30775353Smjacobe1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 30875353Smjacob{ 30975353Smjacob struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 310165099Syongari uint16_t speed, gig; 31175353Smjacob int reg; 31275353Smjacob 31375353Smjacob switch (cmd) { 31475353Smjacob case MII_POLLSTAT: 31575353Smjacob break; 31675353Smjacob 31775353Smjacob case MII_MEDIACHG: 318165099Syongari if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 319221407Smarius e1000phy_mii_phy_auto(sc, ife->ifm_media); 32075353Smjacob break; 321165099Syongari } 32275353Smjacob 323165099Syongari speed = 0; 324165099Syongari switch (IFM_SUBTYPE(ife->ifm_media)) { 32595673Sphk case IFM_1000_T: 326271073Syongari if ((sc->mii_flags & MIIF_HAVE_GTCR) == 0) 327165099Syongari return (EINVAL); 328165099Syongari speed = E1000_CR_SPEED_1000; 32975353Smjacob break; 330120281Swilko case IFM_1000_SX: 331192708Syongari if ((sc->mii_extcapabilities & 332192708Syongari (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) 333165099Syongari return (EINVAL); 334165099Syongari speed = E1000_CR_SPEED_1000; 335120281Swilko break; 33675353Smjacob case IFM_100_TX: 337165099Syongari speed = E1000_CR_SPEED_100; 33875353Smjacob break; 33975353Smjacob case IFM_10_T: 340165099Syongari speed = E1000_CR_SPEED_10; 34175353Smjacob break; 342165099Syongari case IFM_NONE: 343165099Syongari reg = PHY_READ(sc, E1000_CR); 344165099Syongari PHY_WRITE(sc, E1000_CR, 345165099Syongari reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 346165099Syongari goto done; 34775353Smjacob default: 34875353Smjacob return (EINVAL); 34975353Smjacob } 35075353Smjacob 351217412Smarius if ((ife->ifm_media & IFM_FDX) != 0) { 352165099Syongari speed |= E1000_CR_FULL_DUPLEX; 353165099Syongari gig = E1000_1GCR_1000T_FD; 354165099Syongari } else 355165099Syongari gig = E1000_1GCR_1000T; 356165099Syongari 357165099Syongari reg = PHY_READ(sc, E1000_CR); 358165099Syongari reg &= ~E1000_CR_AUTO_NEG_ENABLE; 359165099Syongari PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 360165099Syongari 361215297Smarius if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 362215297Smarius gig |= E1000_1GCR_MS_ENABLE; 363271073Syongari if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 364215297Smarius gig |= E1000_1GCR_MS_VALUE; 365271073Syongari } else if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) 366217412Smarius gig = 0; 367217412Smarius PHY_WRITE(sc, E1000_1GCR, gig); 368165099Syongari PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 369165099Syongari PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 370165099Syongaridone: 37175353Smjacob break; 37275353Smjacob case MII_TICK: 37375353Smjacob /* 37484145Sjlemon * Only used for autonegotiation. 37575353Smjacob */ 376173667Syongari if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 377173667Syongari sc->mii_ticks = 0; 37884145Sjlemon break; 379173667Syongari } 38075353Smjacob 38175353Smjacob /* 38284145Sjlemon * check for link. 38384145Sjlemon * Read the status register twice; BMSR_LINK is latch-low. 38475353Smjacob */ 38584145Sjlemon reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 386165099Syongari if (reg & BMSR_LINK) { 387165099Syongari sc->mii_ticks = 0; 38884145Sjlemon break; 389165099Syongari } 39075353Smjacob 391165099Syongari /* Announce link loss right after it happens. */ 392173667Syongari if (sc->mii_ticks++ == 0) 393173667Syongari break; 394165099Syongari if (sc->mii_ticks <= sc->mii_anegticks) 395192709Syongari break; 39675353Smjacob 39784145Sjlemon sc->mii_ticks = 0; 398221407Smarius PHY_RESET(sc); 399221407Smarius e1000phy_mii_phy_auto(sc, ife->ifm_media); 400165099Syongari break; 40175353Smjacob } 40275353Smjacob 40375353Smjacob /* Update the media status. */ 404221407Smarius PHY_STATUS(sc); 40575353Smjacob 40675353Smjacob /* Callback if something changed. */ 40784145Sjlemon mii_phy_update(sc, cmd); 40875353Smjacob return (0); 40975353Smjacob} 41075353Smjacob 41184145Sjlemonstatic void 41275353Smjacobe1000phy_status(struct mii_softc *sc) 41375353Smjacob{ 41475353Smjacob struct mii_data *mii = sc->mii_pdata; 415215297Smarius int bmcr, bmsr, ssr; 41675353Smjacob 41775353Smjacob mii->mii_media_status = IFM_AVALID; 41875353Smjacob mii->mii_media_active = IFM_ETHER; 41975353Smjacob 42075353Smjacob bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 42175353Smjacob bmcr = PHY_READ(sc, E1000_CR); 42275353Smjacob ssr = PHY_READ(sc, E1000_SSR); 42375353Smjacob 42475353Smjacob if (bmsr & E1000_SR_LINK_STATUS) 42575353Smjacob mii->mii_media_status |= IFM_ACTIVE; 42675353Smjacob 42775353Smjacob if (bmcr & E1000_CR_LOOPBACK) 42875353Smjacob mii->mii_media_active |= IFM_LOOP; 42975353Smjacob 430192710Syongari if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && 431192710Syongari (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { 43275353Smjacob /* Erg, still trying, I guess... */ 43375353Smjacob mii->mii_media_active |= IFM_NONE; 43475353Smjacob return; 43575353Smjacob } 43675353Smjacob 437120281Swilko if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 438192710Syongari switch (ssr & E1000_SSR_SPEED) { 439192710Syongari case E1000_SSR_1000MBS: 440120281Swilko mii->mii_media_active |= IFM_1000_T; 441192710Syongari break; 442192710Syongari case E1000_SSR_100MBS: 443120281Swilko mii->mii_media_active |= IFM_100_TX; 444192710Syongari break; 445192710Syongari case E1000_SSR_10MBS: 446120281Swilko mii->mii_media_active |= IFM_10_T; 447192710Syongari break; 448192710Syongari default: 449192710Syongari mii->mii_media_active |= IFM_NONE; 450192710Syongari return; 451192710Syongari } 452120281Swilko } else { 453197588Syongari /* 454197588Syongari * Some fiber PHY(88E1112) does not seem to set resolved 455197588Syongari * speed so always assume we've got IFM_1000_SX. 456197588Syongari */ 457197588Syongari mii->mii_media_active |= IFM_1000_SX; 458120281Swilko } 45975353Smjacob 460215297Smarius if (ssr & E1000_SSR_DUPLEX) { 46175353Smjacob mii->mii_media_active |= IFM_FDX; 462215297Smarius if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) 463215297Smarius mii->mii_media_active |= mii_phy_flowstatus(sc); 464215297Smarius } else 46575353Smjacob mii->mii_media_active |= IFM_HDX; 46675353Smjacob 467215297Smarius if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 468215297Smarius if (((PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR)) & 469215297Smarius E1000_1GSR_MS_CONFIG_RES) != 0) 470215297Smarius mii->mii_media_active |= IFM_ETH_MASTER; 47175353Smjacob } 47275353Smjacob} 47375353Smjacob 47475353Smjacobstatic int 475221407Smariuse1000phy_mii_phy_auto(struct mii_softc *sc, int media) 47675353Smjacob{ 477192711Syongari uint16_t reg; 47875353Smjacob 479192711Syongari if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 480192711Syongari reg = PHY_READ(sc, E1000_AR); 481215923Smarius reg &= ~(E1000_AR_PAUSE | E1000_AR_ASM_DIR); 482192711Syongari reg |= E1000_AR_10T | E1000_AR_10T_FD | 483215297Smarius E1000_AR_100TX | E1000_AR_100TX_FD; 484215297Smarius if ((media & IFM_FLOW) != 0 || 485215297Smarius (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 486215297Smarius reg |= E1000_AR_PAUSE | E1000_AR_ASM_DIR; 487192711Syongari PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); 488192711Syongari } else 489215297Smarius PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); 490271073Syongari if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { 491271073Syongari reg = 0; 492271073Syongari if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) 493271073Syongari reg |= E1000_1GCR_1000T_FD; 494271073Syongari if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) 495271073Syongari reg |= E1000_1GCR_1000T; 496271073Syongari PHY_WRITE(sc, E1000_1GCR, reg); 497271073Syongari } 498165099Syongari PHY_WRITE(sc, E1000_CR, 499165099Syongari E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 50075353Smjacob 50175353Smjacob return (EJUSTRETURN); 50275353Smjacob} 503