if_malo.c revision 201758
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3 * Copyright (c) 2007 Marvell Semiconductor, Inc. 4 * Copyright (c) 2007 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32#include <sys/cdefs.h> 33#ifdef __FreeBSD__ 34__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 201758 2010-01-07 21:01:37Z mbr $"); 35#endif 36 37#include "opt_malo.h" 38 39#include <sys/param.h> 40#include <sys/endian.h> 41#include <sys/kernel.h> 42#include <sys/socket.h> 43#include <sys/sockio.h> 44#include <sys/sysctl.h> 45#include <sys/taskqueue.h> 46 47#include <machine/bus.h> 48#include <sys/bus.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_media.h> 53#include <net/if_types.h> 54#include <net/ethernet.h> 55 56#include <net80211/ieee80211_var.h> 57#include <net80211/ieee80211_regdomain.h> 58 59#include <net/bpf.h> 60 61#include <dev/malo/if_malo.h> 62 63SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64 "Marvell 88w8335 driver parameters"); 65 66static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68 0, "tx buffers to send at once"); 69TUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72 0, "rx buffers allocated"); 73TUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76 0, "max rx buffers to process per interrupt"); 77TUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80 0, "tx buffers allocated"); 81TUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82 83#ifdef MALO_DEBUG 84static int malo_debug = 0; 85SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86 0, "control debugging printfs"); 87TUNABLE_INT("hw.malo.debug", &malo_debug); 88enum { 89 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93 MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94 MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98 MALO_DEBUG_NODE = 0x00000800, /* node management */ 99 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100 MALO_DEBUG_FW = 0x00008000, /* firmware */ 101 MALO_DEBUG_ANY = 0xffffffff 102}; 103#define IS_BEACON(wh) \ 104 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105 IEEE80211_FC0_SUBTYPE_MASK)) == \ 106 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107#define IFF_DUMPPKTS_RECV(sc, wh) \ 108 (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111 (IFF_DEBUG|IFF_LINK2)) 112#define IFF_DUMPPKTS_XMIT(sc) \ 113 ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115 (IFF_DEBUG | IFF_LINK2)) 116#define DPRINTF(sc, m, fmt, ...) do { \ 117 if (sc->malo_debug & (m)) \ 118 printf(fmt, __VA_ARGS__); \ 119} while (0) 120#else 121#define DPRINTF(sc, m, fmt, ...) do { \ 122 (void) sc; \ 123} while (0) 124#endif 125 126MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127 128static struct ieee80211vap *malo_vap_create(struct ieee80211com *ic, 129 const char name[IFNAMSIZ], int unit, int opmode, int flags, 130 const uint8_t bssid[IEEE80211_ADDR_LEN], 131 const uint8_t mac[IEEE80211_ADDR_LEN]); 132static void malo_vap_delete(struct ieee80211vap *); 133static int malo_dma_setup(struct malo_softc *); 134static int malo_setup_hwdma(struct malo_softc *); 135static void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137static void malo_start(struct ifnet *); 138static void malo_watchdog(void *); 139static int malo_ioctl(struct ifnet *, u_long, caddr_t); 140static void malo_updateslot(struct ifnet *); 141static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142static void malo_scan_start(struct ieee80211com *); 143static void malo_scan_end(struct ieee80211com *); 144static void malo_set_channel(struct ieee80211com *); 145static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146 const struct ieee80211_bpf_params *); 147static void malo_sysctlattach(struct malo_softc *); 148static void malo_announce(struct malo_softc *); 149static void malo_dma_cleanup(struct malo_softc *); 150static void malo_stop_locked(struct ifnet *, int); 151static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 152static int malo_mode_init(struct malo_softc *); 153static void malo_tx_proc(void *, int); 154static void malo_rx_proc(void *, int); 155static void malo_init(void *); 156 157/* 158 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 159 * operations are done in the "hal" except getting H/W MAC address at 160 * malo_attach and there should be no reference to them here. 161 */ 162static uint32_t 163malo_bar0_read4(struct malo_softc *sc, bus_size_t off) 164{ 165 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 166} 167 168static void 169malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 170{ 171 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%zx val 0x%x\n", 172 __func__, off, val); 173 174 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 175} 176 177int 178malo_attach(uint16_t devid, struct malo_softc *sc) 179{ 180 int error; 181 struct ieee80211com *ic; 182 struct ifnet *ifp; 183 struct malo_hal *mh; 184 uint8_t bands; 185 186 ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 187 if (ifp == NULL) { 188 device_printf(sc->malo_dev, "can not if_alloc()\n"); 189 return ENOSPC; 190 } 191 ic = ifp->if_l2com; 192 193 MALO_LOCK_INIT(sc); 194 callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0); 195 196 /* set these up early for if_printf use */ 197 if_initname(ifp, device_get_name(sc->malo_dev), 198 device_get_unit(sc->malo_dev)); 199 200 mh = malo_hal_attach(sc->malo_dev, devid, 201 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 202 if (mh == NULL) { 203 if_printf(ifp, "unable to attach HAL\n"); 204 error = EIO; 205 goto bad; 206 } 207 sc->malo_mh = mh; 208 209 /* 210 * Load firmware so we can get setup. We arbitrarily pick station 211 * firmware; we'll re-load firmware as needed so setting up 212 * the wrong mode isn't a big deal. 213 */ 214 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 215 if (error != 0) { 216 if_printf(ifp, "unable to setup firmware\n"); 217 goto bad1; 218 } 219 /* XXX gethwspecs() extracts correct informations? not maybe! */ 220 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 221 if (error != 0) { 222 if_printf(ifp, "unable to fetch h/w specs\n"); 223 goto bad1; 224 } 225 226 DPRINTF(sc, MALO_DEBUG_FW, 227 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 228 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 229 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 230 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 231 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 232 sc->malo_hwspecs.hwversion, 233 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 234 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 235 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 236 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 237 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 238 sc->malo_hwspecs.ul_fw_awakecookie, 239 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 240 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 241 242 /* NB: firmware looks that it does not export regdomain info API. */ 243 bands = 0; 244 setbit(&bands, IEEE80211_MODE_11B); 245 setbit(&bands, IEEE80211_MODE_11G); 246 ieee80211_init_channels(ic, NULL, &bands); 247 248 sc->malo_txantenna = 0x2; /* h/w default */ 249 sc->malo_rxantenna = 0xffff; /* h/w default */ 250 251 /* 252 * Allocate tx + rx descriptors and populate the lists. 253 * We immediately push the information to the firmware 254 * as otherwise it gets upset. 255 */ 256 error = malo_dma_setup(sc); 257 if (error != 0) { 258 if_printf(ifp, "failed to setup descriptors: %d\n", error); 259 goto bad1; 260 } 261 error = malo_setup_hwdma(sc); /* push to firmware */ 262 if (error != 0) /* NB: malo_setupdma prints msg */ 263 goto bad2; 264 265 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 266 taskqueue_thread_enqueue, &sc->malo_tq); 267 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 268 "%s taskq", ifp->if_xname); 269 270 TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 271 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 272 273 ifp->if_softc = sc; 274 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 275 ifp->if_start = malo_start; 276 ifp->if_ioctl = malo_ioctl; 277 ifp->if_init = malo_init; 278 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 279 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 280 IFQ_SET_READY(&ifp->if_snd); 281 282 ic->ic_ifp = ifp; 283 /* XXX not right but it's not used anywhere important */ 284 ic->ic_phytype = IEEE80211_T_OFDM; 285 ic->ic_opmode = IEEE80211_M_STA; 286 ic->ic_caps = 287 IEEE80211_C_STA /* station mode supported */ 288 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 289 | IEEE80211_C_MONITOR /* monitor mode */ 290 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 291 | IEEE80211_C_SHSLOT /* short slot time supported */ 292 | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 293 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 294 ; 295 296 /* 297 * Transmit requires space in the packet for a special format transmit 298 * record and optional padding between this record and the payload. 299 * Ask the net80211 layer to arrange this when encapsulating 300 * packets so we can add it efficiently. 301 */ 302 ic->ic_headroom = sizeof(struct malo_txrec) - 303 sizeof(struct ieee80211_frame); 304 305 /* call MI attach routine. */ 306 ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 307 /* override default methods */ 308 ic->ic_vap_create = malo_vap_create; 309 ic->ic_vap_delete = malo_vap_delete; 310 ic->ic_raw_xmit = malo_raw_xmit; 311 ic->ic_updateslot = malo_updateslot; 312 313 ic->ic_scan_start = malo_scan_start; 314 ic->ic_scan_end = malo_scan_end; 315 ic->ic_set_channel = malo_set_channel; 316 317 sc->malo_invalid = 0; /* ready to go, enable int handling */ 318 319 ieee80211_radiotap_attach(ic, 320 &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th), 321 MALO_TX_RADIOTAP_PRESENT, 322 &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th), 323 MALO_RX_RADIOTAP_PRESENT); 324 325 /* 326 * Setup dynamic sysctl's. 327 */ 328 malo_sysctlattach(sc); 329 330 if (bootverbose) 331 ieee80211_announce(ic); 332 malo_announce(sc); 333 334 return 0; 335bad2: 336 malo_dma_cleanup(sc); 337bad1: 338 malo_hal_detach(mh); 339bad: 340 if_free(ifp); 341 sc->malo_invalid = 1; 342 343 return error; 344} 345 346static struct ieee80211vap * 347malo_vap_create(struct ieee80211com *ic, 348 const char name[IFNAMSIZ], int unit, int opmode, int flags, 349 const uint8_t bssid[IEEE80211_ADDR_LEN], 350 const uint8_t mac[IEEE80211_ADDR_LEN]) 351{ 352 struct ifnet *ifp = ic->ic_ifp; 353 struct malo_vap *mvp; 354 struct ieee80211vap *vap; 355 356 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 357 if_printf(ifp, "multiple vaps not supported\n"); 358 return NULL; 359 } 360 switch (opmode) { 361 case IEEE80211_M_STA: 362 if (opmode == IEEE80211_M_STA) 363 flags |= IEEE80211_CLONE_NOBEACONS; 364 /* fall thru... */ 365 case IEEE80211_M_MONITOR: 366 break; 367 default: 368 if_printf(ifp, "%s mode not supported\n", 369 ieee80211_opmode_name[opmode]); 370 return NULL; /* unsupported */ 371 } 372 mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 373 M_80211_VAP, M_NOWAIT | M_ZERO); 374 if (mvp == NULL) { 375 if_printf(ifp, "cannot allocate vap state block\n"); 376 return NULL; 377 } 378 vap = &mvp->malo_vap; 379 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 380 381 /* override state transition machine */ 382 mvp->malo_newstate = vap->iv_newstate; 383 vap->iv_newstate = malo_newstate; 384 385 /* complete setup */ 386 ieee80211_vap_attach(vap, 387 ieee80211_media_change, ieee80211_media_status); 388 ic->ic_opmode = opmode; 389 return vap; 390} 391 392static void 393malo_vap_delete(struct ieee80211vap *vap) 394{ 395 struct malo_vap *mvp = MALO_VAP(vap); 396 397 ieee80211_vap_detach(vap); 398 free(mvp, M_80211_VAP); 399} 400 401int 402malo_intr(void *arg) 403{ 404 struct malo_softc *sc = arg; 405 struct malo_hal *mh = sc->malo_mh; 406 uint32_t status; 407 408 if (sc->malo_invalid) { 409 /* 410 * The hardware is not ready/present, don't touch anything. 411 * Note this can happen early on if the IRQ is shared. 412 */ 413 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 414 return (FILTER_STRAY); 415 } 416 417 /* 418 * Figure out the reason(s) for the interrupt. 419 */ 420 malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 421 if (status == 0) /* must be a shared irq */ 422 return (FILTER_STRAY); 423 424 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 425 __func__, status, sc->malo_imask); 426 427 if (status & MALO_A2HRIC_BIT_RX_RDY) 428 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 429 if (status & MALO_A2HRIC_BIT_TX_DONE) 430 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 431 if (status & MALO_A2HRIC_BIT_OPC_DONE) 432 malo_hal_cmddone(mh); 433 if (status & MALO_A2HRIC_BIT_MAC_EVENT) 434 ; 435 if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 436 ; 437 if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 438 /* TKIP ICV error */ 439 sc->malo_stats.mst_rx_badtkipicv++; 440 } 441#ifdef MALO_DEBUG 442 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 443 DPRINTF(sc, MALO_DEBUG_INTR, 444 "%s: can't handle interrupt status 0x%x\n", 445 __func__, status); 446#endif 447 return (FILTER_HANDLED); 448} 449 450static void 451malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 452{ 453 bus_addr_t *paddr = (bus_addr_t*) arg; 454 455 KASSERT(error == 0, ("error %u on bus_dma callback", error)); 456 457 *paddr = segs->ds_addr; 458} 459 460static int 461malo_desc_setup(struct malo_softc *sc, const char *name, 462 struct malo_descdma *dd, 463 int nbuf, size_t bufsize, int ndesc, size_t descsize) 464{ 465 int error; 466 struct ifnet *ifp = sc->malo_ifp; 467 uint8_t *ds; 468 469 DPRINTF(sc, MALO_DEBUG_RESET, 470 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 471 __func__, name, nbuf, (uintmax_t) bufsize, 472 ndesc, (uintmax_t) descsize); 473 474 dd->dd_name = name; 475 dd->dd_desc_len = nbuf * ndesc * descsize; 476 477 /* 478 * Setup DMA descriptor area. 479 */ 480 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 481 PAGE_SIZE, 0, /* alignment, bounds */ 482 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 483 BUS_SPACE_MAXADDR, /* highaddr */ 484 NULL, NULL, /* filter, filterarg */ 485 dd->dd_desc_len, /* maxsize */ 486 1, /* nsegments */ 487 dd->dd_desc_len, /* maxsegsize */ 488 BUS_DMA_ALLOCNOW, /* flags */ 489 NULL, /* lockfunc */ 490 NULL, /* lockarg */ 491 &dd->dd_dmat); 492 if (error != 0) { 493 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 494 return error; 495 } 496 497 /* allocate descriptors */ 498 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 499 if (error != 0) { 500 if_printf(ifp, "unable to create dmamap for %s descriptors, " 501 "error %u\n", dd->dd_name, error); 502 goto fail0; 503 } 504 505 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 506 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 507 if (error != 0) { 508 if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 509 "error %u\n", nbuf * ndesc, dd->dd_name, error); 510 goto fail1; 511 } 512 513 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 514 dd->dd_desc, dd->dd_desc_len, 515 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 516 if (error != 0) { 517 if_printf(ifp, "unable to map %s descriptors, error %u\n", 518 dd->dd_name, error); 519 goto fail2; 520 } 521 522 ds = dd->dd_desc; 523 memset(ds, 0, dd->dd_desc_len); 524 DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 525 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 526 (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 527 528 return 0; 529fail2: 530 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 531fail1: 532 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 533fail0: 534 bus_dma_tag_destroy(dd->dd_dmat); 535 memset(dd, 0, sizeof(*dd)); 536 return error; 537} 538 539#define DS2PHYS(_dd, _ds) \ 540 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 541 542static int 543malo_rxdma_setup(struct malo_softc *sc) 544{ 545 struct ifnet *ifp = sc->malo_ifp; 546 int error, bsize, i; 547 struct malo_rxbuf *bf; 548 struct malo_rxdesc *ds; 549 550 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 551 malo_rxbuf, sizeof(struct malo_rxbuf), 552 1, sizeof(struct malo_rxdesc)); 553 if (error != 0) 554 return error; 555 556 /* 557 * Allocate rx buffers and set them up. 558 */ 559 bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 560 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 561 if (bf == NULL) { 562 if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 563 return error; 564 } 565 sc->malo_rxdma.dd_bufptr = bf; 566 567 STAILQ_INIT(&sc->malo_rxbuf); 568 ds = sc->malo_rxdma.dd_desc; 569 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 570 bf->bf_desc = ds; 571 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 572 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 573 &bf->bf_dmamap); 574 if (error != 0) { 575 if_printf(ifp, "%s: unable to dmamap for rx buffer, " 576 "error %d\n", __func__, error); 577 return error; 578 } 579 /* NB: tail is intentional to preserve descriptor order */ 580 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 581 } 582 return 0; 583} 584 585static int 586malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 587{ 588 struct ifnet *ifp = sc->malo_ifp; 589 int error, bsize, i; 590 struct malo_txbuf *bf; 591 struct malo_txdesc *ds; 592 593 error = malo_desc_setup(sc, "tx", &txq->dma, 594 malo_txbuf, sizeof(struct malo_txbuf), 595 MALO_TXDESC, sizeof(struct malo_txdesc)); 596 if (error != 0) 597 return error; 598 599 /* allocate and setup tx buffers */ 600 bsize = malo_txbuf * sizeof(struct malo_txbuf); 601 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 602 if (bf == NULL) { 603 if_printf(ifp, "malloc of %u tx buffers failed\n", 604 malo_txbuf); 605 return ENOMEM; 606 } 607 txq->dma.dd_bufptr = bf; 608 609 STAILQ_INIT(&txq->free); 610 txq->nfree = 0; 611 ds = txq->dma.dd_desc; 612 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 613 bf->bf_desc = ds; 614 bf->bf_daddr = DS2PHYS(&txq->dma, ds); 615 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 616 &bf->bf_dmamap); 617 if (error != 0) { 618 if_printf(ifp, "unable to create dmamap for tx " 619 "buffer %u, error %u\n", i, error); 620 return error; 621 } 622 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 623 txq->nfree++; 624 } 625 626 return 0; 627} 628 629static void 630malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 631{ 632 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 633 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 634 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 635 bus_dma_tag_destroy(dd->dd_dmat); 636 637 memset(dd, 0, sizeof(*dd)); 638} 639 640static void 641malo_rxdma_cleanup(struct malo_softc *sc) 642{ 643 struct malo_rxbuf *bf; 644 645 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 646 if (bf->bf_m != NULL) { 647 m_freem(bf->bf_m); 648 bf->bf_m = NULL; 649 } 650 if (bf->bf_dmamap != NULL) { 651 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 652 bf->bf_dmamap = NULL; 653 } 654 } 655 STAILQ_INIT(&sc->malo_rxbuf); 656 if (sc->malo_rxdma.dd_bufptr != NULL) { 657 free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 658 sc->malo_rxdma.dd_bufptr = NULL; 659 } 660 if (sc->malo_rxdma.dd_desc_len != 0) 661 malo_desc_cleanup(sc, &sc->malo_rxdma); 662} 663 664static void 665malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 666{ 667 struct malo_txbuf *bf; 668 struct ieee80211_node *ni; 669 670 STAILQ_FOREACH(bf, &txq->free, bf_list) { 671 if (bf->bf_m != NULL) { 672 m_freem(bf->bf_m); 673 bf->bf_m = NULL; 674 } 675 ni = bf->bf_node; 676 bf->bf_node = NULL; 677 if (ni != NULL) { 678 /* 679 * Reclaim node reference. 680 */ 681 ieee80211_free_node(ni); 682 } 683 if (bf->bf_dmamap != NULL) { 684 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 685 bf->bf_dmamap = NULL; 686 } 687 } 688 STAILQ_INIT(&txq->free); 689 txq->nfree = 0; 690 if (txq->dma.dd_bufptr != NULL) { 691 free(txq->dma.dd_bufptr, M_MALODEV); 692 txq->dma.dd_bufptr = NULL; 693 } 694 if (txq->dma.dd_desc_len != 0) 695 malo_desc_cleanup(sc, &txq->dma); 696} 697 698static void 699malo_dma_cleanup(struct malo_softc *sc) 700{ 701 int i; 702 703 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 704 malo_txdma_cleanup(sc, &sc->malo_txq[i]); 705 706 malo_rxdma_cleanup(sc); 707} 708 709static int 710malo_dma_setup(struct malo_softc *sc) 711{ 712 int error, i; 713 714 /* rxdma initializing. */ 715 error = malo_rxdma_setup(sc); 716 if (error != 0) 717 return error; 718 719 /* NB: we just have 1 tx queue now. */ 720 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 721 error = malo_txdma_setup(sc, &sc->malo_txq[i]); 722 if (error != 0) { 723 malo_dma_cleanup(sc); 724 725 return error; 726 } 727 728 malo_txq_init(sc, &sc->malo_txq[i], i); 729 } 730 731 return 0; 732} 733 734static void 735malo_hal_set_rxtxdma(struct malo_softc *sc) 736{ 737 int i; 738 739 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 740 sc->malo_hwdma.rxdesc_read); 741 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 742 sc->malo_hwdma.rxdesc_read); 743 744 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 745 malo_bar0_write4(sc, 746 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 747 } 748} 749 750/* 751 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 752 * for compatibility with older firmware. For current firmware we send 753 * this information with a cmd block via malo_hal_sethwdma. 754 */ 755static int 756malo_setup_hwdma(struct malo_softc *sc) 757{ 758 int i; 759 struct malo_txq *txq; 760 761 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 762 763 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 764 txq = &sc->malo_txq[i]; 765 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 766 } 767 sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 768 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 769 770 malo_hal_set_rxtxdma(sc); 771 772 return 0; 773} 774 775static void 776malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 777{ 778 struct malo_txbuf *bf, *bn; 779 struct malo_txdesc *ds; 780 781 MALO_TXQ_LOCK_INIT(sc, txq); 782 txq->qnum = qnum; 783 txq->txpri = 0; /* XXX */ 784 785 STAILQ_FOREACH(bf, &txq->free, bf_list) { 786 bf->bf_txq = txq; 787 788 ds = bf->bf_desc; 789 bn = STAILQ_NEXT(bf, bf_list); 790 if (bn == NULL) 791 bn = STAILQ_FIRST(&txq->free); 792 ds->physnext = htole32(bn->bf_daddr); 793 } 794 STAILQ_INIT(&txq->active); 795} 796 797/* 798 * Reclaim resources for a setup queue. 799 */ 800static void 801malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 802{ 803 /* XXX hal work? */ 804 MALO_TXQ_LOCK_DESTROY(txq); 805} 806 807/* 808 * Allocate a tx buffer for sending a frame. 809 */ 810static struct malo_txbuf * 811malo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 812{ 813 struct malo_txbuf *bf; 814 815 MALO_TXQ_LOCK(txq); 816 bf = STAILQ_FIRST(&txq->free); 817 if (bf != NULL) { 818 STAILQ_REMOVE_HEAD(&txq->free, bf_list); 819 txq->nfree--; 820 } 821 MALO_TXQ_UNLOCK(txq); 822 if (bf == NULL) { 823 DPRINTF(sc, MALO_DEBUG_XMIT, 824 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 825 sc->malo_stats.mst_tx_qstop++; 826 } 827 return bf; 828} 829 830static int 831malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 832{ 833 struct mbuf *m; 834 int error; 835 836 /* 837 * Load the DMA map so any coalescing is done. This also calculates 838 * the number of descriptors we need. 839 */ 840 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 841 bf->bf_segs, &bf->bf_nseg, 842 BUS_DMA_NOWAIT); 843 if (error == EFBIG) { 844 /* XXX packet requires too many descriptors */ 845 bf->bf_nseg = MALO_TXDESC + 1; 846 } else if (error != 0) { 847 sc->malo_stats.mst_tx_busdma++; 848 m_freem(m0); 849 return error; 850 } 851 /* 852 * Discard null packets and check for packets that require too many 853 * TX descriptors. We try to convert the latter to a cluster. 854 */ 855 if (error == EFBIG) { /* too many desc's, linearize */ 856 sc->malo_stats.mst_tx_linear++; 857 m = m_defrag(m0, M_DONTWAIT); 858 if (m == NULL) { 859 m_freem(m0); 860 sc->malo_stats.mst_tx_nombuf++; 861 return ENOMEM; 862 } 863 m0 = m; 864 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 865 bf->bf_segs, &bf->bf_nseg, 866 BUS_DMA_NOWAIT); 867 if (error != 0) { 868 sc->malo_stats.mst_tx_busdma++; 869 m_freem(m0); 870 return error; 871 } 872 KASSERT(bf->bf_nseg <= MALO_TXDESC, 873 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 874 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 875 sc->malo_stats.mst_tx_nodata++; 876 m_freem(m0); 877 return EIO; 878 } 879 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 880 __func__, m0, m0->m_pkthdr.len); 881 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 882 bf->bf_m = m0; 883 884 return 0; 885} 886 887#ifdef MALO_DEBUG 888static void 889malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 890{ 891 const struct malo_rxdesc *ds = bf->bf_desc; 892 uint32_t status = le32toh(ds->status); 893 894 printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 895 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 896 " RATE:%02x QOS:%04x\n", 897 ix, ds, (const struct malo_desc *)bf->bf_daddr, 898 le32toh(ds->physnext), le32toh(ds->physbuffdata), 899 ds->rxcontrol, 900 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 901 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 902 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 903 ds->rate, le16toh(ds->qosctrl)); 904} 905 906static void 907malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 908{ 909 const struct malo_txdesc *ds = bf->bf_desc; 910 uint32_t status = le32toh(ds->status); 911 912 printf("Q%u[%3u]", qnum, ix); 913 printf(" (DS.V:%p DS.P:%p)\n", 914 ds, (const struct malo_txdesc *)bf->bf_daddr); 915 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 916 le32toh(ds->physnext), 917 le32toh(ds->pktptr), le16toh(ds->pktlen), status, 918 status & MALO_TXD_STATUS_USED ? 919 "" : (status & 3) != 0 ? " *" : " !"); 920 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 921 ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 922 le32toh(ds->sap_pktinfo), le16toh(ds->format)); 923#if 0 924 { 925 const uint8_t *cp = (const uint8_t *) ds; 926 int i; 927 for (i = 0; i < sizeof(struct malo_txdesc); i++) { 928 printf("%02x ", cp[i]); 929 if (((i+1) % 16) == 0) 930 printf("\n"); 931 } 932 printf("\n"); 933 } 934#endif 935} 936#endif /* MALO_DEBUG */ 937 938static __inline void 939malo_updatetxrate(struct ieee80211_node *ni, int rix) 940{ 941#define N(x) (sizeof(x)/sizeof(x[0])) 942 static const int ieeerates[] = 943 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 944 if (rix < N(ieeerates)) 945 ni->ni_txrate = ieeerates[rix]; 946#undef N 947} 948 949static int 950malo_fix2rate(int fix_rate) 951{ 952#define N(x) (sizeof(x)/sizeof(x[0])) 953 static const int rates[] = 954 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 955 return (fix_rate < N(rates) ? rates[fix_rate] : 0); 956#undef N 957} 958 959/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 960#define MS(v,x) (((v) & x) >> x##_S) 961#define SM(v,x) (((v) << x##_S) & x) 962 963/* 964 * Process completed xmit descriptors from the specified queue. 965 */ 966static int 967malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 968{ 969 struct malo_txbuf *bf; 970 struct malo_txdesc *ds; 971 struct ieee80211_node *ni; 972 int nreaped; 973 uint32_t status; 974 975 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 976 __func__, txq->qnum); 977 for (nreaped = 0;; nreaped++) { 978 MALO_TXQ_LOCK(txq); 979 bf = STAILQ_FIRST(&txq->active); 980 if (bf == NULL) { 981 MALO_TXQ_UNLOCK(txq); 982 break; 983 } 984 ds = bf->bf_desc; 985 MALO_TXDESC_SYNC(txq, ds, 986 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 987 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 988 MALO_TXQ_UNLOCK(txq); 989 break; 990 } 991 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 992 MALO_TXQ_UNLOCK(txq); 993 994#ifdef MALO_DEBUG 995 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 996 malo_printtxbuf(bf, txq->qnum, nreaped); 997#endif 998 ni = bf->bf_node; 999 if (ni != NULL) { 1000 status = le32toh(ds->status); 1001 if (status & MALO_TXD_STATUS_OK) { 1002 uint16_t format = le16toh(ds->format); 1003 uint8_t txant = MS(format, MALO_TXD_ANTENNA); 1004 1005 sc->malo_stats.mst_ant_tx[txant]++; 1006 if (status & MALO_TXD_STATUS_OK_RETRY) 1007 sc->malo_stats.mst_tx_retries++; 1008 if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1009 sc->malo_stats.mst_tx_mretries++; 1010 malo_updatetxrate(ni, ds->datarate); 1011 sc->malo_stats.mst_tx_rate = ds->datarate; 1012 } else { 1013 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1014 sc->malo_stats.mst_tx_linkerror++; 1015 if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1016 sc->malo_stats.mst_tx_xretries++; 1017 if (status & MALO_TXD_STATUS_FAILED_AGING) 1018 sc->malo_stats.mst_tx_aging++; 1019 } 1020 /* 1021 * Do any tx complete callback. Note this must 1022 * be done before releasing the node reference. 1023 * XXX no way to figure out if frame was ACK'd 1024 */ 1025 if (bf->bf_m->m_flags & M_TXCB) { 1026 /* XXX strip fw len in case header inspected */ 1027 m_adj(bf->bf_m, sizeof(uint16_t)); 1028 ieee80211_process_callback(ni, bf->bf_m, 1029 (status & MALO_TXD_STATUS_OK) == 0); 1030 } 1031 /* 1032 * Reclaim reference to node. 1033 * 1034 * NB: the node may be reclaimed here if, for example 1035 * this is a DEAUTH message that was sent and the 1036 * node was timed out due to inactivity. 1037 */ 1038 ieee80211_free_node(ni); 1039 } 1040 ds->status = htole32(MALO_TXD_STATUS_IDLE); 1041 ds->pktlen = htole32(0); 1042 1043 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1044 BUS_DMASYNC_POSTWRITE); 1045 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1046 m_freem(bf->bf_m); 1047 bf->bf_m = NULL; 1048 bf->bf_node = NULL; 1049 1050 MALO_TXQ_LOCK(txq); 1051 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1052 txq->nfree++; 1053 MALO_TXQ_UNLOCK(txq); 1054 } 1055 return nreaped; 1056} 1057 1058/* 1059 * Deferred processing of transmit interrupt. 1060 */ 1061static void 1062malo_tx_proc(void *arg, int npending) 1063{ 1064 struct malo_softc *sc = arg; 1065 struct ifnet *ifp = sc->malo_ifp; 1066 int i, nreaped; 1067 1068 /* 1069 * Process each active queue. 1070 */ 1071 nreaped = 0; 1072 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1073 if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1074 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1075 } 1076 1077 if (nreaped != 0) { 1078 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1079 sc->malo_timer = 0; 1080 malo_start(ifp); 1081 } 1082} 1083 1084static int 1085malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1086 struct malo_txbuf *bf, struct mbuf *m0) 1087{ 1088#define IEEE80211_DIR_DSTODS(wh) \ 1089 ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1090#define IS_DATA_FRAME(wh) \ 1091 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1092 int error, ismcast, iswep; 1093 int copyhdrlen, hdrlen, pktlen; 1094 struct ieee80211_frame *wh; 1095 struct ifnet *ifp = sc->malo_ifp; 1096 struct ieee80211com *ic = ifp->if_l2com; 1097 struct ieee80211vap *vap = ni->ni_vap; 1098 struct malo_txdesc *ds; 1099 struct malo_txrec *tr; 1100 struct malo_txq *txq; 1101 uint16_t qos; 1102 1103 wh = mtod(m0, struct ieee80211_frame *); 1104 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1105 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1106 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1107 pktlen = m0->m_pkthdr.len; 1108 if (IEEE80211_QOS_HAS_SEQ(wh)) { 1109 if (IEEE80211_DIR_DSTODS(wh)) { 1110 qos = *(uint16_t *) 1111 (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1112 copyhdrlen -= sizeof(qos); 1113 } else 1114 qos = *(uint16_t *) 1115 (((struct ieee80211_qosframe *) wh)->i_qos); 1116 } else 1117 qos = 0; 1118 1119 if (iswep) { 1120 struct ieee80211_key *k; 1121 1122 /* 1123 * Construct the 802.11 header+trailer for an encrypted 1124 * frame. The only reason this can fail is because of an 1125 * unknown or unsupported cipher/key type. 1126 * 1127 * NB: we do this even though the firmware will ignore 1128 * what we've done for WEP and TKIP as we need the 1129 * ExtIV filled in for CCMP and this also adjusts 1130 * the headers which simplifies our work below. 1131 */ 1132 k = ieee80211_crypto_encap(ni, m0); 1133 if (k == NULL) { 1134 /* 1135 * This can happen when the key is yanked after the 1136 * frame was queued. Just discard the frame; the 1137 * 802.11 layer counts failures and provides 1138 * debugging/diagnostics. 1139 */ 1140 m_freem(m0); 1141 return EIO; 1142 } 1143 1144 /* 1145 * Adjust the packet length for the crypto additions 1146 * done during encap and any other bits that the f/w 1147 * will add later on. 1148 */ 1149 pktlen = m0->m_pkthdr.len; 1150 1151 /* packet header may have moved, reset our local pointer */ 1152 wh = mtod(m0, struct ieee80211_frame *); 1153 } 1154 1155 if (ieee80211_radiotap_active_vap(vap)) { 1156 sc->malo_tx_th.wt_flags = 0; /* XXX */ 1157 if (iswep) 1158 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1159 sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1160 sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1161 1162 ieee80211_radiotap_tx(vap, m0); 1163 } 1164 1165 /* 1166 * Copy up/down the 802.11 header; the firmware requires 1167 * we present a 2-byte payload length followed by a 1168 * 4-address header (w/o QoS), followed (optionally) by 1169 * any WEP/ExtIV header (but only filled in for CCMP). 1170 * We are assured the mbuf has sufficient headroom to 1171 * prepend in-place by the setup of ic_headroom in 1172 * malo_attach. 1173 */ 1174 if (hdrlen < sizeof(struct malo_txrec)) { 1175 const int space = sizeof(struct malo_txrec) - hdrlen; 1176 if (M_LEADINGSPACE(m0) < space) { 1177 /* NB: should never happen */ 1178 device_printf(sc->malo_dev, 1179 "not enough headroom, need %d found %zd, " 1180 "m_flags 0x%x m_len %d\n", 1181 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1182 ieee80211_dump_pkt(ic, 1183 mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1184 m_freem(m0); 1185 /* XXX stat */ 1186 return EIO; 1187 } 1188 M_PREPEND(m0, space, M_NOWAIT); 1189 } 1190 tr = mtod(m0, struct malo_txrec *); 1191 if (wh != (struct ieee80211_frame *) &tr->wh) 1192 ovbcopy(wh, &tr->wh, hdrlen); 1193 /* 1194 * Note: the "firmware length" is actually the length of the fully 1195 * formed "802.11 payload". That is, it's everything except for 1196 * the 802.11 header. In particular this includes all crypto 1197 * material including the MIC! 1198 */ 1199 tr->fwlen = htole16(pktlen - hdrlen); 1200 1201 /* 1202 * Load the DMA map so any coalescing is done. This 1203 * also calculates the number of descriptors we need. 1204 */ 1205 error = malo_tx_dmasetup(sc, bf, m0); 1206 if (error != 0) 1207 return error; 1208 bf->bf_node = ni; /* NB: held reference */ 1209 m0 = bf->bf_m; /* NB: may have changed */ 1210 tr = mtod(m0, struct malo_txrec *); 1211 wh = (struct ieee80211_frame *)&tr->wh; 1212 1213 /* 1214 * Formulate tx descriptor. 1215 */ 1216 ds = bf->bf_desc; 1217 txq = bf->bf_txq; 1218 1219 ds->qosctrl = qos; /* NB: already little-endian */ 1220 ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1221 ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1222 /* NB: pPhysNext setup once, don't touch */ 1223 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1224 ds->sap_pktinfo = 0; 1225 ds->format = 0; 1226 1227 /* 1228 * Select transmit rate. 1229 */ 1230 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1231 case IEEE80211_FC0_TYPE_MGT: 1232 sc->malo_stats.mst_tx_mgmt++; 1233 /* fall thru... */ 1234 case IEEE80211_FC0_TYPE_CTL: 1235 ds->txpriority = 1; 1236 break; 1237 case IEEE80211_FC0_TYPE_DATA: 1238 ds->txpriority = txq->qnum; 1239 break; 1240 default: 1241 if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1242 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1243 /* XXX statistic */ 1244 m_freem(m0); 1245 return EIO; 1246 } 1247 1248#ifdef MALO_DEBUG 1249 if (IFF_DUMPPKTS_XMIT(sc)) 1250 ieee80211_dump_pkt(ic, 1251 mtod(m0, const uint8_t *)+sizeof(uint16_t), 1252 m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1253#endif 1254 1255 MALO_TXQ_LOCK(txq); 1256 if (!IS_DATA_FRAME(wh)) 1257 ds->status |= htole32(1); 1258 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1259 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1260 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1261 1262 ifp->if_opackets++; 1263 sc->malo_timer = 5; 1264 MALO_TXQ_UNLOCK(txq); 1265 return 0; 1266#undef IEEE80211_DIR_DSTODS 1267} 1268 1269static void 1270malo_start(struct ifnet *ifp) 1271{ 1272 struct malo_softc *sc = ifp->if_softc; 1273 struct ieee80211_node *ni; 1274 struct malo_txq *txq = &sc->malo_txq[0]; 1275 struct malo_txbuf *bf = NULL; 1276 struct mbuf *m; 1277 int nqueued = 0; 1278 1279 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1280 return; 1281 1282 for (;;) { 1283 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1284 if (m == NULL) 1285 break; 1286 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1287 bf = malo_getbuf(sc, txq); 1288 if (bf == NULL) { 1289 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1290 1291 /* XXX blocks other traffic */ 1292 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1293 sc->malo_stats.mst_tx_qstop++; 1294 break; 1295 } 1296 /* 1297 * Pass the frame to the h/w for transmission. 1298 */ 1299 if (malo_tx_start(sc, ni, bf, m)) { 1300 ifp->if_oerrors++; 1301 if (bf != NULL) { 1302 bf->bf_m = NULL; 1303 bf->bf_node = NULL; 1304 MALO_TXQ_LOCK(txq); 1305 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1306 MALO_TXQ_UNLOCK(txq); 1307 } 1308 ieee80211_free_node(ni); 1309 continue; 1310 } 1311 nqueued++; 1312 1313 if (nqueued >= malo_txcoalesce) { 1314 /* 1315 * Poke the firmware to process queued frames; 1316 * see below about (lack of) locking. 1317 */ 1318 nqueued = 0; 1319 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1320 } 1321 } 1322 1323 if (nqueued) { 1324 /* 1325 * NB: We don't need to lock against tx done because 1326 * this just prods the firmware to check the transmit 1327 * descriptors. The firmware will also start fetching 1328 * descriptors by itself if it notices new ones are 1329 * present when it goes to deliver a tx done interrupt 1330 * to the host. So if we race with tx done processing 1331 * it's ok. Delivering the kick here rather than in 1332 * malo_tx_start is an optimization to avoid poking the 1333 * firmware for each packet. 1334 * 1335 * NB: the queue id isn't used so 0 is ok. 1336 */ 1337 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1338 } 1339} 1340 1341static void 1342malo_watchdog(void *arg) 1343{ 1344 struct malo_softc *sc; 1345 struct ifnet *ifp; 1346 1347 sc = arg; 1348 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1349 if (sc->malo_timer == 0 || --sc->malo_timer > 0) 1350 return; 1351 1352 ifp = sc->malo_ifp; 1353 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1354 if_printf(ifp, "watchdog timeout\n"); 1355 1356 /* XXX no way to reset h/w. now */ 1357 1358 ifp->if_oerrors++; 1359 sc->malo_stats.mst_watchdog++; 1360 } 1361} 1362 1363static int 1364malo_hal_reset(struct malo_softc *sc) 1365{ 1366 static int first = 0; 1367 struct ifnet *ifp = sc->malo_ifp; 1368 struct ieee80211com *ic = ifp->if_l2com; 1369 struct malo_hal *mh = sc->malo_mh; 1370 1371 if (first == 0) { 1372 /* 1373 * NB: when the device firstly is initialized, sometimes 1374 * firmware could override rx/tx dma registers so we re-set 1375 * these values once. 1376 */ 1377 malo_hal_set_rxtxdma(sc); 1378 first = 1; 1379 } 1380 1381 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1382 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1383 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1384 malo_chan_set(sc, ic->ic_curchan); 1385 1386 /* XXX needs other stuffs? */ 1387 1388 return 1; 1389} 1390 1391static __inline struct mbuf * 1392malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1393{ 1394 struct mbuf *m; 1395 bus_addr_t paddr; 1396 int error; 1397 1398 /* XXX don't need mbuf, just dma buffer */ 1399 m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1400 if (m == NULL) { 1401 sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1402 return NULL; 1403 } 1404 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1405 mtod(m, caddr_t), MJUMPAGESIZE, 1406 malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1407 if (error != 0) { 1408 if_printf(sc->malo_ifp, 1409 "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1410 m_freem(m); 1411 return NULL; 1412 } 1413 bf->bf_data = paddr; 1414 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1415 1416 return m; 1417} 1418 1419static int 1420malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1421{ 1422 struct malo_rxdesc *ds; 1423 1424 ds = bf->bf_desc; 1425 if (bf->bf_m == NULL) { 1426 bf->bf_m = malo_getrxmbuf(sc, bf); 1427 if (bf->bf_m == NULL) { 1428 /* mark descriptor to be skipped */ 1429 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1430 /* NB: don't need PREREAD */ 1431 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1432 return ENOMEM; 1433 } 1434 } 1435 1436 /* 1437 * Setup descriptor. 1438 */ 1439 ds->qosctrl = 0; 1440 ds->snr = 0; 1441 ds->status = MALO_RXD_STATUS_IDLE; 1442 ds->channel = 0; 1443 ds->pktlen = htole16(MALO_RXSIZE); 1444 ds->nf = 0; 1445 ds->physbuffdata = htole32(bf->bf_data); 1446 /* NB: don't touch pPhysNext, set once */ 1447 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1448 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1449 1450 return 0; 1451} 1452 1453/* 1454 * Setup the rx data structures. This should only be done once or we may get 1455 * out of sync with the firmware. 1456 */ 1457static int 1458malo_startrecv(struct malo_softc *sc) 1459{ 1460 struct malo_rxbuf *bf, *prev; 1461 struct malo_rxdesc *ds; 1462 1463 if (sc->malo_recvsetup == 1) { 1464 malo_mode_init(sc); /* set filters, etc. */ 1465 return 0; 1466 } 1467 1468 prev = NULL; 1469 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1470 int error = malo_rxbuf_init(sc, bf); 1471 if (error != 0) { 1472 DPRINTF(sc, MALO_DEBUG_RECV, 1473 "%s: malo_rxbuf_init failed %d\n", 1474 __func__, error); 1475 return error; 1476 } 1477 if (prev != NULL) { 1478 ds = prev->bf_desc; 1479 ds->physnext = htole32(bf->bf_daddr); 1480 } 1481 prev = bf; 1482 } 1483 if (prev != NULL) { 1484 ds = prev->bf_desc; 1485 ds->physnext = 1486 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1487 } 1488 1489 sc->malo_recvsetup = 1; 1490 1491 malo_mode_init(sc); /* set filters, etc. */ 1492 1493 return 0; 1494} 1495 1496static void 1497malo_init_locked(struct malo_softc *sc) 1498{ 1499 struct ifnet *ifp = sc->malo_ifp; 1500 struct malo_hal *mh = sc->malo_mh; 1501 int error; 1502 1503 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1504 __func__, ifp->if_flags); 1505 1506 MALO_LOCK_ASSERT(sc); 1507 1508 /* 1509 * Stop anything previously setup. This is safe whether this is 1510 * the first time through or not. 1511 */ 1512 malo_stop_locked(ifp, 0); 1513 1514 /* 1515 * Push state to the firmware. 1516 */ 1517 if (!malo_hal_reset(sc)) { 1518 if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1519 return; 1520 } 1521 1522 /* 1523 * Setup recv (once); transmit is already good to go. 1524 */ 1525 error = malo_startrecv(sc); 1526 if (error != 0) { 1527 if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1528 __func__, error); 1529 return; 1530 } 1531 1532 /* 1533 * Enable interrupts. 1534 */ 1535 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1536 | MALO_A2HRIC_BIT_TX_DONE 1537 | MALO_A2HRIC_BIT_OPC_DONE 1538 | MALO_A2HRIC_BIT_MAC_EVENT 1539 | MALO_A2HRIC_BIT_RX_PROBLEM 1540 | MALO_A2HRIC_BIT_ICV_ERROR 1541 | MALO_A2HRIC_BIT_RADAR_DETECT 1542 | MALO_A2HRIC_BIT_CHAN_SWITCH; 1543 1544 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1545 malo_hal_intrset(mh, sc->malo_imask); 1546 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1547} 1548 1549static void 1550malo_init(void *arg) 1551{ 1552 struct malo_softc *sc = (struct malo_softc *) arg; 1553 struct ifnet *ifp = sc->malo_ifp; 1554 struct ieee80211com *ic = ifp->if_l2com; 1555 1556 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1557 __func__, ifp->if_flags); 1558 1559 MALO_LOCK(sc); 1560 malo_init_locked(sc); 1561 1562 MALO_UNLOCK(sc); 1563 1564 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1565 ieee80211_start_all(ic); /* start all vap's */ 1566} 1567 1568/* 1569 * Set the multicast filter contents into the hardware. 1570 */ 1571static void 1572malo_setmcastfilter(struct malo_softc *sc) 1573{ 1574 struct ifnet *ifp = sc->malo_ifp; 1575 struct ieee80211com *ic = ifp->if_l2com; 1576 struct ifmultiaddr *ifma; 1577 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1578 uint8_t *mp; 1579 int nmc; 1580 1581 mp = macs; 1582 nmc = 0; 1583 1584 if (ic->ic_opmode == IEEE80211_M_MONITOR || 1585 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1586 goto all; 1587 1588 if_maddr_rlock(ifp); 1589 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1590 if (ifma->ifma_addr->sa_family != AF_LINK) 1591 continue; 1592 1593 if (nmc == MALO_HAL_MCAST_MAX) { 1594 ifp->if_flags |= IFF_ALLMULTI; 1595 if_maddr_runlock(ifp); 1596 goto all; 1597 } 1598 IEEE80211_ADDR_COPY(mp, 1599 LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1600 1601 mp += IEEE80211_ADDR_LEN, nmc++; 1602 } 1603 if_maddr_runlock(ifp); 1604 1605 malo_hal_setmcast(sc->malo_mh, nmc, macs); 1606 1607all: 1608 /* 1609 * XXX we don't know how to set the f/w for supporting 1610 * IFF_ALLMULTI | IFF_PROMISC cases 1611 */ 1612 return; 1613} 1614 1615static int 1616malo_mode_init(struct malo_softc *sc) 1617{ 1618 struct ifnet *ifp = sc->malo_ifp; 1619 struct ieee80211com *ic = ifp->if_l2com; 1620 struct malo_hal *mh = sc->malo_mh; 1621 1622 /* 1623 * NB: Ignore promisc in hostap mode; it's set by the 1624 * bridge. This is wrong but we have no way to 1625 * identify internal requests (from the bridge) 1626 * versus external requests such as for tcpdump. 1627 */ 1628 malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1629 ic->ic_opmode != IEEE80211_M_HOSTAP); 1630 malo_setmcastfilter(sc); 1631 1632 return ENXIO; 1633} 1634 1635static void 1636malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1637{ 1638 struct ieee80211_node *ni; 1639 struct malo_txbuf *bf; 1640 u_int ix; 1641 1642 /* 1643 * NB: this assumes output has been stopped and 1644 * we do not need to block malo_tx_tasklet 1645 */ 1646 for (ix = 0;; ix++) { 1647 MALO_TXQ_LOCK(txq); 1648 bf = STAILQ_FIRST(&txq->active); 1649 if (bf == NULL) { 1650 MALO_TXQ_UNLOCK(txq); 1651 break; 1652 } 1653 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1654 MALO_TXQ_UNLOCK(txq); 1655#ifdef MALO_DEBUG 1656 if (sc->malo_debug & MALO_DEBUG_RESET) { 1657 struct ifnet *ifp = sc->malo_ifp; 1658 struct ieee80211com *ic = ifp->if_l2com; 1659 const struct malo_txrec *tr = 1660 mtod(bf->bf_m, const struct malo_txrec *); 1661 malo_printtxbuf(bf, txq->qnum, ix); 1662 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1663 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1664 } 1665#endif /* MALO_DEBUG */ 1666 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1667 ni = bf->bf_node; 1668 bf->bf_node = NULL; 1669 if (ni != NULL) { 1670 /* 1671 * Reclaim node reference. 1672 */ 1673 ieee80211_free_node(ni); 1674 } 1675 m_freem(bf->bf_m); 1676 bf->bf_m = NULL; 1677 1678 MALO_TXQ_LOCK(txq); 1679 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1680 txq->nfree++; 1681 MALO_TXQ_UNLOCK(txq); 1682 } 1683} 1684 1685static void 1686malo_stop_locked(struct ifnet *ifp, int disable) 1687{ 1688 struct malo_softc *sc = ifp->if_softc; 1689 struct malo_hal *mh = sc->malo_mh; 1690 int i; 1691 1692 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1693 __func__, sc->malo_invalid, ifp->if_flags); 1694 1695 MALO_LOCK_ASSERT(sc); 1696 1697 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1698 return; 1699 1700 /* 1701 * Shutdown the hardware and driver: 1702 * disable interrupts 1703 * turn off the radio 1704 * drain and release tx queues 1705 * 1706 * Note that some of this work is not possible if the hardware 1707 * is gone (invalid). 1708 */ 1709 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1710 callout_stop(&sc->malo_watchdog_timer); 1711 sc->malo_timer = 0; 1712 /* diable interrupt. */ 1713 malo_hal_intrset(mh, 0); 1714 /* turn off the radio. */ 1715 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1716 1717 /* drain and release tx queues. */ 1718 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1719 malo_tx_draintxq(sc, &sc->malo_txq[i]); 1720} 1721 1722static int 1723malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1724{ 1725#define MALO_IS_RUNNING(ifp) \ 1726 ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1727 struct malo_softc *sc = ifp->if_softc; 1728 struct ieee80211com *ic = ifp->if_l2com; 1729 struct ifreq *ifr = (struct ifreq *) data; 1730 int error = 0, startall = 0; 1731 1732 MALO_LOCK(sc); 1733 switch (cmd) { 1734 case SIOCSIFFLAGS: 1735 if (MALO_IS_RUNNING(ifp)) { 1736 /* 1737 * To avoid rescanning another access point, 1738 * do not call malo_init() here. Instead, 1739 * only reflect promisc mode settings. 1740 */ 1741 malo_mode_init(sc); 1742 } else if (ifp->if_flags & IFF_UP) { 1743 /* 1744 * Beware of being called during attach/detach 1745 * to reset promiscuous mode. In that case we 1746 * will still be marked UP but not RUNNING. 1747 * However trying to re-init the interface 1748 * is the wrong thing to do as we've already 1749 * torn down much of our state. There's 1750 * probably a better way to deal with this. 1751 */ 1752 if (!sc->malo_invalid) { 1753 malo_init_locked(sc); 1754 startall = 1; 1755 } 1756 } else 1757 malo_stop_locked(ifp, 1); 1758 break; 1759 case SIOCGIFMEDIA: 1760 case SIOCSIFMEDIA: 1761 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1762 break; 1763 default: 1764 error = ether_ioctl(ifp, cmd, data); 1765 break; 1766 } 1767 MALO_UNLOCK(sc); 1768 1769 if (startall) 1770 ieee80211_start_all(ic); 1771 return error; 1772#undef MALO_IS_RUNNING 1773} 1774 1775/* 1776 * Callback from the 802.11 layer to update the slot time 1777 * based on the current setting. We use it to notify the 1778 * firmware of ERP changes and the f/w takes care of things 1779 * like slot time and preamble. 1780 */ 1781static void 1782malo_updateslot(struct ifnet *ifp) 1783{ 1784 struct malo_softc *sc = ifp->if_softc; 1785 struct ieee80211com *ic = ifp->if_l2com; 1786 struct malo_hal *mh = sc->malo_mh; 1787 int error; 1788 1789 /* NB: can be called early; suppress needless cmds */ 1790 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1791 return; 1792 1793 DPRINTF(sc, MALO_DEBUG_RESET, 1794 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1795 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1796 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1797 1798 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1799 error = malo_hal_set_slot(mh, 1); 1800 else 1801 error = malo_hal_set_slot(mh, 0); 1802 1803 if (error != 0) 1804 device_printf(sc->malo_dev, "setting %s slot failed\n", 1805 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1806} 1807 1808static int 1809malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1810{ 1811 struct ieee80211com *ic = vap->iv_ic; 1812 struct malo_softc *sc = ic->ic_ifp->if_softc; 1813 struct malo_hal *mh = sc->malo_mh; 1814 int error; 1815 1816 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1817 ieee80211_state_name[vap->iv_state], 1818 ieee80211_state_name[nstate]); 1819 1820 /* 1821 * Invoke the net80211 layer first so iv_bss is setup. 1822 */ 1823 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1824 if (error != 0) 1825 return error; 1826 1827 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1828 struct ieee80211_node *ni = vap->iv_bss; 1829 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1830 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1831 1832 DPRINTF(sc, MALO_DEBUG_STATE, 1833 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1834 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1835 vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1836 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1837 ieee80211_chan2ieee(ic, ic->ic_curchan), 1838 ni->ni_associd, mode, tp->ucastrate); 1839 1840 malo_hal_setradio(mh, 1, 1841 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1842 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1843 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1844 malo_hal_set_rate(mh, mode, 1845 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1846 0 : malo_fix2rate(tp->ucastrate)); 1847 } 1848 return 0; 1849} 1850 1851static int 1852malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1853 const struct ieee80211_bpf_params *params) 1854{ 1855 struct ieee80211com *ic = ni->ni_ic; 1856 struct ifnet *ifp = ic->ic_ifp; 1857 struct malo_softc *sc = ifp->if_softc; 1858 struct malo_txbuf *bf; 1859 struct malo_txq *txq; 1860 1861 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1862 ieee80211_free_node(ni); 1863 m_freem(m); 1864 return ENETDOWN; 1865 } 1866 1867 /* 1868 * Grab a TX buffer and associated resources. Note that we depend 1869 * on the classification by the 802.11 layer to get to the right h/w 1870 * queue. Management frames must ALWAYS go on queue 1 but we 1871 * cannot just force that here because we may receive non-mgt frames. 1872 */ 1873 txq = &sc->malo_txq[0]; 1874 bf = malo_getbuf(sc, txq); 1875 if (bf == NULL) { 1876 /* XXX blocks other traffic */ 1877 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1878 ieee80211_free_node(ni); 1879 m_freem(m); 1880 return ENOBUFS; 1881 } 1882 1883 /* 1884 * Pass the frame to the h/w for transmission. 1885 */ 1886 if (malo_tx_start(sc, ni, bf, m) != 0) { 1887 ifp->if_oerrors++; 1888 bf->bf_m = NULL; 1889 bf->bf_node = NULL; 1890 MALO_TXQ_LOCK(txq); 1891 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1892 txq->nfree++; 1893 MALO_TXQ_UNLOCK(txq); 1894 1895 ieee80211_free_node(ni); 1896 return EIO; /* XXX */ 1897 } 1898 1899 /* 1900 * NB: We don't need to lock against tx done because this just 1901 * prods the firmware to check the transmit descriptors. The firmware 1902 * will also start fetching descriptors by itself if it notices 1903 * new ones are present when it goes to deliver a tx done interrupt 1904 * to the host. So if we race with tx done processing it's ok. 1905 * Delivering the kick here rather than in malo_tx_start is 1906 * an optimization to avoid poking the firmware for each packet. 1907 * 1908 * NB: the queue id isn't used so 0 is ok. 1909 */ 1910 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1911 1912 return 0; 1913} 1914 1915static void 1916malo_sysctlattach(struct malo_softc *sc) 1917{ 1918#ifdef MALO_DEBUG 1919 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1920 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1921 1922 sc->malo_debug = malo_debug; 1923 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1924 "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1925 "control debugging printfs"); 1926#endif 1927} 1928 1929static void 1930malo_announce(struct malo_softc *sc) 1931{ 1932 struct ifnet *ifp = sc->malo_ifp; 1933 1934 if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1935 sc->malo_hwspecs.hwversion, 1936 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1937 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1938 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1939 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1940 sc->malo_hwspecs.regioncode); 1941 1942 if (bootverbose || malo_rxbuf != MALO_RXBUF) 1943 if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1944 if (bootverbose || malo_txbuf != MALO_TXBUF) 1945 if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1946} 1947 1948/* 1949 * Convert net80211 channel to a HAL channel. 1950 */ 1951static void 1952malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1953{ 1954 hc->channel = chan->ic_ieee; 1955 1956 *(uint32_t *)&hc->flags = 0; 1957 if (IEEE80211_IS_CHAN_2GHZ(chan)) 1958 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1959} 1960 1961/* 1962 * Set/change channels. If the channel is really being changed, 1963 * it's done by reseting the chip. To accomplish this we must 1964 * first cleanup any pending DMA, then restart stuff after a la 1965 * malo_init. 1966 */ 1967static int 1968malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1969{ 1970 struct malo_hal *mh = sc->malo_mh; 1971 struct malo_hal_channel hchan; 1972 1973 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1974 __func__, chan->ic_freq, chan->ic_flags); 1975 1976 /* 1977 * Convert to a HAL channel description with the flags constrained 1978 * to reflect the current operating mode. 1979 */ 1980 malo_mapchan(&hchan, chan); 1981 malo_hal_intrset(mh, 0); /* disable interrupts */ 1982 malo_hal_setchannel(mh, &hchan); 1983 malo_hal_settxpower(mh, &hchan); 1984 1985 /* 1986 * Update internal state. 1987 */ 1988 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 1989 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 1990 if (IEEE80211_IS_CHAN_ANYG(chan)) { 1991 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 1992 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 1993 } else { 1994 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 1995 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 1996 } 1997 sc->malo_curchan = hchan; 1998 malo_hal_intrset(mh, sc->malo_imask); 1999 2000 return 0; 2001} 2002 2003static void 2004malo_scan_start(struct ieee80211com *ic) 2005{ 2006 struct ifnet *ifp = ic->ic_ifp; 2007 struct malo_softc *sc = ifp->if_softc; 2008 2009 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2010} 2011 2012static void 2013malo_scan_end(struct ieee80211com *ic) 2014{ 2015 struct ifnet *ifp = ic->ic_ifp; 2016 struct malo_softc *sc = ifp->if_softc; 2017 2018 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2019} 2020 2021static void 2022malo_set_channel(struct ieee80211com *ic) 2023{ 2024 struct ifnet *ifp = ic->ic_ifp; 2025 struct malo_softc *sc = ifp->if_softc; 2026 2027 (void) malo_chan_set(sc, ic->ic_curchan); 2028} 2029 2030static void 2031malo_rx_proc(void *arg, int npending) 2032{ 2033#define IEEE80211_DIR_DSTODS(wh) \ 2034 ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2035 IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2036 struct malo_softc *sc = arg; 2037 struct ifnet *ifp = sc->malo_ifp; 2038 struct ieee80211com *ic = ifp->if_l2com; 2039 struct malo_rxbuf *bf; 2040 struct malo_rxdesc *ds; 2041 struct mbuf *m, *mnew; 2042 struct ieee80211_qosframe *wh; 2043 struct ieee80211_qosframe_addr4 *wh4; 2044 struct ieee80211_node *ni; 2045 int off, len, hdrlen, pktlen, rssi, ntodo; 2046 uint8_t *data, status; 2047 uint32_t readptr, writeptr; 2048 2049 DPRINTF(sc, MALO_DEBUG_RX_PROC, 2050 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2051 __func__, npending, 2052 sc->malo_hwspecs.rxdesc_read, 2053 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2054 sc->malo_hwspecs.rxdesc_write, 2055 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2056 2057 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2058 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2059 if (readptr == writeptr) 2060 return; 2061 2062 bf = sc->malo_rxnext; 2063 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2064 if (bf == NULL) { 2065 bf = STAILQ_FIRST(&sc->malo_rxbuf); 2066 break; 2067 } 2068 ds = bf->bf_desc; 2069 if (bf->bf_m == NULL) { 2070 /* 2071 * If data allocation failed previously there 2072 * will be no buffer; try again to re-populate it. 2073 * Note the firmware will not advance to the next 2074 * descriptor with a dma buffer so we must mimic 2075 * this or we'll get out of sync. 2076 */ 2077 DPRINTF(sc, MALO_DEBUG_ANY, 2078 "%s: rx buf w/o dma memory\n", __func__); 2079 (void)malo_rxbuf_init(sc, bf); 2080 break; 2081 } 2082 MALO_RXDESC_SYNC(sc, ds, 2083 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2084 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2085 break; 2086 2087 readptr = le32toh(ds->physnext); 2088 2089#ifdef MALO_DEBUG 2090 if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2091 malo_printrxbuf(bf, 0); 2092#endif 2093 status = ds->status; 2094 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2095 ifp->if_ierrors++; 2096 goto rx_next; 2097 } 2098 /* 2099 * Sync the data buffer. 2100 */ 2101 len = le16toh(ds->pktlen); 2102 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2103 BUS_DMASYNC_POSTREAD); 2104 /* 2105 * The 802.11 header is provided all or in part at the front; 2106 * use it to calculate the true size of the header that we'll 2107 * construct below. We use this to figure out where to copy 2108 * payload prior to constructing the header. 2109 */ 2110 m = bf->bf_m; 2111 data = mtod(m, uint8_t *); 2112 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2113 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2114 2115 /* 2116 * Calculate RSSI. XXX wrong 2117 */ 2118 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2119 if (rssi > 100) 2120 rssi = 100; 2121 2122 pktlen = hdrlen + (len - off); 2123 /* 2124 * NB: we know our frame is at least as large as 2125 * IEEE80211_MIN_LEN because there is a 4-address frame at 2126 * the front. Hence there's no need to vet the packet length. 2127 * If the frame in fact is too small it should be discarded 2128 * at the net80211 layer. 2129 */ 2130 2131 /* XXX don't need mbuf, just dma buffer */ 2132 mnew = malo_getrxmbuf(sc, bf); 2133 if (mnew == NULL) { 2134 ifp->if_ierrors++; 2135 goto rx_next; 2136 } 2137 /* 2138 * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2139 * re-setup the rx descriptor using the replacement dma 2140 * buffer we just installed above. 2141 */ 2142 bf->bf_m = mnew; 2143 m->m_data += off - hdrlen; 2144 m->m_pkthdr.len = m->m_len = pktlen; 2145 m->m_pkthdr.rcvif = ifp; 2146 2147 /* 2148 * Piece 802.11 header together. 2149 */ 2150 wh = mtod(m, struct ieee80211_qosframe *); 2151 /* NB: don't need to do this sometimes but ... */ 2152 /* XXX special case so we can memcpy after m_devget? */ 2153 ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2154 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2155 if (IEEE80211_DIR_DSTODS(wh)) { 2156 wh4 = mtod(m, 2157 struct ieee80211_qosframe_addr4*); 2158 *(uint16_t *)wh4->i_qos = ds->qosctrl; 2159 } else { 2160 *(uint16_t *)wh->i_qos = ds->qosctrl; 2161 } 2162 } 2163 if (ieee80211_radiotap_active(ic)) { 2164 sc->malo_rx_th.wr_flags = 0; 2165 sc->malo_rx_th.wr_rate = ds->rate; 2166 sc->malo_rx_th.wr_antsignal = rssi; 2167 sc->malo_rx_th.wr_antnoise = ds->nf; 2168 } 2169#ifdef MALO_DEBUG 2170 if (IFF_DUMPPKTS_RECV(sc, wh)) { 2171 ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2172 len, ds->rate, rssi); 2173 } 2174#endif 2175 ifp->if_ipackets++; 2176 2177 /* dispatch */ 2178 ni = ieee80211_find_rxnode(ic, 2179 (struct ieee80211_frame_min *)wh); 2180 if (ni != NULL) { 2181 (void) ieee80211_input(ni, m, rssi, ds->nf); 2182 ieee80211_free_node(ni); 2183 } else 2184 (void) ieee80211_input_all(ic, m, rssi, ds->nf); 2185rx_next: 2186 /* NB: ignore ENOMEM so we process more descriptors */ 2187 (void) malo_rxbuf_init(sc, bf); 2188 bf = STAILQ_NEXT(bf, bf_list); 2189 } 2190 2191 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2192 sc->malo_rxnext = bf; 2193 2194 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2195 !IFQ_IS_EMPTY(&ifp->if_snd)) 2196 malo_start(ifp); 2197#undef IEEE80211_DIR_DSTODS 2198} 2199 2200static void 2201malo_stop(struct ifnet *ifp, int disable) 2202{ 2203 struct malo_softc *sc = ifp->if_softc; 2204 2205 MALO_LOCK(sc); 2206 malo_stop_locked(ifp, disable); 2207 MALO_UNLOCK(sc); 2208} 2209 2210/* 2211 * Reclaim all tx queue resources. 2212 */ 2213static void 2214malo_tx_cleanup(struct malo_softc *sc) 2215{ 2216 int i; 2217 2218 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2219 malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2220} 2221 2222int 2223malo_detach(struct malo_softc *sc) 2224{ 2225 struct ifnet *ifp = sc->malo_ifp; 2226 struct ieee80211com *ic = ifp->if_l2com; 2227 2228 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2229 __func__, ifp->if_flags); 2230 2231 malo_stop(ifp, 1); 2232 2233 if (sc->malo_tq != NULL) { 2234 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2235 taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2236 taskqueue_free(sc->malo_tq); 2237 sc->malo_tq = NULL; 2238 } 2239 2240 /* 2241 * NB: the order of these is important: 2242 * o call the 802.11 layer before detaching the hal to 2243 * insure callbacks into the driver to delete global 2244 * key cache entries can be handled 2245 * o reclaim the tx queue data structures after calling 2246 * the 802.11 layer as we'll get called back to reclaim 2247 * node state and potentially want to use them 2248 * o to cleanup the tx queues the hal is called, so detach 2249 * it last 2250 * Other than that, it's straightforward... 2251 */ 2252 ieee80211_ifdetach(ic); 2253 callout_drain(&sc->malo_watchdog_timer); 2254 malo_dma_cleanup(sc); 2255 malo_tx_cleanup(sc); 2256 malo_hal_detach(sc->malo_mh); 2257 if_free(ifp); 2258 2259 MALO_LOCK_DESTROY(sc); 2260 2261 return 0; 2262} 2263 2264void 2265malo_shutdown(struct malo_softc *sc) 2266{ 2267 malo_stop(sc->malo_ifp, 1); 2268} 2269 2270void 2271malo_suspend(struct malo_softc *sc) 2272{ 2273 struct ifnet *ifp = sc->malo_ifp; 2274 2275 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2276 __func__, ifp->if_flags); 2277 2278 malo_stop(ifp, 1); 2279} 2280 2281void 2282malo_resume(struct malo_softc *sc) 2283{ 2284 struct ifnet *ifp = sc->malo_ifp; 2285 2286 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2287 __func__, ifp->if_flags); 2288 2289 if (ifp->if_flags & IFF_UP) 2290 malo_init(sc); 2291} 2292