if_malo.c revision 287197
1177595Sweongyo/*- 2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc. 4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting 5177595Sweongyo * All rights reserved. 6177595Sweongyo * 7177595Sweongyo * Redistribution and use in source and binary forms, with or without 8177595Sweongyo * modification, are permitted provided that the following conditions 9177595Sweongyo * are met: 10177595Sweongyo * 1. Redistributions of source code must retain the above copyright 11177595Sweongyo * notice, this list of conditions and the following disclaimer, 12177595Sweongyo * without modification. 13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14177595Sweongyo * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15177595Sweongyo * redistribution must be conditioned upon including a substantially 16177595Sweongyo * similar Disclaimer requirement for further binary redistribution. 17177595Sweongyo * 18177595Sweongyo * NO WARRANTY 19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES. 30177595Sweongyo */ 31177595Sweongyo 32177595Sweongyo#include <sys/cdefs.h> 33177595Sweongyo#ifdef __FreeBSD__ 34177595Sweongyo__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 287197 2015-08-27 08:56:39Z glebius $"); 35177595Sweongyo#endif 36177595Sweongyo 37178354Ssam#include "opt_malo.h" 38178354Ssam 39177595Sweongyo#include <sys/param.h> 40177595Sweongyo#include <sys/endian.h> 41177595Sweongyo#include <sys/kernel.h> 42177595Sweongyo#include <sys/socket.h> 43177595Sweongyo#include <sys/sockio.h> 44177595Sweongyo#include <sys/sysctl.h> 45177595Sweongyo#include <sys/taskqueue.h> 46177595Sweongyo 47177595Sweongyo#include <machine/bus.h> 48177595Sweongyo#include <sys/bus.h> 49177595Sweongyo 50177595Sweongyo#include <net/if.h> 51257176Sglebius#include <net/if_var.h> 52177595Sweongyo#include <net/if_dl.h> 53177595Sweongyo#include <net/if_media.h> 54177595Sweongyo#include <net/if_types.h> 55177595Sweongyo#include <net/ethernet.h> 56177595Sweongyo 57177595Sweongyo#include <net80211/ieee80211_var.h> 58177595Sweongyo#include <net80211/ieee80211_regdomain.h> 59177595Sweongyo 60177595Sweongyo#include <net/bpf.h> 61177595Sweongyo 62177595Sweongyo#include <dev/malo/if_malo.h> 63177595Sweongyo 64177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 65177595Sweongyo "Marvell 88w8335 driver parameters"); 66177595Sweongyo 67177595Sweongyostatic int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 68267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce, 69177595Sweongyo 0, "tx buffers to send at once"); 70177595Sweongyostatic int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf, 72177595Sweongyo 0, "rx buffers allocated"); 73177595Sweongyostatic int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 74267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota, 75177595Sweongyo 0, "max rx buffers to process per interrupt"); 76177595Sweongyostatic int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 77267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf, 78177595Sweongyo 0, "tx buffers allocated"); 79177595Sweongyo 80177595Sweongyo#ifdef MALO_DEBUG 81177595Sweongyostatic int malo_debug = 0; 82267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug, 83177595Sweongyo 0, "control debugging printfs"); 84177595Sweongyoenum { 85177595Sweongyo MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 86177595Sweongyo MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 87177595Sweongyo MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 88177595Sweongyo MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 89177595Sweongyo MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 90177595Sweongyo MALO_DEBUG_INTR = 0x00000040, /* ISR */ 91177595Sweongyo MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 92177595Sweongyo MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 93177595Sweongyo MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 94177595Sweongyo MALO_DEBUG_NODE = 0x00000800, /* node management */ 95177595Sweongyo MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 96177595Sweongyo MALO_DEBUG_FW = 0x00008000, /* firmware */ 97177595Sweongyo MALO_DEBUG_ANY = 0xffffffff 98177595Sweongyo}; 99177595Sweongyo#define IS_BEACON(wh) \ 100177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 101177595Sweongyo IEEE80211_FC0_SUBTYPE_MASK)) == \ 102177595Sweongyo (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 103177595Sweongyo#define IFF_DUMPPKTS_RECV(sc, wh) \ 104177595Sweongyo (((sc->malo_debug & MALO_DEBUG_RECV) && \ 105287197Sglebius ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh)))) 106177595Sweongyo#define IFF_DUMPPKTS_XMIT(sc) \ 107287197Sglebius (sc->malo_debug & MALO_DEBUG_XMIT) 108177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 109177595Sweongyo if (sc->malo_debug & (m)) \ 110177595Sweongyo printf(fmt, __VA_ARGS__); \ 111177595Sweongyo} while (0) 112177595Sweongyo#else 113177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 114177595Sweongyo (void) sc; \ 115177595Sweongyo} while (0) 116177595Sweongyo#endif 117177595Sweongyo 118227293Sedstatic MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 119177595Sweongyo 120228621Sbschmidtstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *, 121228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 122228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN], 123228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 124178354Ssamstatic void malo_vap_delete(struct ieee80211vap *); 125177595Sweongyostatic int malo_dma_setup(struct malo_softc *); 126177595Sweongyostatic int malo_setup_hwdma(struct malo_softc *); 127177595Sweongyostatic void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 128177595Sweongyostatic void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 129287197Sglebiusstatic void malo_parent(struct ieee80211com *); 130287197Sglebiusstatic int malo_transmit(struct ieee80211com *, struct mbuf *); 131287197Sglebiusstatic void malo_start(struct malo_softc *); 132199559Sjhbstatic void malo_watchdog(void *); 133283540Sglebiusstatic void malo_updateslot(struct ieee80211com *); 134178354Ssamstatic int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 135177595Sweongyostatic void malo_scan_start(struct ieee80211com *); 136177595Sweongyostatic void malo_scan_end(struct ieee80211com *); 137177595Sweongyostatic void malo_set_channel(struct ieee80211com *); 138177595Sweongyostatic int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 139177595Sweongyo const struct ieee80211_bpf_params *); 140177595Sweongyostatic void malo_sysctlattach(struct malo_softc *); 141177595Sweongyostatic void malo_announce(struct malo_softc *); 142177595Sweongyostatic void malo_dma_cleanup(struct malo_softc *); 143287197Sglebiusstatic void malo_stop(struct malo_softc *); 144177595Sweongyostatic int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 145177595Sweongyostatic int malo_mode_init(struct malo_softc *); 146177595Sweongyostatic void malo_tx_proc(void *, int); 147177595Sweongyostatic void malo_rx_proc(void *, int); 148177595Sweongyostatic void malo_init(void *); 149177595Sweongyo 150177595Sweongyo/* 151177595Sweongyo * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 152177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at 153177595Sweongyo * malo_attach and there should be no reference to them here. 154177595Sweongyo */ 155177595Sweongyostatic uint32_t 156177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off) 157177595Sweongyo{ 158177595Sweongyo return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 159177595Sweongyo} 160177595Sweongyo 161177595Sweongyostatic void 162177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 163177595Sweongyo{ 164205843Simp DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n", 165278532Smarius __func__, (uintmax_t)off, val); 166177595Sweongyo 167177595Sweongyo bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 168177595Sweongyo} 169177595Sweongyo 170177595Sweongyoint 171177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc) 172177595Sweongyo{ 173287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 174287197Sglebius struct malo_hal *mh; 175286437Sadrian int error; 176177595Sweongyo uint8_t bands; 177177595Sweongyo 178177595Sweongyo MALO_LOCK_INIT(sc); 179199559Sjhb callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0); 180287197Sglebius mbufq_init(&sc->malo_snd, ifqmaxlen); 181177595Sweongyo 182177595Sweongyo mh = malo_hal_attach(sc->malo_dev, devid, 183177595Sweongyo sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 184177595Sweongyo if (mh == NULL) { 185287197Sglebius device_printf(sc->malo_dev, "unable to attach HAL\n"); 186177595Sweongyo error = EIO; 187177595Sweongyo goto bad; 188177595Sweongyo } 189177595Sweongyo sc->malo_mh = mh; 190177595Sweongyo 191178354Ssam /* 192178354Ssam * Load firmware so we can get setup. We arbitrarily pick station 193178354Ssam * firmware; we'll re-load firmware as needed so setting up 194178354Ssam * the wrong mode isn't a big deal. 195178354Ssam */ 196178354Ssam error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 197178354Ssam if (error != 0) { 198287197Sglebius device_printf(sc->malo_dev, "unable to setup firmware\n"); 199178354Ssam goto bad1; 200178354Ssam } 201178354Ssam /* XXX gethwspecs() extracts correct informations? not maybe! */ 202178354Ssam error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 203178354Ssam if (error != 0) { 204287197Sglebius device_printf(sc->malo_dev, "unable to fetch h/w specs\n"); 205178354Ssam goto bad1; 206178354Ssam } 207178354Ssam 208178354Ssam DPRINTF(sc, MALO_DEBUG_FW, 209178354Ssam "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 210178354Ssam "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 211178354Ssam "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 212178354Ssam "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 213178354Ssam "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 214178354Ssam sc->malo_hwspecs.hwversion, 215178354Ssam sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 216178354Ssam sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 217178354Ssam sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 218178354Ssam sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 219178354Ssam sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 220178354Ssam sc->malo_hwspecs.ul_fw_awakecookie, 221178354Ssam sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 222178354Ssam sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 223178354Ssam 224178354Ssam /* NB: firmware looks that it does not export regdomain info API. */ 225178354Ssam bands = 0; 226178354Ssam setbit(&bands, IEEE80211_MODE_11B); 227178354Ssam setbit(&bands, IEEE80211_MODE_11G); 228178354Ssam ieee80211_init_channels(ic, NULL, &bands); 229178354Ssam 230177595Sweongyo sc->malo_txantenna = 0x2; /* h/w default */ 231177595Sweongyo sc->malo_rxantenna = 0xffff; /* h/w default */ 232177595Sweongyo 233177595Sweongyo /* 234177595Sweongyo * Allocate tx + rx descriptors and populate the lists. 235177595Sweongyo * We immediately push the information to the firmware 236177595Sweongyo * as otherwise it gets upset. 237177595Sweongyo */ 238177595Sweongyo error = malo_dma_setup(sc); 239177595Sweongyo if (error != 0) { 240287197Sglebius device_printf(sc->malo_dev, 241287197Sglebius "failed to setup descriptors: %d\n", error); 242177595Sweongyo goto bad1; 243177595Sweongyo } 244178354Ssam error = malo_setup_hwdma(sc); /* push to firmware */ 245178354Ssam if (error != 0) /* NB: malo_setupdma prints msg */ 246190552Sweongyo goto bad2; 247177595Sweongyo 248177595Sweongyo sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 249177595Sweongyo taskqueue_thread_enqueue, &sc->malo_tq); 250177595Sweongyo taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 251287197Sglebius "%s taskq", device_get_nameunit(sc->malo_dev)); 252177595Sweongyo 253177595Sweongyo TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 254177595Sweongyo TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 255177595Sweongyo 256283537Sglebius ic->ic_softc = sc; 257283527Sglebius ic->ic_name = device_get_nameunit(sc->malo_dev); 258177595Sweongyo /* XXX not right but it's not used anywhere important */ 259177595Sweongyo ic->ic_phytype = IEEE80211_T_OFDM; 260177595Sweongyo ic->ic_opmode = IEEE80211_M_STA; 261177595Sweongyo ic->ic_caps = 262178957Ssam IEEE80211_C_STA /* station mode supported */ 263178957Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 264177595Sweongyo | IEEE80211_C_MONITOR /* monitor mode */ 265177595Sweongyo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 266177595Sweongyo | IEEE80211_C_SHSLOT /* short slot time supported */ 267177595Sweongyo | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 268177595Sweongyo | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 269177595Sweongyo ; 270287197Sglebius IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->malo_hwspecs.macaddr); 271177595Sweongyo 272177595Sweongyo /* 273177595Sweongyo * Transmit requires space in the packet for a special format transmit 274177595Sweongyo * record and optional padding between this record and the payload. 275177595Sweongyo * Ask the net80211 layer to arrange this when encapsulating 276177595Sweongyo * packets so we can add it efficiently. 277177595Sweongyo */ 278177595Sweongyo ic->ic_headroom = sizeof(struct malo_txrec) - 279178354Ssam sizeof(struct ieee80211_frame); 280177595Sweongyo 281177595Sweongyo /* call MI attach routine. */ 282287197Sglebius ieee80211_ifattach(ic); 283177595Sweongyo /* override default methods */ 284178354Ssam ic->ic_vap_create = malo_vap_create; 285178354Ssam ic->ic_vap_delete = malo_vap_delete; 286178354Ssam ic->ic_raw_xmit = malo_raw_xmit; 287177595Sweongyo ic->ic_updateslot = malo_updateslot; 288177595Sweongyo ic->ic_scan_start = malo_scan_start; 289177595Sweongyo ic->ic_scan_end = malo_scan_end; 290177595Sweongyo ic->ic_set_channel = malo_set_channel; 291287197Sglebius ic->ic_parent = malo_parent; 292287197Sglebius ic->ic_transmit = malo_transmit; 293177595Sweongyo 294177595Sweongyo sc->malo_invalid = 0; /* ready to go, enable int handling */ 295177595Sweongyo 296192468Ssam ieee80211_radiotap_attach(ic, 297192468Ssam &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th), 298192468Ssam MALO_TX_RADIOTAP_PRESENT, 299192468Ssam &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th), 300192468Ssam MALO_RX_RADIOTAP_PRESENT); 301177595Sweongyo 302177595Sweongyo /* 303177595Sweongyo * Setup dynamic sysctl's. 304177595Sweongyo */ 305177595Sweongyo malo_sysctlattach(sc); 306177595Sweongyo 307177595Sweongyo if (bootverbose) 308177595Sweongyo ieee80211_announce(ic); 309178354Ssam malo_announce(sc); 310177595Sweongyo 311177595Sweongyo return 0; 312190552Sweongyobad2: 313190552Sweongyo malo_dma_cleanup(sc); 314177595Sweongyobad1: 315177595Sweongyo malo_hal_detach(mh); 316177595Sweongyobad: 317177595Sweongyo sc->malo_invalid = 1; 318177595Sweongyo 319177595Sweongyo return error; 320177595Sweongyo} 321177595Sweongyo 322178354Ssamstatic struct ieee80211vap * 323228621Sbschmidtmalo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 324228621Sbschmidt enum ieee80211_opmode opmode, int flags, 325228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 326228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 327178354Ssam{ 328287197Sglebius struct malo_softc *sc = ic->ic_softc; 329178354Ssam struct malo_vap *mvp; 330178354Ssam struct ieee80211vap *vap; 331178354Ssam 332178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 333287197Sglebius device_printf(sc->malo_dev, "multiple vaps not supported\n"); 334178354Ssam return NULL; 335178354Ssam } 336178354Ssam switch (opmode) { 337178354Ssam case IEEE80211_M_STA: 338178354Ssam if (opmode == IEEE80211_M_STA) 339178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 340178354Ssam /* fall thru... */ 341178354Ssam case IEEE80211_M_MONITOR: 342178354Ssam break; 343178354Ssam default: 344287197Sglebius device_printf(sc->malo_dev, "%s mode not supported\n", 345178354Ssam ieee80211_opmode_name[opmode]); 346178354Ssam return NULL; /* unsupported */ 347178354Ssam } 348287197Sglebius mvp = malloc(sizeof(struct malo_vap), M_80211_VAP, M_WAITOK | M_ZERO); 349178354Ssam vap = &mvp->malo_vap; 350287197Sglebius ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 351178354Ssam 352178354Ssam /* override state transition machine */ 353178354Ssam mvp->malo_newstate = vap->iv_newstate; 354178354Ssam vap->iv_newstate = malo_newstate; 355178354Ssam 356178354Ssam /* complete setup */ 357178354Ssam ieee80211_vap_attach(vap, 358287197Sglebius ieee80211_media_change, ieee80211_media_status, mac); 359178354Ssam ic->ic_opmode = opmode; 360178354Ssam return vap; 361178354Ssam} 362178354Ssam 363178354Ssamstatic void 364178354Ssammalo_vap_delete(struct ieee80211vap *vap) 365178354Ssam{ 366178354Ssam struct malo_vap *mvp = MALO_VAP(vap); 367178354Ssam 368178354Ssam ieee80211_vap_detach(vap); 369178354Ssam free(mvp, M_80211_VAP); 370178354Ssam} 371178354Ssam 372177595Sweongyoint 373177595Sweongyomalo_intr(void *arg) 374177595Sweongyo{ 375177595Sweongyo struct malo_softc *sc = arg; 376177595Sweongyo struct malo_hal *mh = sc->malo_mh; 377177595Sweongyo uint32_t status; 378177595Sweongyo 379177595Sweongyo if (sc->malo_invalid) { 380177595Sweongyo /* 381177595Sweongyo * The hardware is not ready/present, don't touch anything. 382177595Sweongyo * Note this can happen early on if the IRQ is shared. 383177595Sweongyo */ 384177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 385177595Sweongyo return (FILTER_STRAY); 386177595Sweongyo } 387177595Sweongyo 388177595Sweongyo /* 389177595Sweongyo * Figure out the reason(s) for the interrupt. 390177595Sweongyo */ 391177595Sweongyo malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 392177595Sweongyo if (status == 0) /* must be a shared irq */ 393177595Sweongyo return (FILTER_STRAY); 394177595Sweongyo 395177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 396177595Sweongyo __func__, status, sc->malo_imask); 397177595Sweongyo 398177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_RDY) 399177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 400177595Sweongyo if (status & MALO_A2HRIC_BIT_TX_DONE) 401177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 402177595Sweongyo if (status & MALO_A2HRIC_BIT_OPC_DONE) 403177595Sweongyo malo_hal_cmddone(mh); 404177595Sweongyo if (status & MALO_A2HRIC_BIT_MAC_EVENT) 405177595Sweongyo ; 406177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 407177595Sweongyo ; 408177595Sweongyo if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 409177595Sweongyo /* TKIP ICV error */ 410177595Sweongyo sc->malo_stats.mst_rx_badtkipicv++; 411177595Sweongyo } 412177595Sweongyo#ifdef MALO_DEBUG 413177595Sweongyo if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 414177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, 415177595Sweongyo "%s: can't handle interrupt status 0x%x\n", 416177595Sweongyo __func__, status); 417177595Sweongyo#endif 418177595Sweongyo return (FILTER_HANDLED); 419177595Sweongyo} 420177595Sweongyo 421177595Sweongyostatic void 422177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 423177595Sweongyo{ 424177595Sweongyo bus_addr_t *paddr = (bus_addr_t*) arg; 425177595Sweongyo 426177595Sweongyo KASSERT(error == 0, ("error %u on bus_dma callback", error)); 427177595Sweongyo 428177595Sweongyo *paddr = segs->ds_addr; 429177595Sweongyo} 430177595Sweongyo 431177595Sweongyostatic int 432177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name, 433177595Sweongyo struct malo_descdma *dd, 434177595Sweongyo int nbuf, size_t bufsize, int ndesc, size_t descsize) 435177595Sweongyo{ 436177595Sweongyo int error; 437177595Sweongyo uint8_t *ds; 438177595Sweongyo 439177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 440177595Sweongyo "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 441177595Sweongyo __func__, name, nbuf, (uintmax_t) bufsize, 442177595Sweongyo ndesc, (uintmax_t) descsize); 443177595Sweongyo 444177595Sweongyo dd->dd_name = name; 445177595Sweongyo dd->dd_desc_len = nbuf * ndesc * descsize; 446177595Sweongyo 447177595Sweongyo /* 448177595Sweongyo * Setup DMA descriptor area. 449177595Sweongyo */ 450177595Sweongyo error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 451177595Sweongyo PAGE_SIZE, 0, /* alignment, bounds */ 452177595Sweongyo BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 453177595Sweongyo BUS_SPACE_MAXADDR, /* highaddr */ 454177595Sweongyo NULL, NULL, /* filter, filterarg */ 455177595Sweongyo dd->dd_desc_len, /* maxsize */ 456177595Sweongyo 1, /* nsegments */ 457177595Sweongyo dd->dd_desc_len, /* maxsegsize */ 458177595Sweongyo BUS_DMA_ALLOCNOW, /* flags */ 459177595Sweongyo NULL, /* lockfunc */ 460177595Sweongyo NULL, /* lockarg */ 461177595Sweongyo &dd->dd_dmat); 462177595Sweongyo if (error != 0) { 463287197Sglebius device_printf(sc->malo_dev, "cannot allocate %s DMA tag\n", 464287197Sglebius dd->dd_name); 465177595Sweongyo return error; 466177595Sweongyo } 467177595Sweongyo 468177595Sweongyo /* allocate descriptors */ 469177595Sweongyo error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 470177595Sweongyo BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 471177595Sweongyo if (error != 0) { 472287197Sglebius device_printf(sc->malo_dev, 473287197Sglebius "unable to alloc memory for %u %s descriptors, " 474177595Sweongyo "error %u\n", nbuf * ndesc, dd->dd_name, error); 475177595Sweongyo goto fail1; 476177595Sweongyo } 477177595Sweongyo 478177595Sweongyo error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 479177595Sweongyo dd->dd_desc, dd->dd_desc_len, 480177595Sweongyo malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 481177595Sweongyo if (error != 0) { 482287197Sglebius device_printf(sc->malo_dev, 483287197Sglebius "unable to map %s descriptors, error %u\n", 484177595Sweongyo dd->dd_name, error); 485177595Sweongyo goto fail2; 486177595Sweongyo } 487177595Sweongyo 488177595Sweongyo ds = dd->dd_desc; 489177595Sweongyo memset(ds, 0, dd->dd_desc_len); 490278532Smarius DPRINTF(sc, MALO_DEBUG_RESET, 491278532Smarius "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n", 492177595Sweongyo __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 493278532Smarius (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 494177595Sweongyo 495177595Sweongyo return 0; 496177595Sweongyofail2: 497177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 498177595Sweongyofail1: 499177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 500177595Sweongyo memset(dd, 0, sizeof(*dd)); 501177595Sweongyo return error; 502177595Sweongyo} 503177595Sweongyo 504177595Sweongyo#define DS2PHYS(_dd, _ds) \ 505177595Sweongyo ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 506177595Sweongyo 507177595Sweongyostatic int 508177595Sweongyomalo_rxdma_setup(struct malo_softc *sc) 509177595Sweongyo{ 510177595Sweongyo int error, bsize, i; 511177595Sweongyo struct malo_rxbuf *bf; 512177595Sweongyo struct malo_rxdesc *ds; 513177595Sweongyo 514177595Sweongyo error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 515177595Sweongyo malo_rxbuf, sizeof(struct malo_rxbuf), 516177595Sweongyo 1, sizeof(struct malo_rxdesc)); 517177595Sweongyo if (error != 0) 518177595Sweongyo return error; 519177595Sweongyo 520177595Sweongyo /* 521177595Sweongyo * Allocate rx buffers and set them up. 522177595Sweongyo */ 523177595Sweongyo bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 524177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 525177595Sweongyo if (bf == NULL) { 526287197Sglebius device_printf(sc->malo_dev, 527287197Sglebius "malloc of %u rx buffers failed\n", bsize); 528177595Sweongyo return error; 529177595Sweongyo } 530177595Sweongyo sc->malo_rxdma.dd_bufptr = bf; 531177595Sweongyo 532177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 533177595Sweongyo ds = sc->malo_rxdma.dd_desc; 534177595Sweongyo for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 535177595Sweongyo bf->bf_desc = ds; 536177595Sweongyo bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 537177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 538177595Sweongyo &bf->bf_dmamap); 539177595Sweongyo if (error != 0) { 540287197Sglebius device_printf(sc->malo_dev, 541287197Sglebius "%s: unable to dmamap for rx buffer, error %d\n", 542287197Sglebius __func__, error); 543177595Sweongyo return error; 544177595Sweongyo } 545177595Sweongyo /* NB: tail is intentional to preserve descriptor order */ 546177595Sweongyo STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 547177595Sweongyo } 548177595Sweongyo return 0; 549177595Sweongyo} 550177595Sweongyo 551177595Sweongyostatic int 552177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 553177595Sweongyo{ 554177595Sweongyo int error, bsize, i; 555177595Sweongyo struct malo_txbuf *bf; 556177595Sweongyo struct malo_txdesc *ds; 557177595Sweongyo 558177595Sweongyo error = malo_desc_setup(sc, "tx", &txq->dma, 559177595Sweongyo malo_txbuf, sizeof(struct malo_txbuf), 560177595Sweongyo MALO_TXDESC, sizeof(struct malo_txdesc)); 561177595Sweongyo if (error != 0) 562177595Sweongyo return error; 563177595Sweongyo 564177595Sweongyo /* allocate and setup tx buffers */ 565177595Sweongyo bsize = malo_txbuf * sizeof(struct malo_txbuf); 566177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 567177595Sweongyo if (bf == NULL) { 568287197Sglebius device_printf(sc->malo_dev, "malloc of %u tx buffers failed\n", 569177595Sweongyo malo_txbuf); 570177595Sweongyo return ENOMEM; 571177595Sweongyo } 572177595Sweongyo txq->dma.dd_bufptr = bf; 573177595Sweongyo 574177595Sweongyo STAILQ_INIT(&txq->free); 575177595Sweongyo txq->nfree = 0; 576177595Sweongyo ds = txq->dma.dd_desc; 577177595Sweongyo for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 578177595Sweongyo bf->bf_desc = ds; 579177595Sweongyo bf->bf_daddr = DS2PHYS(&txq->dma, ds); 580177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 581177595Sweongyo &bf->bf_dmamap); 582177595Sweongyo if (error != 0) { 583287197Sglebius device_printf(sc->malo_dev, 584287197Sglebius "unable to create dmamap for tx " 585177595Sweongyo "buffer %u, error %u\n", i, error); 586177595Sweongyo return error; 587177595Sweongyo } 588177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 589177595Sweongyo txq->nfree++; 590177595Sweongyo } 591177595Sweongyo 592177595Sweongyo return 0; 593177595Sweongyo} 594177595Sweongyo 595177595Sweongyostatic void 596177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 597177595Sweongyo{ 598177595Sweongyo bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 599177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 600177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 601177595Sweongyo 602177595Sweongyo memset(dd, 0, sizeof(*dd)); 603177595Sweongyo} 604177595Sweongyo 605177595Sweongyostatic void 606177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc) 607177595Sweongyo{ 608177595Sweongyo struct malo_rxbuf *bf; 609177595Sweongyo 610177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 611177595Sweongyo if (bf->bf_m != NULL) { 612177595Sweongyo m_freem(bf->bf_m); 613177595Sweongyo bf->bf_m = NULL; 614177595Sweongyo } 615177595Sweongyo if (bf->bf_dmamap != NULL) { 616177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 617177595Sweongyo bf->bf_dmamap = NULL; 618177595Sweongyo } 619177595Sweongyo } 620177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 621177595Sweongyo if (sc->malo_rxdma.dd_bufptr != NULL) { 622177595Sweongyo free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 623177595Sweongyo sc->malo_rxdma.dd_bufptr = NULL; 624177595Sweongyo } 625177595Sweongyo if (sc->malo_rxdma.dd_desc_len != 0) 626177595Sweongyo malo_desc_cleanup(sc, &sc->malo_rxdma); 627177595Sweongyo} 628177595Sweongyo 629177595Sweongyostatic void 630177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 631177595Sweongyo{ 632177595Sweongyo struct malo_txbuf *bf; 633177595Sweongyo struct ieee80211_node *ni; 634177595Sweongyo 635177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 636177595Sweongyo if (bf->bf_m != NULL) { 637177595Sweongyo m_freem(bf->bf_m); 638177595Sweongyo bf->bf_m = NULL; 639177595Sweongyo } 640177595Sweongyo ni = bf->bf_node; 641177595Sweongyo bf->bf_node = NULL; 642177595Sweongyo if (ni != NULL) { 643177595Sweongyo /* 644177595Sweongyo * Reclaim node reference. 645177595Sweongyo */ 646177595Sweongyo ieee80211_free_node(ni); 647177595Sweongyo } 648177595Sweongyo if (bf->bf_dmamap != NULL) { 649177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 650177595Sweongyo bf->bf_dmamap = NULL; 651177595Sweongyo } 652177595Sweongyo } 653177595Sweongyo STAILQ_INIT(&txq->free); 654177595Sweongyo txq->nfree = 0; 655177595Sweongyo if (txq->dma.dd_bufptr != NULL) { 656177595Sweongyo free(txq->dma.dd_bufptr, M_MALODEV); 657177595Sweongyo txq->dma.dd_bufptr = NULL; 658177595Sweongyo } 659177595Sweongyo if (txq->dma.dd_desc_len != 0) 660177595Sweongyo malo_desc_cleanup(sc, &txq->dma); 661177595Sweongyo} 662177595Sweongyo 663177595Sweongyostatic void 664177595Sweongyomalo_dma_cleanup(struct malo_softc *sc) 665177595Sweongyo{ 666177595Sweongyo int i; 667177595Sweongyo 668177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 669177595Sweongyo malo_txdma_cleanup(sc, &sc->malo_txq[i]); 670177595Sweongyo 671177595Sweongyo malo_rxdma_cleanup(sc); 672177595Sweongyo} 673177595Sweongyo 674177595Sweongyostatic int 675177595Sweongyomalo_dma_setup(struct malo_softc *sc) 676177595Sweongyo{ 677177595Sweongyo int error, i; 678177595Sweongyo 679177595Sweongyo /* rxdma initializing. */ 680177595Sweongyo error = malo_rxdma_setup(sc); 681177595Sweongyo if (error != 0) 682177595Sweongyo return error; 683177595Sweongyo 684177595Sweongyo /* NB: we just have 1 tx queue now. */ 685177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 686177595Sweongyo error = malo_txdma_setup(sc, &sc->malo_txq[i]); 687177595Sweongyo if (error != 0) { 688177595Sweongyo malo_dma_cleanup(sc); 689177595Sweongyo 690177595Sweongyo return error; 691177595Sweongyo } 692177595Sweongyo 693177595Sweongyo malo_txq_init(sc, &sc->malo_txq[i], i); 694177595Sweongyo } 695177595Sweongyo 696177595Sweongyo return 0; 697177595Sweongyo} 698177595Sweongyo 699177595Sweongyostatic void 700177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc) 701177595Sweongyo{ 702177595Sweongyo int i; 703177595Sweongyo 704177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 705177595Sweongyo sc->malo_hwdma.rxdesc_read); 706177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 707177595Sweongyo sc->malo_hwdma.rxdesc_read); 708177595Sweongyo 709177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 710177595Sweongyo malo_bar0_write4(sc, 711177595Sweongyo sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 712177595Sweongyo } 713177595Sweongyo} 714177595Sweongyo 715177595Sweongyo/* 716177595Sweongyo * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 717177595Sweongyo * for compatibility with older firmware. For current firmware we send 718177595Sweongyo * this information with a cmd block via malo_hal_sethwdma. 719177595Sweongyo */ 720177595Sweongyostatic int 721177595Sweongyomalo_setup_hwdma(struct malo_softc *sc) 722177595Sweongyo{ 723177595Sweongyo int i; 724177595Sweongyo struct malo_txq *txq; 725177595Sweongyo 726177595Sweongyo sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 727177595Sweongyo 728177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 729177595Sweongyo txq = &sc->malo_txq[i]; 730177595Sweongyo sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 731177595Sweongyo } 732177595Sweongyo sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 733177595Sweongyo sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 734177595Sweongyo 735177595Sweongyo malo_hal_set_rxtxdma(sc); 736177595Sweongyo 737177595Sweongyo return 0; 738177595Sweongyo} 739177595Sweongyo 740177595Sweongyostatic void 741177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 742177595Sweongyo{ 743177595Sweongyo struct malo_txbuf *bf, *bn; 744177595Sweongyo struct malo_txdesc *ds; 745177595Sweongyo 746177595Sweongyo MALO_TXQ_LOCK_INIT(sc, txq); 747177595Sweongyo txq->qnum = qnum; 748177595Sweongyo txq->txpri = 0; /* XXX */ 749177595Sweongyo 750177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 751177595Sweongyo bf->bf_txq = txq; 752177595Sweongyo 753177595Sweongyo ds = bf->bf_desc; 754177595Sweongyo bn = STAILQ_NEXT(bf, bf_list); 755177595Sweongyo if (bn == NULL) 756177595Sweongyo bn = STAILQ_FIRST(&txq->free); 757177595Sweongyo ds->physnext = htole32(bn->bf_daddr); 758177595Sweongyo } 759177595Sweongyo STAILQ_INIT(&txq->active); 760177595Sweongyo} 761177595Sweongyo 762177595Sweongyo/* 763177595Sweongyo * Reclaim resources for a setup queue. 764177595Sweongyo */ 765177595Sweongyostatic void 766177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 767177595Sweongyo{ 768177595Sweongyo /* XXX hal work? */ 769177595Sweongyo MALO_TXQ_LOCK_DESTROY(txq); 770177595Sweongyo} 771177595Sweongyo 772177595Sweongyo/* 773177595Sweongyo * Allocate a tx buffer for sending a frame. 774177595Sweongyo */ 775177595Sweongyostatic struct malo_txbuf * 776177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 777177595Sweongyo{ 778177595Sweongyo struct malo_txbuf *bf; 779177595Sweongyo 780177595Sweongyo MALO_TXQ_LOCK(txq); 781177595Sweongyo bf = STAILQ_FIRST(&txq->free); 782177595Sweongyo if (bf != NULL) { 783177595Sweongyo STAILQ_REMOVE_HEAD(&txq->free, bf_list); 784177595Sweongyo txq->nfree--; 785177595Sweongyo } 786177595Sweongyo MALO_TXQ_UNLOCK(txq); 787177595Sweongyo if (bf == NULL) { 788177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, 789177595Sweongyo "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 790177595Sweongyo sc->malo_stats.mst_tx_qstop++; 791177595Sweongyo } 792177595Sweongyo return bf; 793177595Sweongyo} 794177595Sweongyo 795177595Sweongyostatic int 796177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 797177595Sweongyo{ 798177595Sweongyo struct mbuf *m; 799177595Sweongyo int error; 800177595Sweongyo 801177595Sweongyo /* 802177595Sweongyo * Load the DMA map so any coalescing is done. This also calculates 803177595Sweongyo * the number of descriptors we need. 804177595Sweongyo */ 805177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 806177595Sweongyo bf->bf_segs, &bf->bf_nseg, 807177595Sweongyo BUS_DMA_NOWAIT); 808177595Sweongyo if (error == EFBIG) { 809177595Sweongyo /* XXX packet requires too many descriptors */ 810177595Sweongyo bf->bf_nseg = MALO_TXDESC + 1; 811177595Sweongyo } else if (error != 0) { 812177595Sweongyo sc->malo_stats.mst_tx_busdma++; 813177595Sweongyo m_freem(m0); 814177595Sweongyo return error; 815177595Sweongyo } 816177595Sweongyo /* 817177595Sweongyo * Discard null packets and check for packets that require too many 818177595Sweongyo * TX descriptors. We try to convert the latter to a cluster. 819177595Sweongyo */ 820177595Sweongyo if (error == EFBIG) { /* too many desc's, linearize */ 821177595Sweongyo sc->malo_stats.mst_tx_linear++; 822243857Sglebius m = m_defrag(m0, M_NOWAIT); 823177595Sweongyo if (m == NULL) { 824177595Sweongyo m_freem(m0); 825177595Sweongyo sc->malo_stats.mst_tx_nombuf++; 826177595Sweongyo return ENOMEM; 827177595Sweongyo } 828177595Sweongyo m0 = m; 829177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 830177595Sweongyo bf->bf_segs, &bf->bf_nseg, 831177595Sweongyo BUS_DMA_NOWAIT); 832177595Sweongyo if (error != 0) { 833177595Sweongyo sc->malo_stats.mst_tx_busdma++; 834177595Sweongyo m_freem(m0); 835177595Sweongyo return error; 836177595Sweongyo } 837177595Sweongyo KASSERT(bf->bf_nseg <= MALO_TXDESC, 838177595Sweongyo ("too many segments after defrag; nseg %u", bf->bf_nseg)); 839177595Sweongyo } else if (bf->bf_nseg == 0) { /* null packet, discard */ 840177595Sweongyo sc->malo_stats.mst_tx_nodata++; 841177595Sweongyo m_freem(m0); 842177595Sweongyo return EIO; 843177595Sweongyo } 844177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 845177595Sweongyo __func__, m0, m0->m_pkthdr.len); 846177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 847177595Sweongyo bf->bf_m = m0; 848177595Sweongyo 849177595Sweongyo return 0; 850177595Sweongyo} 851177595Sweongyo 852177595Sweongyo#ifdef MALO_DEBUG 853177595Sweongyostatic void 854177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 855177595Sweongyo{ 856177595Sweongyo const struct malo_rxdesc *ds = bf->bf_desc; 857177595Sweongyo uint32_t status = le32toh(ds->status); 858177595Sweongyo 859278532Smarius printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n" 860177595Sweongyo " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 861278532Smarius " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr, 862177595Sweongyo le32toh(ds->physnext), le32toh(ds->physbuffdata), 863177595Sweongyo ds->rxcontrol, 864177595Sweongyo ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 865177595Sweongyo "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 866177595Sweongyo ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 867177595Sweongyo ds->rate, le16toh(ds->qosctrl)); 868177595Sweongyo} 869177595Sweongyo 870177595Sweongyostatic void 871177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 872177595Sweongyo{ 873177595Sweongyo const struct malo_txdesc *ds = bf->bf_desc; 874177595Sweongyo uint32_t status = le32toh(ds->status); 875177595Sweongyo 876177595Sweongyo printf("Q%u[%3u]", qnum, ix); 877278532Smarius printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr); 878177595Sweongyo printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 879177595Sweongyo le32toh(ds->physnext), 880177595Sweongyo le32toh(ds->pktptr), le16toh(ds->pktlen), status, 881177595Sweongyo status & MALO_TXD_STATUS_USED ? 882177595Sweongyo "" : (status & 3) != 0 ? " *" : " !"); 883177595Sweongyo printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 884177595Sweongyo ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 885177595Sweongyo le32toh(ds->sap_pktinfo), le16toh(ds->format)); 886177595Sweongyo#if 0 887177595Sweongyo { 888177595Sweongyo const uint8_t *cp = (const uint8_t *) ds; 889177595Sweongyo int i; 890177595Sweongyo for (i = 0; i < sizeof(struct malo_txdesc); i++) { 891177595Sweongyo printf("%02x ", cp[i]); 892177595Sweongyo if (((i+1) % 16) == 0) 893177595Sweongyo printf("\n"); 894177595Sweongyo } 895177595Sweongyo printf("\n"); 896177595Sweongyo } 897177595Sweongyo#endif 898177595Sweongyo} 899177595Sweongyo#endif /* MALO_DEBUG */ 900177595Sweongyo 901177595Sweongyostatic __inline void 902177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix) 903177595Sweongyo{ 904177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 905177595Sweongyo static const int ieeerates[] = 906177595Sweongyo { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 907177595Sweongyo if (rix < N(ieeerates)) 908177595Sweongyo ni->ni_txrate = ieeerates[rix]; 909177595Sweongyo#undef N 910177595Sweongyo} 911177595Sweongyo 912177595Sweongyostatic int 913177595Sweongyomalo_fix2rate(int fix_rate) 914177595Sweongyo{ 915177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 916177595Sweongyo static const int rates[] = 917177595Sweongyo { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 918177595Sweongyo return (fix_rate < N(rates) ? rates[fix_rate] : 0); 919177595Sweongyo#undef N 920177595Sweongyo} 921177595Sweongyo 922177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 923177595Sweongyo#define MS(v,x) (((v) & x) >> x##_S) 924177595Sweongyo#define SM(v,x) (((v) << x##_S) & x) 925177595Sweongyo 926177595Sweongyo/* 927177595Sweongyo * Process completed xmit descriptors from the specified queue. 928177595Sweongyo */ 929177595Sweongyostatic int 930177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 931177595Sweongyo{ 932177595Sweongyo struct malo_txbuf *bf; 933177595Sweongyo struct malo_txdesc *ds; 934177595Sweongyo struct ieee80211_node *ni; 935177595Sweongyo int nreaped; 936177595Sweongyo uint32_t status; 937177595Sweongyo 938177595Sweongyo DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 939177595Sweongyo __func__, txq->qnum); 940177595Sweongyo for (nreaped = 0;; nreaped++) { 941177595Sweongyo MALO_TXQ_LOCK(txq); 942177595Sweongyo bf = STAILQ_FIRST(&txq->active); 943177595Sweongyo if (bf == NULL) { 944177595Sweongyo MALO_TXQ_UNLOCK(txq); 945177595Sweongyo break; 946177595Sweongyo } 947177595Sweongyo ds = bf->bf_desc; 948177595Sweongyo MALO_TXDESC_SYNC(txq, ds, 949177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 950177595Sweongyo if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 951177595Sweongyo MALO_TXQ_UNLOCK(txq); 952177595Sweongyo break; 953177595Sweongyo } 954177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 955177595Sweongyo MALO_TXQ_UNLOCK(txq); 956177595Sweongyo 957177595Sweongyo#ifdef MALO_DEBUG 958177595Sweongyo if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 959177595Sweongyo malo_printtxbuf(bf, txq->qnum, nreaped); 960177595Sweongyo#endif 961177595Sweongyo ni = bf->bf_node; 962177595Sweongyo if (ni != NULL) { 963177595Sweongyo status = le32toh(ds->status); 964177595Sweongyo if (status & MALO_TXD_STATUS_OK) { 965177595Sweongyo uint16_t format = le16toh(ds->format); 966177595Sweongyo uint8_t txant = MS(format, MALO_TXD_ANTENNA); 967177595Sweongyo 968177595Sweongyo sc->malo_stats.mst_ant_tx[txant]++; 969177595Sweongyo if (status & MALO_TXD_STATUS_OK_RETRY) 970177595Sweongyo sc->malo_stats.mst_tx_retries++; 971177595Sweongyo if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 972177595Sweongyo sc->malo_stats.mst_tx_mretries++; 973177595Sweongyo malo_updatetxrate(ni, ds->datarate); 974177595Sweongyo sc->malo_stats.mst_tx_rate = ds->datarate; 975177595Sweongyo } else { 976177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 977177595Sweongyo sc->malo_stats.mst_tx_linkerror++; 978177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_XRETRY) 979177595Sweongyo sc->malo_stats.mst_tx_xretries++; 980177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_AGING) 981177595Sweongyo sc->malo_stats.mst_tx_aging++; 982177595Sweongyo } 983287197Sglebius /* XXX strip fw len in case header inspected */ 984287197Sglebius m_adj(bf->bf_m, sizeof(uint16_t)); 985287197Sglebius ieee80211_tx_complete(ni, bf->bf_m, 986287197Sglebius (status & MALO_TXD_STATUS_OK) == 0); 987287197Sglebius } else 988287197Sglebius m_freem(bf->bf_m); 989287197Sglebius 990177595Sweongyo ds->status = htole32(MALO_TXD_STATUS_IDLE); 991177595Sweongyo ds->pktlen = htole32(0); 992177595Sweongyo 993177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 994177595Sweongyo BUS_DMASYNC_POSTWRITE); 995177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 996177595Sweongyo bf->bf_m = NULL; 997177595Sweongyo bf->bf_node = NULL; 998177595Sweongyo 999177595Sweongyo MALO_TXQ_LOCK(txq); 1000177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1001177595Sweongyo txq->nfree++; 1002177595Sweongyo MALO_TXQ_UNLOCK(txq); 1003177595Sweongyo } 1004177595Sweongyo return nreaped; 1005177595Sweongyo} 1006177595Sweongyo 1007177595Sweongyo/* 1008177595Sweongyo * Deferred processing of transmit interrupt. 1009177595Sweongyo */ 1010177595Sweongyostatic void 1011177595Sweongyomalo_tx_proc(void *arg, int npending) 1012177595Sweongyo{ 1013177595Sweongyo struct malo_softc *sc = arg; 1014177595Sweongyo int i, nreaped; 1015177595Sweongyo 1016177595Sweongyo /* 1017177595Sweongyo * Process each active queue. 1018177595Sweongyo */ 1019177595Sweongyo nreaped = 0; 1020287197Sglebius MALO_LOCK(sc); 1021177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1022177595Sweongyo if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1023177595Sweongyo nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1024177595Sweongyo } 1025177595Sweongyo 1026177595Sweongyo if (nreaped != 0) { 1027199559Sjhb sc->malo_timer = 0; 1028287197Sglebius malo_start(sc); 1029177595Sweongyo } 1030287197Sglebius MALO_UNLOCK(sc); 1031177595Sweongyo} 1032177595Sweongyo 1033177595Sweongyostatic int 1034177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1035177595Sweongyo struct malo_txbuf *bf, struct mbuf *m0) 1036177595Sweongyo{ 1037177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 1038177595Sweongyo ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1039177595Sweongyo#define IS_DATA_FRAME(wh) \ 1040177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1041177595Sweongyo int error, ismcast, iswep; 1042177595Sweongyo int copyhdrlen, hdrlen, pktlen; 1043177595Sweongyo struct ieee80211_frame *wh; 1044287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1045192468Ssam struct ieee80211vap *vap = ni->ni_vap; 1046177595Sweongyo struct malo_txdesc *ds; 1047177595Sweongyo struct malo_txrec *tr; 1048177595Sweongyo struct malo_txq *txq; 1049177595Sweongyo uint16_t qos; 1050177595Sweongyo 1051177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1052260444Skevlo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1053177595Sweongyo ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1054177595Sweongyo copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1055177595Sweongyo pktlen = m0->m_pkthdr.len; 1056177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 1057177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 1058177595Sweongyo qos = *(uint16_t *) 1059177595Sweongyo (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1060177595Sweongyo copyhdrlen -= sizeof(qos); 1061177595Sweongyo } else 1062177595Sweongyo qos = *(uint16_t *) 1063177595Sweongyo (((struct ieee80211_qosframe *) wh)->i_qos); 1064177595Sweongyo } else 1065177595Sweongyo qos = 0; 1066177595Sweongyo 1067177595Sweongyo if (iswep) { 1068177595Sweongyo struct ieee80211_key *k; 1069177595Sweongyo 1070177595Sweongyo /* 1071177595Sweongyo * Construct the 802.11 header+trailer for an encrypted 1072177595Sweongyo * frame. The only reason this can fail is because of an 1073177595Sweongyo * unknown or unsupported cipher/key type. 1074177595Sweongyo * 1075177595Sweongyo * NB: we do this even though the firmware will ignore 1076177595Sweongyo * what we've done for WEP and TKIP as we need the 1077177595Sweongyo * ExtIV filled in for CCMP and this also adjusts 1078177595Sweongyo * the headers which simplifies our work below. 1079177595Sweongyo */ 1080178354Ssam k = ieee80211_crypto_encap(ni, m0); 1081177595Sweongyo if (k == NULL) { 1082177595Sweongyo /* 1083177595Sweongyo * This can happen when the key is yanked after the 1084177595Sweongyo * frame was queued. Just discard the frame; the 1085177595Sweongyo * 802.11 layer counts failures and provides 1086177595Sweongyo * debugging/diagnostics. 1087177595Sweongyo */ 1088177595Sweongyo m_freem(m0); 1089177595Sweongyo return EIO; 1090177595Sweongyo } 1091177595Sweongyo 1092177595Sweongyo /* 1093177595Sweongyo * Adjust the packet length for the crypto additions 1094177595Sweongyo * done during encap and any other bits that the f/w 1095177595Sweongyo * will add later on. 1096177595Sweongyo */ 1097177595Sweongyo pktlen = m0->m_pkthdr.len; 1098177595Sweongyo 1099177595Sweongyo /* packet header may have moved, reset our local pointer */ 1100177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1101177595Sweongyo } 1102177595Sweongyo 1103192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1104177595Sweongyo sc->malo_tx_th.wt_flags = 0; /* XXX */ 1105177595Sweongyo if (iswep) 1106177595Sweongyo sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1107177595Sweongyo sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1108177595Sweongyo sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1109177595Sweongyo 1110192468Ssam ieee80211_radiotap_tx(vap, m0); 1111177595Sweongyo } 1112177595Sweongyo 1113177595Sweongyo /* 1114177595Sweongyo * Copy up/down the 802.11 header; the firmware requires 1115177595Sweongyo * we present a 2-byte payload length followed by a 1116177595Sweongyo * 4-address header (w/o QoS), followed (optionally) by 1117177595Sweongyo * any WEP/ExtIV header (but only filled in for CCMP). 1118177595Sweongyo * We are assured the mbuf has sufficient headroom to 1119177595Sweongyo * prepend in-place by the setup of ic_headroom in 1120177595Sweongyo * malo_attach. 1121177595Sweongyo */ 1122177595Sweongyo if (hdrlen < sizeof(struct malo_txrec)) { 1123177595Sweongyo const int space = sizeof(struct malo_txrec) - hdrlen; 1124177595Sweongyo if (M_LEADINGSPACE(m0) < space) { 1125177595Sweongyo /* NB: should never happen */ 1126177595Sweongyo device_printf(sc->malo_dev, 1127177595Sweongyo "not enough headroom, need %d found %zd, " 1128177595Sweongyo "m_flags 0x%x m_len %d\n", 1129177595Sweongyo space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1130177595Sweongyo ieee80211_dump_pkt(ic, 1131177595Sweongyo mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1132177595Sweongyo m_freem(m0); 1133177595Sweongyo /* XXX stat */ 1134177595Sweongyo return EIO; 1135177595Sweongyo } 1136177595Sweongyo M_PREPEND(m0, space, M_NOWAIT); 1137177595Sweongyo } 1138177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1139177595Sweongyo if (wh != (struct ieee80211_frame *) &tr->wh) 1140177595Sweongyo ovbcopy(wh, &tr->wh, hdrlen); 1141177595Sweongyo /* 1142177595Sweongyo * Note: the "firmware length" is actually the length of the fully 1143177595Sweongyo * formed "802.11 payload". That is, it's everything except for 1144177595Sweongyo * the 802.11 header. In particular this includes all crypto 1145177595Sweongyo * material including the MIC! 1146177595Sweongyo */ 1147177595Sweongyo tr->fwlen = htole16(pktlen - hdrlen); 1148177595Sweongyo 1149177595Sweongyo /* 1150177595Sweongyo * Load the DMA map so any coalescing is done. This 1151177595Sweongyo * also calculates the number of descriptors we need. 1152177595Sweongyo */ 1153177595Sweongyo error = malo_tx_dmasetup(sc, bf, m0); 1154177595Sweongyo if (error != 0) 1155177595Sweongyo return error; 1156177595Sweongyo bf->bf_node = ni; /* NB: held reference */ 1157177595Sweongyo m0 = bf->bf_m; /* NB: may have changed */ 1158177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1159177595Sweongyo wh = (struct ieee80211_frame *)&tr->wh; 1160177595Sweongyo 1161177595Sweongyo /* 1162177595Sweongyo * Formulate tx descriptor. 1163177595Sweongyo */ 1164177595Sweongyo ds = bf->bf_desc; 1165177595Sweongyo txq = bf->bf_txq; 1166177595Sweongyo 1167177595Sweongyo ds->qosctrl = qos; /* NB: already little-endian */ 1168177595Sweongyo ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1169177595Sweongyo ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1170177595Sweongyo /* NB: pPhysNext setup once, don't touch */ 1171177595Sweongyo ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1172177595Sweongyo ds->sap_pktinfo = 0; 1173177595Sweongyo ds->format = 0; 1174177595Sweongyo 1175177595Sweongyo /* 1176177595Sweongyo * Select transmit rate. 1177177595Sweongyo */ 1178177595Sweongyo switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1179177595Sweongyo case IEEE80211_FC0_TYPE_MGT: 1180177595Sweongyo sc->malo_stats.mst_tx_mgmt++; 1181177595Sweongyo /* fall thru... */ 1182177595Sweongyo case IEEE80211_FC0_TYPE_CTL: 1183177595Sweongyo ds->txpriority = 1; 1184177595Sweongyo break; 1185177595Sweongyo case IEEE80211_FC0_TYPE_DATA: 1186177595Sweongyo ds->txpriority = txq->qnum; 1187177595Sweongyo break; 1188177595Sweongyo default: 1189287197Sglebius device_printf(sc->malo_dev, "bogus frame type 0x%x (%s)\n", 1190177595Sweongyo wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1191177595Sweongyo /* XXX statistic */ 1192177595Sweongyo m_freem(m0); 1193177595Sweongyo return EIO; 1194177595Sweongyo } 1195177595Sweongyo 1196177595Sweongyo#ifdef MALO_DEBUG 1197177595Sweongyo if (IFF_DUMPPKTS_XMIT(sc)) 1198177595Sweongyo ieee80211_dump_pkt(ic, 1199177595Sweongyo mtod(m0, const uint8_t *)+sizeof(uint16_t), 1200177595Sweongyo m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1201177595Sweongyo#endif 1202177595Sweongyo 1203177595Sweongyo MALO_TXQ_LOCK(txq); 1204177595Sweongyo if (!IS_DATA_FRAME(wh)) 1205177595Sweongyo ds->status |= htole32(1); 1206177595Sweongyo ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1207177595Sweongyo STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1208177595Sweongyo MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1209177595Sweongyo 1210199559Sjhb sc->malo_timer = 5; 1211177595Sweongyo MALO_TXQ_UNLOCK(txq); 1212177595Sweongyo return 0; 1213177595Sweongyo#undef IEEE80211_DIR_DSTODS 1214177595Sweongyo} 1215177595Sweongyo 1216287197Sglebiusstatic int 1217287197Sglebiusmalo_transmit(struct ieee80211com *ic, struct mbuf *m) 1218287197Sglebius{ 1219287197Sglebius struct malo_softc *sc = ic->ic_softc; 1220287197Sglebius int error; 1221287197Sglebius 1222287197Sglebius MALO_LOCK(sc); 1223287197Sglebius if (!sc->malo_running) { 1224287197Sglebius MALO_UNLOCK(sc); 1225287197Sglebius return (ENXIO); 1226287197Sglebius } 1227287197Sglebius error = mbufq_enqueue(&sc->malo_snd, m); 1228287197Sglebius if (error) { 1229287197Sglebius MALO_UNLOCK(sc); 1230287197Sglebius return (error); 1231287197Sglebius } 1232287197Sglebius malo_start(sc); 1233287197Sglebius MALO_UNLOCK(sc); 1234287197Sglebius return (0); 1235287197Sglebius} 1236287197Sglebius 1237177595Sweongyostatic void 1238287197Sglebiusmalo_start(struct malo_softc *sc) 1239177595Sweongyo{ 1240177595Sweongyo struct ieee80211_node *ni; 1241178354Ssam struct malo_txq *txq = &sc->malo_txq[0]; 1242177595Sweongyo struct malo_txbuf *bf = NULL; 1243177595Sweongyo struct mbuf *m; 1244178354Ssam int nqueued = 0; 1245177595Sweongyo 1246287197Sglebius MALO_LOCK_ASSERT(sc); 1247287197Sglebius 1248287197Sglebius if (!sc->malo_running || sc->malo_invalid) 1249177595Sweongyo return; 1250177595Sweongyo 1251287197Sglebius while ((m = mbufq_dequeue(&sc->malo_snd)) != NULL) { 1252178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1253178354Ssam bf = malo_getbuf(sc, txq); 1254178354Ssam if (bf == NULL) { 1255287197Sglebius mbufq_prepend(&sc->malo_snd, m); 1256178354Ssam sc->malo_stats.mst_tx_qstop++; 1257178354Ssam break; 1258178354Ssam } 1259177595Sweongyo /* 1260177595Sweongyo * Pass the frame to the h/w for transmission. 1261177595Sweongyo */ 1262177595Sweongyo if (malo_tx_start(sc, ni, bf, m)) { 1263287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 1264287197Sglebius IFCOUNTER_OERRORS, 1); 1265177595Sweongyo if (bf != NULL) { 1266177595Sweongyo bf->bf_m = NULL; 1267177595Sweongyo bf->bf_node = NULL; 1268177595Sweongyo MALO_TXQ_LOCK(txq); 1269177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1270177595Sweongyo MALO_TXQ_UNLOCK(txq); 1271177595Sweongyo } 1272177595Sweongyo ieee80211_free_node(ni); 1273177595Sweongyo continue; 1274177595Sweongyo } 1275177595Sweongyo nqueued++; 1276177595Sweongyo 1277177595Sweongyo if (nqueued >= malo_txcoalesce) { 1278177595Sweongyo /* 1279177595Sweongyo * Poke the firmware to process queued frames; 1280177595Sweongyo * see below about (lack of) locking. 1281177595Sweongyo */ 1282177595Sweongyo nqueued = 0; 1283177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1284177595Sweongyo } 1285177595Sweongyo } 1286177595Sweongyo 1287177595Sweongyo if (nqueued) { 1288177595Sweongyo /* 1289177595Sweongyo * NB: We don't need to lock against tx done because 1290177595Sweongyo * this just prods the firmware to check the transmit 1291177595Sweongyo * descriptors. The firmware will also start fetching 1292177595Sweongyo * descriptors by itself if it notices new ones are 1293177595Sweongyo * present when it goes to deliver a tx done interrupt 1294177595Sweongyo * to the host. So if we race with tx done processing 1295177595Sweongyo * it's ok. Delivering the kick here rather than in 1296177595Sweongyo * malo_tx_start is an optimization to avoid poking the 1297177595Sweongyo * firmware for each packet. 1298177595Sweongyo * 1299177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1300177595Sweongyo */ 1301177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1302177595Sweongyo } 1303177595Sweongyo} 1304177595Sweongyo 1305177595Sweongyostatic void 1306199559Sjhbmalo_watchdog(void *arg) 1307177595Sweongyo{ 1308287197Sglebius struct malo_softc *sc = arg; 1309177595Sweongyo 1310199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1311199559Sjhb if (sc->malo_timer == 0 || --sc->malo_timer > 0) 1312199559Sjhb return; 1313199559Sjhb 1314287197Sglebius if (sc->malo_running && !sc->malo_invalid) { 1315287197Sglebius device_printf(sc->malo_dev, "watchdog timeout\n"); 1316177595Sweongyo 1317177595Sweongyo /* XXX no way to reset h/w. now */ 1318177595Sweongyo 1319287197Sglebius counter_u64_add(sc->malo_ic.ic_oerrors, 1); 1320177595Sweongyo sc->malo_stats.mst_watchdog++; 1321177595Sweongyo } 1322177595Sweongyo} 1323177595Sweongyo 1324177595Sweongyostatic int 1325177595Sweongyomalo_hal_reset(struct malo_softc *sc) 1326177595Sweongyo{ 1327177595Sweongyo static int first = 0; 1328287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1329177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1330177595Sweongyo 1331177595Sweongyo if (first == 0) { 1332177595Sweongyo /* 1333177595Sweongyo * NB: when the device firstly is initialized, sometimes 1334177595Sweongyo * firmware could override rx/tx dma registers so we re-set 1335177595Sweongyo * these values once. 1336177595Sweongyo */ 1337177595Sweongyo malo_hal_set_rxtxdma(sc); 1338177595Sweongyo first = 1; 1339177595Sweongyo } 1340177595Sweongyo 1341177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1342177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1343177595Sweongyo malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1344177595Sweongyo malo_chan_set(sc, ic->ic_curchan); 1345177595Sweongyo 1346177595Sweongyo /* XXX needs other stuffs? */ 1347177595Sweongyo 1348177595Sweongyo return 1; 1349177595Sweongyo} 1350177595Sweongyo 1351177595Sweongyostatic __inline struct mbuf * 1352177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1353177595Sweongyo{ 1354177595Sweongyo struct mbuf *m; 1355177595Sweongyo bus_addr_t paddr; 1356177595Sweongyo int error; 1357177595Sweongyo 1358177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 1359243857Sglebius m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1360177595Sweongyo if (m == NULL) { 1361177595Sweongyo sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1362177595Sweongyo return NULL; 1363177595Sweongyo } 1364177595Sweongyo error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1365177595Sweongyo mtod(m, caddr_t), MJUMPAGESIZE, 1366177595Sweongyo malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1367177595Sweongyo if (error != 0) { 1368287197Sglebius device_printf(sc->malo_dev, 1369177595Sweongyo "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1370177595Sweongyo m_freem(m); 1371177595Sweongyo return NULL; 1372177595Sweongyo } 1373177595Sweongyo bf->bf_data = paddr; 1374177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1375177595Sweongyo 1376177595Sweongyo return m; 1377177595Sweongyo} 1378177595Sweongyo 1379177595Sweongyostatic int 1380177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1381177595Sweongyo{ 1382177595Sweongyo struct malo_rxdesc *ds; 1383177595Sweongyo 1384177595Sweongyo ds = bf->bf_desc; 1385177595Sweongyo if (bf->bf_m == NULL) { 1386177595Sweongyo bf->bf_m = malo_getrxmbuf(sc, bf); 1387177595Sweongyo if (bf->bf_m == NULL) { 1388177595Sweongyo /* mark descriptor to be skipped */ 1389177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1390177595Sweongyo /* NB: don't need PREREAD */ 1391177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1392177595Sweongyo return ENOMEM; 1393177595Sweongyo } 1394177595Sweongyo } 1395177595Sweongyo 1396177595Sweongyo /* 1397177595Sweongyo * Setup descriptor. 1398177595Sweongyo */ 1399177595Sweongyo ds->qosctrl = 0; 1400177595Sweongyo ds->snr = 0; 1401177595Sweongyo ds->status = MALO_RXD_STATUS_IDLE; 1402177595Sweongyo ds->channel = 0; 1403177595Sweongyo ds->pktlen = htole16(MALO_RXSIZE); 1404177595Sweongyo ds->nf = 0; 1405177595Sweongyo ds->physbuffdata = htole32(bf->bf_data); 1406177595Sweongyo /* NB: don't touch pPhysNext, set once */ 1407177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1408177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1409177595Sweongyo 1410177595Sweongyo return 0; 1411177595Sweongyo} 1412177595Sweongyo 1413177595Sweongyo/* 1414177595Sweongyo * Setup the rx data structures. This should only be done once or we may get 1415177595Sweongyo * out of sync with the firmware. 1416177595Sweongyo */ 1417177595Sweongyostatic int 1418177595Sweongyomalo_startrecv(struct malo_softc *sc) 1419177595Sweongyo{ 1420177595Sweongyo struct malo_rxbuf *bf, *prev; 1421177595Sweongyo struct malo_rxdesc *ds; 1422177595Sweongyo 1423177595Sweongyo if (sc->malo_recvsetup == 1) { 1424177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1425177595Sweongyo return 0; 1426177595Sweongyo } 1427177595Sweongyo 1428177595Sweongyo prev = NULL; 1429177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1430177595Sweongyo int error = malo_rxbuf_init(sc, bf); 1431177595Sweongyo if (error != 0) { 1432177595Sweongyo DPRINTF(sc, MALO_DEBUG_RECV, 1433177595Sweongyo "%s: malo_rxbuf_init failed %d\n", 1434177595Sweongyo __func__, error); 1435177595Sweongyo return error; 1436177595Sweongyo } 1437177595Sweongyo if (prev != NULL) { 1438177595Sweongyo ds = prev->bf_desc; 1439177595Sweongyo ds->physnext = htole32(bf->bf_daddr); 1440177595Sweongyo } 1441177595Sweongyo prev = bf; 1442177595Sweongyo } 1443177595Sweongyo if (prev != NULL) { 1444177595Sweongyo ds = prev->bf_desc; 1445177595Sweongyo ds->physnext = 1446177595Sweongyo htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1447177595Sweongyo } 1448177595Sweongyo 1449177595Sweongyo sc->malo_recvsetup = 1; 1450177595Sweongyo 1451177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1452177595Sweongyo 1453177595Sweongyo return 0; 1454177595Sweongyo} 1455177595Sweongyo 1456177595Sweongyostatic void 1457178354Ssammalo_init_locked(struct malo_softc *sc) 1458177595Sweongyo{ 1459177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1460177595Sweongyo int error; 1461177595Sweongyo 1462178354Ssam MALO_LOCK_ASSERT(sc); 1463177595Sweongyo 1464177595Sweongyo /* 1465177595Sweongyo * Stop anything previously setup. This is safe whether this is 1466177595Sweongyo * the first time through or not. 1467177595Sweongyo */ 1468287197Sglebius malo_stop(sc); 1469177595Sweongyo 1470177595Sweongyo /* 1471177595Sweongyo * Push state to the firmware. 1472177595Sweongyo */ 1473177595Sweongyo if (!malo_hal_reset(sc)) { 1474287197Sglebius device_printf(sc->malo_dev, 1475287197Sglebius "%s: unable to reset hardware\n", __func__); 1476178354Ssam return; 1477177595Sweongyo } 1478177595Sweongyo 1479177595Sweongyo /* 1480177595Sweongyo * Setup recv (once); transmit is already good to go. 1481177595Sweongyo */ 1482177595Sweongyo error = malo_startrecv(sc); 1483177595Sweongyo if (error != 0) { 1484287197Sglebius device_printf(sc->malo_dev, 1485287197Sglebius "%s: unable to start recv logic, error %d\n", 1486177595Sweongyo __func__, error); 1487178354Ssam return; 1488177595Sweongyo } 1489177595Sweongyo 1490177595Sweongyo /* 1491177595Sweongyo * Enable interrupts. 1492177595Sweongyo */ 1493177595Sweongyo sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1494177595Sweongyo | MALO_A2HRIC_BIT_TX_DONE 1495177595Sweongyo | MALO_A2HRIC_BIT_OPC_DONE 1496177595Sweongyo | MALO_A2HRIC_BIT_MAC_EVENT 1497177595Sweongyo | MALO_A2HRIC_BIT_RX_PROBLEM 1498177595Sweongyo | MALO_A2HRIC_BIT_ICV_ERROR 1499177595Sweongyo | MALO_A2HRIC_BIT_RADAR_DETECT 1500177595Sweongyo | MALO_A2HRIC_BIT_CHAN_SWITCH; 1501177595Sweongyo 1502287197Sglebius sc->malo_running = 1; 1503177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1504199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1505178354Ssam} 1506177595Sweongyo 1507178354Ssamstatic void 1508178354Ssammalo_init(void *arg) 1509178354Ssam{ 1510178354Ssam struct malo_softc *sc = (struct malo_softc *) arg; 1511287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1512178354Ssam 1513178354Ssam MALO_LOCK(sc); 1514178354Ssam malo_init_locked(sc); 1515177595Sweongyo MALO_UNLOCK(sc); 1516177595Sweongyo 1517287197Sglebius if (sc->malo_running) 1518178354Ssam ieee80211_start_all(ic); /* start all vap's */ 1519177595Sweongyo} 1520177595Sweongyo 1521177595Sweongyo/* 1522177595Sweongyo * Set the multicast filter contents into the hardware. 1523177595Sweongyo */ 1524177595Sweongyostatic void 1525177595Sweongyomalo_setmcastfilter(struct malo_softc *sc) 1526177595Sweongyo{ 1527287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1528287197Sglebius struct ieee80211vap *vap; 1529177595Sweongyo uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1530177595Sweongyo uint8_t *mp; 1531177595Sweongyo int nmc; 1532177595Sweongyo 1533177595Sweongyo mp = macs; 1534177595Sweongyo nmc = 0; 1535177595Sweongyo 1536287197Sglebius if (ic->ic_opmode == IEEE80211_M_MONITOR || ic->ic_allmulti > 0 || 1537287197Sglebius ic->ic_promisc > 0) 1538177595Sweongyo goto all; 1539177595Sweongyo 1540287197Sglebius TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { 1541287197Sglebius struct ifnet *ifp; 1542287197Sglebius struct ifmultiaddr *ifma; 1543287197Sglebius 1544287197Sglebius ifp = vap->iv_ifp; 1545287197Sglebius if_maddr_rlock(ifp); 1546287197Sglebius TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1547287197Sglebius if (ifma->ifma_addr->sa_family != AF_LINK) 1548287197Sglebius continue; 1549287197Sglebius 1550287197Sglebius if (nmc == MALO_HAL_MCAST_MAX) { 1551287197Sglebius ifp->if_flags |= IFF_ALLMULTI; 1552287197Sglebius if_maddr_runlock(ifp); 1553287197Sglebius goto all; 1554287197Sglebius } 1555287197Sglebius IEEE80211_ADDR_COPY(mp, 1556287197Sglebius LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1557287197Sglebius 1558287197Sglebius mp += IEEE80211_ADDR_LEN, nmc++; 1559286437Sadrian } 1560287197Sglebius if_maddr_runlock(ifp); 1561177595Sweongyo } 1562177595Sweongyo 1563177595Sweongyo malo_hal_setmcast(sc->malo_mh, nmc, macs); 1564177595Sweongyo 1565177595Sweongyoall: 1566177595Sweongyo /* 1567177595Sweongyo * XXX we don't know how to set the f/w for supporting 1568177595Sweongyo * IFF_ALLMULTI | IFF_PROMISC cases 1569177595Sweongyo */ 1570177595Sweongyo return; 1571177595Sweongyo} 1572177595Sweongyo 1573177595Sweongyostatic int 1574177595Sweongyomalo_mode_init(struct malo_softc *sc) 1575177595Sweongyo{ 1576287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1577177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1578177595Sweongyo 1579177595Sweongyo /* 1580177595Sweongyo * NB: Ignore promisc in hostap mode; it's set by the 1581177595Sweongyo * bridge. This is wrong but we have no way to 1582177595Sweongyo * identify internal requests (from the bridge) 1583177595Sweongyo * versus external requests such as for tcpdump. 1584177595Sweongyo */ 1585287197Sglebius malo_hal_setpromisc(mh, ic->ic_promisc > 0 && 1586177595Sweongyo ic->ic_opmode != IEEE80211_M_HOSTAP); 1587177595Sweongyo malo_setmcastfilter(sc); 1588177595Sweongyo 1589177595Sweongyo return ENXIO; 1590177595Sweongyo} 1591177595Sweongyo 1592177595Sweongyostatic void 1593177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1594177595Sweongyo{ 1595177595Sweongyo struct ieee80211_node *ni; 1596177595Sweongyo struct malo_txbuf *bf; 1597177595Sweongyo u_int ix; 1598177595Sweongyo 1599177595Sweongyo /* 1600177595Sweongyo * NB: this assumes output has been stopped and 1601177595Sweongyo * we do not need to block malo_tx_tasklet 1602177595Sweongyo */ 1603177595Sweongyo for (ix = 0;; ix++) { 1604177595Sweongyo MALO_TXQ_LOCK(txq); 1605177595Sweongyo bf = STAILQ_FIRST(&txq->active); 1606177595Sweongyo if (bf == NULL) { 1607177595Sweongyo MALO_TXQ_UNLOCK(txq); 1608177595Sweongyo break; 1609177595Sweongyo } 1610177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1611177595Sweongyo MALO_TXQ_UNLOCK(txq); 1612177595Sweongyo#ifdef MALO_DEBUG 1613177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RESET) { 1614287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1615177595Sweongyo const struct malo_txrec *tr = 1616177595Sweongyo mtod(bf->bf_m, const struct malo_txrec *); 1617177595Sweongyo malo_printtxbuf(bf, txq->qnum, ix); 1618178354Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1619177595Sweongyo bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1620177595Sweongyo } 1621177595Sweongyo#endif /* MALO_DEBUG */ 1622177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1623177595Sweongyo ni = bf->bf_node; 1624177595Sweongyo bf->bf_node = NULL; 1625177595Sweongyo if (ni != NULL) { 1626177595Sweongyo /* 1627177595Sweongyo * Reclaim node reference. 1628177595Sweongyo */ 1629177595Sweongyo ieee80211_free_node(ni); 1630177595Sweongyo } 1631177595Sweongyo m_freem(bf->bf_m); 1632177595Sweongyo bf->bf_m = NULL; 1633177595Sweongyo 1634177595Sweongyo MALO_TXQ_LOCK(txq); 1635177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1636177595Sweongyo txq->nfree++; 1637177595Sweongyo MALO_TXQ_UNLOCK(txq); 1638177595Sweongyo } 1639177595Sweongyo} 1640177595Sweongyo 1641177595Sweongyostatic void 1642287197Sglebiusmalo_stop(struct malo_softc *sc) 1643177595Sweongyo{ 1644177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1645178354Ssam int i; 1646177595Sweongyo 1647287197Sglebius DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u running %u\n", 1648287197Sglebius __func__, sc->malo_invalid, sc->malo_running); 1649177595Sweongyo 1650177595Sweongyo MALO_LOCK_ASSERT(sc); 1651177595Sweongyo 1652287197Sglebius if (!sc->malo_running) 1653177595Sweongyo return; 1654177595Sweongyo 1655177595Sweongyo /* 1656177595Sweongyo * Shutdown the hardware and driver: 1657177595Sweongyo * disable interrupts 1658177595Sweongyo * turn off the radio 1659177595Sweongyo * drain and release tx queues 1660177595Sweongyo * 1661177595Sweongyo * Note that some of this work is not possible if the hardware 1662177595Sweongyo * is gone (invalid). 1663177595Sweongyo */ 1664287197Sglebius sc->malo_running = 0; 1665199559Sjhb callout_stop(&sc->malo_watchdog_timer); 1666199559Sjhb sc->malo_timer = 0; 1667287197Sglebius /* disable interrupt. */ 1668178354Ssam malo_hal_intrset(mh, 0); 1669178354Ssam /* turn off the radio. */ 1670178354Ssam malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1671177595Sweongyo 1672177595Sweongyo /* drain and release tx queues. */ 1673177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1674177595Sweongyo malo_tx_draintxq(sc, &sc->malo_txq[i]); 1675177595Sweongyo} 1676177595Sweongyo 1677287197Sglebiusstatic void 1678287197Sglebiusmalo_parent(struct ieee80211com *ic) 1679177595Sweongyo{ 1680287197Sglebius struct malo_softc *sc = ic->ic_softc; 1681287197Sglebius int startall = 0; 1682177595Sweongyo 1683177595Sweongyo MALO_LOCK(sc); 1684287197Sglebius if (ic->ic_nrunning > 0) { 1685287197Sglebius /* 1686287197Sglebius * Beware of being called during attach/detach 1687287197Sglebius * to reset promiscuous mode. In that case we 1688287197Sglebius * will still be marked UP but not RUNNING. 1689287197Sglebius * However trying to re-init the interface 1690287197Sglebius * is the wrong thing to do as we've already 1691287197Sglebius * torn down much of our state. There's 1692287197Sglebius * probably a better way to deal with this. 1693287197Sglebius */ 1694287197Sglebius if (!sc->malo_running && !sc->malo_invalid) { 1695287197Sglebius malo_init(sc); 1696287197Sglebius startall = 1; 1697287197Sglebius } 1698287197Sglebius /* 1699287197Sglebius * To avoid rescanning another access point, 1700287197Sglebius * do not call malo_init() here. Instead, 1701287197Sglebius * only reflect promisc mode settings. 1702287197Sglebius */ 1703287197Sglebius malo_mode_init(sc); 1704287197Sglebius } else if (sc->malo_running) 1705287197Sglebius malo_stop(sc); 1706177595Sweongyo MALO_UNLOCK(sc); 1707178354Ssam if (startall) 1708178354Ssam ieee80211_start_all(ic); 1709177595Sweongyo} 1710177595Sweongyo 1711177595Sweongyo/* 1712177595Sweongyo * Callback from the 802.11 layer to update the slot time 1713177595Sweongyo * based on the current setting. We use it to notify the 1714177595Sweongyo * firmware of ERP changes and the f/w takes care of things 1715177595Sweongyo * like slot time and preamble. 1716177595Sweongyo */ 1717177595Sweongyostatic void 1718283540Sglebiusmalo_updateslot(struct ieee80211com *ic) 1719177595Sweongyo{ 1720283540Sglebius struct malo_softc *sc = ic->ic_softc; 1721177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1722177595Sweongyo int error; 1723177595Sweongyo 1724177595Sweongyo /* NB: can be called early; suppress needless cmds */ 1725287197Sglebius if (!sc->malo_running) 1726177595Sweongyo return; 1727177595Sweongyo 1728177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 1729177595Sweongyo "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1730177595Sweongyo __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1731177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1732177595Sweongyo 1733177595Sweongyo if (ic->ic_flags & IEEE80211_F_SHSLOT) 1734177595Sweongyo error = malo_hal_set_slot(mh, 1); 1735177595Sweongyo else 1736177595Sweongyo error = malo_hal_set_slot(mh, 0); 1737177595Sweongyo 1738177595Sweongyo if (error != 0) 1739177595Sweongyo device_printf(sc->malo_dev, "setting %s slot failed\n", 1740177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1741177595Sweongyo} 1742177595Sweongyo 1743177595Sweongyostatic int 1744178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1745177595Sweongyo{ 1746178354Ssam struct ieee80211com *ic = vap->iv_ic; 1747287197Sglebius struct malo_softc *sc = ic->ic_softc; 1748177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1749177595Sweongyo int error; 1750177595Sweongyo 1751177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1752178354Ssam ieee80211_state_name[vap->iv_state], 1753177595Sweongyo ieee80211_state_name[nstate]); 1754177595Sweongyo 1755177595Sweongyo /* 1756178354Ssam * Invoke the net80211 layer first so iv_bss is setup. 1757177595Sweongyo */ 1758178354Ssam error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1759178354Ssam if (error != 0) 1760178354Ssam return error; 1761178354Ssam 1762178354Ssam if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1763178354Ssam struct ieee80211_node *ni = vap->iv_bss; 1764178354Ssam enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1765178354Ssam const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1766178354Ssam 1767177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, 1768178354Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1769178354Ssam "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1770178354Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1771177595Sweongyo ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1772178354Ssam ieee80211_chan2ieee(ic, ic->ic_curchan), 1773178354Ssam ni->ni_associd, mode, tp->ucastrate); 1774177595Sweongyo 1775178354Ssam malo_hal_setradio(mh, 1, 1776178354Ssam (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1777178354Ssam MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1778178354Ssam malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1779178354Ssam malo_hal_set_rate(mh, mode, 1780178354Ssam tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1781178354Ssam 0 : malo_fix2rate(tp->ucastrate)); 1782177595Sweongyo } 1783178354Ssam return 0; 1784177595Sweongyo} 1785177595Sweongyo 1786177595Sweongyostatic int 1787177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1788177595Sweongyo const struct ieee80211_bpf_params *params) 1789177595Sweongyo{ 1790177595Sweongyo struct ieee80211com *ic = ni->ni_ic; 1791287197Sglebius struct malo_softc *sc = ic->ic_softc; 1792177595Sweongyo struct malo_txbuf *bf; 1793177595Sweongyo struct malo_txq *txq; 1794177595Sweongyo 1795287197Sglebius if (!sc->malo_running || sc->malo_invalid) { 1796177595Sweongyo ieee80211_free_node(ni); 1797177595Sweongyo m_freem(m); 1798177595Sweongyo return ENETDOWN; 1799177595Sweongyo } 1800177595Sweongyo 1801177595Sweongyo /* 1802177595Sweongyo * Grab a TX buffer and associated resources. Note that we depend 1803177595Sweongyo * on the classification by the 802.11 layer to get to the right h/w 1804177595Sweongyo * queue. Management frames must ALWAYS go on queue 1 but we 1805177595Sweongyo * cannot just force that here because we may receive non-mgt frames. 1806177595Sweongyo */ 1807177595Sweongyo txq = &sc->malo_txq[0]; 1808177595Sweongyo bf = malo_getbuf(sc, txq); 1809177595Sweongyo if (bf == NULL) { 1810177595Sweongyo ieee80211_free_node(ni); 1811177595Sweongyo m_freem(m); 1812177595Sweongyo return ENOBUFS; 1813177595Sweongyo } 1814177595Sweongyo 1815177595Sweongyo /* 1816177595Sweongyo * Pass the frame to the h/w for transmission. 1817177595Sweongyo */ 1818177595Sweongyo if (malo_tx_start(sc, ni, bf, m) != 0) { 1819177595Sweongyo bf->bf_m = NULL; 1820177595Sweongyo bf->bf_node = NULL; 1821177595Sweongyo MALO_TXQ_LOCK(txq); 1822177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1823177595Sweongyo txq->nfree++; 1824177595Sweongyo MALO_TXQ_UNLOCK(txq); 1825177595Sweongyo 1826177595Sweongyo ieee80211_free_node(ni); 1827177595Sweongyo return EIO; /* XXX */ 1828177595Sweongyo } 1829177595Sweongyo 1830177595Sweongyo /* 1831177595Sweongyo * NB: We don't need to lock against tx done because this just 1832177595Sweongyo * prods the firmware to check the transmit descriptors. The firmware 1833177595Sweongyo * will also start fetching descriptors by itself if it notices 1834177595Sweongyo * new ones are present when it goes to deliver a tx done interrupt 1835177595Sweongyo * to the host. So if we race with tx done processing it's ok. 1836177595Sweongyo * Delivering the kick here rather than in malo_tx_start is 1837177595Sweongyo * an optimization to avoid poking the firmware for each packet. 1838177595Sweongyo * 1839177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1840177595Sweongyo */ 1841177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1842177595Sweongyo 1843177595Sweongyo return 0; 1844177595Sweongyo} 1845177595Sweongyo 1846177595Sweongyostatic void 1847177595Sweongyomalo_sysctlattach(struct malo_softc *sc) 1848177595Sweongyo{ 1849177595Sweongyo#ifdef MALO_DEBUG 1850177595Sweongyo struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1851177595Sweongyo struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1852177595Sweongyo 1853177595Sweongyo sc->malo_debug = malo_debug; 1854177595Sweongyo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1855177595Sweongyo "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1856177595Sweongyo "control debugging printfs"); 1857177595Sweongyo#endif 1858177595Sweongyo} 1859177595Sweongyo 1860177595Sweongyostatic void 1861177595Sweongyomalo_announce(struct malo_softc *sc) 1862177595Sweongyo{ 1863177595Sweongyo 1864287197Sglebius device_printf(sc->malo_dev, 1865287197Sglebius "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1866177595Sweongyo sc->malo_hwspecs.hwversion, 1867177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1868177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1869177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1870177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1871177595Sweongyo sc->malo_hwspecs.regioncode); 1872177595Sweongyo 1873177595Sweongyo if (bootverbose || malo_rxbuf != MALO_RXBUF) 1874287197Sglebius device_printf(sc->malo_dev, 1875287197Sglebius "using %u rx buffers\n", malo_rxbuf); 1876177595Sweongyo if (bootverbose || malo_txbuf != MALO_TXBUF) 1877287197Sglebius device_printf(sc->malo_dev, 1878287197Sglebius "using %u tx buffers\n", malo_txbuf); 1879177595Sweongyo} 1880177595Sweongyo 1881177595Sweongyo/* 1882177595Sweongyo * Convert net80211 channel to a HAL channel. 1883177595Sweongyo */ 1884177595Sweongyostatic void 1885177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1886177595Sweongyo{ 1887177595Sweongyo hc->channel = chan->ic_ieee; 1888177595Sweongyo 1889177595Sweongyo *(uint32_t *)&hc->flags = 0; 1890177595Sweongyo if (IEEE80211_IS_CHAN_2GHZ(chan)) 1891177595Sweongyo hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1892177595Sweongyo} 1893177595Sweongyo 1894177595Sweongyo/* 1895177595Sweongyo * Set/change channels. If the channel is really being changed, 1896177595Sweongyo * it's done by reseting the chip. To accomplish this we must 1897177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la 1898177595Sweongyo * malo_init. 1899177595Sweongyo */ 1900177595Sweongyostatic int 1901177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1902177595Sweongyo{ 1903177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1904177595Sweongyo struct malo_hal_channel hchan; 1905177595Sweongyo 1906177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1907177595Sweongyo __func__, chan->ic_freq, chan->ic_flags); 1908177595Sweongyo 1909177595Sweongyo /* 1910177595Sweongyo * Convert to a HAL channel description with the flags constrained 1911177595Sweongyo * to reflect the current operating mode. 1912177595Sweongyo */ 1913177595Sweongyo malo_mapchan(&hchan, chan); 1914177595Sweongyo malo_hal_intrset(mh, 0); /* disable interrupts */ 1915177595Sweongyo malo_hal_setchannel(mh, &hchan); 1916177595Sweongyo malo_hal_settxpower(mh, &hchan); 1917177595Sweongyo 1918177595Sweongyo /* 1919177595Sweongyo * Update internal state. 1920177595Sweongyo */ 1921177595Sweongyo sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 1922177595Sweongyo sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 1923177595Sweongyo if (IEEE80211_IS_CHAN_ANYG(chan)) { 1924177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 1925177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 1926177595Sweongyo } else { 1927177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 1928177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 1929177595Sweongyo } 1930177595Sweongyo sc->malo_curchan = hchan; 1931177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1932177595Sweongyo 1933177595Sweongyo return 0; 1934177595Sweongyo} 1935177595Sweongyo 1936177595Sweongyostatic void 1937177595Sweongyomalo_scan_start(struct ieee80211com *ic) 1938177595Sweongyo{ 1939287197Sglebius struct malo_softc *sc = ic->ic_softc; 1940177595Sweongyo 1941177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 1942177595Sweongyo} 1943177595Sweongyo 1944177595Sweongyostatic void 1945177595Sweongyomalo_scan_end(struct ieee80211com *ic) 1946177595Sweongyo{ 1947287197Sglebius struct malo_softc *sc = ic->ic_softc; 1948177595Sweongyo 1949177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 1950177595Sweongyo} 1951177595Sweongyo 1952177595Sweongyostatic void 1953177595Sweongyomalo_set_channel(struct ieee80211com *ic) 1954177595Sweongyo{ 1955287197Sglebius struct malo_softc *sc = ic->ic_softc; 1956177595Sweongyo 1957177595Sweongyo (void) malo_chan_set(sc, ic->ic_curchan); 1958177595Sweongyo} 1959177595Sweongyo 1960177595Sweongyostatic void 1961177595Sweongyomalo_rx_proc(void *arg, int npending) 1962177595Sweongyo{ 1963177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 1964177595Sweongyo ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 1965177595Sweongyo IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1966177595Sweongyo struct malo_softc *sc = arg; 1967287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 1968177595Sweongyo struct malo_rxbuf *bf; 1969177595Sweongyo struct malo_rxdesc *ds; 1970177595Sweongyo struct mbuf *m, *mnew; 1971177595Sweongyo struct ieee80211_qosframe *wh; 1972177595Sweongyo struct ieee80211_qosframe_addr4 *wh4; 1973177595Sweongyo struct ieee80211_node *ni; 1974177595Sweongyo int off, len, hdrlen, pktlen, rssi, ntodo; 1975177595Sweongyo uint8_t *data, status; 1976177595Sweongyo uint32_t readptr, writeptr; 1977177595Sweongyo 1978177595Sweongyo DPRINTF(sc, MALO_DEBUG_RX_PROC, 1979177595Sweongyo "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 1980177595Sweongyo __func__, npending, 1981177595Sweongyo sc->malo_hwspecs.rxdesc_read, 1982177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 1983177595Sweongyo sc->malo_hwspecs.rxdesc_write, 1984177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 1985177595Sweongyo 1986177595Sweongyo readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 1987177595Sweongyo writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 1988177595Sweongyo if (readptr == writeptr) 1989177595Sweongyo return; 1990177595Sweongyo 1991177595Sweongyo bf = sc->malo_rxnext; 1992178354Ssam for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 1993177595Sweongyo if (bf == NULL) { 1994177595Sweongyo bf = STAILQ_FIRST(&sc->malo_rxbuf); 1995177595Sweongyo break; 1996177595Sweongyo } 1997177595Sweongyo ds = bf->bf_desc; 1998177595Sweongyo if (bf->bf_m == NULL) { 1999177595Sweongyo /* 2000177595Sweongyo * If data allocation failed previously there 2001177595Sweongyo * will be no buffer; try again to re-populate it. 2002177595Sweongyo * Note the firmware will not advance to the next 2003177595Sweongyo * descriptor with a dma buffer so we must mimic 2004177595Sweongyo * this or we'll get out of sync. 2005177595Sweongyo */ 2006177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, 2007177595Sweongyo "%s: rx buf w/o dma memory\n", __func__); 2008177595Sweongyo (void)malo_rxbuf_init(sc, bf); 2009177595Sweongyo break; 2010177595Sweongyo } 2011177595Sweongyo MALO_RXDESC_SYNC(sc, ds, 2012177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2013177595Sweongyo if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2014177595Sweongyo break; 2015177595Sweongyo 2016177595Sweongyo readptr = le32toh(ds->physnext); 2017177595Sweongyo 2018177595Sweongyo#ifdef MALO_DEBUG 2019177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2020177595Sweongyo malo_printrxbuf(bf, 0); 2021177595Sweongyo#endif 2022177595Sweongyo status = ds->status; 2023177595Sweongyo if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2024287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 2025177595Sweongyo goto rx_next; 2026177595Sweongyo } 2027177595Sweongyo /* 2028177595Sweongyo * Sync the data buffer. 2029177595Sweongyo */ 2030177595Sweongyo len = le16toh(ds->pktlen); 2031177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2032177595Sweongyo BUS_DMASYNC_POSTREAD); 2033177595Sweongyo /* 2034177595Sweongyo * The 802.11 header is provided all or in part at the front; 2035177595Sweongyo * use it to calculate the true size of the header that we'll 2036177595Sweongyo * construct below. We use this to figure out where to copy 2037177595Sweongyo * payload prior to constructing the header. 2038177595Sweongyo */ 2039177595Sweongyo m = bf->bf_m; 2040201758Smbr data = mtod(m, uint8_t *); 2041177595Sweongyo hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2042177595Sweongyo off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2043177595Sweongyo 2044177595Sweongyo /* 2045178354Ssam * Calculate RSSI. XXX wrong 2046177595Sweongyo */ 2047177595Sweongyo rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2048177595Sweongyo if (rssi > 100) 2049177595Sweongyo rssi = 100; 2050177595Sweongyo 2051177595Sweongyo pktlen = hdrlen + (len - off); 2052177595Sweongyo /* 2053177595Sweongyo * NB: we know our frame is at least as large as 2054177595Sweongyo * IEEE80211_MIN_LEN because there is a 4-address frame at 2055177595Sweongyo * the front. Hence there's no need to vet the packet length. 2056177595Sweongyo * If the frame in fact is too small it should be discarded 2057177595Sweongyo * at the net80211 layer. 2058177595Sweongyo */ 2059177595Sweongyo 2060177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 2061177595Sweongyo mnew = malo_getrxmbuf(sc, bf); 2062177595Sweongyo if (mnew == NULL) { 2063287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 2064177595Sweongyo goto rx_next; 2065177595Sweongyo } 2066177595Sweongyo /* 2067177595Sweongyo * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2068177595Sweongyo * re-setup the rx descriptor using the replacement dma 2069177595Sweongyo * buffer we just installed above. 2070177595Sweongyo */ 2071177595Sweongyo bf->bf_m = mnew; 2072177595Sweongyo m->m_data += off - hdrlen; 2073177595Sweongyo m->m_pkthdr.len = m->m_len = pktlen; 2074177595Sweongyo 2075177595Sweongyo /* 2076177595Sweongyo * Piece 802.11 header together. 2077177595Sweongyo */ 2078177595Sweongyo wh = mtod(m, struct ieee80211_qosframe *); 2079177595Sweongyo /* NB: don't need to do this sometimes but ... */ 2080177595Sweongyo /* XXX special case so we can memcpy after m_devget? */ 2081177595Sweongyo ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2082177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 2083177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 2084177595Sweongyo wh4 = mtod(m, 2085177595Sweongyo struct ieee80211_qosframe_addr4*); 2086177595Sweongyo *(uint16_t *)wh4->i_qos = ds->qosctrl; 2087177595Sweongyo } else { 2088177595Sweongyo *(uint16_t *)wh->i_qos = ds->qosctrl; 2089177595Sweongyo } 2090177595Sweongyo } 2091192468Ssam if (ieee80211_radiotap_active(ic)) { 2092177595Sweongyo sc->malo_rx_th.wr_flags = 0; 2093177595Sweongyo sc->malo_rx_th.wr_rate = ds->rate; 2094177595Sweongyo sc->malo_rx_th.wr_antsignal = rssi; 2095177595Sweongyo sc->malo_rx_th.wr_antnoise = ds->nf; 2096177595Sweongyo } 2097177595Sweongyo#ifdef MALO_DEBUG 2098177595Sweongyo if (IFF_DUMPPKTS_RECV(sc, wh)) { 2099177595Sweongyo ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2100177595Sweongyo len, ds->rate, rssi); 2101177595Sweongyo } 2102177595Sweongyo#endif 2103177595Sweongyo /* dispatch */ 2104177595Sweongyo ni = ieee80211_find_rxnode(ic, 2105178354Ssam (struct ieee80211_frame_min *)wh); 2106178354Ssam if (ni != NULL) { 2107192468Ssam (void) ieee80211_input(ni, m, rssi, ds->nf); 2108178354Ssam ieee80211_free_node(ni); 2109178354Ssam } else 2110192468Ssam (void) ieee80211_input_all(ic, m, rssi, ds->nf); 2111177595Sweongyorx_next: 2112177595Sweongyo /* NB: ignore ENOMEM so we process more descriptors */ 2113177595Sweongyo (void) malo_rxbuf_init(sc, bf); 2114177595Sweongyo bf = STAILQ_NEXT(bf, bf_list); 2115177595Sweongyo } 2116177595Sweongyo 2117177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2118177595Sweongyo sc->malo_rxnext = bf; 2119177595Sweongyo 2120287197Sglebius if (mbufq_first(&sc->malo_snd) != NULL) 2121287197Sglebius malo_start(sc); 2122177595Sweongyo#undef IEEE80211_DIR_DSTODS 2123177595Sweongyo} 2124177595Sweongyo 2125177595Sweongyo/* 2126177595Sweongyo * Reclaim all tx queue resources. 2127177595Sweongyo */ 2128177595Sweongyostatic void 2129177595Sweongyomalo_tx_cleanup(struct malo_softc *sc) 2130177595Sweongyo{ 2131177595Sweongyo int i; 2132177595Sweongyo 2133177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2134177595Sweongyo malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2135177595Sweongyo} 2136177595Sweongyo 2137177595Sweongyoint 2138177595Sweongyomalo_detach(struct malo_softc *sc) 2139177595Sweongyo{ 2140287197Sglebius struct ieee80211com *ic = &sc->malo_ic; 2141177595Sweongyo 2142287197Sglebius malo_stop(sc); 2143177595Sweongyo 2144177595Sweongyo if (sc->malo_tq != NULL) { 2145177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2146177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2147177595Sweongyo taskqueue_free(sc->malo_tq); 2148177595Sweongyo sc->malo_tq = NULL; 2149177595Sweongyo } 2150177595Sweongyo 2151177595Sweongyo /* 2152177595Sweongyo * NB: the order of these is important: 2153177595Sweongyo * o call the 802.11 layer before detaching the hal to 2154177595Sweongyo * insure callbacks into the driver to delete global 2155177595Sweongyo * key cache entries can be handled 2156177595Sweongyo * o reclaim the tx queue data structures after calling 2157177595Sweongyo * the 802.11 layer as we'll get called back to reclaim 2158177595Sweongyo * node state and potentially want to use them 2159177595Sweongyo * o to cleanup the tx queues the hal is called, so detach 2160177595Sweongyo * it last 2161177595Sweongyo * Other than that, it's straightforward... 2162177595Sweongyo */ 2163178354Ssam ieee80211_ifdetach(ic); 2164199559Sjhb callout_drain(&sc->malo_watchdog_timer); 2165177595Sweongyo malo_dma_cleanup(sc); 2166177595Sweongyo malo_tx_cleanup(sc); 2167177595Sweongyo malo_hal_detach(sc->malo_mh); 2168287197Sglebius mbufq_drain(&sc->malo_snd); 2169177595Sweongyo MALO_LOCK_DESTROY(sc); 2170177595Sweongyo 2171177595Sweongyo return 0; 2172177595Sweongyo} 2173177595Sweongyo 2174177595Sweongyovoid 2175177595Sweongyomalo_shutdown(struct malo_softc *sc) 2176177595Sweongyo{ 2177287197Sglebius 2178287197Sglebius malo_stop(sc); 2179177595Sweongyo} 2180177595Sweongyo 2181177595Sweongyovoid 2182177595Sweongyomalo_suspend(struct malo_softc *sc) 2183177595Sweongyo{ 2184177595Sweongyo 2185287197Sglebius malo_stop(sc); 2186177595Sweongyo} 2187177595Sweongyo 2188177595Sweongyovoid 2189177595Sweongyomalo_resume(struct malo_softc *sc) 2190177595Sweongyo{ 2191177595Sweongyo 2192287197Sglebius if (sc->malo_ic.ic_nrunning > 0) 2193177595Sweongyo malo_init(sc); 2194177595Sweongyo} 2195