if_malo.c revision 283540
1177595Sweongyo/*- 2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc. 4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting 5177595Sweongyo * All rights reserved. 6177595Sweongyo * 7177595Sweongyo * Redistribution and use in source and binary forms, with or without 8177595Sweongyo * modification, are permitted provided that the following conditions 9177595Sweongyo * are met: 10177595Sweongyo * 1. Redistributions of source code must retain the above copyright 11177595Sweongyo * notice, this list of conditions and the following disclaimer, 12177595Sweongyo * without modification. 13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14177595Sweongyo * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15177595Sweongyo * redistribution must be conditioned upon including a substantially 16177595Sweongyo * similar Disclaimer requirement for further binary redistribution. 17177595Sweongyo * 18177595Sweongyo * NO WARRANTY 19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES. 30177595Sweongyo */ 31177595Sweongyo 32177595Sweongyo#include <sys/cdefs.h> 33177595Sweongyo#ifdef __FreeBSD__ 34177595Sweongyo__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 283540 2015-05-25 19:53:29Z glebius $"); 35177595Sweongyo#endif 36177595Sweongyo 37178354Ssam#include "opt_malo.h" 38178354Ssam 39177595Sweongyo#include <sys/param.h> 40177595Sweongyo#include <sys/endian.h> 41177595Sweongyo#include <sys/kernel.h> 42177595Sweongyo#include <sys/socket.h> 43177595Sweongyo#include <sys/sockio.h> 44177595Sweongyo#include <sys/sysctl.h> 45177595Sweongyo#include <sys/taskqueue.h> 46177595Sweongyo 47177595Sweongyo#include <machine/bus.h> 48177595Sweongyo#include <sys/bus.h> 49177595Sweongyo 50177595Sweongyo#include <net/if.h> 51257176Sglebius#include <net/if_var.h> 52177595Sweongyo#include <net/if_dl.h> 53177595Sweongyo#include <net/if_media.h> 54177595Sweongyo#include <net/if_types.h> 55177595Sweongyo#include <net/ethernet.h> 56177595Sweongyo 57177595Sweongyo#include <net80211/ieee80211_var.h> 58177595Sweongyo#include <net80211/ieee80211_regdomain.h> 59177595Sweongyo 60177595Sweongyo#include <net/bpf.h> 61177595Sweongyo 62177595Sweongyo#include <dev/malo/if_malo.h> 63177595Sweongyo 64177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 65177595Sweongyo "Marvell 88w8335 driver parameters"); 66177595Sweongyo 67177595Sweongyostatic int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 68267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce, 69177595Sweongyo 0, "tx buffers to send at once"); 70177595Sweongyostatic int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf, 72177595Sweongyo 0, "rx buffers allocated"); 73177595Sweongyostatic int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 74267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota, 75177595Sweongyo 0, "max rx buffers to process per interrupt"); 76177595Sweongyostatic int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 77267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf, 78177595Sweongyo 0, "tx buffers allocated"); 79177595Sweongyo 80177595Sweongyo#ifdef MALO_DEBUG 81177595Sweongyostatic int malo_debug = 0; 82267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug, 83177595Sweongyo 0, "control debugging printfs"); 84177595Sweongyoenum { 85177595Sweongyo MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 86177595Sweongyo MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 87177595Sweongyo MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 88177595Sweongyo MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 89177595Sweongyo MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 90177595Sweongyo MALO_DEBUG_INTR = 0x00000040, /* ISR */ 91177595Sweongyo MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 92177595Sweongyo MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 93177595Sweongyo MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 94177595Sweongyo MALO_DEBUG_NODE = 0x00000800, /* node management */ 95177595Sweongyo MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 96177595Sweongyo MALO_DEBUG_FW = 0x00008000, /* firmware */ 97177595Sweongyo MALO_DEBUG_ANY = 0xffffffff 98177595Sweongyo}; 99177595Sweongyo#define IS_BEACON(wh) \ 100177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 101177595Sweongyo IEEE80211_FC0_SUBTYPE_MASK)) == \ 102177595Sweongyo (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 103177595Sweongyo#define IFF_DUMPPKTS_RECV(sc, wh) \ 104177595Sweongyo (((sc->malo_debug & MALO_DEBUG_RECV) && \ 105177595Sweongyo ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 106177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 107177595Sweongyo (IFF_DEBUG|IFF_LINK2)) 108177595Sweongyo#define IFF_DUMPPKTS_XMIT(sc) \ 109177595Sweongyo ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 110177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 111177595Sweongyo (IFF_DEBUG | IFF_LINK2)) 112177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 113177595Sweongyo if (sc->malo_debug & (m)) \ 114177595Sweongyo printf(fmt, __VA_ARGS__); \ 115177595Sweongyo} while (0) 116177595Sweongyo#else 117177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 118177595Sweongyo (void) sc; \ 119177595Sweongyo} while (0) 120177595Sweongyo#endif 121177595Sweongyo 122227293Sedstatic MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 123177595Sweongyo 124228621Sbschmidtstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *, 125228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 126228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN], 127228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 128178354Ssamstatic void malo_vap_delete(struct ieee80211vap *); 129177595Sweongyostatic int malo_dma_setup(struct malo_softc *); 130177595Sweongyostatic int malo_setup_hwdma(struct malo_softc *); 131177595Sweongyostatic void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 132177595Sweongyostatic void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 133177595Sweongyostatic void malo_start(struct ifnet *); 134199559Sjhbstatic void malo_watchdog(void *); 135177595Sweongyostatic int malo_ioctl(struct ifnet *, u_long, caddr_t); 136283540Sglebiusstatic void malo_updateslot(struct ieee80211com *); 137178354Ssamstatic int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 138177595Sweongyostatic void malo_scan_start(struct ieee80211com *); 139177595Sweongyostatic void malo_scan_end(struct ieee80211com *); 140177595Sweongyostatic void malo_set_channel(struct ieee80211com *); 141177595Sweongyostatic int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 142177595Sweongyo const struct ieee80211_bpf_params *); 143177595Sweongyostatic void malo_sysctlattach(struct malo_softc *); 144177595Sweongyostatic void malo_announce(struct malo_softc *); 145177595Sweongyostatic void malo_dma_cleanup(struct malo_softc *); 146177595Sweongyostatic void malo_stop_locked(struct ifnet *, int); 147177595Sweongyostatic int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 148177595Sweongyostatic int malo_mode_init(struct malo_softc *); 149177595Sweongyostatic void malo_tx_proc(void *, int); 150177595Sweongyostatic void malo_rx_proc(void *, int); 151177595Sweongyostatic void malo_init(void *); 152177595Sweongyo 153177595Sweongyo/* 154177595Sweongyo * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 155177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at 156177595Sweongyo * malo_attach and there should be no reference to them here. 157177595Sweongyo */ 158177595Sweongyostatic uint32_t 159177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off) 160177595Sweongyo{ 161177595Sweongyo return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 162177595Sweongyo} 163177595Sweongyo 164177595Sweongyostatic void 165177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 166177595Sweongyo{ 167205843Simp DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n", 168278532Smarius __func__, (uintmax_t)off, val); 169177595Sweongyo 170177595Sweongyo bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 171177595Sweongyo} 172177595Sweongyo 173177595Sweongyoint 174177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc) 175177595Sweongyo{ 176190526Ssam int error; 177178354Ssam struct ieee80211com *ic; 178177595Sweongyo struct ifnet *ifp; 179177595Sweongyo struct malo_hal *mh; 180177595Sweongyo uint8_t bands; 181177595Sweongyo 182178354Ssam ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 183177595Sweongyo if (ifp == NULL) { 184177595Sweongyo device_printf(sc->malo_dev, "can not if_alloc()\n"); 185177595Sweongyo return ENOSPC; 186177595Sweongyo } 187178354Ssam ic = ifp->if_l2com; 188177595Sweongyo 189177595Sweongyo MALO_LOCK_INIT(sc); 190199559Sjhb callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0); 191177595Sweongyo 192177595Sweongyo /* set these up early for if_printf use */ 193177595Sweongyo if_initname(ifp, device_get_name(sc->malo_dev), 194177595Sweongyo device_get_unit(sc->malo_dev)); 195177595Sweongyo 196177595Sweongyo mh = malo_hal_attach(sc->malo_dev, devid, 197177595Sweongyo sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 198177595Sweongyo if (mh == NULL) { 199177595Sweongyo if_printf(ifp, "unable to attach HAL\n"); 200177595Sweongyo error = EIO; 201177595Sweongyo goto bad; 202177595Sweongyo } 203177595Sweongyo sc->malo_mh = mh; 204177595Sweongyo 205178354Ssam /* 206178354Ssam * Load firmware so we can get setup. We arbitrarily pick station 207178354Ssam * firmware; we'll re-load firmware as needed so setting up 208178354Ssam * the wrong mode isn't a big deal. 209178354Ssam */ 210178354Ssam error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 211178354Ssam if (error != 0) { 212178354Ssam if_printf(ifp, "unable to setup firmware\n"); 213178354Ssam goto bad1; 214178354Ssam } 215178354Ssam /* XXX gethwspecs() extracts correct informations? not maybe! */ 216178354Ssam error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 217178354Ssam if (error != 0) { 218178354Ssam if_printf(ifp, "unable to fetch h/w specs\n"); 219178354Ssam goto bad1; 220178354Ssam } 221178354Ssam 222178354Ssam DPRINTF(sc, MALO_DEBUG_FW, 223178354Ssam "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 224178354Ssam "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 225178354Ssam "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 226178354Ssam "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 227178354Ssam "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 228178354Ssam sc->malo_hwspecs.hwversion, 229178354Ssam sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 230178354Ssam sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 231178354Ssam sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 232178354Ssam sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 233178354Ssam sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 234178354Ssam sc->malo_hwspecs.ul_fw_awakecookie, 235178354Ssam sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 236178354Ssam sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 237178354Ssam 238178354Ssam /* NB: firmware looks that it does not export regdomain info API. */ 239178354Ssam bands = 0; 240178354Ssam setbit(&bands, IEEE80211_MODE_11B); 241178354Ssam setbit(&bands, IEEE80211_MODE_11G); 242178354Ssam ieee80211_init_channels(ic, NULL, &bands); 243178354Ssam 244177595Sweongyo sc->malo_txantenna = 0x2; /* h/w default */ 245177595Sweongyo sc->malo_rxantenna = 0xffff; /* h/w default */ 246177595Sweongyo 247177595Sweongyo /* 248177595Sweongyo * Allocate tx + rx descriptors and populate the lists. 249177595Sweongyo * We immediately push the information to the firmware 250177595Sweongyo * as otherwise it gets upset. 251177595Sweongyo */ 252177595Sweongyo error = malo_dma_setup(sc); 253177595Sweongyo if (error != 0) { 254177595Sweongyo if_printf(ifp, "failed to setup descriptors: %d\n", error); 255177595Sweongyo goto bad1; 256177595Sweongyo } 257178354Ssam error = malo_setup_hwdma(sc); /* push to firmware */ 258178354Ssam if (error != 0) /* NB: malo_setupdma prints msg */ 259190552Sweongyo goto bad2; 260177595Sweongyo 261177595Sweongyo sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 262177595Sweongyo taskqueue_thread_enqueue, &sc->malo_tq); 263177595Sweongyo taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 264177595Sweongyo "%s taskq", ifp->if_xname); 265177595Sweongyo 266177595Sweongyo TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 267177595Sweongyo TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 268177595Sweongyo 269177595Sweongyo ifp->if_softc = sc; 270177595Sweongyo ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 271177595Sweongyo ifp->if_start = malo_start; 272177595Sweongyo ifp->if_ioctl = malo_ioctl; 273177595Sweongyo ifp->if_init = malo_init; 274207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 275207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 276177595Sweongyo IFQ_SET_READY(&ifp->if_snd); 277177595Sweongyo 278177595Sweongyo ic->ic_ifp = ifp; 279283537Sglebius ic->ic_softc = sc; 280283527Sglebius ic->ic_name = device_get_nameunit(sc->malo_dev); 281177595Sweongyo /* XXX not right but it's not used anywhere important */ 282177595Sweongyo ic->ic_phytype = IEEE80211_T_OFDM; 283177595Sweongyo ic->ic_opmode = IEEE80211_M_STA; 284177595Sweongyo ic->ic_caps = 285178957Ssam IEEE80211_C_STA /* station mode supported */ 286178957Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 287177595Sweongyo | IEEE80211_C_MONITOR /* monitor mode */ 288177595Sweongyo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 289177595Sweongyo | IEEE80211_C_SHSLOT /* short slot time supported */ 290177595Sweongyo | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 291177595Sweongyo | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 292177595Sweongyo ; 293177595Sweongyo 294177595Sweongyo /* 295177595Sweongyo * Transmit requires space in the packet for a special format transmit 296177595Sweongyo * record and optional padding between this record and the payload. 297177595Sweongyo * Ask the net80211 layer to arrange this when encapsulating 298177595Sweongyo * packets so we can add it efficiently. 299177595Sweongyo */ 300177595Sweongyo ic->ic_headroom = sizeof(struct malo_txrec) - 301178354Ssam sizeof(struct ieee80211_frame); 302177595Sweongyo 303177595Sweongyo /* call MI attach routine. */ 304190526Ssam ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 305177595Sweongyo /* override default methods */ 306178354Ssam ic->ic_vap_create = malo_vap_create; 307178354Ssam ic->ic_vap_delete = malo_vap_delete; 308178354Ssam ic->ic_raw_xmit = malo_raw_xmit; 309177595Sweongyo ic->ic_updateslot = malo_updateslot; 310177595Sweongyo 311177595Sweongyo ic->ic_scan_start = malo_scan_start; 312177595Sweongyo ic->ic_scan_end = malo_scan_end; 313177595Sweongyo ic->ic_set_channel = malo_set_channel; 314177595Sweongyo 315177595Sweongyo sc->malo_invalid = 0; /* ready to go, enable int handling */ 316177595Sweongyo 317192468Ssam ieee80211_radiotap_attach(ic, 318192468Ssam &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th), 319192468Ssam MALO_TX_RADIOTAP_PRESENT, 320192468Ssam &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th), 321192468Ssam MALO_RX_RADIOTAP_PRESENT); 322177595Sweongyo 323177595Sweongyo /* 324177595Sweongyo * Setup dynamic sysctl's. 325177595Sweongyo */ 326177595Sweongyo malo_sysctlattach(sc); 327177595Sweongyo 328177595Sweongyo if (bootverbose) 329177595Sweongyo ieee80211_announce(ic); 330178354Ssam malo_announce(sc); 331177595Sweongyo 332177595Sweongyo return 0; 333190552Sweongyobad2: 334190552Sweongyo malo_dma_cleanup(sc); 335177595Sweongyobad1: 336177595Sweongyo malo_hal_detach(mh); 337177595Sweongyobad: 338177595Sweongyo if_free(ifp); 339177595Sweongyo sc->malo_invalid = 1; 340177595Sweongyo 341177595Sweongyo return error; 342177595Sweongyo} 343177595Sweongyo 344178354Ssamstatic struct ieee80211vap * 345228621Sbschmidtmalo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 346228621Sbschmidt enum ieee80211_opmode opmode, int flags, 347228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 348228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 349178354Ssam{ 350178354Ssam struct ifnet *ifp = ic->ic_ifp; 351178354Ssam struct malo_vap *mvp; 352178354Ssam struct ieee80211vap *vap; 353178354Ssam 354178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 355178354Ssam if_printf(ifp, "multiple vaps not supported\n"); 356178354Ssam return NULL; 357178354Ssam } 358178354Ssam switch (opmode) { 359178354Ssam case IEEE80211_M_STA: 360178354Ssam if (opmode == IEEE80211_M_STA) 361178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 362178354Ssam /* fall thru... */ 363178354Ssam case IEEE80211_M_MONITOR: 364178354Ssam break; 365178354Ssam default: 366178354Ssam if_printf(ifp, "%s mode not supported\n", 367178354Ssam ieee80211_opmode_name[opmode]); 368178354Ssam return NULL; /* unsupported */ 369178354Ssam } 370178354Ssam mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 371178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 372178354Ssam if (mvp == NULL) { 373178354Ssam if_printf(ifp, "cannot allocate vap state block\n"); 374178354Ssam return NULL; 375178354Ssam } 376178354Ssam vap = &mvp->malo_vap; 377178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 378178354Ssam 379178354Ssam /* override state transition machine */ 380178354Ssam mvp->malo_newstate = vap->iv_newstate; 381178354Ssam vap->iv_newstate = malo_newstate; 382178354Ssam 383178354Ssam /* complete setup */ 384178354Ssam ieee80211_vap_attach(vap, 385178354Ssam ieee80211_media_change, ieee80211_media_status); 386178354Ssam ic->ic_opmode = opmode; 387178354Ssam return vap; 388178354Ssam} 389178354Ssam 390178354Ssamstatic void 391178354Ssammalo_vap_delete(struct ieee80211vap *vap) 392178354Ssam{ 393178354Ssam struct malo_vap *mvp = MALO_VAP(vap); 394178354Ssam 395178354Ssam ieee80211_vap_detach(vap); 396178354Ssam free(mvp, M_80211_VAP); 397178354Ssam} 398178354Ssam 399177595Sweongyoint 400177595Sweongyomalo_intr(void *arg) 401177595Sweongyo{ 402177595Sweongyo struct malo_softc *sc = arg; 403177595Sweongyo struct malo_hal *mh = sc->malo_mh; 404177595Sweongyo uint32_t status; 405177595Sweongyo 406177595Sweongyo if (sc->malo_invalid) { 407177595Sweongyo /* 408177595Sweongyo * The hardware is not ready/present, don't touch anything. 409177595Sweongyo * Note this can happen early on if the IRQ is shared. 410177595Sweongyo */ 411177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 412177595Sweongyo return (FILTER_STRAY); 413177595Sweongyo } 414177595Sweongyo 415177595Sweongyo /* 416177595Sweongyo * Figure out the reason(s) for the interrupt. 417177595Sweongyo */ 418177595Sweongyo malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 419177595Sweongyo if (status == 0) /* must be a shared irq */ 420177595Sweongyo return (FILTER_STRAY); 421177595Sweongyo 422177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 423177595Sweongyo __func__, status, sc->malo_imask); 424177595Sweongyo 425177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_RDY) 426177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 427177595Sweongyo if (status & MALO_A2HRIC_BIT_TX_DONE) 428177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 429177595Sweongyo if (status & MALO_A2HRIC_BIT_OPC_DONE) 430177595Sweongyo malo_hal_cmddone(mh); 431177595Sweongyo if (status & MALO_A2HRIC_BIT_MAC_EVENT) 432177595Sweongyo ; 433177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 434177595Sweongyo ; 435177595Sweongyo if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 436177595Sweongyo /* TKIP ICV error */ 437177595Sweongyo sc->malo_stats.mst_rx_badtkipicv++; 438177595Sweongyo } 439177595Sweongyo#ifdef MALO_DEBUG 440177595Sweongyo if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 441177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, 442177595Sweongyo "%s: can't handle interrupt status 0x%x\n", 443177595Sweongyo __func__, status); 444177595Sweongyo#endif 445177595Sweongyo return (FILTER_HANDLED); 446177595Sweongyo} 447177595Sweongyo 448177595Sweongyostatic void 449177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 450177595Sweongyo{ 451177595Sweongyo bus_addr_t *paddr = (bus_addr_t*) arg; 452177595Sweongyo 453177595Sweongyo KASSERT(error == 0, ("error %u on bus_dma callback", error)); 454177595Sweongyo 455177595Sweongyo *paddr = segs->ds_addr; 456177595Sweongyo} 457177595Sweongyo 458177595Sweongyostatic int 459177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name, 460177595Sweongyo struct malo_descdma *dd, 461177595Sweongyo int nbuf, size_t bufsize, int ndesc, size_t descsize) 462177595Sweongyo{ 463177595Sweongyo int error; 464177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 465177595Sweongyo uint8_t *ds; 466177595Sweongyo 467177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 468177595Sweongyo "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 469177595Sweongyo __func__, name, nbuf, (uintmax_t) bufsize, 470177595Sweongyo ndesc, (uintmax_t) descsize); 471177595Sweongyo 472177595Sweongyo dd->dd_name = name; 473177595Sweongyo dd->dd_desc_len = nbuf * ndesc * descsize; 474177595Sweongyo 475177595Sweongyo /* 476177595Sweongyo * Setup DMA descriptor area. 477177595Sweongyo */ 478177595Sweongyo error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 479177595Sweongyo PAGE_SIZE, 0, /* alignment, bounds */ 480177595Sweongyo BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 481177595Sweongyo BUS_SPACE_MAXADDR, /* highaddr */ 482177595Sweongyo NULL, NULL, /* filter, filterarg */ 483177595Sweongyo dd->dd_desc_len, /* maxsize */ 484177595Sweongyo 1, /* nsegments */ 485177595Sweongyo dd->dd_desc_len, /* maxsegsize */ 486177595Sweongyo BUS_DMA_ALLOCNOW, /* flags */ 487177595Sweongyo NULL, /* lockfunc */ 488177595Sweongyo NULL, /* lockarg */ 489177595Sweongyo &dd->dd_dmat); 490177595Sweongyo if (error != 0) { 491177595Sweongyo if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 492177595Sweongyo return error; 493177595Sweongyo } 494177595Sweongyo 495177595Sweongyo /* allocate descriptors */ 496177595Sweongyo error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 497177595Sweongyo BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 498177595Sweongyo if (error != 0) { 499177595Sweongyo if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 500177595Sweongyo "error %u\n", nbuf * ndesc, dd->dd_name, error); 501177595Sweongyo goto fail1; 502177595Sweongyo } 503177595Sweongyo 504177595Sweongyo error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 505177595Sweongyo dd->dd_desc, dd->dd_desc_len, 506177595Sweongyo malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 507177595Sweongyo if (error != 0) { 508177595Sweongyo if_printf(ifp, "unable to map %s descriptors, error %u\n", 509177595Sweongyo dd->dd_name, error); 510177595Sweongyo goto fail2; 511177595Sweongyo } 512177595Sweongyo 513177595Sweongyo ds = dd->dd_desc; 514177595Sweongyo memset(ds, 0, dd->dd_desc_len); 515278532Smarius DPRINTF(sc, MALO_DEBUG_RESET, 516278532Smarius "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n", 517177595Sweongyo __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 518278532Smarius (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 519177595Sweongyo 520177595Sweongyo return 0; 521177595Sweongyofail2: 522177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 523177595Sweongyofail1: 524177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 525177595Sweongyo memset(dd, 0, sizeof(*dd)); 526177595Sweongyo return error; 527177595Sweongyo} 528177595Sweongyo 529177595Sweongyo#define DS2PHYS(_dd, _ds) \ 530177595Sweongyo ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 531177595Sweongyo 532177595Sweongyostatic int 533177595Sweongyomalo_rxdma_setup(struct malo_softc *sc) 534177595Sweongyo{ 535177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 536177595Sweongyo int error, bsize, i; 537177595Sweongyo struct malo_rxbuf *bf; 538177595Sweongyo struct malo_rxdesc *ds; 539177595Sweongyo 540177595Sweongyo error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 541177595Sweongyo malo_rxbuf, sizeof(struct malo_rxbuf), 542177595Sweongyo 1, sizeof(struct malo_rxdesc)); 543177595Sweongyo if (error != 0) 544177595Sweongyo return error; 545177595Sweongyo 546177595Sweongyo /* 547177595Sweongyo * Allocate rx buffers and set them up. 548177595Sweongyo */ 549177595Sweongyo bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 550177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 551177595Sweongyo if (bf == NULL) { 552177595Sweongyo if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 553177595Sweongyo return error; 554177595Sweongyo } 555177595Sweongyo sc->malo_rxdma.dd_bufptr = bf; 556177595Sweongyo 557177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 558177595Sweongyo ds = sc->malo_rxdma.dd_desc; 559177595Sweongyo for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 560177595Sweongyo bf->bf_desc = ds; 561177595Sweongyo bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 562177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 563177595Sweongyo &bf->bf_dmamap); 564177595Sweongyo if (error != 0) { 565177595Sweongyo if_printf(ifp, "%s: unable to dmamap for rx buffer, " 566177595Sweongyo "error %d\n", __func__, error); 567177595Sweongyo return error; 568177595Sweongyo } 569177595Sweongyo /* NB: tail is intentional to preserve descriptor order */ 570177595Sweongyo STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 571177595Sweongyo } 572177595Sweongyo return 0; 573177595Sweongyo} 574177595Sweongyo 575177595Sweongyostatic int 576177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 577177595Sweongyo{ 578177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 579177595Sweongyo int error, bsize, i; 580177595Sweongyo struct malo_txbuf *bf; 581177595Sweongyo struct malo_txdesc *ds; 582177595Sweongyo 583177595Sweongyo error = malo_desc_setup(sc, "tx", &txq->dma, 584177595Sweongyo malo_txbuf, sizeof(struct malo_txbuf), 585177595Sweongyo MALO_TXDESC, sizeof(struct malo_txdesc)); 586177595Sweongyo if (error != 0) 587177595Sweongyo return error; 588177595Sweongyo 589177595Sweongyo /* allocate and setup tx buffers */ 590177595Sweongyo bsize = malo_txbuf * sizeof(struct malo_txbuf); 591177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 592177595Sweongyo if (bf == NULL) { 593177595Sweongyo if_printf(ifp, "malloc of %u tx buffers failed\n", 594177595Sweongyo malo_txbuf); 595177595Sweongyo return ENOMEM; 596177595Sweongyo } 597177595Sweongyo txq->dma.dd_bufptr = bf; 598177595Sweongyo 599177595Sweongyo STAILQ_INIT(&txq->free); 600177595Sweongyo txq->nfree = 0; 601177595Sweongyo ds = txq->dma.dd_desc; 602177595Sweongyo for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 603177595Sweongyo bf->bf_desc = ds; 604177595Sweongyo bf->bf_daddr = DS2PHYS(&txq->dma, ds); 605177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 606177595Sweongyo &bf->bf_dmamap); 607177595Sweongyo if (error != 0) { 608177595Sweongyo if_printf(ifp, "unable to create dmamap for tx " 609177595Sweongyo "buffer %u, error %u\n", i, error); 610177595Sweongyo return error; 611177595Sweongyo } 612177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 613177595Sweongyo txq->nfree++; 614177595Sweongyo } 615177595Sweongyo 616177595Sweongyo return 0; 617177595Sweongyo} 618177595Sweongyo 619177595Sweongyostatic void 620177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 621177595Sweongyo{ 622177595Sweongyo bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 623177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 624177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 625177595Sweongyo 626177595Sweongyo memset(dd, 0, sizeof(*dd)); 627177595Sweongyo} 628177595Sweongyo 629177595Sweongyostatic void 630177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc) 631177595Sweongyo{ 632177595Sweongyo struct malo_rxbuf *bf; 633177595Sweongyo 634177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 635177595Sweongyo if (bf->bf_m != NULL) { 636177595Sweongyo m_freem(bf->bf_m); 637177595Sweongyo bf->bf_m = NULL; 638177595Sweongyo } 639177595Sweongyo if (bf->bf_dmamap != NULL) { 640177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 641177595Sweongyo bf->bf_dmamap = NULL; 642177595Sweongyo } 643177595Sweongyo } 644177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 645177595Sweongyo if (sc->malo_rxdma.dd_bufptr != NULL) { 646177595Sweongyo free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 647177595Sweongyo sc->malo_rxdma.dd_bufptr = NULL; 648177595Sweongyo } 649177595Sweongyo if (sc->malo_rxdma.dd_desc_len != 0) 650177595Sweongyo malo_desc_cleanup(sc, &sc->malo_rxdma); 651177595Sweongyo} 652177595Sweongyo 653177595Sweongyostatic void 654177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 655177595Sweongyo{ 656177595Sweongyo struct malo_txbuf *bf; 657177595Sweongyo struct ieee80211_node *ni; 658177595Sweongyo 659177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 660177595Sweongyo if (bf->bf_m != NULL) { 661177595Sweongyo m_freem(bf->bf_m); 662177595Sweongyo bf->bf_m = NULL; 663177595Sweongyo } 664177595Sweongyo ni = bf->bf_node; 665177595Sweongyo bf->bf_node = NULL; 666177595Sweongyo if (ni != NULL) { 667177595Sweongyo /* 668177595Sweongyo * Reclaim node reference. 669177595Sweongyo */ 670177595Sweongyo ieee80211_free_node(ni); 671177595Sweongyo } 672177595Sweongyo if (bf->bf_dmamap != NULL) { 673177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 674177595Sweongyo bf->bf_dmamap = NULL; 675177595Sweongyo } 676177595Sweongyo } 677177595Sweongyo STAILQ_INIT(&txq->free); 678177595Sweongyo txq->nfree = 0; 679177595Sweongyo if (txq->dma.dd_bufptr != NULL) { 680177595Sweongyo free(txq->dma.dd_bufptr, M_MALODEV); 681177595Sweongyo txq->dma.dd_bufptr = NULL; 682177595Sweongyo } 683177595Sweongyo if (txq->dma.dd_desc_len != 0) 684177595Sweongyo malo_desc_cleanup(sc, &txq->dma); 685177595Sweongyo} 686177595Sweongyo 687177595Sweongyostatic void 688177595Sweongyomalo_dma_cleanup(struct malo_softc *sc) 689177595Sweongyo{ 690177595Sweongyo int i; 691177595Sweongyo 692177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 693177595Sweongyo malo_txdma_cleanup(sc, &sc->malo_txq[i]); 694177595Sweongyo 695177595Sweongyo malo_rxdma_cleanup(sc); 696177595Sweongyo} 697177595Sweongyo 698177595Sweongyostatic int 699177595Sweongyomalo_dma_setup(struct malo_softc *sc) 700177595Sweongyo{ 701177595Sweongyo int error, i; 702177595Sweongyo 703177595Sweongyo /* rxdma initializing. */ 704177595Sweongyo error = malo_rxdma_setup(sc); 705177595Sweongyo if (error != 0) 706177595Sweongyo return error; 707177595Sweongyo 708177595Sweongyo /* NB: we just have 1 tx queue now. */ 709177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 710177595Sweongyo error = malo_txdma_setup(sc, &sc->malo_txq[i]); 711177595Sweongyo if (error != 0) { 712177595Sweongyo malo_dma_cleanup(sc); 713177595Sweongyo 714177595Sweongyo return error; 715177595Sweongyo } 716177595Sweongyo 717177595Sweongyo malo_txq_init(sc, &sc->malo_txq[i], i); 718177595Sweongyo } 719177595Sweongyo 720177595Sweongyo return 0; 721177595Sweongyo} 722177595Sweongyo 723177595Sweongyostatic void 724177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc) 725177595Sweongyo{ 726177595Sweongyo int i; 727177595Sweongyo 728177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 729177595Sweongyo sc->malo_hwdma.rxdesc_read); 730177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 731177595Sweongyo sc->malo_hwdma.rxdesc_read); 732177595Sweongyo 733177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 734177595Sweongyo malo_bar0_write4(sc, 735177595Sweongyo sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 736177595Sweongyo } 737177595Sweongyo} 738177595Sweongyo 739177595Sweongyo/* 740177595Sweongyo * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 741177595Sweongyo * for compatibility with older firmware. For current firmware we send 742177595Sweongyo * this information with a cmd block via malo_hal_sethwdma. 743177595Sweongyo */ 744177595Sweongyostatic int 745177595Sweongyomalo_setup_hwdma(struct malo_softc *sc) 746177595Sweongyo{ 747177595Sweongyo int i; 748177595Sweongyo struct malo_txq *txq; 749177595Sweongyo 750177595Sweongyo sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 751177595Sweongyo 752177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 753177595Sweongyo txq = &sc->malo_txq[i]; 754177595Sweongyo sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 755177595Sweongyo } 756177595Sweongyo sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 757177595Sweongyo sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 758177595Sweongyo 759177595Sweongyo malo_hal_set_rxtxdma(sc); 760177595Sweongyo 761177595Sweongyo return 0; 762177595Sweongyo} 763177595Sweongyo 764177595Sweongyostatic void 765177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 766177595Sweongyo{ 767177595Sweongyo struct malo_txbuf *bf, *bn; 768177595Sweongyo struct malo_txdesc *ds; 769177595Sweongyo 770177595Sweongyo MALO_TXQ_LOCK_INIT(sc, txq); 771177595Sweongyo txq->qnum = qnum; 772177595Sweongyo txq->txpri = 0; /* XXX */ 773177595Sweongyo 774177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 775177595Sweongyo bf->bf_txq = txq; 776177595Sweongyo 777177595Sweongyo ds = bf->bf_desc; 778177595Sweongyo bn = STAILQ_NEXT(bf, bf_list); 779177595Sweongyo if (bn == NULL) 780177595Sweongyo bn = STAILQ_FIRST(&txq->free); 781177595Sweongyo ds->physnext = htole32(bn->bf_daddr); 782177595Sweongyo } 783177595Sweongyo STAILQ_INIT(&txq->active); 784177595Sweongyo} 785177595Sweongyo 786177595Sweongyo/* 787177595Sweongyo * Reclaim resources for a setup queue. 788177595Sweongyo */ 789177595Sweongyostatic void 790177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 791177595Sweongyo{ 792177595Sweongyo /* XXX hal work? */ 793177595Sweongyo MALO_TXQ_LOCK_DESTROY(txq); 794177595Sweongyo} 795177595Sweongyo 796177595Sweongyo/* 797177595Sweongyo * Allocate a tx buffer for sending a frame. 798177595Sweongyo */ 799177595Sweongyostatic struct malo_txbuf * 800177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 801177595Sweongyo{ 802177595Sweongyo struct malo_txbuf *bf; 803177595Sweongyo 804177595Sweongyo MALO_TXQ_LOCK(txq); 805177595Sweongyo bf = STAILQ_FIRST(&txq->free); 806177595Sweongyo if (bf != NULL) { 807177595Sweongyo STAILQ_REMOVE_HEAD(&txq->free, bf_list); 808177595Sweongyo txq->nfree--; 809177595Sweongyo } 810177595Sweongyo MALO_TXQ_UNLOCK(txq); 811177595Sweongyo if (bf == NULL) { 812177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, 813177595Sweongyo "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 814177595Sweongyo sc->malo_stats.mst_tx_qstop++; 815177595Sweongyo } 816177595Sweongyo return bf; 817177595Sweongyo} 818177595Sweongyo 819177595Sweongyostatic int 820177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 821177595Sweongyo{ 822177595Sweongyo struct mbuf *m; 823177595Sweongyo int error; 824177595Sweongyo 825177595Sweongyo /* 826177595Sweongyo * Load the DMA map so any coalescing is done. This also calculates 827177595Sweongyo * the number of descriptors we need. 828177595Sweongyo */ 829177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 830177595Sweongyo bf->bf_segs, &bf->bf_nseg, 831177595Sweongyo BUS_DMA_NOWAIT); 832177595Sweongyo if (error == EFBIG) { 833177595Sweongyo /* XXX packet requires too many descriptors */ 834177595Sweongyo bf->bf_nseg = MALO_TXDESC + 1; 835177595Sweongyo } else if (error != 0) { 836177595Sweongyo sc->malo_stats.mst_tx_busdma++; 837177595Sweongyo m_freem(m0); 838177595Sweongyo return error; 839177595Sweongyo } 840177595Sweongyo /* 841177595Sweongyo * Discard null packets and check for packets that require too many 842177595Sweongyo * TX descriptors. We try to convert the latter to a cluster. 843177595Sweongyo */ 844177595Sweongyo if (error == EFBIG) { /* too many desc's, linearize */ 845177595Sweongyo sc->malo_stats.mst_tx_linear++; 846243857Sglebius m = m_defrag(m0, M_NOWAIT); 847177595Sweongyo if (m == NULL) { 848177595Sweongyo m_freem(m0); 849177595Sweongyo sc->malo_stats.mst_tx_nombuf++; 850177595Sweongyo return ENOMEM; 851177595Sweongyo } 852177595Sweongyo m0 = m; 853177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 854177595Sweongyo bf->bf_segs, &bf->bf_nseg, 855177595Sweongyo BUS_DMA_NOWAIT); 856177595Sweongyo if (error != 0) { 857177595Sweongyo sc->malo_stats.mst_tx_busdma++; 858177595Sweongyo m_freem(m0); 859177595Sweongyo return error; 860177595Sweongyo } 861177595Sweongyo KASSERT(bf->bf_nseg <= MALO_TXDESC, 862177595Sweongyo ("too many segments after defrag; nseg %u", bf->bf_nseg)); 863177595Sweongyo } else if (bf->bf_nseg == 0) { /* null packet, discard */ 864177595Sweongyo sc->malo_stats.mst_tx_nodata++; 865177595Sweongyo m_freem(m0); 866177595Sweongyo return EIO; 867177595Sweongyo } 868177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 869177595Sweongyo __func__, m0, m0->m_pkthdr.len); 870177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 871177595Sweongyo bf->bf_m = m0; 872177595Sweongyo 873177595Sweongyo return 0; 874177595Sweongyo} 875177595Sweongyo 876177595Sweongyo#ifdef MALO_DEBUG 877177595Sweongyostatic void 878177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 879177595Sweongyo{ 880177595Sweongyo const struct malo_rxdesc *ds = bf->bf_desc; 881177595Sweongyo uint32_t status = le32toh(ds->status); 882177595Sweongyo 883278532Smarius printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n" 884177595Sweongyo " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 885278532Smarius " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr, 886177595Sweongyo le32toh(ds->physnext), le32toh(ds->physbuffdata), 887177595Sweongyo ds->rxcontrol, 888177595Sweongyo ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 889177595Sweongyo "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 890177595Sweongyo ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 891177595Sweongyo ds->rate, le16toh(ds->qosctrl)); 892177595Sweongyo} 893177595Sweongyo 894177595Sweongyostatic void 895177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 896177595Sweongyo{ 897177595Sweongyo const struct malo_txdesc *ds = bf->bf_desc; 898177595Sweongyo uint32_t status = le32toh(ds->status); 899177595Sweongyo 900177595Sweongyo printf("Q%u[%3u]", qnum, ix); 901278532Smarius printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr); 902177595Sweongyo printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 903177595Sweongyo le32toh(ds->physnext), 904177595Sweongyo le32toh(ds->pktptr), le16toh(ds->pktlen), status, 905177595Sweongyo status & MALO_TXD_STATUS_USED ? 906177595Sweongyo "" : (status & 3) != 0 ? " *" : " !"); 907177595Sweongyo printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 908177595Sweongyo ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 909177595Sweongyo le32toh(ds->sap_pktinfo), le16toh(ds->format)); 910177595Sweongyo#if 0 911177595Sweongyo { 912177595Sweongyo const uint8_t *cp = (const uint8_t *) ds; 913177595Sweongyo int i; 914177595Sweongyo for (i = 0; i < sizeof(struct malo_txdesc); i++) { 915177595Sweongyo printf("%02x ", cp[i]); 916177595Sweongyo if (((i+1) % 16) == 0) 917177595Sweongyo printf("\n"); 918177595Sweongyo } 919177595Sweongyo printf("\n"); 920177595Sweongyo } 921177595Sweongyo#endif 922177595Sweongyo} 923177595Sweongyo#endif /* MALO_DEBUG */ 924177595Sweongyo 925177595Sweongyostatic __inline void 926177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix) 927177595Sweongyo{ 928177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 929177595Sweongyo static const int ieeerates[] = 930177595Sweongyo { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 931177595Sweongyo if (rix < N(ieeerates)) 932177595Sweongyo ni->ni_txrate = ieeerates[rix]; 933177595Sweongyo#undef N 934177595Sweongyo} 935177595Sweongyo 936177595Sweongyostatic int 937177595Sweongyomalo_fix2rate(int fix_rate) 938177595Sweongyo{ 939177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 940177595Sweongyo static const int rates[] = 941177595Sweongyo { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 942177595Sweongyo return (fix_rate < N(rates) ? rates[fix_rate] : 0); 943177595Sweongyo#undef N 944177595Sweongyo} 945177595Sweongyo 946177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 947177595Sweongyo#define MS(v,x) (((v) & x) >> x##_S) 948177595Sweongyo#define SM(v,x) (((v) << x##_S) & x) 949177595Sweongyo 950177595Sweongyo/* 951177595Sweongyo * Process completed xmit descriptors from the specified queue. 952177595Sweongyo */ 953177595Sweongyostatic int 954177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 955177595Sweongyo{ 956177595Sweongyo struct malo_txbuf *bf; 957177595Sweongyo struct malo_txdesc *ds; 958177595Sweongyo struct ieee80211_node *ni; 959177595Sweongyo int nreaped; 960177595Sweongyo uint32_t status; 961177595Sweongyo 962177595Sweongyo DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 963177595Sweongyo __func__, txq->qnum); 964177595Sweongyo for (nreaped = 0;; nreaped++) { 965177595Sweongyo MALO_TXQ_LOCK(txq); 966177595Sweongyo bf = STAILQ_FIRST(&txq->active); 967177595Sweongyo if (bf == NULL) { 968177595Sweongyo MALO_TXQ_UNLOCK(txq); 969177595Sweongyo break; 970177595Sweongyo } 971177595Sweongyo ds = bf->bf_desc; 972177595Sweongyo MALO_TXDESC_SYNC(txq, ds, 973177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 974177595Sweongyo if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 975177595Sweongyo MALO_TXQ_UNLOCK(txq); 976177595Sweongyo break; 977177595Sweongyo } 978177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 979177595Sweongyo MALO_TXQ_UNLOCK(txq); 980177595Sweongyo 981177595Sweongyo#ifdef MALO_DEBUG 982177595Sweongyo if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 983177595Sweongyo malo_printtxbuf(bf, txq->qnum, nreaped); 984177595Sweongyo#endif 985177595Sweongyo ni = bf->bf_node; 986177595Sweongyo if (ni != NULL) { 987177595Sweongyo status = le32toh(ds->status); 988177595Sweongyo if (status & MALO_TXD_STATUS_OK) { 989177595Sweongyo uint16_t format = le16toh(ds->format); 990177595Sweongyo uint8_t txant = MS(format, MALO_TXD_ANTENNA); 991177595Sweongyo 992177595Sweongyo sc->malo_stats.mst_ant_tx[txant]++; 993177595Sweongyo if (status & MALO_TXD_STATUS_OK_RETRY) 994177595Sweongyo sc->malo_stats.mst_tx_retries++; 995177595Sweongyo if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 996177595Sweongyo sc->malo_stats.mst_tx_mretries++; 997177595Sweongyo malo_updatetxrate(ni, ds->datarate); 998177595Sweongyo sc->malo_stats.mst_tx_rate = ds->datarate; 999177595Sweongyo } else { 1000177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1001177595Sweongyo sc->malo_stats.mst_tx_linkerror++; 1002177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1003177595Sweongyo sc->malo_stats.mst_tx_xretries++; 1004177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_AGING) 1005177595Sweongyo sc->malo_stats.mst_tx_aging++; 1006177595Sweongyo } 1007177595Sweongyo /* 1008177595Sweongyo * Do any tx complete callback. Note this must 1009177595Sweongyo * be done before releasing the node reference. 1010177595Sweongyo * XXX no way to figure out if frame was ACK'd 1011177595Sweongyo */ 1012177595Sweongyo if (bf->bf_m->m_flags & M_TXCB) { 1013177595Sweongyo /* XXX strip fw len in case header inspected */ 1014177595Sweongyo m_adj(bf->bf_m, sizeof(uint16_t)); 1015177595Sweongyo ieee80211_process_callback(ni, bf->bf_m, 1016177595Sweongyo (status & MALO_TXD_STATUS_OK) == 0); 1017177595Sweongyo } 1018177595Sweongyo /* 1019177595Sweongyo * Reclaim reference to node. 1020177595Sweongyo * 1021177595Sweongyo * NB: the node may be reclaimed here if, for example 1022177595Sweongyo * this is a DEAUTH message that was sent and the 1023177595Sweongyo * node was timed out due to inactivity. 1024177595Sweongyo */ 1025177595Sweongyo ieee80211_free_node(ni); 1026177595Sweongyo } 1027177595Sweongyo ds->status = htole32(MALO_TXD_STATUS_IDLE); 1028177595Sweongyo ds->pktlen = htole32(0); 1029177595Sweongyo 1030177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1031177595Sweongyo BUS_DMASYNC_POSTWRITE); 1032177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1033177595Sweongyo m_freem(bf->bf_m); 1034177595Sweongyo bf->bf_m = NULL; 1035177595Sweongyo bf->bf_node = NULL; 1036177595Sweongyo 1037177595Sweongyo MALO_TXQ_LOCK(txq); 1038177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1039177595Sweongyo txq->nfree++; 1040177595Sweongyo MALO_TXQ_UNLOCK(txq); 1041177595Sweongyo } 1042177595Sweongyo return nreaped; 1043177595Sweongyo} 1044177595Sweongyo 1045177595Sweongyo/* 1046177595Sweongyo * Deferred processing of transmit interrupt. 1047177595Sweongyo */ 1048177595Sweongyostatic void 1049177595Sweongyomalo_tx_proc(void *arg, int npending) 1050177595Sweongyo{ 1051177595Sweongyo struct malo_softc *sc = arg; 1052177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1053177595Sweongyo int i, nreaped; 1054177595Sweongyo 1055177595Sweongyo /* 1056177595Sweongyo * Process each active queue. 1057177595Sweongyo */ 1058177595Sweongyo nreaped = 0; 1059177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1060177595Sweongyo if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1061177595Sweongyo nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1062177595Sweongyo } 1063177595Sweongyo 1064177595Sweongyo if (nreaped != 0) { 1065177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1066199559Sjhb sc->malo_timer = 0; 1067177595Sweongyo malo_start(ifp); 1068177595Sweongyo } 1069177595Sweongyo} 1070177595Sweongyo 1071177595Sweongyostatic int 1072177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1073177595Sweongyo struct malo_txbuf *bf, struct mbuf *m0) 1074177595Sweongyo{ 1075177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 1076177595Sweongyo ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1077177595Sweongyo#define IS_DATA_FRAME(wh) \ 1078177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1079177595Sweongyo int error, ismcast, iswep; 1080177595Sweongyo int copyhdrlen, hdrlen, pktlen; 1081177595Sweongyo struct ieee80211_frame *wh; 1082177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1083178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1084192468Ssam struct ieee80211vap *vap = ni->ni_vap; 1085177595Sweongyo struct malo_txdesc *ds; 1086177595Sweongyo struct malo_txrec *tr; 1087177595Sweongyo struct malo_txq *txq; 1088177595Sweongyo uint16_t qos; 1089177595Sweongyo 1090177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1091260444Skevlo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1092177595Sweongyo ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1093177595Sweongyo copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1094177595Sweongyo pktlen = m0->m_pkthdr.len; 1095177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 1096177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 1097177595Sweongyo qos = *(uint16_t *) 1098177595Sweongyo (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1099177595Sweongyo copyhdrlen -= sizeof(qos); 1100177595Sweongyo } else 1101177595Sweongyo qos = *(uint16_t *) 1102177595Sweongyo (((struct ieee80211_qosframe *) wh)->i_qos); 1103177595Sweongyo } else 1104177595Sweongyo qos = 0; 1105177595Sweongyo 1106177595Sweongyo if (iswep) { 1107177595Sweongyo struct ieee80211_key *k; 1108177595Sweongyo 1109177595Sweongyo /* 1110177595Sweongyo * Construct the 802.11 header+trailer for an encrypted 1111177595Sweongyo * frame. The only reason this can fail is because of an 1112177595Sweongyo * unknown or unsupported cipher/key type. 1113177595Sweongyo * 1114177595Sweongyo * NB: we do this even though the firmware will ignore 1115177595Sweongyo * what we've done for WEP and TKIP as we need the 1116177595Sweongyo * ExtIV filled in for CCMP and this also adjusts 1117177595Sweongyo * the headers which simplifies our work below. 1118177595Sweongyo */ 1119178354Ssam k = ieee80211_crypto_encap(ni, m0); 1120177595Sweongyo if (k == NULL) { 1121177595Sweongyo /* 1122177595Sweongyo * This can happen when the key is yanked after the 1123177595Sweongyo * frame was queued. Just discard the frame; the 1124177595Sweongyo * 802.11 layer counts failures and provides 1125177595Sweongyo * debugging/diagnostics. 1126177595Sweongyo */ 1127177595Sweongyo m_freem(m0); 1128177595Sweongyo return EIO; 1129177595Sweongyo } 1130177595Sweongyo 1131177595Sweongyo /* 1132177595Sweongyo * Adjust the packet length for the crypto additions 1133177595Sweongyo * done during encap and any other bits that the f/w 1134177595Sweongyo * will add later on. 1135177595Sweongyo */ 1136177595Sweongyo pktlen = m0->m_pkthdr.len; 1137177595Sweongyo 1138177595Sweongyo /* packet header may have moved, reset our local pointer */ 1139177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1140177595Sweongyo } 1141177595Sweongyo 1142192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1143177595Sweongyo sc->malo_tx_th.wt_flags = 0; /* XXX */ 1144177595Sweongyo if (iswep) 1145177595Sweongyo sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1146177595Sweongyo sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1147177595Sweongyo sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1148177595Sweongyo 1149192468Ssam ieee80211_radiotap_tx(vap, m0); 1150177595Sweongyo } 1151177595Sweongyo 1152177595Sweongyo /* 1153177595Sweongyo * Copy up/down the 802.11 header; the firmware requires 1154177595Sweongyo * we present a 2-byte payload length followed by a 1155177595Sweongyo * 4-address header (w/o QoS), followed (optionally) by 1156177595Sweongyo * any WEP/ExtIV header (but only filled in for CCMP). 1157177595Sweongyo * We are assured the mbuf has sufficient headroom to 1158177595Sweongyo * prepend in-place by the setup of ic_headroom in 1159177595Sweongyo * malo_attach. 1160177595Sweongyo */ 1161177595Sweongyo if (hdrlen < sizeof(struct malo_txrec)) { 1162177595Sweongyo const int space = sizeof(struct malo_txrec) - hdrlen; 1163177595Sweongyo if (M_LEADINGSPACE(m0) < space) { 1164177595Sweongyo /* NB: should never happen */ 1165177595Sweongyo device_printf(sc->malo_dev, 1166177595Sweongyo "not enough headroom, need %d found %zd, " 1167177595Sweongyo "m_flags 0x%x m_len %d\n", 1168177595Sweongyo space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1169177595Sweongyo ieee80211_dump_pkt(ic, 1170177595Sweongyo mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1171177595Sweongyo m_freem(m0); 1172177595Sweongyo /* XXX stat */ 1173177595Sweongyo return EIO; 1174177595Sweongyo } 1175177595Sweongyo M_PREPEND(m0, space, M_NOWAIT); 1176177595Sweongyo } 1177177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1178177595Sweongyo if (wh != (struct ieee80211_frame *) &tr->wh) 1179177595Sweongyo ovbcopy(wh, &tr->wh, hdrlen); 1180177595Sweongyo /* 1181177595Sweongyo * Note: the "firmware length" is actually the length of the fully 1182177595Sweongyo * formed "802.11 payload". That is, it's everything except for 1183177595Sweongyo * the 802.11 header. In particular this includes all crypto 1184177595Sweongyo * material including the MIC! 1185177595Sweongyo */ 1186177595Sweongyo tr->fwlen = htole16(pktlen - hdrlen); 1187177595Sweongyo 1188177595Sweongyo /* 1189177595Sweongyo * Load the DMA map so any coalescing is done. This 1190177595Sweongyo * also calculates the number of descriptors we need. 1191177595Sweongyo */ 1192177595Sweongyo error = malo_tx_dmasetup(sc, bf, m0); 1193177595Sweongyo if (error != 0) 1194177595Sweongyo return error; 1195177595Sweongyo bf->bf_node = ni; /* NB: held reference */ 1196177595Sweongyo m0 = bf->bf_m; /* NB: may have changed */ 1197177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1198177595Sweongyo wh = (struct ieee80211_frame *)&tr->wh; 1199177595Sweongyo 1200177595Sweongyo /* 1201177595Sweongyo * Formulate tx descriptor. 1202177595Sweongyo */ 1203177595Sweongyo ds = bf->bf_desc; 1204177595Sweongyo txq = bf->bf_txq; 1205177595Sweongyo 1206177595Sweongyo ds->qosctrl = qos; /* NB: already little-endian */ 1207177595Sweongyo ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1208177595Sweongyo ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1209177595Sweongyo /* NB: pPhysNext setup once, don't touch */ 1210177595Sweongyo ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1211177595Sweongyo ds->sap_pktinfo = 0; 1212177595Sweongyo ds->format = 0; 1213177595Sweongyo 1214177595Sweongyo /* 1215177595Sweongyo * Select transmit rate. 1216177595Sweongyo */ 1217177595Sweongyo switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1218177595Sweongyo case IEEE80211_FC0_TYPE_MGT: 1219177595Sweongyo sc->malo_stats.mst_tx_mgmt++; 1220177595Sweongyo /* fall thru... */ 1221177595Sweongyo case IEEE80211_FC0_TYPE_CTL: 1222177595Sweongyo ds->txpriority = 1; 1223177595Sweongyo break; 1224177595Sweongyo case IEEE80211_FC0_TYPE_DATA: 1225177595Sweongyo ds->txpriority = txq->qnum; 1226177595Sweongyo break; 1227177595Sweongyo default: 1228177595Sweongyo if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1229177595Sweongyo wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1230177595Sweongyo /* XXX statistic */ 1231177595Sweongyo m_freem(m0); 1232177595Sweongyo return EIO; 1233177595Sweongyo } 1234177595Sweongyo 1235177595Sweongyo#ifdef MALO_DEBUG 1236177595Sweongyo if (IFF_DUMPPKTS_XMIT(sc)) 1237177595Sweongyo ieee80211_dump_pkt(ic, 1238177595Sweongyo mtod(m0, const uint8_t *)+sizeof(uint16_t), 1239177595Sweongyo m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1240177595Sweongyo#endif 1241177595Sweongyo 1242177595Sweongyo MALO_TXQ_LOCK(txq); 1243177595Sweongyo if (!IS_DATA_FRAME(wh)) 1244177595Sweongyo ds->status |= htole32(1); 1245177595Sweongyo ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1246177595Sweongyo STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1247177595Sweongyo MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1248177595Sweongyo 1249271849Sglebius if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1250199559Sjhb sc->malo_timer = 5; 1251177595Sweongyo MALO_TXQ_UNLOCK(txq); 1252177595Sweongyo return 0; 1253177595Sweongyo#undef IEEE80211_DIR_DSTODS 1254177595Sweongyo} 1255177595Sweongyo 1256177595Sweongyostatic void 1257177595Sweongyomalo_start(struct ifnet *ifp) 1258177595Sweongyo{ 1259177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1260177595Sweongyo struct ieee80211_node *ni; 1261178354Ssam struct malo_txq *txq = &sc->malo_txq[0]; 1262177595Sweongyo struct malo_txbuf *bf = NULL; 1263177595Sweongyo struct mbuf *m; 1264178354Ssam int nqueued = 0; 1265177595Sweongyo 1266177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1267177595Sweongyo return; 1268177595Sweongyo 1269177595Sweongyo for (;;) { 1270178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1271178354Ssam if (m == NULL) 1272178354Ssam break; 1273178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1274178354Ssam bf = malo_getbuf(sc, txq); 1275178354Ssam if (bf == NULL) { 1276178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1277178354Ssam 1278178354Ssam /* XXX blocks other traffic */ 1279178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1280178354Ssam sc->malo_stats.mst_tx_qstop++; 1281178354Ssam break; 1282178354Ssam } 1283177595Sweongyo /* 1284177595Sweongyo * Pass the frame to the h/w for transmission. 1285177595Sweongyo */ 1286177595Sweongyo if (malo_tx_start(sc, ni, bf, m)) { 1287271849Sglebius if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1288177595Sweongyo if (bf != NULL) { 1289177595Sweongyo bf->bf_m = NULL; 1290177595Sweongyo bf->bf_node = NULL; 1291177595Sweongyo MALO_TXQ_LOCK(txq); 1292177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1293177595Sweongyo MALO_TXQ_UNLOCK(txq); 1294177595Sweongyo } 1295177595Sweongyo ieee80211_free_node(ni); 1296177595Sweongyo continue; 1297177595Sweongyo } 1298177595Sweongyo nqueued++; 1299177595Sweongyo 1300177595Sweongyo if (nqueued >= malo_txcoalesce) { 1301177595Sweongyo /* 1302177595Sweongyo * Poke the firmware to process queued frames; 1303177595Sweongyo * see below about (lack of) locking. 1304177595Sweongyo */ 1305177595Sweongyo nqueued = 0; 1306177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1307177595Sweongyo } 1308177595Sweongyo } 1309177595Sweongyo 1310177595Sweongyo if (nqueued) { 1311177595Sweongyo /* 1312177595Sweongyo * NB: We don't need to lock against tx done because 1313177595Sweongyo * this just prods the firmware to check the transmit 1314177595Sweongyo * descriptors. The firmware will also start fetching 1315177595Sweongyo * descriptors by itself if it notices new ones are 1316177595Sweongyo * present when it goes to deliver a tx done interrupt 1317177595Sweongyo * to the host. So if we race with tx done processing 1318177595Sweongyo * it's ok. Delivering the kick here rather than in 1319177595Sweongyo * malo_tx_start is an optimization to avoid poking the 1320177595Sweongyo * firmware for each packet. 1321177595Sweongyo * 1322177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1323177595Sweongyo */ 1324177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1325177595Sweongyo } 1326177595Sweongyo} 1327177595Sweongyo 1328177595Sweongyostatic void 1329199559Sjhbmalo_watchdog(void *arg) 1330177595Sweongyo{ 1331199559Sjhb struct malo_softc *sc; 1332199559Sjhb struct ifnet *ifp; 1333177595Sweongyo 1334199559Sjhb sc = arg; 1335199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1336199559Sjhb if (sc->malo_timer == 0 || --sc->malo_timer > 0) 1337199559Sjhb return; 1338199559Sjhb 1339199559Sjhb ifp = sc->malo_ifp; 1340177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1341177595Sweongyo if_printf(ifp, "watchdog timeout\n"); 1342177595Sweongyo 1343177595Sweongyo /* XXX no way to reset h/w. now */ 1344177595Sweongyo 1345271849Sglebius if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1346177595Sweongyo sc->malo_stats.mst_watchdog++; 1347177595Sweongyo } 1348177595Sweongyo} 1349177595Sweongyo 1350177595Sweongyostatic int 1351177595Sweongyomalo_hal_reset(struct malo_softc *sc) 1352177595Sweongyo{ 1353177595Sweongyo static int first = 0; 1354178354Ssam struct ifnet *ifp = sc->malo_ifp; 1355178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1356177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1357177595Sweongyo 1358177595Sweongyo if (first == 0) { 1359177595Sweongyo /* 1360177595Sweongyo * NB: when the device firstly is initialized, sometimes 1361177595Sweongyo * firmware could override rx/tx dma registers so we re-set 1362177595Sweongyo * these values once. 1363177595Sweongyo */ 1364177595Sweongyo malo_hal_set_rxtxdma(sc); 1365177595Sweongyo first = 1; 1366177595Sweongyo } 1367177595Sweongyo 1368177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1369177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1370177595Sweongyo malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1371177595Sweongyo malo_chan_set(sc, ic->ic_curchan); 1372177595Sweongyo 1373177595Sweongyo /* XXX needs other stuffs? */ 1374177595Sweongyo 1375177595Sweongyo return 1; 1376177595Sweongyo} 1377177595Sweongyo 1378177595Sweongyostatic __inline struct mbuf * 1379177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1380177595Sweongyo{ 1381177595Sweongyo struct mbuf *m; 1382177595Sweongyo bus_addr_t paddr; 1383177595Sweongyo int error; 1384177595Sweongyo 1385177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 1386243857Sglebius m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1387177595Sweongyo if (m == NULL) { 1388177595Sweongyo sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1389177595Sweongyo return NULL; 1390177595Sweongyo } 1391177595Sweongyo error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1392177595Sweongyo mtod(m, caddr_t), MJUMPAGESIZE, 1393177595Sweongyo malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1394177595Sweongyo if (error != 0) { 1395177595Sweongyo if_printf(sc->malo_ifp, 1396177595Sweongyo "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1397177595Sweongyo m_freem(m); 1398177595Sweongyo return NULL; 1399177595Sweongyo } 1400177595Sweongyo bf->bf_data = paddr; 1401177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1402177595Sweongyo 1403177595Sweongyo return m; 1404177595Sweongyo} 1405177595Sweongyo 1406177595Sweongyostatic int 1407177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1408177595Sweongyo{ 1409177595Sweongyo struct malo_rxdesc *ds; 1410177595Sweongyo 1411177595Sweongyo ds = bf->bf_desc; 1412177595Sweongyo if (bf->bf_m == NULL) { 1413177595Sweongyo bf->bf_m = malo_getrxmbuf(sc, bf); 1414177595Sweongyo if (bf->bf_m == NULL) { 1415177595Sweongyo /* mark descriptor to be skipped */ 1416177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1417177595Sweongyo /* NB: don't need PREREAD */ 1418177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1419177595Sweongyo return ENOMEM; 1420177595Sweongyo } 1421177595Sweongyo } 1422177595Sweongyo 1423177595Sweongyo /* 1424177595Sweongyo * Setup descriptor. 1425177595Sweongyo */ 1426177595Sweongyo ds->qosctrl = 0; 1427177595Sweongyo ds->snr = 0; 1428177595Sweongyo ds->status = MALO_RXD_STATUS_IDLE; 1429177595Sweongyo ds->channel = 0; 1430177595Sweongyo ds->pktlen = htole16(MALO_RXSIZE); 1431177595Sweongyo ds->nf = 0; 1432177595Sweongyo ds->physbuffdata = htole32(bf->bf_data); 1433177595Sweongyo /* NB: don't touch pPhysNext, set once */ 1434177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1435177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1436177595Sweongyo 1437177595Sweongyo return 0; 1438177595Sweongyo} 1439177595Sweongyo 1440177595Sweongyo/* 1441177595Sweongyo * Setup the rx data structures. This should only be done once or we may get 1442177595Sweongyo * out of sync with the firmware. 1443177595Sweongyo */ 1444177595Sweongyostatic int 1445177595Sweongyomalo_startrecv(struct malo_softc *sc) 1446177595Sweongyo{ 1447177595Sweongyo struct malo_rxbuf *bf, *prev; 1448177595Sweongyo struct malo_rxdesc *ds; 1449177595Sweongyo 1450177595Sweongyo if (sc->malo_recvsetup == 1) { 1451177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1452177595Sweongyo return 0; 1453177595Sweongyo } 1454177595Sweongyo 1455177595Sweongyo prev = NULL; 1456177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1457177595Sweongyo int error = malo_rxbuf_init(sc, bf); 1458177595Sweongyo if (error != 0) { 1459177595Sweongyo DPRINTF(sc, MALO_DEBUG_RECV, 1460177595Sweongyo "%s: malo_rxbuf_init failed %d\n", 1461177595Sweongyo __func__, error); 1462177595Sweongyo return error; 1463177595Sweongyo } 1464177595Sweongyo if (prev != NULL) { 1465177595Sweongyo ds = prev->bf_desc; 1466177595Sweongyo ds->physnext = htole32(bf->bf_daddr); 1467177595Sweongyo } 1468177595Sweongyo prev = bf; 1469177595Sweongyo } 1470177595Sweongyo if (prev != NULL) { 1471177595Sweongyo ds = prev->bf_desc; 1472177595Sweongyo ds->physnext = 1473177595Sweongyo htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1474177595Sweongyo } 1475177595Sweongyo 1476177595Sweongyo sc->malo_recvsetup = 1; 1477177595Sweongyo 1478177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1479177595Sweongyo 1480177595Sweongyo return 0; 1481177595Sweongyo} 1482177595Sweongyo 1483177595Sweongyostatic void 1484178354Ssammalo_init_locked(struct malo_softc *sc) 1485177595Sweongyo{ 1486177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1487177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1488177595Sweongyo int error; 1489177595Sweongyo 1490177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1491177595Sweongyo __func__, ifp->if_flags); 1492177595Sweongyo 1493178354Ssam MALO_LOCK_ASSERT(sc); 1494177595Sweongyo 1495177595Sweongyo /* 1496177595Sweongyo * Stop anything previously setup. This is safe whether this is 1497177595Sweongyo * the first time through or not. 1498177595Sweongyo */ 1499177595Sweongyo malo_stop_locked(ifp, 0); 1500177595Sweongyo 1501177595Sweongyo /* 1502177595Sweongyo * Push state to the firmware. 1503177595Sweongyo */ 1504177595Sweongyo if (!malo_hal_reset(sc)) { 1505177595Sweongyo if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1506178354Ssam return; 1507177595Sweongyo } 1508177595Sweongyo 1509177595Sweongyo /* 1510177595Sweongyo * Setup recv (once); transmit is already good to go. 1511177595Sweongyo */ 1512177595Sweongyo error = malo_startrecv(sc); 1513177595Sweongyo if (error != 0) { 1514177595Sweongyo if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1515177595Sweongyo __func__, error); 1516178354Ssam return; 1517177595Sweongyo } 1518177595Sweongyo 1519177595Sweongyo /* 1520177595Sweongyo * Enable interrupts. 1521177595Sweongyo */ 1522177595Sweongyo sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1523177595Sweongyo | MALO_A2HRIC_BIT_TX_DONE 1524177595Sweongyo | MALO_A2HRIC_BIT_OPC_DONE 1525177595Sweongyo | MALO_A2HRIC_BIT_MAC_EVENT 1526177595Sweongyo | MALO_A2HRIC_BIT_RX_PROBLEM 1527177595Sweongyo | MALO_A2HRIC_BIT_ICV_ERROR 1528177595Sweongyo | MALO_A2HRIC_BIT_RADAR_DETECT 1529177595Sweongyo | MALO_A2HRIC_BIT_CHAN_SWITCH; 1530177595Sweongyo 1531177595Sweongyo ifp->if_drv_flags |= IFF_DRV_RUNNING; 1532177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1533199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1534178354Ssam} 1535177595Sweongyo 1536178354Ssamstatic void 1537178354Ssammalo_init(void *arg) 1538178354Ssam{ 1539178354Ssam struct malo_softc *sc = (struct malo_softc *) arg; 1540178354Ssam struct ifnet *ifp = sc->malo_ifp; 1541178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1542178354Ssam 1543178354Ssam DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1544178354Ssam __func__, ifp->if_flags); 1545177595Sweongyo 1546178354Ssam MALO_LOCK(sc); 1547178354Ssam malo_init_locked(sc); 1548177595Sweongyo 1549177595Sweongyo MALO_UNLOCK(sc); 1550177595Sweongyo 1551178354Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1552178354Ssam ieee80211_start_all(ic); /* start all vap's */ 1553177595Sweongyo} 1554177595Sweongyo 1555177595Sweongyo/* 1556177595Sweongyo * Set the multicast filter contents into the hardware. 1557177595Sweongyo */ 1558177595Sweongyostatic void 1559177595Sweongyomalo_setmcastfilter(struct malo_softc *sc) 1560177595Sweongyo{ 1561178354Ssam struct ifnet *ifp = sc->malo_ifp; 1562178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1563177595Sweongyo struct ifmultiaddr *ifma; 1564177595Sweongyo uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1565177595Sweongyo uint8_t *mp; 1566177595Sweongyo int nmc; 1567177595Sweongyo 1568177595Sweongyo mp = macs; 1569177595Sweongyo nmc = 0; 1570177595Sweongyo 1571177595Sweongyo if (ic->ic_opmode == IEEE80211_M_MONITOR || 1572177595Sweongyo (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1573177595Sweongyo goto all; 1574177595Sweongyo 1575195049Srwatson if_maddr_rlock(ifp); 1576177595Sweongyo TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1577177595Sweongyo if (ifma->ifma_addr->sa_family != AF_LINK) 1578177595Sweongyo continue; 1579177595Sweongyo 1580177595Sweongyo if (nmc == MALO_HAL_MCAST_MAX) { 1581177595Sweongyo ifp->if_flags |= IFF_ALLMULTI; 1582195049Srwatson if_maddr_runlock(ifp); 1583177595Sweongyo goto all; 1584177595Sweongyo } 1585177595Sweongyo IEEE80211_ADDR_COPY(mp, 1586177595Sweongyo LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1587177595Sweongyo 1588177595Sweongyo mp += IEEE80211_ADDR_LEN, nmc++; 1589177595Sweongyo } 1590195049Srwatson if_maddr_runlock(ifp); 1591177595Sweongyo 1592177595Sweongyo malo_hal_setmcast(sc->malo_mh, nmc, macs); 1593177595Sweongyo 1594177595Sweongyoall: 1595177595Sweongyo /* 1596177595Sweongyo * XXX we don't know how to set the f/w for supporting 1597177595Sweongyo * IFF_ALLMULTI | IFF_PROMISC cases 1598177595Sweongyo */ 1599177595Sweongyo return; 1600177595Sweongyo} 1601177595Sweongyo 1602177595Sweongyostatic int 1603177595Sweongyomalo_mode_init(struct malo_softc *sc) 1604177595Sweongyo{ 1605178354Ssam struct ifnet *ifp = sc->malo_ifp; 1606178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1607177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1608177595Sweongyo 1609177595Sweongyo /* 1610177595Sweongyo * NB: Ignore promisc in hostap mode; it's set by the 1611177595Sweongyo * bridge. This is wrong but we have no way to 1612177595Sweongyo * identify internal requests (from the bridge) 1613177595Sweongyo * versus external requests such as for tcpdump. 1614177595Sweongyo */ 1615177595Sweongyo malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1616177595Sweongyo ic->ic_opmode != IEEE80211_M_HOSTAP); 1617177595Sweongyo malo_setmcastfilter(sc); 1618177595Sweongyo 1619177595Sweongyo return ENXIO; 1620177595Sweongyo} 1621177595Sweongyo 1622177595Sweongyostatic void 1623177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1624177595Sweongyo{ 1625177595Sweongyo struct ieee80211_node *ni; 1626177595Sweongyo struct malo_txbuf *bf; 1627177595Sweongyo u_int ix; 1628177595Sweongyo 1629177595Sweongyo /* 1630177595Sweongyo * NB: this assumes output has been stopped and 1631177595Sweongyo * we do not need to block malo_tx_tasklet 1632177595Sweongyo */ 1633177595Sweongyo for (ix = 0;; ix++) { 1634177595Sweongyo MALO_TXQ_LOCK(txq); 1635177595Sweongyo bf = STAILQ_FIRST(&txq->active); 1636177595Sweongyo if (bf == NULL) { 1637177595Sweongyo MALO_TXQ_UNLOCK(txq); 1638177595Sweongyo break; 1639177595Sweongyo } 1640177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1641177595Sweongyo MALO_TXQ_UNLOCK(txq); 1642177595Sweongyo#ifdef MALO_DEBUG 1643177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RESET) { 1644178354Ssam struct ifnet *ifp = sc->malo_ifp; 1645178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1646177595Sweongyo const struct malo_txrec *tr = 1647177595Sweongyo mtod(bf->bf_m, const struct malo_txrec *); 1648177595Sweongyo malo_printtxbuf(bf, txq->qnum, ix); 1649178354Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1650177595Sweongyo bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1651177595Sweongyo } 1652177595Sweongyo#endif /* MALO_DEBUG */ 1653177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1654177595Sweongyo ni = bf->bf_node; 1655177595Sweongyo bf->bf_node = NULL; 1656177595Sweongyo if (ni != NULL) { 1657177595Sweongyo /* 1658177595Sweongyo * Reclaim node reference. 1659177595Sweongyo */ 1660177595Sweongyo ieee80211_free_node(ni); 1661177595Sweongyo } 1662177595Sweongyo m_freem(bf->bf_m); 1663177595Sweongyo bf->bf_m = NULL; 1664177595Sweongyo 1665177595Sweongyo MALO_TXQ_LOCK(txq); 1666177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1667177595Sweongyo txq->nfree++; 1668177595Sweongyo MALO_TXQ_UNLOCK(txq); 1669177595Sweongyo } 1670177595Sweongyo} 1671177595Sweongyo 1672177595Sweongyostatic void 1673177595Sweongyomalo_stop_locked(struct ifnet *ifp, int disable) 1674177595Sweongyo{ 1675177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1676177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1677178354Ssam int i; 1678177595Sweongyo 1679177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1680177595Sweongyo __func__, sc->malo_invalid, ifp->if_flags); 1681177595Sweongyo 1682177595Sweongyo MALO_LOCK_ASSERT(sc); 1683177595Sweongyo 1684177595Sweongyo if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1685177595Sweongyo return; 1686177595Sweongyo 1687177595Sweongyo /* 1688177595Sweongyo * Shutdown the hardware and driver: 1689177595Sweongyo * disable interrupts 1690177595Sweongyo * turn off the radio 1691177595Sweongyo * drain and release tx queues 1692177595Sweongyo * 1693177595Sweongyo * Note that some of this work is not possible if the hardware 1694177595Sweongyo * is gone (invalid). 1695177595Sweongyo */ 1696177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1697199559Sjhb callout_stop(&sc->malo_watchdog_timer); 1698199559Sjhb sc->malo_timer = 0; 1699178354Ssam /* diable interrupt. */ 1700178354Ssam malo_hal_intrset(mh, 0); 1701178354Ssam /* turn off the radio. */ 1702178354Ssam malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1703177595Sweongyo 1704177595Sweongyo /* drain and release tx queues. */ 1705177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1706177595Sweongyo malo_tx_draintxq(sc, &sc->malo_txq[i]); 1707177595Sweongyo} 1708177595Sweongyo 1709177595Sweongyostatic int 1710177595Sweongyomalo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1711177595Sweongyo{ 1712177595Sweongyo#define MALO_IS_RUNNING(ifp) \ 1713177595Sweongyo ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1714177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1715178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1716178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1717178354Ssam int error = 0, startall = 0; 1718177595Sweongyo 1719177595Sweongyo MALO_LOCK(sc); 1720177595Sweongyo switch (cmd) { 1721177595Sweongyo case SIOCSIFFLAGS: 1722177595Sweongyo if (MALO_IS_RUNNING(ifp)) { 1723177595Sweongyo /* 1724177595Sweongyo * To avoid rescanning another access point, 1725177595Sweongyo * do not call malo_init() here. Instead, 1726177595Sweongyo * only reflect promisc mode settings. 1727177595Sweongyo */ 1728177595Sweongyo malo_mode_init(sc); 1729177595Sweongyo } else if (ifp->if_flags & IFF_UP) { 1730177595Sweongyo /* 1731177595Sweongyo * Beware of being called during attach/detach 1732177595Sweongyo * to reset promiscuous mode. In that case we 1733177595Sweongyo * will still be marked UP but not RUNNING. 1734177595Sweongyo * However trying to re-init the interface 1735177595Sweongyo * is the wrong thing to do as we've already 1736177595Sweongyo * torn down much of our state. There's 1737177595Sweongyo * probably a better way to deal with this. 1738177595Sweongyo */ 1739178354Ssam if (!sc->malo_invalid) { 1740178354Ssam malo_init_locked(sc); 1741178354Ssam startall = 1; 1742178354Ssam } 1743177595Sweongyo } else 1744177595Sweongyo malo_stop_locked(ifp, 1); 1745177595Sweongyo break; 1746178354Ssam case SIOCGIFMEDIA: 1747178354Ssam case SIOCSIFMEDIA: 1748178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1749177595Sweongyo break; 1750177595Sweongyo default: 1751178354Ssam error = ether_ioctl(ifp, cmd, data); 1752177595Sweongyo break; 1753177595Sweongyo } 1754177595Sweongyo MALO_UNLOCK(sc); 1755177595Sweongyo 1756178354Ssam if (startall) 1757178354Ssam ieee80211_start_all(ic); 1758177595Sweongyo return error; 1759177595Sweongyo#undef MALO_IS_RUNNING 1760177595Sweongyo} 1761177595Sweongyo 1762177595Sweongyo/* 1763177595Sweongyo * Callback from the 802.11 layer to update the slot time 1764177595Sweongyo * based on the current setting. We use it to notify the 1765177595Sweongyo * firmware of ERP changes and the f/w takes care of things 1766177595Sweongyo * like slot time and preamble. 1767177595Sweongyo */ 1768177595Sweongyostatic void 1769283540Sglebiusmalo_updateslot(struct ieee80211com *ic) 1770177595Sweongyo{ 1771283540Sglebius struct malo_softc *sc = ic->ic_softc; 1772177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1773177595Sweongyo int error; 1774177595Sweongyo 1775177595Sweongyo /* NB: can be called early; suppress needless cmds */ 1776283540Sglebius if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1777177595Sweongyo return; 1778177595Sweongyo 1779177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 1780177595Sweongyo "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1781177595Sweongyo __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1782177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1783177595Sweongyo 1784177595Sweongyo if (ic->ic_flags & IEEE80211_F_SHSLOT) 1785177595Sweongyo error = malo_hal_set_slot(mh, 1); 1786177595Sweongyo else 1787177595Sweongyo error = malo_hal_set_slot(mh, 0); 1788177595Sweongyo 1789177595Sweongyo if (error != 0) 1790177595Sweongyo device_printf(sc->malo_dev, "setting %s slot failed\n", 1791177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1792177595Sweongyo} 1793177595Sweongyo 1794177595Sweongyostatic int 1795178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1796177595Sweongyo{ 1797178354Ssam struct ieee80211com *ic = vap->iv_ic; 1798178354Ssam struct malo_softc *sc = ic->ic_ifp->if_softc; 1799177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1800177595Sweongyo int error; 1801177595Sweongyo 1802177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1803178354Ssam ieee80211_state_name[vap->iv_state], 1804177595Sweongyo ieee80211_state_name[nstate]); 1805177595Sweongyo 1806177595Sweongyo /* 1807178354Ssam * Invoke the net80211 layer first so iv_bss is setup. 1808177595Sweongyo */ 1809178354Ssam error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1810178354Ssam if (error != 0) 1811178354Ssam return error; 1812178354Ssam 1813178354Ssam if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1814178354Ssam struct ieee80211_node *ni = vap->iv_bss; 1815178354Ssam enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1816178354Ssam const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1817178354Ssam 1818177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, 1819178354Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1820178354Ssam "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1821178354Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1822177595Sweongyo ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1823178354Ssam ieee80211_chan2ieee(ic, ic->ic_curchan), 1824178354Ssam ni->ni_associd, mode, tp->ucastrate); 1825177595Sweongyo 1826178354Ssam malo_hal_setradio(mh, 1, 1827178354Ssam (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1828178354Ssam MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1829178354Ssam malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1830178354Ssam malo_hal_set_rate(mh, mode, 1831178354Ssam tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1832178354Ssam 0 : malo_fix2rate(tp->ucastrate)); 1833177595Sweongyo } 1834178354Ssam return 0; 1835177595Sweongyo} 1836177595Sweongyo 1837177595Sweongyostatic int 1838177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1839177595Sweongyo const struct ieee80211_bpf_params *params) 1840177595Sweongyo{ 1841177595Sweongyo struct ieee80211com *ic = ni->ni_ic; 1842177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 1843177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1844177595Sweongyo struct malo_txbuf *bf; 1845177595Sweongyo struct malo_txq *txq; 1846177595Sweongyo 1847177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1848177595Sweongyo ieee80211_free_node(ni); 1849177595Sweongyo m_freem(m); 1850177595Sweongyo return ENETDOWN; 1851177595Sweongyo } 1852177595Sweongyo 1853177595Sweongyo /* 1854177595Sweongyo * Grab a TX buffer and associated resources. Note that we depend 1855177595Sweongyo * on the classification by the 802.11 layer to get to the right h/w 1856177595Sweongyo * queue. Management frames must ALWAYS go on queue 1 but we 1857177595Sweongyo * cannot just force that here because we may receive non-mgt frames. 1858177595Sweongyo */ 1859177595Sweongyo txq = &sc->malo_txq[0]; 1860177595Sweongyo bf = malo_getbuf(sc, txq); 1861177595Sweongyo if (bf == NULL) { 1862177595Sweongyo /* XXX blocks other traffic */ 1863177595Sweongyo ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1864177595Sweongyo ieee80211_free_node(ni); 1865177595Sweongyo m_freem(m); 1866177595Sweongyo return ENOBUFS; 1867177595Sweongyo } 1868177595Sweongyo 1869177595Sweongyo /* 1870177595Sweongyo * Pass the frame to the h/w for transmission. 1871177595Sweongyo */ 1872177595Sweongyo if (malo_tx_start(sc, ni, bf, m) != 0) { 1873271849Sglebius if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1874177595Sweongyo bf->bf_m = NULL; 1875177595Sweongyo bf->bf_node = NULL; 1876177595Sweongyo MALO_TXQ_LOCK(txq); 1877177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1878177595Sweongyo txq->nfree++; 1879177595Sweongyo MALO_TXQ_UNLOCK(txq); 1880177595Sweongyo 1881177595Sweongyo ieee80211_free_node(ni); 1882177595Sweongyo return EIO; /* XXX */ 1883177595Sweongyo } 1884177595Sweongyo 1885177595Sweongyo /* 1886177595Sweongyo * NB: We don't need to lock against tx done because this just 1887177595Sweongyo * prods the firmware to check the transmit descriptors. The firmware 1888177595Sweongyo * will also start fetching descriptors by itself if it notices 1889177595Sweongyo * new ones are present when it goes to deliver a tx done interrupt 1890177595Sweongyo * to the host. So if we race with tx done processing it's ok. 1891177595Sweongyo * Delivering the kick here rather than in malo_tx_start is 1892177595Sweongyo * an optimization to avoid poking the firmware for each packet. 1893177595Sweongyo * 1894177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1895177595Sweongyo */ 1896177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1897177595Sweongyo 1898177595Sweongyo return 0; 1899177595Sweongyo} 1900177595Sweongyo 1901177595Sweongyostatic void 1902177595Sweongyomalo_sysctlattach(struct malo_softc *sc) 1903177595Sweongyo{ 1904177595Sweongyo#ifdef MALO_DEBUG 1905177595Sweongyo struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1906177595Sweongyo struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1907177595Sweongyo 1908177595Sweongyo sc->malo_debug = malo_debug; 1909177595Sweongyo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1910177595Sweongyo "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1911177595Sweongyo "control debugging printfs"); 1912177595Sweongyo#endif 1913177595Sweongyo} 1914177595Sweongyo 1915177595Sweongyostatic void 1916177595Sweongyomalo_announce(struct malo_softc *sc) 1917177595Sweongyo{ 1918177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1919177595Sweongyo 1920177595Sweongyo if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1921177595Sweongyo sc->malo_hwspecs.hwversion, 1922177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1923177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1924177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1925177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1926177595Sweongyo sc->malo_hwspecs.regioncode); 1927177595Sweongyo 1928177595Sweongyo if (bootverbose || malo_rxbuf != MALO_RXBUF) 1929177595Sweongyo if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1930177595Sweongyo if (bootverbose || malo_txbuf != MALO_TXBUF) 1931177595Sweongyo if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1932177595Sweongyo} 1933177595Sweongyo 1934177595Sweongyo/* 1935177595Sweongyo * Convert net80211 channel to a HAL channel. 1936177595Sweongyo */ 1937177595Sweongyostatic void 1938177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1939177595Sweongyo{ 1940177595Sweongyo hc->channel = chan->ic_ieee; 1941177595Sweongyo 1942177595Sweongyo *(uint32_t *)&hc->flags = 0; 1943177595Sweongyo if (IEEE80211_IS_CHAN_2GHZ(chan)) 1944177595Sweongyo hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1945177595Sweongyo} 1946177595Sweongyo 1947177595Sweongyo/* 1948177595Sweongyo * Set/change channels. If the channel is really being changed, 1949177595Sweongyo * it's done by reseting the chip. To accomplish this we must 1950177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la 1951177595Sweongyo * malo_init. 1952177595Sweongyo */ 1953177595Sweongyostatic int 1954177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1955177595Sweongyo{ 1956177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1957177595Sweongyo struct malo_hal_channel hchan; 1958177595Sweongyo 1959177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1960177595Sweongyo __func__, chan->ic_freq, chan->ic_flags); 1961177595Sweongyo 1962177595Sweongyo /* 1963177595Sweongyo * Convert to a HAL channel description with the flags constrained 1964177595Sweongyo * to reflect the current operating mode. 1965177595Sweongyo */ 1966177595Sweongyo malo_mapchan(&hchan, chan); 1967177595Sweongyo malo_hal_intrset(mh, 0); /* disable interrupts */ 1968177595Sweongyo malo_hal_setchannel(mh, &hchan); 1969177595Sweongyo malo_hal_settxpower(mh, &hchan); 1970177595Sweongyo 1971177595Sweongyo /* 1972177595Sweongyo * Update internal state. 1973177595Sweongyo */ 1974177595Sweongyo sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 1975177595Sweongyo sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 1976177595Sweongyo if (IEEE80211_IS_CHAN_ANYG(chan)) { 1977177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 1978177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 1979177595Sweongyo } else { 1980177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 1981177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 1982177595Sweongyo } 1983177595Sweongyo sc->malo_curchan = hchan; 1984177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1985177595Sweongyo 1986177595Sweongyo return 0; 1987177595Sweongyo} 1988177595Sweongyo 1989177595Sweongyostatic void 1990177595Sweongyomalo_scan_start(struct ieee80211com *ic) 1991177595Sweongyo{ 1992177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 1993177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1994177595Sweongyo 1995177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 1996177595Sweongyo} 1997177595Sweongyo 1998177595Sweongyostatic void 1999177595Sweongyomalo_scan_end(struct ieee80211com *ic) 2000177595Sweongyo{ 2001177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2002177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2003177595Sweongyo 2004177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2005177595Sweongyo} 2006177595Sweongyo 2007177595Sweongyostatic void 2008177595Sweongyomalo_set_channel(struct ieee80211com *ic) 2009177595Sweongyo{ 2010177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2011177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2012177595Sweongyo 2013177595Sweongyo (void) malo_chan_set(sc, ic->ic_curchan); 2014177595Sweongyo} 2015177595Sweongyo 2016177595Sweongyostatic void 2017177595Sweongyomalo_rx_proc(void *arg, int npending) 2018177595Sweongyo{ 2019177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 2020177595Sweongyo ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2021177595Sweongyo IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2022177595Sweongyo struct malo_softc *sc = arg; 2023178354Ssam struct ifnet *ifp = sc->malo_ifp; 2024178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2025177595Sweongyo struct malo_rxbuf *bf; 2026177595Sweongyo struct malo_rxdesc *ds; 2027177595Sweongyo struct mbuf *m, *mnew; 2028177595Sweongyo struct ieee80211_qosframe *wh; 2029177595Sweongyo struct ieee80211_qosframe_addr4 *wh4; 2030177595Sweongyo struct ieee80211_node *ni; 2031177595Sweongyo int off, len, hdrlen, pktlen, rssi, ntodo; 2032177595Sweongyo uint8_t *data, status; 2033177595Sweongyo uint32_t readptr, writeptr; 2034177595Sweongyo 2035177595Sweongyo DPRINTF(sc, MALO_DEBUG_RX_PROC, 2036177595Sweongyo "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2037177595Sweongyo __func__, npending, 2038177595Sweongyo sc->malo_hwspecs.rxdesc_read, 2039177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2040177595Sweongyo sc->malo_hwspecs.rxdesc_write, 2041177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2042177595Sweongyo 2043177595Sweongyo readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2044177595Sweongyo writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2045177595Sweongyo if (readptr == writeptr) 2046177595Sweongyo return; 2047177595Sweongyo 2048177595Sweongyo bf = sc->malo_rxnext; 2049178354Ssam for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2050177595Sweongyo if (bf == NULL) { 2051177595Sweongyo bf = STAILQ_FIRST(&sc->malo_rxbuf); 2052177595Sweongyo break; 2053177595Sweongyo } 2054177595Sweongyo ds = bf->bf_desc; 2055177595Sweongyo if (bf->bf_m == NULL) { 2056177595Sweongyo /* 2057177595Sweongyo * If data allocation failed previously there 2058177595Sweongyo * will be no buffer; try again to re-populate it. 2059177595Sweongyo * Note the firmware will not advance to the next 2060177595Sweongyo * descriptor with a dma buffer so we must mimic 2061177595Sweongyo * this or we'll get out of sync. 2062177595Sweongyo */ 2063177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, 2064177595Sweongyo "%s: rx buf w/o dma memory\n", __func__); 2065177595Sweongyo (void)malo_rxbuf_init(sc, bf); 2066177595Sweongyo break; 2067177595Sweongyo } 2068177595Sweongyo MALO_RXDESC_SYNC(sc, ds, 2069177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2070177595Sweongyo if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2071177595Sweongyo break; 2072177595Sweongyo 2073177595Sweongyo readptr = le32toh(ds->physnext); 2074177595Sweongyo 2075177595Sweongyo#ifdef MALO_DEBUG 2076177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2077177595Sweongyo malo_printrxbuf(bf, 0); 2078177595Sweongyo#endif 2079177595Sweongyo status = ds->status; 2080177595Sweongyo if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2081271849Sglebius if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 2082177595Sweongyo goto rx_next; 2083177595Sweongyo } 2084177595Sweongyo /* 2085177595Sweongyo * Sync the data buffer. 2086177595Sweongyo */ 2087177595Sweongyo len = le16toh(ds->pktlen); 2088177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2089177595Sweongyo BUS_DMASYNC_POSTREAD); 2090177595Sweongyo /* 2091177595Sweongyo * The 802.11 header is provided all or in part at the front; 2092177595Sweongyo * use it to calculate the true size of the header that we'll 2093177595Sweongyo * construct below. We use this to figure out where to copy 2094177595Sweongyo * payload prior to constructing the header. 2095177595Sweongyo */ 2096177595Sweongyo m = bf->bf_m; 2097201758Smbr data = mtod(m, uint8_t *); 2098177595Sweongyo hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2099177595Sweongyo off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2100177595Sweongyo 2101177595Sweongyo /* 2102178354Ssam * Calculate RSSI. XXX wrong 2103177595Sweongyo */ 2104177595Sweongyo rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2105177595Sweongyo if (rssi > 100) 2106177595Sweongyo rssi = 100; 2107177595Sweongyo 2108177595Sweongyo pktlen = hdrlen + (len - off); 2109177595Sweongyo /* 2110177595Sweongyo * NB: we know our frame is at least as large as 2111177595Sweongyo * IEEE80211_MIN_LEN because there is a 4-address frame at 2112177595Sweongyo * the front. Hence there's no need to vet the packet length. 2113177595Sweongyo * If the frame in fact is too small it should be discarded 2114177595Sweongyo * at the net80211 layer. 2115177595Sweongyo */ 2116177595Sweongyo 2117177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 2118177595Sweongyo mnew = malo_getrxmbuf(sc, bf); 2119177595Sweongyo if (mnew == NULL) { 2120271849Sglebius if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 2121177595Sweongyo goto rx_next; 2122177595Sweongyo } 2123177595Sweongyo /* 2124177595Sweongyo * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2125177595Sweongyo * re-setup the rx descriptor using the replacement dma 2126177595Sweongyo * buffer we just installed above. 2127177595Sweongyo */ 2128177595Sweongyo bf->bf_m = mnew; 2129177595Sweongyo m->m_data += off - hdrlen; 2130177595Sweongyo m->m_pkthdr.len = m->m_len = pktlen; 2131177595Sweongyo m->m_pkthdr.rcvif = ifp; 2132177595Sweongyo 2133177595Sweongyo /* 2134177595Sweongyo * Piece 802.11 header together. 2135177595Sweongyo */ 2136177595Sweongyo wh = mtod(m, struct ieee80211_qosframe *); 2137177595Sweongyo /* NB: don't need to do this sometimes but ... */ 2138177595Sweongyo /* XXX special case so we can memcpy after m_devget? */ 2139177595Sweongyo ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2140177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 2141177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 2142177595Sweongyo wh4 = mtod(m, 2143177595Sweongyo struct ieee80211_qosframe_addr4*); 2144177595Sweongyo *(uint16_t *)wh4->i_qos = ds->qosctrl; 2145177595Sweongyo } else { 2146177595Sweongyo *(uint16_t *)wh->i_qos = ds->qosctrl; 2147177595Sweongyo } 2148177595Sweongyo } 2149192468Ssam if (ieee80211_radiotap_active(ic)) { 2150177595Sweongyo sc->malo_rx_th.wr_flags = 0; 2151177595Sweongyo sc->malo_rx_th.wr_rate = ds->rate; 2152177595Sweongyo sc->malo_rx_th.wr_antsignal = rssi; 2153177595Sweongyo sc->malo_rx_th.wr_antnoise = ds->nf; 2154177595Sweongyo } 2155177595Sweongyo#ifdef MALO_DEBUG 2156177595Sweongyo if (IFF_DUMPPKTS_RECV(sc, wh)) { 2157177595Sweongyo ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2158177595Sweongyo len, ds->rate, rssi); 2159177595Sweongyo } 2160177595Sweongyo#endif 2161271849Sglebius if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 2162177595Sweongyo 2163177595Sweongyo /* dispatch */ 2164177595Sweongyo ni = ieee80211_find_rxnode(ic, 2165178354Ssam (struct ieee80211_frame_min *)wh); 2166178354Ssam if (ni != NULL) { 2167192468Ssam (void) ieee80211_input(ni, m, rssi, ds->nf); 2168178354Ssam ieee80211_free_node(ni); 2169178354Ssam } else 2170192468Ssam (void) ieee80211_input_all(ic, m, rssi, ds->nf); 2171177595Sweongyorx_next: 2172177595Sweongyo /* NB: ignore ENOMEM so we process more descriptors */ 2173177595Sweongyo (void) malo_rxbuf_init(sc, bf); 2174177595Sweongyo bf = STAILQ_NEXT(bf, bf_list); 2175177595Sweongyo } 2176177595Sweongyo 2177177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2178177595Sweongyo sc->malo_rxnext = bf; 2179177595Sweongyo 2180177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2181177595Sweongyo !IFQ_IS_EMPTY(&ifp->if_snd)) 2182177595Sweongyo malo_start(ifp); 2183177595Sweongyo#undef IEEE80211_DIR_DSTODS 2184177595Sweongyo} 2185177595Sweongyo 2186177595Sweongyostatic void 2187177595Sweongyomalo_stop(struct ifnet *ifp, int disable) 2188177595Sweongyo{ 2189177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2190177595Sweongyo 2191177595Sweongyo MALO_LOCK(sc); 2192177595Sweongyo malo_stop_locked(ifp, disable); 2193177595Sweongyo MALO_UNLOCK(sc); 2194177595Sweongyo} 2195177595Sweongyo 2196177595Sweongyo/* 2197177595Sweongyo * Reclaim all tx queue resources. 2198177595Sweongyo */ 2199177595Sweongyostatic void 2200177595Sweongyomalo_tx_cleanup(struct malo_softc *sc) 2201177595Sweongyo{ 2202177595Sweongyo int i; 2203177595Sweongyo 2204177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2205177595Sweongyo malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2206177595Sweongyo} 2207177595Sweongyo 2208177595Sweongyoint 2209177595Sweongyomalo_detach(struct malo_softc *sc) 2210177595Sweongyo{ 2211177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2212178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2213177595Sweongyo 2214177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2215177595Sweongyo __func__, ifp->if_flags); 2216177595Sweongyo 2217177595Sweongyo malo_stop(ifp, 1); 2218177595Sweongyo 2219177595Sweongyo if (sc->malo_tq != NULL) { 2220177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2221177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2222177595Sweongyo taskqueue_free(sc->malo_tq); 2223177595Sweongyo sc->malo_tq = NULL; 2224177595Sweongyo } 2225177595Sweongyo 2226177595Sweongyo /* 2227177595Sweongyo * NB: the order of these is important: 2228177595Sweongyo * o call the 802.11 layer before detaching the hal to 2229177595Sweongyo * insure callbacks into the driver to delete global 2230177595Sweongyo * key cache entries can be handled 2231177595Sweongyo * o reclaim the tx queue data structures after calling 2232177595Sweongyo * the 802.11 layer as we'll get called back to reclaim 2233177595Sweongyo * node state and potentially want to use them 2234177595Sweongyo * o to cleanup the tx queues the hal is called, so detach 2235177595Sweongyo * it last 2236177595Sweongyo * Other than that, it's straightforward... 2237177595Sweongyo */ 2238178354Ssam ieee80211_ifdetach(ic); 2239199559Sjhb callout_drain(&sc->malo_watchdog_timer); 2240177595Sweongyo malo_dma_cleanup(sc); 2241177595Sweongyo malo_tx_cleanup(sc); 2242177595Sweongyo malo_hal_detach(sc->malo_mh); 2243177595Sweongyo if_free(ifp); 2244177595Sweongyo 2245177595Sweongyo MALO_LOCK_DESTROY(sc); 2246177595Sweongyo 2247177595Sweongyo return 0; 2248177595Sweongyo} 2249177595Sweongyo 2250177595Sweongyovoid 2251177595Sweongyomalo_shutdown(struct malo_softc *sc) 2252177595Sweongyo{ 2253177595Sweongyo malo_stop(sc->malo_ifp, 1); 2254177595Sweongyo} 2255177595Sweongyo 2256177595Sweongyovoid 2257177595Sweongyomalo_suspend(struct malo_softc *sc) 2258177595Sweongyo{ 2259177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2260177595Sweongyo 2261177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2262177595Sweongyo __func__, ifp->if_flags); 2263177595Sweongyo 2264177595Sweongyo malo_stop(ifp, 1); 2265177595Sweongyo} 2266177595Sweongyo 2267177595Sweongyovoid 2268177595Sweongyomalo_resume(struct malo_softc *sc) 2269177595Sweongyo{ 2270177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2271177595Sweongyo 2272177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2273177595Sweongyo __func__, ifp->if_flags); 2274177595Sweongyo 2275178354Ssam if (ifp->if_flags & IFF_UP) 2276177595Sweongyo malo_init(sc); 2277177595Sweongyo} 2278