if_malo.c revision 283537
1/*-
2 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
3 * Copyright (c) 2007 Marvell Semiconductor, Inc.
4 * Copyright (c) 2007 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer,
12 *    without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 *    redistribution must be conditioned upon including a substantially
16 *    similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32#include <sys/cdefs.h>
33#ifdef __FreeBSD__
34__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 283537 2015-05-25 18:50:26Z glebius $");
35#endif
36
37#include "opt_malo.h"
38
39#include <sys/param.h>
40#include <sys/endian.h>
41#include <sys/kernel.h>
42#include <sys/socket.h>
43#include <sys/sockio.h>
44#include <sys/sysctl.h>
45#include <sys/taskqueue.h>
46
47#include <machine/bus.h>
48#include <sys/bus.h>
49
50#include <net/if.h>
51#include <net/if_var.h>
52#include <net/if_dl.h>
53#include <net/if_media.h>
54#include <net/if_types.h>
55#include <net/ethernet.h>
56
57#include <net80211/ieee80211_var.h>
58#include <net80211/ieee80211_regdomain.h>
59
60#include <net/bpf.h>
61
62#include <dev/malo/if_malo.h>
63
64SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0,
65    "Marvell 88w8335 driver parameters");
66
67static	int malo_txcoalesce = 8;	/* # tx pkts to q before poking f/w*/
68SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce,
69	    0, "tx buffers to send at once");
70static	int malo_rxbuf = MALO_RXBUF;		/* # rx buffers to allocate */
71SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf,
72	    0, "rx buffers allocated");
73static	int malo_rxquota = MALO_RXBUF;		/* # max buffers to process */
74SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota,
75	    0, "max rx buffers to process per interrupt");
76static	int malo_txbuf = MALO_TXBUF;		/* # tx buffers to allocate */
77SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf,
78	    0, "tx buffers allocated");
79
80#ifdef MALO_DEBUG
81static	int malo_debug = 0;
82SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug,
83	    0, "control debugging printfs");
84enum {
85	MALO_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
86	MALO_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
87	MALO_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
88	MALO_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
89	MALO_DEBUG_RESET	= 0x00000010,	/* reset processing */
90	MALO_DEBUG_INTR		= 0x00000040,	/* ISR */
91	MALO_DEBUG_TX_PROC	= 0x00000080,	/* tx ISR proc */
92	MALO_DEBUG_RX_PROC	= 0x00000100,	/* rx ISR proc */
93	MALO_DEBUG_STATE	= 0x00000400,	/* 802.11 state transitions */
94	MALO_DEBUG_NODE		= 0x00000800,	/* node management */
95	MALO_DEBUG_RECV_ALL	= 0x00001000,	/* trace all frames (beacons) */
96	MALO_DEBUG_FW		= 0x00008000,	/* firmware */
97	MALO_DEBUG_ANY		= 0xffffffff
98};
99#define	IS_BEACON(wh)							\
100	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK |			\
101		IEEE80211_FC0_SUBTYPE_MASK)) ==				\
102	 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
103#define	IFF_DUMPPKTS_RECV(sc, wh)					\
104	(((sc->malo_debug & MALO_DEBUG_RECV) &&				\
105	  ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \
106	 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) ==		\
107	  (IFF_DEBUG|IFF_LINK2))
108#define	IFF_DUMPPKTS_XMIT(sc)						\
109	((sc->malo_debug & MALO_DEBUG_XMIT) ||				\
110	 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) ==		\
111	     (IFF_DEBUG | IFF_LINK2))
112#define	DPRINTF(sc, m, fmt, ...) do {				\
113	if (sc->malo_debug & (m))				\
114		printf(fmt, __VA_ARGS__);			\
115} while (0)
116#else
117#define	DPRINTF(sc, m, fmt, ...) do {				\
118	(void) sc;						\
119} while (0)
120#endif
121
122static MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
123
124static struct ieee80211vap *malo_vap_create(struct ieee80211com *,
125		    const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
126		    const uint8_t [IEEE80211_ADDR_LEN],
127		    const uint8_t [IEEE80211_ADDR_LEN]);
128static  void	malo_vap_delete(struct ieee80211vap *);
129static	int	malo_dma_setup(struct malo_softc *);
130static	int	malo_setup_hwdma(struct malo_softc *);
131static	void	malo_txq_init(struct malo_softc *, struct malo_txq *, int);
132static	void	malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
133static	void	malo_start(struct ifnet *);
134static	void	malo_watchdog(void *);
135static	int	malo_ioctl(struct ifnet *, u_long, caddr_t);
136static	void	malo_updateslot(struct ifnet *);
137static	int	malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
138static	void	malo_scan_start(struct ieee80211com *);
139static	void	malo_scan_end(struct ieee80211com *);
140static	void	malo_set_channel(struct ieee80211com *);
141static	int	malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
142		    const struct ieee80211_bpf_params *);
143static	void	malo_sysctlattach(struct malo_softc *);
144static	void	malo_announce(struct malo_softc *);
145static	void	malo_dma_cleanup(struct malo_softc *);
146static	void	malo_stop_locked(struct ifnet *, int);
147static	int	malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
148static	int	malo_mode_init(struct malo_softc *);
149static	void	malo_tx_proc(void *, int);
150static	void	malo_rx_proc(void *, int);
151static	void	malo_init(void *);
152
153/*
154 * Read/Write shorthands for accesses to BAR 0.  Note that all BAR 1
155 * operations are done in the "hal" except getting H/W MAC address at
156 * malo_attach and there should be no reference to them here.
157 */
158static uint32_t
159malo_bar0_read4(struct malo_softc *sc, bus_size_t off)
160{
161	return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
162}
163
164static void
165malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
166{
167	DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
168	    __func__, (uintmax_t)off, val);
169
170	bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
171}
172
173int
174malo_attach(uint16_t devid, struct malo_softc *sc)
175{
176	int error;
177	struct ieee80211com *ic;
178	struct ifnet *ifp;
179	struct malo_hal *mh;
180	uint8_t bands;
181
182	ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211);
183	if (ifp == NULL) {
184		device_printf(sc->malo_dev, "can not if_alloc()\n");
185		return ENOSPC;
186	}
187	ic = ifp->if_l2com;
188
189	MALO_LOCK_INIT(sc);
190	callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
191
192	/* set these up early for if_printf use */
193	if_initname(ifp, device_get_name(sc->malo_dev),
194	    device_get_unit(sc->malo_dev));
195
196	mh = malo_hal_attach(sc->malo_dev, devid,
197	    sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
198	if (mh == NULL) {
199		if_printf(ifp, "unable to attach HAL\n");
200		error = EIO;
201		goto bad;
202	}
203	sc->malo_mh = mh;
204
205	/*
206	 * Load firmware so we can get setup.  We arbitrarily pick station
207	 * firmware; we'll re-load firmware as needed so setting up
208	 * the wrong mode isn't a big deal.
209	 */
210	error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
211	if (error != 0) {
212		if_printf(ifp, "unable to setup firmware\n");
213		goto bad1;
214	}
215	/* XXX gethwspecs() extracts correct informations?  not maybe!  */
216	error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
217	if (error != 0) {
218		if_printf(ifp, "unable to fetch h/w specs\n");
219		goto bad1;
220	}
221
222	DPRINTF(sc, MALO_DEBUG_FW,
223	    "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
224	    "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
225	    "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
226	    "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
227	    "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
228	    sc->malo_hwspecs.hwversion,
229	    sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
230	    sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
231	    sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
232	    sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
233	    sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
234	    sc->malo_hwspecs.ul_fw_awakecookie,
235	    sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
236	    sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
237
238	/* NB: firmware looks that it does not export regdomain info API.  */
239	bands = 0;
240	setbit(&bands, IEEE80211_MODE_11B);
241	setbit(&bands, IEEE80211_MODE_11G);
242	ieee80211_init_channels(ic, NULL, &bands);
243
244	sc->malo_txantenna = 0x2;	/* h/w default */
245	sc->malo_rxantenna = 0xffff;	/* h/w default */
246
247	/*
248	 * Allocate tx + rx descriptors and populate the lists.
249	 * We immediately push the information to the firmware
250	 * as otherwise it gets upset.
251	 */
252	error = malo_dma_setup(sc);
253	if (error != 0) {
254		if_printf(ifp, "failed to setup descriptors: %d\n", error);
255		goto bad1;
256	}
257	error = malo_setup_hwdma(sc);	/* push to firmware */
258	if (error != 0)			/* NB: malo_setupdma prints msg */
259		goto bad2;
260
261	sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
262		taskqueue_thread_enqueue, &sc->malo_tq);
263	taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
264		"%s taskq", ifp->if_xname);
265
266	TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
267	TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
268
269	ifp->if_softc = sc;
270	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
271	ifp->if_start = malo_start;
272	ifp->if_ioctl = malo_ioctl;
273	ifp->if_init = malo_init;
274	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
275	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
276	IFQ_SET_READY(&ifp->if_snd);
277
278	ic->ic_ifp = ifp;
279	ic->ic_softc = sc;
280	ic->ic_name = device_get_nameunit(sc->malo_dev);
281	/* XXX not right but it's not used anywhere important */
282	ic->ic_phytype = IEEE80211_T_OFDM;
283	ic->ic_opmode = IEEE80211_M_STA;
284	ic->ic_caps =
285	      IEEE80211_C_STA			/* station mode supported */
286	    | IEEE80211_C_BGSCAN		/* capable of bg scanning */
287	    | IEEE80211_C_MONITOR		/* monitor mode */
288	    | IEEE80211_C_SHPREAMBLE		/* short preamble supported */
289	    | IEEE80211_C_SHSLOT		/* short slot time supported */
290	    | IEEE80211_C_TXPMGT		/* capable of txpow mgt */
291	    | IEEE80211_C_WPA			/* capable of WPA1+WPA2 */
292	    ;
293
294	/*
295	 * Transmit requires space in the packet for a special format transmit
296	 * record and optional padding between this record and the payload.
297	 * Ask the net80211 layer to arrange this when encapsulating
298	 * packets so we can add it efficiently.
299	 */
300	ic->ic_headroom = sizeof(struct malo_txrec) -
301		sizeof(struct ieee80211_frame);
302
303	/* call MI attach routine. */
304	ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr);
305	/* override default methods */
306	ic->ic_vap_create = malo_vap_create;
307	ic->ic_vap_delete = malo_vap_delete;
308	ic->ic_raw_xmit = malo_raw_xmit;
309	ic->ic_updateslot = malo_updateslot;
310
311	ic->ic_scan_start = malo_scan_start;
312	ic->ic_scan_end = malo_scan_end;
313	ic->ic_set_channel = malo_set_channel;
314
315	sc->malo_invalid = 0;		/* ready to go, enable int handling */
316
317	ieee80211_radiotap_attach(ic,
318	    &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
319		MALO_TX_RADIOTAP_PRESENT,
320	    &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
321		MALO_RX_RADIOTAP_PRESENT);
322
323	/*
324	 * Setup dynamic sysctl's.
325	 */
326	malo_sysctlattach(sc);
327
328	if (bootverbose)
329		ieee80211_announce(ic);
330	malo_announce(sc);
331
332	return 0;
333bad2:
334	malo_dma_cleanup(sc);
335bad1:
336	malo_hal_detach(mh);
337bad:
338	if_free(ifp);
339	sc->malo_invalid = 1;
340
341	return error;
342}
343
344static struct ieee80211vap *
345malo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
346    enum ieee80211_opmode opmode, int flags,
347    const uint8_t bssid[IEEE80211_ADDR_LEN],
348    const uint8_t mac[IEEE80211_ADDR_LEN])
349{
350	struct ifnet *ifp = ic->ic_ifp;
351	struct malo_vap *mvp;
352	struct ieee80211vap *vap;
353
354	if (!TAILQ_EMPTY(&ic->ic_vaps)) {
355		if_printf(ifp, "multiple vaps not supported\n");
356		return NULL;
357	}
358	switch (opmode) {
359	case IEEE80211_M_STA:
360		if (opmode == IEEE80211_M_STA)
361			flags |= IEEE80211_CLONE_NOBEACONS;
362		/* fall thru... */
363	case IEEE80211_M_MONITOR:
364		break;
365	default:
366		if_printf(ifp, "%s mode not supported\n",
367		    ieee80211_opmode_name[opmode]);
368		return NULL;		/* unsupported */
369	}
370	mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap),
371	    M_80211_VAP, M_NOWAIT | M_ZERO);
372	if (mvp == NULL) {
373		if_printf(ifp, "cannot allocate vap state block\n");
374		return NULL;
375	}
376	vap = &mvp->malo_vap;
377	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
378
379	/* override state transition machine */
380	mvp->malo_newstate = vap->iv_newstate;
381	vap->iv_newstate = malo_newstate;
382
383	/* complete setup */
384	ieee80211_vap_attach(vap,
385	    ieee80211_media_change, ieee80211_media_status);
386	ic->ic_opmode = opmode;
387	return vap;
388}
389
390static void
391malo_vap_delete(struct ieee80211vap *vap)
392{
393	struct malo_vap *mvp = MALO_VAP(vap);
394
395	ieee80211_vap_detach(vap);
396	free(mvp, M_80211_VAP);
397}
398
399int
400malo_intr(void *arg)
401{
402	struct malo_softc *sc = arg;
403	struct malo_hal *mh = sc->malo_mh;
404	uint32_t status;
405
406	if (sc->malo_invalid) {
407		/*
408		 * The hardware is not ready/present, don't touch anything.
409		 * Note this can happen early on if the IRQ is shared.
410		 */
411		DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
412		return (FILTER_STRAY);
413	}
414
415	/*
416	 * Figure out the reason(s) for the interrupt.
417	 */
418	malo_hal_getisr(mh, &status);		/* NB: clears ISR too */
419	if (status == 0)			/* must be a shared irq */
420		return (FILTER_STRAY);
421
422	DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
423	    __func__, status, sc->malo_imask);
424
425	if (status & MALO_A2HRIC_BIT_RX_RDY)
426		taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask);
427	if (status & MALO_A2HRIC_BIT_TX_DONE)
428		taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask);
429	if (status & MALO_A2HRIC_BIT_OPC_DONE)
430		malo_hal_cmddone(mh);
431	if (status & MALO_A2HRIC_BIT_MAC_EVENT)
432		;
433	if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
434		;
435	if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
436		/* TKIP ICV error */
437		sc->malo_stats.mst_rx_badtkipicv++;
438	}
439#ifdef MALO_DEBUG
440	if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
441		DPRINTF(sc, MALO_DEBUG_INTR,
442		    "%s: can't handle interrupt status 0x%x\n",
443		    __func__, status);
444#endif
445	return (FILTER_HANDLED);
446}
447
448static void
449malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
450{
451	bus_addr_t *paddr = (bus_addr_t*) arg;
452
453	KASSERT(error == 0, ("error %u on bus_dma callback", error));
454
455	*paddr = segs->ds_addr;
456}
457
458static int
459malo_desc_setup(struct malo_softc *sc, const char *name,
460    struct malo_descdma *dd,
461    int nbuf, size_t bufsize, int ndesc, size_t descsize)
462{
463	int error;
464	struct ifnet *ifp = sc->malo_ifp;
465	uint8_t *ds;
466
467	DPRINTF(sc, MALO_DEBUG_RESET,
468	    "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
469	    __func__, name, nbuf, (uintmax_t) bufsize,
470	    ndesc, (uintmax_t) descsize);
471
472	dd->dd_name = name;
473	dd->dd_desc_len = nbuf * ndesc * descsize;
474
475	/*
476	 * Setup DMA descriptor area.
477	 */
478	error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
479		       PAGE_SIZE, 0,		/* alignment, bounds */
480		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
481		       BUS_SPACE_MAXADDR,	/* highaddr */
482		       NULL, NULL,		/* filter, filterarg */
483		       dd->dd_desc_len,		/* maxsize */
484		       1,			/* nsegments */
485		       dd->dd_desc_len,		/* maxsegsize */
486		       BUS_DMA_ALLOCNOW,	/* flags */
487		       NULL,			/* lockfunc */
488		       NULL,			/* lockarg */
489		       &dd->dd_dmat);
490	if (error != 0) {
491		if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
492		return error;
493	}
494
495	/* allocate descriptors */
496	error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
497	    BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
498	if (error != 0) {
499		if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
500		    "error %u\n", nbuf * ndesc, dd->dd_name, error);
501		goto fail1;
502	}
503
504	error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
505	    dd->dd_desc, dd->dd_desc_len,
506	    malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
507	if (error != 0) {
508		if_printf(ifp, "unable to map %s descriptors, error %u\n",
509		    dd->dd_name, error);
510		goto fail2;
511	}
512
513	ds = dd->dd_desc;
514	memset(ds, 0, dd->dd_desc_len);
515	DPRINTF(sc, MALO_DEBUG_RESET,
516	    "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n",
517	    __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
518	    (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
519
520	return 0;
521fail2:
522	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
523fail1:
524	bus_dma_tag_destroy(dd->dd_dmat);
525	memset(dd, 0, sizeof(*dd));
526	return error;
527}
528
529#define	DS2PHYS(_dd, _ds) \
530	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
531
532static int
533malo_rxdma_setup(struct malo_softc *sc)
534{
535	struct ifnet *ifp = sc->malo_ifp;
536	int error, bsize, i;
537	struct malo_rxbuf *bf;
538	struct malo_rxdesc *ds;
539
540	error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
541	    malo_rxbuf, sizeof(struct malo_rxbuf),
542	    1, sizeof(struct malo_rxdesc));
543	if (error != 0)
544		return error;
545
546	/*
547	 * Allocate rx buffers and set them up.
548	 */
549	bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
550	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
551	if (bf == NULL) {
552		if_printf(ifp, "malloc of %u rx buffers failed\n", bsize);
553		return error;
554	}
555	sc->malo_rxdma.dd_bufptr = bf;
556
557	STAILQ_INIT(&sc->malo_rxbuf);
558	ds = sc->malo_rxdma.dd_desc;
559	for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
560		bf->bf_desc = ds;
561		bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
562		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
563		    &bf->bf_dmamap);
564		if (error != 0) {
565			if_printf(ifp, "%s: unable to dmamap for rx buffer, "
566			    "error %d\n", __func__, error);
567			return error;
568		}
569		/* NB: tail is intentional to preserve descriptor order */
570		STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
571	}
572	return 0;
573}
574
575static int
576malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
577{
578	struct ifnet *ifp = sc->malo_ifp;
579	int error, bsize, i;
580	struct malo_txbuf *bf;
581	struct malo_txdesc *ds;
582
583	error = malo_desc_setup(sc, "tx", &txq->dma,
584	    malo_txbuf, sizeof(struct malo_txbuf),
585	    MALO_TXDESC, sizeof(struct malo_txdesc));
586	if (error != 0)
587		return error;
588
589	/* allocate and setup tx buffers */
590	bsize = malo_txbuf * sizeof(struct malo_txbuf);
591	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
592	if (bf == NULL) {
593		if_printf(ifp, "malloc of %u tx buffers failed\n",
594		    malo_txbuf);
595		return ENOMEM;
596	}
597	txq->dma.dd_bufptr = bf;
598
599	STAILQ_INIT(&txq->free);
600	txq->nfree = 0;
601	ds = txq->dma.dd_desc;
602	for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
603		bf->bf_desc = ds;
604		bf->bf_daddr = DS2PHYS(&txq->dma, ds);
605		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
606		    &bf->bf_dmamap);
607		if (error != 0) {
608			if_printf(ifp, "unable to create dmamap for tx "
609			    "buffer %u, error %u\n", i, error);
610			return error;
611		}
612		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
613		txq->nfree++;
614	}
615
616	return 0;
617}
618
619static void
620malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
621{
622	bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
623	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
624	bus_dma_tag_destroy(dd->dd_dmat);
625
626	memset(dd, 0, sizeof(*dd));
627}
628
629static void
630malo_rxdma_cleanup(struct malo_softc *sc)
631{
632	struct malo_rxbuf *bf;
633
634	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
635		if (bf->bf_m != NULL) {
636			m_freem(bf->bf_m);
637			bf->bf_m = NULL;
638		}
639		if (bf->bf_dmamap != NULL) {
640			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
641			bf->bf_dmamap = NULL;
642		}
643	}
644	STAILQ_INIT(&sc->malo_rxbuf);
645	if (sc->malo_rxdma.dd_bufptr != NULL) {
646		free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
647		sc->malo_rxdma.dd_bufptr = NULL;
648	}
649	if (sc->malo_rxdma.dd_desc_len != 0)
650		malo_desc_cleanup(sc, &sc->malo_rxdma);
651}
652
653static void
654malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
655{
656	struct malo_txbuf *bf;
657	struct ieee80211_node *ni;
658
659	STAILQ_FOREACH(bf, &txq->free, bf_list) {
660		if (bf->bf_m != NULL) {
661			m_freem(bf->bf_m);
662			bf->bf_m = NULL;
663		}
664		ni = bf->bf_node;
665		bf->bf_node = NULL;
666		if (ni != NULL) {
667			/*
668			 * Reclaim node reference.
669			 */
670			ieee80211_free_node(ni);
671		}
672		if (bf->bf_dmamap != NULL) {
673			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
674			bf->bf_dmamap = NULL;
675		}
676	}
677	STAILQ_INIT(&txq->free);
678	txq->nfree = 0;
679	if (txq->dma.dd_bufptr != NULL) {
680		free(txq->dma.dd_bufptr, M_MALODEV);
681		txq->dma.dd_bufptr = NULL;
682	}
683	if (txq->dma.dd_desc_len != 0)
684		malo_desc_cleanup(sc, &txq->dma);
685}
686
687static void
688malo_dma_cleanup(struct malo_softc *sc)
689{
690	int i;
691
692	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
693		malo_txdma_cleanup(sc, &sc->malo_txq[i]);
694
695	malo_rxdma_cleanup(sc);
696}
697
698static int
699malo_dma_setup(struct malo_softc *sc)
700{
701	int error, i;
702
703	/* rxdma initializing.  */
704	error = malo_rxdma_setup(sc);
705	if (error != 0)
706		return error;
707
708	/* NB: we just have 1 tx queue now.  */
709	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
710		error = malo_txdma_setup(sc, &sc->malo_txq[i]);
711		if (error != 0) {
712			malo_dma_cleanup(sc);
713
714			return error;
715		}
716
717		malo_txq_init(sc, &sc->malo_txq[i], i);
718	}
719
720	return 0;
721}
722
723static void
724malo_hal_set_rxtxdma(struct malo_softc *sc)
725{
726	int i;
727
728	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
729	    sc->malo_hwdma.rxdesc_read);
730	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
731	    sc->malo_hwdma.rxdesc_read);
732
733	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
734		malo_bar0_write4(sc,
735		    sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
736	}
737}
738
739/*
740 * Inform firmware of our tx/rx dma setup.  The BAR 0 writes below are
741 * for compatibility with older firmware.  For current firmware we send
742 * this information with a cmd block via malo_hal_sethwdma.
743 */
744static int
745malo_setup_hwdma(struct malo_softc *sc)
746{
747	int i;
748	struct malo_txq *txq;
749
750	sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
751
752	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
753		txq = &sc->malo_txq[i];
754		sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
755	}
756	sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
757	sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
758
759	malo_hal_set_rxtxdma(sc);
760
761	return 0;
762}
763
764static void
765malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
766{
767	struct malo_txbuf *bf, *bn;
768	struct malo_txdesc *ds;
769
770	MALO_TXQ_LOCK_INIT(sc, txq);
771	txq->qnum = qnum;
772	txq->txpri = 0;	/* XXX */
773
774	STAILQ_FOREACH(bf, &txq->free, bf_list) {
775		bf->bf_txq = txq;
776
777		ds = bf->bf_desc;
778		bn = STAILQ_NEXT(bf, bf_list);
779		if (bn == NULL)
780			bn = STAILQ_FIRST(&txq->free);
781		ds->physnext = htole32(bn->bf_daddr);
782	}
783	STAILQ_INIT(&txq->active);
784}
785
786/*
787 * Reclaim resources for a setup queue.
788 */
789static void
790malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
791{
792	/* XXX hal work? */
793	MALO_TXQ_LOCK_DESTROY(txq);
794}
795
796/*
797 * Allocate a tx buffer for sending a frame.
798 */
799static struct malo_txbuf *
800malo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
801{
802	struct malo_txbuf *bf;
803
804	MALO_TXQ_LOCK(txq);
805	bf = STAILQ_FIRST(&txq->free);
806	if (bf != NULL) {
807		STAILQ_REMOVE_HEAD(&txq->free, bf_list);
808		txq->nfree--;
809	}
810	MALO_TXQ_UNLOCK(txq);
811	if (bf == NULL) {
812		DPRINTF(sc, MALO_DEBUG_XMIT,
813		    "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
814		sc->malo_stats.mst_tx_qstop++;
815	}
816	return bf;
817}
818
819static int
820malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
821{
822	struct mbuf *m;
823	int error;
824
825	/*
826	 * Load the DMA map so any coalescing is done.  This also calculates
827	 * the number of descriptors we need.
828	 */
829	error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
830				     bf->bf_segs, &bf->bf_nseg,
831				     BUS_DMA_NOWAIT);
832	if (error == EFBIG) {
833		/* XXX packet requires too many descriptors */
834		bf->bf_nseg = MALO_TXDESC + 1;
835	} else if (error != 0) {
836		sc->malo_stats.mst_tx_busdma++;
837		m_freem(m0);
838		return error;
839	}
840	/*
841	 * Discard null packets and check for packets that require too many
842	 * TX descriptors.  We try to convert the latter to a cluster.
843	 */
844	if (error == EFBIG) {		/* too many desc's, linearize */
845		sc->malo_stats.mst_tx_linear++;
846		m = m_defrag(m0, M_NOWAIT);
847		if (m == NULL) {
848			m_freem(m0);
849			sc->malo_stats.mst_tx_nombuf++;
850			return ENOMEM;
851		}
852		m0 = m;
853		error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
854					     bf->bf_segs, &bf->bf_nseg,
855					     BUS_DMA_NOWAIT);
856		if (error != 0) {
857			sc->malo_stats.mst_tx_busdma++;
858			m_freem(m0);
859			return error;
860		}
861		KASSERT(bf->bf_nseg <= MALO_TXDESC,
862		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
863	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
864		sc->malo_stats.mst_tx_nodata++;
865		m_freem(m0);
866		return EIO;
867	}
868	DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
869		__func__, m0, m0->m_pkthdr.len);
870	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
871	bf->bf_m = m0;
872
873	return 0;
874}
875
876#ifdef MALO_DEBUG
877static void
878malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
879{
880	const struct malo_rxdesc *ds = bf->bf_desc;
881	uint32_t status = le32toh(ds->status);
882
883	printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n"
884	    "      STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
885	    " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr,
886	    le32toh(ds->physnext), le32toh(ds->physbuffdata),
887	    ds->rxcontrol,
888	    ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
889	        "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
890	    ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
891	    ds->rate, le16toh(ds->qosctrl));
892}
893
894static void
895malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
896{
897	const struct malo_txdesc *ds = bf->bf_desc;
898	uint32_t status = le32toh(ds->status);
899
900	printf("Q%u[%3u]", qnum, ix);
901	printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr);
902	printf("    NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
903	    le32toh(ds->physnext),
904	    le32toh(ds->pktptr), le16toh(ds->pktlen), status,
905	    status & MALO_TXD_STATUS_USED ?
906	    "" : (status & 3) != 0 ? " *" : " !");
907	printf("    RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
908	    ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
909	    le32toh(ds->sap_pktinfo), le16toh(ds->format));
910#if 0
911	{
912		const uint8_t *cp = (const uint8_t *) ds;
913		int i;
914		for (i = 0; i < sizeof(struct malo_txdesc); i++) {
915			printf("%02x ", cp[i]);
916			if (((i+1) % 16) == 0)
917				printf("\n");
918		}
919		printf("\n");
920	}
921#endif
922}
923#endif /* MALO_DEBUG */
924
925static __inline void
926malo_updatetxrate(struct ieee80211_node *ni, int rix)
927{
928#define	N(x)	(sizeof(x)/sizeof(x[0]))
929	static const int ieeerates[] =
930	    { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
931	if (rix < N(ieeerates))
932		ni->ni_txrate = ieeerates[rix];
933#undef N
934}
935
936static int
937malo_fix2rate(int fix_rate)
938{
939#define	N(x)	(sizeof(x)/sizeof(x[0]))
940	static const int rates[] =
941	    { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
942	return (fix_rate < N(rates) ? rates[fix_rate] : 0);
943#undef N
944}
945
946/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
947#define	MS(v,x)			(((v) & x) >> x##_S)
948#define	SM(v,x)			(((v) << x##_S) & x)
949
950/*
951 * Process completed xmit descriptors from the specified queue.
952 */
953static int
954malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
955{
956	struct malo_txbuf *bf;
957	struct malo_txdesc *ds;
958	struct ieee80211_node *ni;
959	int nreaped;
960	uint32_t status;
961
962	DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
963	    __func__, txq->qnum);
964	for (nreaped = 0;; nreaped++) {
965		MALO_TXQ_LOCK(txq);
966		bf = STAILQ_FIRST(&txq->active);
967		if (bf == NULL) {
968			MALO_TXQ_UNLOCK(txq);
969			break;
970		}
971		ds = bf->bf_desc;
972		MALO_TXDESC_SYNC(txq, ds,
973		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
974		if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
975			MALO_TXQ_UNLOCK(txq);
976			break;
977		}
978		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
979		MALO_TXQ_UNLOCK(txq);
980
981#ifdef MALO_DEBUG
982		if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
983			malo_printtxbuf(bf, txq->qnum, nreaped);
984#endif
985		ni = bf->bf_node;
986		if (ni != NULL) {
987			status = le32toh(ds->status);
988			if (status & MALO_TXD_STATUS_OK) {
989				uint16_t format = le16toh(ds->format);
990				uint8_t txant = MS(format, MALO_TXD_ANTENNA);
991
992				sc->malo_stats.mst_ant_tx[txant]++;
993				if (status & MALO_TXD_STATUS_OK_RETRY)
994					sc->malo_stats.mst_tx_retries++;
995				if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
996					sc->malo_stats.mst_tx_mretries++;
997				malo_updatetxrate(ni, ds->datarate);
998				sc->malo_stats.mst_tx_rate = ds->datarate;
999			} else {
1000				if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
1001					sc->malo_stats.mst_tx_linkerror++;
1002				if (status & MALO_TXD_STATUS_FAILED_XRETRY)
1003					sc->malo_stats.mst_tx_xretries++;
1004				if (status & MALO_TXD_STATUS_FAILED_AGING)
1005					sc->malo_stats.mst_tx_aging++;
1006			}
1007			/*
1008			 * Do any tx complete callback.  Note this must
1009			 * be done before releasing the node reference.
1010			 * XXX no way to figure out if frame was ACK'd
1011			 */
1012			if (bf->bf_m->m_flags & M_TXCB) {
1013				/* XXX strip fw len in case header inspected */
1014				m_adj(bf->bf_m, sizeof(uint16_t));
1015				ieee80211_process_callback(ni, bf->bf_m,
1016					(status & MALO_TXD_STATUS_OK) == 0);
1017			}
1018			/*
1019			 * Reclaim reference to node.
1020			 *
1021			 * NB: the node may be reclaimed here if, for example
1022			 *     this is a DEAUTH message that was sent and the
1023			 *     node was timed out due to inactivity.
1024			 */
1025			ieee80211_free_node(ni);
1026		}
1027		ds->status = htole32(MALO_TXD_STATUS_IDLE);
1028		ds->pktlen = htole32(0);
1029
1030		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
1031		    BUS_DMASYNC_POSTWRITE);
1032		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1033		m_freem(bf->bf_m);
1034		bf->bf_m = NULL;
1035		bf->bf_node = NULL;
1036
1037		MALO_TXQ_LOCK(txq);
1038		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1039		txq->nfree++;
1040		MALO_TXQ_UNLOCK(txq);
1041	}
1042	return nreaped;
1043}
1044
1045/*
1046 * Deferred processing of transmit interrupt.
1047 */
1048static void
1049malo_tx_proc(void *arg, int npending)
1050{
1051	struct malo_softc *sc = arg;
1052	struct ifnet *ifp = sc->malo_ifp;
1053	int i, nreaped;
1054
1055	/*
1056	 * Process each active queue.
1057	 */
1058	nreaped = 0;
1059	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1060		if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1061			nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1062	}
1063
1064	if (nreaped != 0) {
1065		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1066		sc->malo_timer = 0;
1067		malo_start(ifp);
1068	}
1069}
1070
1071static int
1072malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1073    struct malo_txbuf *bf, struct mbuf *m0)
1074{
1075#define	IEEE80211_DIR_DSTODS(wh) \
1076	((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
1077#define	IS_DATA_FRAME(wh)						\
1078	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1079	int error, ismcast, iswep;
1080	int copyhdrlen, hdrlen, pktlen;
1081	struct ieee80211_frame *wh;
1082	struct ifnet *ifp = sc->malo_ifp;
1083	struct ieee80211com *ic = ifp->if_l2com;
1084	struct ieee80211vap *vap = ni->ni_vap;
1085	struct malo_txdesc *ds;
1086	struct malo_txrec *tr;
1087	struct malo_txq *txq;
1088	uint16_t qos;
1089
1090	wh = mtod(m0, struct ieee80211_frame *);
1091	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1092	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1093	copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1094	pktlen = m0->m_pkthdr.len;
1095	if (IEEE80211_QOS_HAS_SEQ(wh)) {
1096		if (IEEE80211_DIR_DSTODS(wh)) {
1097			qos = *(uint16_t *)
1098			    (((struct ieee80211_qosframe_addr4 *) wh)->i_qos);
1099			copyhdrlen -= sizeof(qos);
1100		} else
1101			qos = *(uint16_t *)
1102			    (((struct ieee80211_qosframe *) wh)->i_qos);
1103	} else
1104		qos = 0;
1105
1106	if (iswep) {
1107		struct ieee80211_key *k;
1108
1109		/*
1110		 * Construct the 802.11 header+trailer for an encrypted
1111		 * frame. The only reason this can fail is because of an
1112		 * unknown or unsupported cipher/key type.
1113		 *
1114		 * NB: we do this even though the firmware will ignore
1115		 *     what we've done for WEP and TKIP as we need the
1116		 *     ExtIV filled in for CCMP and this also adjusts
1117		 *     the headers which simplifies our work below.
1118		 */
1119		k = ieee80211_crypto_encap(ni, m0);
1120		if (k == NULL) {
1121			/*
1122			 * This can happen when the key is yanked after the
1123			 * frame was queued.  Just discard the frame; the
1124			 * 802.11 layer counts failures and provides
1125			 * debugging/diagnostics.
1126			 */
1127			m_freem(m0);
1128			return EIO;
1129		}
1130
1131		/*
1132		 * Adjust the packet length for the crypto additions
1133		 * done during encap and any other bits that the f/w
1134		 * will add later on.
1135		 */
1136		pktlen = m0->m_pkthdr.len;
1137
1138		/* packet header may have moved, reset our local pointer */
1139		wh = mtod(m0, struct ieee80211_frame *);
1140	}
1141
1142	if (ieee80211_radiotap_active_vap(vap)) {
1143		sc->malo_tx_th.wt_flags = 0;	/* XXX */
1144		if (iswep)
1145			sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1146		sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1147		sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1148
1149		ieee80211_radiotap_tx(vap, m0);
1150	}
1151
1152	/*
1153	 * Copy up/down the 802.11 header; the firmware requires
1154	 * we present a 2-byte payload length followed by a
1155	 * 4-address header (w/o QoS), followed (optionally) by
1156	 * any WEP/ExtIV header (but only filled in for CCMP).
1157	 * We are assured the mbuf has sufficient headroom to
1158	 * prepend in-place by the setup of ic_headroom in
1159	 * malo_attach.
1160	 */
1161	if (hdrlen < sizeof(struct malo_txrec)) {
1162		const int space = sizeof(struct malo_txrec) - hdrlen;
1163		if (M_LEADINGSPACE(m0) < space) {
1164			/* NB: should never happen */
1165			device_printf(sc->malo_dev,
1166			    "not enough headroom, need %d found %zd, "
1167			    "m_flags 0x%x m_len %d\n",
1168			    space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1169			ieee80211_dump_pkt(ic,
1170			    mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1171			m_freem(m0);
1172			/* XXX stat */
1173			return EIO;
1174		}
1175		M_PREPEND(m0, space, M_NOWAIT);
1176	}
1177	tr = mtod(m0, struct malo_txrec *);
1178	if (wh != (struct ieee80211_frame *) &tr->wh)
1179		ovbcopy(wh, &tr->wh, hdrlen);
1180	/*
1181	 * Note: the "firmware length" is actually the length of the fully
1182	 * formed "802.11 payload".  That is, it's everything except for
1183	 * the 802.11 header.  In particular this includes all crypto
1184	 * material including the MIC!
1185	 */
1186	tr->fwlen = htole16(pktlen - hdrlen);
1187
1188	/*
1189	 * Load the DMA map so any coalescing is done.  This
1190	 * also calculates the number of descriptors we need.
1191	 */
1192	error = malo_tx_dmasetup(sc, bf, m0);
1193	if (error != 0)
1194		return error;
1195	bf->bf_node = ni;			/* NB: held reference */
1196	m0 = bf->bf_m;				/* NB: may have changed */
1197	tr = mtod(m0, struct malo_txrec *);
1198	wh = (struct ieee80211_frame *)&tr->wh;
1199
1200	/*
1201	 * Formulate tx descriptor.
1202	 */
1203	ds = bf->bf_desc;
1204	txq = bf->bf_txq;
1205
1206	ds->qosctrl = qos;			/* NB: already little-endian */
1207	ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1208	ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1209	/* NB: pPhysNext setup once, don't touch */
1210	ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1211	ds->sap_pktinfo = 0;
1212	ds->format = 0;
1213
1214	/*
1215	 * Select transmit rate.
1216	 */
1217	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1218	case IEEE80211_FC0_TYPE_MGT:
1219		sc->malo_stats.mst_tx_mgmt++;
1220		/* fall thru... */
1221	case IEEE80211_FC0_TYPE_CTL:
1222		ds->txpriority = 1;
1223		break;
1224	case IEEE80211_FC0_TYPE_DATA:
1225		ds->txpriority = txq->qnum;
1226		break;
1227	default:
1228		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1229			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1230		/* XXX statistic */
1231		m_freem(m0);
1232		return EIO;
1233	}
1234
1235#ifdef MALO_DEBUG
1236	if (IFF_DUMPPKTS_XMIT(sc))
1237		ieee80211_dump_pkt(ic,
1238		    mtod(m0, const uint8_t *)+sizeof(uint16_t),
1239		    m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1240#endif
1241
1242	MALO_TXQ_LOCK(txq);
1243	if (!IS_DATA_FRAME(wh))
1244		ds->status |= htole32(1);
1245	ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1246	STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1247	MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1248
1249	if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1250	sc->malo_timer = 5;
1251	MALO_TXQ_UNLOCK(txq);
1252	return 0;
1253#undef IEEE80211_DIR_DSTODS
1254}
1255
1256static void
1257malo_start(struct ifnet *ifp)
1258{
1259	struct malo_softc *sc = ifp->if_softc;
1260	struct ieee80211_node *ni;
1261	struct malo_txq *txq = &sc->malo_txq[0];
1262	struct malo_txbuf *bf = NULL;
1263	struct mbuf *m;
1264	int nqueued = 0;
1265
1266	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid)
1267		return;
1268
1269	for (;;) {
1270		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1271		if (m == NULL)
1272			break;
1273		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1274		bf = malo_getbuf(sc, txq);
1275		if (bf == NULL) {
1276			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1277
1278			/* XXX blocks other traffic */
1279			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1280			sc->malo_stats.mst_tx_qstop++;
1281			break;
1282		}
1283		/*
1284		 * Pass the frame to the h/w for transmission.
1285		 */
1286		if (malo_tx_start(sc, ni, bf, m)) {
1287			if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1288			if (bf != NULL) {
1289				bf->bf_m = NULL;
1290				bf->bf_node = NULL;
1291				MALO_TXQ_LOCK(txq);
1292				STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1293				MALO_TXQ_UNLOCK(txq);
1294			}
1295			ieee80211_free_node(ni);
1296			continue;
1297		}
1298		nqueued++;
1299
1300		if (nqueued >= malo_txcoalesce) {
1301			/*
1302			 * Poke the firmware to process queued frames;
1303			 * see below about (lack of) locking.
1304			 */
1305			nqueued = 0;
1306			malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1307		}
1308	}
1309
1310	if (nqueued) {
1311		/*
1312		 * NB: We don't need to lock against tx done because
1313		 * this just prods the firmware to check the transmit
1314		 * descriptors.  The firmware will also start fetching
1315		 * descriptors by itself if it notices new ones are
1316		 * present when it goes to deliver a tx done interrupt
1317		 * to the host. So if we race with tx done processing
1318		 * it's ok.  Delivering the kick here rather than in
1319		 * malo_tx_start is an optimization to avoid poking the
1320		 * firmware for each packet.
1321		 *
1322		 * NB: the queue id isn't used so 0 is ok.
1323		 */
1324		malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1325	}
1326}
1327
1328static void
1329malo_watchdog(void *arg)
1330{
1331	struct malo_softc *sc;
1332	struct ifnet *ifp;
1333
1334	sc = arg;
1335	callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1336	if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1337		return;
1338
1339	ifp = sc->malo_ifp;
1340	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) {
1341		if_printf(ifp, "watchdog timeout\n");
1342
1343		/* XXX no way to reset h/w. now  */
1344
1345		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1346		sc->malo_stats.mst_watchdog++;
1347	}
1348}
1349
1350static int
1351malo_hal_reset(struct malo_softc *sc)
1352{
1353	static int first = 0;
1354	struct ifnet *ifp = sc->malo_ifp;
1355	struct ieee80211com *ic = ifp->if_l2com;
1356	struct malo_hal *mh = sc->malo_mh;
1357
1358	if (first == 0) {
1359		/*
1360		 * NB: when the device firstly is initialized, sometimes
1361		 * firmware could override rx/tx dma registers so we re-set
1362		 * these values once.
1363		 */
1364		malo_hal_set_rxtxdma(sc);
1365		first = 1;
1366	}
1367
1368	malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1369	malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1370	malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1371	malo_chan_set(sc, ic->ic_curchan);
1372
1373	/* XXX needs other stuffs?  */
1374
1375	return 1;
1376}
1377
1378static __inline struct mbuf *
1379malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1380{
1381	struct mbuf *m;
1382	bus_addr_t paddr;
1383	int error;
1384
1385	/* XXX don't need mbuf, just dma buffer */
1386	m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1387	if (m == NULL) {
1388		sc->malo_stats.mst_rx_nombuf++;	/* XXX */
1389		return NULL;
1390	}
1391	error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1392	    mtod(m, caddr_t), MJUMPAGESIZE,
1393	    malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1394	if (error != 0) {
1395		if_printf(sc->malo_ifp,
1396		    "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1397		m_freem(m);
1398		return NULL;
1399	}
1400	bf->bf_data = paddr;
1401	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1402
1403	return m;
1404}
1405
1406static int
1407malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1408{
1409	struct malo_rxdesc *ds;
1410
1411	ds = bf->bf_desc;
1412	if (bf->bf_m == NULL) {
1413		bf->bf_m = malo_getrxmbuf(sc, bf);
1414		if (bf->bf_m == NULL) {
1415			/* mark descriptor to be skipped */
1416			ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1417			/* NB: don't need PREREAD */
1418			MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1419			return ENOMEM;
1420		}
1421	}
1422
1423	/*
1424	 * Setup descriptor.
1425	 */
1426	ds->qosctrl = 0;
1427	ds->snr = 0;
1428	ds->status = MALO_RXD_STATUS_IDLE;
1429	ds->channel = 0;
1430	ds->pktlen = htole16(MALO_RXSIZE);
1431	ds->nf = 0;
1432	ds->physbuffdata = htole32(bf->bf_data);
1433	/* NB: don't touch pPhysNext, set once */
1434	ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1435	MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1436
1437	return 0;
1438}
1439
1440/*
1441 * Setup the rx data structures.  This should only be done once or we may get
1442 * out of sync with the firmware.
1443 */
1444static int
1445malo_startrecv(struct malo_softc *sc)
1446{
1447	struct malo_rxbuf *bf, *prev;
1448	struct malo_rxdesc *ds;
1449
1450	if (sc->malo_recvsetup == 1) {
1451		malo_mode_init(sc);		/* set filters, etc. */
1452		return 0;
1453	}
1454
1455	prev = NULL;
1456	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1457		int error = malo_rxbuf_init(sc, bf);
1458		if (error != 0) {
1459			DPRINTF(sc, MALO_DEBUG_RECV,
1460			    "%s: malo_rxbuf_init failed %d\n",
1461			    __func__, error);
1462			return error;
1463		}
1464		if (prev != NULL) {
1465			ds = prev->bf_desc;
1466			ds->physnext = htole32(bf->bf_daddr);
1467		}
1468		prev = bf;
1469	}
1470	if (prev != NULL) {
1471		ds = prev->bf_desc;
1472		ds->physnext =
1473		    htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1474	}
1475
1476	sc->malo_recvsetup = 1;
1477
1478	malo_mode_init(sc);		/* set filters, etc. */
1479
1480	return 0;
1481}
1482
1483static void
1484malo_init_locked(struct malo_softc *sc)
1485{
1486	struct ifnet *ifp = sc->malo_ifp;
1487	struct malo_hal *mh = sc->malo_mh;
1488	int error;
1489
1490	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1491	    __func__, ifp->if_flags);
1492
1493	MALO_LOCK_ASSERT(sc);
1494
1495	/*
1496	 * Stop anything previously setup.  This is safe whether this is
1497	 * the first time through or not.
1498	 */
1499	malo_stop_locked(ifp, 0);
1500
1501	/*
1502	 * Push state to the firmware.
1503	 */
1504	if (!malo_hal_reset(sc)) {
1505		if_printf(ifp, "%s: unable to reset hardware\n", __func__);
1506		return;
1507	}
1508
1509	/*
1510	 * Setup recv (once); transmit is already good to go.
1511	 */
1512	error = malo_startrecv(sc);
1513	if (error != 0) {
1514		if_printf(ifp, "%s: unable to start recv logic, error %d\n",
1515		    __func__, error);
1516		return;
1517	}
1518
1519	/*
1520	 * Enable interrupts.
1521	 */
1522	sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1523	    | MALO_A2HRIC_BIT_TX_DONE
1524	    | MALO_A2HRIC_BIT_OPC_DONE
1525	    | MALO_A2HRIC_BIT_MAC_EVENT
1526	    | MALO_A2HRIC_BIT_RX_PROBLEM
1527	    | MALO_A2HRIC_BIT_ICV_ERROR
1528	    | MALO_A2HRIC_BIT_RADAR_DETECT
1529	    | MALO_A2HRIC_BIT_CHAN_SWITCH;
1530
1531	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1532	malo_hal_intrset(mh, sc->malo_imask);
1533	callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1534}
1535
1536static void
1537malo_init(void *arg)
1538{
1539	struct malo_softc *sc = (struct malo_softc *) arg;
1540	struct ifnet *ifp = sc->malo_ifp;
1541	struct ieee80211com *ic = ifp->if_l2com;
1542
1543	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1544	    __func__, ifp->if_flags);
1545
1546	MALO_LOCK(sc);
1547	malo_init_locked(sc);
1548
1549	MALO_UNLOCK(sc);
1550
1551	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1552		ieee80211_start_all(ic);	/* start all vap's */
1553}
1554
1555/*
1556 * Set the multicast filter contents into the hardware.
1557 */
1558static void
1559malo_setmcastfilter(struct malo_softc *sc)
1560{
1561	struct ifnet *ifp = sc->malo_ifp;
1562	struct ieee80211com *ic = ifp->if_l2com;
1563	struct ifmultiaddr *ifma;
1564	uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1565	uint8_t *mp;
1566	int nmc;
1567
1568	mp = macs;
1569	nmc = 0;
1570
1571	if (ic->ic_opmode == IEEE80211_M_MONITOR ||
1572	    (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)))
1573		goto all;
1574
1575	if_maddr_rlock(ifp);
1576	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1577		if (ifma->ifma_addr->sa_family != AF_LINK)
1578			continue;
1579
1580		if (nmc == MALO_HAL_MCAST_MAX) {
1581			ifp->if_flags |= IFF_ALLMULTI;
1582			if_maddr_runlock(ifp);
1583			goto all;
1584		}
1585		IEEE80211_ADDR_COPY(mp,
1586		    LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
1587
1588		mp += IEEE80211_ADDR_LEN, nmc++;
1589	}
1590	if_maddr_runlock(ifp);
1591
1592	malo_hal_setmcast(sc->malo_mh, nmc, macs);
1593
1594all:
1595	/*
1596	 * XXX we don't know how to set the f/w for supporting
1597	 * IFF_ALLMULTI | IFF_PROMISC cases
1598	 */
1599	return;
1600}
1601
1602static int
1603malo_mode_init(struct malo_softc *sc)
1604{
1605	struct ifnet *ifp = sc->malo_ifp;
1606	struct ieee80211com *ic = ifp->if_l2com;
1607	struct malo_hal *mh = sc->malo_mh;
1608
1609	/*
1610	 * NB: Ignore promisc in hostap mode; it's set by the
1611	 * bridge.  This is wrong but we have no way to
1612	 * identify internal requests (from the bridge)
1613	 * versus external requests such as for tcpdump.
1614	 */
1615	malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) &&
1616	    ic->ic_opmode != IEEE80211_M_HOSTAP);
1617	malo_setmcastfilter(sc);
1618
1619	return ENXIO;
1620}
1621
1622static void
1623malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1624{
1625	struct ieee80211_node *ni;
1626	struct malo_txbuf *bf;
1627	u_int ix;
1628
1629	/*
1630	 * NB: this assumes output has been stopped and
1631	 *     we do not need to block malo_tx_tasklet
1632	 */
1633	for (ix = 0;; ix++) {
1634		MALO_TXQ_LOCK(txq);
1635		bf = STAILQ_FIRST(&txq->active);
1636		if (bf == NULL) {
1637			MALO_TXQ_UNLOCK(txq);
1638			break;
1639		}
1640		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1641		MALO_TXQ_UNLOCK(txq);
1642#ifdef MALO_DEBUG
1643		if (sc->malo_debug & MALO_DEBUG_RESET) {
1644			struct ifnet *ifp = sc->malo_ifp;
1645			struct ieee80211com *ic = ifp->if_l2com;
1646			const struct malo_txrec *tr =
1647			    mtod(bf->bf_m, const struct malo_txrec *);
1648			malo_printtxbuf(bf, txq->qnum, ix);
1649			ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1650			    bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1651		}
1652#endif /* MALO_DEBUG */
1653		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1654		ni = bf->bf_node;
1655		bf->bf_node = NULL;
1656		if (ni != NULL) {
1657			/*
1658			 * Reclaim node reference.
1659			 */
1660			ieee80211_free_node(ni);
1661		}
1662		m_freem(bf->bf_m);
1663		bf->bf_m = NULL;
1664
1665		MALO_TXQ_LOCK(txq);
1666		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1667		txq->nfree++;
1668		MALO_TXQ_UNLOCK(txq);
1669	}
1670}
1671
1672static void
1673malo_stop_locked(struct ifnet *ifp, int disable)
1674{
1675	struct malo_softc *sc = ifp->if_softc;
1676	struct malo_hal *mh = sc->malo_mh;
1677	int i;
1678
1679	DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1680	    __func__, sc->malo_invalid, ifp->if_flags);
1681
1682	MALO_LOCK_ASSERT(sc);
1683
1684	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1685		return;
1686
1687	/*
1688	 * Shutdown the hardware and driver:
1689	 *    disable interrupts
1690	 *    turn off the radio
1691	 *    drain and release tx queues
1692	 *
1693	 * Note that some of this work is not possible if the hardware
1694	 * is gone (invalid).
1695	 */
1696	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1697	callout_stop(&sc->malo_watchdog_timer);
1698	sc->malo_timer = 0;
1699	/* diable interrupt.  */
1700	malo_hal_intrset(mh, 0);
1701	/* turn off the radio.  */
1702	malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1703
1704	/* drain and release tx queues.  */
1705	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1706		malo_tx_draintxq(sc, &sc->malo_txq[i]);
1707}
1708
1709static int
1710malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1711{
1712#define	MALO_IS_RUNNING(ifp) \
1713	((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
1714	struct malo_softc *sc = ifp->if_softc;
1715	struct ieee80211com *ic = ifp->if_l2com;
1716	struct ifreq *ifr = (struct ifreq *) data;
1717	int error = 0, startall = 0;
1718
1719	MALO_LOCK(sc);
1720	switch (cmd) {
1721	case SIOCSIFFLAGS:
1722		if (MALO_IS_RUNNING(ifp)) {
1723			/*
1724			 * To avoid rescanning another access point,
1725			 * do not call malo_init() here.  Instead,
1726			 * only reflect promisc mode settings.
1727			 */
1728			malo_mode_init(sc);
1729		} else if (ifp->if_flags & IFF_UP) {
1730			/*
1731			 * Beware of being called during attach/detach
1732			 * to reset promiscuous mode.  In that case we
1733			 * will still be marked UP but not RUNNING.
1734			 * However trying to re-init the interface
1735			 * is the wrong thing to do as we've already
1736			 * torn down much of our state.  There's
1737			 * probably a better way to deal with this.
1738			 */
1739			if (!sc->malo_invalid) {
1740				malo_init_locked(sc);
1741				startall = 1;
1742			}
1743		} else
1744			malo_stop_locked(ifp, 1);
1745		break;
1746	case SIOCGIFMEDIA:
1747	case SIOCSIFMEDIA:
1748		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1749		break;
1750	default:
1751		error = ether_ioctl(ifp, cmd, data);
1752		break;
1753	}
1754	MALO_UNLOCK(sc);
1755
1756	if (startall)
1757		ieee80211_start_all(ic);
1758	return error;
1759#undef MALO_IS_RUNNING
1760}
1761
1762/*
1763 * Callback from the 802.11 layer to update the slot time
1764 * based on the current setting.  We use it to notify the
1765 * firmware of ERP changes and the f/w takes care of things
1766 * like slot time and preamble.
1767 */
1768static void
1769malo_updateslot(struct ifnet *ifp)
1770{
1771	struct malo_softc *sc = ifp->if_softc;
1772	struct ieee80211com *ic = ifp->if_l2com;
1773	struct malo_hal *mh = sc->malo_mh;
1774	int error;
1775
1776	/* NB: can be called early; suppress needless cmds */
1777	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1778		return;
1779
1780	DPRINTF(sc, MALO_DEBUG_RESET,
1781	    "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1782	    __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1783	    ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1784
1785	if (ic->ic_flags & IEEE80211_F_SHSLOT)
1786		error = malo_hal_set_slot(mh, 1);
1787	else
1788		error = malo_hal_set_slot(mh, 0);
1789
1790	if (error != 0)
1791		device_printf(sc->malo_dev, "setting %s slot failed\n",
1792			ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1793}
1794
1795static int
1796malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1797{
1798	struct ieee80211com *ic = vap->iv_ic;
1799	struct malo_softc *sc = ic->ic_ifp->if_softc;
1800	struct malo_hal *mh = sc->malo_mh;
1801	int error;
1802
1803	DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1804	    ieee80211_state_name[vap->iv_state],
1805	    ieee80211_state_name[nstate]);
1806
1807	/*
1808	 * Invoke the net80211 layer first so iv_bss is setup.
1809	 */
1810	error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1811	if (error != 0)
1812		return error;
1813
1814	if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1815		struct ieee80211_node *ni = vap->iv_bss;
1816		enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1817		const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1818
1819		DPRINTF(sc, MALO_DEBUG_STATE,
1820		    "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1821		    "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1822		    vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1823		    ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1824		    ieee80211_chan2ieee(ic, ic->ic_curchan),
1825		    ni->ni_associd, mode, tp->ucastrate);
1826
1827		malo_hal_setradio(mh, 1,
1828		    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1829			MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1830		malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1831		malo_hal_set_rate(mh, mode,
1832		   tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1833		       0 : malo_fix2rate(tp->ucastrate));
1834	}
1835	return 0;
1836}
1837
1838static int
1839malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1840	const struct ieee80211_bpf_params *params)
1841{
1842	struct ieee80211com *ic = ni->ni_ic;
1843	struct ifnet *ifp = ic->ic_ifp;
1844	struct malo_softc *sc = ifp->if_softc;
1845	struct malo_txbuf *bf;
1846	struct malo_txq *txq;
1847
1848	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) {
1849		ieee80211_free_node(ni);
1850		m_freem(m);
1851		return ENETDOWN;
1852	}
1853
1854	/*
1855	 * Grab a TX buffer and associated resources.  Note that we depend
1856	 * on the classification by the 802.11 layer to get to the right h/w
1857	 * queue.  Management frames must ALWAYS go on queue 1 but we
1858	 * cannot just force that here because we may receive non-mgt frames.
1859	 */
1860	txq = &sc->malo_txq[0];
1861	bf = malo_getbuf(sc, txq);
1862	if (bf == NULL) {
1863		/* XXX blocks other traffic */
1864		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1865		ieee80211_free_node(ni);
1866		m_freem(m);
1867		return ENOBUFS;
1868	}
1869
1870	/*
1871	 * Pass the frame to the h/w for transmission.
1872	 */
1873	if (malo_tx_start(sc, ni, bf, m) != 0) {
1874		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1875		bf->bf_m = NULL;
1876		bf->bf_node = NULL;
1877		MALO_TXQ_LOCK(txq);
1878		STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1879		txq->nfree++;
1880		MALO_TXQ_UNLOCK(txq);
1881
1882		ieee80211_free_node(ni);
1883		return EIO;		/* XXX */
1884	}
1885
1886	/*
1887	 * NB: We don't need to lock against tx done because this just
1888	 * prods the firmware to check the transmit descriptors.  The firmware
1889	 * will also start fetching descriptors by itself if it notices
1890	 * new ones are present when it goes to deliver a tx done interrupt
1891	 * to the host. So if we race with tx done processing it's ok.
1892	 * Delivering the kick here rather than in malo_tx_start is
1893	 * an optimization to avoid poking the firmware for each packet.
1894	 *
1895	 * NB: the queue id isn't used so 0 is ok.
1896	 */
1897	malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1898
1899	return 0;
1900}
1901
1902static void
1903malo_sysctlattach(struct malo_softc *sc)
1904{
1905#ifdef	MALO_DEBUG
1906	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1907	struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1908
1909	sc->malo_debug = malo_debug;
1910	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1911		"debug", CTLFLAG_RW, &sc->malo_debug, 0,
1912		"control debugging printfs");
1913#endif
1914}
1915
1916static void
1917malo_announce(struct malo_softc *sc)
1918{
1919	struct ifnet *ifp = sc->malo_ifp;
1920
1921	if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1922		sc->malo_hwspecs.hwversion,
1923		(sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1924		(sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1925		(sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1926		(sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1927		sc->malo_hwspecs.regioncode);
1928
1929	if (bootverbose || malo_rxbuf != MALO_RXBUF)
1930		if_printf(ifp, "using %u rx buffers\n", malo_rxbuf);
1931	if (bootverbose || malo_txbuf != MALO_TXBUF)
1932		if_printf(ifp, "using %u tx buffers\n", malo_txbuf);
1933}
1934
1935/*
1936 * Convert net80211 channel to a HAL channel.
1937 */
1938static void
1939malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1940{
1941	hc->channel = chan->ic_ieee;
1942
1943	*(uint32_t *)&hc->flags = 0;
1944	if (IEEE80211_IS_CHAN_2GHZ(chan))
1945		hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1946}
1947
1948/*
1949 * Set/change channels.  If the channel is really being changed,
1950 * it's done by reseting the chip.  To accomplish this we must
1951 * first cleanup any pending DMA, then restart stuff after a la
1952 * malo_init.
1953 */
1954static int
1955malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1956{
1957	struct malo_hal *mh = sc->malo_mh;
1958	struct malo_hal_channel hchan;
1959
1960	DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1961	    __func__, chan->ic_freq, chan->ic_flags);
1962
1963	/*
1964	 * Convert to a HAL channel description with the flags constrained
1965	 * to reflect the current operating mode.
1966	 */
1967	malo_mapchan(&hchan, chan);
1968	malo_hal_intrset(mh, 0);		/* disable interrupts */
1969	malo_hal_setchannel(mh, &hchan);
1970	malo_hal_settxpower(mh, &hchan);
1971
1972	/*
1973	 * Update internal state.
1974	 */
1975	sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1976	sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1977	if (IEEE80211_IS_CHAN_ANYG(chan)) {
1978		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1979		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1980	} else {
1981		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1982		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1983	}
1984	sc->malo_curchan = hchan;
1985	malo_hal_intrset(mh, sc->malo_imask);
1986
1987	return 0;
1988}
1989
1990static void
1991malo_scan_start(struct ieee80211com *ic)
1992{
1993	struct ifnet *ifp = ic->ic_ifp;
1994	struct malo_softc *sc = ifp->if_softc;
1995
1996	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1997}
1998
1999static void
2000malo_scan_end(struct ieee80211com *ic)
2001{
2002	struct ifnet *ifp = ic->ic_ifp;
2003	struct malo_softc *sc = ifp->if_softc;
2004
2005	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2006}
2007
2008static void
2009malo_set_channel(struct ieee80211com *ic)
2010{
2011	struct ifnet *ifp = ic->ic_ifp;
2012	struct malo_softc *sc = ifp->if_softc;
2013
2014	(void) malo_chan_set(sc, ic->ic_curchan);
2015}
2016
2017static void
2018malo_rx_proc(void *arg, int npending)
2019{
2020#define	IEEE80211_DIR_DSTODS(wh)					\
2021	((((const struct ieee80211_frame *)wh)->i_fc[1] &		\
2022	    IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
2023	struct malo_softc *sc = arg;
2024	struct ifnet *ifp = sc->malo_ifp;
2025	struct ieee80211com *ic = ifp->if_l2com;
2026	struct malo_rxbuf *bf;
2027	struct malo_rxdesc *ds;
2028	struct mbuf *m, *mnew;
2029	struct ieee80211_qosframe *wh;
2030	struct ieee80211_qosframe_addr4 *wh4;
2031	struct ieee80211_node *ni;
2032	int off, len, hdrlen, pktlen, rssi, ntodo;
2033	uint8_t *data, status;
2034	uint32_t readptr, writeptr;
2035
2036	DPRINTF(sc, MALO_DEBUG_RX_PROC,
2037	    "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
2038	    __func__, npending,
2039	    sc->malo_hwspecs.rxdesc_read,
2040	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
2041	    sc->malo_hwspecs.rxdesc_write,
2042	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
2043
2044	readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
2045	writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
2046	if (readptr == writeptr)
2047		return;
2048
2049	bf = sc->malo_rxnext;
2050	for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
2051		if (bf == NULL) {
2052			bf = STAILQ_FIRST(&sc->malo_rxbuf);
2053			break;
2054		}
2055		ds = bf->bf_desc;
2056		if (bf->bf_m == NULL) {
2057			/*
2058			 * If data allocation failed previously there
2059			 * will be no buffer; try again to re-populate it.
2060			 * Note the firmware will not advance to the next
2061			 * descriptor with a dma buffer so we must mimic
2062			 * this or we'll get out of sync.
2063			 */
2064			DPRINTF(sc, MALO_DEBUG_ANY,
2065			    "%s: rx buf w/o dma memory\n", __func__);
2066			(void)malo_rxbuf_init(sc, bf);
2067			break;
2068		}
2069		MALO_RXDESC_SYNC(sc, ds,
2070		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2071		if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
2072			break;
2073
2074		readptr = le32toh(ds->physnext);
2075
2076#ifdef MALO_DEBUG
2077		if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
2078			malo_printrxbuf(bf, 0);
2079#endif
2080		status = ds->status;
2081		if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
2082			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
2083			goto rx_next;
2084		}
2085		/*
2086		 * Sync the data buffer.
2087		 */
2088		len = le16toh(ds->pktlen);
2089		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2090		    BUS_DMASYNC_POSTREAD);
2091		/*
2092		 * The 802.11 header is provided all or in part at the front;
2093		 * use it to calculate the true size of the header that we'll
2094		 * construct below.  We use this to figure out where to copy
2095		 * payload prior to constructing the header.
2096		 */
2097		m = bf->bf_m;
2098		data = mtod(m, uint8_t *);
2099		hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2100		off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2101
2102		/*
2103		 * Calculate RSSI. XXX wrong
2104		 */
2105		rssi = 2 * ((int) ds->snr - ds->nf);	/* NB: .5 dBm  */
2106		if (rssi > 100)
2107			rssi = 100;
2108
2109		pktlen = hdrlen + (len - off);
2110		/*
2111		 * NB: we know our frame is at least as large as
2112		 * IEEE80211_MIN_LEN because there is a 4-address frame at
2113		 * the front.  Hence there's no need to vet the packet length.
2114		 * If the frame in fact is too small it should be discarded
2115		 * at the net80211 layer.
2116		 */
2117
2118		/* XXX don't need mbuf, just dma buffer */
2119		mnew = malo_getrxmbuf(sc, bf);
2120		if (mnew == NULL) {
2121			if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
2122			goto rx_next;
2123		}
2124		/*
2125		 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2126		 * re-setup the rx descriptor using the replacement dma
2127		 * buffer we just installed above.
2128		 */
2129		bf->bf_m = mnew;
2130		m->m_data += off - hdrlen;
2131		m->m_pkthdr.len = m->m_len = pktlen;
2132		m->m_pkthdr.rcvif = ifp;
2133
2134		/*
2135		 * Piece 802.11 header together.
2136		 */
2137		wh = mtod(m, struct ieee80211_qosframe *);
2138		/* NB: don't need to do this sometimes but ... */
2139		/* XXX special case so we can memcpy after m_devget? */
2140		ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2141		if (IEEE80211_QOS_HAS_SEQ(wh)) {
2142			if (IEEE80211_DIR_DSTODS(wh)) {
2143				wh4 = mtod(m,
2144				    struct ieee80211_qosframe_addr4*);
2145				*(uint16_t *)wh4->i_qos = ds->qosctrl;
2146			} else {
2147				*(uint16_t *)wh->i_qos = ds->qosctrl;
2148			}
2149		}
2150		if (ieee80211_radiotap_active(ic)) {
2151			sc->malo_rx_th.wr_flags = 0;
2152			sc->malo_rx_th.wr_rate = ds->rate;
2153			sc->malo_rx_th.wr_antsignal = rssi;
2154			sc->malo_rx_th.wr_antnoise = ds->nf;
2155		}
2156#ifdef MALO_DEBUG
2157		if (IFF_DUMPPKTS_RECV(sc, wh)) {
2158			ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2159			    len, ds->rate, rssi);
2160		}
2161#endif
2162		if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
2163
2164		/* dispatch */
2165		ni = ieee80211_find_rxnode(ic,
2166		    (struct ieee80211_frame_min *)wh);
2167		if (ni != NULL) {
2168			(void) ieee80211_input(ni, m, rssi, ds->nf);
2169			ieee80211_free_node(ni);
2170		} else
2171			(void) ieee80211_input_all(ic, m, rssi, ds->nf);
2172rx_next:
2173		/* NB: ignore ENOMEM so we process more descriptors */
2174		(void) malo_rxbuf_init(sc, bf);
2175		bf = STAILQ_NEXT(bf, bf_list);
2176	}
2177
2178	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2179	sc->malo_rxnext = bf;
2180
2181	if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2182	    !IFQ_IS_EMPTY(&ifp->if_snd))
2183		malo_start(ifp);
2184#undef IEEE80211_DIR_DSTODS
2185}
2186
2187static void
2188malo_stop(struct ifnet *ifp, int disable)
2189{
2190	struct malo_softc *sc = ifp->if_softc;
2191
2192	MALO_LOCK(sc);
2193	malo_stop_locked(ifp, disable);
2194	MALO_UNLOCK(sc);
2195}
2196
2197/*
2198 * Reclaim all tx queue resources.
2199 */
2200static void
2201malo_tx_cleanup(struct malo_softc *sc)
2202{
2203	int i;
2204
2205	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2206		malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2207}
2208
2209int
2210malo_detach(struct malo_softc *sc)
2211{
2212	struct ifnet *ifp = sc->malo_ifp;
2213	struct ieee80211com *ic = ifp->if_l2com;
2214
2215	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2216		__func__, ifp->if_flags);
2217
2218	malo_stop(ifp, 1);
2219
2220	if (sc->malo_tq != NULL) {
2221		taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2222		taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2223		taskqueue_free(sc->malo_tq);
2224		sc->malo_tq = NULL;
2225	}
2226
2227	/*
2228	 * NB: the order of these is important:
2229	 * o call the 802.11 layer before detaching the hal to
2230	 *   insure callbacks into the driver to delete global
2231	 *   key cache entries can be handled
2232	 * o reclaim the tx queue data structures after calling
2233	 *   the 802.11 layer as we'll get called back to reclaim
2234	 *   node state and potentially want to use them
2235	 * o to cleanup the tx queues the hal is called, so detach
2236	 *   it last
2237	 * Other than that, it's straightforward...
2238	 */
2239	ieee80211_ifdetach(ic);
2240	callout_drain(&sc->malo_watchdog_timer);
2241	malo_dma_cleanup(sc);
2242	malo_tx_cleanup(sc);
2243	malo_hal_detach(sc->malo_mh);
2244	if_free(ifp);
2245
2246	MALO_LOCK_DESTROY(sc);
2247
2248	return 0;
2249}
2250
2251void
2252malo_shutdown(struct malo_softc *sc)
2253{
2254	malo_stop(sc->malo_ifp, 1);
2255}
2256
2257void
2258malo_suspend(struct malo_softc *sc)
2259{
2260	struct ifnet *ifp = sc->malo_ifp;
2261
2262	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2263		__func__, ifp->if_flags);
2264
2265	malo_stop(ifp, 1);
2266}
2267
2268void
2269malo_resume(struct malo_softc *sc)
2270{
2271	struct ifnet *ifp = sc->malo_ifp;
2272
2273	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2274		__func__, ifp->if_flags);
2275
2276	if (ifp->if_flags & IFF_UP)
2277		malo_init(sc);
2278}
2279