if_malo.c revision 257176
1177595Sweongyo/*-
2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc.
4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting
5177595Sweongyo * All rights reserved.
6177595Sweongyo *
7177595Sweongyo * Redistribution and use in source and binary forms, with or without
8177595Sweongyo * modification, are permitted provided that the following conditions
9177595Sweongyo * are met:
10177595Sweongyo * 1. Redistributions of source code must retain the above copyright
11177595Sweongyo *    notice, this list of conditions and the following disclaimer,
12177595Sweongyo *    without modification.
13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14177595Sweongyo *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15177595Sweongyo *    redistribution must be conditioned upon including a substantially
16177595Sweongyo *    similar Disclaimer requirement for further binary redistribution.
17177595Sweongyo *
18177595Sweongyo * NO WARRANTY
19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES.
30177595Sweongyo */
31177595Sweongyo
32177595Sweongyo#include <sys/cdefs.h>
33177595Sweongyo#ifdef __FreeBSD__
34177595Sweongyo__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 257176 2013-10-26 17:58:36Z glebius $");
35177595Sweongyo#endif
36177595Sweongyo
37178354Ssam#include "opt_malo.h"
38178354Ssam
39177595Sweongyo#include <sys/param.h>
40177595Sweongyo#include <sys/endian.h>
41177595Sweongyo#include <sys/kernel.h>
42177595Sweongyo#include <sys/socket.h>
43177595Sweongyo#include <sys/sockio.h>
44177595Sweongyo#include <sys/sysctl.h>
45177595Sweongyo#include <sys/taskqueue.h>
46177595Sweongyo
47177595Sweongyo#include <machine/bus.h>
48177595Sweongyo#include <sys/bus.h>
49177595Sweongyo
50177595Sweongyo#include <net/if.h>
51257176Sglebius#include <net/if_var.h>
52177595Sweongyo#include <net/if_dl.h>
53177595Sweongyo#include <net/if_media.h>
54177595Sweongyo#include <net/if_types.h>
55177595Sweongyo#include <net/ethernet.h>
56177595Sweongyo
57177595Sweongyo#include <net80211/ieee80211_var.h>
58177595Sweongyo#include <net80211/ieee80211_regdomain.h>
59177595Sweongyo
60177595Sweongyo#include <net/bpf.h>
61177595Sweongyo
62177595Sweongyo#include <dev/malo/if_malo.h>
63177595Sweongyo
64177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0,
65177595Sweongyo    "Marvell 88w8335 driver parameters");
66177595Sweongyo
67177595Sweongyostatic	int malo_txcoalesce = 8;	/* # tx pkts to q before poking f/w*/
68177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce,
69177595Sweongyo	    0, "tx buffers to send at once");
70177595SweongyoTUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce);
71177595Sweongyostatic	int malo_rxbuf = MALO_RXBUF;		/* # rx buffers to allocate */
72177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf,
73177595Sweongyo	    0, "rx buffers allocated");
74177595SweongyoTUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf);
75177595Sweongyostatic	int malo_rxquota = MALO_RXBUF;		/* # max buffers to process */
76177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota,
77177595Sweongyo	    0, "max rx buffers to process per interrupt");
78177595SweongyoTUNABLE_INT("hw.malo.rxquota", &malo_rxquota);
79177595Sweongyostatic	int malo_txbuf = MALO_TXBUF;		/* # tx buffers to allocate */
80177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf,
81177595Sweongyo	    0, "tx buffers allocated");
82177595SweongyoTUNABLE_INT("hw.malo.txbuf", &malo_txbuf);
83177595Sweongyo
84177595Sweongyo#ifdef MALO_DEBUG
85177595Sweongyostatic	int malo_debug = 0;
86177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug,
87177595Sweongyo	    0, "control debugging printfs");
88177595SweongyoTUNABLE_INT("hw.malo.debug", &malo_debug);
89177595Sweongyoenum {
90177595Sweongyo	MALO_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
91177595Sweongyo	MALO_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
92177595Sweongyo	MALO_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
93177595Sweongyo	MALO_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
94177595Sweongyo	MALO_DEBUG_RESET	= 0x00000010,	/* reset processing */
95177595Sweongyo	MALO_DEBUG_INTR		= 0x00000040,	/* ISR */
96177595Sweongyo	MALO_DEBUG_TX_PROC	= 0x00000080,	/* tx ISR proc */
97177595Sweongyo	MALO_DEBUG_RX_PROC	= 0x00000100,	/* rx ISR proc */
98177595Sweongyo	MALO_DEBUG_STATE	= 0x00000400,	/* 802.11 state transitions */
99177595Sweongyo	MALO_DEBUG_NODE		= 0x00000800,	/* node management */
100177595Sweongyo	MALO_DEBUG_RECV_ALL	= 0x00001000,	/* trace all frames (beacons) */
101177595Sweongyo	MALO_DEBUG_FW		= 0x00008000,	/* firmware */
102177595Sweongyo	MALO_DEBUG_ANY		= 0xffffffff
103177595Sweongyo};
104177595Sweongyo#define	IS_BEACON(wh)							\
105177595Sweongyo	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK |			\
106177595Sweongyo		IEEE80211_FC0_SUBTYPE_MASK)) ==				\
107177595Sweongyo	 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
108177595Sweongyo#define	IFF_DUMPPKTS_RECV(sc, wh)					\
109177595Sweongyo	(((sc->malo_debug & MALO_DEBUG_RECV) &&				\
110177595Sweongyo	  ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \
111177595Sweongyo	 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) ==		\
112177595Sweongyo	  (IFF_DEBUG|IFF_LINK2))
113177595Sweongyo#define	IFF_DUMPPKTS_XMIT(sc)						\
114177595Sweongyo	((sc->malo_debug & MALO_DEBUG_XMIT) ||				\
115177595Sweongyo	 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) ==		\
116177595Sweongyo	     (IFF_DEBUG | IFF_LINK2))
117177595Sweongyo#define	DPRINTF(sc, m, fmt, ...) do {				\
118177595Sweongyo	if (sc->malo_debug & (m))				\
119177595Sweongyo		printf(fmt, __VA_ARGS__);			\
120177595Sweongyo} while (0)
121177595Sweongyo#else
122177595Sweongyo#define	DPRINTF(sc, m, fmt, ...) do {				\
123177595Sweongyo	(void) sc;						\
124177595Sweongyo} while (0)
125177595Sweongyo#endif
126177595Sweongyo
127227293Sedstatic MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
128177595Sweongyo
129228621Sbschmidtstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *,
130228621Sbschmidt		    const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
131228621Sbschmidt		    const uint8_t [IEEE80211_ADDR_LEN],
132228621Sbschmidt		    const uint8_t [IEEE80211_ADDR_LEN]);
133178354Ssamstatic  void	malo_vap_delete(struct ieee80211vap *);
134177595Sweongyostatic	int	malo_dma_setup(struct malo_softc *);
135177595Sweongyostatic	int	malo_setup_hwdma(struct malo_softc *);
136177595Sweongyostatic	void	malo_txq_init(struct malo_softc *, struct malo_txq *, int);
137177595Sweongyostatic	void	malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
138177595Sweongyostatic	void	malo_start(struct ifnet *);
139199559Sjhbstatic	void	malo_watchdog(void *);
140177595Sweongyostatic	int	malo_ioctl(struct ifnet *, u_long, caddr_t);
141177595Sweongyostatic	void	malo_updateslot(struct ifnet *);
142178354Ssamstatic	int	malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
143177595Sweongyostatic	void	malo_scan_start(struct ieee80211com *);
144177595Sweongyostatic	void	malo_scan_end(struct ieee80211com *);
145177595Sweongyostatic	void	malo_set_channel(struct ieee80211com *);
146177595Sweongyostatic	int	malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
147177595Sweongyo		    const struct ieee80211_bpf_params *);
148177595Sweongyostatic	void	malo_sysctlattach(struct malo_softc *);
149177595Sweongyostatic	void	malo_announce(struct malo_softc *);
150177595Sweongyostatic	void	malo_dma_cleanup(struct malo_softc *);
151177595Sweongyostatic	void	malo_stop_locked(struct ifnet *, int);
152177595Sweongyostatic	int	malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
153177595Sweongyostatic	int	malo_mode_init(struct malo_softc *);
154177595Sweongyostatic	void	malo_tx_proc(void *, int);
155177595Sweongyostatic	void	malo_rx_proc(void *, int);
156177595Sweongyostatic	void	malo_init(void *);
157177595Sweongyo
158177595Sweongyo/*
159177595Sweongyo * Read/Write shorthands for accesses to BAR 0.  Note that all BAR 1
160177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at
161177595Sweongyo * malo_attach and there should be no reference to them here.
162177595Sweongyo */
163177595Sweongyostatic uint32_t
164177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off)
165177595Sweongyo{
166177595Sweongyo	return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
167177595Sweongyo}
168177595Sweongyo
169177595Sweongyostatic void
170177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
171177595Sweongyo{
172205843Simp	DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
173205843Simp	    __func__, (intmax_t)off, val);
174177595Sweongyo
175177595Sweongyo	bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
176177595Sweongyo}
177177595Sweongyo
178177595Sweongyoint
179177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc)
180177595Sweongyo{
181190526Ssam	int error;
182178354Ssam	struct ieee80211com *ic;
183177595Sweongyo	struct ifnet *ifp;
184177595Sweongyo	struct malo_hal *mh;
185177595Sweongyo	uint8_t bands;
186177595Sweongyo
187178354Ssam	ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211);
188177595Sweongyo	if (ifp == NULL) {
189177595Sweongyo		device_printf(sc->malo_dev, "can not if_alloc()\n");
190177595Sweongyo		return ENOSPC;
191177595Sweongyo	}
192178354Ssam	ic = ifp->if_l2com;
193177595Sweongyo
194177595Sweongyo	MALO_LOCK_INIT(sc);
195199559Sjhb	callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
196177595Sweongyo
197177595Sweongyo	/* set these up early for if_printf use */
198177595Sweongyo	if_initname(ifp, device_get_name(sc->malo_dev),
199177595Sweongyo	    device_get_unit(sc->malo_dev));
200177595Sweongyo
201177595Sweongyo	mh = malo_hal_attach(sc->malo_dev, devid,
202177595Sweongyo	    sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
203177595Sweongyo	if (mh == NULL) {
204177595Sweongyo		if_printf(ifp, "unable to attach HAL\n");
205177595Sweongyo		error = EIO;
206177595Sweongyo		goto bad;
207177595Sweongyo	}
208177595Sweongyo	sc->malo_mh = mh;
209177595Sweongyo
210178354Ssam	/*
211178354Ssam	 * Load firmware so we can get setup.  We arbitrarily pick station
212178354Ssam	 * firmware; we'll re-load firmware as needed so setting up
213178354Ssam	 * the wrong mode isn't a big deal.
214178354Ssam	 */
215178354Ssam	error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
216178354Ssam	if (error != 0) {
217178354Ssam		if_printf(ifp, "unable to setup firmware\n");
218178354Ssam		goto bad1;
219178354Ssam	}
220178354Ssam	/* XXX gethwspecs() extracts correct informations?  not maybe!  */
221178354Ssam	error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
222178354Ssam	if (error != 0) {
223178354Ssam		if_printf(ifp, "unable to fetch h/w specs\n");
224178354Ssam		goto bad1;
225178354Ssam	}
226178354Ssam
227178354Ssam	DPRINTF(sc, MALO_DEBUG_FW,
228178354Ssam	    "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
229178354Ssam	    "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
230178354Ssam	    "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
231178354Ssam	    "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
232178354Ssam	    "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
233178354Ssam	    sc->malo_hwspecs.hwversion,
234178354Ssam	    sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
235178354Ssam	    sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
236178354Ssam	    sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
237178354Ssam	    sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
238178354Ssam	    sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
239178354Ssam	    sc->malo_hwspecs.ul_fw_awakecookie,
240178354Ssam	    sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
241178354Ssam	    sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
242178354Ssam
243178354Ssam	/* NB: firmware looks that it does not export regdomain info API.  */
244178354Ssam	bands = 0;
245178354Ssam	setbit(&bands, IEEE80211_MODE_11B);
246178354Ssam	setbit(&bands, IEEE80211_MODE_11G);
247178354Ssam	ieee80211_init_channels(ic, NULL, &bands);
248178354Ssam
249177595Sweongyo	sc->malo_txantenna = 0x2;	/* h/w default */
250177595Sweongyo	sc->malo_rxantenna = 0xffff;	/* h/w default */
251177595Sweongyo
252177595Sweongyo	/*
253177595Sweongyo	 * Allocate tx + rx descriptors and populate the lists.
254177595Sweongyo	 * We immediately push the information to the firmware
255177595Sweongyo	 * as otherwise it gets upset.
256177595Sweongyo	 */
257177595Sweongyo	error = malo_dma_setup(sc);
258177595Sweongyo	if (error != 0) {
259177595Sweongyo		if_printf(ifp, "failed to setup descriptors: %d\n", error);
260177595Sweongyo		goto bad1;
261177595Sweongyo	}
262178354Ssam	error = malo_setup_hwdma(sc);	/* push to firmware */
263178354Ssam	if (error != 0)			/* NB: malo_setupdma prints msg */
264190552Sweongyo		goto bad2;
265177595Sweongyo
266177595Sweongyo	sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
267177595Sweongyo		taskqueue_thread_enqueue, &sc->malo_tq);
268177595Sweongyo	taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
269177595Sweongyo		"%s taskq", ifp->if_xname);
270177595Sweongyo
271177595Sweongyo	TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
272177595Sweongyo	TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
273177595Sweongyo
274177595Sweongyo	ifp->if_softc = sc;
275177595Sweongyo	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
276177595Sweongyo	ifp->if_start = malo_start;
277177595Sweongyo	ifp->if_ioctl = malo_ioctl;
278177595Sweongyo	ifp->if_init = malo_init;
279207554Ssobomax	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
280207554Ssobomax	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
281177595Sweongyo	IFQ_SET_READY(&ifp->if_snd);
282177595Sweongyo
283177595Sweongyo	ic->ic_ifp = ifp;
284177595Sweongyo	/* XXX not right but it's not used anywhere important */
285177595Sweongyo	ic->ic_phytype = IEEE80211_T_OFDM;
286177595Sweongyo	ic->ic_opmode = IEEE80211_M_STA;
287177595Sweongyo	ic->ic_caps =
288178957Ssam	      IEEE80211_C_STA			/* station mode supported */
289178957Ssam	    | IEEE80211_C_BGSCAN		/* capable of bg scanning */
290177595Sweongyo	    | IEEE80211_C_MONITOR		/* monitor mode */
291177595Sweongyo	    | IEEE80211_C_SHPREAMBLE		/* short preamble supported */
292177595Sweongyo	    | IEEE80211_C_SHSLOT		/* short slot time supported */
293177595Sweongyo	    | IEEE80211_C_TXPMGT		/* capable of txpow mgt */
294177595Sweongyo	    | IEEE80211_C_WPA			/* capable of WPA1+WPA2 */
295177595Sweongyo	    ;
296177595Sweongyo
297177595Sweongyo	/*
298177595Sweongyo	 * Transmit requires space in the packet for a special format transmit
299177595Sweongyo	 * record and optional padding between this record and the payload.
300177595Sweongyo	 * Ask the net80211 layer to arrange this when encapsulating
301177595Sweongyo	 * packets so we can add it efficiently.
302177595Sweongyo	 */
303177595Sweongyo	ic->ic_headroom = sizeof(struct malo_txrec) -
304178354Ssam		sizeof(struct ieee80211_frame);
305177595Sweongyo
306177595Sweongyo	/* call MI attach routine. */
307190526Ssam	ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr);
308177595Sweongyo	/* override default methods */
309178354Ssam	ic->ic_vap_create = malo_vap_create;
310178354Ssam	ic->ic_vap_delete = malo_vap_delete;
311178354Ssam	ic->ic_raw_xmit = malo_raw_xmit;
312177595Sweongyo	ic->ic_updateslot = malo_updateslot;
313177595Sweongyo
314177595Sweongyo	ic->ic_scan_start = malo_scan_start;
315177595Sweongyo	ic->ic_scan_end = malo_scan_end;
316177595Sweongyo	ic->ic_set_channel = malo_set_channel;
317177595Sweongyo
318177595Sweongyo	sc->malo_invalid = 0;		/* ready to go, enable int handling */
319177595Sweongyo
320192468Ssam	ieee80211_radiotap_attach(ic,
321192468Ssam	    &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
322192468Ssam		MALO_TX_RADIOTAP_PRESENT,
323192468Ssam	    &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
324192468Ssam		MALO_RX_RADIOTAP_PRESENT);
325177595Sweongyo
326177595Sweongyo	/*
327177595Sweongyo	 * Setup dynamic sysctl's.
328177595Sweongyo	 */
329177595Sweongyo	malo_sysctlattach(sc);
330177595Sweongyo
331177595Sweongyo	if (bootverbose)
332177595Sweongyo		ieee80211_announce(ic);
333178354Ssam	malo_announce(sc);
334177595Sweongyo
335177595Sweongyo	return 0;
336190552Sweongyobad2:
337190552Sweongyo	malo_dma_cleanup(sc);
338177595Sweongyobad1:
339177595Sweongyo	malo_hal_detach(mh);
340177595Sweongyobad:
341177595Sweongyo	if_free(ifp);
342177595Sweongyo	sc->malo_invalid = 1;
343177595Sweongyo
344177595Sweongyo	return error;
345177595Sweongyo}
346177595Sweongyo
347178354Ssamstatic struct ieee80211vap *
348228621Sbschmidtmalo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
349228621Sbschmidt    enum ieee80211_opmode opmode, int flags,
350228621Sbschmidt    const uint8_t bssid[IEEE80211_ADDR_LEN],
351228621Sbschmidt    const uint8_t mac[IEEE80211_ADDR_LEN])
352178354Ssam{
353178354Ssam	struct ifnet *ifp = ic->ic_ifp;
354178354Ssam	struct malo_vap *mvp;
355178354Ssam	struct ieee80211vap *vap;
356178354Ssam
357178354Ssam	if (!TAILQ_EMPTY(&ic->ic_vaps)) {
358178354Ssam		if_printf(ifp, "multiple vaps not supported\n");
359178354Ssam		return NULL;
360178354Ssam	}
361178354Ssam	switch (opmode) {
362178354Ssam	case IEEE80211_M_STA:
363178354Ssam		if (opmode == IEEE80211_M_STA)
364178354Ssam			flags |= IEEE80211_CLONE_NOBEACONS;
365178354Ssam		/* fall thru... */
366178354Ssam	case IEEE80211_M_MONITOR:
367178354Ssam		break;
368178354Ssam	default:
369178354Ssam		if_printf(ifp, "%s mode not supported\n",
370178354Ssam		    ieee80211_opmode_name[opmode]);
371178354Ssam		return NULL;		/* unsupported */
372178354Ssam	}
373178354Ssam	mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap),
374178354Ssam	    M_80211_VAP, M_NOWAIT | M_ZERO);
375178354Ssam	if (mvp == NULL) {
376178354Ssam		if_printf(ifp, "cannot allocate vap state block\n");
377178354Ssam		return NULL;
378178354Ssam	}
379178354Ssam	vap = &mvp->malo_vap;
380178354Ssam	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
381178354Ssam
382178354Ssam	/* override state transition machine */
383178354Ssam	mvp->malo_newstate = vap->iv_newstate;
384178354Ssam	vap->iv_newstate = malo_newstate;
385178354Ssam
386178354Ssam	/* complete setup */
387178354Ssam	ieee80211_vap_attach(vap,
388178354Ssam	    ieee80211_media_change, ieee80211_media_status);
389178354Ssam	ic->ic_opmode = opmode;
390178354Ssam	return vap;
391178354Ssam}
392178354Ssam
393178354Ssamstatic void
394178354Ssammalo_vap_delete(struct ieee80211vap *vap)
395178354Ssam{
396178354Ssam	struct malo_vap *mvp = MALO_VAP(vap);
397178354Ssam
398178354Ssam	ieee80211_vap_detach(vap);
399178354Ssam	free(mvp, M_80211_VAP);
400178354Ssam}
401178354Ssam
402177595Sweongyoint
403177595Sweongyomalo_intr(void *arg)
404177595Sweongyo{
405177595Sweongyo	struct malo_softc *sc = arg;
406177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
407177595Sweongyo	uint32_t status;
408177595Sweongyo
409177595Sweongyo	if (sc->malo_invalid) {
410177595Sweongyo		/*
411177595Sweongyo		 * The hardware is not ready/present, don't touch anything.
412177595Sweongyo		 * Note this can happen early on if the IRQ is shared.
413177595Sweongyo		 */
414177595Sweongyo		DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
415177595Sweongyo		return (FILTER_STRAY);
416177595Sweongyo	}
417177595Sweongyo
418177595Sweongyo	/*
419177595Sweongyo	 * Figure out the reason(s) for the interrupt.
420177595Sweongyo	 */
421177595Sweongyo	malo_hal_getisr(mh, &status);		/* NB: clears ISR too */
422177595Sweongyo	if (status == 0)			/* must be a shared irq */
423177595Sweongyo		return (FILTER_STRAY);
424177595Sweongyo
425177595Sweongyo	DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
426177595Sweongyo	    __func__, status, sc->malo_imask);
427177595Sweongyo
428177595Sweongyo	if (status & MALO_A2HRIC_BIT_RX_RDY)
429177595Sweongyo		taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask);
430177595Sweongyo	if (status & MALO_A2HRIC_BIT_TX_DONE)
431177595Sweongyo		taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask);
432177595Sweongyo	if (status & MALO_A2HRIC_BIT_OPC_DONE)
433177595Sweongyo		malo_hal_cmddone(mh);
434177595Sweongyo	if (status & MALO_A2HRIC_BIT_MAC_EVENT)
435177595Sweongyo		;
436177595Sweongyo	if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
437177595Sweongyo		;
438177595Sweongyo	if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
439177595Sweongyo		/* TKIP ICV error */
440177595Sweongyo		sc->malo_stats.mst_rx_badtkipicv++;
441177595Sweongyo	}
442177595Sweongyo#ifdef MALO_DEBUG
443177595Sweongyo	if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
444177595Sweongyo		DPRINTF(sc, MALO_DEBUG_INTR,
445177595Sweongyo		    "%s: can't handle interrupt status 0x%x\n",
446177595Sweongyo		    __func__, status);
447177595Sweongyo#endif
448177595Sweongyo	return (FILTER_HANDLED);
449177595Sweongyo}
450177595Sweongyo
451177595Sweongyostatic void
452177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
453177595Sweongyo{
454177595Sweongyo	bus_addr_t *paddr = (bus_addr_t*) arg;
455177595Sweongyo
456177595Sweongyo	KASSERT(error == 0, ("error %u on bus_dma callback", error));
457177595Sweongyo
458177595Sweongyo	*paddr = segs->ds_addr;
459177595Sweongyo}
460177595Sweongyo
461177595Sweongyostatic int
462177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name,
463177595Sweongyo    struct malo_descdma *dd,
464177595Sweongyo    int nbuf, size_t bufsize, int ndesc, size_t descsize)
465177595Sweongyo{
466177595Sweongyo	int error;
467177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
468177595Sweongyo	uint8_t *ds;
469177595Sweongyo
470177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET,
471177595Sweongyo	    "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
472177595Sweongyo	    __func__, name, nbuf, (uintmax_t) bufsize,
473177595Sweongyo	    ndesc, (uintmax_t) descsize);
474177595Sweongyo
475177595Sweongyo	dd->dd_name = name;
476177595Sweongyo	dd->dd_desc_len = nbuf * ndesc * descsize;
477177595Sweongyo
478177595Sweongyo	/*
479177595Sweongyo	 * Setup DMA descriptor area.
480177595Sweongyo	 */
481177595Sweongyo	error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
482177595Sweongyo		       PAGE_SIZE, 0,		/* alignment, bounds */
483177595Sweongyo		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
484177595Sweongyo		       BUS_SPACE_MAXADDR,	/* highaddr */
485177595Sweongyo		       NULL, NULL,		/* filter, filterarg */
486177595Sweongyo		       dd->dd_desc_len,		/* maxsize */
487177595Sweongyo		       1,			/* nsegments */
488177595Sweongyo		       dd->dd_desc_len,		/* maxsegsize */
489177595Sweongyo		       BUS_DMA_ALLOCNOW,	/* flags */
490177595Sweongyo		       NULL,			/* lockfunc */
491177595Sweongyo		       NULL,			/* lockarg */
492177595Sweongyo		       &dd->dd_dmat);
493177595Sweongyo	if (error != 0) {
494177595Sweongyo		if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
495177595Sweongyo		return error;
496177595Sweongyo	}
497177595Sweongyo
498177595Sweongyo	/* allocate descriptors */
499177595Sweongyo	error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
500177595Sweongyo	if (error != 0) {
501177595Sweongyo		if_printf(ifp, "unable to create dmamap for %s descriptors, "
502177595Sweongyo		    "error %u\n", dd->dd_name, error);
503177595Sweongyo		goto fail0;
504177595Sweongyo	}
505177595Sweongyo
506177595Sweongyo	error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
507177595Sweongyo	    BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
508177595Sweongyo	if (error != 0) {
509177595Sweongyo		if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
510177595Sweongyo		    "error %u\n", nbuf * ndesc, dd->dd_name, error);
511177595Sweongyo		goto fail1;
512177595Sweongyo	}
513177595Sweongyo
514177595Sweongyo	error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
515177595Sweongyo	    dd->dd_desc, dd->dd_desc_len,
516177595Sweongyo	    malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
517177595Sweongyo	if (error != 0) {
518177595Sweongyo		if_printf(ifp, "unable to map %s descriptors, error %u\n",
519177595Sweongyo		    dd->dd_name, error);
520177595Sweongyo		goto fail2;
521177595Sweongyo	}
522177595Sweongyo
523177595Sweongyo	ds = dd->dd_desc;
524177595Sweongyo	memset(ds, 0, dd->dd_desc_len);
525177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
526177595Sweongyo	    __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
527177595Sweongyo	    (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
528177595Sweongyo
529177595Sweongyo	return 0;
530177595Sweongyofail2:
531177595Sweongyo	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
532177595Sweongyofail1:
533177595Sweongyo	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
534177595Sweongyofail0:
535177595Sweongyo	bus_dma_tag_destroy(dd->dd_dmat);
536177595Sweongyo	memset(dd, 0, sizeof(*dd));
537177595Sweongyo	return error;
538177595Sweongyo}
539177595Sweongyo
540177595Sweongyo#define	DS2PHYS(_dd, _ds) \
541177595Sweongyo	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
542177595Sweongyo
543177595Sweongyostatic int
544177595Sweongyomalo_rxdma_setup(struct malo_softc *sc)
545177595Sweongyo{
546177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
547177595Sweongyo	int error, bsize, i;
548177595Sweongyo	struct malo_rxbuf *bf;
549177595Sweongyo	struct malo_rxdesc *ds;
550177595Sweongyo
551177595Sweongyo	error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
552177595Sweongyo	    malo_rxbuf, sizeof(struct malo_rxbuf),
553177595Sweongyo	    1, sizeof(struct malo_rxdesc));
554177595Sweongyo	if (error != 0)
555177595Sweongyo		return error;
556177595Sweongyo
557177595Sweongyo	/*
558177595Sweongyo	 * Allocate rx buffers and set them up.
559177595Sweongyo	 */
560177595Sweongyo	bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
561177595Sweongyo	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
562177595Sweongyo	if (bf == NULL) {
563177595Sweongyo		if_printf(ifp, "malloc of %u rx buffers failed\n", bsize);
564177595Sweongyo		return error;
565177595Sweongyo	}
566177595Sweongyo	sc->malo_rxdma.dd_bufptr = bf;
567177595Sweongyo
568177595Sweongyo	STAILQ_INIT(&sc->malo_rxbuf);
569177595Sweongyo	ds = sc->malo_rxdma.dd_desc;
570177595Sweongyo	for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
571177595Sweongyo		bf->bf_desc = ds;
572177595Sweongyo		bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
573177595Sweongyo		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
574177595Sweongyo		    &bf->bf_dmamap);
575177595Sweongyo		if (error != 0) {
576177595Sweongyo			if_printf(ifp, "%s: unable to dmamap for rx buffer, "
577177595Sweongyo			    "error %d\n", __func__, error);
578177595Sweongyo			return error;
579177595Sweongyo		}
580177595Sweongyo		/* NB: tail is intentional to preserve descriptor order */
581177595Sweongyo		STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
582177595Sweongyo	}
583177595Sweongyo	return 0;
584177595Sweongyo}
585177595Sweongyo
586177595Sweongyostatic int
587177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
588177595Sweongyo{
589177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
590177595Sweongyo	int error, bsize, i;
591177595Sweongyo	struct malo_txbuf *bf;
592177595Sweongyo	struct malo_txdesc *ds;
593177595Sweongyo
594177595Sweongyo	error = malo_desc_setup(sc, "tx", &txq->dma,
595177595Sweongyo	    malo_txbuf, sizeof(struct malo_txbuf),
596177595Sweongyo	    MALO_TXDESC, sizeof(struct malo_txdesc));
597177595Sweongyo	if (error != 0)
598177595Sweongyo		return error;
599177595Sweongyo
600177595Sweongyo	/* allocate and setup tx buffers */
601177595Sweongyo	bsize = malo_txbuf * sizeof(struct malo_txbuf);
602177595Sweongyo	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
603177595Sweongyo	if (bf == NULL) {
604177595Sweongyo		if_printf(ifp, "malloc of %u tx buffers failed\n",
605177595Sweongyo		    malo_txbuf);
606177595Sweongyo		return ENOMEM;
607177595Sweongyo	}
608177595Sweongyo	txq->dma.dd_bufptr = bf;
609177595Sweongyo
610177595Sweongyo	STAILQ_INIT(&txq->free);
611177595Sweongyo	txq->nfree = 0;
612177595Sweongyo	ds = txq->dma.dd_desc;
613177595Sweongyo	for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
614177595Sweongyo		bf->bf_desc = ds;
615177595Sweongyo		bf->bf_daddr = DS2PHYS(&txq->dma, ds);
616177595Sweongyo		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
617177595Sweongyo		    &bf->bf_dmamap);
618177595Sweongyo		if (error != 0) {
619177595Sweongyo			if_printf(ifp, "unable to create dmamap for tx "
620177595Sweongyo			    "buffer %u, error %u\n", i, error);
621177595Sweongyo			return error;
622177595Sweongyo		}
623177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
624177595Sweongyo		txq->nfree++;
625177595Sweongyo	}
626177595Sweongyo
627177595Sweongyo	return 0;
628177595Sweongyo}
629177595Sweongyo
630177595Sweongyostatic void
631177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
632177595Sweongyo{
633177595Sweongyo	bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
634177595Sweongyo	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
635177595Sweongyo	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
636177595Sweongyo	bus_dma_tag_destroy(dd->dd_dmat);
637177595Sweongyo
638177595Sweongyo	memset(dd, 0, sizeof(*dd));
639177595Sweongyo}
640177595Sweongyo
641177595Sweongyostatic void
642177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc)
643177595Sweongyo{
644177595Sweongyo	struct malo_rxbuf *bf;
645177595Sweongyo
646177595Sweongyo	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
647177595Sweongyo		if (bf->bf_m != NULL) {
648177595Sweongyo			m_freem(bf->bf_m);
649177595Sweongyo			bf->bf_m = NULL;
650177595Sweongyo		}
651177595Sweongyo		if (bf->bf_dmamap != NULL) {
652177595Sweongyo			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
653177595Sweongyo			bf->bf_dmamap = NULL;
654177595Sweongyo		}
655177595Sweongyo	}
656177595Sweongyo	STAILQ_INIT(&sc->malo_rxbuf);
657177595Sweongyo	if (sc->malo_rxdma.dd_bufptr != NULL) {
658177595Sweongyo		free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
659177595Sweongyo		sc->malo_rxdma.dd_bufptr = NULL;
660177595Sweongyo	}
661177595Sweongyo	if (sc->malo_rxdma.dd_desc_len != 0)
662177595Sweongyo		malo_desc_cleanup(sc, &sc->malo_rxdma);
663177595Sweongyo}
664177595Sweongyo
665177595Sweongyostatic void
666177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
667177595Sweongyo{
668177595Sweongyo	struct malo_txbuf *bf;
669177595Sweongyo	struct ieee80211_node *ni;
670177595Sweongyo
671177595Sweongyo	STAILQ_FOREACH(bf, &txq->free, bf_list) {
672177595Sweongyo		if (bf->bf_m != NULL) {
673177595Sweongyo			m_freem(bf->bf_m);
674177595Sweongyo			bf->bf_m = NULL;
675177595Sweongyo		}
676177595Sweongyo		ni = bf->bf_node;
677177595Sweongyo		bf->bf_node = NULL;
678177595Sweongyo		if (ni != NULL) {
679177595Sweongyo			/*
680177595Sweongyo			 * Reclaim node reference.
681177595Sweongyo			 */
682177595Sweongyo			ieee80211_free_node(ni);
683177595Sweongyo		}
684177595Sweongyo		if (bf->bf_dmamap != NULL) {
685177595Sweongyo			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
686177595Sweongyo			bf->bf_dmamap = NULL;
687177595Sweongyo		}
688177595Sweongyo	}
689177595Sweongyo	STAILQ_INIT(&txq->free);
690177595Sweongyo	txq->nfree = 0;
691177595Sweongyo	if (txq->dma.dd_bufptr != NULL) {
692177595Sweongyo		free(txq->dma.dd_bufptr, M_MALODEV);
693177595Sweongyo		txq->dma.dd_bufptr = NULL;
694177595Sweongyo	}
695177595Sweongyo	if (txq->dma.dd_desc_len != 0)
696177595Sweongyo		malo_desc_cleanup(sc, &txq->dma);
697177595Sweongyo}
698177595Sweongyo
699177595Sweongyostatic void
700177595Sweongyomalo_dma_cleanup(struct malo_softc *sc)
701177595Sweongyo{
702177595Sweongyo	int i;
703177595Sweongyo
704177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
705177595Sweongyo		malo_txdma_cleanup(sc, &sc->malo_txq[i]);
706177595Sweongyo
707177595Sweongyo	malo_rxdma_cleanup(sc);
708177595Sweongyo}
709177595Sweongyo
710177595Sweongyostatic int
711177595Sweongyomalo_dma_setup(struct malo_softc *sc)
712177595Sweongyo{
713177595Sweongyo	int error, i;
714177595Sweongyo
715177595Sweongyo	/* rxdma initializing.  */
716177595Sweongyo	error = malo_rxdma_setup(sc);
717177595Sweongyo	if (error != 0)
718177595Sweongyo		return error;
719177595Sweongyo
720177595Sweongyo	/* NB: we just have 1 tx queue now.  */
721177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
722177595Sweongyo		error = malo_txdma_setup(sc, &sc->malo_txq[i]);
723177595Sweongyo		if (error != 0) {
724177595Sweongyo			malo_dma_cleanup(sc);
725177595Sweongyo
726177595Sweongyo			return error;
727177595Sweongyo		}
728177595Sweongyo
729177595Sweongyo		malo_txq_init(sc, &sc->malo_txq[i], i);
730177595Sweongyo	}
731177595Sweongyo
732177595Sweongyo	return 0;
733177595Sweongyo}
734177595Sweongyo
735177595Sweongyostatic void
736177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc)
737177595Sweongyo{
738177595Sweongyo	int i;
739177595Sweongyo
740177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
741177595Sweongyo	    sc->malo_hwdma.rxdesc_read);
742177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
743177595Sweongyo	    sc->malo_hwdma.rxdesc_read);
744177595Sweongyo
745177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
746177595Sweongyo		malo_bar0_write4(sc,
747177595Sweongyo		    sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
748177595Sweongyo	}
749177595Sweongyo}
750177595Sweongyo
751177595Sweongyo/*
752177595Sweongyo * Inform firmware of our tx/rx dma setup.  The BAR 0 writes below are
753177595Sweongyo * for compatibility with older firmware.  For current firmware we send
754177595Sweongyo * this information with a cmd block via malo_hal_sethwdma.
755177595Sweongyo */
756177595Sweongyostatic int
757177595Sweongyomalo_setup_hwdma(struct malo_softc *sc)
758177595Sweongyo{
759177595Sweongyo	int i;
760177595Sweongyo	struct malo_txq *txq;
761177595Sweongyo
762177595Sweongyo	sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
763177595Sweongyo
764177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
765177595Sweongyo		txq = &sc->malo_txq[i];
766177595Sweongyo		sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
767177595Sweongyo	}
768177595Sweongyo	sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
769177595Sweongyo	sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
770177595Sweongyo
771177595Sweongyo	malo_hal_set_rxtxdma(sc);
772177595Sweongyo
773177595Sweongyo	return 0;
774177595Sweongyo}
775177595Sweongyo
776177595Sweongyostatic void
777177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
778177595Sweongyo{
779177595Sweongyo	struct malo_txbuf *bf, *bn;
780177595Sweongyo	struct malo_txdesc *ds;
781177595Sweongyo
782177595Sweongyo	MALO_TXQ_LOCK_INIT(sc, txq);
783177595Sweongyo	txq->qnum = qnum;
784177595Sweongyo	txq->txpri = 0;	/* XXX */
785177595Sweongyo
786177595Sweongyo	STAILQ_FOREACH(bf, &txq->free, bf_list) {
787177595Sweongyo		bf->bf_txq = txq;
788177595Sweongyo
789177595Sweongyo		ds = bf->bf_desc;
790177595Sweongyo		bn = STAILQ_NEXT(bf, bf_list);
791177595Sweongyo		if (bn == NULL)
792177595Sweongyo			bn = STAILQ_FIRST(&txq->free);
793177595Sweongyo		ds->physnext = htole32(bn->bf_daddr);
794177595Sweongyo	}
795177595Sweongyo	STAILQ_INIT(&txq->active);
796177595Sweongyo}
797177595Sweongyo
798177595Sweongyo/*
799177595Sweongyo * Reclaim resources for a setup queue.
800177595Sweongyo */
801177595Sweongyostatic void
802177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
803177595Sweongyo{
804177595Sweongyo	/* XXX hal work? */
805177595Sweongyo	MALO_TXQ_LOCK_DESTROY(txq);
806177595Sweongyo}
807177595Sweongyo
808177595Sweongyo/*
809177595Sweongyo * Allocate a tx buffer for sending a frame.
810177595Sweongyo */
811177595Sweongyostatic struct malo_txbuf *
812177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
813177595Sweongyo{
814177595Sweongyo	struct malo_txbuf *bf;
815177595Sweongyo
816177595Sweongyo	MALO_TXQ_LOCK(txq);
817177595Sweongyo	bf = STAILQ_FIRST(&txq->free);
818177595Sweongyo	if (bf != NULL) {
819177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->free, bf_list);
820177595Sweongyo		txq->nfree--;
821177595Sweongyo	}
822177595Sweongyo	MALO_TXQ_UNLOCK(txq);
823177595Sweongyo	if (bf == NULL) {
824177595Sweongyo		DPRINTF(sc, MALO_DEBUG_XMIT,
825177595Sweongyo		    "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
826177595Sweongyo		sc->malo_stats.mst_tx_qstop++;
827177595Sweongyo	}
828177595Sweongyo	return bf;
829177595Sweongyo}
830177595Sweongyo
831177595Sweongyostatic int
832177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
833177595Sweongyo{
834177595Sweongyo	struct mbuf *m;
835177595Sweongyo	int error;
836177595Sweongyo
837177595Sweongyo	/*
838177595Sweongyo	 * Load the DMA map so any coalescing is done.  This also calculates
839177595Sweongyo	 * the number of descriptors we need.
840177595Sweongyo	 */
841177595Sweongyo	error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
842177595Sweongyo				     bf->bf_segs, &bf->bf_nseg,
843177595Sweongyo				     BUS_DMA_NOWAIT);
844177595Sweongyo	if (error == EFBIG) {
845177595Sweongyo		/* XXX packet requires too many descriptors */
846177595Sweongyo		bf->bf_nseg = MALO_TXDESC + 1;
847177595Sweongyo	} else if (error != 0) {
848177595Sweongyo		sc->malo_stats.mst_tx_busdma++;
849177595Sweongyo		m_freem(m0);
850177595Sweongyo		return error;
851177595Sweongyo	}
852177595Sweongyo	/*
853177595Sweongyo	 * Discard null packets and check for packets that require too many
854177595Sweongyo	 * TX descriptors.  We try to convert the latter to a cluster.
855177595Sweongyo	 */
856177595Sweongyo	if (error == EFBIG) {		/* too many desc's, linearize */
857177595Sweongyo		sc->malo_stats.mst_tx_linear++;
858243857Sglebius		m = m_defrag(m0, M_NOWAIT);
859177595Sweongyo		if (m == NULL) {
860177595Sweongyo			m_freem(m0);
861177595Sweongyo			sc->malo_stats.mst_tx_nombuf++;
862177595Sweongyo			return ENOMEM;
863177595Sweongyo		}
864177595Sweongyo		m0 = m;
865177595Sweongyo		error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
866177595Sweongyo					     bf->bf_segs, &bf->bf_nseg,
867177595Sweongyo					     BUS_DMA_NOWAIT);
868177595Sweongyo		if (error != 0) {
869177595Sweongyo			sc->malo_stats.mst_tx_busdma++;
870177595Sweongyo			m_freem(m0);
871177595Sweongyo			return error;
872177595Sweongyo		}
873177595Sweongyo		KASSERT(bf->bf_nseg <= MALO_TXDESC,
874177595Sweongyo		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
875177595Sweongyo	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
876177595Sweongyo		sc->malo_stats.mst_tx_nodata++;
877177595Sweongyo		m_freem(m0);
878177595Sweongyo		return EIO;
879177595Sweongyo	}
880177595Sweongyo	DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
881177595Sweongyo		__func__, m0, m0->m_pkthdr.len);
882177595Sweongyo	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
883177595Sweongyo	bf->bf_m = m0;
884177595Sweongyo
885177595Sweongyo	return 0;
886177595Sweongyo}
887177595Sweongyo
888177595Sweongyo#ifdef MALO_DEBUG
889177595Sweongyostatic void
890177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
891177595Sweongyo{
892177595Sweongyo	const struct malo_rxdesc *ds = bf->bf_desc;
893177595Sweongyo	uint32_t status = le32toh(ds->status);
894177595Sweongyo
895177595Sweongyo	printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n"
896177595Sweongyo	    "      STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
897177595Sweongyo	    " RATE:%02x QOS:%04x\n",
898177595Sweongyo	    ix, ds, (const struct malo_desc *)bf->bf_daddr,
899177595Sweongyo	    le32toh(ds->physnext), le32toh(ds->physbuffdata),
900177595Sweongyo	    ds->rxcontrol,
901177595Sweongyo	    ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
902177595Sweongyo	        "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
903177595Sweongyo	    ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
904177595Sweongyo	    ds->rate, le16toh(ds->qosctrl));
905177595Sweongyo}
906177595Sweongyo
907177595Sweongyostatic void
908177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
909177595Sweongyo{
910177595Sweongyo	const struct malo_txdesc *ds = bf->bf_desc;
911177595Sweongyo	uint32_t status = le32toh(ds->status);
912177595Sweongyo
913177595Sweongyo	printf("Q%u[%3u]", qnum, ix);
914177595Sweongyo	printf(" (DS.V:%p DS.P:%p)\n",
915177595Sweongyo	    ds, (const struct malo_txdesc *)bf->bf_daddr);
916177595Sweongyo	printf("    NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
917177595Sweongyo	    le32toh(ds->physnext),
918177595Sweongyo	    le32toh(ds->pktptr), le16toh(ds->pktlen), status,
919177595Sweongyo	    status & MALO_TXD_STATUS_USED ?
920177595Sweongyo	    "" : (status & 3) != 0 ? " *" : " !");
921177595Sweongyo	printf("    RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
922177595Sweongyo	    ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
923177595Sweongyo	    le32toh(ds->sap_pktinfo), le16toh(ds->format));
924177595Sweongyo#if 0
925177595Sweongyo	{
926177595Sweongyo		const uint8_t *cp = (const uint8_t *) ds;
927177595Sweongyo		int i;
928177595Sweongyo		for (i = 0; i < sizeof(struct malo_txdesc); i++) {
929177595Sweongyo			printf("%02x ", cp[i]);
930177595Sweongyo			if (((i+1) % 16) == 0)
931177595Sweongyo				printf("\n");
932177595Sweongyo		}
933177595Sweongyo		printf("\n");
934177595Sweongyo	}
935177595Sweongyo#endif
936177595Sweongyo}
937177595Sweongyo#endif /* MALO_DEBUG */
938177595Sweongyo
939177595Sweongyostatic __inline void
940177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix)
941177595Sweongyo{
942177595Sweongyo#define	N(x)	(sizeof(x)/sizeof(x[0]))
943177595Sweongyo	static const int ieeerates[] =
944177595Sweongyo	    { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
945177595Sweongyo	if (rix < N(ieeerates))
946177595Sweongyo		ni->ni_txrate = ieeerates[rix];
947177595Sweongyo#undef N
948177595Sweongyo}
949177595Sweongyo
950177595Sweongyostatic int
951177595Sweongyomalo_fix2rate(int fix_rate)
952177595Sweongyo{
953177595Sweongyo#define	N(x)	(sizeof(x)/sizeof(x[0]))
954177595Sweongyo	static const int rates[] =
955177595Sweongyo	    { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
956177595Sweongyo	return (fix_rate < N(rates) ? rates[fix_rate] : 0);
957177595Sweongyo#undef N
958177595Sweongyo}
959177595Sweongyo
960177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
961177595Sweongyo#define	MS(v,x)			(((v) & x) >> x##_S)
962177595Sweongyo#define	SM(v,x)			(((v) << x##_S) & x)
963177595Sweongyo
964177595Sweongyo/*
965177595Sweongyo * Process completed xmit descriptors from the specified queue.
966177595Sweongyo */
967177595Sweongyostatic int
968177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
969177595Sweongyo{
970177595Sweongyo	struct malo_txbuf *bf;
971177595Sweongyo	struct malo_txdesc *ds;
972177595Sweongyo	struct ieee80211_node *ni;
973177595Sweongyo	int nreaped;
974177595Sweongyo	uint32_t status;
975177595Sweongyo
976177595Sweongyo	DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
977177595Sweongyo	    __func__, txq->qnum);
978177595Sweongyo	for (nreaped = 0;; nreaped++) {
979177595Sweongyo		MALO_TXQ_LOCK(txq);
980177595Sweongyo		bf = STAILQ_FIRST(&txq->active);
981177595Sweongyo		if (bf == NULL) {
982177595Sweongyo			MALO_TXQ_UNLOCK(txq);
983177595Sweongyo			break;
984177595Sweongyo		}
985177595Sweongyo		ds = bf->bf_desc;
986177595Sweongyo		MALO_TXDESC_SYNC(txq, ds,
987177595Sweongyo		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
988177595Sweongyo		if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
989177595Sweongyo			MALO_TXQ_UNLOCK(txq);
990177595Sweongyo			break;
991177595Sweongyo		}
992177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
993177595Sweongyo		MALO_TXQ_UNLOCK(txq);
994177595Sweongyo
995177595Sweongyo#ifdef MALO_DEBUG
996177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
997177595Sweongyo			malo_printtxbuf(bf, txq->qnum, nreaped);
998177595Sweongyo#endif
999177595Sweongyo		ni = bf->bf_node;
1000177595Sweongyo		if (ni != NULL) {
1001177595Sweongyo			status = le32toh(ds->status);
1002177595Sweongyo			if (status & MALO_TXD_STATUS_OK) {
1003177595Sweongyo				uint16_t format = le16toh(ds->format);
1004177595Sweongyo				uint8_t txant = MS(format, MALO_TXD_ANTENNA);
1005177595Sweongyo
1006177595Sweongyo				sc->malo_stats.mst_ant_tx[txant]++;
1007177595Sweongyo				if (status & MALO_TXD_STATUS_OK_RETRY)
1008177595Sweongyo					sc->malo_stats.mst_tx_retries++;
1009177595Sweongyo				if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
1010177595Sweongyo					sc->malo_stats.mst_tx_mretries++;
1011177595Sweongyo				malo_updatetxrate(ni, ds->datarate);
1012177595Sweongyo				sc->malo_stats.mst_tx_rate = ds->datarate;
1013177595Sweongyo			} else {
1014177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
1015177595Sweongyo					sc->malo_stats.mst_tx_linkerror++;
1016177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_XRETRY)
1017177595Sweongyo					sc->malo_stats.mst_tx_xretries++;
1018177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_AGING)
1019177595Sweongyo					sc->malo_stats.mst_tx_aging++;
1020177595Sweongyo			}
1021177595Sweongyo			/*
1022177595Sweongyo			 * Do any tx complete callback.  Note this must
1023177595Sweongyo			 * be done before releasing the node reference.
1024177595Sweongyo			 * XXX no way to figure out if frame was ACK'd
1025177595Sweongyo			 */
1026177595Sweongyo			if (bf->bf_m->m_flags & M_TXCB) {
1027177595Sweongyo				/* XXX strip fw len in case header inspected */
1028177595Sweongyo				m_adj(bf->bf_m, sizeof(uint16_t));
1029177595Sweongyo				ieee80211_process_callback(ni, bf->bf_m,
1030177595Sweongyo					(status & MALO_TXD_STATUS_OK) == 0);
1031177595Sweongyo			}
1032177595Sweongyo			/*
1033177595Sweongyo			 * Reclaim reference to node.
1034177595Sweongyo			 *
1035177595Sweongyo			 * NB: the node may be reclaimed here if, for example
1036177595Sweongyo			 *     this is a DEAUTH message that was sent and the
1037177595Sweongyo			 *     node was timed out due to inactivity.
1038177595Sweongyo			 */
1039177595Sweongyo			ieee80211_free_node(ni);
1040177595Sweongyo		}
1041177595Sweongyo		ds->status = htole32(MALO_TXD_STATUS_IDLE);
1042177595Sweongyo		ds->pktlen = htole32(0);
1043177595Sweongyo
1044177595Sweongyo		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
1045177595Sweongyo		    BUS_DMASYNC_POSTWRITE);
1046177595Sweongyo		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1047177595Sweongyo		m_freem(bf->bf_m);
1048177595Sweongyo		bf->bf_m = NULL;
1049177595Sweongyo		bf->bf_node = NULL;
1050177595Sweongyo
1051177595Sweongyo		MALO_TXQ_LOCK(txq);
1052177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1053177595Sweongyo		txq->nfree++;
1054177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1055177595Sweongyo	}
1056177595Sweongyo	return nreaped;
1057177595Sweongyo}
1058177595Sweongyo
1059177595Sweongyo/*
1060177595Sweongyo * Deferred processing of transmit interrupt.
1061177595Sweongyo */
1062177595Sweongyostatic void
1063177595Sweongyomalo_tx_proc(void *arg, int npending)
1064177595Sweongyo{
1065177595Sweongyo	struct malo_softc *sc = arg;
1066177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1067177595Sweongyo	int i, nreaped;
1068177595Sweongyo
1069177595Sweongyo	/*
1070177595Sweongyo	 * Process each active queue.
1071177595Sweongyo	 */
1072177595Sweongyo	nreaped = 0;
1073177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1074177595Sweongyo		if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1075177595Sweongyo			nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1076177595Sweongyo	}
1077177595Sweongyo
1078177595Sweongyo	if (nreaped != 0) {
1079177595Sweongyo		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1080199559Sjhb		sc->malo_timer = 0;
1081177595Sweongyo		malo_start(ifp);
1082177595Sweongyo	}
1083177595Sweongyo}
1084177595Sweongyo
1085177595Sweongyostatic int
1086177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1087177595Sweongyo    struct malo_txbuf *bf, struct mbuf *m0)
1088177595Sweongyo{
1089177595Sweongyo#define	IEEE80211_DIR_DSTODS(wh) \
1090177595Sweongyo	((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
1091177595Sweongyo#define	IS_DATA_FRAME(wh)						\
1092177595Sweongyo	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1093177595Sweongyo	int error, ismcast, iswep;
1094177595Sweongyo	int copyhdrlen, hdrlen, pktlen;
1095177595Sweongyo	struct ieee80211_frame *wh;
1096177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1097178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1098192468Ssam	struct ieee80211vap *vap = ni->ni_vap;
1099177595Sweongyo	struct malo_txdesc *ds;
1100177595Sweongyo	struct malo_txrec *tr;
1101177595Sweongyo	struct malo_txq *txq;
1102177595Sweongyo	uint16_t qos;
1103177595Sweongyo
1104177595Sweongyo	wh = mtod(m0, struct ieee80211_frame *);
1105177595Sweongyo	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1106177595Sweongyo	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1107177595Sweongyo	copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1108177595Sweongyo	pktlen = m0->m_pkthdr.len;
1109177595Sweongyo	if (IEEE80211_QOS_HAS_SEQ(wh)) {
1110177595Sweongyo		if (IEEE80211_DIR_DSTODS(wh)) {
1111177595Sweongyo			qos = *(uint16_t *)
1112177595Sweongyo			    (((struct ieee80211_qosframe_addr4 *) wh)->i_qos);
1113177595Sweongyo			copyhdrlen -= sizeof(qos);
1114177595Sweongyo		} else
1115177595Sweongyo			qos = *(uint16_t *)
1116177595Sweongyo			    (((struct ieee80211_qosframe *) wh)->i_qos);
1117177595Sweongyo	} else
1118177595Sweongyo		qos = 0;
1119177595Sweongyo
1120177595Sweongyo	if (iswep) {
1121177595Sweongyo		struct ieee80211_key *k;
1122177595Sweongyo
1123177595Sweongyo		/*
1124177595Sweongyo		 * Construct the 802.11 header+trailer for an encrypted
1125177595Sweongyo		 * frame. The only reason this can fail is because of an
1126177595Sweongyo		 * unknown or unsupported cipher/key type.
1127177595Sweongyo		 *
1128177595Sweongyo		 * NB: we do this even though the firmware will ignore
1129177595Sweongyo		 *     what we've done for WEP and TKIP as we need the
1130177595Sweongyo		 *     ExtIV filled in for CCMP and this also adjusts
1131177595Sweongyo		 *     the headers which simplifies our work below.
1132177595Sweongyo		 */
1133178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1134177595Sweongyo		if (k == NULL) {
1135177595Sweongyo			/*
1136177595Sweongyo			 * This can happen when the key is yanked after the
1137177595Sweongyo			 * frame was queued.  Just discard the frame; the
1138177595Sweongyo			 * 802.11 layer counts failures and provides
1139177595Sweongyo			 * debugging/diagnostics.
1140177595Sweongyo			 */
1141177595Sweongyo			m_freem(m0);
1142177595Sweongyo			return EIO;
1143177595Sweongyo		}
1144177595Sweongyo
1145177595Sweongyo		/*
1146177595Sweongyo		 * Adjust the packet length for the crypto additions
1147177595Sweongyo		 * done during encap and any other bits that the f/w
1148177595Sweongyo		 * will add later on.
1149177595Sweongyo		 */
1150177595Sweongyo		pktlen = m0->m_pkthdr.len;
1151177595Sweongyo
1152177595Sweongyo		/* packet header may have moved, reset our local pointer */
1153177595Sweongyo		wh = mtod(m0, struct ieee80211_frame *);
1154177595Sweongyo	}
1155177595Sweongyo
1156192468Ssam	if (ieee80211_radiotap_active_vap(vap)) {
1157177595Sweongyo		sc->malo_tx_th.wt_flags = 0;	/* XXX */
1158177595Sweongyo		if (iswep)
1159177595Sweongyo			sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1160177595Sweongyo		sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1161177595Sweongyo		sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1162177595Sweongyo
1163192468Ssam		ieee80211_radiotap_tx(vap, m0);
1164177595Sweongyo	}
1165177595Sweongyo
1166177595Sweongyo	/*
1167177595Sweongyo	 * Copy up/down the 802.11 header; the firmware requires
1168177595Sweongyo	 * we present a 2-byte payload length followed by a
1169177595Sweongyo	 * 4-address header (w/o QoS), followed (optionally) by
1170177595Sweongyo	 * any WEP/ExtIV header (but only filled in for CCMP).
1171177595Sweongyo	 * We are assured the mbuf has sufficient headroom to
1172177595Sweongyo	 * prepend in-place by the setup of ic_headroom in
1173177595Sweongyo	 * malo_attach.
1174177595Sweongyo	 */
1175177595Sweongyo	if (hdrlen < sizeof(struct malo_txrec)) {
1176177595Sweongyo		const int space = sizeof(struct malo_txrec) - hdrlen;
1177177595Sweongyo		if (M_LEADINGSPACE(m0) < space) {
1178177595Sweongyo			/* NB: should never happen */
1179177595Sweongyo			device_printf(sc->malo_dev,
1180177595Sweongyo			    "not enough headroom, need %d found %zd, "
1181177595Sweongyo			    "m_flags 0x%x m_len %d\n",
1182177595Sweongyo			    space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1183177595Sweongyo			ieee80211_dump_pkt(ic,
1184177595Sweongyo			    mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1185177595Sweongyo			m_freem(m0);
1186177595Sweongyo			/* XXX stat */
1187177595Sweongyo			return EIO;
1188177595Sweongyo		}
1189177595Sweongyo		M_PREPEND(m0, space, M_NOWAIT);
1190177595Sweongyo	}
1191177595Sweongyo	tr = mtod(m0, struct malo_txrec *);
1192177595Sweongyo	if (wh != (struct ieee80211_frame *) &tr->wh)
1193177595Sweongyo		ovbcopy(wh, &tr->wh, hdrlen);
1194177595Sweongyo	/*
1195177595Sweongyo	 * Note: the "firmware length" is actually the length of the fully
1196177595Sweongyo	 * formed "802.11 payload".  That is, it's everything except for
1197177595Sweongyo	 * the 802.11 header.  In particular this includes all crypto
1198177595Sweongyo	 * material including the MIC!
1199177595Sweongyo	 */
1200177595Sweongyo	tr->fwlen = htole16(pktlen - hdrlen);
1201177595Sweongyo
1202177595Sweongyo	/*
1203177595Sweongyo	 * Load the DMA map so any coalescing is done.  This
1204177595Sweongyo	 * also calculates the number of descriptors we need.
1205177595Sweongyo	 */
1206177595Sweongyo	error = malo_tx_dmasetup(sc, bf, m0);
1207177595Sweongyo	if (error != 0)
1208177595Sweongyo		return error;
1209177595Sweongyo	bf->bf_node = ni;			/* NB: held reference */
1210177595Sweongyo	m0 = bf->bf_m;				/* NB: may have changed */
1211177595Sweongyo	tr = mtod(m0, struct malo_txrec *);
1212177595Sweongyo	wh = (struct ieee80211_frame *)&tr->wh;
1213177595Sweongyo
1214177595Sweongyo	/*
1215177595Sweongyo	 * Formulate tx descriptor.
1216177595Sweongyo	 */
1217177595Sweongyo	ds = bf->bf_desc;
1218177595Sweongyo	txq = bf->bf_txq;
1219177595Sweongyo
1220177595Sweongyo	ds->qosctrl = qos;			/* NB: already little-endian */
1221177595Sweongyo	ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1222177595Sweongyo	ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1223177595Sweongyo	/* NB: pPhysNext setup once, don't touch */
1224177595Sweongyo	ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1225177595Sweongyo	ds->sap_pktinfo = 0;
1226177595Sweongyo	ds->format = 0;
1227177595Sweongyo
1228177595Sweongyo	/*
1229177595Sweongyo	 * Select transmit rate.
1230177595Sweongyo	 */
1231177595Sweongyo	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1232177595Sweongyo	case IEEE80211_FC0_TYPE_MGT:
1233177595Sweongyo		sc->malo_stats.mst_tx_mgmt++;
1234177595Sweongyo		/* fall thru... */
1235177595Sweongyo	case IEEE80211_FC0_TYPE_CTL:
1236177595Sweongyo		ds->txpriority = 1;
1237177595Sweongyo		break;
1238177595Sweongyo	case IEEE80211_FC0_TYPE_DATA:
1239177595Sweongyo		ds->txpriority = txq->qnum;
1240177595Sweongyo		break;
1241177595Sweongyo	default:
1242177595Sweongyo		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1243177595Sweongyo			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1244177595Sweongyo		/* XXX statistic */
1245177595Sweongyo		m_freem(m0);
1246177595Sweongyo		return EIO;
1247177595Sweongyo	}
1248177595Sweongyo
1249177595Sweongyo#ifdef MALO_DEBUG
1250177595Sweongyo	if (IFF_DUMPPKTS_XMIT(sc))
1251177595Sweongyo		ieee80211_dump_pkt(ic,
1252177595Sweongyo		    mtod(m0, const uint8_t *)+sizeof(uint16_t),
1253177595Sweongyo		    m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1254177595Sweongyo#endif
1255177595Sweongyo
1256177595Sweongyo	MALO_TXQ_LOCK(txq);
1257177595Sweongyo	if (!IS_DATA_FRAME(wh))
1258177595Sweongyo		ds->status |= htole32(1);
1259177595Sweongyo	ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1260177595Sweongyo	STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1261177595Sweongyo	MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1262177595Sweongyo
1263177595Sweongyo	ifp->if_opackets++;
1264199559Sjhb	sc->malo_timer = 5;
1265177595Sweongyo	MALO_TXQ_UNLOCK(txq);
1266177595Sweongyo	return 0;
1267177595Sweongyo#undef IEEE80211_DIR_DSTODS
1268177595Sweongyo}
1269177595Sweongyo
1270177595Sweongyostatic void
1271177595Sweongyomalo_start(struct ifnet *ifp)
1272177595Sweongyo{
1273177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1274177595Sweongyo	struct ieee80211_node *ni;
1275178354Ssam	struct malo_txq *txq = &sc->malo_txq[0];
1276177595Sweongyo	struct malo_txbuf *bf = NULL;
1277177595Sweongyo	struct mbuf *m;
1278178354Ssam	int nqueued = 0;
1279177595Sweongyo
1280177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid)
1281177595Sweongyo		return;
1282177595Sweongyo
1283177595Sweongyo	for (;;) {
1284178354Ssam		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1285178354Ssam		if (m == NULL)
1286178354Ssam			break;
1287178354Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1288178354Ssam		bf = malo_getbuf(sc, txq);
1289178354Ssam		if (bf == NULL) {
1290178354Ssam			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1291178354Ssam
1292178354Ssam			/* XXX blocks other traffic */
1293178354Ssam			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1294178354Ssam			sc->malo_stats.mst_tx_qstop++;
1295178354Ssam			break;
1296178354Ssam		}
1297177595Sweongyo		/*
1298177595Sweongyo		 * Pass the frame to the h/w for transmission.
1299177595Sweongyo		 */
1300177595Sweongyo		if (malo_tx_start(sc, ni, bf, m)) {
1301177595Sweongyo			ifp->if_oerrors++;
1302177595Sweongyo			if (bf != NULL) {
1303177595Sweongyo				bf->bf_m = NULL;
1304177595Sweongyo				bf->bf_node = NULL;
1305177595Sweongyo				MALO_TXQ_LOCK(txq);
1306177595Sweongyo				STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1307177595Sweongyo				MALO_TXQ_UNLOCK(txq);
1308177595Sweongyo			}
1309177595Sweongyo			ieee80211_free_node(ni);
1310177595Sweongyo			continue;
1311177595Sweongyo		}
1312177595Sweongyo		nqueued++;
1313177595Sweongyo
1314177595Sweongyo		if (nqueued >= malo_txcoalesce) {
1315177595Sweongyo			/*
1316177595Sweongyo			 * Poke the firmware to process queued frames;
1317177595Sweongyo			 * see below about (lack of) locking.
1318177595Sweongyo			 */
1319177595Sweongyo			nqueued = 0;
1320177595Sweongyo			malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1321177595Sweongyo		}
1322177595Sweongyo	}
1323177595Sweongyo
1324177595Sweongyo	if (nqueued) {
1325177595Sweongyo		/*
1326177595Sweongyo		 * NB: We don't need to lock against tx done because
1327177595Sweongyo		 * this just prods the firmware to check the transmit
1328177595Sweongyo		 * descriptors.  The firmware will also start fetching
1329177595Sweongyo		 * descriptors by itself if it notices new ones are
1330177595Sweongyo		 * present when it goes to deliver a tx done interrupt
1331177595Sweongyo		 * to the host. So if we race with tx done processing
1332177595Sweongyo		 * it's ok.  Delivering the kick here rather than in
1333177595Sweongyo		 * malo_tx_start is an optimization to avoid poking the
1334177595Sweongyo		 * firmware for each packet.
1335177595Sweongyo		 *
1336177595Sweongyo		 * NB: the queue id isn't used so 0 is ok.
1337177595Sweongyo		 */
1338177595Sweongyo		malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1339177595Sweongyo	}
1340177595Sweongyo}
1341177595Sweongyo
1342177595Sweongyostatic void
1343199559Sjhbmalo_watchdog(void *arg)
1344177595Sweongyo{
1345199559Sjhb	struct malo_softc *sc;
1346199559Sjhb	struct ifnet *ifp;
1347177595Sweongyo
1348199559Sjhb	sc = arg;
1349199559Sjhb	callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1350199559Sjhb	if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1351199559Sjhb		return;
1352199559Sjhb
1353199559Sjhb	ifp = sc->malo_ifp;
1354177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) {
1355177595Sweongyo		if_printf(ifp, "watchdog timeout\n");
1356177595Sweongyo
1357177595Sweongyo		/* XXX no way to reset h/w. now  */
1358177595Sweongyo
1359177595Sweongyo		ifp->if_oerrors++;
1360177595Sweongyo		sc->malo_stats.mst_watchdog++;
1361177595Sweongyo	}
1362177595Sweongyo}
1363177595Sweongyo
1364177595Sweongyostatic int
1365177595Sweongyomalo_hal_reset(struct malo_softc *sc)
1366177595Sweongyo{
1367177595Sweongyo	static int first = 0;
1368178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1369178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1370177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1371177595Sweongyo
1372177595Sweongyo	if (first == 0) {
1373177595Sweongyo		/*
1374177595Sweongyo		 * NB: when the device firstly is initialized, sometimes
1375177595Sweongyo		 * firmware could override rx/tx dma registers so we re-set
1376177595Sweongyo		 * these values once.
1377177595Sweongyo		 */
1378177595Sweongyo		malo_hal_set_rxtxdma(sc);
1379177595Sweongyo		first = 1;
1380177595Sweongyo	}
1381177595Sweongyo
1382177595Sweongyo	malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1383177595Sweongyo	malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1384177595Sweongyo	malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1385177595Sweongyo	malo_chan_set(sc, ic->ic_curchan);
1386177595Sweongyo
1387177595Sweongyo	/* XXX needs other stuffs?  */
1388177595Sweongyo
1389177595Sweongyo	return 1;
1390177595Sweongyo}
1391177595Sweongyo
1392177595Sweongyostatic __inline struct mbuf *
1393177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1394177595Sweongyo{
1395177595Sweongyo	struct mbuf *m;
1396177595Sweongyo	bus_addr_t paddr;
1397177595Sweongyo	int error;
1398177595Sweongyo
1399177595Sweongyo	/* XXX don't need mbuf, just dma buffer */
1400243857Sglebius	m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1401177595Sweongyo	if (m == NULL) {
1402177595Sweongyo		sc->malo_stats.mst_rx_nombuf++;	/* XXX */
1403177595Sweongyo		return NULL;
1404177595Sweongyo	}
1405177595Sweongyo	error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1406177595Sweongyo	    mtod(m, caddr_t), MJUMPAGESIZE,
1407177595Sweongyo	    malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1408177595Sweongyo	if (error != 0) {
1409177595Sweongyo		if_printf(sc->malo_ifp,
1410177595Sweongyo		    "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1411177595Sweongyo		m_freem(m);
1412177595Sweongyo		return NULL;
1413177595Sweongyo	}
1414177595Sweongyo	bf->bf_data = paddr;
1415177595Sweongyo	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1416177595Sweongyo
1417177595Sweongyo	return m;
1418177595Sweongyo}
1419177595Sweongyo
1420177595Sweongyostatic int
1421177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1422177595Sweongyo{
1423177595Sweongyo	struct malo_rxdesc *ds;
1424177595Sweongyo
1425177595Sweongyo	ds = bf->bf_desc;
1426177595Sweongyo	if (bf->bf_m == NULL) {
1427177595Sweongyo		bf->bf_m = malo_getrxmbuf(sc, bf);
1428177595Sweongyo		if (bf->bf_m == NULL) {
1429177595Sweongyo			/* mark descriptor to be skipped */
1430177595Sweongyo			ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1431177595Sweongyo			/* NB: don't need PREREAD */
1432177595Sweongyo			MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1433177595Sweongyo			return ENOMEM;
1434177595Sweongyo		}
1435177595Sweongyo	}
1436177595Sweongyo
1437177595Sweongyo	/*
1438177595Sweongyo	 * Setup descriptor.
1439177595Sweongyo	 */
1440177595Sweongyo	ds->qosctrl = 0;
1441177595Sweongyo	ds->snr = 0;
1442177595Sweongyo	ds->status = MALO_RXD_STATUS_IDLE;
1443177595Sweongyo	ds->channel = 0;
1444177595Sweongyo	ds->pktlen = htole16(MALO_RXSIZE);
1445177595Sweongyo	ds->nf = 0;
1446177595Sweongyo	ds->physbuffdata = htole32(bf->bf_data);
1447177595Sweongyo	/* NB: don't touch pPhysNext, set once */
1448177595Sweongyo	ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1449177595Sweongyo	MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1450177595Sweongyo
1451177595Sweongyo	return 0;
1452177595Sweongyo}
1453177595Sweongyo
1454177595Sweongyo/*
1455177595Sweongyo * Setup the rx data structures.  This should only be done once or we may get
1456177595Sweongyo * out of sync with the firmware.
1457177595Sweongyo */
1458177595Sweongyostatic int
1459177595Sweongyomalo_startrecv(struct malo_softc *sc)
1460177595Sweongyo{
1461177595Sweongyo	struct malo_rxbuf *bf, *prev;
1462177595Sweongyo	struct malo_rxdesc *ds;
1463177595Sweongyo
1464177595Sweongyo	if (sc->malo_recvsetup == 1) {
1465177595Sweongyo		malo_mode_init(sc);		/* set filters, etc. */
1466177595Sweongyo		return 0;
1467177595Sweongyo	}
1468177595Sweongyo
1469177595Sweongyo	prev = NULL;
1470177595Sweongyo	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1471177595Sweongyo		int error = malo_rxbuf_init(sc, bf);
1472177595Sweongyo		if (error != 0) {
1473177595Sweongyo			DPRINTF(sc, MALO_DEBUG_RECV,
1474177595Sweongyo			    "%s: malo_rxbuf_init failed %d\n",
1475177595Sweongyo			    __func__, error);
1476177595Sweongyo			return error;
1477177595Sweongyo		}
1478177595Sweongyo		if (prev != NULL) {
1479177595Sweongyo			ds = prev->bf_desc;
1480177595Sweongyo			ds->physnext = htole32(bf->bf_daddr);
1481177595Sweongyo		}
1482177595Sweongyo		prev = bf;
1483177595Sweongyo	}
1484177595Sweongyo	if (prev != NULL) {
1485177595Sweongyo		ds = prev->bf_desc;
1486177595Sweongyo		ds->physnext =
1487177595Sweongyo		    htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1488177595Sweongyo	}
1489177595Sweongyo
1490177595Sweongyo	sc->malo_recvsetup = 1;
1491177595Sweongyo
1492177595Sweongyo	malo_mode_init(sc);		/* set filters, etc. */
1493177595Sweongyo
1494177595Sweongyo	return 0;
1495177595Sweongyo}
1496177595Sweongyo
1497177595Sweongyostatic void
1498178354Ssammalo_init_locked(struct malo_softc *sc)
1499177595Sweongyo{
1500177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1501177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1502177595Sweongyo	int error;
1503177595Sweongyo
1504177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1505177595Sweongyo	    __func__, ifp->if_flags);
1506177595Sweongyo
1507178354Ssam	MALO_LOCK_ASSERT(sc);
1508177595Sweongyo
1509177595Sweongyo	/*
1510177595Sweongyo	 * Stop anything previously setup.  This is safe whether this is
1511177595Sweongyo	 * the first time through or not.
1512177595Sweongyo	 */
1513177595Sweongyo	malo_stop_locked(ifp, 0);
1514177595Sweongyo
1515177595Sweongyo	/*
1516177595Sweongyo	 * Push state to the firmware.
1517177595Sweongyo	 */
1518177595Sweongyo	if (!malo_hal_reset(sc)) {
1519177595Sweongyo		if_printf(ifp, "%s: unable to reset hardware\n", __func__);
1520178354Ssam		return;
1521177595Sweongyo	}
1522177595Sweongyo
1523177595Sweongyo	/*
1524177595Sweongyo	 * Setup recv (once); transmit is already good to go.
1525177595Sweongyo	 */
1526177595Sweongyo	error = malo_startrecv(sc);
1527177595Sweongyo	if (error != 0) {
1528177595Sweongyo		if_printf(ifp, "%s: unable to start recv logic, error %d\n",
1529177595Sweongyo		    __func__, error);
1530178354Ssam		return;
1531177595Sweongyo	}
1532177595Sweongyo
1533177595Sweongyo	/*
1534177595Sweongyo	 * Enable interrupts.
1535177595Sweongyo	 */
1536177595Sweongyo	sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1537177595Sweongyo	    | MALO_A2HRIC_BIT_TX_DONE
1538177595Sweongyo	    | MALO_A2HRIC_BIT_OPC_DONE
1539177595Sweongyo	    | MALO_A2HRIC_BIT_MAC_EVENT
1540177595Sweongyo	    | MALO_A2HRIC_BIT_RX_PROBLEM
1541177595Sweongyo	    | MALO_A2HRIC_BIT_ICV_ERROR
1542177595Sweongyo	    | MALO_A2HRIC_BIT_RADAR_DETECT
1543177595Sweongyo	    | MALO_A2HRIC_BIT_CHAN_SWITCH;
1544177595Sweongyo
1545177595Sweongyo	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1546177595Sweongyo	malo_hal_intrset(mh, sc->malo_imask);
1547199559Sjhb	callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1548178354Ssam}
1549177595Sweongyo
1550178354Ssamstatic void
1551178354Ssammalo_init(void *arg)
1552178354Ssam{
1553178354Ssam	struct malo_softc *sc = (struct malo_softc *) arg;
1554178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1555178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1556178354Ssam
1557178354Ssam	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1558178354Ssam	    __func__, ifp->if_flags);
1559177595Sweongyo
1560178354Ssam	MALO_LOCK(sc);
1561178354Ssam	malo_init_locked(sc);
1562177595Sweongyo
1563177595Sweongyo	MALO_UNLOCK(sc);
1564177595Sweongyo
1565178354Ssam	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1566178354Ssam		ieee80211_start_all(ic);	/* start all vap's */
1567177595Sweongyo}
1568177595Sweongyo
1569177595Sweongyo/*
1570177595Sweongyo * Set the multicast filter contents into the hardware.
1571177595Sweongyo */
1572177595Sweongyostatic void
1573177595Sweongyomalo_setmcastfilter(struct malo_softc *sc)
1574177595Sweongyo{
1575178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1576178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1577177595Sweongyo	struct ifmultiaddr *ifma;
1578177595Sweongyo	uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1579177595Sweongyo	uint8_t *mp;
1580177595Sweongyo	int nmc;
1581177595Sweongyo
1582177595Sweongyo	mp = macs;
1583177595Sweongyo	nmc = 0;
1584177595Sweongyo
1585177595Sweongyo	if (ic->ic_opmode == IEEE80211_M_MONITOR ||
1586177595Sweongyo	    (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)))
1587177595Sweongyo		goto all;
1588177595Sweongyo
1589195049Srwatson	if_maddr_rlock(ifp);
1590177595Sweongyo	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1591177595Sweongyo		if (ifma->ifma_addr->sa_family != AF_LINK)
1592177595Sweongyo			continue;
1593177595Sweongyo
1594177595Sweongyo		if (nmc == MALO_HAL_MCAST_MAX) {
1595177595Sweongyo			ifp->if_flags |= IFF_ALLMULTI;
1596195049Srwatson			if_maddr_runlock(ifp);
1597177595Sweongyo			goto all;
1598177595Sweongyo		}
1599177595Sweongyo		IEEE80211_ADDR_COPY(mp,
1600177595Sweongyo		    LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
1601177595Sweongyo
1602177595Sweongyo		mp += IEEE80211_ADDR_LEN, nmc++;
1603177595Sweongyo	}
1604195049Srwatson	if_maddr_runlock(ifp);
1605177595Sweongyo
1606177595Sweongyo	malo_hal_setmcast(sc->malo_mh, nmc, macs);
1607177595Sweongyo
1608177595Sweongyoall:
1609177595Sweongyo	/*
1610177595Sweongyo	 * XXX we don't know how to set the f/w for supporting
1611177595Sweongyo	 * IFF_ALLMULTI | IFF_PROMISC cases
1612177595Sweongyo	 */
1613177595Sweongyo	return;
1614177595Sweongyo}
1615177595Sweongyo
1616177595Sweongyostatic int
1617177595Sweongyomalo_mode_init(struct malo_softc *sc)
1618177595Sweongyo{
1619178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1620178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1621177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1622177595Sweongyo
1623177595Sweongyo	/*
1624177595Sweongyo	 * NB: Ignore promisc in hostap mode; it's set by the
1625177595Sweongyo	 * bridge.  This is wrong but we have no way to
1626177595Sweongyo	 * identify internal requests (from the bridge)
1627177595Sweongyo	 * versus external requests such as for tcpdump.
1628177595Sweongyo	 */
1629177595Sweongyo	malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) &&
1630177595Sweongyo	    ic->ic_opmode != IEEE80211_M_HOSTAP);
1631177595Sweongyo	malo_setmcastfilter(sc);
1632177595Sweongyo
1633177595Sweongyo	return ENXIO;
1634177595Sweongyo}
1635177595Sweongyo
1636177595Sweongyostatic void
1637177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1638177595Sweongyo{
1639177595Sweongyo	struct ieee80211_node *ni;
1640177595Sweongyo	struct malo_txbuf *bf;
1641177595Sweongyo	u_int ix;
1642177595Sweongyo
1643177595Sweongyo	/*
1644177595Sweongyo	 * NB: this assumes output has been stopped and
1645177595Sweongyo	 *     we do not need to block malo_tx_tasklet
1646177595Sweongyo	 */
1647177595Sweongyo	for (ix = 0;; ix++) {
1648177595Sweongyo		MALO_TXQ_LOCK(txq);
1649177595Sweongyo		bf = STAILQ_FIRST(&txq->active);
1650177595Sweongyo		if (bf == NULL) {
1651177595Sweongyo			MALO_TXQ_UNLOCK(txq);
1652177595Sweongyo			break;
1653177595Sweongyo		}
1654177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1655177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1656177595Sweongyo#ifdef MALO_DEBUG
1657177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_RESET) {
1658178354Ssam			struct ifnet *ifp = sc->malo_ifp;
1659178354Ssam			struct ieee80211com *ic = ifp->if_l2com;
1660177595Sweongyo			const struct malo_txrec *tr =
1661177595Sweongyo			    mtod(bf->bf_m, const struct malo_txrec *);
1662177595Sweongyo			malo_printtxbuf(bf, txq->qnum, ix);
1663178354Ssam			ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1664177595Sweongyo			    bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1665177595Sweongyo		}
1666177595Sweongyo#endif /* MALO_DEBUG */
1667177595Sweongyo		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1668177595Sweongyo		ni = bf->bf_node;
1669177595Sweongyo		bf->bf_node = NULL;
1670177595Sweongyo		if (ni != NULL) {
1671177595Sweongyo			/*
1672177595Sweongyo			 * Reclaim node reference.
1673177595Sweongyo			 */
1674177595Sweongyo			ieee80211_free_node(ni);
1675177595Sweongyo		}
1676177595Sweongyo		m_freem(bf->bf_m);
1677177595Sweongyo		bf->bf_m = NULL;
1678177595Sweongyo
1679177595Sweongyo		MALO_TXQ_LOCK(txq);
1680177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1681177595Sweongyo		txq->nfree++;
1682177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1683177595Sweongyo	}
1684177595Sweongyo}
1685177595Sweongyo
1686177595Sweongyostatic void
1687177595Sweongyomalo_stop_locked(struct ifnet *ifp, int disable)
1688177595Sweongyo{
1689177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1690177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1691178354Ssam	int i;
1692177595Sweongyo
1693177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1694177595Sweongyo	    __func__, sc->malo_invalid, ifp->if_flags);
1695177595Sweongyo
1696177595Sweongyo	MALO_LOCK_ASSERT(sc);
1697177595Sweongyo
1698177595Sweongyo	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1699177595Sweongyo		return;
1700177595Sweongyo
1701177595Sweongyo	/*
1702177595Sweongyo	 * Shutdown the hardware and driver:
1703177595Sweongyo	 *    disable interrupts
1704177595Sweongyo	 *    turn off the radio
1705177595Sweongyo	 *    drain and release tx queues
1706177595Sweongyo	 *
1707177595Sweongyo	 * Note that some of this work is not possible if the hardware
1708177595Sweongyo	 * is gone (invalid).
1709177595Sweongyo	 */
1710177595Sweongyo	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1711199559Sjhb	callout_stop(&sc->malo_watchdog_timer);
1712199559Sjhb	sc->malo_timer = 0;
1713178354Ssam	/* diable interrupt.  */
1714178354Ssam	malo_hal_intrset(mh, 0);
1715178354Ssam	/* turn off the radio.  */
1716178354Ssam	malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1717177595Sweongyo
1718177595Sweongyo	/* drain and release tx queues.  */
1719177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1720177595Sweongyo		malo_tx_draintxq(sc, &sc->malo_txq[i]);
1721177595Sweongyo}
1722177595Sweongyo
1723177595Sweongyostatic int
1724177595Sweongyomalo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1725177595Sweongyo{
1726177595Sweongyo#define	MALO_IS_RUNNING(ifp) \
1727177595Sweongyo	((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
1728177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1729178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1730178354Ssam	struct ifreq *ifr = (struct ifreq *) data;
1731178354Ssam	int error = 0, startall = 0;
1732177595Sweongyo
1733177595Sweongyo	MALO_LOCK(sc);
1734177595Sweongyo	switch (cmd) {
1735177595Sweongyo	case SIOCSIFFLAGS:
1736177595Sweongyo		if (MALO_IS_RUNNING(ifp)) {
1737177595Sweongyo			/*
1738177595Sweongyo			 * To avoid rescanning another access point,
1739177595Sweongyo			 * do not call malo_init() here.  Instead,
1740177595Sweongyo			 * only reflect promisc mode settings.
1741177595Sweongyo			 */
1742177595Sweongyo			malo_mode_init(sc);
1743177595Sweongyo		} else if (ifp->if_flags & IFF_UP) {
1744177595Sweongyo			/*
1745177595Sweongyo			 * Beware of being called during attach/detach
1746177595Sweongyo			 * to reset promiscuous mode.  In that case we
1747177595Sweongyo			 * will still be marked UP but not RUNNING.
1748177595Sweongyo			 * However trying to re-init the interface
1749177595Sweongyo			 * is the wrong thing to do as we've already
1750177595Sweongyo			 * torn down much of our state.  There's
1751177595Sweongyo			 * probably a better way to deal with this.
1752177595Sweongyo			 */
1753178354Ssam			if (!sc->malo_invalid) {
1754178354Ssam				malo_init_locked(sc);
1755178354Ssam				startall = 1;
1756178354Ssam			}
1757177595Sweongyo		} else
1758177595Sweongyo			malo_stop_locked(ifp, 1);
1759177595Sweongyo		break;
1760178354Ssam	case SIOCGIFMEDIA:
1761178354Ssam	case SIOCSIFMEDIA:
1762178354Ssam		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1763177595Sweongyo		break;
1764177595Sweongyo	default:
1765178354Ssam		error = ether_ioctl(ifp, cmd, data);
1766177595Sweongyo		break;
1767177595Sweongyo	}
1768177595Sweongyo	MALO_UNLOCK(sc);
1769177595Sweongyo
1770178354Ssam	if (startall)
1771178354Ssam		ieee80211_start_all(ic);
1772177595Sweongyo	return error;
1773177595Sweongyo#undef MALO_IS_RUNNING
1774177595Sweongyo}
1775177595Sweongyo
1776177595Sweongyo/*
1777177595Sweongyo * Callback from the 802.11 layer to update the slot time
1778177595Sweongyo * based on the current setting.  We use it to notify the
1779177595Sweongyo * firmware of ERP changes and the f/w takes care of things
1780177595Sweongyo * like slot time and preamble.
1781177595Sweongyo */
1782177595Sweongyostatic void
1783177595Sweongyomalo_updateslot(struct ifnet *ifp)
1784177595Sweongyo{
1785177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1786178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1787177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1788177595Sweongyo	int error;
1789177595Sweongyo
1790177595Sweongyo	/* NB: can be called early; suppress needless cmds */
1791177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1792177595Sweongyo		return;
1793177595Sweongyo
1794177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET,
1795177595Sweongyo	    "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1796177595Sweongyo	    __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1797177595Sweongyo	    ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1798177595Sweongyo
1799177595Sweongyo	if (ic->ic_flags & IEEE80211_F_SHSLOT)
1800177595Sweongyo		error = malo_hal_set_slot(mh, 1);
1801177595Sweongyo	else
1802177595Sweongyo		error = malo_hal_set_slot(mh, 0);
1803177595Sweongyo
1804177595Sweongyo	if (error != 0)
1805177595Sweongyo		device_printf(sc->malo_dev, "setting %s slot failed\n",
1806177595Sweongyo			ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1807177595Sweongyo}
1808177595Sweongyo
1809177595Sweongyostatic int
1810178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1811177595Sweongyo{
1812178354Ssam	struct ieee80211com *ic = vap->iv_ic;
1813178354Ssam	struct malo_softc *sc = ic->ic_ifp->if_softc;
1814177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1815177595Sweongyo	int error;
1816177595Sweongyo
1817177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1818178354Ssam	    ieee80211_state_name[vap->iv_state],
1819177595Sweongyo	    ieee80211_state_name[nstate]);
1820177595Sweongyo
1821177595Sweongyo	/*
1822178354Ssam	 * Invoke the net80211 layer first so iv_bss is setup.
1823177595Sweongyo	 */
1824178354Ssam	error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1825178354Ssam	if (error != 0)
1826178354Ssam		return error;
1827178354Ssam
1828178354Ssam	if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1829178354Ssam		struct ieee80211_node *ni = vap->iv_bss;
1830178354Ssam		enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1831178354Ssam		const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1832178354Ssam
1833177595Sweongyo		DPRINTF(sc, MALO_DEBUG_STATE,
1834178354Ssam		    "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1835178354Ssam		    "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1836178354Ssam		    vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1837177595Sweongyo		    ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1838178354Ssam		    ieee80211_chan2ieee(ic, ic->ic_curchan),
1839178354Ssam		    ni->ni_associd, mode, tp->ucastrate);
1840177595Sweongyo
1841178354Ssam		malo_hal_setradio(mh, 1,
1842178354Ssam		    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1843178354Ssam			MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1844178354Ssam		malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1845178354Ssam		malo_hal_set_rate(mh, mode,
1846178354Ssam		   tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1847178354Ssam		       0 : malo_fix2rate(tp->ucastrate));
1848177595Sweongyo	}
1849178354Ssam	return 0;
1850177595Sweongyo}
1851177595Sweongyo
1852177595Sweongyostatic int
1853177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1854177595Sweongyo	const struct ieee80211_bpf_params *params)
1855177595Sweongyo{
1856177595Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1857177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
1858177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1859177595Sweongyo	struct malo_txbuf *bf;
1860177595Sweongyo	struct malo_txq *txq;
1861177595Sweongyo
1862177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) {
1863177595Sweongyo		ieee80211_free_node(ni);
1864177595Sweongyo		m_freem(m);
1865177595Sweongyo		return ENETDOWN;
1866177595Sweongyo	}
1867177595Sweongyo
1868177595Sweongyo	/*
1869177595Sweongyo	 * Grab a TX buffer and associated resources.  Note that we depend
1870177595Sweongyo	 * on the classification by the 802.11 layer to get to the right h/w
1871177595Sweongyo	 * queue.  Management frames must ALWAYS go on queue 1 but we
1872177595Sweongyo	 * cannot just force that here because we may receive non-mgt frames.
1873177595Sweongyo	 */
1874177595Sweongyo	txq = &sc->malo_txq[0];
1875177595Sweongyo	bf = malo_getbuf(sc, txq);
1876177595Sweongyo	if (bf == NULL) {
1877177595Sweongyo		/* XXX blocks other traffic */
1878177595Sweongyo		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1879177595Sweongyo		ieee80211_free_node(ni);
1880177595Sweongyo		m_freem(m);
1881177595Sweongyo		return ENOBUFS;
1882177595Sweongyo	}
1883177595Sweongyo
1884177595Sweongyo	/*
1885177595Sweongyo	 * Pass the frame to the h/w for transmission.
1886177595Sweongyo	 */
1887177595Sweongyo	if (malo_tx_start(sc, ni, bf, m) != 0) {
1888177595Sweongyo		ifp->if_oerrors++;
1889177595Sweongyo		bf->bf_m = NULL;
1890177595Sweongyo		bf->bf_node = NULL;
1891177595Sweongyo		MALO_TXQ_LOCK(txq);
1892177595Sweongyo		STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1893177595Sweongyo		txq->nfree++;
1894177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1895177595Sweongyo
1896177595Sweongyo		ieee80211_free_node(ni);
1897177595Sweongyo		return EIO;		/* XXX */
1898177595Sweongyo	}
1899177595Sweongyo
1900177595Sweongyo	/*
1901177595Sweongyo	 * NB: We don't need to lock against tx done because this just
1902177595Sweongyo	 * prods the firmware to check the transmit descriptors.  The firmware
1903177595Sweongyo	 * will also start fetching descriptors by itself if it notices
1904177595Sweongyo	 * new ones are present when it goes to deliver a tx done interrupt
1905177595Sweongyo	 * to the host. So if we race with tx done processing it's ok.
1906177595Sweongyo	 * Delivering the kick here rather than in malo_tx_start is
1907177595Sweongyo	 * an optimization to avoid poking the firmware for each packet.
1908177595Sweongyo	 *
1909177595Sweongyo	 * NB: the queue id isn't used so 0 is ok.
1910177595Sweongyo	 */
1911177595Sweongyo	malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1912177595Sweongyo
1913177595Sweongyo	return 0;
1914177595Sweongyo}
1915177595Sweongyo
1916177595Sweongyostatic void
1917177595Sweongyomalo_sysctlattach(struct malo_softc *sc)
1918177595Sweongyo{
1919177595Sweongyo#ifdef	MALO_DEBUG
1920177595Sweongyo	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1921177595Sweongyo	struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1922177595Sweongyo
1923177595Sweongyo	sc->malo_debug = malo_debug;
1924177595Sweongyo	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1925177595Sweongyo		"debug", CTLFLAG_RW, &sc->malo_debug, 0,
1926177595Sweongyo		"control debugging printfs");
1927177595Sweongyo#endif
1928177595Sweongyo}
1929177595Sweongyo
1930177595Sweongyostatic void
1931177595Sweongyomalo_announce(struct malo_softc *sc)
1932177595Sweongyo{
1933177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1934177595Sweongyo
1935177595Sweongyo	if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1936177595Sweongyo		sc->malo_hwspecs.hwversion,
1937177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1938177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1939177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1940177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1941177595Sweongyo		sc->malo_hwspecs.regioncode);
1942177595Sweongyo
1943177595Sweongyo	if (bootverbose || malo_rxbuf != MALO_RXBUF)
1944177595Sweongyo		if_printf(ifp, "using %u rx buffers\n", malo_rxbuf);
1945177595Sweongyo	if (bootverbose || malo_txbuf != MALO_TXBUF)
1946177595Sweongyo		if_printf(ifp, "using %u tx buffers\n", malo_txbuf);
1947177595Sweongyo}
1948177595Sweongyo
1949177595Sweongyo/*
1950177595Sweongyo * Convert net80211 channel to a HAL channel.
1951177595Sweongyo */
1952177595Sweongyostatic void
1953177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1954177595Sweongyo{
1955177595Sweongyo	hc->channel = chan->ic_ieee;
1956177595Sweongyo
1957177595Sweongyo	*(uint32_t *)&hc->flags = 0;
1958177595Sweongyo	if (IEEE80211_IS_CHAN_2GHZ(chan))
1959177595Sweongyo		hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1960177595Sweongyo}
1961177595Sweongyo
1962177595Sweongyo/*
1963177595Sweongyo * Set/change channels.  If the channel is really being changed,
1964177595Sweongyo * it's done by reseting the chip.  To accomplish this we must
1965177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la
1966177595Sweongyo * malo_init.
1967177595Sweongyo */
1968177595Sweongyostatic int
1969177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1970177595Sweongyo{
1971177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1972177595Sweongyo	struct malo_hal_channel hchan;
1973177595Sweongyo
1974177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1975177595Sweongyo	    __func__, chan->ic_freq, chan->ic_flags);
1976177595Sweongyo
1977177595Sweongyo	/*
1978177595Sweongyo	 * Convert to a HAL channel description with the flags constrained
1979177595Sweongyo	 * to reflect the current operating mode.
1980177595Sweongyo	 */
1981177595Sweongyo	malo_mapchan(&hchan, chan);
1982177595Sweongyo	malo_hal_intrset(mh, 0);		/* disable interrupts */
1983177595Sweongyo	malo_hal_setchannel(mh, &hchan);
1984177595Sweongyo	malo_hal_settxpower(mh, &hchan);
1985177595Sweongyo
1986177595Sweongyo	/*
1987177595Sweongyo	 * Update internal state.
1988177595Sweongyo	 */
1989177595Sweongyo	sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1990177595Sweongyo	sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1991177595Sweongyo	if (IEEE80211_IS_CHAN_ANYG(chan)) {
1992177595Sweongyo		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1993177595Sweongyo		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1994177595Sweongyo	} else {
1995177595Sweongyo		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1996177595Sweongyo		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1997177595Sweongyo	}
1998177595Sweongyo	sc->malo_curchan = hchan;
1999177595Sweongyo	malo_hal_intrset(mh, sc->malo_imask);
2000177595Sweongyo
2001177595Sweongyo	return 0;
2002177595Sweongyo}
2003177595Sweongyo
2004177595Sweongyostatic void
2005177595Sweongyomalo_scan_start(struct ieee80211com *ic)
2006177595Sweongyo{
2007177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2008177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2009177595Sweongyo
2010177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2011177595Sweongyo}
2012177595Sweongyo
2013177595Sweongyostatic void
2014177595Sweongyomalo_scan_end(struct ieee80211com *ic)
2015177595Sweongyo{
2016177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2017177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2018177595Sweongyo
2019177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2020177595Sweongyo}
2021177595Sweongyo
2022177595Sweongyostatic void
2023177595Sweongyomalo_set_channel(struct ieee80211com *ic)
2024177595Sweongyo{
2025177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2026177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2027177595Sweongyo
2028177595Sweongyo	(void) malo_chan_set(sc, ic->ic_curchan);
2029177595Sweongyo}
2030177595Sweongyo
2031177595Sweongyostatic void
2032177595Sweongyomalo_rx_proc(void *arg, int npending)
2033177595Sweongyo{
2034177595Sweongyo#define	IEEE80211_DIR_DSTODS(wh)					\
2035177595Sweongyo	((((const struct ieee80211_frame *)wh)->i_fc[1] &		\
2036177595Sweongyo	    IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
2037177595Sweongyo	struct malo_softc *sc = arg;
2038178354Ssam	struct ifnet *ifp = sc->malo_ifp;
2039178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2040177595Sweongyo	struct malo_rxbuf *bf;
2041177595Sweongyo	struct malo_rxdesc *ds;
2042177595Sweongyo	struct mbuf *m, *mnew;
2043177595Sweongyo	struct ieee80211_qosframe *wh;
2044177595Sweongyo	struct ieee80211_qosframe_addr4 *wh4;
2045177595Sweongyo	struct ieee80211_node *ni;
2046177595Sweongyo	int off, len, hdrlen, pktlen, rssi, ntodo;
2047177595Sweongyo	uint8_t *data, status;
2048177595Sweongyo	uint32_t readptr, writeptr;
2049177595Sweongyo
2050177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RX_PROC,
2051177595Sweongyo	    "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
2052177595Sweongyo	    __func__, npending,
2053177595Sweongyo	    sc->malo_hwspecs.rxdesc_read,
2054177595Sweongyo	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
2055177595Sweongyo	    sc->malo_hwspecs.rxdesc_write,
2056177595Sweongyo	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
2057177595Sweongyo
2058177595Sweongyo	readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
2059177595Sweongyo	writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
2060177595Sweongyo	if (readptr == writeptr)
2061177595Sweongyo		return;
2062177595Sweongyo
2063177595Sweongyo	bf = sc->malo_rxnext;
2064178354Ssam	for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
2065177595Sweongyo		if (bf == NULL) {
2066177595Sweongyo			bf = STAILQ_FIRST(&sc->malo_rxbuf);
2067177595Sweongyo			break;
2068177595Sweongyo		}
2069177595Sweongyo		ds = bf->bf_desc;
2070177595Sweongyo		if (bf->bf_m == NULL) {
2071177595Sweongyo			/*
2072177595Sweongyo			 * If data allocation failed previously there
2073177595Sweongyo			 * will be no buffer; try again to re-populate it.
2074177595Sweongyo			 * Note the firmware will not advance to the next
2075177595Sweongyo			 * descriptor with a dma buffer so we must mimic
2076177595Sweongyo			 * this or we'll get out of sync.
2077177595Sweongyo			 */
2078177595Sweongyo			DPRINTF(sc, MALO_DEBUG_ANY,
2079177595Sweongyo			    "%s: rx buf w/o dma memory\n", __func__);
2080177595Sweongyo			(void)malo_rxbuf_init(sc, bf);
2081177595Sweongyo			break;
2082177595Sweongyo		}
2083177595Sweongyo		MALO_RXDESC_SYNC(sc, ds,
2084177595Sweongyo		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2085177595Sweongyo		if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
2086177595Sweongyo			break;
2087177595Sweongyo
2088177595Sweongyo		readptr = le32toh(ds->physnext);
2089177595Sweongyo
2090177595Sweongyo#ifdef MALO_DEBUG
2091177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
2092177595Sweongyo			malo_printrxbuf(bf, 0);
2093177595Sweongyo#endif
2094177595Sweongyo		status = ds->status;
2095177595Sweongyo		if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
2096177595Sweongyo			ifp->if_ierrors++;
2097177595Sweongyo			goto rx_next;
2098177595Sweongyo		}
2099177595Sweongyo		/*
2100177595Sweongyo		 * Sync the data buffer.
2101177595Sweongyo		 */
2102177595Sweongyo		len = le16toh(ds->pktlen);
2103177595Sweongyo		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2104177595Sweongyo		    BUS_DMASYNC_POSTREAD);
2105177595Sweongyo		/*
2106177595Sweongyo		 * The 802.11 header is provided all or in part at the front;
2107177595Sweongyo		 * use it to calculate the true size of the header that we'll
2108177595Sweongyo		 * construct below.  We use this to figure out where to copy
2109177595Sweongyo		 * payload prior to constructing the header.
2110177595Sweongyo		 */
2111177595Sweongyo		m = bf->bf_m;
2112201758Smbr		data = mtod(m, uint8_t *);
2113177595Sweongyo		hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2114177595Sweongyo		off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2115177595Sweongyo
2116177595Sweongyo		/*
2117178354Ssam		 * Calculate RSSI. XXX wrong
2118177595Sweongyo		 */
2119177595Sweongyo		rssi = 2 * ((int) ds->snr - ds->nf);	/* NB: .5 dBm  */
2120177595Sweongyo		if (rssi > 100)
2121177595Sweongyo			rssi = 100;
2122177595Sweongyo
2123177595Sweongyo		pktlen = hdrlen + (len - off);
2124177595Sweongyo		/*
2125177595Sweongyo		 * NB: we know our frame is at least as large as
2126177595Sweongyo		 * IEEE80211_MIN_LEN because there is a 4-address frame at
2127177595Sweongyo		 * the front.  Hence there's no need to vet the packet length.
2128177595Sweongyo		 * If the frame in fact is too small it should be discarded
2129177595Sweongyo		 * at the net80211 layer.
2130177595Sweongyo		 */
2131177595Sweongyo
2132177595Sweongyo		/* XXX don't need mbuf, just dma buffer */
2133177595Sweongyo		mnew = malo_getrxmbuf(sc, bf);
2134177595Sweongyo		if (mnew == NULL) {
2135177595Sweongyo			ifp->if_ierrors++;
2136177595Sweongyo			goto rx_next;
2137177595Sweongyo		}
2138177595Sweongyo		/*
2139177595Sweongyo		 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2140177595Sweongyo		 * re-setup the rx descriptor using the replacement dma
2141177595Sweongyo		 * buffer we just installed above.
2142177595Sweongyo		 */
2143177595Sweongyo		bf->bf_m = mnew;
2144177595Sweongyo		m->m_data += off - hdrlen;
2145177595Sweongyo		m->m_pkthdr.len = m->m_len = pktlen;
2146177595Sweongyo		m->m_pkthdr.rcvif = ifp;
2147177595Sweongyo
2148177595Sweongyo		/*
2149177595Sweongyo		 * Piece 802.11 header together.
2150177595Sweongyo		 */
2151177595Sweongyo		wh = mtod(m, struct ieee80211_qosframe *);
2152177595Sweongyo		/* NB: don't need to do this sometimes but ... */
2153177595Sweongyo		/* XXX special case so we can memcpy after m_devget? */
2154177595Sweongyo		ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2155177595Sweongyo		if (IEEE80211_QOS_HAS_SEQ(wh)) {
2156177595Sweongyo			if (IEEE80211_DIR_DSTODS(wh)) {
2157177595Sweongyo				wh4 = mtod(m,
2158177595Sweongyo				    struct ieee80211_qosframe_addr4*);
2159177595Sweongyo				*(uint16_t *)wh4->i_qos = ds->qosctrl;
2160177595Sweongyo			} else {
2161177595Sweongyo				*(uint16_t *)wh->i_qos = ds->qosctrl;
2162177595Sweongyo			}
2163177595Sweongyo		}
2164192468Ssam		if (ieee80211_radiotap_active(ic)) {
2165177595Sweongyo			sc->malo_rx_th.wr_flags = 0;
2166177595Sweongyo			sc->malo_rx_th.wr_rate = ds->rate;
2167177595Sweongyo			sc->malo_rx_th.wr_antsignal = rssi;
2168177595Sweongyo			sc->malo_rx_th.wr_antnoise = ds->nf;
2169177595Sweongyo		}
2170177595Sweongyo#ifdef MALO_DEBUG
2171177595Sweongyo		if (IFF_DUMPPKTS_RECV(sc, wh)) {
2172177595Sweongyo			ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2173177595Sweongyo			    len, ds->rate, rssi);
2174177595Sweongyo		}
2175177595Sweongyo#endif
2176177595Sweongyo		ifp->if_ipackets++;
2177177595Sweongyo
2178177595Sweongyo		/* dispatch */
2179177595Sweongyo		ni = ieee80211_find_rxnode(ic,
2180178354Ssam		    (struct ieee80211_frame_min *)wh);
2181178354Ssam		if (ni != NULL) {
2182192468Ssam			(void) ieee80211_input(ni, m, rssi, ds->nf);
2183178354Ssam			ieee80211_free_node(ni);
2184178354Ssam		} else
2185192468Ssam			(void) ieee80211_input_all(ic, m, rssi, ds->nf);
2186177595Sweongyorx_next:
2187177595Sweongyo		/* NB: ignore ENOMEM so we process more descriptors */
2188177595Sweongyo		(void) malo_rxbuf_init(sc, bf);
2189177595Sweongyo		bf = STAILQ_NEXT(bf, bf_list);
2190177595Sweongyo	}
2191177595Sweongyo
2192177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2193177595Sweongyo	sc->malo_rxnext = bf;
2194177595Sweongyo
2195177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2196177595Sweongyo	    !IFQ_IS_EMPTY(&ifp->if_snd))
2197177595Sweongyo		malo_start(ifp);
2198177595Sweongyo#undef IEEE80211_DIR_DSTODS
2199177595Sweongyo}
2200177595Sweongyo
2201177595Sweongyostatic void
2202177595Sweongyomalo_stop(struct ifnet *ifp, int disable)
2203177595Sweongyo{
2204177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2205177595Sweongyo
2206177595Sweongyo	MALO_LOCK(sc);
2207177595Sweongyo	malo_stop_locked(ifp, disable);
2208177595Sweongyo	MALO_UNLOCK(sc);
2209177595Sweongyo}
2210177595Sweongyo
2211177595Sweongyo/*
2212177595Sweongyo * Reclaim all tx queue resources.
2213177595Sweongyo */
2214177595Sweongyostatic void
2215177595Sweongyomalo_tx_cleanup(struct malo_softc *sc)
2216177595Sweongyo{
2217177595Sweongyo	int i;
2218177595Sweongyo
2219177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2220177595Sweongyo		malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2221177595Sweongyo}
2222177595Sweongyo
2223177595Sweongyoint
2224177595Sweongyomalo_detach(struct malo_softc *sc)
2225177595Sweongyo{
2226177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
2227178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2228177595Sweongyo
2229177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2230177595Sweongyo		__func__, ifp->if_flags);
2231177595Sweongyo
2232177595Sweongyo	malo_stop(ifp, 1);
2233177595Sweongyo
2234177595Sweongyo	if (sc->malo_tq != NULL) {
2235177595Sweongyo		taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2236177595Sweongyo		taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2237177595Sweongyo		taskqueue_free(sc->malo_tq);
2238177595Sweongyo		sc->malo_tq = NULL;
2239177595Sweongyo	}
2240177595Sweongyo
2241177595Sweongyo	/*
2242177595Sweongyo	 * NB: the order of these is important:
2243177595Sweongyo	 * o call the 802.11 layer before detaching the hal to
2244177595Sweongyo	 *   insure callbacks into the driver to delete global
2245177595Sweongyo	 *   key cache entries can be handled
2246177595Sweongyo	 * o reclaim the tx queue data structures after calling
2247177595Sweongyo	 *   the 802.11 layer as we'll get called back to reclaim
2248177595Sweongyo	 *   node state and potentially want to use them
2249177595Sweongyo	 * o to cleanup the tx queues the hal is called, so detach
2250177595Sweongyo	 *   it last
2251177595Sweongyo	 * Other than that, it's straightforward...
2252177595Sweongyo	 */
2253178354Ssam	ieee80211_ifdetach(ic);
2254199559Sjhb	callout_drain(&sc->malo_watchdog_timer);
2255177595Sweongyo	malo_dma_cleanup(sc);
2256177595Sweongyo	malo_tx_cleanup(sc);
2257177595Sweongyo	malo_hal_detach(sc->malo_mh);
2258177595Sweongyo	if_free(ifp);
2259177595Sweongyo
2260177595Sweongyo	MALO_LOCK_DESTROY(sc);
2261177595Sweongyo
2262177595Sweongyo	return 0;
2263177595Sweongyo}
2264177595Sweongyo
2265177595Sweongyovoid
2266177595Sweongyomalo_shutdown(struct malo_softc *sc)
2267177595Sweongyo{
2268177595Sweongyo	malo_stop(sc->malo_ifp, 1);
2269177595Sweongyo}
2270177595Sweongyo
2271177595Sweongyovoid
2272177595Sweongyomalo_suspend(struct malo_softc *sc)
2273177595Sweongyo{
2274177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
2275177595Sweongyo
2276177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2277177595Sweongyo		__func__, ifp->if_flags);
2278177595Sweongyo
2279177595Sweongyo	malo_stop(ifp, 1);
2280177595Sweongyo}
2281177595Sweongyo
2282177595Sweongyovoid
2283177595Sweongyomalo_resume(struct malo_softc *sc)
2284177595Sweongyo{
2285177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
2286177595Sweongyo
2287177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2288177595Sweongyo		__func__, ifp->if_flags);
2289177595Sweongyo
2290178354Ssam	if (ifp->if_flags & IFF_UP)
2291177595Sweongyo		malo_init(sc);
2292177595Sweongyo}
2293