if_malo.c revision 227293
1177595Sweongyo/*- 2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc. 4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting 5177595Sweongyo * All rights reserved. 6177595Sweongyo * 7177595Sweongyo * Redistribution and use in source and binary forms, with or without 8177595Sweongyo * modification, are permitted provided that the following conditions 9177595Sweongyo * are met: 10177595Sweongyo * 1. Redistributions of source code must retain the above copyright 11177595Sweongyo * notice, this list of conditions and the following disclaimer, 12177595Sweongyo * without modification. 13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14177595Sweongyo * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15177595Sweongyo * redistribution must be conditioned upon including a substantially 16177595Sweongyo * similar Disclaimer requirement for further binary redistribution. 17177595Sweongyo * 18177595Sweongyo * NO WARRANTY 19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES. 30177595Sweongyo */ 31177595Sweongyo 32177595Sweongyo#include <sys/cdefs.h> 33177595Sweongyo#ifdef __FreeBSD__ 34177595Sweongyo__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 227293 2011-11-07 06:44:47Z ed $"); 35177595Sweongyo#endif 36177595Sweongyo 37178354Ssam#include "opt_malo.h" 38178354Ssam 39177595Sweongyo#include <sys/param.h> 40177595Sweongyo#include <sys/endian.h> 41177595Sweongyo#include <sys/kernel.h> 42177595Sweongyo#include <sys/socket.h> 43177595Sweongyo#include <sys/sockio.h> 44177595Sweongyo#include <sys/sysctl.h> 45177595Sweongyo#include <sys/taskqueue.h> 46177595Sweongyo 47177595Sweongyo#include <machine/bus.h> 48177595Sweongyo#include <sys/bus.h> 49177595Sweongyo 50177595Sweongyo#include <net/if.h> 51177595Sweongyo#include <net/if_dl.h> 52177595Sweongyo#include <net/if_media.h> 53177595Sweongyo#include <net/if_types.h> 54177595Sweongyo#include <net/ethernet.h> 55177595Sweongyo 56177595Sweongyo#include <net80211/ieee80211_var.h> 57177595Sweongyo#include <net80211/ieee80211_regdomain.h> 58177595Sweongyo 59177595Sweongyo#include <net/bpf.h> 60177595Sweongyo 61177595Sweongyo#include <dev/malo/if_malo.h> 62177595Sweongyo 63177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64177595Sweongyo "Marvell 88w8335 driver parameters"); 65177595Sweongyo 66177595Sweongyostatic int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68177595Sweongyo 0, "tx buffers to send at once"); 69177595SweongyoTUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70177595Sweongyostatic int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72177595Sweongyo 0, "rx buffers allocated"); 73177595SweongyoTUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74177595Sweongyostatic int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76177595Sweongyo 0, "max rx buffers to process per interrupt"); 77177595SweongyoTUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78177595Sweongyostatic int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80177595Sweongyo 0, "tx buffers allocated"); 81177595SweongyoTUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82177595Sweongyo 83177595Sweongyo#ifdef MALO_DEBUG 84177595Sweongyostatic int malo_debug = 0; 85177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86177595Sweongyo 0, "control debugging printfs"); 87177595SweongyoTUNABLE_INT("hw.malo.debug", &malo_debug); 88177595Sweongyoenum { 89177595Sweongyo MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90177595Sweongyo MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91177595Sweongyo MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92177595Sweongyo MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93177595Sweongyo MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94177595Sweongyo MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95177595Sweongyo MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96177595Sweongyo MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97177595Sweongyo MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98177595Sweongyo MALO_DEBUG_NODE = 0x00000800, /* node management */ 99177595Sweongyo MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100177595Sweongyo MALO_DEBUG_FW = 0x00008000, /* firmware */ 101177595Sweongyo MALO_DEBUG_ANY = 0xffffffff 102177595Sweongyo}; 103177595Sweongyo#define IS_BEACON(wh) \ 104177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105177595Sweongyo IEEE80211_FC0_SUBTYPE_MASK)) == \ 106177595Sweongyo (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107177595Sweongyo#define IFF_DUMPPKTS_RECV(sc, wh) \ 108177595Sweongyo (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109177595Sweongyo ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111177595Sweongyo (IFF_DEBUG|IFF_LINK2)) 112177595Sweongyo#define IFF_DUMPPKTS_XMIT(sc) \ 113177595Sweongyo ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115177595Sweongyo (IFF_DEBUG | IFF_LINK2)) 116177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 117177595Sweongyo if (sc->malo_debug & (m)) \ 118177595Sweongyo printf(fmt, __VA_ARGS__); \ 119177595Sweongyo} while (0) 120177595Sweongyo#else 121177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 122177595Sweongyo (void) sc; \ 123177595Sweongyo} while (0) 124177595Sweongyo#endif 125177595Sweongyo 126227293Sedstatic MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127177595Sweongyo 128178354Ssamstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *ic, 129178354Ssam const char name[IFNAMSIZ], int unit, int opmode, int flags, 130178354Ssam const uint8_t bssid[IEEE80211_ADDR_LEN], 131178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]); 132178354Ssamstatic void malo_vap_delete(struct ieee80211vap *); 133177595Sweongyostatic int malo_dma_setup(struct malo_softc *); 134177595Sweongyostatic int malo_setup_hwdma(struct malo_softc *); 135177595Sweongyostatic void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136177595Sweongyostatic void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137177595Sweongyostatic void malo_start(struct ifnet *); 138199559Sjhbstatic void malo_watchdog(void *); 139177595Sweongyostatic int malo_ioctl(struct ifnet *, u_long, caddr_t); 140177595Sweongyostatic void malo_updateslot(struct ifnet *); 141178354Ssamstatic int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142177595Sweongyostatic void malo_scan_start(struct ieee80211com *); 143177595Sweongyostatic void malo_scan_end(struct ieee80211com *); 144177595Sweongyostatic void malo_set_channel(struct ieee80211com *); 145177595Sweongyostatic int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146177595Sweongyo const struct ieee80211_bpf_params *); 147177595Sweongyostatic void malo_sysctlattach(struct malo_softc *); 148177595Sweongyostatic void malo_announce(struct malo_softc *); 149177595Sweongyostatic void malo_dma_cleanup(struct malo_softc *); 150177595Sweongyostatic void malo_stop_locked(struct ifnet *, int); 151177595Sweongyostatic int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 152177595Sweongyostatic int malo_mode_init(struct malo_softc *); 153177595Sweongyostatic void malo_tx_proc(void *, int); 154177595Sweongyostatic void malo_rx_proc(void *, int); 155177595Sweongyostatic void malo_init(void *); 156177595Sweongyo 157177595Sweongyo/* 158177595Sweongyo * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 159177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at 160177595Sweongyo * malo_attach and there should be no reference to them here. 161177595Sweongyo */ 162177595Sweongyostatic uint32_t 163177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off) 164177595Sweongyo{ 165177595Sweongyo return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 166177595Sweongyo} 167177595Sweongyo 168177595Sweongyostatic void 169177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 170177595Sweongyo{ 171205843Simp DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n", 172205843Simp __func__, (intmax_t)off, val); 173177595Sweongyo 174177595Sweongyo bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 175177595Sweongyo} 176177595Sweongyo 177177595Sweongyoint 178177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc) 179177595Sweongyo{ 180190526Ssam int error; 181178354Ssam struct ieee80211com *ic; 182177595Sweongyo struct ifnet *ifp; 183177595Sweongyo struct malo_hal *mh; 184177595Sweongyo uint8_t bands; 185177595Sweongyo 186178354Ssam ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 187177595Sweongyo if (ifp == NULL) { 188177595Sweongyo device_printf(sc->malo_dev, "can not if_alloc()\n"); 189177595Sweongyo return ENOSPC; 190177595Sweongyo } 191178354Ssam ic = ifp->if_l2com; 192177595Sweongyo 193177595Sweongyo MALO_LOCK_INIT(sc); 194199559Sjhb callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0); 195177595Sweongyo 196177595Sweongyo /* set these up early for if_printf use */ 197177595Sweongyo if_initname(ifp, device_get_name(sc->malo_dev), 198177595Sweongyo device_get_unit(sc->malo_dev)); 199177595Sweongyo 200177595Sweongyo mh = malo_hal_attach(sc->malo_dev, devid, 201177595Sweongyo sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 202177595Sweongyo if (mh == NULL) { 203177595Sweongyo if_printf(ifp, "unable to attach HAL\n"); 204177595Sweongyo error = EIO; 205177595Sweongyo goto bad; 206177595Sweongyo } 207177595Sweongyo sc->malo_mh = mh; 208177595Sweongyo 209178354Ssam /* 210178354Ssam * Load firmware so we can get setup. We arbitrarily pick station 211178354Ssam * firmware; we'll re-load firmware as needed so setting up 212178354Ssam * the wrong mode isn't a big deal. 213178354Ssam */ 214178354Ssam error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 215178354Ssam if (error != 0) { 216178354Ssam if_printf(ifp, "unable to setup firmware\n"); 217178354Ssam goto bad1; 218178354Ssam } 219178354Ssam /* XXX gethwspecs() extracts correct informations? not maybe! */ 220178354Ssam error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 221178354Ssam if (error != 0) { 222178354Ssam if_printf(ifp, "unable to fetch h/w specs\n"); 223178354Ssam goto bad1; 224178354Ssam } 225178354Ssam 226178354Ssam DPRINTF(sc, MALO_DEBUG_FW, 227178354Ssam "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 228178354Ssam "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 229178354Ssam "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 230178354Ssam "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 231178354Ssam "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 232178354Ssam sc->malo_hwspecs.hwversion, 233178354Ssam sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 234178354Ssam sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 235178354Ssam sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 236178354Ssam sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 237178354Ssam sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 238178354Ssam sc->malo_hwspecs.ul_fw_awakecookie, 239178354Ssam sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 240178354Ssam sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 241178354Ssam 242178354Ssam /* NB: firmware looks that it does not export regdomain info API. */ 243178354Ssam bands = 0; 244178354Ssam setbit(&bands, IEEE80211_MODE_11B); 245178354Ssam setbit(&bands, IEEE80211_MODE_11G); 246178354Ssam ieee80211_init_channels(ic, NULL, &bands); 247178354Ssam 248177595Sweongyo sc->malo_txantenna = 0x2; /* h/w default */ 249177595Sweongyo sc->malo_rxantenna = 0xffff; /* h/w default */ 250177595Sweongyo 251177595Sweongyo /* 252177595Sweongyo * Allocate tx + rx descriptors and populate the lists. 253177595Sweongyo * We immediately push the information to the firmware 254177595Sweongyo * as otherwise it gets upset. 255177595Sweongyo */ 256177595Sweongyo error = malo_dma_setup(sc); 257177595Sweongyo if (error != 0) { 258177595Sweongyo if_printf(ifp, "failed to setup descriptors: %d\n", error); 259177595Sweongyo goto bad1; 260177595Sweongyo } 261178354Ssam error = malo_setup_hwdma(sc); /* push to firmware */ 262178354Ssam if (error != 0) /* NB: malo_setupdma prints msg */ 263190552Sweongyo goto bad2; 264177595Sweongyo 265177595Sweongyo sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 266177595Sweongyo taskqueue_thread_enqueue, &sc->malo_tq); 267177595Sweongyo taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 268177595Sweongyo "%s taskq", ifp->if_xname); 269177595Sweongyo 270177595Sweongyo TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 271177595Sweongyo TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 272177595Sweongyo 273177595Sweongyo ifp->if_softc = sc; 274177595Sweongyo ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 275177595Sweongyo ifp->if_start = malo_start; 276177595Sweongyo ifp->if_ioctl = malo_ioctl; 277177595Sweongyo ifp->if_init = malo_init; 278207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 279207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 280177595Sweongyo IFQ_SET_READY(&ifp->if_snd); 281177595Sweongyo 282177595Sweongyo ic->ic_ifp = ifp; 283177595Sweongyo /* XXX not right but it's not used anywhere important */ 284177595Sweongyo ic->ic_phytype = IEEE80211_T_OFDM; 285177595Sweongyo ic->ic_opmode = IEEE80211_M_STA; 286177595Sweongyo ic->ic_caps = 287178957Ssam IEEE80211_C_STA /* station mode supported */ 288178957Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 289177595Sweongyo | IEEE80211_C_MONITOR /* monitor mode */ 290177595Sweongyo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 291177595Sweongyo | IEEE80211_C_SHSLOT /* short slot time supported */ 292177595Sweongyo | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 293177595Sweongyo | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 294177595Sweongyo ; 295177595Sweongyo 296177595Sweongyo /* 297177595Sweongyo * Transmit requires space in the packet for a special format transmit 298177595Sweongyo * record and optional padding between this record and the payload. 299177595Sweongyo * Ask the net80211 layer to arrange this when encapsulating 300177595Sweongyo * packets so we can add it efficiently. 301177595Sweongyo */ 302177595Sweongyo ic->ic_headroom = sizeof(struct malo_txrec) - 303178354Ssam sizeof(struct ieee80211_frame); 304177595Sweongyo 305177595Sweongyo /* call MI attach routine. */ 306190526Ssam ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 307177595Sweongyo /* override default methods */ 308178354Ssam ic->ic_vap_create = malo_vap_create; 309178354Ssam ic->ic_vap_delete = malo_vap_delete; 310178354Ssam ic->ic_raw_xmit = malo_raw_xmit; 311177595Sweongyo ic->ic_updateslot = malo_updateslot; 312177595Sweongyo 313177595Sweongyo ic->ic_scan_start = malo_scan_start; 314177595Sweongyo ic->ic_scan_end = malo_scan_end; 315177595Sweongyo ic->ic_set_channel = malo_set_channel; 316177595Sweongyo 317177595Sweongyo sc->malo_invalid = 0; /* ready to go, enable int handling */ 318177595Sweongyo 319192468Ssam ieee80211_radiotap_attach(ic, 320192468Ssam &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th), 321192468Ssam MALO_TX_RADIOTAP_PRESENT, 322192468Ssam &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th), 323192468Ssam MALO_RX_RADIOTAP_PRESENT); 324177595Sweongyo 325177595Sweongyo /* 326177595Sweongyo * Setup dynamic sysctl's. 327177595Sweongyo */ 328177595Sweongyo malo_sysctlattach(sc); 329177595Sweongyo 330177595Sweongyo if (bootverbose) 331177595Sweongyo ieee80211_announce(ic); 332178354Ssam malo_announce(sc); 333177595Sweongyo 334177595Sweongyo return 0; 335190552Sweongyobad2: 336190552Sweongyo malo_dma_cleanup(sc); 337177595Sweongyobad1: 338177595Sweongyo malo_hal_detach(mh); 339177595Sweongyobad: 340177595Sweongyo if_free(ifp); 341177595Sweongyo sc->malo_invalid = 1; 342177595Sweongyo 343177595Sweongyo return error; 344177595Sweongyo} 345177595Sweongyo 346178354Ssamstatic struct ieee80211vap * 347178354Ssammalo_vap_create(struct ieee80211com *ic, 348178354Ssam const char name[IFNAMSIZ], int unit, int opmode, int flags, 349178354Ssam const uint8_t bssid[IEEE80211_ADDR_LEN], 350178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]) 351178354Ssam{ 352178354Ssam struct ifnet *ifp = ic->ic_ifp; 353178354Ssam struct malo_vap *mvp; 354178354Ssam struct ieee80211vap *vap; 355178354Ssam 356178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 357178354Ssam if_printf(ifp, "multiple vaps not supported\n"); 358178354Ssam return NULL; 359178354Ssam } 360178354Ssam switch (opmode) { 361178354Ssam case IEEE80211_M_STA: 362178354Ssam if (opmode == IEEE80211_M_STA) 363178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 364178354Ssam /* fall thru... */ 365178354Ssam case IEEE80211_M_MONITOR: 366178354Ssam break; 367178354Ssam default: 368178354Ssam if_printf(ifp, "%s mode not supported\n", 369178354Ssam ieee80211_opmode_name[opmode]); 370178354Ssam return NULL; /* unsupported */ 371178354Ssam } 372178354Ssam mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 373178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 374178354Ssam if (mvp == NULL) { 375178354Ssam if_printf(ifp, "cannot allocate vap state block\n"); 376178354Ssam return NULL; 377178354Ssam } 378178354Ssam vap = &mvp->malo_vap; 379178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 380178354Ssam 381178354Ssam /* override state transition machine */ 382178354Ssam mvp->malo_newstate = vap->iv_newstate; 383178354Ssam vap->iv_newstate = malo_newstate; 384178354Ssam 385178354Ssam /* complete setup */ 386178354Ssam ieee80211_vap_attach(vap, 387178354Ssam ieee80211_media_change, ieee80211_media_status); 388178354Ssam ic->ic_opmode = opmode; 389178354Ssam return vap; 390178354Ssam} 391178354Ssam 392178354Ssamstatic void 393178354Ssammalo_vap_delete(struct ieee80211vap *vap) 394178354Ssam{ 395178354Ssam struct malo_vap *mvp = MALO_VAP(vap); 396178354Ssam 397178354Ssam ieee80211_vap_detach(vap); 398178354Ssam free(mvp, M_80211_VAP); 399178354Ssam} 400178354Ssam 401177595Sweongyoint 402177595Sweongyomalo_intr(void *arg) 403177595Sweongyo{ 404177595Sweongyo struct malo_softc *sc = arg; 405177595Sweongyo struct malo_hal *mh = sc->malo_mh; 406177595Sweongyo uint32_t status; 407177595Sweongyo 408177595Sweongyo if (sc->malo_invalid) { 409177595Sweongyo /* 410177595Sweongyo * The hardware is not ready/present, don't touch anything. 411177595Sweongyo * Note this can happen early on if the IRQ is shared. 412177595Sweongyo */ 413177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 414177595Sweongyo return (FILTER_STRAY); 415177595Sweongyo } 416177595Sweongyo 417177595Sweongyo /* 418177595Sweongyo * Figure out the reason(s) for the interrupt. 419177595Sweongyo */ 420177595Sweongyo malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 421177595Sweongyo if (status == 0) /* must be a shared irq */ 422177595Sweongyo return (FILTER_STRAY); 423177595Sweongyo 424177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 425177595Sweongyo __func__, status, sc->malo_imask); 426177595Sweongyo 427177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_RDY) 428177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 429177595Sweongyo if (status & MALO_A2HRIC_BIT_TX_DONE) 430177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 431177595Sweongyo if (status & MALO_A2HRIC_BIT_OPC_DONE) 432177595Sweongyo malo_hal_cmddone(mh); 433177595Sweongyo if (status & MALO_A2HRIC_BIT_MAC_EVENT) 434177595Sweongyo ; 435177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 436177595Sweongyo ; 437177595Sweongyo if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 438177595Sweongyo /* TKIP ICV error */ 439177595Sweongyo sc->malo_stats.mst_rx_badtkipicv++; 440177595Sweongyo } 441177595Sweongyo#ifdef MALO_DEBUG 442177595Sweongyo if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 443177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, 444177595Sweongyo "%s: can't handle interrupt status 0x%x\n", 445177595Sweongyo __func__, status); 446177595Sweongyo#endif 447177595Sweongyo return (FILTER_HANDLED); 448177595Sweongyo} 449177595Sweongyo 450177595Sweongyostatic void 451177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 452177595Sweongyo{ 453177595Sweongyo bus_addr_t *paddr = (bus_addr_t*) arg; 454177595Sweongyo 455177595Sweongyo KASSERT(error == 0, ("error %u on bus_dma callback", error)); 456177595Sweongyo 457177595Sweongyo *paddr = segs->ds_addr; 458177595Sweongyo} 459177595Sweongyo 460177595Sweongyostatic int 461177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name, 462177595Sweongyo struct malo_descdma *dd, 463177595Sweongyo int nbuf, size_t bufsize, int ndesc, size_t descsize) 464177595Sweongyo{ 465177595Sweongyo int error; 466177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 467177595Sweongyo uint8_t *ds; 468177595Sweongyo 469177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 470177595Sweongyo "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 471177595Sweongyo __func__, name, nbuf, (uintmax_t) bufsize, 472177595Sweongyo ndesc, (uintmax_t) descsize); 473177595Sweongyo 474177595Sweongyo dd->dd_name = name; 475177595Sweongyo dd->dd_desc_len = nbuf * ndesc * descsize; 476177595Sweongyo 477177595Sweongyo /* 478177595Sweongyo * Setup DMA descriptor area. 479177595Sweongyo */ 480177595Sweongyo error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 481177595Sweongyo PAGE_SIZE, 0, /* alignment, bounds */ 482177595Sweongyo BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 483177595Sweongyo BUS_SPACE_MAXADDR, /* highaddr */ 484177595Sweongyo NULL, NULL, /* filter, filterarg */ 485177595Sweongyo dd->dd_desc_len, /* maxsize */ 486177595Sweongyo 1, /* nsegments */ 487177595Sweongyo dd->dd_desc_len, /* maxsegsize */ 488177595Sweongyo BUS_DMA_ALLOCNOW, /* flags */ 489177595Sweongyo NULL, /* lockfunc */ 490177595Sweongyo NULL, /* lockarg */ 491177595Sweongyo &dd->dd_dmat); 492177595Sweongyo if (error != 0) { 493177595Sweongyo if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 494177595Sweongyo return error; 495177595Sweongyo } 496177595Sweongyo 497177595Sweongyo /* allocate descriptors */ 498177595Sweongyo error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 499177595Sweongyo if (error != 0) { 500177595Sweongyo if_printf(ifp, "unable to create dmamap for %s descriptors, " 501177595Sweongyo "error %u\n", dd->dd_name, error); 502177595Sweongyo goto fail0; 503177595Sweongyo } 504177595Sweongyo 505177595Sweongyo error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 506177595Sweongyo BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 507177595Sweongyo if (error != 0) { 508177595Sweongyo if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 509177595Sweongyo "error %u\n", nbuf * ndesc, dd->dd_name, error); 510177595Sweongyo goto fail1; 511177595Sweongyo } 512177595Sweongyo 513177595Sweongyo error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 514177595Sweongyo dd->dd_desc, dd->dd_desc_len, 515177595Sweongyo malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 516177595Sweongyo if (error != 0) { 517177595Sweongyo if_printf(ifp, "unable to map %s descriptors, error %u\n", 518177595Sweongyo dd->dd_name, error); 519177595Sweongyo goto fail2; 520177595Sweongyo } 521177595Sweongyo 522177595Sweongyo ds = dd->dd_desc; 523177595Sweongyo memset(ds, 0, dd->dd_desc_len); 524177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 525177595Sweongyo __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 526177595Sweongyo (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 527177595Sweongyo 528177595Sweongyo return 0; 529177595Sweongyofail2: 530177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 531177595Sweongyofail1: 532177595Sweongyo bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 533177595Sweongyofail0: 534177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 535177595Sweongyo memset(dd, 0, sizeof(*dd)); 536177595Sweongyo return error; 537177595Sweongyo} 538177595Sweongyo 539177595Sweongyo#define DS2PHYS(_dd, _ds) \ 540177595Sweongyo ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 541177595Sweongyo 542177595Sweongyostatic int 543177595Sweongyomalo_rxdma_setup(struct malo_softc *sc) 544177595Sweongyo{ 545177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 546177595Sweongyo int error, bsize, i; 547177595Sweongyo struct malo_rxbuf *bf; 548177595Sweongyo struct malo_rxdesc *ds; 549177595Sweongyo 550177595Sweongyo error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 551177595Sweongyo malo_rxbuf, sizeof(struct malo_rxbuf), 552177595Sweongyo 1, sizeof(struct malo_rxdesc)); 553177595Sweongyo if (error != 0) 554177595Sweongyo return error; 555177595Sweongyo 556177595Sweongyo /* 557177595Sweongyo * Allocate rx buffers and set them up. 558177595Sweongyo */ 559177595Sweongyo bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 560177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 561177595Sweongyo if (bf == NULL) { 562177595Sweongyo if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 563177595Sweongyo return error; 564177595Sweongyo } 565177595Sweongyo sc->malo_rxdma.dd_bufptr = bf; 566177595Sweongyo 567177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 568177595Sweongyo ds = sc->malo_rxdma.dd_desc; 569177595Sweongyo for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 570177595Sweongyo bf->bf_desc = ds; 571177595Sweongyo bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 572177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 573177595Sweongyo &bf->bf_dmamap); 574177595Sweongyo if (error != 0) { 575177595Sweongyo if_printf(ifp, "%s: unable to dmamap for rx buffer, " 576177595Sweongyo "error %d\n", __func__, error); 577177595Sweongyo return error; 578177595Sweongyo } 579177595Sweongyo /* NB: tail is intentional to preserve descriptor order */ 580177595Sweongyo STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 581177595Sweongyo } 582177595Sweongyo return 0; 583177595Sweongyo} 584177595Sweongyo 585177595Sweongyostatic int 586177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 587177595Sweongyo{ 588177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 589177595Sweongyo int error, bsize, i; 590177595Sweongyo struct malo_txbuf *bf; 591177595Sweongyo struct malo_txdesc *ds; 592177595Sweongyo 593177595Sweongyo error = malo_desc_setup(sc, "tx", &txq->dma, 594177595Sweongyo malo_txbuf, sizeof(struct malo_txbuf), 595177595Sweongyo MALO_TXDESC, sizeof(struct malo_txdesc)); 596177595Sweongyo if (error != 0) 597177595Sweongyo return error; 598177595Sweongyo 599177595Sweongyo /* allocate and setup tx buffers */ 600177595Sweongyo bsize = malo_txbuf * sizeof(struct malo_txbuf); 601177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 602177595Sweongyo if (bf == NULL) { 603177595Sweongyo if_printf(ifp, "malloc of %u tx buffers failed\n", 604177595Sweongyo malo_txbuf); 605177595Sweongyo return ENOMEM; 606177595Sweongyo } 607177595Sweongyo txq->dma.dd_bufptr = bf; 608177595Sweongyo 609177595Sweongyo STAILQ_INIT(&txq->free); 610177595Sweongyo txq->nfree = 0; 611177595Sweongyo ds = txq->dma.dd_desc; 612177595Sweongyo for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 613177595Sweongyo bf->bf_desc = ds; 614177595Sweongyo bf->bf_daddr = DS2PHYS(&txq->dma, ds); 615177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 616177595Sweongyo &bf->bf_dmamap); 617177595Sweongyo if (error != 0) { 618177595Sweongyo if_printf(ifp, "unable to create dmamap for tx " 619177595Sweongyo "buffer %u, error %u\n", i, error); 620177595Sweongyo return error; 621177595Sweongyo } 622177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 623177595Sweongyo txq->nfree++; 624177595Sweongyo } 625177595Sweongyo 626177595Sweongyo return 0; 627177595Sweongyo} 628177595Sweongyo 629177595Sweongyostatic void 630177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 631177595Sweongyo{ 632177595Sweongyo bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 633177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 634177595Sweongyo bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 635177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 636177595Sweongyo 637177595Sweongyo memset(dd, 0, sizeof(*dd)); 638177595Sweongyo} 639177595Sweongyo 640177595Sweongyostatic void 641177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc) 642177595Sweongyo{ 643177595Sweongyo struct malo_rxbuf *bf; 644177595Sweongyo 645177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 646177595Sweongyo if (bf->bf_m != NULL) { 647177595Sweongyo m_freem(bf->bf_m); 648177595Sweongyo bf->bf_m = NULL; 649177595Sweongyo } 650177595Sweongyo if (bf->bf_dmamap != NULL) { 651177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 652177595Sweongyo bf->bf_dmamap = NULL; 653177595Sweongyo } 654177595Sweongyo } 655177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 656177595Sweongyo if (sc->malo_rxdma.dd_bufptr != NULL) { 657177595Sweongyo free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 658177595Sweongyo sc->malo_rxdma.dd_bufptr = NULL; 659177595Sweongyo } 660177595Sweongyo if (sc->malo_rxdma.dd_desc_len != 0) 661177595Sweongyo malo_desc_cleanup(sc, &sc->malo_rxdma); 662177595Sweongyo} 663177595Sweongyo 664177595Sweongyostatic void 665177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 666177595Sweongyo{ 667177595Sweongyo struct malo_txbuf *bf; 668177595Sweongyo struct ieee80211_node *ni; 669177595Sweongyo 670177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 671177595Sweongyo if (bf->bf_m != NULL) { 672177595Sweongyo m_freem(bf->bf_m); 673177595Sweongyo bf->bf_m = NULL; 674177595Sweongyo } 675177595Sweongyo ni = bf->bf_node; 676177595Sweongyo bf->bf_node = NULL; 677177595Sweongyo if (ni != NULL) { 678177595Sweongyo /* 679177595Sweongyo * Reclaim node reference. 680177595Sweongyo */ 681177595Sweongyo ieee80211_free_node(ni); 682177595Sweongyo } 683177595Sweongyo if (bf->bf_dmamap != NULL) { 684177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 685177595Sweongyo bf->bf_dmamap = NULL; 686177595Sweongyo } 687177595Sweongyo } 688177595Sweongyo STAILQ_INIT(&txq->free); 689177595Sweongyo txq->nfree = 0; 690177595Sweongyo if (txq->dma.dd_bufptr != NULL) { 691177595Sweongyo free(txq->dma.dd_bufptr, M_MALODEV); 692177595Sweongyo txq->dma.dd_bufptr = NULL; 693177595Sweongyo } 694177595Sweongyo if (txq->dma.dd_desc_len != 0) 695177595Sweongyo malo_desc_cleanup(sc, &txq->dma); 696177595Sweongyo} 697177595Sweongyo 698177595Sweongyostatic void 699177595Sweongyomalo_dma_cleanup(struct malo_softc *sc) 700177595Sweongyo{ 701177595Sweongyo int i; 702177595Sweongyo 703177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 704177595Sweongyo malo_txdma_cleanup(sc, &sc->malo_txq[i]); 705177595Sweongyo 706177595Sweongyo malo_rxdma_cleanup(sc); 707177595Sweongyo} 708177595Sweongyo 709177595Sweongyostatic int 710177595Sweongyomalo_dma_setup(struct malo_softc *sc) 711177595Sweongyo{ 712177595Sweongyo int error, i; 713177595Sweongyo 714177595Sweongyo /* rxdma initializing. */ 715177595Sweongyo error = malo_rxdma_setup(sc); 716177595Sweongyo if (error != 0) 717177595Sweongyo return error; 718177595Sweongyo 719177595Sweongyo /* NB: we just have 1 tx queue now. */ 720177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 721177595Sweongyo error = malo_txdma_setup(sc, &sc->malo_txq[i]); 722177595Sweongyo if (error != 0) { 723177595Sweongyo malo_dma_cleanup(sc); 724177595Sweongyo 725177595Sweongyo return error; 726177595Sweongyo } 727177595Sweongyo 728177595Sweongyo malo_txq_init(sc, &sc->malo_txq[i], i); 729177595Sweongyo } 730177595Sweongyo 731177595Sweongyo return 0; 732177595Sweongyo} 733177595Sweongyo 734177595Sweongyostatic void 735177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc) 736177595Sweongyo{ 737177595Sweongyo int i; 738177595Sweongyo 739177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 740177595Sweongyo sc->malo_hwdma.rxdesc_read); 741177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 742177595Sweongyo sc->malo_hwdma.rxdesc_read); 743177595Sweongyo 744177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 745177595Sweongyo malo_bar0_write4(sc, 746177595Sweongyo sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 747177595Sweongyo } 748177595Sweongyo} 749177595Sweongyo 750177595Sweongyo/* 751177595Sweongyo * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 752177595Sweongyo * for compatibility with older firmware. For current firmware we send 753177595Sweongyo * this information with a cmd block via malo_hal_sethwdma. 754177595Sweongyo */ 755177595Sweongyostatic int 756177595Sweongyomalo_setup_hwdma(struct malo_softc *sc) 757177595Sweongyo{ 758177595Sweongyo int i; 759177595Sweongyo struct malo_txq *txq; 760177595Sweongyo 761177595Sweongyo sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 762177595Sweongyo 763177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 764177595Sweongyo txq = &sc->malo_txq[i]; 765177595Sweongyo sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 766177595Sweongyo } 767177595Sweongyo sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 768177595Sweongyo sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 769177595Sweongyo 770177595Sweongyo malo_hal_set_rxtxdma(sc); 771177595Sweongyo 772177595Sweongyo return 0; 773177595Sweongyo} 774177595Sweongyo 775177595Sweongyostatic void 776177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 777177595Sweongyo{ 778177595Sweongyo struct malo_txbuf *bf, *bn; 779177595Sweongyo struct malo_txdesc *ds; 780177595Sweongyo 781177595Sweongyo MALO_TXQ_LOCK_INIT(sc, txq); 782177595Sweongyo txq->qnum = qnum; 783177595Sweongyo txq->txpri = 0; /* XXX */ 784177595Sweongyo 785177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 786177595Sweongyo bf->bf_txq = txq; 787177595Sweongyo 788177595Sweongyo ds = bf->bf_desc; 789177595Sweongyo bn = STAILQ_NEXT(bf, bf_list); 790177595Sweongyo if (bn == NULL) 791177595Sweongyo bn = STAILQ_FIRST(&txq->free); 792177595Sweongyo ds->physnext = htole32(bn->bf_daddr); 793177595Sweongyo } 794177595Sweongyo STAILQ_INIT(&txq->active); 795177595Sweongyo} 796177595Sweongyo 797177595Sweongyo/* 798177595Sweongyo * Reclaim resources for a setup queue. 799177595Sweongyo */ 800177595Sweongyostatic void 801177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 802177595Sweongyo{ 803177595Sweongyo /* XXX hal work? */ 804177595Sweongyo MALO_TXQ_LOCK_DESTROY(txq); 805177595Sweongyo} 806177595Sweongyo 807177595Sweongyo/* 808177595Sweongyo * Allocate a tx buffer for sending a frame. 809177595Sweongyo */ 810177595Sweongyostatic struct malo_txbuf * 811177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 812177595Sweongyo{ 813177595Sweongyo struct malo_txbuf *bf; 814177595Sweongyo 815177595Sweongyo MALO_TXQ_LOCK(txq); 816177595Sweongyo bf = STAILQ_FIRST(&txq->free); 817177595Sweongyo if (bf != NULL) { 818177595Sweongyo STAILQ_REMOVE_HEAD(&txq->free, bf_list); 819177595Sweongyo txq->nfree--; 820177595Sweongyo } 821177595Sweongyo MALO_TXQ_UNLOCK(txq); 822177595Sweongyo if (bf == NULL) { 823177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, 824177595Sweongyo "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 825177595Sweongyo sc->malo_stats.mst_tx_qstop++; 826177595Sweongyo } 827177595Sweongyo return bf; 828177595Sweongyo} 829177595Sweongyo 830177595Sweongyostatic int 831177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 832177595Sweongyo{ 833177595Sweongyo struct mbuf *m; 834177595Sweongyo int error; 835177595Sweongyo 836177595Sweongyo /* 837177595Sweongyo * Load the DMA map so any coalescing is done. This also calculates 838177595Sweongyo * the number of descriptors we need. 839177595Sweongyo */ 840177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 841177595Sweongyo bf->bf_segs, &bf->bf_nseg, 842177595Sweongyo BUS_DMA_NOWAIT); 843177595Sweongyo if (error == EFBIG) { 844177595Sweongyo /* XXX packet requires too many descriptors */ 845177595Sweongyo bf->bf_nseg = MALO_TXDESC + 1; 846177595Sweongyo } else if (error != 0) { 847177595Sweongyo sc->malo_stats.mst_tx_busdma++; 848177595Sweongyo m_freem(m0); 849177595Sweongyo return error; 850177595Sweongyo } 851177595Sweongyo /* 852177595Sweongyo * Discard null packets and check for packets that require too many 853177595Sweongyo * TX descriptors. We try to convert the latter to a cluster. 854177595Sweongyo */ 855177595Sweongyo if (error == EFBIG) { /* too many desc's, linearize */ 856177595Sweongyo sc->malo_stats.mst_tx_linear++; 857177595Sweongyo m = m_defrag(m0, M_DONTWAIT); 858177595Sweongyo if (m == NULL) { 859177595Sweongyo m_freem(m0); 860177595Sweongyo sc->malo_stats.mst_tx_nombuf++; 861177595Sweongyo return ENOMEM; 862177595Sweongyo } 863177595Sweongyo m0 = m; 864177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 865177595Sweongyo bf->bf_segs, &bf->bf_nseg, 866177595Sweongyo BUS_DMA_NOWAIT); 867177595Sweongyo if (error != 0) { 868177595Sweongyo sc->malo_stats.mst_tx_busdma++; 869177595Sweongyo m_freem(m0); 870177595Sweongyo return error; 871177595Sweongyo } 872177595Sweongyo KASSERT(bf->bf_nseg <= MALO_TXDESC, 873177595Sweongyo ("too many segments after defrag; nseg %u", bf->bf_nseg)); 874177595Sweongyo } else if (bf->bf_nseg == 0) { /* null packet, discard */ 875177595Sweongyo sc->malo_stats.mst_tx_nodata++; 876177595Sweongyo m_freem(m0); 877177595Sweongyo return EIO; 878177595Sweongyo } 879177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 880177595Sweongyo __func__, m0, m0->m_pkthdr.len); 881177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 882177595Sweongyo bf->bf_m = m0; 883177595Sweongyo 884177595Sweongyo return 0; 885177595Sweongyo} 886177595Sweongyo 887177595Sweongyo#ifdef MALO_DEBUG 888177595Sweongyostatic void 889177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 890177595Sweongyo{ 891177595Sweongyo const struct malo_rxdesc *ds = bf->bf_desc; 892177595Sweongyo uint32_t status = le32toh(ds->status); 893177595Sweongyo 894177595Sweongyo printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 895177595Sweongyo " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 896177595Sweongyo " RATE:%02x QOS:%04x\n", 897177595Sweongyo ix, ds, (const struct malo_desc *)bf->bf_daddr, 898177595Sweongyo le32toh(ds->physnext), le32toh(ds->physbuffdata), 899177595Sweongyo ds->rxcontrol, 900177595Sweongyo ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 901177595Sweongyo "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 902177595Sweongyo ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 903177595Sweongyo ds->rate, le16toh(ds->qosctrl)); 904177595Sweongyo} 905177595Sweongyo 906177595Sweongyostatic void 907177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 908177595Sweongyo{ 909177595Sweongyo const struct malo_txdesc *ds = bf->bf_desc; 910177595Sweongyo uint32_t status = le32toh(ds->status); 911177595Sweongyo 912177595Sweongyo printf("Q%u[%3u]", qnum, ix); 913177595Sweongyo printf(" (DS.V:%p DS.P:%p)\n", 914177595Sweongyo ds, (const struct malo_txdesc *)bf->bf_daddr); 915177595Sweongyo printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 916177595Sweongyo le32toh(ds->physnext), 917177595Sweongyo le32toh(ds->pktptr), le16toh(ds->pktlen), status, 918177595Sweongyo status & MALO_TXD_STATUS_USED ? 919177595Sweongyo "" : (status & 3) != 0 ? " *" : " !"); 920177595Sweongyo printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 921177595Sweongyo ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 922177595Sweongyo le32toh(ds->sap_pktinfo), le16toh(ds->format)); 923177595Sweongyo#if 0 924177595Sweongyo { 925177595Sweongyo const uint8_t *cp = (const uint8_t *) ds; 926177595Sweongyo int i; 927177595Sweongyo for (i = 0; i < sizeof(struct malo_txdesc); i++) { 928177595Sweongyo printf("%02x ", cp[i]); 929177595Sweongyo if (((i+1) % 16) == 0) 930177595Sweongyo printf("\n"); 931177595Sweongyo } 932177595Sweongyo printf("\n"); 933177595Sweongyo } 934177595Sweongyo#endif 935177595Sweongyo} 936177595Sweongyo#endif /* MALO_DEBUG */ 937177595Sweongyo 938177595Sweongyostatic __inline void 939177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix) 940177595Sweongyo{ 941177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 942177595Sweongyo static const int ieeerates[] = 943177595Sweongyo { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 944177595Sweongyo if (rix < N(ieeerates)) 945177595Sweongyo ni->ni_txrate = ieeerates[rix]; 946177595Sweongyo#undef N 947177595Sweongyo} 948177595Sweongyo 949177595Sweongyostatic int 950177595Sweongyomalo_fix2rate(int fix_rate) 951177595Sweongyo{ 952177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 953177595Sweongyo static const int rates[] = 954177595Sweongyo { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 955177595Sweongyo return (fix_rate < N(rates) ? rates[fix_rate] : 0); 956177595Sweongyo#undef N 957177595Sweongyo} 958177595Sweongyo 959177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 960177595Sweongyo#define MS(v,x) (((v) & x) >> x##_S) 961177595Sweongyo#define SM(v,x) (((v) << x##_S) & x) 962177595Sweongyo 963177595Sweongyo/* 964177595Sweongyo * Process completed xmit descriptors from the specified queue. 965177595Sweongyo */ 966177595Sweongyostatic int 967177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 968177595Sweongyo{ 969177595Sweongyo struct malo_txbuf *bf; 970177595Sweongyo struct malo_txdesc *ds; 971177595Sweongyo struct ieee80211_node *ni; 972177595Sweongyo int nreaped; 973177595Sweongyo uint32_t status; 974177595Sweongyo 975177595Sweongyo DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 976177595Sweongyo __func__, txq->qnum); 977177595Sweongyo for (nreaped = 0;; nreaped++) { 978177595Sweongyo MALO_TXQ_LOCK(txq); 979177595Sweongyo bf = STAILQ_FIRST(&txq->active); 980177595Sweongyo if (bf == NULL) { 981177595Sweongyo MALO_TXQ_UNLOCK(txq); 982177595Sweongyo break; 983177595Sweongyo } 984177595Sweongyo ds = bf->bf_desc; 985177595Sweongyo MALO_TXDESC_SYNC(txq, ds, 986177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 987177595Sweongyo if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 988177595Sweongyo MALO_TXQ_UNLOCK(txq); 989177595Sweongyo break; 990177595Sweongyo } 991177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 992177595Sweongyo MALO_TXQ_UNLOCK(txq); 993177595Sweongyo 994177595Sweongyo#ifdef MALO_DEBUG 995177595Sweongyo if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 996177595Sweongyo malo_printtxbuf(bf, txq->qnum, nreaped); 997177595Sweongyo#endif 998177595Sweongyo ni = bf->bf_node; 999177595Sweongyo if (ni != NULL) { 1000177595Sweongyo status = le32toh(ds->status); 1001177595Sweongyo if (status & MALO_TXD_STATUS_OK) { 1002177595Sweongyo uint16_t format = le16toh(ds->format); 1003177595Sweongyo uint8_t txant = MS(format, MALO_TXD_ANTENNA); 1004177595Sweongyo 1005177595Sweongyo sc->malo_stats.mst_ant_tx[txant]++; 1006177595Sweongyo if (status & MALO_TXD_STATUS_OK_RETRY) 1007177595Sweongyo sc->malo_stats.mst_tx_retries++; 1008177595Sweongyo if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1009177595Sweongyo sc->malo_stats.mst_tx_mretries++; 1010177595Sweongyo malo_updatetxrate(ni, ds->datarate); 1011177595Sweongyo sc->malo_stats.mst_tx_rate = ds->datarate; 1012177595Sweongyo } else { 1013177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1014177595Sweongyo sc->malo_stats.mst_tx_linkerror++; 1015177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1016177595Sweongyo sc->malo_stats.mst_tx_xretries++; 1017177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_AGING) 1018177595Sweongyo sc->malo_stats.mst_tx_aging++; 1019177595Sweongyo } 1020177595Sweongyo /* 1021177595Sweongyo * Do any tx complete callback. Note this must 1022177595Sweongyo * be done before releasing the node reference. 1023177595Sweongyo * XXX no way to figure out if frame was ACK'd 1024177595Sweongyo */ 1025177595Sweongyo if (bf->bf_m->m_flags & M_TXCB) { 1026177595Sweongyo /* XXX strip fw len in case header inspected */ 1027177595Sweongyo m_adj(bf->bf_m, sizeof(uint16_t)); 1028177595Sweongyo ieee80211_process_callback(ni, bf->bf_m, 1029177595Sweongyo (status & MALO_TXD_STATUS_OK) == 0); 1030177595Sweongyo } 1031177595Sweongyo /* 1032177595Sweongyo * Reclaim reference to node. 1033177595Sweongyo * 1034177595Sweongyo * NB: the node may be reclaimed here if, for example 1035177595Sweongyo * this is a DEAUTH message that was sent and the 1036177595Sweongyo * node was timed out due to inactivity. 1037177595Sweongyo */ 1038177595Sweongyo ieee80211_free_node(ni); 1039177595Sweongyo } 1040177595Sweongyo ds->status = htole32(MALO_TXD_STATUS_IDLE); 1041177595Sweongyo ds->pktlen = htole32(0); 1042177595Sweongyo 1043177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1044177595Sweongyo BUS_DMASYNC_POSTWRITE); 1045177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1046177595Sweongyo m_freem(bf->bf_m); 1047177595Sweongyo bf->bf_m = NULL; 1048177595Sweongyo bf->bf_node = NULL; 1049177595Sweongyo 1050177595Sweongyo MALO_TXQ_LOCK(txq); 1051177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1052177595Sweongyo txq->nfree++; 1053177595Sweongyo MALO_TXQ_UNLOCK(txq); 1054177595Sweongyo } 1055177595Sweongyo return nreaped; 1056177595Sweongyo} 1057177595Sweongyo 1058177595Sweongyo/* 1059177595Sweongyo * Deferred processing of transmit interrupt. 1060177595Sweongyo */ 1061177595Sweongyostatic void 1062177595Sweongyomalo_tx_proc(void *arg, int npending) 1063177595Sweongyo{ 1064177595Sweongyo struct malo_softc *sc = arg; 1065177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1066177595Sweongyo int i, nreaped; 1067177595Sweongyo 1068177595Sweongyo /* 1069177595Sweongyo * Process each active queue. 1070177595Sweongyo */ 1071177595Sweongyo nreaped = 0; 1072177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1073177595Sweongyo if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1074177595Sweongyo nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1075177595Sweongyo } 1076177595Sweongyo 1077177595Sweongyo if (nreaped != 0) { 1078177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1079199559Sjhb sc->malo_timer = 0; 1080177595Sweongyo malo_start(ifp); 1081177595Sweongyo } 1082177595Sweongyo} 1083177595Sweongyo 1084177595Sweongyostatic int 1085177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1086177595Sweongyo struct malo_txbuf *bf, struct mbuf *m0) 1087177595Sweongyo{ 1088177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 1089177595Sweongyo ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1090177595Sweongyo#define IS_DATA_FRAME(wh) \ 1091177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1092177595Sweongyo int error, ismcast, iswep; 1093177595Sweongyo int copyhdrlen, hdrlen, pktlen; 1094177595Sweongyo struct ieee80211_frame *wh; 1095177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1096178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1097192468Ssam struct ieee80211vap *vap = ni->ni_vap; 1098177595Sweongyo struct malo_txdesc *ds; 1099177595Sweongyo struct malo_txrec *tr; 1100177595Sweongyo struct malo_txq *txq; 1101177595Sweongyo uint16_t qos; 1102177595Sweongyo 1103177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1104177595Sweongyo iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1105177595Sweongyo ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1106177595Sweongyo copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1107177595Sweongyo pktlen = m0->m_pkthdr.len; 1108177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 1109177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 1110177595Sweongyo qos = *(uint16_t *) 1111177595Sweongyo (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1112177595Sweongyo copyhdrlen -= sizeof(qos); 1113177595Sweongyo } else 1114177595Sweongyo qos = *(uint16_t *) 1115177595Sweongyo (((struct ieee80211_qosframe *) wh)->i_qos); 1116177595Sweongyo } else 1117177595Sweongyo qos = 0; 1118177595Sweongyo 1119177595Sweongyo if (iswep) { 1120177595Sweongyo struct ieee80211_key *k; 1121177595Sweongyo 1122177595Sweongyo /* 1123177595Sweongyo * Construct the 802.11 header+trailer for an encrypted 1124177595Sweongyo * frame. The only reason this can fail is because of an 1125177595Sweongyo * unknown or unsupported cipher/key type. 1126177595Sweongyo * 1127177595Sweongyo * NB: we do this even though the firmware will ignore 1128177595Sweongyo * what we've done for WEP and TKIP as we need the 1129177595Sweongyo * ExtIV filled in for CCMP and this also adjusts 1130177595Sweongyo * the headers which simplifies our work below. 1131177595Sweongyo */ 1132178354Ssam k = ieee80211_crypto_encap(ni, m0); 1133177595Sweongyo if (k == NULL) { 1134177595Sweongyo /* 1135177595Sweongyo * This can happen when the key is yanked after the 1136177595Sweongyo * frame was queued. Just discard the frame; the 1137177595Sweongyo * 802.11 layer counts failures and provides 1138177595Sweongyo * debugging/diagnostics. 1139177595Sweongyo */ 1140177595Sweongyo m_freem(m0); 1141177595Sweongyo return EIO; 1142177595Sweongyo } 1143177595Sweongyo 1144177595Sweongyo /* 1145177595Sweongyo * Adjust the packet length for the crypto additions 1146177595Sweongyo * done during encap and any other bits that the f/w 1147177595Sweongyo * will add later on. 1148177595Sweongyo */ 1149177595Sweongyo pktlen = m0->m_pkthdr.len; 1150177595Sweongyo 1151177595Sweongyo /* packet header may have moved, reset our local pointer */ 1152177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1153177595Sweongyo } 1154177595Sweongyo 1155192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1156177595Sweongyo sc->malo_tx_th.wt_flags = 0; /* XXX */ 1157177595Sweongyo if (iswep) 1158177595Sweongyo sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1159177595Sweongyo sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1160177595Sweongyo sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1161177595Sweongyo 1162192468Ssam ieee80211_radiotap_tx(vap, m0); 1163177595Sweongyo } 1164177595Sweongyo 1165177595Sweongyo /* 1166177595Sweongyo * Copy up/down the 802.11 header; the firmware requires 1167177595Sweongyo * we present a 2-byte payload length followed by a 1168177595Sweongyo * 4-address header (w/o QoS), followed (optionally) by 1169177595Sweongyo * any WEP/ExtIV header (but only filled in for CCMP). 1170177595Sweongyo * We are assured the mbuf has sufficient headroom to 1171177595Sweongyo * prepend in-place by the setup of ic_headroom in 1172177595Sweongyo * malo_attach. 1173177595Sweongyo */ 1174177595Sweongyo if (hdrlen < sizeof(struct malo_txrec)) { 1175177595Sweongyo const int space = sizeof(struct malo_txrec) - hdrlen; 1176177595Sweongyo if (M_LEADINGSPACE(m0) < space) { 1177177595Sweongyo /* NB: should never happen */ 1178177595Sweongyo device_printf(sc->malo_dev, 1179177595Sweongyo "not enough headroom, need %d found %zd, " 1180177595Sweongyo "m_flags 0x%x m_len %d\n", 1181177595Sweongyo space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1182177595Sweongyo ieee80211_dump_pkt(ic, 1183177595Sweongyo mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1184177595Sweongyo m_freem(m0); 1185177595Sweongyo /* XXX stat */ 1186177595Sweongyo return EIO; 1187177595Sweongyo } 1188177595Sweongyo M_PREPEND(m0, space, M_NOWAIT); 1189177595Sweongyo } 1190177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1191177595Sweongyo if (wh != (struct ieee80211_frame *) &tr->wh) 1192177595Sweongyo ovbcopy(wh, &tr->wh, hdrlen); 1193177595Sweongyo /* 1194177595Sweongyo * Note: the "firmware length" is actually the length of the fully 1195177595Sweongyo * formed "802.11 payload". That is, it's everything except for 1196177595Sweongyo * the 802.11 header. In particular this includes all crypto 1197177595Sweongyo * material including the MIC! 1198177595Sweongyo */ 1199177595Sweongyo tr->fwlen = htole16(pktlen - hdrlen); 1200177595Sweongyo 1201177595Sweongyo /* 1202177595Sweongyo * Load the DMA map so any coalescing is done. This 1203177595Sweongyo * also calculates the number of descriptors we need. 1204177595Sweongyo */ 1205177595Sweongyo error = malo_tx_dmasetup(sc, bf, m0); 1206177595Sweongyo if (error != 0) 1207177595Sweongyo return error; 1208177595Sweongyo bf->bf_node = ni; /* NB: held reference */ 1209177595Sweongyo m0 = bf->bf_m; /* NB: may have changed */ 1210177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1211177595Sweongyo wh = (struct ieee80211_frame *)&tr->wh; 1212177595Sweongyo 1213177595Sweongyo /* 1214177595Sweongyo * Formulate tx descriptor. 1215177595Sweongyo */ 1216177595Sweongyo ds = bf->bf_desc; 1217177595Sweongyo txq = bf->bf_txq; 1218177595Sweongyo 1219177595Sweongyo ds->qosctrl = qos; /* NB: already little-endian */ 1220177595Sweongyo ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1221177595Sweongyo ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1222177595Sweongyo /* NB: pPhysNext setup once, don't touch */ 1223177595Sweongyo ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1224177595Sweongyo ds->sap_pktinfo = 0; 1225177595Sweongyo ds->format = 0; 1226177595Sweongyo 1227177595Sweongyo /* 1228177595Sweongyo * Select transmit rate. 1229177595Sweongyo */ 1230177595Sweongyo switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1231177595Sweongyo case IEEE80211_FC0_TYPE_MGT: 1232177595Sweongyo sc->malo_stats.mst_tx_mgmt++; 1233177595Sweongyo /* fall thru... */ 1234177595Sweongyo case IEEE80211_FC0_TYPE_CTL: 1235177595Sweongyo ds->txpriority = 1; 1236177595Sweongyo break; 1237177595Sweongyo case IEEE80211_FC0_TYPE_DATA: 1238177595Sweongyo ds->txpriority = txq->qnum; 1239177595Sweongyo break; 1240177595Sweongyo default: 1241177595Sweongyo if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1242177595Sweongyo wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1243177595Sweongyo /* XXX statistic */ 1244177595Sweongyo m_freem(m0); 1245177595Sweongyo return EIO; 1246177595Sweongyo } 1247177595Sweongyo 1248177595Sweongyo#ifdef MALO_DEBUG 1249177595Sweongyo if (IFF_DUMPPKTS_XMIT(sc)) 1250177595Sweongyo ieee80211_dump_pkt(ic, 1251177595Sweongyo mtod(m0, const uint8_t *)+sizeof(uint16_t), 1252177595Sweongyo m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1253177595Sweongyo#endif 1254177595Sweongyo 1255177595Sweongyo MALO_TXQ_LOCK(txq); 1256177595Sweongyo if (!IS_DATA_FRAME(wh)) 1257177595Sweongyo ds->status |= htole32(1); 1258177595Sweongyo ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1259177595Sweongyo STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1260177595Sweongyo MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1261177595Sweongyo 1262177595Sweongyo ifp->if_opackets++; 1263199559Sjhb sc->malo_timer = 5; 1264177595Sweongyo MALO_TXQ_UNLOCK(txq); 1265177595Sweongyo return 0; 1266177595Sweongyo#undef IEEE80211_DIR_DSTODS 1267177595Sweongyo} 1268177595Sweongyo 1269177595Sweongyostatic void 1270177595Sweongyomalo_start(struct ifnet *ifp) 1271177595Sweongyo{ 1272177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1273177595Sweongyo struct ieee80211_node *ni; 1274178354Ssam struct malo_txq *txq = &sc->malo_txq[0]; 1275177595Sweongyo struct malo_txbuf *bf = NULL; 1276177595Sweongyo struct mbuf *m; 1277178354Ssam int nqueued = 0; 1278177595Sweongyo 1279177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1280177595Sweongyo return; 1281177595Sweongyo 1282177595Sweongyo for (;;) { 1283178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1284178354Ssam if (m == NULL) 1285178354Ssam break; 1286178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1287178354Ssam bf = malo_getbuf(sc, txq); 1288178354Ssam if (bf == NULL) { 1289178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1290178354Ssam 1291178354Ssam /* XXX blocks other traffic */ 1292178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1293178354Ssam sc->malo_stats.mst_tx_qstop++; 1294178354Ssam break; 1295178354Ssam } 1296177595Sweongyo /* 1297177595Sweongyo * Pass the frame to the h/w for transmission. 1298177595Sweongyo */ 1299177595Sweongyo if (malo_tx_start(sc, ni, bf, m)) { 1300177595Sweongyo ifp->if_oerrors++; 1301177595Sweongyo if (bf != NULL) { 1302177595Sweongyo bf->bf_m = NULL; 1303177595Sweongyo bf->bf_node = NULL; 1304177595Sweongyo MALO_TXQ_LOCK(txq); 1305177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1306177595Sweongyo MALO_TXQ_UNLOCK(txq); 1307177595Sweongyo } 1308177595Sweongyo ieee80211_free_node(ni); 1309177595Sweongyo continue; 1310177595Sweongyo } 1311177595Sweongyo nqueued++; 1312177595Sweongyo 1313177595Sweongyo if (nqueued >= malo_txcoalesce) { 1314177595Sweongyo /* 1315177595Sweongyo * Poke the firmware to process queued frames; 1316177595Sweongyo * see below about (lack of) locking. 1317177595Sweongyo */ 1318177595Sweongyo nqueued = 0; 1319177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1320177595Sweongyo } 1321177595Sweongyo } 1322177595Sweongyo 1323177595Sweongyo if (nqueued) { 1324177595Sweongyo /* 1325177595Sweongyo * NB: We don't need to lock against tx done because 1326177595Sweongyo * this just prods the firmware to check the transmit 1327177595Sweongyo * descriptors. The firmware will also start fetching 1328177595Sweongyo * descriptors by itself if it notices new ones are 1329177595Sweongyo * present when it goes to deliver a tx done interrupt 1330177595Sweongyo * to the host. So if we race with tx done processing 1331177595Sweongyo * it's ok. Delivering the kick here rather than in 1332177595Sweongyo * malo_tx_start is an optimization to avoid poking the 1333177595Sweongyo * firmware for each packet. 1334177595Sweongyo * 1335177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1336177595Sweongyo */ 1337177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1338177595Sweongyo } 1339177595Sweongyo} 1340177595Sweongyo 1341177595Sweongyostatic void 1342199559Sjhbmalo_watchdog(void *arg) 1343177595Sweongyo{ 1344199559Sjhb struct malo_softc *sc; 1345199559Sjhb struct ifnet *ifp; 1346177595Sweongyo 1347199559Sjhb sc = arg; 1348199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1349199559Sjhb if (sc->malo_timer == 0 || --sc->malo_timer > 0) 1350199559Sjhb return; 1351199559Sjhb 1352199559Sjhb ifp = sc->malo_ifp; 1353177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1354177595Sweongyo if_printf(ifp, "watchdog timeout\n"); 1355177595Sweongyo 1356177595Sweongyo /* XXX no way to reset h/w. now */ 1357177595Sweongyo 1358177595Sweongyo ifp->if_oerrors++; 1359177595Sweongyo sc->malo_stats.mst_watchdog++; 1360177595Sweongyo } 1361177595Sweongyo} 1362177595Sweongyo 1363177595Sweongyostatic int 1364177595Sweongyomalo_hal_reset(struct malo_softc *sc) 1365177595Sweongyo{ 1366177595Sweongyo static int first = 0; 1367178354Ssam struct ifnet *ifp = sc->malo_ifp; 1368178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1369177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1370177595Sweongyo 1371177595Sweongyo if (first == 0) { 1372177595Sweongyo /* 1373177595Sweongyo * NB: when the device firstly is initialized, sometimes 1374177595Sweongyo * firmware could override rx/tx dma registers so we re-set 1375177595Sweongyo * these values once. 1376177595Sweongyo */ 1377177595Sweongyo malo_hal_set_rxtxdma(sc); 1378177595Sweongyo first = 1; 1379177595Sweongyo } 1380177595Sweongyo 1381177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1382177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1383177595Sweongyo malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1384177595Sweongyo malo_chan_set(sc, ic->ic_curchan); 1385177595Sweongyo 1386177595Sweongyo /* XXX needs other stuffs? */ 1387177595Sweongyo 1388177595Sweongyo return 1; 1389177595Sweongyo} 1390177595Sweongyo 1391177595Sweongyostatic __inline struct mbuf * 1392177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1393177595Sweongyo{ 1394177595Sweongyo struct mbuf *m; 1395177595Sweongyo bus_addr_t paddr; 1396177595Sweongyo int error; 1397177595Sweongyo 1398177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 1399177595Sweongyo m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1400177595Sweongyo if (m == NULL) { 1401177595Sweongyo sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1402177595Sweongyo return NULL; 1403177595Sweongyo } 1404177595Sweongyo error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1405177595Sweongyo mtod(m, caddr_t), MJUMPAGESIZE, 1406177595Sweongyo malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1407177595Sweongyo if (error != 0) { 1408177595Sweongyo if_printf(sc->malo_ifp, 1409177595Sweongyo "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1410177595Sweongyo m_freem(m); 1411177595Sweongyo return NULL; 1412177595Sweongyo } 1413177595Sweongyo bf->bf_data = paddr; 1414177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1415177595Sweongyo 1416177595Sweongyo return m; 1417177595Sweongyo} 1418177595Sweongyo 1419177595Sweongyostatic int 1420177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1421177595Sweongyo{ 1422177595Sweongyo struct malo_rxdesc *ds; 1423177595Sweongyo 1424177595Sweongyo ds = bf->bf_desc; 1425177595Sweongyo if (bf->bf_m == NULL) { 1426177595Sweongyo bf->bf_m = malo_getrxmbuf(sc, bf); 1427177595Sweongyo if (bf->bf_m == NULL) { 1428177595Sweongyo /* mark descriptor to be skipped */ 1429177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1430177595Sweongyo /* NB: don't need PREREAD */ 1431177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1432177595Sweongyo return ENOMEM; 1433177595Sweongyo } 1434177595Sweongyo } 1435177595Sweongyo 1436177595Sweongyo /* 1437177595Sweongyo * Setup descriptor. 1438177595Sweongyo */ 1439177595Sweongyo ds->qosctrl = 0; 1440177595Sweongyo ds->snr = 0; 1441177595Sweongyo ds->status = MALO_RXD_STATUS_IDLE; 1442177595Sweongyo ds->channel = 0; 1443177595Sweongyo ds->pktlen = htole16(MALO_RXSIZE); 1444177595Sweongyo ds->nf = 0; 1445177595Sweongyo ds->physbuffdata = htole32(bf->bf_data); 1446177595Sweongyo /* NB: don't touch pPhysNext, set once */ 1447177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1448177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1449177595Sweongyo 1450177595Sweongyo return 0; 1451177595Sweongyo} 1452177595Sweongyo 1453177595Sweongyo/* 1454177595Sweongyo * Setup the rx data structures. This should only be done once or we may get 1455177595Sweongyo * out of sync with the firmware. 1456177595Sweongyo */ 1457177595Sweongyostatic int 1458177595Sweongyomalo_startrecv(struct malo_softc *sc) 1459177595Sweongyo{ 1460177595Sweongyo struct malo_rxbuf *bf, *prev; 1461177595Sweongyo struct malo_rxdesc *ds; 1462177595Sweongyo 1463177595Sweongyo if (sc->malo_recvsetup == 1) { 1464177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1465177595Sweongyo return 0; 1466177595Sweongyo } 1467177595Sweongyo 1468177595Sweongyo prev = NULL; 1469177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1470177595Sweongyo int error = malo_rxbuf_init(sc, bf); 1471177595Sweongyo if (error != 0) { 1472177595Sweongyo DPRINTF(sc, MALO_DEBUG_RECV, 1473177595Sweongyo "%s: malo_rxbuf_init failed %d\n", 1474177595Sweongyo __func__, error); 1475177595Sweongyo return error; 1476177595Sweongyo } 1477177595Sweongyo if (prev != NULL) { 1478177595Sweongyo ds = prev->bf_desc; 1479177595Sweongyo ds->physnext = htole32(bf->bf_daddr); 1480177595Sweongyo } 1481177595Sweongyo prev = bf; 1482177595Sweongyo } 1483177595Sweongyo if (prev != NULL) { 1484177595Sweongyo ds = prev->bf_desc; 1485177595Sweongyo ds->physnext = 1486177595Sweongyo htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1487177595Sweongyo } 1488177595Sweongyo 1489177595Sweongyo sc->malo_recvsetup = 1; 1490177595Sweongyo 1491177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1492177595Sweongyo 1493177595Sweongyo return 0; 1494177595Sweongyo} 1495177595Sweongyo 1496177595Sweongyostatic void 1497178354Ssammalo_init_locked(struct malo_softc *sc) 1498177595Sweongyo{ 1499177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1500177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1501177595Sweongyo int error; 1502177595Sweongyo 1503177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1504177595Sweongyo __func__, ifp->if_flags); 1505177595Sweongyo 1506178354Ssam MALO_LOCK_ASSERT(sc); 1507177595Sweongyo 1508177595Sweongyo /* 1509177595Sweongyo * Stop anything previously setup. This is safe whether this is 1510177595Sweongyo * the first time through or not. 1511177595Sweongyo */ 1512177595Sweongyo malo_stop_locked(ifp, 0); 1513177595Sweongyo 1514177595Sweongyo /* 1515177595Sweongyo * Push state to the firmware. 1516177595Sweongyo */ 1517177595Sweongyo if (!malo_hal_reset(sc)) { 1518177595Sweongyo if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1519178354Ssam return; 1520177595Sweongyo } 1521177595Sweongyo 1522177595Sweongyo /* 1523177595Sweongyo * Setup recv (once); transmit is already good to go. 1524177595Sweongyo */ 1525177595Sweongyo error = malo_startrecv(sc); 1526177595Sweongyo if (error != 0) { 1527177595Sweongyo if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1528177595Sweongyo __func__, error); 1529178354Ssam return; 1530177595Sweongyo } 1531177595Sweongyo 1532177595Sweongyo /* 1533177595Sweongyo * Enable interrupts. 1534177595Sweongyo */ 1535177595Sweongyo sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1536177595Sweongyo | MALO_A2HRIC_BIT_TX_DONE 1537177595Sweongyo | MALO_A2HRIC_BIT_OPC_DONE 1538177595Sweongyo | MALO_A2HRIC_BIT_MAC_EVENT 1539177595Sweongyo | MALO_A2HRIC_BIT_RX_PROBLEM 1540177595Sweongyo | MALO_A2HRIC_BIT_ICV_ERROR 1541177595Sweongyo | MALO_A2HRIC_BIT_RADAR_DETECT 1542177595Sweongyo | MALO_A2HRIC_BIT_CHAN_SWITCH; 1543177595Sweongyo 1544177595Sweongyo ifp->if_drv_flags |= IFF_DRV_RUNNING; 1545177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1546199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1547178354Ssam} 1548177595Sweongyo 1549178354Ssamstatic void 1550178354Ssammalo_init(void *arg) 1551178354Ssam{ 1552178354Ssam struct malo_softc *sc = (struct malo_softc *) arg; 1553178354Ssam struct ifnet *ifp = sc->malo_ifp; 1554178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1555178354Ssam 1556178354Ssam DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1557178354Ssam __func__, ifp->if_flags); 1558177595Sweongyo 1559178354Ssam MALO_LOCK(sc); 1560178354Ssam malo_init_locked(sc); 1561177595Sweongyo 1562177595Sweongyo MALO_UNLOCK(sc); 1563177595Sweongyo 1564178354Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1565178354Ssam ieee80211_start_all(ic); /* start all vap's */ 1566177595Sweongyo} 1567177595Sweongyo 1568177595Sweongyo/* 1569177595Sweongyo * Set the multicast filter contents into the hardware. 1570177595Sweongyo */ 1571177595Sweongyostatic void 1572177595Sweongyomalo_setmcastfilter(struct malo_softc *sc) 1573177595Sweongyo{ 1574178354Ssam struct ifnet *ifp = sc->malo_ifp; 1575178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1576177595Sweongyo struct ifmultiaddr *ifma; 1577177595Sweongyo uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1578177595Sweongyo uint8_t *mp; 1579177595Sweongyo int nmc; 1580177595Sweongyo 1581177595Sweongyo mp = macs; 1582177595Sweongyo nmc = 0; 1583177595Sweongyo 1584177595Sweongyo if (ic->ic_opmode == IEEE80211_M_MONITOR || 1585177595Sweongyo (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1586177595Sweongyo goto all; 1587177595Sweongyo 1588195049Srwatson if_maddr_rlock(ifp); 1589177595Sweongyo TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1590177595Sweongyo if (ifma->ifma_addr->sa_family != AF_LINK) 1591177595Sweongyo continue; 1592177595Sweongyo 1593177595Sweongyo if (nmc == MALO_HAL_MCAST_MAX) { 1594177595Sweongyo ifp->if_flags |= IFF_ALLMULTI; 1595195049Srwatson if_maddr_runlock(ifp); 1596177595Sweongyo goto all; 1597177595Sweongyo } 1598177595Sweongyo IEEE80211_ADDR_COPY(mp, 1599177595Sweongyo LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1600177595Sweongyo 1601177595Sweongyo mp += IEEE80211_ADDR_LEN, nmc++; 1602177595Sweongyo } 1603195049Srwatson if_maddr_runlock(ifp); 1604177595Sweongyo 1605177595Sweongyo malo_hal_setmcast(sc->malo_mh, nmc, macs); 1606177595Sweongyo 1607177595Sweongyoall: 1608177595Sweongyo /* 1609177595Sweongyo * XXX we don't know how to set the f/w for supporting 1610177595Sweongyo * IFF_ALLMULTI | IFF_PROMISC cases 1611177595Sweongyo */ 1612177595Sweongyo return; 1613177595Sweongyo} 1614177595Sweongyo 1615177595Sweongyostatic int 1616177595Sweongyomalo_mode_init(struct malo_softc *sc) 1617177595Sweongyo{ 1618178354Ssam struct ifnet *ifp = sc->malo_ifp; 1619178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1620177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1621177595Sweongyo 1622177595Sweongyo /* 1623177595Sweongyo * NB: Ignore promisc in hostap mode; it's set by the 1624177595Sweongyo * bridge. This is wrong but we have no way to 1625177595Sweongyo * identify internal requests (from the bridge) 1626177595Sweongyo * versus external requests such as for tcpdump. 1627177595Sweongyo */ 1628177595Sweongyo malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1629177595Sweongyo ic->ic_opmode != IEEE80211_M_HOSTAP); 1630177595Sweongyo malo_setmcastfilter(sc); 1631177595Sweongyo 1632177595Sweongyo return ENXIO; 1633177595Sweongyo} 1634177595Sweongyo 1635177595Sweongyostatic void 1636177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1637177595Sweongyo{ 1638177595Sweongyo struct ieee80211_node *ni; 1639177595Sweongyo struct malo_txbuf *bf; 1640177595Sweongyo u_int ix; 1641177595Sweongyo 1642177595Sweongyo /* 1643177595Sweongyo * NB: this assumes output has been stopped and 1644177595Sweongyo * we do not need to block malo_tx_tasklet 1645177595Sweongyo */ 1646177595Sweongyo for (ix = 0;; ix++) { 1647177595Sweongyo MALO_TXQ_LOCK(txq); 1648177595Sweongyo bf = STAILQ_FIRST(&txq->active); 1649177595Sweongyo if (bf == NULL) { 1650177595Sweongyo MALO_TXQ_UNLOCK(txq); 1651177595Sweongyo break; 1652177595Sweongyo } 1653177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1654177595Sweongyo MALO_TXQ_UNLOCK(txq); 1655177595Sweongyo#ifdef MALO_DEBUG 1656177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RESET) { 1657178354Ssam struct ifnet *ifp = sc->malo_ifp; 1658178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1659177595Sweongyo const struct malo_txrec *tr = 1660177595Sweongyo mtod(bf->bf_m, const struct malo_txrec *); 1661177595Sweongyo malo_printtxbuf(bf, txq->qnum, ix); 1662178354Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1663177595Sweongyo bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1664177595Sweongyo } 1665177595Sweongyo#endif /* MALO_DEBUG */ 1666177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1667177595Sweongyo ni = bf->bf_node; 1668177595Sweongyo bf->bf_node = NULL; 1669177595Sweongyo if (ni != NULL) { 1670177595Sweongyo /* 1671177595Sweongyo * Reclaim node reference. 1672177595Sweongyo */ 1673177595Sweongyo ieee80211_free_node(ni); 1674177595Sweongyo } 1675177595Sweongyo m_freem(bf->bf_m); 1676177595Sweongyo bf->bf_m = NULL; 1677177595Sweongyo 1678177595Sweongyo MALO_TXQ_LOCK(txq); 1679177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1680177595Sweongyo txq->nfree++; 1681177595Sweongyo MALO_TXQ_UNLOCK(txq); 1682177595Sweongyo } 1683177595Sweongyo} 1684177595Sweongyo 1685177595Sweongyostatic void 1686177595Sweongyomalo_stop_locked(struct ifnet *ifp, int disable) 1687177595Sweongyo{ 1688177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1689177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1690178354Ssam int i; 1691177595Sweongyo 1692177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1693177595Sweongyo __func__, sc->malo_invalid, ifp->if_flags); 1694177595Sweongyo 1695177595Sweongyo MALO_LOCK_ASSERT(sc); 1696177595Sweongyo 1697177595Sweongyo if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1698177595Sweongyo return; 1699177595Sweongyo 1700177595Sweongyo /* 1701177595Sweongyo * Shutdown the hardware and driver: 1702177595Sweongyo * disable interrupts 1703177595Sweongyo * turn off the radio 1704177595Sweongyo * drain and release tx queues 1705177595Sweongyo * 1706177595Sweongyo * Note that some of this work is not possible if the hardware 1707177595Sweongyo * is gone (invalid). 1708177595Sweongyo */ 1709177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1710199559Sjhb callout_stop(&sc->malo_watchdog_timer); 1711199559Sjhb sc->malo_timer = 0; 1712178354Ssam /* diable interrupt. */ 1713178354Ssam malo_hal_intrset(mh, 0); 1714178354Ssam /* turn off the radio. */ 1715178354Ssam malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1716177595Sweongyo 1717177595Sweongyo /* drain and release tx queues. */ 1718177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1719177595Sweongyo malo_tx_draintxq(sc, &sc->malo_txq[i]); 1720177595Sweongyo} 1721177595Sweongyo 1722177595Sweongyostatic int 1723177595Sweongyomalo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1724177595Sweongyo{ 1725177595Sweongyo#define MALO_IS_RUNNING(ifp) \ 1726177595Sweongyo ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1727177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1728178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1729178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1730178354Ssam int error = 0, startall = 0; 1731177595Sweongyo 1732177595Sweongyo MALO_LOCK(sc); 1733177595Sweongyo switch (cmd) { 1734177595Sweongyo case SIOCSIFFLAGS: 1735177595Sweongyo if (MALO_IS_RUNNING(ifp)) { 1736177595Sweongyo /* 1737177595Sweongyo * To avoid rescanning another access point, 1738177595Sweongyo * do not call malo_init() here. Instead, 1739177595Sweongyo * only reflect promisc mode settings. 1740177595Sweongyo */ 1741177595Sweongyo malo_mode_init(sc); 1742177595Sweongyo } else if (ifp->if_flags & IFF_UP) { 1743177595Sweongyo /* 1744177595Sweongyo * Beware of being called during attach/detach 1745177595Sweongyo * to reset promiscuous mode. In that case we 1746177595Sweongyo * will still be marked UP but not RUNNING. 1747177595Sweongyo * However trying to re-init the interface 1748177595Sweongyo * is the wrong thing to do as we've already 1749177595Sweongyo * torn down much of our state. There's 1750177595Sweongyo * probably a better way to deal with this. 1751177595Sweongyo */ 1752178354Ssam if (!sc->malo_invalid) { 1753178354Ssam malo_init_locked(sc); 1754178354Ssam startall = 1; 1755178354Ssam } 1756177595Sweongyo } else 1757177595Sweongyo malo_stop_locked(ifp, 1); 1758177595Sweongyo break; 1759178354Ssam case SIOCGIFMEDIA: 1760178354Ssam case SIOCSIFMEDIA: 1761178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1762177595Sweongyo break; 1763177595Sweongyo default: 1764178354Ssam error = ether_ioctl(ifp, cmd, data); 1765177595Sweongyo break; 1766177595Sweongyo } 1767177595Sweongyo MALO_UNLOCK(sc); 1768177595Sweongyo 1769178354Ssam if (startall) 1770178354Ssam ieee80211_start_all(ic); 1771177595Sweongyo return error; 1772177595Sweongyo#undef MALO_IS_RUNNING 1773177595Sweongyo} 1774177595Sweongyo 1775177595Sweongyo/* 1776177595Sweongyo * Callback from the 802.11 layer to update the slot time 1777177595Sweongyo * based on the current setting. We use it to notify the 1778177595Sweongyo * firmware of ERP changes and the f/w takes care of things 1779177595Sweongyo * like slot time and preamble. 1780177595Sweongyo */ 1781177595Sweongyostatic void 1782177595Sweongyomalo_updateslot(struct ifnet *ifp) 1783177595Sweongyo{ 1784177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1785178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1786177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1787177595Sweongyo int error; 1788177595Sweongyo 1789177595Sweongyo /* NB: can be called early; suppress needless cmds */ 1790177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1791177595Sweongyo return; 1792177595Sweongyo 1793177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 1794177595Sweongyo "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1795177595Sweongyo __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1796177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1797177595Sweongyo 1798177595Sweongyo if (ic->ic_flags & IEEE80211_F_SHSLOT) 1799177595Sweongyo error = malo_hal_set_slot(mh, 1); 1800177595Sweongyo else 1801177595Sweongyo error = malo_hal_set_slot(mh, 0); 1802177595Sweongyo 1803177595Sweongyo if (error != 0) 1804177595Sweongyo device_printf(sc->malo_dev, "setting %s slot failed\n", 1805177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1806177595Sweongyo} 1807177595Sweongyo 1808177595Sweongyostatic int 1809178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1810177595Sweongyo{ 1811178354Ssam struct ieee80211com *ic = vap->iv_ic; 1812178354Ssam struct malo_softc *sc = ic->ic_ifp->if_softc; 1813177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1814177595Sweongyo int error; 1815177595Sweongyo 1816177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1817178354Ssam ieee80211_state_name[vap->iv_state], 1818177595Sweongyo ieee80211_state_name[nstate]); 1819177595Sweongyo 1820177595Sweongyo /* 1821178354Ssam * Invoke the net80211 layer first so iv_bss is setup. 1822177595Sweongyo */ 1823178354Ssam error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1824178354Ssam if (error != 0) 1825178354Ssam return error; 1826178354Ssam 1827178354Ssam if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1828178354Ssam struct ieee80211_node *ni = vap->iv_bss; 1829178354Ssam enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1830178354Ssam const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1831178354Ssam 1832177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, 1833178354Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1834178354Ssam "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1835178354Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1836177595Sweongyo ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1837178354Ssam ieee80211_chan2ieee(ic, ic->ic_curchan), 1838178354Ssam ni->ni_associd, mode, tp->ucastrate); 1839177595Sweongyo 1840178354Ssam malo_hal_setradio(mh, 1, 1841178354Ssam (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1842178354Ssam MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1843178354Ssam malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1844178354Ssam malo_hal_set_rate(mh, mode, 1845178354Ssam tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1846178354Ssam 0 : malo_fix2rate(tp->ucastrate)); 1847177595Sweongyo } 1848178354Ssam return 0; 1849177595Sweongyo} 1850177595Sweongyo 1851177595Sweongyostatic int 1852177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1853177595Sweongyo const struct ieee80211_bpf_params *params) 1854177595Sweongyo{ 1855177595Sweongyo struct ieee80211com *ic = ni->ni_ic; 1856177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 1857177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1858177595Sweongyo struct malo_txbuf *bf; 1859177595Sweongyo struct malo_txq *txq; 1860177595Sweongyo 1861177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1862177595Sweongyo ieee80211_free_node(ni); 1863177595Sweongyo m_freem(m); 1864177595Sweongyo return ENETDOWN; 1865177595Sweongyo } 1866177595Sweongyo 1867177595Sweongyo /* 1868177595Sweongyo * Grab a TX buffer and associated resources. Note that we depend 1869177595Sweongyo * on the classification by the 802.11 layer to get to the right h/w 1870177595Sweongyo * queue. Management frames must ALWAYS go on queue 1 but we 1871177595Sweongyo * cannot just force that here because we may receive non-mgt frames. 1872177595Sweongyo */ 1873177595Sweongyo txq = &sc->malo_txq[0]; 1874177595Sweongyo bf = malo_getbuf(sc, txq); 1875177595Sweongyo if (bf == NULL) { 1876177595Sweongyo /* XXX blocks other traffic */ 1877177595Sweongyo ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1878177595Sweongyo ieee80211_free_node(ni); 1879177595Sweongyo m_freem(m); 1880177595Sweongyo return ENOBUFS; 1881177595Sweongyo } 1882177595Sweongyo 1883177595Sweongyo /* 1884177595Sweongyo * Pass the frame to the h/w for transmission. 1885177595Sweongyo */ 1886177595Sweongyo if (malo_tx_start(sc, ni, bf, m) != 0) { 1887177595Sweongyo ifp->if_oerrors++; 1888177595Sweongyo bf->bf_m = NULL; 1889177595Sweongyo bf->bf_node = NULL; 1890177595Sweongyo MALO_TXQ_LOCK(txq); 1891177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1892177595Sweongyo txq->nfree++; 1893177595Sweongyo MALO_TXQ_UNLOCK(txq); 1894177595Sweongyo 1895177595Sweongyo ieee80211_free_node(ni); 1896177595Sweongyo return EIO; /* XXX */ 1897177595Sweongyo } 1898177595Sweongyo 1899177595Sweongyo /* 1900177595Sweongyo * NB: We don't need to lock against tx done because this just 1901177595Sweongyo * prods the firmware to check the transmit descriptors. The firmware 1902177595Sweongyo * will also start fetching descriptors by itself if it notices 1903177595Sweongyo * new ones are present when it goes to deliver a tx done interrupt 1904177595Sweongyo * to the host. So if we race with tx done processing it's ok. 1905177595Sweongyo * Delivering the kick here rather than in malo_tx_start is 1906177595Sweongyo * an optimization to avoid poking the firmware for each packet. 1907177595Sweongyo * 1908177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1909177595Sweongyo */ 1910177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1911177595Sweongyo 1912177595Sweongyo return 0; 1913177595Sweongyo} 1914177595Sweongyo 1915177595Sweongyostatic void 1916177595Sweongyomalo_sysctlattach(struct malo_softc *sc) 1917177595Sweongyo{ 1918177595Sweongyo#ifdef MALO_DEBUG 1919177595Sweongyo struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1920177595Sweongyo struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1921177595Sweongyo 1922177595Sweongyo sc->malo_debug = malo_debug; 1923177595Sweongyo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1924177595Sweongyo "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1925177595Sweongyo "control debugging printfs"); 1926177595Sweongyo#endif 1927177595Sweongyo} 1928177595Sweongyo 1929177595Sweongyostatic void 1930177595Sweongyomalo_announce(struct malo_softc *sc) 1931177595Sweongyo{ 1932177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1933177595Sweongyo 1934177595Sweongyo if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1935177595Sweongyo sc->malo_hwspecs.hwversion, 1936177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1937177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1938177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1939177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1940177595Sweongyo sc->malo_hwspecs.regioncode); 1941177595Sweongyo 1942177595Sweongyo if (bootverbose || malo_rxbuf != MALO_RXBUF) 1943177595Sweongyo if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1944177595Sweongyo if (bootverbose || malo_txbuf != MALO_TXBUF) 1945177595Sweongyo if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1946177595Sweongyo} 1947177595Sweongyo 1948177595Sweongyo/* 1949177595Sweongyo * Convert net80211 channel to a HAL channel. 1950177595Sweongyo */ 1951177595Sweongyostatic void 1952177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1953177595Sweongyo{ 1954177595Sweongyo hc->channel = chan->ic_ieee; 1955177595Sweongyo 1956177595Sweongyo *(uint32_t *)&hc->flags = 0; 1957177595Sweongyo if (IEEE80211_IS_CHAN_2GHZ(chan)) 1958177595Sweongyo hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1959177595Sweongyo} 1960177595Sweongyo 1961177595Sweongyo/* 1962177595Sweongyo * Set/change channels. If the channel is really being changed, 1963177595Sweongyo * it's done by reseting the chip. To accomplish this we must 1964177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la 1965177595Sweongyo * malo_init. 1966177595Sweongyo */ 1967177595Sweongyostatic int 1968177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1969177595Sweongyo{ 1970177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1971177595Sweongyo struct malo_hal_channel hchan; 1972177595Sweongyo 1973177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1974177595Sweongyo __func__, chan->ic_freq, chan->ic_flags); 1975177595Sweongyo 1976177595Sweongyo /* 1977177595Sweongyo * Convert to a HAL channel description with the flags constrained 1978177595Sweongyo * to reflect the current operating mode. 1979177595Sweongyo */ 1980177595Sweongyo malo_mapchan(&hchan, chan); 1981177595Sweongyo malo_hal_intrset(mh, 0); /* disable interrupts */ 1982177595Sweongyo malo_hal_setchannel(mh, &hchan); 1983177595Sweongyo malo_hal_settxpower(mh, &hchan); 1984177595Sweongyo 1985177595Sweongyo /* 1986177595Sweongyo * Update internal state. 1987177595Sweongyo */ 1988177595Sweongyo sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 1989177595Sweongyo sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 1990177595Sweongyo if (IEEE80211_IS_CHAN_ANYG(chan)) { 1991177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 1992177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 1993177595Sweongyo } else { 1994177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 1995177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 1996177595Sweongyo } 1997177595Sweongyo sc->malo_curchan = hchan; 1998177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1999177595Sweongyo 2000177595Sweongyo return 0; 2001177595Sweongyo} 2002177595Sweongyo 2003177595Sweongyostatic void 2004177595Sweongyomalo_scan_start(struct ieee80211com *ic) 2005177595Sweongyo{ 2006177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2007177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2008177595Sweongyo 2009177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2010177595Sweongyo} 2011177595Sweongyo 2012177595Sweongyostatic void 2013177595Sweongyomalo_scan_end(struct ieee80211com *ic) 2014177595Sweongyo{ 2015177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2016177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2017177595Sweongyo 2018177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2019177595Sweongyo} 2020177595Sweongyo 2021177595Sweongyostatic void 2022177595Sweongyomalo_set_channel(struct ieee80211com *ic) 2023177595Sweongyo{ 2024177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2025177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2026177595Sweongyo 2027177595Sweongyo (void) malo_chan_set(sc, ic->ic_curchan); 2028177595Sweongyo} 2029177595Sweongyo 2030177595Sweongyostatic void 2031177595Sweongyomalo_rx_proc(void *arg, int npending) 2032177595Sweongyo{ 2033177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 2034177595Sweongyo ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2035177595Sweongyo IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2036177595Sweongyo struct malo_softc *sc = arg; 2037178354Ssam struct ifnet *ifp = sc->malo_ifp; 2038178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2039177595Sweongyo struct malo_rxbuf *bf; 2040177595Sweongyo struct malo_rxdesc *ds; 2041177595Sweongyo struct mbuf *m, *mnew; 2042177595Sweongyo struct ieee80211_qosframe *wh; 2043177595Sweongyo struct ieee80211_qosframe_addr4 *wh4; 2044177595Sweongyo struct ieee80211_node *ni; 2045177595Sweongyo int off, len, hdrlen, pktlen, rssi, ntodo; 2046177595Sweongyo uint8_t *data, status; 2047177595Sweongyo uint32_t readptr, writeptr; 2048177595Sweongyo 2049177595Sweongyo DPRINTF(sc, MALO_DEBUG_RX_PROC, 2050177595Sweongyo "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2051177595Sweongyo __func__, npending, 2052177595Sweongyo sc->malo_hwspecs.rxdesc_read, 2053177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2054177595Sweongyo sc->malo_hwspecs.rxdesc_write, 2055177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2056177595Sweongyo 2057177595Sweongyo readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2058177595Sweongyo writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2059177595Sweongyo if (readptr == writeptr) 2060177595Sweongyo return; 2061177595Sweongyo 2062177595Sweongyo bf = sc->malo_rxnext; 2063178354Ssam for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2064177595Sweongyo if (bf == NULL) { 2065177595Sweongyo bf = STAILQ_FIRST(&sc->malo_rxbuf); 2066177595Sweongyo break; 2067177595Sweongyo } 2068177595Sweongyo ds = bf->bf_desc; 2069177595Sweongyo if (bf->bf_m == NULL) { 2070177595Sweongyo /* 2071177595Sweongyo * If data allocation failed previously there 2072177595Sweongyo * will be no buffer; try again to re-populate it. 2073177595Sweongyo * Note the firmware will not advance to the next 2074177595Sweongyo * descriptor with a dma buffer so we must mimic 2075177595Sweongyo * this or we'll get out of sync. 2076177595Sweongyo */ 2077177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, 2078177595Sweongyo "%s: rx buf w/o dma memory\n", __func__); 2079177595Sweongyo (void)malo_rxbuf_init(sc, bf); 2080177595Sweongyo break; 2081177595Sweongyo } 2082177595Sweongyo MALO_RXDESC_SYNC(sc, ds, 2083177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2084177595Sweongyo if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2085177595Sweongyo break; 2086177595Sweongyo 2087177595Sweongyo readptr = le32toh(ds->physnext); 2088177595Sweongyo 2089177595Sweongyo#ifdef MALO_DEBUG 2090177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2091177595Sweongyo malo_printrxbuf(bf, 0); 2092177595Sweongyo#endif 2093177595Sweongyo status = ds->status; 2094177595Sweongyo if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2095177595Sweongyo ifp->if_ierrors++; 2096177595Sweongyo goto rx_next; 2097177595Sweongyo } 2098177595Sweongyo /* 2099177595Sweongyo * Sync the data buffer. 2100177595Sweongyo */ 2101177595Sweongyo len = le16toh(ds->pktlen); 2102177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2103177595Sweongyo BUS_DMASYNC_POSTREAD); 2104177595Sweongyo /* 2105177595Sweongyo * The 802.11 header is provided all or in part at the front; 2106177595Sweongyo * use it to calculate the true size of the header that we'll 2107177595Sweongyo * construct below. We use this to figure out where to copy 2108177595Sweongyo * payload prior to constructing the header. 2109177595Sweongyo */ 2110177595Sweongyo m = bf->bf_m; 2111201758Smbr data = mtod(m, uint8_t *); 2112177595Sweongyo hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2113177595Sweongyo off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2114177595Sweongyo 2115177595Sweongyo /* 2116178354Ssam * Calculate RSSI. XXX wrong 2117177595Sweongyo */ 2118177595Sweongyo rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2119177595Sweongyo if (rssi > 100) 2120177595Sweongyo rssi = 100; 2121177595Sweongyo 2122177595Sweongyo pktlen = hdrlen + (len - off); 2123177595Sweongyo /* 2124177595Sweongyo * NB: we know our frame is at least as large as 2125177595Sweongyo * IEEE80211_MIN_LEN because there is a 4-address frame at 2126177595Sweongyo * the front. Hence there's no need to vet the packet length. 2127177595Sweongyo * If the frame in fact is too small it should be discarded 2128177595Sweongyo * at the net80211 layer. 2129177595Sweongyo */ 2130177595Sweongyo 2131177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 2132177595Sweongyo mnew = malo_getrxmbuf(sc, bf); 2133177595Sweongyo if (mnew == NULL) { 2134177595Sweongyo ifp->if_ierrors++; 2135177595Sweongyo goto rx_next; 2136177595Sweongyo } 2137177595Sweongyo /* 2138177595Sweongyo * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2139177595Sweongyo * re-setup the rx descriptor using the replacement dma 2140177595Sweongyo * buffer we just installed above. 2141177595Sweongyo */ 2142177595Sweongyo bf->bf_m = mnew; 2143177595Sweongyo m->m_data += off - hdrlen; 2144177595Sweongyo m->m_pkthdr.len = m->m_len = pktlen; 2145177595Sweongyo m->m_pkthdr.rcvif = ifp; 2146177595Sweongyo 2147177595Sweongyo /* 2148177595Sweongyo * Piece 802.11 header together. 2149177595Sweongyo */ 2150177595Sweongyo wh = mtod(m, struct ieee80211_qosframe *); 2151177595Sweongyo /* NB: don't need to do this sometimes but ... */ 2152177595Sweongyo /* XXX special case so we can memcpy after m_devget? */ 2153177595Sweongyo ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2154177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 2155177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 2156177595Sweongyo wh4 = mtod(m, 2157177595Sweongyo struct ieee80211_qosframe_addr4*); 2158177595Sweongyo *(uint16_t *)wh4->i_qos = ds->qosctrl; 2159177595Sweongyo } else { 2160177595Sweongyo *(uint16_t *)wh->i_qos = ds->qosctrl; 2161177595Sweongyo } 2162177595Sweongyo } 2163192468Ssam if (ieee80211_radiotap_active(ic)) { 2164177595Sweongyo sc->malo_rx_th.wr_flags = 0; 2165177595Sweongyo sc->malo_rx_th.wr_rate = ds->rate; 2166177595Sweongyo sc->malo_rx_th.wr_antsignal = rssi; 2167177595Sweongyo sc->malo_rx_th.wr_antnoise = ds->nf; 2168177595Sweongyo } 2169177595Sweongyo#ifdef MALO_DEBUG 2170177595Sweongyo if (IFF_DUMPPKTS_RECV(sc, wh)) { 2171177595Sweongyo ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2172177595Sweongyo len, ds->rate, rssi); 2173177595Sweongyo } 2174177595Sweongyo#endif 2175177595Sweongyo ifp->if_ipackets++; 2176177595Sweongyo 2177177595Sweongyo /* dispatch */ 2178177595Sweongyo ni = ieee80211_find_rxnode(ic, 2179178354Ssam (struct ieee80211_frame_min *)wh); 2180178354Ssam if (ni != NULL) { 2181192468Ssam (void) ieee80211_input(ni, m, rssi, ds->nf); 2182178354Ssam ieee80211_free_node(ni); 2183178354Ssam } else 2184192468Ssam (void) ieee80211_input_all(ic, m, rssi, ds->nf); 2185177595Sweongyorx_next: 2186177595Sweongyo /* NB: ignore ENOMEM so we process more descriptors */ 2187177595Sweongyo (void) malo_rxbuf_init(sc, bf); 2188177595Sweongyo bf = STAILQ_NEXT(bf, bf_list); 2189177595Sweongyo } 2190177595Sweongyo 2191177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2192177595Sweongyo sc->malo_rxnext = bf; 2193177595Sweongyo 2194177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2195177595Sweongyo !IFQ_IS_EMPTY(&ifp->if_snd)) 2196177595Sweongyo malo_start(ifp); 2197177595Sweongyo#undef IEEE80211_DIR_DSTODS 2198177595Sweongyo} 2199177595Sweongyo 2200177595Sweongyostatic void 2201177595Sweongyomalo_stop(struct ifnet *ifp, int disable) 2202177595Sweongyo{ 2203177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2204177595Sweongyo 2205177595Sweongyo MALO_LOCK(sc); 2206177595Sweongyo malo_stop_locked(ifp, disable); 2207177595Sweongyo MALO_UNLOCK(sc); 2208177595Sweongyo} 2209177595Sweongyo 2210177595Sweongyo/* 2211177595Sweongyo * Reclaim all tx queue resources. 2212177595Sweongyo */ 2213177595Sweongyostatic void 2214177595Sweongyomalo_tx_cleanup(struct malo_softc *sc) 2215177595Sweongyo{ 2216177595Sweongyo int i; 2217177595Sweongyo 2218177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2219177595Sweongyo malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2220177595Sweongyo} 2221177595Sweongyo 2222177595Sweongyoint 2223177595Sweongyomalo_detach(struct malo_softc *sc) 2224177595Sweongyo{ 2225177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2226178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2227177595Sweongyo 2228177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2229177595Sweongyo __func__, ifp->if_flags); 2230177595Sweongyo 2231177595Sweongyo malo_stop(ifp, 1); 2232177595Sweongyo 2233177595Sweongyo if (sc->malo_tq != NULL) { 2234177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2235177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2236177595Sweongyo taskqueue_free(sc->malo_tq); 2237177595Sweongyo sc->malo_tq = NULL; 2238177595Sweongyo } 2239177595Sweongyo 2240177595Sweongyo /* 2241177595Sweongyo * NB: the order of these is important: 2242177595Sweongyo * o call the 802.11 layer before detaching the hal to 2243177595Sweongyo * insure callbacks into the driver to delete global 2244177595Sweongyo * key cache entries can be handled 2245177595Sweongyo * o reclaim the tx queue data structures after calling 2246177595Sweongyo * the 802.11 layer as we'll get called back to reclaim 2247177595Sweongyo * node state and potentially want to use them 2248177595Sweongyo * o to cleanup the tx queues the hal is called, so detach 2249177595Sweongyo * it last 2250177595Sweongyo * Other than that, it's straightforward... 2251177595Sweongyo */ 2252178354Ssam ieee80211_ifdetach(ic); 2253199559Sjhb callout_drain(&sc->malo_watchdog_timer); 2254177595Sweongyo malo_dma_cleanup(sc); 2255177595Sweongyo malo_tx_cleanup(sc); 2256177595Sweongyo malo_hal_detach(sc->malo_mh); 2257177595Sweongyo if_free(ifp); 2258177595Sweongyo 2259177595Sweongyo MALO_LOCK_DESTROY(sc); 2260177595Sweongyo 2261177595Sweongyo return 0; 2262177595Sweongyo} 2263177595Sweongyo 2264177595Sweongyovoid 2265177595Sweongyomalo_shutdown(struct malo_softc *sc) 2266177595Sweongyo{ 2267177595Sweongyo malo_stop(sc->malo_ifp, 1); 2268177595Sweongyo} 2269177595Sweongyo 2270177595Sweongyovoid 2271177595Sweongyomalo_suspend(struct malo_softc *sc) 2272177595Sweongyo{ 2273177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2274177595Sweongyo 2275177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2276177595Sweongyo __func__, ifp->if_flags); 2277177595Sweongyo 2278177595Sweongyo malo_stop(ifp, 1); 2279177595Sweongyo} 2280177595Sweongyo 2281177595Sweongyovoid 2282177595Sweongyomalo_resume(struct malo_softc *sc) 2283177595Sweongyo{ 2284177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2285177595Sweongyo 2286177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2287177595Sweongyo __func__, ifp->if_flags); 2288177595Sweongyo 2289178354Ssam if (ifp->if_flags & IFF_UP) 2290177595Sweongyo malo_init(sc); 2291177595Sweongyo} 2292