if_malo.c revision 190552
1177595Sweongyo/*- 2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc. 4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting 5177595Sweongyo * All rights reserved. 6177595Sweongyo * 7177595Sweongyo * Redistribution and use in source and binary forms, with or without 8177595Sweongyo * modification, are permitted provided that the following conditions 9177595Sweongyo * are met: 10177595Sweongyo * 1. Redistributions of source code must retain the above copyright 11177595Sweongyo * notice, this list of conditions and the following disclaimer, 12177595Sweongyo * without modification. 13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14177595Sweongyo * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15177595Sweongyo * redistribution must be conditioned upon including a substantially 16177595Sweongyo * similar Disclaimer requirement for further binary redistribution. 17177595Sweongyo * 18177595Sweongyo * NO WARRANTY 19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES. 30177595Sweongyo */ 31177595Sweongyo 32177595Sweongyo#include <sys/cdefs.h> 33177595Sweongyo#ifdef __FreeBSD__ 34177595Sweongyo__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 190552 2009-03-30 11:51:05Z weongyo $"); 35177595Sweongyo#endif 36177595Sweongyo 37178354Ssam#include "opt_malo.h" 38178354Ssam 39177595Sweongyo#include <sys/param.h> 40177595Sweongyo#include <sys/endian.h> 41177595Sweongyo#include <sys/kernel.h> 42177595Sweongyo#include <sys/socket.h> 43177595Sweongyo#include <sys/sockio.h> 44177595Sweongyo#include <sys/sysctl.h> 45177595Sweongyo#include <sys/taskqueue.h> 46177595Sweongyo 47177595Sweongyo#include <machine/bus.h> 48177595Sweongyo#include <sys/bus.h> 49177595Sweongyo 50177595Sweongyo#include <net/if.h> 51177595Sweongyo#include <net/if_dl.h> 52177595Sweongyo#include <net/if_media.h> 53177595Sweongyo#include <net/if_types.h> 54177595Sweongyo#include <net/ethernet.h> 55177595Sweongyo 56177595Sweongyo#include <net80211/ieee80211_var.h> 57177595Sweongyo#include <net80211/ieee80211_regdomain.h> 58177595Sweongyo 59177595Sweongyo#include <net/bpf.h> 60177595Sweongyo 61177595Sweongyo#include <dev/malo/if_malo.h> 62177595Sweongyo 63177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64177595Sweongyo "Marvell 88w8335 driver parameters"); 65177595Sweongyo 66177595Sweongyostatic int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68177595Sweongyo 0, "tx buffers to send at once"); 69177595SweongyoTUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70177595Sweongyostatic int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72177595Sweongyo 0, "rx buffers allocated"); 73177595SweongyoTUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74177595Sweongyostatic int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76177595Sweongyo 0, "max rx buffers to process per interrupt"); 77177595SweongyoTUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78177595Sweongyostatic int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80177595Sweongyo 0, "tx buffers allocated"); 81177595SweongyoTUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82177595Sweongyo 83177595Sweongyo#ifdef MALO_DEBUG 84177595Sweongyostatic int malo_debug = 0; 85177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86177595Sweongyo 0, "control debugging printfs"); 87177595SweongyoTUNABLE_INT("hw.malo.debug", &malo_debug); 88177595Sweongyoenum { 89177595Sweongyo MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90177595Sweongyo MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91177595Sweongyo MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92177595Sweongyo MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93177595Sweongyo MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94177595Sweongyo MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95177595Sweongyo MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96177595Sweongyo MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97177595Sweongyo MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98177595Sweongyo MALO_DEBUG_NODE = 0x00000800, /* node management */ 99177595Sweongyo MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100177595Sweongyo MALO_DEBUG_FW = 0x00008000, /* firmware */ 101177595Sweongyo MALO_DEBUG_ANY = 0xffffffff 102177595Sweongyo}; 103177595Sweongyo#define IS_BEACON(wh) \ 104177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105177595Sweongyo IEEE80211_FC0_SUBTYPE_MASK)) == \ 106177595Sweongyo (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107177595Sweongyo#define IFF_DUMPPKTS_RECV(sc, wh) \ 108177595Sweongyo (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109177595Sweongyo ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111177595Sweongyo (IFF_DEBUG|IFF_LINK2)) 112177595Sweongyo#define IFF_DUMPPKTS_XMIT(sc) \ 113177595Sweongyo ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115177595Sweongyo (IFF_DEBUG | IFF_LINK2)) 116177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 117177595Sweongyo if (sc->malo_debug & (m)) \ 118177595Sweongyo printf(fmt, __VA_ARGS__); \ 119177595Sweongyo} while (0) 120177595Sweongyo#else 121177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 122177595Sweongyo (void) sc; \ 123177595Sweongyo} while (0) 124177595Sweongyo#endif 125177595Sweongyo 126177595SweongyoMALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127177595Sweongyo 128178354Ssamstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *ic, 129178354Ssam const char name[IFNAMSIZ], int unit, int opmode, int flags, 130178354Ssam const uint8_t bssid[IEEE80211_ADDR_LEN], 131178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]); 132178354Ssamstatic void malo_vap_delete(struct ieee80211vap *); 133177595Sweongyostatic int malo_dma_setup(struct malo_softc *); 134177595Sweongyostatic int malo_setup_hwdma(struct malo_softc *); 135177595Sweongyostatic void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136177595Sweongyostatic void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137177595Sweongyostatic void malo_start(struct ifnet *); 138177595Sweongyostatic void malo_watchdog(struct ifnet *); 139177595Sweongyostatic int malo_ioctl(struct ifnet *, u_long, caddr_t); 140177595Sweongyostatic void malo_updateslot(struct ifnet *); 141178354Ssamstatic int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142177595Sweongyostatic void malo_scan_start(struct ieee80211com *); 143177595Sweongyostatic void malo_scan_end(struct ieee80211com *); 144177595Sweongyostatic void malo_set_channel(struct ieee80211com *); 145177595Sweongyostatic int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146177595Sweongyo const struct ieee80211_bpf_params *); 147177595Sweongyostatic void malo_bpfattach(struct malo_softc *); 148177595Sweongyostatic void malo_sysctlattach(struct malo_softc *); 149177595Sweongyostatic void malo_announce(struct malo_softc *); 150177595Sweongyostatic void malo_dma_cleanup(struct malo_softc *); 151177595Sweongyostatic void malo_stop_locked(struct ifnet *, int); 152177595Sweongyostatic int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 153177595Sweongyostatic int malo_mode_init(struct malo_softc *); 154177595Sweongyostatic void malo_tx_proc(void *, int); 155177595Sweongyostatic void malo_rx_proc(void *, int); 156177595Sweongyostatic void malo_init(void *); 157177595Sweongyo 158177595Sweongyo/* 159177595Sweongyo * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 160177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at 161177595Sweongyo * malo_attach and there should be no reference to them here. 162177595Sweongyo */ 163177595Sweongyostatic uint32_t 164177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off) 165177595Sweongyo{ 166177595Sweongyo return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 167177595Sweongyo} 168177595Sweongyo 169177595Sweongyostatic void 170177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 171177595Sweongyo{ 172178354Ssam DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%zx val 0x%x\n", 173177595Sweongyo __func__, off, val); 174177595Sweongyo 175177595Sweongyo bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 176177595Sweongyo} 177177595Sweongyo 178177595Sweongyoint 179177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc) 180177595Sweongyo{ 181190526Ssam int error; 182178354Ssam struct ieee80211com *ic; 183177595Sweongyo struct ifnet *ifp; 184177595Sweongyo struct malo_hal *mh; 185177595Sweongyo uint8_t bands; 186177595Sweongyo 187178354Ssam ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 188177595Sweongyo if (ifp == NULL) { 189177595Sweongyo device_printf(sc->malo_dev, "can not if_alloc()\n"); 190177595Sweongyo return ENOSPC; 191177595Sweongyo } 192178354Ssam ic = ifp->if_l2com; 193177595Sweongyo 194177595Sweongyo MALO_LOCK_INIT(sc); 195177595Sweongyo 196177595Sweongyo /* set these up early for if_printf use */ 197177595Sweongyo if_initname(ifp, device_get_name(sc->malo_dev), 198177595Sweongyo device_get_unit(sc->malo_dev)); 199177595Sweongyo 200177595Sweongyo mh = malo_hal_attach(sc->malo_dev, devid, 201177595Sweongyo sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 202177595Sweongyo if (mh == NULL) { 203177595Sweongyo if_printf(ifp, "unable to attach HAL\n"); 204177595Sweongyo error = EIO; 205177595Sweongyo goto bad; 206177595Sweongyo } 207177595Sweongyo sc->malo_mh = mh; 208177595Sweongyo 209178354Ssam /* 210178354Ssam * Load firmware so we can get setup. We arbitrarily pick station 211178354Ssam * firmware; we'll re-load firmware as needed so setting up 212178354Ssam * the wrong mode isn't a big deal. 213178354Ssam */ 214178354Ssam error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 215178354Ssam if (error != 0) { 216178354Ssam if_printf(ifp, "unable to setup firmware\n"); 217178354Ssam goto bad1; 218178354Ssam } 219178354Ssam /* XXX gethwspecs() extracts correct informations? not maybe! */ 220178354Ssam error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 221178354Ssam if (error != 0) { 222178354Ssam if_printf(ifp, "unable to fetch h/w specs\n"); 223178354Ssam goto bad1; 224178354Ssam } 225178354Ssam 226178354Ssam DPRINTF(sc, MALO_DEBUG_FW, 227178354Ssam "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 228178354Ssam "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 229178354Ssam "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 230178354Ssam "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 231178354Ssam "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 232178354Ssam sc->malo_hwspecs.hwversion, 233178354Ssam sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 234178354Ssam sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 235178354Ssam sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 236178354Ssam sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 237178354Ssam sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 238178354Ssam sc->malo_hwspecs.ul_fw_awakecookie, 239178354Ssam sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 240178354Ssam sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 241178354Ssam 242178354Ssam /* NB: firmware looks that it does not export regdomain info API. */ 243178354Ssam bands = 0; 244178354Ssam setbit(&bands, IEEE80211_MODE_11B); 245178354Ssam setbit(&bands, IEEE80211_MODE_11G); 246178354Ssam ieee80211_init_channels(ic, NULL, &bands); 247178354Ssam 248177595Sweongyo sc->malo_txantenna = 0x2; /* h/w default */ 249177595Sweongyo sc->malo_rxantenna = 0xffff; /* h/w default */ 250177595Sweongyo 251177595Sweongyo /* 252177595Sweongyo * Allocate tx + rx descriptors and populate the lists. 253177595Sweongyo * We immediately push the information to the firmware 254177595Sweongyo * as otherwise it gets upset. 255177595Sweongyo */ 256177595Sweongyo error = malo_dma_setup(sc); 257177595Sweongyo if (error != 0) { 258177595Sweongyo if_printf(ifp, "failed to setup descriptors: %d\n", error); 259177595Sweongyo goto bad1; 260177595Sweongyo } 261178354Ssam error = malo_setup_hwdma(sc); /* push to firmware */ 262178354Ssam if (error != 0) /* NB: malo_setupdma prints msg */ 263190552Sweongyo goto bad2; 264177595Sweongyo 265177595Sweongyo sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 266177595Sweongyo taskqueue_thread_enqueue, &sc->malo_tq); 267177595Sweongyo taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 268177595Sweongyo "%s taskq", ifp->if_xname); 269177595Sweongyo 270177595Sweongyo TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 271177595Sweongyo TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 272177595Sweongyo 273177595Sweongyo ifp->if_softc = sc; 274177595Sweongyo ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 275177595Sweongyo ifp->if_start = malo_start; 276177595Sweongyo ifp->if_watchdog = malo_watchdog; 277177595Sweongyo ifp->if_ioctl = malo_ioctl; 278177595Sweongyo ifp->if_init = malo_init; 279177595Sweongyo IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 280177595Sweongyo ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 281177595Sweongyo IFQ_SET_READY(&ifp->if_snd); 282177595Sweongyo 283177595Sweongyo ic->ic_ifp = ifp; 284177595Sweongyo /* XXX not right but it's not used anywhere important */ 285177595Sweongyo ic->ic_phytype = IEEE80211_T_OFDM; 286177595Sweongyo ic->ic_opmode = IEEE80211_M_STA; 287177595Sweongyo ic->ic_caps = 288178957Ssam IEEE80211_C_STA /* station mode supported */ 289178957Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 290177595Sweongyo | IEEE80211_C_MONITOR /* monitor mode */ 291177595Sweongyo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 292177595Sweongyo | IEEE80211_C_SHSLOT /* short slot time supported */ 293177595Sweongyo | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 294177595Sweongyo | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 295177595Sweongyo ; 296177595Sweongyo 297177595Sweongyo /* 298177595Sweongyo * Transmit requires space in the packet for a special format transmit 299177595Sweongyo * record and optional padding between this record and the payload. 300177595Sweongyo * Ask the net80211 layer to arrange this when encapsulating 301177595Sweongyo * packets so we can add it efficiently. 302177595Sweongyo */ 303177595Sweongyo ic->ic_headroom = sizeof(struct malo_txrec) - 304178354Ssam sizeof(struct ieee80211_frame); 305177595Sweongyo 306177595Sweongyo /* call MI attach routine. */ 307190526Ssam ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 308177595Sweongyo /* override default methods */ 309178354Ssam ic->ic_vap_create = malo_vap_create; 310178354Ssam ic->ic_vap_delete = malo_vap_delete; 311178354Ssam ic->ic_raw_xmit = malo_raw_xmit; 312177595Sweongyo ic->ic_updateslot = malo_updateslot; 313177595Sweongyo 314177595Sweongyo ic->ic_scan_start = malo_scan_start; 315177595Sweongyo ic->ic_scan_end = malo_scan_end; 316177595Sweongyo ic->ic_set_channel = malo_set_channel; 317177595Sweongyo 318177595Sweongyo sc->malo_invalid = 0; /* ready to go, enable int handling */ 319177595Sweongyo 320177595Sweongyo malo_bpfattach(sc); 321177595Sweongyo 322177595Sweongyo /* 323177595Sweongyo * Setup dynamic sysctl's. 324177595Sweongyo */ 325177595Sweongyo malo_sysctlattach(sc); 326177595Sweongyo 327177595Sweongyo if (bootverbose) 328177595Sweongyo ieee80211_announce(ic); 329178354Ssam malo_announce(sc); 330177595Sweongyo 331177595Sweongyo return 0; 332190552Sweongyobad2: 333190552Sweongyo malo_dma_cleanup(sc); 334177595Sweongyobad1: 335177595Sweongyo malo_hal_detach(mh); 336177595Sweongyobad: 337177595Sweongyo if_free(ifp); 338177595Sweongyo sc->malo_invalid = 1; 339177595Sweongyo 340177595Sweongyo return error; 341177595Sweongyo} 342177595Sweongyo 343178354Ssamstatic struct ieee80211vap * 344178354Ssammalo_vap_create(struct ieee80211com *ic, 345178354Ssam const char name[IFNAMSIZ], int unit, int opmode, int flags, 346178354Ssam const uint8_t bssid[IEEE80211_ADDR_LEN], 347178354Ssam const uint8_t mac[IEEE80211_ADDR_LEN]) 348178354Ssam{ 349178354Ssam struct ifnet *ifp = ic->ic_ifp; 350178354Ssam struct malo_vap *mvp; 351178354Ssam struct ieee80211vap *vap; 352178354Ssam 353178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 354178354Ssam if_printf(ifp, "multiple vaps not supported\n"); 355178354Ssam return NULL; 356178354Ssam } 357178354Ssam switch (opmode) { 358178354Ssam case IEEE80211_M_STA: 359178354Ssam if (opmode == IEEE80211_M_STA) 360178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 361178354Ssam /* fall thru... */ 362178354Ssam case IEEE80211_M_MONITOR: 363178354Ssam break; 364178354Ssam default: 365178354Ssam if_printf(ifp, "%s mode not supported\n", 366178354Ssam ieee80211_opmode_name[opmode]); 367178354Ssam return NULL; /* unsupported */ 368178354Ssam } 369178354Ssam mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 370178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 371178354Ssam if (mvp == NULL) { 372178354Ssam if_printf(ifp, "cannot allocate vap state block\n"); 373178354Ssam return NULL; 374178354Ssam } 375178354Ssam vap = &mvp->malo_vap; 376178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 377178354Ssam 378178354Ssam /* override state transition machine */ 379178354Ssam mvp->malo_newstate = vap->iv_newstate; 380178354Ssam vap->iv_newstate = malo_newstate; 381178354Ssam 382178354Ssam /* complete setup */ 383178354Ssam ieee80211_vap_attach(vap, 384178354Ssam ieee80211_media_change, ieee80211_media_status); 385178354Ssam ic->ic_opmode = opmode; 386178354Ssam return vap; 387178354Ssam} 388178354Ssam 389178354Ssamstatic void 390178354Ssammalo_vap_delete(struct ieee80211vap *vap) 391178354Ssam{ 392178354Ssam struct malo_vap *mvp = MALO_VAP(vap); 393178354Ssam 394178354Ssam ieee80211_vap_detach(vap); 395178354Ssam free(mvp, M_80211_VAP); 396178354Ssam} 397178354Ssam 398177595Sweongyoint 399177595Sweongyomalo_intr(void *arg) 400177595Sweongyo{ 401177595Sweongyo struct malo_softc *sc = arg; 402177595Sweongyo struct malo_hal *mh = sc->malo_mh; 403177595Sweongyo uint32_t status; 404177595Sweongyo 405177595Sweongyo if (sc->malo_invalid) { 406177595Sweongyo /* 407177595Sweongyo * The hardware is not ready/present, don't touch anything. 408177595Sweongyo * Note this can happen early on if the IRQ is shared. 409177595Sweongyo */ 410177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 411177595Sweongyo return (FILTER_STRAY); 412177595Sweongyo } 413177595Sweongyo 414177595Sweongyo /* 415177595Sweongyo * Figure out the reason(s) for the interrupt. 416177595Sweongyo */ 417177595Sweongyo malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 418177595Sweongyo if (status == 0) /* must be a shared irq */ 419177595Sweongyo return (FILTER_STRAY); 420177595Sweongyo 421177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 422177595Sweongyo __func__, status, sc->malo_imask); 423177595Sweongyo 424177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_RDY) 425177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 426177595Sweongyo if (status & MALO_A2HRIC_BIT_TX_DONE) 427177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 428177595Sweongyo if (status & MALO_A2HRIC_BIT_OPC_DONE) 429177595Sweongyo malo_hal_cmddone(mh); 430177595Sweongyo if (status & MALO_A2HRIC_BIT_MAC_EVENT) 431177595Sweongyo ; 432177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 433177595Sweongyo ; 434177595Sweongyo if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 435177595Sweongyo /* TKIP ICV error */ 436177595Sweongyo sc->malo_stats.mst_rx_badtkipicv++; 437177595Sweongyo } 438177595Sweongyo#ifdef MALO_DEBUG 439177595Sweongyo if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 440177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, 441177595Sweongyo "%s: can't handle interrupt status 0x%x\n", 442177595Sweongyo __func__, status); 443177595Sweongyo#endif 444177595Sweongyo return (FILTER_HANDLED); 445177595Sweongyo} 446177595Sweongyo 447177595Sweongyostatic void 448177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 449177595Sweongyo{ 450177595Sweongyo bus_addr_t *paddr = (bus_addr_t*) arg; 451177595Sweongyo 452177595Sweongyo KASSERT(error == 0, ("error %u on bus_dma callback", error)); 453177595Sweongyo 454177595Sweongyo *paddr = segs->ds_addr; 455177595Sweongyo} 456177595Sweongyo 457177595Sweongyostatic int 458177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name, 459177595Sweongyo struct malo_descdma *dd, 460177595Sweongyo int nbuf, size_t bufsize, int ndesc, size_t descsize) 461177595Sweongyo{ 462177595Sweongyo int error; 463177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 464177595Sweongyo uint8_t *ds; 465177595Sweongyo 466177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 467177595Sweongyo "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 468177595Sweongyo __func__, name, nbuf, (uintmax_t) bufsize, 469177595Sweongyo ndesc, (uintmax_t) descsize); 470177595Sweongyo 471177595Sweongyo dd->dd_name = name; 472177595Sweongyo dd->dd_desc_len = nbuf * ndesc * descsize; 473177595Sweongyo 474177595Sweongyo /* 475177595Sweongyo * Setup DMA descriptor area. 476177595Sweongyo */ 477177595Sweongyo error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 478177595Sweongyo PAGE_SIZE, 0, /* alignment, bounds */ 479177595Sweongyo BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 480177595Sweongyo BUS_SPACE_MAXADDR, /* highaddr */ 481177595Sweongyo NULL, NULL, /* filter, filterarg */ 482177595Sweongyo dd->dd_desc_len, /* maxsize */ 483177595Sweongyo 1, /* nsegments */ 484177595Sweongyo dd->dd_desc_len, /* maxsegsize */ 485177595Sweongyo BUS_DMA_ALLOCNOW, /* flags */ 486177595Sweongyo NULL, /* lockfunc */ 487177595Sweongyo NULL, /* lockarg */ 488177595Sweongyo &dd->dd_dmat); 489177595Sweongyo if (error != 0) { 490177595Sweongyo if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 491177595Sweongyo return error; 492177595Sweongyo } 493177595Sweongyo 494177595Sweongyo /* allocate descriptors */ 495177595Sweongyo error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 496177595Sweongyo if (error != 0) { 497177595Sweongyo if_printf(ifp, "unable to create dmamap for %s descriptors, " 498177595Sweongyo "error %u\n", dd->dd_name, error); 499177595Sweongyo goto fail0; 500177595Sweongyo } 501177595Sweongyo 502177595Sweongyo error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 503177595Sweongyo BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 504177595Sweongyo if (error != 0) { 505177595Sweongyo if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 506177595Sweongyo "error %u\n", nbuf * ndesc, dd->dd_name, error); 507177595Sweongyo goto fail1; 508177595Sweongyo } 509177595Sweongyo 510177595Sweongyo error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 511177595Sweongyo dd->dd_desc, dd->dd_desc_len, 512177595Sweongyo malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 513177595Sweongyo if (error != 0) { 514177595Sweongyo if_printf(ifp, "unable to map %s descriptors, error %u\n", 515177595Sweongyo dd->dd_name, error); 516177595Sweongyo goto fail2; 517177595Sweongyo } 518177595Sweongyo 519177595Sweongyo ds = dd->dd_desc; 520177595Sweongyo memset(ds, 0, dd->dd_desc_len); 521177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 522177595Sweongyo __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 523177595Sweongyo (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 524177595Sweongyo 525177595Sweongyo return 0; 526177595Sweongyofail2: 527177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 528177595Sweongyofail1: 529177595Sweongyo bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 530177595Sweongyofail0: 531177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 532177595Sweongyo memset(dd, 0, sizeof(*dd)); 533177595Sweongyo return error; 534177595Sweongyo} 535177595Sweongyo 536177595Sweongyo#define DS2PHYS(_dd, _ds) \ 537177595Sweongyo ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 538177595Sweongyo 539177595Sweongyostatic int 540177595Sweongyomalo_rxdma_setup(struct malo_softc *sc) 541177595Sweongyo{ 542177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 543177595Sweongyo int error, bsize, i; 544177595Sweongyo struct malo_rxbuf *bf; 545177595Sweongyo struct malo_rxdesc *ds; 546177595Sweongyo 547177595Sweongyo error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 548177595Sweongyo malo_rxbuf, sizeof(struct malo_rxbuf), 549177595Sweongyo 1, sizeof(struct malo_rxdesc)); 550177595Sweongyo if (error != 0) 551177595Sweongyo return error; 552177595Sweongyo 553177595Sweongyo /* 554177595Sweongyo * Allocate rx buffers and set them up. 555177595Sweongyo */ 556177595Sweongyo bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 557177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 558177595Sweongyo if (bf == NULL) { 559177595Sweongyo if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 560177595Sweongyo return error; 561177595Sweongyo } 562177595Sweongyo sc->malo_rxdma.dd_bufptr = bf; 563177595Sweongyo 564177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 565177595Sweongyo ds = sc->malo_rxdma.dd_desc; 566177595Sweongyo for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 567177595Sweongyo bf->bf_desc = ds; 568177595Sweongyo bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 569177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 570177595Sweongyo &bf->bf_dmamap); 571177595Sweongyo if (error != 0) { 572177595Sweongyo if_printf(ifp, "%s: unable to dmamap for rx buffer, " 573177595Sweongyo "error %d\n", __func__, error); 574177595Sweongyo return error; 575177595Sweongyo } 576177595Sweongyo /* NB: tail is intentional to preserve descriptor order */ 577177595Sweongyo STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 578177595Sweongyo } 579177595Sweongyo return 0; 580177595Sweongyo} 581177595Sweongyo 582177595Sweongyostatic int 583177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 584177595Sweongyo{ 585177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 586177595Sweongyo int error, bsize, i; 587177595Sweongyo struct malo_txbuf *bf; 588177595Sweongyo struct malo_txdesc *ds; 589177595Sweongyo 590177595Sweongyo error = malo_desc_setup(sc, "tx", &txq->dma, 591177595Sweongyo malo_txbuf, sizeof(struct malo_txbuf), 592177595Sweongyo MALO_TXDESC, sizeof(struct malo_txdesc)); 593177595Sweongyo if (error != 0) 594177595Sweongyo return error; 595177595Sweongyo 596177595Sweongyo /* allocate and setup tx buffers */ 597177595Sweongyo bsize = malo_txbuf * sizeof(struct malo_txbuf); 598177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 599177595Sweongyo if (bf == NULL) { 600177595Sweongyo if_printf(ifp, "malloc of %u tx buffers failed\n", 601177595Sweongyo malo_txbuf); 602177595Sweongyo return ENOMEM; 603177595Sweongyo } 604177595Sweongyo txq->dma.dd_bufptr = bf; 605177595Sweongyo 606177595Sweongyo STAILQ_INIT(&txq->free); 607177595Sweongyo txq->nfree = 0; 608177595Sweongyo ds = txq->dma.dd_desc; 609177595Sweongyo for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 610177595Sweongyo bf->bf_desc = ds; 611177595Sweongyo bf->bf_daddr = DS2PHYS(&txq->dma, ds); 612177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 613177595Sweongyo &bf->bf_dmamap); 614177595Sweongyo if (error != 0) { 615177595Sweongyo if_printf(ifp, "unable to create dmamap for tx " 616177595Sweongyo "buffer %u, error %u\n", i, error); 617177595Sweongyo return error; 618177595Sweongyo } 619177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 620177595Sweongyo txq->nfree++; 621177595Sweongyo } 622177595Sweongyo 623177595Sweongyo return 0; 624177595Sweongyo} 625177595Sweongyo 626177595Sweongyostatic void 627177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 628177595Sweongyo{ 629177595Sweongyo bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 630177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 631177595Sweongyo bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 632177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 633177595Sweongyo 634177595Sweongyo memset(dd, 0, sizeof(*dd)); 635177595Sweongyo} 636177595Sweongyo 637177595Sweongyostatic void 638177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc) 639177595Sweongyo{ 640177595Sweongyo struct malo_rxbuf *bf; 641177595Sweongyo 642177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 643177595Sweongyo if (bf->bf_m != NULL) { 644177595Sweongyo m_freem(bf->bf_m); 645177595Sweongyo bf->bf_m = NULL; 646177595Sweongyo } 647177595Sweongyo if (bf->bf_dmamap != NULL) { 648177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 649177595Sweongyo bf->bf_dmamap = NULL; 650177595Sweongyo } 651177595Sweongyo } 652177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 653177595Sweongyo if (sc->malo_rxdma.dd_bufptr != NULL) { 654177595Sweongyo free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 655177595Sweongyo sc->malo_rxdma.dd_bufptr = NULL; 656177595Sweongyo } 657177595Sweongyo if (sc->malo_rxdma.dd_desc_len != 0) 658177595Sweongyo malo_desc_cleanup(sc, &sc->malo_rxdma); 659177595Sweongyo} 660177595Sweongyo 661177595Sweongyostatic void 662177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 663177595Sweongyo{ 664177595Sweongyo struct malo_txbuf *bf; 665177595Sweongyo struct ieee80211_node *ni; 666177595Sweongyo 667177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 668177595Sweongyo if (bf->bf_m != NULL) { 669177595Sweongyo m_freem(bf->bf_m); 670177595Sweongyo bf->bf_m = NULL; 671177595Sweongyo } 672177595Sweongyo ni = bf->bf_node; 673177595Sweongyo bf->bf_node = NULL; 674177595Sweongyo if (ni != NULL) { 675177595Sweongyo /* 676177595Sweongyo * Reclaim node reference. 677177595Sweongyo */ 678177595Sweongyo ieee80211_free_node(ni); 679177595Sweongyo } 680177595Sweongyo if (bf->bf_dmamap != NULL) { 681177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 682177595Sweongyo bf->bf_dmamap = NULL; 683177595Sweongyo } 684177595Sweongyo } 685177595Sweongyo STAILQ_INIT(&txq->free); 686177595Sweongyo txq->nfree = 0; 687177595Sweongyo if (txq->dma.dd_bufptr != NULL) { 688177595Sweongyo free(txq->dma.dd_bufptr, M_MALODEV); 689177595Sweongyo txq->dma.dd_bufptr = NULL; 690177595Sweongyo } 691177595Sweongyo if (txq->dma.dd_desc_len != 0) 692177595Sweongyo malo_desc_cleanup(sc, &txq->dma); 693177595Sweongyo} 694177595Sweongyo 695177595Sweongyostatic void 696177595Sweongyomalo_dma_cleanup(struct malo_softc *sc) 697177595Sweongyo{ 698177595Sweongyo int i; 699177595Sweongyo 700177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 701177595Sweongyo malo_txdma_cleanup(sc, &sc->malo_txq[i]); 702177595Sweongyo 703177595Sweongyo malo_rxdma_cleanup(sc); 704177595Sweongyo} 705177595Sweongyo 706177595Sweongyostatic int 707177595Sweongyomalo_dma_setup(struct malo_softc *sc) 708177595Sweongyo{ 709177595Sweongyo int error, i; 710177595Sweongyo 711177595Sweongyo /* rxdma initializing. */ 712177595Sweongyo error = malo_rxdma_setup(sc); 713177595Sweongyo if (error != 0) 714177595Sweongyo return error; 715177595Sweongyo 716177595Sweongyo /* NB: we just have 1 tx queue now. */ 717177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 718177595Sweongyo error = malo_txdma_setup(sc, &sc->malo_txq[i]); 719177595Sweongyo if (error != 0) { 720177595Sweongyo malo_dma_cleanup(sc); 721177595Sweongyo 722177595Sweongyo return error; 723177595Sweongyo } 724177595Sweongyo 725177595Sweongyo malo_txq_init(sc, &sc->malo_txq[i], i); 726177595Sweongyo } 727177595Sweongyo 728177595Sweongyo return 0; 729177595Sweongyo} 730177595Sweongyo 731177595Sweongyostatic void 732177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc) 733177595Sweongyo{ 734177595Sweongyo int i; 735177595Sweongyo 736177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 737177595Sweongyo sc->malo_hwdma.rxdesc_read); 738177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 739177595Sweongyo sc->malo_hwdma.rxdesc_read); 740177595Sweongyo 741177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 742177595Sweongyo malo_bar0_write4(sc, 743177595Sweongyo sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 744177595Sweongyo } 745177595Sweongyo} 746177595Sweongyo 747177595Sweongyo/* 748177595Sweongyo * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 749177595Sweongyo * for compatibility with older firmware. For current firmware we send 750177595Sweongyo * this information with a cmd block via malo_hal_sethwdma. 751177595Sweongyo */ 752177595Sweongyostatic int 753177595Sweongyomalo_setup_hwdma(struct malo_softc *sc) 754177595Sweongyo{ 755177595Sweongyo int i; 756177595Sweongyo struct malo_txq *txq; 757177595Sweongyo 758177595Sweongyo sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 759177595Sweongyo 760177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 761177595Sweongyo txq = &sc->malo_txq[i]; 762177595Sweongyo sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 763177595Sweongyo } 764177595Sweongyo sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 765177595Sweongyo sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 766177595Sweongyo 767177595Sweongyo malo_hal_set_rxtxdma(sc); 768177595Sweongyo 769177595Sweongyo return 0; 770177595Sweongyo} 771177595Sweongyo 772177595Sweongyostatic void 773177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 774177595Sweongyo{ 775177595Sweongyo struct malo_txbuf *bf, *bn; 776177595Sweongyo struct malo_txdesc *ds; 777177595Sweongyo 778177595Sweongyo MALO_TXQ_LOCK_INIT(sc, txq); 779177595Sweongyo txq->qnum = qnum; 780177595Sweongyo txq->txpri = 0; /* XXX */ 781177595Sweongyo 782177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 783177595Sweongyo bf->bf_txq = txq; 784177595Sweongyo 785177595Sweongyo ds = bf->bf_desc; 786177595Sweongyo bn = STAILQ_NEXT(bf, bf_list); 787177595Sweongyo if (bn == NULL) 788177595Sweongyo bn = STAILQ_FIRST(&txq->free); 789177595Sweongyo ds->physnext = htole32(bn->bf_daddr); 790177595Sweongyo } 791177595Sweongyo STAILQ_INIT(&txq->active); 792177595Sweongyo} 793177595Sweongyo 794177595Sweongyo/* 795177595Sweongyo * Reclaim resources for a setup queue. 796177595Sweongyo */ 797177595Sweongyostatic void 798177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 799177595Sweongyo{ 800177595Sweongyo /* XXX hal work? */ 801177595Sweongyo MALO_TXQ_LOCK_DESTROY(txq); 802177595Sweongyo} 803177595Sweongyo 804177595Sweongyo/* 805177595Sweongyo * Allocate a tx buffer for sending a frame. 806177595Sweongyo */ 807177595Sweongyostatic struct malo_txbuf * 808177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 809177595Sweongyo{ 810177595Sweongyo struct malo_txbuf *bf; 811177595Sweongyo 812177595Sweongyo MALO_TXQ_LOCK(txq); 813177595Sweongyo bf = STAILQ_FIRST(&txq->free); 814177595Sweongyo if (bf != NULL) { 815177595Sweongyo STAILQ_REMOVE_HEAD(&txq->free, bf_list); 816177595Sweongyo txq->nfree--; 817177595Sweongyo } 818177595Sweongyo MALO_TXQ_UNLOCK(txq); 819177595Sweongyo if (bf == NULL) { 820177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, 821177595Sweongyo "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 822177595Sweongyo sc->malo_stats.mst_tx_qstop++; 823177595Sweongyo } 824177595Sweongyo return bf; 825177595Sweongyo} 826177595Sweongyo 827177595Sweongyostatic int 828177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 829177595Sweongyo{ 830177595Sweongyo struct mbuf *m; 831177595Sweongyo int error; 832177595Sweongyo 833177595Sweongyo /* 834177595Sweongyo * Load the DMA map so any coalescing is done. This also calculates 835177595Sweongyo * the number of descriptors we need. 836177595Sweongyo */ 837177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 838177595Sweongyo bf->bf_segs, &bf->bf_nseg, 839177595Sweongyo BUS_DMA_NOWAIT); 840177595Sweongyo if (error == EFBIG) { 841177595Sweongyo /* XXX packet requires too many descriptors */ 842177595Sweongyo bf->bf_nseg = MALO_TXDESC + 1; 843177595Sweongyo } else if (error != 0) { 844177595Sweongyo sc->malo_stats.mst_tx_busdma++; 845177595Sweongyo m_freem(m0); 846177595Sweongyo return error; 847177595Sweongyo } 848177595Sweongyo /* 849177595Sweongyo * Discard null packets and check for packets that require too many 850177595Sweongyo * TX descriptors. We try to convert the latter to a cluster. 851177595Sweongyo */ 852177595Sweongyo if (error == EFBIG) { /* too many desc's, linearize */ 853177595Sweongyo sc->malo_stats.mst_tx_linear++; 854177595Sweongyo m = m_defrag(m0, M_DONTWAIT); 855177595Sweongyo if (m == NULL) { 856177595Sweongyo m_freem(m0); 857177595Sweongyo sc->malo_stats.mst_tx_nombuf++; 858177595Sweongyo return ENOMEM; 859177595Sweongyo } 860177595Sweongyo m0 = m; 861177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 862177595Sweongyo bf->bf_segs, &bf->bf_nseg, 863177595Sweongyo BUS_DMA_NOWAIT); 864177595Sweongyo if (error != 0) { 865177595Sweongyo sc->malo_stats.mst_tx_busdma++; 866177595Sweongyo m_freem(m0); 867177595Sweongyo return error; 868177595Sweongyo } 869177595Sweongyo KASSERT(bf->bf_nseg <= MALO_TXDESC, 870177595Sweongyo ("too many segments after defrag; nseg %u", bf->bf_nseg)); 871177595Sweongyo } else if (bf->bf_nseg == 0) { /* null packet, discard */ 872177595Sweongyo sc->malo_stats.mst_tx_nodata++; 873177595Sweongyo m_freem(m0); 874177595Sweongyo return EIO; 875177595Sweongyo } 876177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 877177595Sweongyo __func__, m0, m0->m_pkthdr.len); 878177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 879177595Sweongyo bf->bf_m = m0; 880177595Sweongyo 881177595Sweongyo return 0; 882177595Sweongyo} 883177595Sweongyo 884177595Sweongyo#ifdef MALO_DEBUG 885177595Sweongyostatic void 886177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 887177595Sweongyo{ 888177595Sweongyo const struct malo_rxdesc *ds = bf->bf_desc; 889177595Sweongyo uint32_t status = le32toh(ds->status); 890177595Sweongyo 891177595Sweongyo printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 892177595Sweongyo " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 893177595Sweongyo " RATE:%02x QOS:%04x\n", 894177595Sweongyo ix, ds, (const struct malo_desc *)bf->bf_daddr, 895177595Sweongyo le32toh(ds->physnext), le32toh(ds->physbuffdata), 896177595Sweongyo ds->rxcontrol, 897177595Sweongyo ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 898177595Sweongyo "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 899177595Sweongyo ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 900177595Sweongyo ds->rate, le16toh(ds->qosctrl)); 901177595Sweongyo} 902177595Sweongyo 903177595Sweongyostatic void 904177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 905177595Sweongyo{ 906177595Sweongyo const struct malo_txdesc *ds = bf->bf_desc; 907177595Sweongyo uint32_t status = le32toh(ds->status); 908177595Sweongyo 909177595Sweongyo printf("Q%u[%3u]", qnum, ix); 910177595Sweongyo printf(" (DS.V:%p DS.P:%p)\n", 911177595Sweongyo ds, (const struct malo_txdesc *)bf->bf_daddr); 912177595Sweongyo printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 913177595Sweongyo le32toh(ds->physnext), 914177595Sweongyo le32toh(ds->pktptr), le16toh(ds->pktlen), status, 915177595Sweongyo status & MALO_TXD_STATUS_USED ? 916177595Sweongyo "" : (status & 3) != 0 ? " *" : " !"); 917177595Sweongyo printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 918177595Sweongyo ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 919177595Sweongyo le32toh(ds->sap_pktinfo), le16toh(ds->format)); 920177595Sweongyo#if 0 921177595Sweongyo { 922177595Sweongyo const uint8_t *cp = (const uint8_t *) ds; 923177595Sweongyo int i; 924177595Sweongyo for (i = 0; i < sizeof(struct malo_txdesc); i++) { 925177595Sweongyo printf("%02x ", cp[i]); 926177595Sweongyo if (((i+1) % 16) == 0) 927177595Sweongyo printf("\n"); 928177595Sweongyo } 929177595Sweongyo printf("\n"); 930177595Sweongyo } 931177595Sweongyo#endif 932177595Sweongyo} 933177595Sweongyo#endif /* MALO_DEBUG */ 934177595Sweongyo 935177595Sweongyostatic __inline void 936177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix) 937177595Sweongyo{ 938177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 939177595Sweongyo static const int ieeerates[] = 940177595Sweongyo { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 941177595Sweongyo if (rix < N(ieeerates)) 942177595Sweongyo ni->ni_txrate = ieeerates[rix]; 943177595Sweongyo#undef N 944177595Sweongyo} 945177595Sweongyo 946177595Sweongyostatic int 947177595Sweongyomalo_fix2rate(int fix_rate) 948177595Sweongyo{ 949177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 950177595Sweongyo static const int rates[] = 951177595Sweongyo { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 952177595Sweongyo return (fix_rate < N(rates) ? rates[fix_rate] : 0); 953177595Sweongyo#undef N 954177595Sweongyo} 955177595Sweongyo 956177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 957177595Sweongyo#define MS(v,x) (((v) & x) >> x##_S) 958177595Sweongyo#define SM(v,x) (((v) << x##_S) & x) 959177595Sweongyo 960177595Sweongyo/* 961177595Sweongyo * Process completed xmit descriptors from the specified queue. 962177595Sweongyo */ 963177595Sweongyostatic int 964177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 965177595Sweongyo{ 966177595Sweongyo struct malo_txbuf *bf; 967177595Sweongyo struct malo_txdesc *ds; 968177595Sweongyo struct ieee80211_node *ni; 969177595Sweongyo int nreaped; 970177595Sweongyo uint32_t status; 971177595Sweongyo 972177595Sweongyo DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 973177595Sweongyo __func__, txq->qnum); 974177595Sweongyo for (nreaped = 0;; nreaped++) { 975177595Sweongyo MALO_TXQ_LOCK(txq); 976177595Sweongyo bf = STAILQ_FIRST(&txq->active); 977177595Sweongyo if (bf == NULL) { 978177595Sweongyo MALO_TXQ_UNLOCK(txq); 979177595Sweongyo break; 980177595Sweongyo } 981177595Sweongyo ds = bf->bf_desc; 982177595Sweongyo MALO_TXDESC_SYNC(txq, ds, 983177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 984177595Sweongyo if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 985177595Sweongyo MALO_TXQ_UNLOCK(txq); 986177595Sweongyo break; 987177595Sweongyo } 988177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 989177595Sweongyo MALO_TXQ_UNLOCK(txq); 990177595Sweongyo 991177595Sweongyo#ifdef MALO_DEBUG 992177595Sweongyo if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 993177595Sweongyo malo_printtxbuf(bf, txq->qnum, nreaped); 994177595Sweongyo#endif 995177595Sweongyo ni = bf->bf_node; 996177595Sweongyo if (ni != NULL) { 997177595Sweongyo status = le32toh(ds->status); 998177595Sweongyo if (status & MALO_TXD_STATUS_OK) { 999177595Sweongyo uint16_t format = le16toh(ds->format); 1000177595Sweongyo uint8_t txant = MS(format, MALO_TXD_ANTENNA); 1001177595Sweongyo 1002177595Sweongyo sc->malo_stats.mst_ant_tx[txant]++; 1003177595Sweongyo if (status & MALO_TXD_STATUS_OK_RETRY) 1004177595Sweongyo sc->malo_stats.mst_tx_retries++; 1005177595Sweongyo if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1006177595Sweongyo sc->malo_stats.mst_tx_mretries++; 1007177595Sweongyo malo_updatetxrate(ni, ds->datarate); 1008177595Sweongyo sc->malo_stats.mst_tx_rate = ds->datarate; 1009177595Sweongyo } else { 1010177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1011177595Sweongyo sc->malo_stats.mst_tx_linkerror++; 1012177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1013177595Sweongyo sc->malo_stats.mst_tx_xretries++; 1014177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_AGING) 1015177595Sweongyo sc->malo_stats.mst_tx_aging++; 1016177595Sweongyo } 1017177595Sweongyo /* 1018177595Sweongyo * Do any tx complete callback. Note this must 1019177595Sweongyo * be done before releasing the node reference. 1020177595Sweongyo * XXX no way to figure out if frame was ACK'd 1021177595Sweongyo */ 1022177595Sweongyo if (bf->bf_m->m_flags & M_TXCB) { 1023177595Sweongyo /* XXX strip fw len in case header inspected */ 1024177595Sweongyo m_adj(bf->bf_m, sizeof(uint16_t)); 1025177595Sweongyo ieee80211_process_callback(ni, bf->bf_m, 1026177595Sweongyo (status & MALO_TXD_STATUS_OK) == 0); 1027177595Sweongyo } 1028177595Sweongyo /* 1029177595Sweongyo * Reclaim reference to node. 1030177595Sweongyo * 1031177595Sweongyo * NB: the node may be reclaimed here if, for example 1032177595Sweongyo * this is a DEAUTH message that was sent and the 1033177595Sweongyo * node was timed out due to inactivity. 1034177595Sweongyo */ 1035177595Sweongyo ieee80211_free_node(ni); 1036177595Sweongyo } 1037177595Sweongyo ds->status = htole32(MALO_TXD_STATUS_IDLE); 1038177595Sweongyo ds->pktlen = htole32(0); 1039177595Sweongyo 1040177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1041177595Sweongyo BUS_DMASYNC_POSTWRITE); 1042177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1043177595Sweongyo m_freem(bf->bf_m); 1044177595Sweongyo bf->bf_m = NULL; 1045177595Sweongyo bf->bf_node = NULL; 1046177595Sweongyo 1047177595Sweongyo MALO_TXQ_LOCK(txq); 1048177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1049177595Sweongyo txq->nfree++; 1050177595Sweongyo MALO_TXQ_UNLOCK(txq); 1051177595Sweongyo } 1052177595Sweongyo return nreaped; 1053177595Sweongyo} 1054177595Sweongyo 1055177595Sweongyo/* 1056177595Sweongyo * Deferred processing of transmit interrupt. 1057177595Sweongyo */ 1058177595Sweongyostatic void 1059177595Sweongyomalo_tx_proc(void *arg, int npending) 1060177595Sweongyo{ 1061177595Sweongyo struct malo_softc *sc = arg; 1062177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1063177595Sweongyo int i, nreaped; 1064177595Sweongyo 1065177595Sweongyo /* 1066177595Sweongyo * Process each active queue. 1067177595Sweongyo */ 1068177595Sweongyo nreaped = 0; 1069177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1070177595Sweongyo if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1071177595Sweongyo nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1072177595Sweongyo } 1073177595Sweongyo 1074177595Sweongyo if (nreaped != 0) { 1075177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1076177595Sweongyo ifp->if_timer = 0; 1077177595Sweongyo malo_start(ifp); 1078177595Sweongyo } 1079177595Sweongyo} 1080177595Sweongyo 1081177595Sweongyostatic int 1082177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1083177595Sweongyo struct malo_txbuf *bf, struct mbuf *m0) 1084177595Sweongyo{ 1085177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 1086177595Sweongyo ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1087177595Sweongyo#define IS_DATA_FRAME(wh) \ 1088177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1089177595Sweongyo int error, ismcast, iswep; 1090177595Sweongyo int copyhdrlen, hdrlen, pktlen; 1091177595Sweongyo struct ieee80211_frame *wh; 1092177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1093178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1094177595Sweongyo struct malo_txdesc *ds; 1095177595Sweongyo struct malo_txrec *tr; 1096177595Sweongyo struct malo_txq *txq; 1097177595Sweongyo uint16_t qos; 1098177595Sweongyo 1099177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1100177595Sweongyo iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1101177595Sweongyo ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1102177595Sweongyo copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1103177595Sweongyo pktlen = m0->m_pkthdr.len; 1104177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 1105177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 1106177595Sweongyo qos = *(uint16_t *) 1107177595Sweongyo (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1108177595Sweongyo copyhdrlen -= sizeof(qos); 1109177595Sweongyo } else 1110177595Sweongyo qos = *(uint16_t *) 1111177595Sweongyo (((struct ieee80211_qosframe *) wh)->i_qos); 1112177595Sweongyo } else 1113177595Sweongyo qos = 0; 1114177595Sweongyo 1115177595Sweongyo if (iswep) { 1116177595Sweongyo struct ieee80211_key *k; 1117177595Sweongyo 1118177595Sweongyo /* 1119177595Sweongyo * Construct the 802.11 header+trailer for an encrypted 1120177595Sweongyo * frame. The only reason this can fail is because of an 1121177595Sweongyo * unknown or unsupported cipher/key type. 1122177595Sweongyo * 1123177595Sweongyo * NB: we do this even though the firmware will ignore 1124177595Sweongyo * what we've done for WEP and TKIP as we need the 1125177595Sweongyo * ExtIV filled in for CCMP and this also adjusts 1126177595Sweongyo * the headers which simplifies our work below. 1127177595Sweongyo */ 1128178354Ssam k = ieee80211_crypto_encap(ni, m0); 1129177595Sweongyo if (k == NULL) { 1130177595Sweongyo /* 1131177595Sweongyo * This can happen when the key is yanked after the 1132177595Sweongyo * frame was queued. Just discard the frame; the 1133177595Sweongyo * 802.11 layer counts failures and provides 1134177595Sweongyo * debugging/diagnostics. 1135177595Sweongyo */ 1136177595Sweongyo m_freem(m0); 1137177595Sweongyo return EIO; 1138177595Sweongyo } 1139177595Sweongyo 1140177595Sweongyo /* 1141177595Sweongyo * Adjust the packet length for the crypto additions 1142177595Sweongyo * done during encap and any other bits that the f/w 1143177595Sweongyo * will add later on. 1144177595Sweongyo */ 1145177595Sweongyo pktlen = m0->m_pkthdr.len; 1146177595Sweongyo 1147177595Sweongyo /* packet header may have moved, reset our local pointer */ 1148177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1149177595Sweongyo } 1150177595Sweongyo 1151178354Ssam if (bpf_peers_present(ifp->if_bpf)) { 1152177595Sweongyo sc->malo_tx_th.wt_flags = 0; /* XXX */ 1153177595Sweongyo if (iswep) 1154177595Sweongyo sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1155177595Sweongyo sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1156177595Sweongyo sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1157177595Sweongyo 1158178354Ssam bpf_mtap2(ifp->if_bpf, &sc->malo_tx_th, sc->malo_tx_th_len, m0); 1159177595Sweongyo } 1160177595Sweongyo 1161177595Sweongyo /* 1162177595Sweongyo * Copy up/down the 802.11 header; the firmware requires 1163177595Sweongyo * we present a 2-byte payload length followed by a 1164177595Sweongyo * 4-address header (w/o QoS), followed (optionally) by 1165177595Sweongyo * any WEP/ExtIV header (but only filled in for CCMP). 1166177595Sweongyo * We are assured the mbuf has sufficient headroom to 1167177595Sweongyo * prepend in-place by the setup of ic_headroom in 1168177595Sweongyo * malo_attach. 1169177595Sweongyo */ 1170177595Sweongyo if (hdrlen < sizeof(struct malo_txrec)) { 1171177595Sweongyo const int space = sizeof(struct malo_txrec) - hdrlen; 1172177595Sweongyo if (M_LEADINGSPACE(m0) < space) { 1173177595Sweongyo /* NB: should never happen */ 1174177595Sweongyo device_printf(sc->malo_dev, 1175177595Sweongyo "not enough headroom, need %d found %zd, " 1176177595Sweongyo "m_flags 0x%x m_len %d\n", 1177177595Sweongyo space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1178177595Sweongyo ieee80211_dump_pkt(ic, 1179177595Sweongyo mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1180177595Sweongyo m_freem(m0); 1181177595Sweongyo /* XXX stat */ 1182177595Sweongyo return EIO; 1183177595Sweongyo } 1184177595Sweongyo M_PREPEND(m0, space, M_NOWAIT); 1185177595Sweongyo } 1186177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1187177595Sweongyo if (wh != (struct ieee80211_frame *) &tr->wh) 1188177595Sweongyo ovbcopy(wh, &tr->wh, hdrlen); 1189177595Sweongyo /* 1190177595Sweongyo * Note: the "firmware length" is actually the length of the fully 1191177595Sweongyo * formed "802.11 payload". That is, it's everything except for 1192177595Sweongyo * the 802.11 header. In particular this includes all crypto 1193177595Sweongyo * material including the MIC! 1194177595Sweongyo */ 1195177595Sweongyo tr->fwlen = htole16(pktlen - hdrlen); 1196177595Sweongyo 1197177595Sweongyo /* 1198177595Sweongyo * Load the DMA map so any coalescing is done. This 1199177595Sweongyo * also calculates the number of descriptors we need. 1200177595Sweongyo */ 1201177595Sweongyo error = malo_tx_dmasetup(sc, bf, m0); 1202177595Sweongyo if (error != 0) 1203177595Sweongyo return error; 1204177595Sweongyo bf->bf_node = ni; /* NB: held reference */ 1205177595Sweongyo m0 = bf->bf_m; /* NB: may have changed */ 1206177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1207177595Sweongyo wh = (struct ieee80211_frame *)&tr->wh; 1208177595Sweongyo 1209177595Sweongyo /* 1210177595Sweongyo * Formulate tx descriptor. 1211177595Sweongyo */ 1212177595Sweongyo ds = bf->bf_desc; 1213177595Sweongyo txq = bf->bf_txq; 1214177595Sweongyo 1215177595Sweongyo ds->qosctrl = qos; /* NB: already little-endian */ 1216177595Sweongyo ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1217177595Sweongyo ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1218177595Sweongyo /* NB: pPhysNext setup once, don't touch */ 1219177595Sweongyo ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1220177595Sweongyo ds->sap_pktinfo = 0; 1221177595Sweongyo ds->format = 0; 1222177595Sweongyo 1223177595Sweongyo /* 1224177595Sweongyo * Select transmit rate. 1225177595Sweongyo */ 1226177595Sweongyo switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1227177595Sweongyo case IEEE80211_FC0_TYPE_MGT: 1228177595Sweongyo sc->malo_stats.mst_tx_mgmt++; 1229177595Sweongyo /* fall thru... */ 1230177595Sweongyo case IEEE80211_FC0_TYPE_CTL: 1231177595Sweongyo ds->txpriority = 1; 1232177595Sweongyo break; 1233177595Sweongyo case IEEE80211_FC0_TYPE_DATA: 1234177595Sweongyo ds->txpriority = txq->qnum; 1235177595Sweongyo break; 1236177595Sweongyo default: 1237177595Sweongyo if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1238177595Sweongyo wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1239177595Sweongyo /* XXX statistic */ 1240177595Sweongyo m_freem(m0); 1241177595Sweongyo return EIO; 1242177595Sweongyo } 1243177595Sweongyo 1244177595Sweongyo#ifdef MALO_DEBUG 1245177595Sweongyo if (IFF_DUMPPKTS_XMIT(sc)) 1246177595Sweongyo ieee80211_dump_pkt(ic, 1247177595Sweongyo mtod(m0, const uint8_t *)+sizeof(uint16_t), 1248177595Sweongyo m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1249177595Sweongyo#endif 1250177595Sweongyo 1251177595Sweongyo MALO_TXQ_LOCK(txq); 1252177595Sweongyo if (!IS_DATA_FRAME(wh)) 1253177595Sweongyo ds->status |= htole32(1); 1254177595Sweongyo ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1255177595Sweongyo STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1256177595Sweongyo MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1257177595Sweongyo 1258177595Sweongyo ifp->if_opackets++; 1259177595Sweongyo ifp->if_timer = 5; 1260177595Sweongyo MALO_TXQ_UNLOCK(txq); 1261177595Sweongyo return 0; 1262177595Sweongyo#undef IEEE80211_DIR_DSTODS 1263177595Sweongyo} 1264177595Sweongyo 1265177595Sweongyostatic void 1266177595Sweongyomalo_start(struct ifnet *ifp) 1267177595Sweongyo{ 1268177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1269177595Sweongyo struct ieee80211_node *ni; 1270178354Ssam struct malo_txq *txq = &sc->malo_txq[0]; 1271177595Sweongyo struct malo_txbuf *bf = NULL; 1272177595Sweongyo struct mbuf *m; 1273178354Ssam int nqueued = 0; 1274177595Sweongyo 1275177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1276177595Sweongyo return; 1277177595Sweongyo 1278177595Sweongyo for (;;) { 1279178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1280178354Ssam if (m == NULL) 1281178354Ssam break; 1282178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1283178354Ssam bf = malo_getbuf(sc, txq); 1284178354Ssam if (bf == NULL) { 1285178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1286178354Ssam 1287178354Ssam /* XXX blocks other traffic */ 1288178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1289178354Ssam sc->malo_stats.mst_tx_qstop++; 1290178354Ssam break; 1291178354Ssam } 1292177595Sweongyo /* 1293178354Ssam * Encapsulate the packet in prep for transmission. 1294177595Sweongyo */ 1295178354Ssam m = ieee80211_encap(ni, m); 1296177595Sweongyo if (m == NULL) { 1297178354Ssam DPRINTF(sc, MALO_DEBUG_XMIT, 1298178354Ssam "%s: encapsulation failure\n", __func__); 1299178354Ssam sc->malo_stats.mst_tx_encap++; 1300178354Ssam goto bad; 1301177595Sweongyo } 1302177595Sweongyo /* 1303177595Sweongyo * Pass the frame to the h/w for transmission. 1304177595Sweongyo */ 1305177595Sweongyo if (malo_tx_start(sc, ni, bf, m)) { 1306177595Sweongyo bad: 1307177595Sweongyo ifp->if_oerrors++; 1308177595Sweongyo if (bf != NULL) { 1309177595Sweongyo bf->bf_m = NULL; 1310177595Sweongyo bf->bf_node = NULL; 1311177595Sweongyo MALO_TXQ_LOCK(txq); 1312177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1313177595Sweongyo MALO_TXQ_UNLOCK(txq); 1314177595Sweongyo } 1315177595Sweongyo ieee80211_free_node(ni); 1316177595Sweongyo continue; 1317177595Sweongyo } 1318177595Sweongyo nqueued++; 1319177595Sweongyo 1320177595Sweongyo if (nqueued >= malo_txcoalesce) { 1321177595Sweongyo /* 1322177595Sweongyo * Poke the firmware to process queued frames; 1323177595Sweongyo * see below about (lack of) locking. 1324177595Sweongyo */ 1325177595Sweongyo nqueued = 0; 1326177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1327177595Sweongyo } 1328177595Sweongyo } 1329177595Sweongyo 1330177595Sweongyo if (nqueued) { 1331177595Sweongyo /* 1332177595Sweongyo * NB: We don't need to lock against tx done because 1333177595Sweongyo * this just prods the firmware to check the transmit 1334177595Sweongyo * descriptors. The firmware will also start fetching 1335177595Sweongyo * descriptors by itself if it notices new ones are 1336177595Sweongyo * present when it goes to deliver a tx done interrupt 1337177595Sweongyo * to the host. So if we race with tx done processing 1338177595Sweongyo * it's ok. Delivering the kick here rather than in 1339177595Sweongyo * malo_tx_start is an optimization to avoid poking the 1340177595Sweongyo * firmware for each packet. 1341177595Sweongyo * 1342177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1343177595Sweongyo */ 1344177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1345177595Sweongyo } 1346177595Sweongyo} 1347177595Sweongyo 1348177595Sweongyostatic void 1349177595Sweongyomalo_watchdog(struct ifnet *ifp) 1350177595Sweongyo{ 1351177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1352177595Sweongyo 1353177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1354177595Sweongyo if_printf(ifp, "watchdog timeout\n"); 1355177595Sweongyo 1356177595Sweongyo /* XXX no way to reset h/w. now */ 1357177595Sweongyo 1358177595Sweongyo ifp->if_oerrors++; 1359177595Sweongyo sc->malo_stats.mst_watchdog++; 1360177595Sweongyo } 1361177595Sweongyo} 1362177595Sweongyo 1363177595Sweongyostatic int 1364177595Sweongyomalo_hal_reset(struct malo_softc *sc) 1365177595Sweongyo{ 1366177595Sweongyo static int first = 0; 1367178354Ssam struct ifnet *ifp = sc->malo_ifp; 1368178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1369177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1370177595Sweongyo 1371177595Sweongyo if (first == 0) { 1372177595Sweongyo /* 1373177595Sweongyo * NB: when the device firstly is initialized, sometimes 1374177595Sweongyo * firmware could override rx/tx dma registers so we re-set 1375177595Sweongyo * these values once. 1376177595Sweongyo */ 1377177595Sweongyo malo_hal_set_rxtxdma(sc); 1378177595Sweongyo first = 1; 1379177595Sweongyo } 1380177595Sweongyo 1381177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1382177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1383177595Sweongyo malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1384177595Sweongyo malo_chan_set(sc, ic->ic_curchan); 1385177595Sweongyo 1386177595Sweongyo /* XXX needs other stuffs? */ 1387177595Sweongyo 1388177595Sweongyo return 1; 1389177595Sweongyo} 1390177595Sweongyo 1391177595Sweongyostatic __inline struct mbuf * 1392177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1393177595Sweongyo{ 1394177595Sweongyo struct mbuf *m; 1395177595Sweongyo bus_addr_t paddr; 1396177595Sweongyo int error; 1397177595Sweongyo 1398177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 1399177595Sweongyo m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1400177595Sweongyo if (m == NULL) { 1401177595Sweongyo sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1402177595Sweongyo return NULL; 1403177595Sweongyo } 1404177595Sweongyo error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1405177595Sweongyo mtod(m, caddr_t), MJUMPAGESIZE, 1406177595Sweongyo malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1407177595Sweongyo if (error != 0) { 1408177595Sweongyo if_printf(sc->malo_ifp, 1409177595Sweongyo "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1410177595Sweongyo m_freem(m); 1411177595Sweongyo return NULL; 1412177595Sweongyo } 1413177595Sweongyo bf->bf_data = paddr; 1414177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1415177595Sweongyo 1416177595Sweongyo return m; 1417177595Sweongyo} 1418177595Sweongyo 1419177595Sweongyostatic int 1420177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1421177595Sweongyo{ 1422177595Sweongyo struct malo_rxdesc *ds; 1423177595Sweongyo 1424177595Sweongyo ds = bf->bf_desc; 1425177595Sweongyo if (bf->bf_m == NULL) { 1426177595Sweongyo bf->bf_m = malo_getrxmbuf(sc, bf); 1427177595Sweongyo if (bf->bf_m == NULL) { 1428177595Sweongyo /* mark descriptor to be skipped */ 1429177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1430177595Sweongyo /* NB: don't need PREREAD */ 1431177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1432177595Sweongyo return ENOMEM; 1433177595Sweongyo } 1434177595Sweongyo } 1435177595Sweongyo 1436177595Sweongyo /* 1437177595Sweongyo * Setup descriptor. 1438177595Sweongyo */ 1439177595Sweongyo ds->qosctrl = 0; 1440177595Sweongyo ds->snr = 0; 1441177595Sweongyo ds->status = MALO_RXD_STATUS_IDLE; 1442177595Sweongyo ds->channel = 0; 1443177595Sweongyo ds->pktlen = htole16(MALO_RXSIZE); 1444177595Sweongyo ds->nf = 0; 1445177595Sweongyo ds->physbuffdata = htole32(bf->bf_data); 1446177595Sweongyo /* NB: don't touch pPhysNext, set once */ 1447177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1448177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1449177595Sweongyo 1450177595Sweongyo return 0; 1451177595Sweongyo} 1452177595Sweongyo 1453177595Sweongyo/* 1454177595Sweongyo * Setup the rx data structures. This should only be done once or we may get 1455177595Sweongyo * out of sync with the firmware. 1456177595Sweongyo */ 1457177595Sweongyostatic int 1458177595Sweongyomalo_startrecv(struct malo_softc *sc) 1459177595Sweongyo{ 1460177595Sweongyo struct malo_rxbuf *bf, *prev; 1461177595Sweongyo struct malo_rxdesc *ds; 1462177595Sweongyo 1463177595Sweongyo if (sc->malo_recvsetup == 1) { 1464177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1465177595Sweongyo return 0; 1466177595Sweongyo } 1467177595Sweongyo 1468177595Sweongyo prev = NULL; 1469177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1470177595Sweongyo int error = malo_rxbuf_init(sc, bf); 1471177595Sweongyo if (error != 0) { 1472177595Sweongyo DPRINTF(sc, MALO_DEBUG_RECV, 1473177595Sweongyo "%s: malo_rxbuf_init failed %d\n", 1474177595Sweongyo __func__, error); 1475177595Sweongyo return error; 1476177595Sweongyo } 1477177595Sweongyo if (prev != NULL) { 1478177595Sweongyo ds = prev->bf_desc; 1479177595Sweongyo ds->physnext = htole32(bf->bf_daddr); 1480177595Sweongyo } 1481177595Sweongyo prev = bf; 1482177595Sweongyo } 1483177595Sweongyo if (prev != NULL) { 1484177595Sweongyo ds = prev->bf_desc; 1485177595Sweongyo ds->physnext = 1486177595Sweongyo htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1487177595Sweongyo } 1488177595Sweongyo 1489177595Sweongyo sc->malo_recvsetup = 1; 1490177595Sweongyo 1491177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1492177595Sweongyo 1493177595Sweongyo return 0; 1494177595Sweongyo} 1495177595Sweongyo 1496177595Sweongyostatic void 1497178354Ssammalo_init_locked(struct malo_softc *sc) 1498177595Sweongyo{ 1499177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1500177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1501177595Sweongyo int error; 1502177595Sweongyo 1503177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1504177595Sweongyo __func__, ifp->if_flags); 1505177595Sweongyo 1506178354Ssam MALO_LOCK_ASSERT(sc); 1507177595Sweongyo 1508177595Sweongyo /* 1509177595Sweongyo * Stop anything previously setup. This is safe whether this is 1510177595Sweongyo * the first time through or not. 1511177595Sweongyo */ 1512177595Sweongyo malo_stop_locked(ifp, 0); 1513177595Sweongyo 1514177595Sweongyo /* 1515177595Sweongyo * Push state to the firmware. 1516177595Sweongyo */ 1517177595Sweongyo if (!malo_hal_reset(sc)) { 1518177595Sweongyo if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1519178354Ssam return; 1520177595Sweongyo } 1521177595Sweongyo 1522177595Sweongyo /* 1523177595Sweongyo * Setup recv (once); transmit is already good to go. 1524177595Sweongyo */ 1525177595Sweongyo error = malo_startrecv(sc); 1526177595Sweongyo if (error != 0) { 1527177595Sweongyo if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1528177595Sweongyo __func__, error); 1529178354Ssam return; 1530177595Sweongyo } 1531177595Sweongyo 1532177595Sweongyo /* 1533177595Sweongyo * Enable interrupts. 1534177595Sweongyo */ 1535177595Sweongyo sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1536177595Sweongyo | MALO_A2HRIC_BIT_TX_DONE 1537177595Sweongyo | MALO_A2HRIC_BIT_OPC_DONE 1538177595Sweongyo | MALO_A2HRIC_BIT_MAC_EVENT 1539177595Sweongyo | MALO_A2HRIC_BIT_RX_PROBLEM 1540177595Sweongyo | MALO_A2HRIC_BIT_ICV_ERROR 1541177595Sweongyo | MALO_A2HRIC_BIT_RADAR_DETECT 1542177595Sweongyo | MALO_A2HRIC_BIT_CHAN_SWITCH; 1543177595Sweongyo 1544177595Sweongyo ifp->if_drv_flags |= IFF_DRV_RUNNING; 1545177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1546178354Ssam} 1547177595Sweongyo 1548178354Ssamstatic void 1549178354Ssammalo_init(void *arg) 1550178354Ssam{ 1551178354Ssam struct malo_softc *sc = (struct malo_softc *) arg; 1552178354Ssam struct ifnet *ifp = sc->malo_ifp; 1553178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1554178354Ssam 1555178354Ssam DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1556178354Ssam __func__, ifp->if_flags); 1557177595Sweongyo 1558178354Ssam MALO_LOCK(sc); 1559178354Ssam malo_init_locked(sc); 1560177595Sweongyo 1561177595Sweongyo MALO_UNLOCK(sc); 1562177595Sweongyo 1563178354Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1564178354Ssam ieee80211_start_all(ic); /* start all vap's */ 1565177595Sweongyo} 1566177595Sweongyo 1567177595Sweongyo/* 1568177595Sweongyo * Set the multicast filter contents into the hardware. 1569177595Sweongyo */ 1570177595Sweongyostatic void 1571177595Sweongyomalo_setmcastfilter(struct malo_softc *sc) 1572177595Sweongyo{ 1573178354Ssam struct ifnet *ifp = sc->malo_ifp; 1574178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1575177595Sweongyo struct ifmultiaddr *ifma; 1576177595Sweongyo uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1577177595Sweongyo uint8_t *mp; 1578177595Sweongyo int nmc; 1579177595Sweongyo 1580177595Sweongyo mp = macs; 1581177595Sweongyo nmc = 0; 1582177595Sweongyo 1583177595Sweongyo if (ic->ic_opmode == IEEE80211_M_MONITOR || 1584177595Sweongyo (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1585177595Sweongyo goto all; 1586177595Sweongyo 1587177595Sweongyo IF_ADDR_LOCK(ifp); 1588177595Sweongyo TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1589177595Sweongyo if (ifma->ifma_addr->sa_family != AF_LINK) 1590177595Sweongyo continue; 1591177595Sweongyo 1592177595Sweongyo if (nmc == MALO_HAL_MCAST_MAX) { 1593177595Sweongyo ifp->if_flags |= IFF_ALLMULTI; 1594177595Sweongyo IF_ADDR_UNLOCK(ifp); 1595177595Sweongyo goto all; 1596177595Sweongyo } 1597177595Sweongyo IEEE80211_ADDR_COPY(mp, 1598177595Sweongyo LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1599177595Sweongyo 1600177595Sweongyo mp += IEEE80211_ADDR_LEN, nmc++; 1601177595Sweongyo } 1602177595Sweongyo IF_ADDR_UNLOCK(ifp); 1603177595Sweongyo 1604177595Sweongyo malo_hal_setmcast(sc->malo_mh, nmc, macs); 1605177595Sweongyo 1606177595Sweongyoall: 1607177595Sweongyo /* 1608177595Sweongyo * XXX we don't know how to set the f/w for supporting 1609177595Sweongyo * IFF_ALLMULTI | IFF_PROMISC cases 1610177595Sweongyo */ 1611177595Sweongyo return; 1612177595Sweongyo} 1613177595Sweongyo 1614177595Sweongyostatic int 1615177595Sweongyomalo_mode_init(struct malo_softc *sc) 1616177595Sweongyo{ 1617178354Ssam struct ifnet *ifp = sc->malo_ifp; 1618178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1619177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1620177595Sweongyo 1621177595Sweongyo /* 1622177595Sweongyo * NB: Ignore promisc in hostap mode; it's set by the 1623177595Sweongyo * bridge. This is wrong but we have no way to 1624177595Sweongyo * identify internal requests (from the bridge) 1625177595Sweongyo * versus external requests such as for tcpdump. 1626177595Sweongyo */ 1627177595Sweongyo malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1628177595Sweongyo ic->ic_opmode != IEEE80211_M_HOSTAP); 1629177595Sweongyo malo_setmcastfilter(sc); 1630177595Sweongyo 1631177595Sweongyo return ENXIO; 1632177595Sweongyo} 1633177595Sweongyo 1634177595Sweongyostatic void 1635177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1636177595Sweongyo{ 1637177595Sweongyo struct ieee80211_node *ni; 1638177595Sweongyo struct malo_txbuf *bf; 1639177595Sweongyo u_int ix; 1640177595Sweongyo 1641177595Sweongyo /* 1642177595Sweongyo * NB: this assumes output has been stopped and 1643177595Sweongyo * we do not need to block malo_tx_tasklet 1644177595Sweongyo */ 1645177595Sweongyo for (ix = 0;; ix++) { 1646177595Sweongyo MALO_TXQ_LOCK(txq); 1647177595Sweongyo bf = STAILQ_FIRST(&txq->active); 1648177595Sweongyo if (bf == NULL) { 1649177595Sweongyo MALO_TXQ_UNLOCK(txq); 1650177595Sweongyo break; 1651177595Sweongyo } 1652177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1653177595Sweongyo MALO_TXQ_UNLOCK(txq); 1654177595Sweongyo#ifdef MALO_DEBUG 1655177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RESET) { 1656178354Ssam struct ifnet *ifp = sc->malo_ifp; 1657178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1658177595Sweongyo const struct malo_txrec *tr = 1659177595Sweongyo mtod(bf->bf_m, const struct malo_txrec *); 1660177595Sweongyo malo_printtxbuf(bf, txq->qnum, ix); 1661178354Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1662177595Sweongyo bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1663177595Sweongyo } 1664177595Sweongyo#endif /* MALO_DEBUG */ 1665177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1666177595Sweongyo ni = bf->bf_node; 1667177595Sweongyo bf->bf_node = NULL; 1668177595Sweongyo if (ni != NULL) { 1669177595Sweongyo /* 1670177595Sweongyo * Reclaim node reference. 1671177595Sweongyo */ 1672177595Sweongyo ieee80211_free_node(ni); 1673177595Sweongyo } 1674177595Sweongyo m_freem(bf->bf_m); 1675177595Sweongyo bf->bf_m = NULL; 1676177595Sweongyo 1677177595Sweongyo MALO_TXQ_LOCK(txq); 1678177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1679177595Sweongyo txq->nfree++; 1680177595Sweongyo MALO_TXQ_UNLOCK(txq); 1681177595Sweongyo } 1682177595Sweongyo} 1683177595Sweongyo 1684177595Sweongyostatic void 1685177595Sweongyomalo_stop_locked(struct ifnet *ifp, int disable) 1686177595Sweongyo{ 1687177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1688177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1689178354Ssam int i; 1690177595Sweongyo 1691177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1692177595Sweongyo __func__, sc->malo_invalid, ifp->if_flags); 1693177595Sweongyo 1694177595Sweongyo MALO_LOCK_ASSERT(sc); 1695177595Sweongyo 1696177595Sweongyo if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1697177595Sweongyo return; 1698177595Sweongyo 1699177595Sweongyo /* 1700177595Sweongyo * Shutdown the hardware and driver: 1701177595Sweongyo * disable interrupts 1702177595Sweongyo * turn off the radio 1703177595Sweongyo * drain and release tx queues 1704177595Sweongyo * 1705177595Sweongyo * Note that some of this work is not possible if the hardware 1706177595Sweongyo * is gone (invalid). 1707177595Sweongyo */ 1708177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1709177595Sweongyo ifp->if_timer = 0; 1710178354Ssam /* diable interrupt. */ 1711178354Ssam malo_hal_intrset(mh, 0); 1712178354Ssam /* turn off the radio. */ 1713178354Ssam malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1714177595Sweongyo 1715177595Sweongyo /* drain and release tx queues. */ 1716177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1717177595Sweongyo malo_tx_draintxq(sc, &sc->malo_txq[i]); 1718177595Sweongyo} 1719177595Sweongyo 1720177595Sweongyostatic int 1721177595Sweongyomalo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1722177595Sweongyo{ 1723177595Sweongyo#define MALO_IS_RUNNING(ifp) \ 1724177595Sweongyo ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1725177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1726178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1727178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1728178354Ssam int error = 0, startall = 0; 1729177595Sweongyo 1730177595Sweongyo MALO_LOCK(sc); 1731177595Sweongyo switch (cmd) { 1732177595Sweongyo case SIOCSIFFLAGS: 1733177595Sweongyo if (MALO_IS_RUNNING(ifp)) { 1734177595Sweongyo /* 1735177595Sweongyo * To avoid rescanning another access point, 1736177595Sweongyo * do not call malo_init() here. Instead, 1737177595Sweongyo * only reflect promisc mode settings. 1738177595Sweongyo */ 1739177595Sweongyo malo_mode_init(sc); 1740177595Sweongyo } else if (ifp->if_flags & IFF_UP) { 1741177595Sweongyo /* 1742177595Sweongyo * Beware of being called during attach/detach 1743177595Sweongyo * to reset promiscuous mode. In that case we 1744177595Sweongyo * will still be marked UP but not RUNNING. 1745177595Sweongyo * However trying to re-init the interface 1746177595Sweongyo * is the wrong thing to do as we've already 1747177595Sweongyo * torn down much of our state. There's 1748177595Sweongyo * probably a better way to deal with this. 1749177595Sweongyo */ 1750178354Ssam if (!sc->malo_invalid) { 1751178354Ssam malo_init_locked(sc); 1752178354Ssam startall = 1; 1753178354Ssam } 1754177595Sweongyo } else 1755177595Sweongyo malo_stop_locked(ifp, 1); 1756177595Sweongyo break; 1757178354Ssam case SIOCGIFMEDIA: 1758178354Ssam case SIOCSIFMEDIA: 1759178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1760177595Sweongyo break; 1761177595Sweongyo default: 1762178354Ssam error = ether_ioctl(ifp, cmd, data); 1763177595Sweongyo break; 1764177595Sweongyo } 1765177595Sweongyo MALO_UNLOCK(sc); 1766177595Sweongyo 1767178354Ssam if (startall) 1768178354Ssam ieee80211_start_all(ic); 1769177595Sweongyo return error; 1770177595Sweongyo#undef MALO_IS_RUNNING 1771177595Sweongyo} 1772177595Sweongyo 1773177595Sweongyo/* 1774177595Sweongyo * Callback from the 802.11 layer to update the slot time 1775177595Sweongyo * based on the current setting. We use it to notify the 1776177595Sweongyo * firmware of ERP changes and the f/w takes care of things 1777177595Sweongyo * like slot time and preamble. 1778177595Sweongyo */ 1779177595Sweongyostatic void 1780177595Sweongyomalo_updateslot(struct ifnet *ifp) 1781177595Sweongyo{ 1782177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1783178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1784177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1785177595Sweongyo int error; 1786177595Sweongyo 1787177595Sweongyo /* NB: can be called early; suppress needless cmds */ 1788177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1789177595Sweongyo return; 1790177595Sweongyo 1791177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 1792177595Sweongyo "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1793177595Sweongyo __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1794177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1795177595Sweongyo 1796177595Sweongyo if (ic->ic_flags & IEEE80211_F_SHSLOT) 1797177595Sweongyo error = malo_hal_set_slot(mh, 1); 1798177595Sweongyo else 1799177595Sweongyo error = malo_hal_set_slot(mh, 0); 1800177595Sweongyo 1801177595Sweongyo if (error != 0) 1802177595Sweongyo device_printf(sc->malo_dev, "setting %s slot failed\n", 1803177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1804177595Sweongyo} 1805177595Sweongyo 1806177595Sweongyostatic int 1807178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1808177595Sweongyo{ 1809178354Ssam struct ieee80211com *ic = vap->iv_ic; 1810178354Ssam struct malo_softc *sc = ic->ic_ifp->if_softc; 1811177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1812177595Sweongyo int error; 1813177595Sweongyo 1814177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1815178354Ssam ieee80211_state_name[vap->iv_state], 1816177595Sweongyo ieee80211_state_name[nstate]); 1817177595Sweongyo 1818177595Sweongyo /* 1819178354Ssam * Invoke the net80211 layer first so iv_bss is setup. 1820177595Sweongyo */ 1821178354Ssam error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1822178354Ssam if (error != 0) 1823178354Ssam return error; 1824178354Ssam 1825178354Ssam if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1826178354Ssam struct ieee80211_node *ni = vap->iv_bss; 1827178354Ssam enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1828178354Ssam const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1829178354Ssam 1830177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, 1831178354Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1832178354Ssam "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1833178354Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1834177595Sweongyo ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1835178354Ssam ieee80211_chan2ieee(ic, ic->ic_curchan), 1836178354Ssam ni->ni_associd, mode, tp->ucastrate); 1837177595Sweongyo 1838178354Ssam malo_hal_setradio(mh, 1, 1839178354Ssam (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1840178354Ssam MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1841178354Ssam malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1842178354Ssam malo_hal_set_rate(mh, mode, 1843178354Ssam tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1844178354Ssam 0 : malo_fix2rate(tp->ucastrate)); 1845177595Sweongyo } 1846178354Ssam return 0; 1847177595Sweongyo} 1848177595Sweongyo 1849177595Sweongyostatic int 1850177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1851177595Sweongyo const struct ieee80211_bpf_params *params) 1852177595Sweongyo{ 1853177595Sweongyo struct ieee80211com *ic = ni->ni_ic; 1854177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 1855177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1856177595Sweongyo struct malo_txbuf *bf; 1857177595Sweongyo struct malo_txq *txq; 1858177595Sweongyo 1859177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1860177595Sweongyo ieee80211_free_node(ni); 1861177595Sweongyo m_freem(m); 1862177595Sweongyo return ENETDOWN; 1863177595Sweongyo } 1864177595Sweongyo 1865177595Sweongyo /* 1866177595Sweongyo * Grab a TX buffer and associated resources. Note that we depend 1867177595Sweongyo * on the classification by the 802.11 layer to get to the right h/w 1868177595Sweongyo * queue. Management frames must ALWAYS go on queue 1 but we 1869177595Sweongyo * cannot just force that here because we may receive non-mgt frames. 1870177595Sweongyo */ 1871177595Sweongyo txq = &sc->malo_txq[0]; 1872177595Sweongyo bf = malo_getbuf(sc, txq); 1873177595Sweongyo if (bf == NULL) { 1874177595Sweongyo /* XXX blocks other traffic */ 1875177595Sweongyo ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1876177595Sweongyo ieee80211_free_node(ni); 1877177595Sweongyo m_freem(m); 1878177595Sweongyo return ENOBUFS; 1879177595Sweongyo } 1880177595Sweongyo 1881177595Sweongyo /* 1882177595Sweongyo * Pass the frame to the h/w for transmission. 1883177595Sweongyo */ 1884177595Sweongyo if (malo_tx_start(sc, ni, bf, m) != 0) { 1885177595Sweongyo ifp->if_oerrors++; 1886177595Sweongyo bf->bf_m = NULL; 1887177595Sweongyo bf->bf_node = NULL; 1888177595Sweongyo MALO_TXQ_LOCK(txq); 1889177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1890177595Sweongyo txq->nfree++; 1891177595Sweongyo MALO_TXQ_UNLOCK(txq); 1892177595Sweongyo 1893177595Sweongyo ieee80211_free_node(ni); 1894177595Sweongyo return EIO; /* XXX */ 1895177595Sweongyo } 1896177595Sweongyo 1897177595Sweongyo /* 1898177595Sweongyo * NB: We don't need to lock against tx done because this just 1899177595Sweongyo * prods the firmware to check the transmit descriptors. The firmware 1900177595Sweongyo * will also start fetching descriptors by itself if it notices 1901177595Sweongyo * new ones are present when it goes to deliver a tx done interrupt 1902177595Sweongyo * to the host. So if we race with tx done processing it's ok. 1903177595Sweongyo * Delivering the kick here rather than in malo_tx_start is 1904177595Sweongyo * an optimization to avoid poking the firmware for each packet. 1905177595Sweongyo * 1906177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1907177595Sweongyo */ 1908177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1909177595Sweongyo 1910177595Sweongyo return 0; 1911177595Sweongyo} 1912177595Sweongyo 1913177595Sweongyostatic void 1914177595Sweongyomalo_bpfattach(struct malo_softc *sc) 1915177595Sweongyo{ 1916177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1917177595Sweongyo 1918178354Ssam bpfattach(ifp, DLT_IEEE802_11_RADIO, 1919178354Ssam sizeof(struct ieee80211_frame) + sizeof(sc->malo_tx_th)); 1920177595Sweongyo 1921177595Sweongyo /* 1922177595Sweongyo * Initialize constant fields. 1923177595Sweongyo * XXX make header lengths a multiple of 32-bits so subsequent 1924177595Sweongyo * headers are properly aligned; this is a kludge to keep 1925177595Sweongyo * certain applications happy. 1926177595Sweongyo * 1927177595Sweongyo * NB: the channel is setup each time we transition to the 1928177595Sweongyo * RUN state to avoid filling it in for each frame. 1929177595Sweongyo */ 1930177595Sweongyo sc->malo_tx_th_len = roundup(sizeof(sc->malo_tx_th), sizeof(uint32_t)); 1931177595Sweongyo sc->malo_tx_th.wt_ihdr.it_len = htole16(sc->malo_tx_th_len); 1932177595Sweongyo sc->malo_tx_th.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 1933177595Sweongyo 1934177595Sweongyo sc->malo_rx_th_len = roundup(sizeof(sc->malo_rx_th), sizeof(uint32_t)); 1935177595Sweongyo sc->malo_rx_th.wr_ihdr.it_len = htole16(sc->malo_rx_th_len); 1936177595Sweongyo sc->malo_rx_th.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 1937177595Sweongyo} 1938177595Sweongyo 1939177595Sweongyostatic void 1940177595Sweongyomalo_sysctlattach(struct malo_softc *sc) 1941177595Sweongyo{ 1942177595Sweongyo#ifdef MALO_DEBUG 1943177595Sweongyo struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1944177595Sweongyo struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1945177595Sweongyo 1946177595Sweongyo sc->malo_debug = malo_debug; 1947177595Sweongyo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1948177595Sweongyo "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1949177595Sweongyo "control debugging printfs"); 1950177595Sweongyo#endif 1951177595Sweongyo} 1952177595Sweongyo 1953177595Sweongyostatic void 1954177595Sweongyomalo_announce(struct malo_softc *sc) 1955177595Sweongyo{ 1956177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1957177595Sweongyo 1958177595Sweongyo if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1959177595Sweongyo sc->malo_hwspecs.hwversion, 1960177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1961177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1962177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1963177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1964177595Sweongyo sc->malo_hwspecs.regioncode); 1965177595Sweongyo 1966177595Sweongyo if (bootverbose || malo_rxbuf != MALO_RXBUF) 1967177595Sweongyo if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1968177595Sweongyo if (bootverbose || malo_txbuf != MALO_TXBUF) 1969177595Sweongyo if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1970177595Sweongyo} 1971177595Sweongyo 1972177595Sweongyo/* 1973177595Sweongyo * Convert net80211 channel to a HAL channel. 1974177595Sweongyo */ 1975177595Sweongyostatic void 1976177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1977177595Sweongyo{ 1978177595Sweongyo hc->channel = chan->ic_ieee; 1979177595Sweongyo 1980177595Sweongyo *(uint32_t *)&hc->flags = 0; 1981177595Sweongyo if (IEEE80211_IS_CHAN_2GHZ(chan)) 1982177595Sweongyo hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1983177595Sweongyo} 1984177595Sweongyo 1985177595Sweongyo/* 1986177595Sweongyo * Set/change channels. If the channel is really being changed, 1987177595Sweongyo * it's done by reseting the chip. To accomplish this we must 1988177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la 1989177595Sweongyo * malo_init. 1990177595Sweongyo */ 1991177595Sweongyostatic int 1992177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1993177595Sweongyo{ 1994177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1995177595Sweongyo struct malo_hal_channel hchan; 1996177595Sweongyo 1997177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1998177595Sweongyo __func__, chan->ic_freq, chan->ic_flags); 1999177595Sweongyo 2000177595Sweongyo /* 2001177595Sweongyo * Convert to a HAL channel description with the flags constrained 2002177595Sweongyo * to reflect the current operating mode. 2003177595Sweongyo */ 2004177595Sweongyo malo_mapchan(&hchan, chan); 2005177595Sweongyo malo_hal_intrset(mh, 0); /* disable interrupts */ 2006177595Sweongyo malo_hal_setchannel(mh, &hchan); 2007177595Sweongyo malo_hal_settxpower(mh, &hchan); 2008177595Sweongyo 2009177595Sweongyo /* 2010177595Sweongyo * Update internal state. 2011177595Sweongyo */ 2012177595Sweongyo sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 2013177595Sweongyo sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 2014177595Sweongyo if (IEEE80211_IS_CHAN_ANYG(chan)) { 2015177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 2016177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 2017177595Sweongyo } else { 2018177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 2019177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 2020177595Sweongyo } 2021177595Sweongyo sc->malo_curchan = hchan; 2022177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 2023177595Sweongyo 2024177595Sweongyo return 0; 2025177595Sweongyo} 2026177595Sweongyo 2027177595Sweongyostatic void 2028177595Sweongyomalo_scan_start(struct ieee80211com *ic) 2029177595Sweongyo{ 2030177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2031177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2032177595Sweongyo 2033177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2034177595Sweongyo} 2035177595Sweongyo 2036177595Sweongyostatic void 2037177595Sweongyomalo_scan_end(struct ieee80211com *ic) 2038177595Sweongyo{ 2039177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2040177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2041177595Sweongyo 2042177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2043177595Sweongyo} 2044177595Sweongyo 2045177595Sweongyostatic void 2046177595Sweongyomalo_set_channel(struct ieee80211com *ic) 2047177595Sweongyo{ 2048177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2049177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2050177595Sweongyo 2051177595Sweongyo (void) malo_chan_set(sc, ic->ic_curchan); 2052177595Sweongyo} 2053177595Sweongyo 2054177595Sweongyostatic void 2055177595Sweongyomalo_rx_proc(void *arg, int npending) 2056177595Sweongyo{ 2057177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 2058177595Sweongyo ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2059177595Sweongyo IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2060177595Sweongyo struct malo_softc *sc = arg; 2061178354Ssam struct ifnet *ifp = sc->malo_ifp; 2062178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2063177595Sweongyo struct malo_rxbuf *bf; 2064177595Sweongyo struct malo_rxdesc *ds; 2065177595Sweongyo struct mbuf *m, *mnew; 2066177595Sweongyo struct ieee80211_qosframe *wh; 2067177595Sweongyo struct ieee80211_qosframe_addr4 *wh4; 2068177595Sweongyo struct ieee80211_node *ni; 2069177595Sweongyo int off, len, hdrlen, pktlen, rssi, ntodo; 2070177595Sweongyo uint8_t *data, status; 2071177595Sweongyo uint32_t readptr, writeptr; 2072177595Sweongyo 2073177595Sweongyo DPRINTF(sc, MALO_DEBUG_RX_PROC, 2074177595Sweongyo "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2075177595Sweongyo __func__, npending, 2076177595Sweongyo sc->malo_hwspecs.rxdesc_read, 2077177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2078177595Sweongyo sc->malo_hwspecs.rxdesc_write, 2079177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2080177595Sweongyo 2081177595Sweongyo readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2082177595Sweongyo writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2083177595Sweongyo if (readptr == writeptr) 2084177595Sweongyo return; 2085177595Sweongyo 2086177595Sweongyo bf = sc->malo_rxnext; 2087178354Ssam for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2088177595Sweongyo if (bf == NULL) { 2089177595Sweongyo bf = STAILQ_FIRST(&sc->malo_rxbuf); 2090177595Sweongyo break; 2091177595Sweongyo } 2092177595Sweongyo ds = bf->bf_desc; 2093177595Sweongyo if (bf->bf_m == NULL) { 2094177595Sweongyo /* 2095177595Sweongyo * If data allocation failed previously there 2096177595Sweongyo * will be no buffer; try again to re-populate it. 2097177595Sweongyo * Note the firmware will not advance to the next 2098177595Sweongyo * descriptor with a dma buffer so we must mimic 2099177595Sweongyo * this or we'll get out of sync. 2100177595Sweongyo */ 2101177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, 2102177595Sweongyo "%s: rx buf w/o dma memory\n", __func__); 2103177595Sweongyo (void)malo_rxbuf_init(sc, bf); 2104177595Sweongyo break; 2105177595Sweongyo } 2106177595Sweongyo MALO_RXDESC_SYNC(sc, ds, 2107177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2108177595Sweongyo if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2109177595Sweongyo break; 2110177595Sweongyo 2111177595Sweongyo readptr = le32toh(ds->physnext); 2112177595Sweongyo 2113177595Sweongyo#ifdef MALO_DEBUG 2114177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2115177595Sweongyo malo_printrxbuf(bf, 0); 2116177595Sweongyo#endif 2117177595Sweongyo status = ds->status; 2118177595Sweongyo if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2119177595Sweongyo ifp->if_ierrors++; 2120177595Sweongyo goto rx_next; 2121177595Sweongyo } 2122177595Sweongyo /* 2123177595Sweongyo * Sync the data buffer. 2124177595Sweongyo */ 2125177595Sweongyo len = le16toh(ds->pktlen); 2126177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2127177595Sweongyo BUS_DMASYNC_POSTREAD); 2128177595Sweongyo /* 2129177595Sweongyo * The 802.11 header is provided all or in part at the front; 2130177595Sweongyo * use it to calculate the true size of the header that we'll 2131177595Sweongyo * construct below. We use this to figure out where to copy 2132177595Sweongyo * payload prior to constructing the header. 2133177595Sweongyo */ 2134177595Sweongyo m = bf->bf_m; 2135178354Ssam data = mtod(m, uint8_t *);; 2136177595Sweongyo hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2137177595Sweongyo off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2138177595Sweongyo 2139177595Sweongyo /* 2140178354Ssam * Calculate RSSI. XXX wrong 2141177595Sweongyo */ 2142177595Sweongyo rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2143177595Sweongyo if (rssi > 100) 2144177595Sweongyo rssi = 100; 2145177595Sweongyo 2146177595Sweongyo pktlen = hdrlen + (len - off); 2147177595Sweongyo /* 2148177595Sweongyo * NB: we know our frame is at least as large as 2149177595Sweongyo * IEEE80211_MIN_LEN because there is a 4-address frame at 2150177595Sweongyo * the front. Hence there's no need to vet the packet length. 2151177595Sweongyo * If the frame in fact is too small it should be discarded 2152177595Sweongyo * at the net80211 layer. 2153177595Sweongyo */ 2154177595Sweongyo 2155177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 2156177595Sweongyo mnew = malo_getrxmbuf(sc, bf); 2157177595Sweongyo if (mnew == NULL) { 2158177595Sweongyo ifp->if_ierrors++; 2159177595Sweongyo goto rx_next; 2160177595Sweongyo } 2161177595Sweongyo /* 2162177595Sweongyo * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2163177595Sweongyo * re-setup the rx descriptor using the replacement dma 2164177595Sweongyo * buffer we just installed above. 2165177595Sweongyo */ 2166177595Sweongyo bf->bf_m = mnew; 2167177595Sweongyo m->m_data += off - hdrlen; 2168177595Sweongyo m->m_pkthdr.len = m->m_len = pktlen; 2169177595Sweongyo m->m_pkthdr.rcvif = ifp; 2170177595Sweongyo 2171177595Sweongyo /* 2172177595Sweongyo * Piece 802.11 header together. 2173177595Sweongyo */ 2174177595Sweongyo wh = mtod(m, struct ieee80211_qosframe *); 2175177595Sweongyo /* NB: don't need to do this sometimes but ... */ 2176177595Sweongyo /* XXX special case so we can memcpy after m_devget? */ 2177177595Sweongyo ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2178177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 2179177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 2180177595Sweongyo wh4 = mtod(m, 2181177595Sweongyo struct ieee80211_qosframe_addr4*); 2182177595Sweongyo *(uint16_t *)wh4->i_qos = ds->qosctrl; 2183177595Sweongyo } else { 2184177595Sweongyo *(uint16_t *)wh->i_qos = ds->qosctrl; 2185177595Sweongyo } 2186177595Sweongyo } 2187177595Sweongyo if (sc->malo_drvbpf != NULL) { 2188177595Sweongyo sc->malo_rx_th.wr_flags = 0; 2189177595Sweongyo sc->malo_rx_th.wr_rate = ds->rate; 2190177595Sweongyo sc->malo_rx_th.wr_antsignal = rssi; 2191177595Sweongyo sc->malo_rx_th.wr_antnoise = ds->nf; 2192177595Sweongyo 2193178354Ssam bpf_mtap2(ifp->if_bpf, &sc->malo_rx_th, 2194178354Ssam sc->malo_rx_th_len, m); 2195177595Sweongyo } 2196177595Sweongyo#ifdef MALO_DEBUG 2197177595Sweongyo if (IFF_DUMPPKTS_RECV(sc, wh)) { 2198177595Sweongyo ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2199177595Sweongyo len, ds->rate, rssi); 2200177595Sweongyo } 2201177595Sweongyo#endif 2202177595Sweongyo ifp->if_ipackets++; 2203177595Sweongyo 2204177595Sweongyo /* dispatch */ 2205177595Sweongyo ni = ieee80211_find_rxnode(ic, 2206178354Ssam (struct ieee80211_frame_min *)wh); 2207178354Ssam if (ni != NULL) { 2208178354Ssam (void) ieee80211_input(ni, m, rssi, ds->nf, 0); 2209178354Ssam ieee80211_free_node(ni); 2210178354Ssam } else 2211178354Ssam (void) ieee80211_input_all(ic, m, rssi, ds->nf, 0); 2212177595Sweongyorx_next: 2213177595Sweongyo /* NB: ignore ENOMEM so we process more descriptors */ 2214177595Sweongyo (void) malo_rxbuf_init(sc, bf); 2215177595Sweongyo bf = STAILQ_NEXT(bf, bf_list); 2216177595Sweongyo } 2217177595Sweongyo 2218177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2219177595Sweongyo sc->malo_rxnext = bf; 2220177595Sweongyo 2221177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2222177595Sweongyo !IFQ_IS_EMPTY(&ifp->if_snd)) 2223177595Sweongyo malo_start(ifp); 2224177595Sweongyo#undef IEEE80211_DIR_DSTODS 2225177595Sweongyo} 2226177595Sweongyo 2227177595Sweongyostatic void 2228177595Sweongyomalo_stop(struct ifnet *ifp, int disable) 2229177595Sweongyo{ 2230177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2231177595Sweongyo 2232177595Sweongyo MALO_LOCK(sc); 2233177595Sweongyo malo_stop_locked(ifp, disable); 2234177595Sweongyo MALO_UNLOCK(sc); 2235177595Sweongyo} 2236177595Sweongyo 2237177595Sweongyo/* 2238177595Sweongyo * Reclaim all tx queue resources. 2239177595Sweongyo */ 2240177595Sweongyostatic void 2241177595Sweongyomalo_tx_cleanup(struct malo_softc *sc) 2242177595Sweongyo{ 2243177595Sweongyo int i; 2244177595Sweongyo 2245177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2246177595Sweongyo malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2247177595Sweongyo} 2248177595Sweongyo 2249177595Sweongyoint 2250177595Sweongyomalo_detach(struct malo_softc *sc) 2251177595Sweongyo{ 2252177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2253178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2254177595Sweongyo 2255177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2256177595Sweongyo __func__, ifp->if_flags); 2257177595Sweongyo 2258177595Sweongyo malo_stop(ifp, 1); 2259177595Sweongyo 2260177595Sweongyo if (sc->malo_tq != NULL) { 2261177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2262177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2263177595Sweongyo taskqueue_free(sc->malo_tq); 2264177595Sweongyo sc->malo_tq = NULL; 2265177595Sweongyo } 2266177595Sweongyo 2267177595Sweongyo bpfdetach(ifp); 2268177595Sweongyo 2269177595Sweongyo /* 2270177595Sweongyo * NB: the order of these is important: 2271177595Sweongyo * o call the 802.11 layer before detaching the hal to 2272177595Sweongyo * insure callbacks into the driver to delete global 2273177595Sweongyo * key cache entries can be handled 2274177595Sweongyo * o reclaim the tx queue data structures after calling 2275177595Sweongyo * the 802.11 layer as we'll get called back to reclaim 2276177595Sweongyo * node state and potentially want to use them 2277177595Sweongyo * o to cleanup the tx queues the hal is called, so detach 2278177595Sweongyo * it last 2279177595Sweongyo * Other than that, it's straightforward... 2280177595Sweongyo */ 2281178354Ssam ieee80211_ifdetach(ic); 2282177595Sweongyo malo_dma_cleanup(sc); 2283177595Sweongyo malo_tx_cleanup(sc); 2284177595Sweongyo malo_hal_detach(sc->malo_mh); 2285177595Sweongyo if_free(ifp); 2286177595Sweongyo 2287177595Sweongyo MALO_LOCK_DESTROY(sc); 2288177595Sweongyo 2289177595Sweongyo return 0; 2290177595Sweongyo} 2291177595Sweongyo 2292177595Sweongyovoid 2293177595Sweongyomalo_shutdown(struct malo_softc *sc) 2294177595Sweongyo{ 2295177595Sweongyo malo_stop(sc->malo_ifp, 1); 2296177595Sweongyo} 2297177595Sweongyo 2298177595Sweongyovoid 2299177595Sweongyomalo_suspend(struct malo_softc *sc) 2300177595Sweongyo{ 2301177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2302177595Sweongyo 2303177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2304177595Sweongyo __func__, ifp->if_flags); 2305177595Sweongyo 2306177595Sweongyo malo_stop(ifp, 1); 2307177595Sweongyo} 2308177595Sweongyo 2309177595Sweongyovoid 2310177595Sweongyomalo_resume(struct malo_softc *sc) 2311177595Sweongyo{ 2312177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2313177595Sweongyo 2314177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2315177595Sweongyo __func__, ifp->if_flags); 2316177595Sweongyo 2317178354Ssam if (ifp->if_flags & IFF_UP) 2318177595Sweongyo malo_init(sc); 2319177595Sweongyo} 2320