if_malo.c revision 178354
1177595Sweongyo/*-
2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc.
4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting
5177595Sweongyo * All rights reserved.
6177595Sweongyo *
7177595Sweongyo * Redistribution and use in source and binary forms, with or without
8177595Sweongyo * modification, are permitted provided that the following conditions
9177595Sweongyo * are met:
10177595Sweongyo * 1. Redistributions of source code must retain the above copyright
11177595Sweongyo *    notice, this list of conditions and the following disclaimer,
12177595Sweongyo *    without modification.
13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14177595Sweongyo *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15177595Sweongyo *    redistribution must be conditioned upon including a substantially
16177595Sweongyo *    similar Disclaimer requirement for further binary redistribution.
17177595Sweongyo *
18177595Sweongyo * NO WARRANTY
19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES.
30177595Sweongyo */
31177595Sweongyo
32177595Sweongyo#include <sys/cdefs.h>
33177595Sweongyo#ifdef __FreeBSD__
34177595Sweongyo__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 178354 2008-04-20 20:35:46Z sam $");
35177595Sweongyo#endif
36177595Sweongyo
37178354Ssam#include "opt_malo.h"
38178354Ssam
39177595Sweongyo#include <sys/param.h>
40177595Sweongyo#include <sys/endian.h>
41177595Sweongyo#include <sys/kernel.h>
42177595Sweongyo#include <sys/socket.h>
43177595Sweongyo#include <sys/sockio.h>
44177595Sweongyo#include <sys/sysctl.h>
45177595Sweongyo#include <sys/taskqueue.h>
46177595Sweongyo
47177595Sweongyo#include <machine/bus.h>
48177595Sweongyo#include <sys/bus.h>
49177595Sweongyo
50177595Sweongyo#include <net/if.h>
51177595Sweongyo#include <net/if_dl.h>
52177595Sweongyo#include <net/if_media.h>
53177595Sweongyo#include <net/if_types.h>
54177595Sweongyo#include <net/ethernet.h>
55177595Sweongyo
56177595Sweongyo#include <net80211/ieee80211_var.h>
57177595Sweongyo#include <net80211/ieee80211_regdomain.h>
58177595Sweongyo
59177595Sweongyo#include <net/bpf.h>
60177595Sweongyo
61177595Sweongyo#include <dev/malo/if_malo.h>
62177595Sweongyo
63177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0,
64177595Sweongyo    "Marvell 88w8335 driver parameters");
65177595Sweongyo
66177595Sweongyostatic	int malo_txcoalesce = 8;	/* # tx pkts to q before poking f/w*/
67177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce,
68177595Sweongyo	    0, "tx buffers to send at once");
69177595SweongyoTUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce);
70177595Sweongyostatic	int malo_rxbuf = MALO_RXBUF;		/* # rx buffers to allocate */
71177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf,
72177595Sweongyo	    0, "rx buffers allocated");
73177595SweongyoTUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf);
74177595Sweongyostatic	int malo_rxquota = MALO_RXBUF;		/* # max buffers to process */
75177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota,
76177595Sweongyo	    0, "max rx buffers to process per interrupt");
77177595SweongyoTUNABLE_INT("hw.malo.rxquota", &malo_rxquota);
78177595Sweongyostatic	int malo_txbuf = MALO_TXBUF;		/* # tx buffers to allocate */
79177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf,
80177595Sweongyo	    0, "tx buffers allocated");
81177595SweongyoTUNABLE_INT("hw.malo.txbuf", &malo_txbuf);
82177595Sweongyo
83177595Sweongyo#ifdef MALO_DEBUG
84177595Sweongyostatic	int malo_debug = 0;
85177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug,
86177595Sweongyo	    0, "control debugging printfs");
87177595SweongyoTUNABLE_INT("hw.malo.debug", &malo_debug);
88177595Sweongyoenum {
89177595Sweongyo	MALO_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
90177595Sweongyo	MALO_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
91177595Sweongyo	MALO_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
92177595Sweongyo	MALO_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
93177595Sweongyo	MALO_DEBUG_RESET	= 0x00000010,	/* reset processing */
94177595Sweongyo	MALO_DEBUG_INTR		= 0x00000040,	/* ISR */
95177595Sweongyo	MALO_DEBUG_TX_PROC	= 0x00000080,	/* tx ISR proc */
96177595Sweongyo	MALO_DEBUG_RX_PROC	= 0x00000100,	/* rx ISR proc */
97177595Sweongyo	MALO_DEBUG_STATE	= 0x00000400,	/* 802.11 state transitions */
98177595Sweongyo	MALO_DEBUG_NODE		= 0x00000800,	/* node management */
99177595Sweongyo	MALO_DEBUG_RECV_ALL	= 0x00001000,	/* trace all frames (beacons) */
100177595Sweongyo	MALO_DEBUG_FW		= 0x00008000,	/* firmware */
101177595Sweongyo	MALO_DEBUG_ANY		= 0xffffffff
102177595Sweongyo};
103177595Sweongyo#define	IS_BEACON(wh)							\
104177595Sweongyo	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK |			\
105177595Sweongyo		IEEE80211_FC0_SUBTYPE_MASK)) ==				\
106177595Sweongyo	 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
107177595Sweongyo#define	IFF_DUMPPKTS_RECV(sc, wh)					\
108177595Sweongyo	(((sc->malo_debug & MALO_DEBUG_RECV) &&				\
109177595Sweongyo	  ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \
110177595Sweongyo	 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) ==		\
111177595Sweongyo	  (IFF_DEBUG|IFF_LINK2))
112177595Sweongyo#define	IFF_DUMPPKTS_XMIT(sc)						\
113177595Sweongyo	((sc->malo_debug & MALO_DEBUG_XMIT) ||				\
114177595Sweongyo	 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) ==		\
115177595Sweongyo	     (IFF_DEBUG | IFF_LINK2))
116177595Sweongyo#define	DPRINTF(sc, m, fmt, ...) do {				\
117177595Sweongyo	if (sc->malo_debug & (m))				\
118177595Sweongyo		printf(fmt, __VA_ARGS__);			\
119177595Sweongyo} while (0)
120177595Sweongyo#else
121177595Sweongyo#define	DPRINTF(sc, m, fmt, ...) do {				\
122177595Sweongyo	(void) sc;						\
123177595Sweongyo} while (0)
124177595Sweongyo#endif
125177595Sweongyo
126177595SweongyoMALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
127177595Sweongyo
128178354Ssamstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *ic,
129178354Ssam	const char name[IFNAMSIZ], int unit, int opmode, int flags,
130178354Ssam	const uint8_t bssid[IEEE80211_ADDR_LEN],
131178354Ssam	const uint8_t mac[IEEE80211_ADDR_LEN]);
132178354Ssamstatic  void	malo_vap_delete(struct ieee80211vap *);
133177595Sweongyostatic	int	malo_dma_setup(struct malo_softc *);
134177595Sweongyostatic	int	malo_setup_hwdma(struct malo_softc *);
135177595Sweongyostatic	void	malo_txq_init(struct malo_softc *, struct malo_txq *, int);
136177595Sweongyostatic	void	malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
137177595Sweongyostatic	void	malo_start(struct ifnet *);
138177595Sweongyostatic	void	malo_watchdog(struct ifnet *);
139177595Sweongyostatic	int	malo_ioctl(struct ifnet *, u_long, caddr_t);
140177595Sweongyostatic	void	malo_updateslot(struct ifnet *);
141178354Ssamstatic	int	malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
142177595Sweongyostatic	void	malo_scan_start(struct ieee80211com *);
143177595Sweongyostatic	void	malo_scan_end(struct ieee80211com *);
144177595Sweongyostatic	void	malo_set_channel(struct ieee80211com *);
145177595Sweongyostatic	int	malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
146177595Sweongyo		    const struct ieee80211_bpf_params *);
147177595Sweongyostatic	void	malo_bpfattach(struct malo_softc *);
148177595Sweongyostatic	void	malo_sysctlattach(struct malo_softc *);
149177595Sweongyostatic	void	malo_announce(struct malo_softc *);
150177595Sweongyostatic	void	malo_dma_cleanup(struct malo_softc *);
151177595Sweongyostatic	void	malo_stop_locked(struct ifnet *, int);
152177595Sweongyostatic	int	malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
153177595Sweongyostatic	int	malo_mode_init(struct malo_softc *);
154177595Sweongyostatic	void	malo_tx_proc(void *, int);
155177595Sweongyostatic	void	malo_rx_proc(void *, int);
156177595Sweongyostatic	void	malo_init(void *);
157177595Sweongyo
158177595Sweongyo/*
159177595Sweongyo * Read/Write shorthands for accesses to BAR 0.  Note that all BAR 1
160177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at
161177595Sweongyo * malo_attach and there should be no reference to them here.
162177595Sweongyo */
163177595Sweongyostatic uint32_t
164177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off)
165177595Sweongyo{
166177595Sweongyo	return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
167177595Sweongyo}
168177595Sweongyo
169177595Sweongyostatic void
170177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
171177595Sweongyo{
172178354Ssam	DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%zx val 0x%x\n",
173177595Sweongyo	    __func__, off, val);
174177595Sweongyo
175177595Sweongyo	bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
176177595Sweongyo}
177177595Sweongyo
178177595Sweongyostatic uint8_t
179177595Sweongyomalo_bar1_read1(struct malo_softc *sc, bus_size_t off)
180177595Sweongyo{
181177595Sweongyo	return bus_space_read_1(sc->malo_io1t, sc->malo_io1h, off);
182177595Sweongyo}
183177595Sweongyo
184177595Sweongyoint
185177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc)
186177595Sweongyo{
187178354Ssam	int error;
188178354Ssam	struct ieee80211com *ic;
189177595Sweongyo	struct ifnet *ifp;
190177595Sweongyo	struct malo_hal *mh;
191177595Sweongyo	uint8_t bands;
192177595Sweongyo
193178354Ssam	ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211);
194177595Sweongyo	if (ifp == NULL) {
195177595Sweongyo		device_printf(sc->malo_dev, "can not if_alloc()\n");
196177595Sweongyo		return ENOSPC;
197177595Sweongyo	}
198178354Ssam	ic = ifp->if_l2com;
199177595Sweongyo
200177595Sweongyo	MALO_LOCK_INIT(sc);
201177595Sweongyo
202177595Sweongyo	/* set these up early for if_printf use */
203177595Sweongyo	if_initname(ifp, device_get_name(sc->malo_dev),
204177595Sweongyo	    device_get_unit(sc->malo_dev));
205177595Sweongyo
206177595Sweongyo	/*
207177595Sweongyo	 * NB: get mac address from hardware directly here before we set DMAs
208177595Sweongyo	 * for HAL because we don't want to disturb operations of HAL at BAR 1.
209177595Sweongyo	 */
210177595Sweongyo	for (i = 0; i < IEEE80211_ADDR_LEN; i++) {
211177595Sweongyo		/* XXX remove a magic number but we don't have documents.  */
212177595Sweongyo		ic->ic_myaddr[i] = malo_bar1_read1(sc, 0xa528 + i);
213177595Sweongyo		DELAY(1000);
214177595Sweongyo	}
215177595Sweongyo
216177595Sweongyo	mh = malo_hal_attach(sc->malo_dev, devid,
217177595Sweongyo	    sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
218177595Sweongyo	if (mh == NULL) {
219177595Sweongyo		if_printf(ifp, "unable to attach HAL\n");
220177595Sweongyo		error = EIO;
221177595Sweongyo		goto bad;
222177595Sweongyo	}
223177595Sweongyo	sc->malo_mh = mh;
224177595Sweongyo
225178354Ssam	/*
226178354Ssam	 * Load firmware so we can get setup.  We arbitrarily pick station
227178354Ssam	 * firmware; we'll re-load firmware as needed so setting up
228178354Ssam	 * the wrong mode isn't a big deal.
229178354Ssam	 */
230178354Ssam	error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
231178354Ssam	if (error != 0) {
232178354Ssam		if_printf(ifp, "unable to setup firmware\n");
233178354Ssam		goto bad1;
234178354Ssam	}
235178354Ssam	/* XXX gethwspecs() extracts correct informations?  not maybe!  */
236178354Ssam	error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
237178354Ssam	if (error != 0) {
238178354Ssam		if_printf(ifp, "unable to fetch h/w specs\n");
239178354Ssam		goto bad1;
240178354Ssam	}
241178354Ssam
242178354Ssam	DPRINTF(sc, MALO_DEBUG_FW,
243178354Ssam	    "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
244178354Ssam	    "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
245178354Ssam	    "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
246178354Ssam	    "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
247178354Ssam	    "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
248178354Ssam	    sc->malo_hwspecs.hwversion,
249178354Ssam	    sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
250178354Ssam	    sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
251178354Ssam	    sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
252178354Ssam	    sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
253178354Ssam	    sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
254178354Ssam	    sc->malo_hwspecs.ul_fw_awakecookie,
255178354Ssam	    sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
256178354Ssam	    sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
257178354Ssam
258178354Ssam	/* NB: firmware looks that it does not export regdomain info API.  */
259178354Ssam	bands = 0;
260178354Ssam	setbit(&bands, IEEE80211_MODE_11B);
261178354Ssam	setbit(&bands, IEEE80211_MODE_11G);
262178354Ssam	ieee80211_init_channels(ic, NULL, &bands);
263178354Ssam
264177595Sweongyo	sc->malo_txantenna = 0x2;	/* h/w default */
265177595Sweongyo	sc->malo_rxantenna = 0xffff;	/* h/w default */
266177595Sweongyo
267177595Sweongyo	/*
268177595Sweongyo	 * Allocate tx + rx descriptors and populate the lists.
269177595Sweongyo	 * We immediately push the information to the firmware
270177595Sweongyo	 * as otherwise it gets upset.
271177595Sweongyo	 */
272177595Sweongyo	error = malo_dma_setup(sc);
273177595Sweongyo	if (error != 0) {
274177595Sweongyo		if_printf(ifp, "failed to setup descriptors: %d\n", error);
275177595Sweongyo		goto bad1;
276177595Sweongyo	}
277178354Ssam	error = malo_setup_hwdma(sc);	/* push to firmware */
278178354Ssam	if (error != 0)			/* NB: malo_setupdma prints msg */
279178354Ssam		goto bad1;
280177595Sweongyo
281177595Sweongyo	sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
282177595Sweongyo		taskqueue_thread_enqueue, &sc->malo_tq);
283177595Sweongyo	taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
284177595Sweongyo		"%s taskq", ifp->if_xname);
285177595Sweongyo
286177595Sweongyo	TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
287177595Sweongyo	TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
288177595Sweongyo
289177595Sweongyo	ifp->if_softc = sc;
290177595Sweongyo	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
291177595Sweongyo	ifp->if_start = malo_start;
292177595Sweongyo	ifp->if_watchdog = malo_watchdog;
293177595Sweongyo	ifp->if_ioctl = malo_ioctl;
294177595Sweongyo	ifp->if_init = malo_init;
295177595Sweongyo	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
296177595Sweongyo	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
297177595Sweongyo	IFQ_SET_READY(&ifp->if_snd);
298177595Sweongyo
299177595Sweongyo	ic->ic_ifp = ifp;
300177595Sweongyo	/* XXX not right but it's not used anywhere important */
301177595Sweongyo	ic->ic_phytype = IEEE80211_T_OFDM;
302177595Sweongyo	ic->ic_opmode = IEEE80211_M_STA;
303177595Sweongyo	ic->ic_caps =
304177595Sweongyo	      IEEE80211_C_BGSCAN		/* capable of bg scanning */
305177595Sweongyo	    | IEEE80211_C_MONITOR		/* monitor mode */
306177595Sweongyo	    | IEEE80211_C_SHPREAMBLE		/* short preamble supported */
307177595Sweongyo	    | IEEE80211_C_SHSLOT		/* short slot time supported */
308177595Sweongyo	    | IEEE80211_C_TXPMGT		/* capable of txpow mgt */
309177595Sweongyo	    | IEEE80211_C_WPA			/* capable of WPA1+WPA2 */
310177595Sweongyo	    ;
311177595Sweongyo
312177595Sweongyo	/*
313177595Sweongyo	 * Transmit requires space in the packet for a special format transmit
314177595Sweongyo	 * record and optional padding between this record and the payload.
315177595Sweongyo	 * Ask the net80211 layer to arrange this when encapsulating
316177595Sweongyo	 * packets so we can add it efficiently.
317177595Sweongyo	 */
318177595Sweongyo	ic->ic_headroom = sizeof(struct malo_txrec) -
319178354Ssam		sizeof(struct ieee80211_frame);
320177595Sweongyo
321178354Ssam	/* get mac address from hardware */
322178354Ssam	IEEE80211_ADDR_COPY(ic->ic_myaddr, sc->malo_hwspecs.macaddr);
323178354Ssam
324177595Sweongyo	/* call MI attach routine. */
325177595Sweongyo	ieee80211_ifattach(ic);
326177595Sweongyo	/* override default methods */
327178354Ssam	ic->ic_vap_create = malo_vap_create;
328178354Ssam	ic->ic_vap_delete = malo_vap_delete;
329178354Ssam	ic->ic_raw_xmit = malo_raw_xmit;
330177595Sweongyo	ic->ic_updateslot = malo_updateslot;
331177595Sweongyo
332177595Sweongyo	ic->ic_scan_start = malo_scan_start;
333177595Sweongyo	ic->ic_scan_end = malo_scan_end;
334177595Sweongyo	ic->ic_set_channel = malo_set_channel;
335177595Sweongyo
336177595Sweongyo	sc->malo_invalid = 0;		/* ready to go, enable int handling */
337177595Sweongyo
338177595Sweongyo	malo_bpfattach(sc);
339177595Sweongyo
340177595Sweongyo	/*
341177595Sweongyo	 * Setup dynamic sysctl's.
342177595Sweongyo	 */
343177595Sweongyo	malo_sysctlattach(sc);
344177595Sweongyo
345177595Sweongyo	if (bootverbose)
346177595Sweongyo		ieee80211_announce(ic);
347178354Ssam	malo_announce(sc);
348177595Sweongyo
349177595Sweongyo	return 0;
350177595Sweongyobad1:
351177595Sweongyo	malo_hal_detach(mh);
352177595Sweongyobad:
353177595Sweongyo	if_free(ifp);
354177595Sweongyo	sc->malo_invalid = 1;
355177595Sweongyo
356177595Sweongyo	return error;
357177595Sweongyo}
358177595Sweongyo
359178354Ssamstatic struct ieee80211vap *
360178354Ssammalo_vap_create(struct ieee80211com *ic,
361178354Ssam	const char name[IFNAMSIZ], int unit, int opmode, int flags,
362178354Ssam	const uint8_t bssid[IEEE80211_ADDR_LEN],
363178354Ssam	const uint8_t mac[IEEE80211_ADDR_LEN])
364178354Ssam{
365178354Ssam	struct ifnet *ifp = ic->ic_ifp;
366178354Ssam	struct malo_vap *mvp;
367178354Ssam	struct ieee80211vap *vap;
368178354Ssam
369178354Ssam	if (!TAILQ_EMPTY(&ic->ic_vaps)) {
370178354Ssam		if_printf(ifp, "multiple vaps not supported\n");
371178354Ssam		return NULL;
372178354Ssam	}
373178354Ssam	switch (opmode) {
374178354Ssam	case IEEE80211_M_STA:
375178354Ssam		if (opmode == IEEE80211_M_STA)
376178354Ssam			flags |= IEEE80211_CLONE_NOBEACONS;
377178354Ssam		/* fall thru... */
378178354Ssam	case IEEE80211_M_MONITOR:
379178354Ssam		break;
380178354Ssam	default:
381178354Ssam		if_printf(ifp, "%s mode not supported\n",
382178354Ssam		    ieee80211_opmode_name[opmode]);
383178354Ssam		return NULL;		/* unsupported */
384178354Ssam	}
385178354Ssam	mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap),
386178354Ssam	    M_80211_VAP, M_NOWAIT | M_ZERO);
387178354Ssam	if (mvp == NULL) {
388178354Ssam		if_printf(ifp, "cannot allocate vap state block\n");
389178354Ssam		return NULL;
390178354Ssam	}
391178354Ssam	vap = &mvp->malo_vap;
392178354Ssam	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
393178354Ssam
394178354Ssam	/* override state transition machine */
395178354Ssam	mvp->malo_newstate = vap->iv_newstate;
396178354Ssam	vap->iv_newstate = malo_newstate;
397178354Ssam
398178354Ssam	/* complete setup */
399178354Ssam	ieee80211_vap_attach(vap,
400178354Ssam	    ieee80211_media_change, ieee80211_media_status);
401178354Ssam	ic->ic_opmode = opmode;
402178354Ssam	return vap;
403178354Ssam}
404178354Ssam
405178354Ssamstatic void
406178354Ssammalo_vap_delete(struct ieee80211vap *vap)
407178354Ssam{
408178354Ssam	struct malo_vap *mvp = MALO_VAP(vap);
409178354Ssam
410178354Ssam	ieee80211_vap_detach(vap);
411178354Ssam	free(mvp, M_80211_VAP);
412178354Ssam}
413178354Ssam
414177595Sweongyoint
415177595Sweongyomalo_intr(void *arg)
416177595Sweongyo{
417177595Sweongyo	struct malo_softc *sc = arg;
418177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
419177595Sweongyo	uint32_t status;
420177595Sweongyo
421177595Sweongyo	if (sc->malo_invalid) {
422177595Sweongyo		/*
423177595Sweongyo		 * The hardware is not ready/present, don't touch anything.
424177595Sweongyo		 * Note this can happen early on if the IRQ is shared.
425177595Sweongyo		 */
426177595Sweongyo		DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
427177595Sweongyo		return (FILTER_STRAY);
428177595Sweongyo	}
429177595Sweongyo
430177595Sweongyo	/*
431177595Sweongyo	 * Figure out the reason(s) for the interrupt.
432177595Sweongyo	 */
433177595Sweongyo	malo_hal_getisr(mh, &status);		/* NB: clears ISR too */
434177595Sweongyo	if (status == 0)			/* must be a shared irq */
435177595Sweongyo		return (FILTER_STRAY);
436177595Sweongyo
437177595Sweongyo	DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
438177595Sweongyo	    __func__, status, sc->malo_imask);
439177595Sweongyo
440177595Sweongyo	if (status & MALO_A2HRIC_BIT_RX_RDY)
441177595Sweongyo		taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask);
442177595Sweongyo	if (status & MALO_A2HRIC_BIT_TX_DONE)
443177595Sweongyo		taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask);
444177595Sweongyo	if (status & MALO_A2HRIC_BIT_OPC_DONE)
445177595Sweongyo		malo_hal_cmddone(mh);
446177595Sweongyo	if (status & MALO_A2HRIC_BIT_MAC_EVENT)
447177595Sweongyo		;
448177595Sweongyo	if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
449177595Sweongyo		;
450177595Sweongyo	if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
451177595Sweongyo		/* TKIP ICV error */
452177595Sweongyo		sc->malo_stats.mst_rx_badtkipicv++;
453177595Sweongyo	}
454177595Sweongyo#ifdef MALO_DEBUG
455177595Sweongyo	if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
456177595Sweongyo		DPRINTF(sc, MALO_DEBUG_INTR,
457177595Sweongyo		    "%s: can't handle interrupt status 0x%x\n",
458177595Sweongyo		    __func__, status);
459177595Sweongyo#endif
460177595Sweongyo	return (FILTER_HANDLED);
461177595Sweongyo}
462177595Sweongyo
463177595Sweongyostatic void
464177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
465177595Sweongyo{
466177595Sweongyo	bus_addr_t *paddr = (bus_addr_t*) arg;
467177595Sweongyo
468177595Sweongyo	KASSERT(error == 0, ("error %u on bus_dma callback", error));
469177595Sweongyo
470177595Sweongyo	*paddr = segs->ds_addr;
471177595Sweongyo}
472177595Sweongyo
473177595Sweongyostatic int
474177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name,
475177595Sweongyo    struct malo_descdma *dd,
476177595Sweongyo    int nbuf, size_t bufsize, int ndesc, size_t descsize)
477177595Sweongyo{
478177595Sweongyo	int error;
479177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
480177595Sweongyo	uint8_t *ds;
481177595Sweongyo
482177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET,
483177595Sweongyo	    "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
484177595Sweongyo	    __func__, name, nbuf, (uintmax_t) bufsize,
485177595Sweongyo	    ndesc, (uintmax_t) descsize);
486177595Sweongyo
487177595Sweongyo	dd->dd_name = name;
488177595Sweongyo	dd->dd_desc_len = nbuf * ndesc * descsize;
489177595Sweongyo
490177595Sweongyo	/*
491177595Sweongyo	 * Setup DMA descriptor area.
492177595Sweongyo	 */
493177595Sweongyo	error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
494177595Sweongyo		       PAGE_SIZE, 0,		/* alignment, bounds */
495177595Sweongyo		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
496177595Sweongyo		       BUS_SPACE_MAXADDR,	/* highaddr */
497177595Sweongyo		       NULL, NULL,		/* filter, filterarg */
498177595Sweongyo		       dd->dd_desc_len,		/* maxsize */
499177595Sweongyo		       1,			/* nsegments */
500177595Sweongyo		       dd->dd_desc_len,		/* maxsegsize */
501177595Sweongyo		       BUS_DMA_ALLOCNOW,	/* flags */
502177595Sweongyo		       NULL,			/* lockfunc */
503177595Sweongyo		       NULL,			/* lockarg */
504177595Sweongyo		       &dd->dd_dmat);
505177595Sweongyo	if (error != 0) {
506177595Sweongyo		if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
507177595Sweongyo		return error;
508177595Sweongyo	}
509177595Sweongyo
510177595Sweongyo	/* allocate descriptors */
511177595Sweongyo	error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
512177595Sweongyo	if (error != 0) {
513177595Sweongyo		if_printf(ifp, "unable to create dmamap for %s descriptors, "
514177595Sweongyo		    "error %u\n", dd->dd_name, error);
515177595Sweongyo		goto fail0;
516177595Sweongyo	}
517177595Sweongyo
518177595Sweongyo	error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
519177595Sweongyo	    BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
520177595Sweongyo	if (error != 0) {
521177595Sweongyo		if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
522177595Sweongyo		    "error %u\n", nbuf * ndesc, dd->dd_name, error);
523177595Sweongyo		goto fail1;
524177595Sweongyo	}
525177595Sweongyo
526177595Sweongyo	error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
527177595Sweongyo	    dd->dd_desc, dd->dd_desc_len,
528177595Sweongyo	    malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
529177595Sweongyo	if (error != 0) {
530177595Sweongyo		if_printf(ifp, "unable to map %s descriptors, error %u\n",
531177595Sweongyo		    dd->dd_name, error);
532177595Sweongyo		goto fail2;
533177595Sweongyo	}
534177595Sweongyo
535177595Sweongyo	ds = dd->dd_desc;
536177595Sweongyo	memset(ds, 0, dd->dd_desc_len);
537177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
538177595Sweongyo	    __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
539177595Sweongyo	    (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
540177595Sweongyo
541177595Sweongyo	return 0;
542177595Sweongyofail2:
543177595Sweongyo	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
544177595Sweongyofail1:
545177595Sweongyo	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
546177595Sweongyofail0:
547177595Sweongyo	bus_dma_tag_destroy(dd->dd_dmat);
548177595Sweongyo	memset(dd, 0, sizeof(*dd));
549177595Sweongyo	return error;
550177595Sweongyo}
551177595Sweongyo
552177595Sweongyo#define	DS2PHYS(_dd, _ds) \
553177595Sweongyo	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
554177595Sweongyo
555177595Sweongyostatic int
556177595Sweongyomalo_rxdma_setup(struct malo_softc *sc)
557177595Sweongyo{
558177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
559177595Sweongyo	int error, bsize, i;
560177595Sweongyo	struct malo_rxbuf *bf;
561177595Sweongyo	struct malo_rxdesc *ds;
562177595Sweongyo
563177595Sweongyo	error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
564177595Sweongyo	    malo_rxbuf, sizeof(struct malo_rxbuf),
565177595Sweongyo	    1, sizeof(struct malo_rxdesc));
566177595Sweongyo	if (error != 0)
567177595Sweongyo		return error;
568177595Sweongyo
569177595Sweongyo	/*
570177595Sweongyo	 * Allocate rx buffers and set them up.
571177595Sweongyo	 */
572177595Sweongyo	bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
573177595Sweongyo	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
574177595Sweongyo	if (bf == NULL) {
575177595Sweongyo		if_printf(ifp, "malloc of %u rx buffers failed\n", bsize);
576177595Sweongyo		return error;
577177595Sweongyo	}
578177595Sweongyo	sc->malo_rxdma.dd_bufptr = bf;
579177595Sweongyo
580177595Sweongyo	STAILQ_INIT(&sc->malo_rxbuf);
581177595Sweongyo	ds = sc->malo_rxdma.dd_desc;
582177595Sweongyo	for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
583177595Sweongyo		bf->bf_desc = ds;
584177595Sweongyo		bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
585177595Sweongyo		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
586177595Sweongyo		    &bf->bf_dmamap);
587177595Sweongyo		if (error != 0) {
588177595Sweongyo			if_printf(ifp, "%s: unable to dmamap for rx buffer, "
589177595Sweongyo			    "error %d\n", __func__, error);
590177595Sweongyo			return error;
591177595Sweongyo		}
592177595Sweongyo		/* NB: tail is intentional to preserve descriptor order */
593177595Sweongyo		STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
594177595Sweongyo	}
595177595Sweongyo	return 0;
596177595Sweongyo}
597177595Sweongyo
598177595Sweongyostatic int
599177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
600177595Sweongyo{
601177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
602177595Sweongyo	int error, bsize, i;
603177595Sweongyo	struct malo_txbuf *bf;
604177595Sweongyo	struct malo_txdesc *ds;
605177595Sweongyo
606177595Sweongyo	error = malo_desc_setup(sc, "tx", &txq->dma,
607177595Sweongyo	    malo_txbuf, sizeof(struct malo_txbuf),
608177595Sweongyo	    MALO_TXDESC, sizeof(struct malo_txdesc));
609177595Sweongyo	if (error != 0)
610177595Sweongyo		return error;
611177595Sweongyo
612177595Sweongyo	/* allocate and setup tx buffers */
613177595Sweongyo	bsize = malo_txbuf * sizeof(struct malo_txbuf);
614177595Sweongyo	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
615177595Sweongyo	if (bf == NULL) {
616177595Sweongyo		if_printf(ifp, "malloc of %u tx buffers failed\n",
617177595Sweongyo		    malo_txbuf);
618177595Sweongyo		return ENOMEM;
619177595Sweongyo	}
620177595Sweongyo	txq->dma.dd_bufptr = bf;
621177595Sweongyo
622177595Sweongyo	STAILQ_INIT(&txq->free);
623177595Sweongyo	txq->nfree = 0;
624177595Sweongyo	ds = txq->dma.dd_desc;
625177595Sweongyo	for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
626177595Sweongyo		bf->bf_desc = ds;
627177595Sweongyo		bf->bf_daddr = DS2PHYS(&txq->dma, ds);
628177595Sweongyo		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
629177595Sweongyo		    &bf->bf_dmamap);
630177595Sweongyo		if (error != 0) {
631177595Sweongyo			if_printf(ifp, "unable to create dmamap for tx "
632177595Sweongyo			    "buffer %u, error %u\n", i, error);
633177595Sweongyo			return error;
634177595Sweongyo		}
635177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
636177595Sweongyo		txq->nfree++;
637177595Sweongyo	}
638177595Sweongyo
639177595Sweongyo	return 0;
640177595Sweongyo}
641177595Sweongyo
642177595Sweongyostatic void
643177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
644177595Sweongyo{
645177595Sweongyo	bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
646177595Sweongyo	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
647177595Sweongyo	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
648177595Sweongyo	bus_dma_tag_destroy(dd->dd_dmat);
649177595Sweongyo
650177595Sweongyo	memset(dd, 0, sizeof(*dd));
651177595Sweongyo}
652177595Sweongyo
653177595Sweongyostatic void
654177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc)
655177595Sweongyo{
656177595Sweongyo	struct malo_rxbuf *bf;
657177595Sweongyo
658177595Sweongyo	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
659177595Sweongyo		if (bf->bf_m != NULL) {
660177595Sweongyo			m_freem(bf->bf_m);
661177595Sweongyo			bf->bf_m = NULL;
662177595Sweongyo		}
663177595Sweongyo		if (bf->bf_dmamap != NULL) {
664177595Sweongyo			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
665177595Sweongyo			bf->bf_dmamap = NULL;
666177595Sweongyo		}
667177595Sweongyo	}
668177595Sweongyo	STAILQ_INIT(&sc->malo_rxbuf);
669177595Sweongyo	if (sc->malo_rxdma.dd_bufptr != NULL) {
670177595Sweongyo		free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
671177595Sweongyo		sc->malo_rxdma.dd_bufptr = NULL;
672177595Sweongyo	}
673177595Sweongyo	if (sc->malo_rxdma.dd_desc_len != 0)
674177595Sweongyo		malo_desc_cleanup(sc, &sc->malo_rxdma);
675177595Sweongyo}
676177595Sweongyo
677177595Sweongyostatic void
678177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
679177595Sweongyo{
680177595Sweongyo	struct malo_txbuf *bf;
681177595Sweongyo	struct ieee80211_node *ni;
682177595Sweongyo
683177595Sweongyo	STAILQ_FOREACH(bf, &txq->free, bf_list) {
684177595Sweongyo		if (bf->bf_m != NULL) {
685177595Sweongyo			m_freem(bf->bf_m);
686177595Sweongyo			bf->bf_m = NULL;
687177595Sweongyo		}
688177595Sweongyo		ni = bf->bf_node;
689177595Sweongyo		bf->bf_node = NULL;
690177595Sweongyo		if (ni != NULL) {
691177595Sweongyo			/*
692177595Sweongyo			 * Reclaim node reference.
693177595Sweongyo			 */
694177595Sweongyo			ieee80211_free_node(ni);
695177595Sweongyo		}
696177595Sweongyo		if (bf->bf_dmamap != NULL) {
697177595Sweongyo			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
698177595Sweongyo			bf->bf_dmamap = NULL;
699177595Sweongyo		}
700177595Sweongyo	}
701177595Sweongyo	STAILQ_INIT(&txq->free);
702177595Sweongyo	txq->nfree = 0;
703177595Sweongyo	if (txq->dma.dd_bufptr != NULL) {
704177595Sweongyo		free(txq->dma.dd_bufptr, M_MALODEV);
705177595Sweongyo		txq->dma.dd_bufptr = NULL;
706177595Sweongyo	}
707177595Sweongyo	if (txq->dma.dd_desc_len != 0)
708177595Sweongyo		malo_desc_cleanup(sc, &txq->dma);
709177595Sweongyo}
710177595Sweongyo
711177595Sweongyostatic void
712177595Sweongyomalo_dma_cleanup(struct malo_softc *sc)
713177595Sweongyo{
714177595Sweongyo	int i;
715177595Sweongyo
716177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
717177595Sweongyo		malo_txdma_cleanup(sc, &sc->malo_txq[i]);
718177595Sweongyo
719177595Sweongyo	malo_rxdma_cleanup(sc);
720177595Sweongyo}
721177595Sweongyo
722177595Sweongyostatic int
723177595Sweongyomalo_dma_setup(struct malo_softc *sc)
724177595Sweongyo{
725177595Sweongyo	int error, i;
726177595Sweongyo
727177595Sweongyo	/* rxdma initializing.  */
728177595Sweongyo	error = malo_rxdma_setup(sc);
729177595Sweongyo	if (error != 0)
730177595Sweongyo		return error;
731177595Sweongyo
732177595Sweongyo	/* NB: we just have 1 tx queue now.  */
733177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
734177595Sweongyo		error = malo_txdma_setup(sc, &sc->malo_txq[i]);
735177595Sweongyo		if (error != 0) {
736177595Sweongyo			malo_dma_cleanup(sc);
737177595Sweongyo
738177595Sweongyo			return error;
739177595Sweongyo		}
740177595Sweongyo
741177595Sweongyo		malo_txq_init(sc, &sc->malo_txq[i], i);
742177595Sweongyo	}
743177595Sweongyo
744177595Sweongyo	return 0;
745177595Sweongyo}
746177595Sweongyo
747177595Sweongyostatic void
748177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc)
749177595Sweongyo{
750177595Sweongyo	int i;
751177595Sweongyo
752177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
753177595Sweongyo	    sc->malo_hwdma.rxdesc_read);
754177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
755177595Sweongyo	    sc->malo_hwdma.rxdesc_read);
756177595Sweongyo
757177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
758177595Sweongyo		malo_bar0_write4(sc,
759177595Sweongyo		    sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
760177595Sweongyo	}
761177595Sweongyo}
762177595Sweongyo
763177595Sweongyo/*
764177595Sweongyo * Inform firmware of our tx/rx dma setup.  The BAR 0 writes below are
765177595Sweongyo * for compatibility with older firmware.  For current firmware we send
766177595Sweongyo * this information with a cmd block via malo_hal_sethwdma.
767177595Sweongyo */
768177595Sweongyostatic int
769177595Sweongyomalo_setup_hwdma(struct malo_softc *sc)
770177595Sweongyo{
771177595Sweongyo	int i;
772177595Sweongyo	struct malo_txq *txq;
773177595Sweongyo
774177595Sweongyo	sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
775177595Sweongyo
776177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
777177595Sweongyo		txq = &sc->malo_txq[i];
778177595Sweongyo		sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
779177595Sweongyo	}
780177595Sweongyo	sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
781177595Sweongyo	sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
782177595Sweongyo
783177595Sweongyo	malo_hal_set_rxtxdma(sc);
784177595Sweongyo
785177595Sweongyo	return 0;
786177595Sweongyo}
787177595Sweongyo
788177595Sweongyostatic void
789177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
790177595Sweongyo{
791177595Sweongyo	struct malo_txbuf *bf, *bn;
792177595Sweongyo	struct malo_txdesc *ds;
793177595Sweongyo
794177595Sweongyo	MALO_TXQ_LOCK_INIT(sc, txq);
795177595Sweongyo	txq->qnum = qnum;
796177595Sweongyo	txq->txpri = 0;	/* XXX */
797177595Sweongyo
798177595Sweongyo	STAILQ_FOREACH(bf, &txq->free, bf_list) {
799177595Sweongyo		bf->bf_txq = txq;
800177595Sweongyo
801177595Sweongyo		ds = bf->bf_desc;
802177595Sweongyo		bn = STAILQ_NEXT(bf, bf_list);
803177595Sweongyo		if (bn == NULL)
804177595Sweongyo			bn = STAILQ_FIRST(&txq->free);
805177595Sweongyo		ds->physnext = htole32(bn->bf_daddr);
806177595Sweongyo	}
807177595Sweongyo	STAILQ_INIT(&txq->active);
808177595Sweongyo}
809177595Sweongyo
810177595Sweongyo/*
811177595Sweongyo * Reclaim resources for a setup queue.
812177595Sweongyo */
813177595Sweongyostatic void
814177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
815177595Sweongyo{
816177595Sweongyo	/* XXX hal work? */
817177595Sweongyo	MALO_TXQ_LOCK_DESTROY(txq);
818177595Sweongyo}
819177595Sweongyo
820177595Sweongyo/*
821177595Sweongyo * Allocate a tx buffer for sending a frame.
822177595Sweongyo */
823177595Sweongyostatic struct malo_txbuf *
824177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
825177595Sweongyo{
826177595Sweongyo	struct malo_txbuf *bf;
827177595Sweongyo
828177595Sweongyo	MALO_TXQ_LOCK(txq);
829177595Sweongyo	bf = STAILQ_FIRST(&txq->free);
830177595Sweongyo	if (bf != NULL) {
831177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->free, bf_list);
832177595Sweongyo		txq->nfree--;
833177595Sweongyo	}
834177595Sweongyo	MALO_TXQ_UNLOCK(txq);
835177595Sweongyo	if (bf == NULL) {
836177595Sweongyo		DPRINTF(sc, MALO_DEBUG_XMIT,
837177595Sweongyo		    "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
838177595Sweongyo		sc->malo_stats.mst_tx_qstop++;
839177595Sweongyo	}
840177595Sweongyo	return bf;
841177595Sweongyo}
842177595Sweongyo
843177595Sweongyostatic int
844177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
845177595Sweongyo{
846177595Sweongyo	struct mbuf *m;
847177595Sweongyo	int error;
848177595Sweongyo
849177595Sweongyo	/*
850177595Sweongyo	 * Load the DMA map so any coalescing is done.  This also calculates
851177595Sweongyo	 * the number of descriptors we need.
852177595Sweongyo	 */
853177595Sweongyo	error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
854177595Sweongyo				     bf->bf_segs, &bf->bf_nseg,
855177595Sweongyo				     BUS_DMA_NOWAIT);
856177595Sweongyo	if (error == EFBIG) {
857177595Sweongyo		/* XXX packet requires too many descriptors */
858177595Sweongyo		bf->bf_nseg = MALO_TXDESC + 1;
859177595Sweongyo	} else if (error != 0) {
860177595Sweongyo		sc->malo_stats.mst_tx_busdma++;
861177595Sweongyo		m_freem(m0);
862177595Sweongyo		return error;
863177595Sweongyo	}
864177595Sweongyo	/*
865177595Sweongyo	 * Discard null packets and check for packets that require too many
866177595Sweongyo	 * TX descriptors.  We try to convert the latter to a cluster.
867177595Sweongyo	 */
868177595Sweongyo	if (error == EFBIG) {		/* too many desc's, linearize */
869177595Sweongyo		sc->malo_stats.mst_tx_linear++;
870177595Sweongyo		m = m_defrag(m0, M_DONTWAIT);
871177595Sweongyo		if (m == NULL) {
872177595Sweongyo			m_freem(m0);
873177595Sweongyo			sc->malo_stats.mst_tx_nombuf++;
874177595Sweongyo			return ENOMEM;
875177595Sweongyo		}
876177595Sweongyo		m0 = m;
877177595Sweongyo		error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
878177595Sweongyo					     bf->bf_segs, &bf->bf_nseg,
879177595Sweongyo					     BUS_DMA_NOWAIT);
880177595Sweongyo		if (error != 0) {
881177595Sweongyo			sc->malo_stats.mst_tx_busdma++;
882177595Sweongyo			m_freem(m0);
883177595Sweongyo			return error;
884177595Sweongyo		}
885177595Sweongyo		KASSERT(bf->bf_nseg <= MALO_TXDESC,
886177595Sweongyo		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
887177595Sweongyo	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
888177595Sweongyo		sc->malo_stats.mst_tx_nodata++;
889177595Sweongyo		m_freem(m0);
890177595Sweongyo		return EIO;
891177595Sweongyo	}
892177595Sweongyo	DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
893177595Sweongyo		__func__, m0, m0->m_pkthdr.len);
894177595Sweongyo	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
895177595Sweongyo	bf->bf_m = m0;
896177595Sweongyo
897177595Sweongyo	return 0;
898177595Sweongyo}
899177595Sweongyo
900177595Sweongyo#ifdef MALO_DEBUG
901177595Sweongyostatic void
902177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
903177595Sweongyo{
904177595Sweongyo	const struct malo_rxdesc *ds = bf->bf_desc;
905177595Sweongyo	uint32_t status = le32toh(ds->status);
906177595Sweongyo
907177595Sweongyo	printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n"
908177595Sweongyo	    "      STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
909177595Sweongyo	    " RATE:%02x QOS:%04x\n",
910177595Sweongyo	    ix, ds, (const struct malo_desc *)bf->bf_daddr,
911177595Sweongyo	    le32toh(ds->physnext), le32toh(ds->physbuffdata),
912177595Sweongyo	    ds->rxcontrol,
913177595Sweongyo	    ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
914177595Sweongyo	        "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
915177595Sweongyo	    ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
916177595Sweongyo	    ds->rate, le16toh(ds->qosctrl));
917177595Sweongyo}
918177595Sweongyo
919177595Sweongyostatic void
920177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
921177595Sweongyo{
922177595Sweongyo	const struct malo_txdesc *ds = bf->bf_desc;
923177595Sweongyo	uint32_t status = le32toh(ds->status);
924177595Sweongyo
925177595Sweongyo	printf("Q%u[%3u]", qnum, ix);
926177595Sweongyo	printf(" (DS.V:%p DS.P:%p)\n",
927177595Sweongyo	    ds, (const struct malo_txdesc *)bf->bf_daddr);
928177595Sweongyo	printf("    NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
929177595Sweongyo	    le32toh(ds->physnext),
930177595Sweongyo	    le32toh(ds->pktptr), le16toh(ds->pktlen), status,
931177595Sweongyo	    status & MALO_TXD_STATUS_USED ?
932177595Sweongyo	    "" : (status & 3) != 0 ? " *" : " !");
933177595Sweongyo	printf("    RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
934177595Sweongyo	    ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
935177595Sweongyo	    le32toh(ds->sap_pktinfo), le16toh(ds->format));
936177595Sweongyo#if 0
937177595Sweongyo	{
938177595Sweongyo		const uint8_t *cp = (const uint8_t *) ds;
939177595Sweongyo		int i;
940177595Sweongyo		for (i = 0; i < sizeof(struct malo_txdesc); i++) {
941177595Sweongyo			printf("%02x ", cp[i]);
942177595Sweongyo			if (((i+1) % 16) == 0)
943177595Sweongyo				printf("\n");
944177595Sweongyo		}
945177595Sweongyo		printf("\n");
946177595Sweongyo	}
947177595Sweongyo#endif
948177595Sweongyo}
949177595Sweongyo#endif /* MALO_DEBUG */
950177595Sweongyo
951177595Sweongyostatic __inline void
952177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix)
953177595Sweongyo{
954177595Sweongyo#define	N(x)	(sizeof(x)/sizeof(x[0]))
955177595Sweongyo	static const int ieeerates[] =
956177595Sweongyo	    { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
957177595Sweongyo	if (rix < N(ieeerates))
958177595Sweongyo		ni->ni_txrate = ieeerates[rix];
959177595Sweongyo#undef N
960177595Sweongyo}
961177595Sweongyo
962177595Sweongyostatic int
963177595Sweongyomalo_fix2rate(int fix_rate)
964177595Sweongyo{
965177595Sweongyo#define	N(x)	(sizeof(x)/sizeof(x[0]))
966177595Sweongyo	static const int rates[] =
967177595Sweongyo	    { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
968177595Sweongyo	return (fix_rate < N(rates) ? rates[fix_rate] : 0);
969177595Sweongyo#undef N
970177595Sweongyo}
971177595Sweongyo
972177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
973177595Sweongyo#define	MS(v,x)			(((v) & x) >> x##_S)
974177595Sweongyo#define	SM(v,x)			(((v) << x##_S) & x)
975177595Sweongyo
976177595Sweongyo/*
977177595Sweongyo * Process completed xmit descriptors from the specified queue.
978177595Sweongyo */
979177595Sweongyostatic int
980177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
981177595Sweongyo{
982177595Sweongyo	struct malo_txbuf *bf;
983177595Sweongyo	struct malo_txdesc *ds;
984177595Sweongyo	struct ieee80211_node *ni;
985177595Sweongyo	int nreaped;
986177595Sweongyo	uint32_t status;
987177595Sweongyo
988177595Sweongyo	DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
989177595Sweongyo	    __func__, txq->qnum);
990177595Sweongyo	for (nreaped = 0;; nreaped++) {
991177595Sweongyo		MALO_TXQ_LOCK(txq);
992177595Sweongyo		bf = STAILQ_FIRST(&txq->active);
993177595Sweongyo		if (bf == NULL) {
994177595Sweongyo			MALO_TXQ_UNLOCK(txq);
995177595Sweongyo			break;
996177595Sweongyo		}
997177595Sweongyo		ds = bf->bf_desc;
998177595Sweongyo		MALO_TXDESC_SYNC(txq, ds,
999177595Sweongyo		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1000177595Sweongyo		if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
1001177595Sweongyo			MALO_TXQ_UNLOCK(txq);
1002177595Sweongyo			break;
1003177595Sweongyo		}
1004177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1005177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1006177595Sweongyo
1007177595Sweongyo#ifdef MALO_DEBUG
1008177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
1009177595Sweongyo			malo_printtxbuf(bf, txq->qnum, nreaped);
1010177595Sweongyo#endif
1011177595Sweongyo		ni = bf->bf_node;
1012177595Sweongyo		if (ni != NULL) {
1013177595Sweongyo			status = le32toh(ds->status);
1014177595Sweongyo			if (status & MALO_TXD_STATUS_OK) {
1015177595Sweongyo				uint16_t format = le16toh(ds->format);
1016177595Sweongyo				uint8_t txant = MS(format, MALO_TXD_ANTENNA);
1017177595Sweongyo
1018177595Sweongyo				sc->malo_stats.mst_ant_tx[txant]++;
1019177595Sweongyo				if (status & MALO_TXD_STATUS_OK_RETRY)
1020177595Sweongyo					sc->malo_stats.mst_tx_retries++;
1021177595Sweongyo				if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
1022177595Sweongyo					sc->malo_stats.mst_tx_mretries++;
1023177595Sweongyo				malo_updatetxrate(ni, ds->datarate);
1024177595Sweongyo				sc->malo_stats.mst_tx_rate = ds->datarate;
1025177595Sweongyo			} else {
1026177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
1027177595Sweongyo					sc->malo_stats.mst_tx_linkerror++;
1028177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_XRETRY)
1029177595Sweongyo					sc->malo_stats.mst_tx_xretries++;
1030177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_AGING)
1031177595Sweongyo					sc->malo_stats.mst_tx_aging++;
1032177595Sweongyo			}
1033177595Sweongyo			/*
1034177595Sweongyo			 * Do any tx complete callback.  Note this must
1035177595Sweongyo			 * be done before releasing the node reference.
1036177595Sweongyo			 * XXX no way to figure out if frame was ACK'd
1037177595Sweongyo			 */
1038177595Sweongyo			if (bf->bf_m->m_flags & M_TXCB) {
1039177595Sweongyo				/* XXX strip fw len in case header inspected */
1040177595Sweongyo				m_adj(bf->bf_m, sizeof(uint16_t));
1041177595Sweongyo				ieee80211_process_callback(ni, bf->bf_m,
1042177595Sweongyo					(status & MALO_TXD_STATUS_OK) == 0);
1043177595Sweongyo			}
1044177595Sweongyo			/*
1045177595Sweongyo			 * Reclaim reference to node.
1046177595Sweongyo			 *
1047177595Sweongyo			 * NB: the node may be reclaimed here if, for example
1048177595Sweongyo			 *     this is a DEAUTH message that was sent and the
1049177595Sweongyo			 *     node was timed out due to inactivity.
1050177595Sweongyo			 */
1051177595Sweongyo			ieee80211_free_node(ni);
1052177595Sweongyo		}
1053177595Sweongyo		ds->status = htole32(MALO_TXD_STATUS_IDLE);
1054177595Sweongyo		ds->pktlen = htole32(0);
1055177595Sweongyo
1056177595Sweongyo		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
1057177595Sweongyo		    BUS_DMASYNC_POSTWRITE);
1058177595Sweongyo		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1059177595Sweongyo		m_freem(bf->bf_m);
1060177595Sweongyo		bf->bf_m = NULL;
1061177595Sweongyo		bf->bf_node = NULL;
1062177595Sweongyo
1063177595Sweongyo		MALO_TXQ_LOCK(txq);
1064177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1065177595Sweongyo		txq->nfree++;
1066177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1067177595Sweongyo	}
1068177595Sweongyo	return nreaped;
1069177595Sweongyo}
1070177595Sweongyo
1071177595Sweongyo/*
1072177595Sweongyo * Deferred processing of transmit interrupt.
1073177595Sweongyo */
1074177595Sweongyostatic void
1075177595Sweongyomalo_tx_proc(void *arg, int npending)
1076177595Sweongyo{
1077177595Sweongyo	struct malo_softc *sc = arg;
1078177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1079177595Sweongyo	int i, nreaped;
1080177595Sweongyo
1081177595Sweongyo	/*
1082177595Sweongyo	 * Process each active queue.
1083177595Sweongyo	 */
1084177595Sweongyo	nreaped = 0;
1085177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1086177595Sweongyo		if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1087177595Sweongyo			nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1088177595Sweongyo	}
1089177595Sweongyo
1090177595Sweongyo	if (nreaped != 0) {
1091177595Sweongyo		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1092177595Sweongyo		ifp->if_timer = 0;
1093177595Sweongyo		malo_start(ifp);
1094177595Sweongyo	}
1095177595Sweongyo}
1096177595Sweongyo
1097177595Sweongyostatic int
1098177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1099177595Sweongyo    struct malo_txbuf *bf, struct mbuf *m0)
1100177595Sweongyo{
1101177595Sweongyo#define	IEEE80211_DIR_DSTODS(wh) \
1102177595Sweongyo	((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
1103177595Sweongyo#define	IS_DATA_FRAME(wh)						\
1104177595Sweongyo	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1105177595Sweongyo	int error, ismcast, iswep;
1106177595Sweongyo	int copyhdrlen, hdrlen, pktlen;
1107177595Sweongyo	struct ieee80211_frame *wh;
1108177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1109178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1110177595Sweongyo	struct malo_txdesc *ds;
1111177595Sweongyo	struct malo_txrec *tr;
1112177595Sweongyo	struct malo_txq *txq;
1113177595Sweongyo	uint16_t qos;
1114177595Sweongyo
1115177595Sweongyo	wh = mtod(m0, struct ieee80211_frame *);
1116177595Sweongyo	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1117177595Sweongyo	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1118177595Sweongyo	copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1119177595Sweongyo	pktlen = m0->m_pkthdr.len;
1120177595Sweongyo	if (IEEE80211_QOS_HAS_SEQ(wh)) {
1121177595Sweongyo		if (IEEE80211_DIR_DSTODS(wh)) {
1122177595Sweongyo			qos = *(uint16_t *)
1123177595Sweongyo			    (((struct ieee80211_qosframe_addr4 *) wh)->i_qos);
1124177595Sweongyo			copyhdrlen -= sizeof(qos);
1125177595Sweongyo		} else
1126177595Sweongyo			qos = *(uint16_t *)
1127177595Sweongyo			    (((struct ieee80211_qosframe *) wh)->i_qos);
1128177595Sweongyo	} else
1129177595Sweongyo		qos = 0;
1130177595Sweongyo
1131177595Sweongyo	if (iswep) {
1132177595Sweongyo		struct ieee80211_key *k;
1133177595Sweongyo
1134177595Sweongyo		/*
1135177595Sweongyo		 * Construct the 802.11 header+trailer for an encrypted
1136177595Sweongyo		 * frame. The only reason this can fail is because of an
1137177595Sweongyo		 * unknown or unsupported cipher/key type.
1138177595Sweongyo		 *
1139177595Sweongyo		 * NB: we do this even though the firmware will ignore
1140177595Sweongyo		 *     what we've done for WEP and TKIP as we need the
1141177595Sweongyo		 *     ExtIV filled in for CCMP and this also adjusts
1142177595Sweongyo		 *     the headers which simplifies our work below.
1143177595Sweongyo		 */
1144178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1145177595Sweongyo		if (k == NULL) {
1146177595Sweongyo			/*
1147177595Sweongyo			 * This can happen when the key is yanked after the
1148177595Sweongyo			 * frame was queued.  Just discard the frame; the
1149177595Sweongyo			 * 802.11 layer counts failures and provides
1150177595Sweongyo			 * debugging/diagnostics.
1151177595Sweongyo			 */
1152177595Sweongyo			m_freem(m0);
1153177595Sweongyo			return EIO;
1154177595Sweongyo		}
1155177595Sweongyo
1156177595Sweongyo		/*
1157177595Sweongyo		 * Adjust the packet length for the crypto additions
1158177595Sweongyo		 * done during encap and any other bits that the f/w
1159177595Sweongyo		 * will add later on.
1160177595Sweongyo		 */
1161177595Sweongyo		pktlen = m0->m_pkthdr.len;
1162177595Sweongyo
1163177595Sweongyo		/* packet header may have moved, reset our local pointer */
1164177595Sweongyo		wh = mtod(m0, struct ieee80211_frame *);
1165177595Sweongyo	}
1166177595Sweongyo
1167178354Ssam	if (bpf_peers_present(ifp->if_bpf)) {
1168177595Sweongyo		sc->malo_tx_th.wt_flags = 0;	/* XXX */
1169177595Sweongyo		if (iswep)
1170177595Sweongyo			sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1171177595Sweongyo		sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1172177595Sweongyo		sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1173177595Sweongyo
1174178354Ssam		bpf_mtap2(ifp->if_bpf, &sc->malo_tx_th, sc->malo_tx_th_len, m0);
1175177595Sweongyo	}
1176177595Sweongyo
1177177595Sweongyo	/*
1178177595Sweongyo	 * Copy up/down the 802.11 header; the firmware requires
1179177595Sweongyo	 * we present a 2-byte payload length followed by a
1180177595Sweongyo	 * 4-address header (w/o QoS), followed (optionally) by
1181177595Sweongyo	 * any WEP/ExtIV header (but only filled in for CCMP).
1182177595Sweongyo	 * We are assured the mbuf has sufficient headroom to
1183177595Sweongyo	 * prepend in-place by the setup of ic_headroom in
1184177595Sweongyo	 * malo_attach.
1185177595Sweongyo	 */
1186177595Sweongyo	if (hdrlen < sizeof(struct malo_txrec)) {
1187177595Sweongyo		const int space = sizeof(struct malo_txrec) - hdrlen;
1188177595Sweongyo		if (M_LEADINGSPACE(m0) < space) {
1189177595Sweongyo			/* NB: should never happen */
1190177595Sweongyo			device_printf(sc->malo_dev,
1191177595Sweongyo			    "not enough headroom, need %d found %zd, "
1192177595Sweongyo			    "m_flags 0x%x m_len %d\n",
1193177595Sweongyo			    space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1194177595Sweongyo			ieee80211_dump_pkt(ic,
1195177595Sweongyo			    mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1196177595Sweongyo			m_freem(m0);
1197177595Sweongyo			/* XXX stat */
1198177595Sweongyo			return EIO;
1199177595Sweongyo		}
1200177595Sweongyo		M_PREPEND(m0, space, M_NOWAIT);
1201177595Sweongyo	}
1202177595Sweongyo	tr = mtod(m0, struct malo_txrec *);
1203177595Sweongyo	if (wh != (struct ieee80211_frame *) &tr->wh)
1204177595Sweongyo		ovbcopy(wh, &tr->wh, hdrlen);
1205177595Sweongyo	/*
1206177595Sweongyo	 * Note: the "firmware length" is actually the length of the fully
1207177595Sweongyo	 * formed "802.11 payload".  That is, it's everything except for
1208177595Sweongyo	 * the 802.11 header.  In particular this includes all crypto
1209177595Sweongyo	 * material including the MIC!
1210177595Sweongyo	 */
1211177595Sweongyo	tr->fwlen = htole16(pktlen - hdrlen);
1212177595Sweongyo
1213177595Sweongyo	/*
1214177595Sweongyo	 * Load the DMA map so any coalescing is done.  This
1215177595Sweongyo	 * also calculates the number of descriptors we need.
1216177595Sweongyo	 */
1217177595Sweongyo	error = malo_tx_dmasetup(sc, bf, m0);
1218177595Sweongyo	if (error != 0)
1219177595Sweongyo		return error;
1220177595Sweongyo	bf->bf_node = ni;			/* NB: held reference */
1221177595Sweongyo	m0 = bf->bf_m;				/* NB: may have changed */
1222177595Sweongyo	tr = mtod(m0, struct malo_txrec *);
1223177595Sweongyo	wh = (struct ieee80211_frame *)&tr->wh;
1224177595Sweongyo
1225177595Sweongyo	/*
1226177595Sweongyo	 * Formulate tx descriptor.
1227177595Sweongyo	 */
1228177595Sweongyo	ds = bf->bf_desc;
1229177595Sweongyo	txq = bf->bf_txq;
1230177595Sweongyo
1231177595Sweongyo	ds->qosctrl = qos;			/* NB: already little-endian */
1232177595Sweongyo	ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1233177595Sweongyo	ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1234177595Sweongyo	/* NB: pPhysNext setup once, don't touch */
1235177595Sweongyo	ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1236177595Sweongyo	ds->sap_pktinfo = 0;
1237177595Sweongyo	ds->format = 0;
1238177595Sweongyo
1239177595Sweongyo	/*
1240177595Sweongyo	 * Select transmit rate.
1241177595Sweongyo	 */
1242177595Sweongyo	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1243177595Sweongyo	case IEEE80211_FC0_TYPE_MGT:
1244177595Sweongyo		sc->malo_stats.mst_tx_mgmt++;
1245177595Sweongyo		/* fall thru... */
1246177595Sweongyo	case IEEE80211_FC0_TYPE_CTL:
1247177595Sweongyo		ds->txpriority = 1;
1248177595Sweongyo		break;
1249177595Sweongyo	case IEEE80211_FC0_TYPE_DATA:
1250177595Sweongyo		ds->txpriority = txq->qnum;
1251177595Sweongyo		break;
1252177595Sweongyo	default:
1253177595Sweongyo		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1254177595Sweongyo			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1255177595Sweongyo		/* XXX statistic */
1256177595Sweongyo		m_freem(m0);
1257177595Sweongyo		return EIO;
1258177595Sweongyo	}
1259177595Sweongyo
1260177595Sweongyo#ifdef MALO_DEBUG
1261177595Sweongyo	if (IFF_DUMPPKTS_XMIT(sc))
1262177595Sweongyo		ieee80211_dump_pkt(ic,
1263177595Sweongyo		    mtod(m0, const uint8_t *)+sizeof(uint16_t),
1264177595Sweongyo		    m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1265177595Sweongyo#endif
1266177595Sweongyo
1267177595Sweongyo	MALO_TXQ_LOCK(txq);
1268177595Sweongyo	if (!IS_DATA_FRAME(wh))
1269177595Sweongyo		ds->status |= htole32(1);
1270177595Sweongyo	ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1271177595Sweongyo	STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1272177595Sweongyo	MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1273177595Sweongyo
1274177595Sweongyo	ifp->if_opackets++;
1275177595Sweongyo	ifp->if_timer = 5;
1276177595Sweongyo	MALO_TXQ_UNLOCK(txq);
1277177595Sweongyo	return 0;
1278177595Sweongyo#undef IEEE80211_DIR_DSTODS
1279177595Sweongyo}
1280177595Sweongyo
1281177595Sweongyostatic void
1282177595Sweongyomalo_start(struct ifnet *ifp)
1283177595Sweongyo{
1284177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1285177595Sweongyo	struct ieee80211_node *ni;
1286178354Ssam	struct malo_txq *txq = &sc->malo_txq[0];
1287177595Sweongyo	struct malo_txbuf *bf = NULL;
1288177595Sweongyo	struct mbuf *m;
1289178354Ssam	int nqueued = 0;
1290177595Sweongyo
1291177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid)
1292177595Sweongyo		return;
1293177595Sweongyo
1294177595Sweongyo	for (;;) {
1295178354Ssam		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1296178354Ssam		if (m == NULL)
1297178354Ssam			break;
1298178354Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1299178354Ssam		bf = malo_getbuf(sc, txq);
1300178354Ssam		if (bf == NULL) {
1301178354Ssam			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1302178354Ssam
1303178354Ssam			/* XXX blocks other traffic */
1304178354Ssam			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1305178354Ssam			sc->malo_stats.mst_tx_qstop++;
1306178354Ssam			break;
1307178354Ssam		}
1308177595Sweongyo		/*
1309178354Ssam		 * Encapsulate the packet in prep for transmission.
1310177595Sweongyo		 */
1311178354Ssam		m = ieee80211_encap(ni, m);
1312177595Sweongyo		if (m == NULL) {
1313178354Ssam			DPRINTF(sc, MALO_DEBUG_XMIT,
1314178354Ssam			    "%s: encapsulation failure\n", __func__);
1315178354Ssam			sc->malo_stats.mst_tx_encap++;
1316178354Ssam			goto bad;
1317177595Sweongyo		}
1318177595Sweongyo		/*
1319177595Sweongyo		 * Pass the frame to the h/w for transmission.
1320177595Sweongyo		 */
1321177595Sweongyo		if (malo_tx_start(sc, ni, bf, m)) {
1322177595Sweongyo	bad:
1323177595Sweongyo			ifp->if_oerrors++;
1324177595Sweongyo			if (bf != NULL) {
1325177595Sweongyo				bf->bf_m = NULL;
1326177595Sweongyo				bf->bf_node = NULL;
1327177595Sweongyo				MALO_TXQ_LOCK(txq);
1328177595Sweongyo				STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1329177595Sweongyo				MALO_TXQ_UNLOCK(txq);
1330177595Sweongyo			}
1331177595Sweongyo			ieee80211_free_node(ni);
1332177595Sweongyo			continue;
1333177595Sweongyo		}
1334177595Sweongyo		nqueued++;
1335177595Sweongyo
1336177595Sweongyo		if (nqueued >= malo_txcoalesce) {
1337177595Sweongyo			/*
1338177595Sweongyo			 * Poke the firmware to process queued frames;
1339177595Sweongyo			 * see below about (lack of) locking.
1340177595Sweongyo			 */
1341177595Sweongyo			nqueued = 0;
1342177595Sweongyo			malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1343177595Sweongyo		}
1344177595Sweongyo	}
1345177595Sweongyo
1346177595Sweongyo	if (nqueued) {
1347177595Sweongyo		/*
1348177595Sweongyo		 * NB: We don't need to lock against tx done because
1349177595Sweongyo		 * this just prods the firmware to check the transmit
1350177595Sweongyo		 * descriptors.  The firmware will also start fetching
1351177595Sweongyo		 * descriptors by itself if it notices new ones are
1352177595Sweongyo		 * present when it goes to deliver a tx done interrupt
1353177595Sweongyo		 * to the host. So if we race with tx done processing
1354177595Sweongyo		 * it's ok.  Delivering the kick here rather than in
1355177595Sweongyo		 * malo_tx_start is an optimization to avoid poking the
1356177595Sweongyo		 * firmware for each packet.
1357177595Sweongyo		 *
1358177595Sweongyo		 * NB: the queue id isn't used so 0 is ok.
1359177595Sweongyo		 */
1360177595Sweongyo		malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1361177595Sweongyo	}
1362177595Sweongyo}
1363177595Sweongyo
1364177595Sweongyostatic void
1365177595Sweongyomalo_watchdog(struct ifnet *ifp)
1366177595Sweongyo{
1367177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1368177595Sweongyo
1369177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) {
1370177595Sweongyo		if_printf(ifp, "watchdog timeout\n");
1371177595Sweongyo
1372177595Sweongyo		/* XXX no way to reset h/w. now  */
1373177595Sweongyo
1374177595Sweongyo		ifp->if_oerrors++;
1375177595Sweongyo		sc->malo_stats.mst_watchdog++;
1376177595Sweongyo	}
1377177595Sweongyo}
1378177595Sweongyo
1379177595Sweongyostatic int
1380177595Sweongyomalo_hal_reset(struct malo_softc *sc)
1381177595Sweongyo{
1382177595Sweongyo	static int first = 0;
1383178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1384178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1385177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1386177595Sweongyo
1387177595Sweongyo	if (first == 0) {
1388177595Sweongyo		/*
1389177595Sweongyo		 * NB: when the device firstly is initialized, sometimes
1390177595Sweongyo		 * firmware could override rx/tx dma registers so we re-set
1391177595Sweongyo		 * these values once.
1392177595Sweongyo		 */
1393177595Sweongyo		malo_hal_set_rxtxdma(sc);
1394177595Sweongyo		first = 1;
1395177595Sweongyo	}
1396177595Sweongyo
1397177595Sweongyo	malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1398177595Sweongyo	malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1399177595Sweongyo	malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1400177595Sweongyo	malo_chan_set(sc, ic->ic_curchan);
1401177595Sweongyo
1402177595Sweongyo	/* XXX needs other stuffs?  */
1403177595Sweongyo
1404177595Sweongyo	return 1;
1405177595Sweongyo}
1406177595Sweongyo
1407177595Sweongyostatic __inline struct mbuf *
1408177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1409177595Sweongyo{
1410177595Sweongyo	struct mbuf *m;
1411177595Sweongyo	bus_addr_t paddr;
1412177595Sweongyo	int error;
1413177595Sweongyo
1414177595Sweongyo	/* XXX don't need mbuf, just dma buffer */
1415177595Sweongyo	m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1416177595Sweongyo	if (m == NULL) {
1417177595Sweongyo		sc->malo_stats.mst_rx_nombuf++;	/* XXX */
1418177595Sweongyo		return NULL;
1419177595Sweongyo	}
1420177595Sweongyo	error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1421177595Sweongyo	    mtod(m, caddr_t), MJUMPAGESIZE,
1422177595Sweongyo	    malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1423177595Sweongyo	if (error != 0) {
1424177595Sweongyo		if_printf(sc->malo_ifp,
1425177595Sweongyo		    "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1426177595Sweongyo		m_freem(m);
1427177595Sweongyo		return NULL;
1428177595Sweongyo	}
1429177595Sweongyo	bf->bf_data = paddr;
1430177595Sweongyo	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1431177595Sweongyo
1432177595Sweongyo	return m;
1433177595Sweongyo}
1434177595Sweongyo
1435177595Sweongyostatic int
1436177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1437177595Sweongyo{
1438177595Sweongyo	struct malo_rxdesc *ds;
1439177595Sweongyo
1440177595Sweongyo	ds = bf->bf_desc;
1441177595Sweongyo	if (bf->bf_m == NULL) {
1442177595Sweongyo		bf->bf_m = malo_getrxmbuf(sc, bf);
1443177595Sweongyo		if (bf->bf_m == NULL) {
1444177595Sweongyo			/* mark descriptor to be skipped */
1445177595Sweongyo			ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1446177595Sweongyo			/* NB: don't need PREREAD */
1447177595Sweongyo			MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1448177595Sweongyo			return ENOMEM;
1449177595Sweongyo		}
1450177595Sweongyo	}
1451177595Sweongyo
1452177595Sweongyo	/*
1453177595Sweongyo	 * Setup descriptor.
1454177595Sweongyo	 */
1455177595Sweongyo	ds->qosctrl = 0;
1456177595Sweongyo	ds->snr = 0;
1457177595Sweongyo	ds->status = MALO_RXD_STATUS_IDLE;
1458177595Sweongyo	ds->channel = 0;
1459177595Sweongyo	ds->pktlen = htole16(MALO_RXSIZE);
1460177595Sweongyo	ds->nf = 0;
1461177595Sweongyo	ds->physbuffdata = htole32(bf->bf_data);
1462177595Sweongyo	/* NB: don't touch pPhysNext, set once */
1463177595Sweongyo	ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1464177595Sweongyo	MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1465177595Sweongyo
1466177595Sweongyo	return 0;
1467177595Sweongyo}
1468177595Sweongyo
1469177595Sweongyo/*
1470177595Sweongyo * Setup the rx data structures.  This should only be done once or we may get
1471177595Sweongyo * out of sync with the firmware.
1472177595Sweongyo */
1473177595Sweongyostatic int
1474177595Sweongyomalo_startrecv(struct malo_softc *sc)
1475177595Sweongyo{
1476177595Sweongyo	struct malo_rxbuf *bf, *prev;
1477177595Sweongyo	struct malo_rxdesc *ds;
1478177595Sweongyo
1479177595Sweongyo	if (sc->malo_recvsetup == 1) {
1480177595Sweongyo		malo_mode_init(sc);		/* set filters, etc. */
1481177595Sweongyo		return 0;
1482177595Sweongyo	}
1483177595Sweongyo
1484177595Sweongyo	prev = NULL;
1485177595Sweongyo	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1486177595Sweongyo		int error = malo_rxbuf_init(sc, bf);
1487177595Sweongyo		if (error != 0) {
1488177595Sweongyo			DPRINTF(sc, MALO_DEBUG_RECV,
1489177595Sweongyo			    "%s: malo_rxbuf_init failed %d\n",
1490177595Sweongyo			    __func__, error);
1491177595Sweongyo			return error;
1492177595Sweongyo		}
1493177595Sweongyo		if (prev != NULL) {
1494177595Sweongyo			ds = prev->bf_desc;
1495177595Sweongyo			ds->physnext = htole32(bf->bf_daddr);
1496177595Sweongyo		}
1497177595Sweongyo		prev = bf;
1498177595Sweongyo	}
1499177595Sweongyo	if (prev != NULL) {
1500177595Sweongyo		ds = prev->bf_desc;
1501177595Sweongyo		ds->physnext =
1502177595Sweongyo		    htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1503177595Sweongyo	}
1504177595Sweongyo
1505177595Sweongyo	sc->malo_recvsetup = 1;
1506177595Sweongyo
1507177595Sweongyo	malo_mode_init(sc);		/* set filters, etc. */
1508177595Sweongyo
1509177595Sweongyo	return 0;
1510177595Sweongyo}
1511177595Sweongyo
1512177595Sweongyostatic void
1513178354Ssammalo_init_locked(struct malo_softc *sc)
1514177595Sweongyo{
1515177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1516177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1517177595Sweongyo	int error;
1518177595Sweongyo
1519177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1520177595Sweongyo	    __func__, ifp->if_flags);
1521177595Sweongyo
1522178354Ssam	MALO_LOCK_ASSERT(sc);
1523177595Sweongyo
1524177595Sweongyo	/*
1525177595Sweongyo	 * Stop anything previously setup.  This is safe whether this is
1526177595Sweongyo	 * the first time through or not.
1527177595Sweongyo	 */
1528177595Sweongyo	malo_stop_locked(ifp, 0);
1529177595Sweongyo
1530177595Sweongyo	/*
1531177595Sweongyo	 * Push state to the firmware.
1532177595Sweongyo	 */
1533177595Sweongyo	if (!malo_hal_reset(sc)) {
1534177595Sweongyo		if_printf(ifp, "%s: unable to reset hardware\n", __func__);
1535178354Ssam		return;
1536177595Sweongyo	}
1537177595Sweongyo
1538177595Sweongyo	/*
1539177595Sweongyo	 * Setup recv (once); transmit is already good to go.
1540177595Sweongyo	 */
1541177595Sweongyo	error = malo_startrecv(sc);
1542177595Sweongyo	if (error != 0) {
1543177595Sweongyo		if_printf(ifp, "%s: unable to start recv logic, error %d\n",
1544177595Sweongyo		    __func__, error);
1545178354Ssam		return;
1546177595Sweongyo	}
1547177595Sweongyo
1548177595Sweongyo	/*
1549177595Sweongyo	 * Enable interrupts.
1550177595Sweongyo	 */
1551177595Sweongyo	sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1552177595Sweongyo	    | MALO_A2HRIC_BIT_TX_DONE
1553177595Sweongyo	    | MALO_A2HRIC_BIT_OPC_DONE
1554177595Sweongyo	    | MALO_A2HRIC_BIT_MAC_EVENT
1555177595Sweongyo	    | MALO_A2HRIC_BIT_RX_PROBLEM
1556177595Sweongyo	    | MALO_A2HRIC_BIT_ICV_ERROR
1557177595Sweongyo	    | MALO_A2HRIC_BIT_RADAR_DETECT
1558177595Sweongyo	    | MALO_A2HRIC_BIT_CHAN_SWITCH;
1559177595Sweongyo
1560177595Sweongyo	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1561177595Sweongyo	malo_hal_intrset(mh, sc->malo_imask);
1562178354Ssam}
1563177595Sweongyo
1564178354Ssamstatic void
1565178354Ssammalo_init(void *arg)
1566178354Ssam{
1567178354Ssam	struct malo_softc *sc = (struct malo_softc *) arg;
1568178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1569178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1570178354Ssam
1571178354Ssam	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n",
1572178354Ssam	    __func__, ifp->if_flags);
1573177595Sweongyo
1574178354Ssam	MALO_LOCK(sc);
1575178354Ssam	malo_init_locked(sc);
1576177595Sweongyo
1577177595Sweongyo	MALO_UNLOCK(sc);
1578177595Sweongyo
1579178354Ssam	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1580178354Ssam		ieee80211_start_all(ic);	/* start all vap's */
1581177595Sweongyo}
1582177595Sweongyo
1583177595Sweongyo/*
1584177595Sweongyo * Set the multicast filter contents into the hardware.
1585177595Sweongyo */
1586177595Sweongyostatic void
1587177595Sweongyomalo_setmcastfilter(struct malo_softc *sc)
1588177595Sweongyo{
1589178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1590178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1591177595Sweongyo	struct ifmultiaddr *ifma;
1592177595Sweongyo	uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1593177595Sweongyo	uint8_t *mp;
1594177595Sweongyo	int nmc;
1595177595Sweongyo
1596177595Sweongyo	mp = macs;
1597177595Sweongyo	nmc = 0;
1598177595Sweongyo
1599177595Sweongyo	if (ic->ic_opmode == IEEE80211_M_MONITOR ||
1600177595Sweongyo	    (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)))
1601177595Sweongyo		goto all;
1602177595Sweongyo
1603177595Sweongyo	IF_ADDR_LOCK(ifp);
1604177595Sweongyo	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1605177595Sweongyo		if (ifma->ifma_addr->sa_family != AF_LINK)
1606177595Sweongyo			continue;
1607177595Sweongyo
1608177595Sweongyo		if (nmc == MALO_HAL_MCAST_MAX) {
1609177595Sweongyo			ifp->if_flags |= IFF_ALLMULTI;
1610177595Sweongyo			IF_ADDR_UNLOCK(ifp);
1611177595Sweongyo			goto all;
1612177595Sweongyo		}
1613177595Sweongyo		IEEE80211_ADDR_COPY(mp,
1614177595Sweongyo		    LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
1615177595Sweongyo
1616177595Sweongyo		mp += IEEE80211_ADDR_LEN, nmc++;
1617177595Sweongyo	}
1618177595Sweongyo	IF_ADDR_UNLOCK(ifp);
1619177595Sweongyo
1620177595Sweongyo	malo_hal_setmcast(sc->malo_mh, nmc, macs);
1621177595Sweongyo
1622177595Sweongyoall:
1623177595Sweongyo	/*
1624177595Sweongyo	 * XXX we don't know how to set the f/w for supporting
1625177595Sweongyo	 * IFF_ALLMULTI | IFF_PROMISC cases
1626177595Sweongyo	 */
1627177595Sweongyo	return;
1628177595Sweongyo}
1629177595Sweongyo
1630177595Sweongyostatic int
1631177595Sweongyomalo_mode_init(struct malo_softc *sc)
1632177595Sweongyo{
1633178354Ssam	struct ifnet *ifp = sc->malo_ifp;
1634178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1635177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1636177595Sweongyo
1637177595Sweongyo	/*
1638177595Sweongyo	 * Handle any link-level address change.  Note that we only
1639177595Sweongyo	 * need to force ic_myaddr; any other addresses are handled
1640177595Sweongyo	 * as a byproduct of the ifnet code marking the interface
1641177595Sweongyo	 * down then up.
1642177595Sweongyo	 */
1643177595Sweongyo	IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
1644177595Sweongyo
1645177595Sweongyo	/*
1646177595Sweongyo	 * NB: Ignore promisc in hostap mode; it's set by the
1647177595Sweongyo	 * bridge.  This is wrong but we have no way to
1648177595Sweongyo	 * identify internal requests (from the bridge)
1649177595Sweongyo	 * versus external requests such as for tcpdump.
1650177595Sweongyo	 */
1651177595Sweongyo	malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) &&
1652177595Sweongyo	    ic->ic_opmode != IEEE80211_M_HOSTAP);
1653177595Sweongyo	malo_setmcastfilter(sc);
1654177595Sweongyo
1655177595Sweongyo	return ENXIO;
1656177595Sweongyo}
1657177595Sweongyo
1658177595Sweongyostatic void
1659177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1660177595Sweongyo{
1661177595Sweongyo	struct ieee80211_node *ni;
1662177595Sweongyo	struct malo_txbuf *bf;
1663177595Sweongyo	u_int ix;
1664177595Sweongyo
1665177595Sweongyo	/*
1666177595Sweongyo	 * NB: this assumes output has been stopped and
1667177595Sweongyo	 *     we do not need to block malo_tx_tasklet
1668177595Sweongyo	 */
1669177595Sweongyo	for (ix = 0;; ix++) {
1670177595Sweongyo		MALO_TXQ_LOCK(txq);
1671177595Sweongyo		bf = STAILQ_FIRST(&txq->active);
1672177595Sweongyo		if (bf == NULL) {
1673177595Sweongyo			MALO_TXQ_UNLOCK(txq);
1674177595Sweongyo			break;
1675177595Sweongyo		}
1676177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1677177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1678177595Sweongyo#ifdef MALO_DEBUG
1679177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_RESET) {
1680178354Ssam			struct ifnet *ifp = sc->malo_ifp;
1681178354Ssam			struct ieee80211com *ic = ifp->if_l2com;
1682177595Sweongyo			const struct malo_txrec *tr =
1683177595Sweongyo			    mtod(bf->bf_m, const struct malo_txrec *);
1684177595Sweongyo			malo_printtxbuf(bf, txq->qnum, ix);
1685178354Ssam			ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1686177595Sweongyo			    bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1687177595Sweongyo		}
1688177595Sweongyo#endif /* MALO_DEBUG */
1689177595Sweongyo		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1690177595Sweongyo		ni = bf->bf_node;
1691177595Sweongyo		bf->bf_node = NULL;
1692177595Sweongyo		if (ni != NULL) {
1693177595Sweongyo			/*
1694177595Sweongyo			 * Reclaim node reference.
1695177595Sweongyo			 */
1696177595Sweongyo			ieee80211_free_node(ni);
1697177595Sweongyo		}
1698177595Sweongyo		m_freem(bf->bf_m);
1699177595Sweongyo		bf->bf_m = NULL;
1700177595Sweongyo
1701177595Sweongyo		MALO_TXQ_LOCK(txq);
1702177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1703177595Sweongyo		txq->nfree++;
1704177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1705177595Sweongyo	}
1706177595Sweongyo}
1707177595Sweongyo
1708177595Sweongyostatic void
1709177595Sweongyomalo_stop_locked(struct ifnet *ifp, int disable)
1710177595Sweongyo{
1711177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1712177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1713178354Ssam	int i;
1714177595Sweongyo
1715177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1716177595Sweongyo	    __func__, sc->malo_invalid, ifp->if_flags);
1717177595Sweongyo
1718177595Sweongyo	MALO_LOCK_ASSERT(sc);
1719177595Sweongyo
1720177595Sweongyo	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1721177595Sweongyo		return;
1722177595Sweongyo
1723177595Sweongyo	/*
1724177595Sweongyo	 * Shutdown the hardware and driver:
1725177595Sweongyo	 *    disable interrupts
1726177595Sweongyo	 *    turn off the radio
1727177595Sweongyo	 *    drain and release tx queues
1728177595Sweongyo	 *
1729177595Sweongyo	 * Note that some of this work is not possible if the hardware
1730177595Sweongyo	 * is gone (invalid).
1731177595Sweongyo	 */
1732177595Sweongyo	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1733177595Sweongyo	ifp->if_timer = 0;
1734178354Ssam	/* diable interrupt.  */
1735178354Ssam	malo_hal_intrset(mh, 0);
1736178354Ssam	/* turn off the radio.  */
1737178354Ssam	malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1738177595Sweongyo
1739177595Sweongyo	/* drain and release tx queues.  */
1740177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1741177595Sweongyo		malo_tx_draintxq(sc, &sc->malo_txq[i]);
1742177595Sweongyo}
1743177595Sweongyo
1744177595Sweongyostatic int
1745177595Sweongyomalo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1746177595Sweongyo{
1747177595Sweongyo#define	MALO_IS_RUNNING(ifp) \
1748177595Sweongyo	((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
1749177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1750178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1751178354Ssam	struct ifreq *ifr = (struct ifreq *) data;
1752178354Ssam	int error = 0, startall = 0;
1753177595Sweongyo
1754177595Sweongyo	MALO_LOCK(sc);
1755177595Sweongyo	switch (cmd) {
1756177595Sweongyo	case SIOCSIFFLAGS:
1757177595Sweongyo		if (MALO_IS_RUNNING(ifp)) {
1758177595Sweongyo			/*
1759177595Sweongyo			 * To avoid rescanning another access point,
1760177595Sweongyo			 * do not call malo_init() here.  Instead,
1761177595Sweongyo			 * only reflect promisc mode settings.
1762177595Sweongyo			 */
1763177595Sweongyo			malo_mode_init(sc);
1764177595Sweongyo		} else if (ifp->if_flags & IFF_UP) {
1765177595Sweongyo			/*
1766177595Sweongyo			 * Beware of being called during attach/detach
1767177595Sweongyo			 * to reset promiscuous mode.  In that case we
1768177595Sweongyo			 * will still be marked UP but not RUNNING.
1769177595Sweongyo			 * However trying to re-init the interface
1770177595Sweongyo			 * is the wrong thing to do as we've already
1771177595Sweongyo			 * torn down much of our state.  There's
1772177595Sweongyo			 * probably a better way to deal with this.
1773177595Sweongyo			 */
1774178354Ssam			if (!sc->malo_invalid) {
1775178354Ssam				malo_init_locked(sc);
1776178354Ssam				startall = 1;
1777178354Ssam			}
1778177595Sweongyo		} else
1779177595Sweongyo			malo_stop_locked(ifp, 1);
1780177595Sweongyo		break;
1781178354Ssam	case SIOCGIFMEDIA:
1782178354Ssam	case SIOCSIFMEDIA:
1783178354Ssam		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1784177595Sweongyo		break;
1785177595Sweongyo	default:
1786178354Ssam		error = ether_ioctl(ifp, cmd, data);
1787177595Sweongyo		break;
1788177595Sweongyo	}
1789177595Sweongyo	MALO_UNLOCK(sc);
1790177595Sweongyo
1791178354Ssam	if (startall)
1792178354Ssam		ieee80211_start_all(ic);
1793177595Sweongyo	return error;
1794177595Sweongyo#undef MALO_IS_RUNNING
1795177595Sweongyo}
1796177595Sweongyo
1797177595Sweongyo/*
1798177595Sweongyo * Callback from the 802.11 layer to update the slot time
1799177595Sweongyo * based on the current setting.  We use it to notify the
1800177595Sweongyo * firmware of ERP changes and the f/w takes care of things
1801177595Sweongyo * like slot time and preamble.
1802177595Sweongyo */
1803177595Sweongyostatic void
1804177595Sweongyomalo_updateslot(struct ifnet *ifp)
1805177595Sweongyo{
1806177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1807178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
1808177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1809177595Sweongyo	int error;
1810177595Sweongyo
1811177595Sweongyo	/* NB: can be called early; suppress needless cmds */
1812177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1813177595Sweongyo		return;
1814177595Sweongyo
1815177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET,
1816177595Sweongyo	    "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1817177595Sweongyo	    __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1818177595Sweongyo	    ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1819177595Sweongyo
1820177595Sweongyo	if (ic->ic_flags & IEEE80211_F_SHSLOT)
1821177595Sweongyo		error = malo_hal_set_slot(mh, 1);
1822177595Sweongyo	else
1823177595Sweongyo		error = malo_hal_set_slot(mh, 0);
1824177595Sweongyo
1825177595Sweongyo	if (error != 0)
1826177595Sweongyo		device_printf(sc->malo_dev, "setting %s slot failed\n",
1827177595Sweongyo			ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1828177595Sweongyo}
1829177595Sweongyo
1830177595Sweongyostatic int
1831178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1832177595Sweongyo{
1833178354Ssam	struct ieee80211com *ic = vap->iv_ic;
1834178354Ssam	struct malo_softc *sc = ic->ic_ifp->if_softc;
1835177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1836177595Sweongyo	int error;
1837177595Sweongyo
1838177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1839178354Ssam	    ieee80211_state_name[vap->iv_state],
1840177595Sweongyo	    ieee80211_state_name[nstate]);
1841177595Sweongyo
1842177595Sweongyo	/*
1843178354Ssam	 * Invoke the net80211 layer first so iv_bss is setup.
1844177595Sweongyo	 */
1845178354Ssam	error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1846178354Ssam	if (error != 0)
1847178354Ssam		return error;
1848178354Ssam
1849178354Ssam	if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1850178354Ssam		struct ieee80211_node *ni = vap->iv_bss;
1851178354Ssam		enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1852178354Ssam		const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1853178354Ssam
1854177595Sweongyo		DPRINTF(sc, MALO_DEBUG_STATE,
1855178354Ssam		    "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1856178354Ssam		    "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1857178354Ssam		    vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1858177595Sweongyo		    ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1859178354Ssam		    ieee80211_chan2ieee(ic, ic->ic_curchan),
1860178354Ssam		    ni->ni_associd, mode, tp->ucastrate);
1861177595Sweongyo
1862178354Ssam		malo_hal_setradio(mh, 1,
1863178354Ssam		    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1864178354Ssam			MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1865178354Ssam		malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1866178354Ssam		malo_hal_set_rate(mh, mode,
1867178354Ssam		   tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1868178354Ssam		       0 : malo_fix2rate(tp->ucastrate));
1869177595Sweongyo	}
1870178354Ssam	return 0;
1871177595Sweongyo}
1872177595Sweongyo
1873177595Sweongyostatic int
1874177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1875177595Sweongyo	const struct ieee80211_bpf_params *params)
1876177595Sweongyo{
1877177595Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1878177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
1879177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
1880177595Sweongyo	struct malo_txbuf *bf;
1881177595Sweongyo	struct malo_txq *txq;
1882177595Sweongyo
1883177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) {
1884177595Sweongyo		ieee80211_free_node(ni);
1885177595Sweongyo		m_freem(m);
1886177595Sweongyo		return ENETDOWN;
1887177595Sweongyo	}
1888177595Sweongyo
1889177595Sweongyo	/*
1890177595Sweongyo	 * Grab a TX buffer and associated resources.  Note that we depend
1891177595Sweongyo	 * on the classification by the 802.11 layer to get to the right h/w
1892177595Sweongyo	 * queue.  Management frames must ALWAYS go on queue 1 but we
1893177595Sweongyo	 * cannot just force that here because we may receive non-mgt frames.
1894177595Sweongyo	 */
1895177595Sweongyo	txq = &sc->malo_txq[0];
1896177595Sweongyo	bf = malo_getbuf(sc, txq);
1897177595Sweongyo	if (bf == NULL) {
1898177595Sweongyo		/* XXX blocks other traffic */
1899177595Sweongyo		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1900177595Sweongyo		ieee80211_free_node(ni);
1901177595Sweongyo		m_freem(m);
1902177595Sweongyo		return ENOBUFS;
1903177595Sweongyo	}
1904177595Sweongyo
1905177595Sweongyo	/*
1906177595Sweongyo	 * Pass the frame to the h/w for transmission.
1907177595Sweongyo	 */
1908177595Sweongyo	if (malo_tx_start(sc, ni, bf, m) != 0) {
1909177595Sweongyo		ifp->if_oerrors++;
1910177595Sweongyo		bf->bf_m = NULL;
1911177595Sweongyo		bf->bf_node = NULL;
1912177595Sweongyo		MALO_TXQ_LOCK(txq);
1913177595Sweongyo		STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1914177595Sweongyo		txq->nfree++;
1915177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1916177595Sweongyo
1917177595Sweongyo		ieee80211_free_node(ni);
1918177595Sweongyo		return EIO;		/* XXX */
1919177595Sweongyo	}
1920177595Sweongyo
1921177595Sweongyo	/*
1922177595Sweongyo	 * NB: We don't need to lock against tx done because this just
1923177595Sweongyo	 * prods the firmware to check the transmit descriptors.  The firmware
1924177595Sweongyo	 * will also start fetching descriptors by itself if it notices
1925177595Sweongyo	 * new ones are present when it goes to deliver a tx done interrupt
1926177595Sweongyo	 * to the host. So if we race with tx done processing it's ok.
1927177595Sweongyo	 * Delivering the kick here rather than in malo_tx_start is
1928177595Sweongyo	 * an optimization to avoid poking the firmware for each packet.
1929177595Sweongyo	 *
1930177595Sweongyo	 * NB: the queue id isn't used so 0 is ok.
1931177595Sweongyo	 */
1932177595Sweongyo	malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1933177595Sweongyo
1934177595Sweongyo	return 0;
1935177595Sweongyo}
1936177595Sweongyo
1937177595Sweongyostatic void
1938177595Sweongyomalo_bpfattach(struct malo_softc *sc)
1939177595Sweongyo{
1940177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1941177595Sweongyo
1942178354Ssam	bpfattach(ifp, DLT_IEEE802_11_RADIO,
1943178354Ssam	    sizeof(struct ieee80211_frame) + sizeof(sc->malo_tx_th));
1944177595Sweongyo
1945177595Sweongyo	/*
1946177595Sweongyo	 * Initialize constant fields.
1947177595Sweongyo	 * XXX make header lengths a multiple of 32-bits so subsequent
1948177595Sweongyo	 *     headers are properly aligned; this is a kludge to keep
1949177595Sweongyo	 *     certain applications happy.
1950177595Sweongyo	 *
1951177595Sweongyo	 * NB: the channel is setup each time we transition to the
1952177595Sweongyo	 *     RUN state to avoid filling it in for each frame.
1953177595Sweongyo	 */
1954177595Sweongyo	sc->malo_tx_th_len = roundup(sizeof(sc->malo_tx_th), sizeof(uint32_t));
1955177595Sweongyo	sc->malo_tx_th.wt_ihdr.it_len = htole16(sc->malo_tx_th_len);
1956177595Sweongyo	sc->malo_tx_th.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT);
1957177595Sweongyo
1958177595Sweongyo	sc->malo_rx_th_len = roundup(sizeof(sc->malo_rx_th), sizeof(uint32_t));
1959177595Sweongyo	sc->malo_rx_th.wr_ihdr.it_len = htole16(sc->malo_rx_th_len);
1960177595Sweongyo	sc->malo_rx_th.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT);
1961177595Sweongyo}
1962177595Sweongyo
1963177595Sweongyostatic void
1964177595Sweongyomalo_sysctlattach(struct malo_softc *sc)
1965177595Sweongyo{
1966177595Sweongyo#ifdef	MALO_DEBUG
1967177595Sweongyo	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1968177595Sweongyo	struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1969177595Sweongyo
1970177595Sweongyo	sc->malo_debug = malo_debug;
1971177595Sweongyo	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1972177595Sweongyo		"debug", CTLFLAG_RW, &sc->malo_debug, 0,
1973177595Sweongyo		"control debugging printfs");
1974177595Sweongyo#endif
1975177595Sweongyo}
1976177595Sweongyo
1977177595Sweongyostatic void
1978177595Sweongyomalo_announce(struct malo_softc *sc)
1979177595Sweongyo{
1980177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
1981177595Sweongyo
1982177595Sweongyo	if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1983177595Sweongyo		sc->malo_hwspecs.hwversion,
1984177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1985177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1986177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1987177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1988177595Sweongyo		sc->malo_hwspecs.regioncode);
1989177595Sweongyo
1990177595Sweongyo	if (bootverbose || malo_rxbuf != MALO_RXBUF)
1991177595Sweongyo		if_printf(ifp, "using %u rx buffers\n", malo_rxbuf);
1992177595Sweongyo	if (bootverbose || malo_txbuf != MALO_TXBUF)
1993177595Sweongyo		if_printf(ifp, "using %u tx buffers\n", malo_txbuf);
1994177595Sweongyo}
1995177595Sweongyo
1996177595Sweongyo/*
1997177595Sweongyo * Convert net80211 channel to a HAL channel.
1998177595Sweongyo */
1999177595Sweongyostatic void
2000177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
2001177595Sweongyo{
2002177595Sweongyo	hc->channel = chan->ic_ieee;
2003177595Sweongyo
2004177595Sweongyo	*(uint32_t *)&hc->flags = 0;
2005177595Sweongyo	if (IEEE80211_IS_CHAN_2GHZ(chan))
2006177595Sweongyo		hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
2007177595Sweongyo}
2008177595Sweongyo
2009177595Sweongyo/*
2010177595Sweongyo * Set/change channels.  If the channel is really being changed,
2011177595Sweongyo * it's done by reseting the chip.  To accomplish this we must
2012177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la
2013177595Sweongyo * malo_init.
2014177595Sweongyo */
2015177595Sweongyostatic int
2016177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
2017177595Sweongyo{
2018177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
2019177595Sweongyo	struct malo_hal_channel hchan;
2020177595Sweongyo
2021177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
2022177595Sweongyo	    __func__, chan->ic_freq, chan->ic_flags);
2023177595Sweongyo
2024177595Sweongyo	/*
2025177595Sweongyo	 * Convert to a HAL channel description with the flags constrained
2026177595Sweongyo	 * to reflect the current operating mode.
2027177595Sweongyo	 */
2028177595Sweongyo	malo_mapchan(&hchan, chan);
2029177595Sweongyo	malo_hal_intrset(mh, 0);		/* disable interrupts */
2030177595Sweongyo	malo_hal_setchannel(mh, &hchan);
2031177595Sweongyo	malo_hal_settxpower(mh, &hchan);
2032177595Sweongyo
2033177595Sweongyo	/*
2034177595Sweongyo	 * Update internal state.
2035177595Sweongyo	 */
2036177595Sweongyo	sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
2037177595Sweongyo	sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
2038177595Sweongyo	if (IEEE80211_IS_CHAN_ANYG(chan)) {
2039177595Sweongyo		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
2040177595Sweongyo		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
2041177595Sweongyo	} else {
2042177595Sweongyo		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
2043177595Sweongyo		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
2044177595Sweongyo	}
2045177595Sweongyo	sc->malo_curchan = hchan;
2046177595Sweongyo	malo_hal_intrset(mh, sc->malo_imask);
2047177595Sweongyo
2048177595Sweongyo	return 0;
2049177595Sweongyo}
2050177595Sweongyo
2051177595Sweongyostatic void
2052177595Sweongyomalo_scan_start(struct ieee80211com *ic)
2053177595Sweongyo{
2054177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2055177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2056177595Sweongyo
2057177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2058177595Sweongyo}
2059177595Sweongyo
2060177595Sweongyostatic void
2061177595Sweongyomalo_scan_end(struct ieee80211com *ic)
2062177595Sweongyo{
2063177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2064177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2065177595Sweongyo
2066177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
2067177595Sweongyo}
2068177595Sweongyo
2069177595Sweongyostatic void
2070177595Sweongyomalo_set_channel(struct ieee80211com *ic)
2071177595Sweongyo{
2072177595Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2073177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2074177595Sweongyo
2075177595Sweongyo	(void) malo_chan_set(sc, ic->ic_curchan);
2076177595Sweongyo}
2077177595Sweongyo
2078177595Sweongyostatic void
2079177595Sweongyomalo_rx_proc(void *arg, int npending)
2080177595Sweongyo{
2081177595Sweongyo#define	IEEE80211_DIR_DSTODS(wh)					\
2082177595Sweongyo	((((const struct ieee80211_frame *)wh)->i_fc[1] &		\
2083177595Sweongyo	    IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
2084177595Sweongyo	struct malo_softc *sc = arg;
2085178354Ssam	struct ifnet *ifp = sc->malo_ifp;
2086178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2087177595Sweongyo	struct malo_rxbuf *bf;
2088177595Sweongyo	struct malo_rxdesc *ds;
2089177595Sweongyo	struct mbuf *m, *mnew;
2090177595Sweongyo	struct ieee80211_qosframe *wh;
2091177595Sweongyo	struct ieee80211_qosframe_addr4 *wh4;
2092177595Sweongyo	struct ieee80211_node *ni;
2093177595Sweongyo	int off, len, hdrlen, pktlen, rssi, ntodo;
2094177595Sweongyo	uint8_t *data, status;
2095177595Sweongyo	uint32_t readptr, writeptr;
2096177595Sweongyo
2097177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RX_PROC,
2098177595Sweongyo	    "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
2099177595Sweongyo	    __func__, npending,
2100177595Sweongyo	    sc->malo_hwspecs.rxdesc_read,
2101177595Sweongyo	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
2102177595Sweongyo	    sc->malo_hwspecs.rxdesc_write,
2103177595Sweongyo	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
2104177595Sweongyo
2105177595Sweongyo	readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
2106177595Sweongyo	writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
2107177595Sweongyo	if (readptr == writeptr)
2108177595Sweongyo		return;
2109177595Sweongyo
2110177595Sweongyo	bf = sc->malo_rxnext;
2111178354Ssam	for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
2112177595Sweongyo		if (bf == NULL) {
2113177595Sweongyo			bf = STAILQ_FIRST(&sc->malo_rxbuf);
2114177595Sweongyo			break;
2115177595Sweongyo		}
2116177595Sweongyo		ds = bf->bf_desc;
2117177595Sweongyo		if (bf->bf_m == NULL) {
2118177595Sweongyo			/*
2119177595Sweongyo			 * If data allocation failed previously there
2120177595Sweongyo			 * will be no buffer; try again to re-populate it.
2121177595Sweongyo			 * Note the firmware will not advance to the next
2122177595Sweongyo			 * descriptor with a dma buffer so we must mimic
2123177595Sweongyo			 * this or we'll get out of sync.
2124177595Sweongyo			 */
2125177595Sweongyo			DPRINTF(sc, MALO_DEBUG_ANY,
2126177595Sweongyo			    "%s: rx buf w/o dma memory\n", __func__);
2127177595Sweongyo			(void)malo_rxbuf_init(sc, bf);
2128177595Sweongyo			break;
2129177595Sweongyo		}
2130177595Sweongyo		MALO_RXDESC_SYNC(sc, ds,
2131177595Sweongyo		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2132177595Sweongyo		if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
2133177595Sweongyo			break;
2134177595Sweongyo
2135177595Sweongyo		readptr = le32toh(ds->physnext);
2136177595Sweongyo
2137177595Sweongyo#ifdef MALO_DEBUG
2138177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
2139177595Sweongyo			malo_printrxbuf(bf, 0);
2140177595Sweongyo#endif
2141177595Sweongyo		status = ds->status;
2142177595Sweongyo		if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
2143177595Sweongyo			ifp->if_ierrors++;
2144177595Sweongyo			goto rx_next;
2145177595Sweongyo		}
2146177595Sweongyo		/*
2147177595Sweongyo		 * Sync the data buffer.
2148177595Sweongyo		 */
2149177595Sweongyo		len = le16toh(ds->pktlen);
2150177595Sweongyo		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2151177595Sweongyo		    BUS_DMASYNC_POSTREAD);
2152177595Sweongyo		/*
2153177595Sweongyo		 * The 802.11 header is provided all or in part at the front;
2154177595Sweongyo		 * use it to calculate the true size of the header that we'll
2155177595Sweongyo		 * construct below.  We use this to figure out where to copy
2156177595Sweongyo		 * payload prior to constructing the header.
2157177595Sweongyo		 */
2158177595Sweongyo		m = bf->bf_m;
2159178354Ssam		data = mtod(m, uint8_t *);;
2160177595Sweongyo		hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2161177595Sweongyo		off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2162177595Sweongyo
2163177595Sweongyo		/*
2164178354Ssam		 * Calculate RSSI. XXX wrong
2165177595Sweongyo		 */
2166177595Sweongyo		rssi = 2 * ((int) ds->snr - ds->nf);	/* NB: .5 dBm  */
2167177595Sweongyo		if (rssi > 100)
2168177595Sweongyo			rssi = 100;
2169177595Sweongyo
2170177595Sweongyo		pktlen = hdrlen + (len - off);
2171177595Sweongyo		/*
2172177595Sweongyo		 * NB: we know our frame is at least as large as
2173177595Sweongyo		 * IEEE80211_MIN_LEN because there is a 4-address frame at
2174177595Sweongyo		 * the front.  Hence there's no need to vet the packet length.
2175177595Sweongyo		 * If the frame in fact is too small it should be discarded
2176177595Sweongyo		 * at the net80211 layer.
2177177595Sweongyo		 */
2178177595Sweongyo
2179177595Sweongyo		/* XXX don't need mbuf, just dma buffer */
2180177595Sweongyo		mnew = malo_getrxmbuf(sc, bf);
2181177595Sweongyo		if (mnew == NULL) {
2182177595Sweongyo			ifp->if_ierrors++;
2183177595Sweongyo			goto rx_next;
2184177595Sweongyo		}
2185177595Sweongyo		/*
2186177595Sweongyo		 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2187177595Sweongyo		 * re-setup the rx descriptor using the replacement dma
2188177595Sweongyo		 * buffer we just installed above.
2189177595Sweongyo		 */
2190177595Sweongyo		bf->bf_m = mnew;
2191177595Sweongyo		m->m_data += off - hdrlen;
2192177595Sweongyo		m->m_pkthdr.len = m->m_len = pktlen;
2193177595Sweongyo		m->m_pkthdr.rcvif = ifp;
2194177595Sweongyo
2195177595Sweongyo		/*
2196177595Sweongyo		 * Piece 802.11 header together.
2197177595Sweongyo		 */
2198177595Sweongyo		wh = mtod(m, struct ieee80211_qosframe *);
2199177595Sweongyo		/* NB: don't need to do this sometimes but ... */
2200177595Sweongyo		/* XXX special case so we can memcpy after m_devget? */
2201177595Sweongyo		ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2202177595Sweongyo		if (IEEE80211_QOS_HAS_SEQ(wh)) {
2203177595Sweongyo			if (IEEE80211_DIR_DSTODS(wh)) {
2204177595Sweongyo				wh4 = mtod(m,
2205177595Sweongyo				    struct ieee80211_qosframe_addr4*);
2206177595Sweongyo				*(uint16_t *)wh4->i_qos = ds->qosctrl;
2207177595Sweongyo			} else {
2208177595Sweongyo				*(uint16_t *)wh->i_qos = ds->qosctrl;
2209177595Sweongyo			}
2210177595Sweongyo		}
2211177595Sweongyo		if (sc->malo_drvbpf != NULL) {
2212177595Sweongyo			sc->malo_rx_th.wr_flags = 0;
2213177595Sweongyo			sc->malo_rx_th.wr_rate = ds->rate;
2214177595Sweongyo			sc->malo_rx_th.wr_antsignal = rssi;
2215177595Sweongyo			sc->malo_rx_th.wr_antnoise = ds->nf;
2216177595Sweongyo
2217178354Ssam			bpf_mtap2(ifp->if_bpf, &sc->malo_rx_th,
2218178354Ssam			    sc->malo_rx_th_len, m);
2219177595Sweongyo		}
2220177595Sweongyo#ifdef MALO_DEBUG
2221177595Sweongyo		if (IFF_DUMPPKTS_RECV(sc, wh)) {
2222177595Sweongyo			ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2223177595Sweongyo			    len, ds->rate, rssi);
2224177595Sweongyo		}
2225177595Sweongyo#endif
2226177595Sweongyo		ifp->if_ipackets++;
2227177595Sweongyo
2228177595Sweongyo		/* dispatch */
2229177595Sweongyo		ni = ieee80211_find_rxnode(ic,
2230178354Ssam		    (struct ieee80211_frame_min *)wh);
2231178354Ssam		if (ni != NULL) {
2232178354Ssam			(void) ieee80211_input(ni, m, rssi, ds->nf, 0);
2233178354Ssam			ieee80211_free_node(ni);
2234178354Ssam		} else
2235178354Ssam			(void) ieee80211_input_all(ic, m, rssi, ds->nf, 0);
2236177595Sweongyorx_next:
2237177595Sweongyo		/* NB: ignore ENOMEM so we process more descriptors */
2238177595Sweongyo		(void) malo_rxbuf_init(sc, bf);
2239177595Sweongyo		bf = STAILQ_NEXT(bf, bf_list);
2240177595Sweongyo	}
2241177595Sweongyo
2242177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2243177595Sweongyo	sc->malo_rxnext = bf;
2244177595Sweongyo
2245177595Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2246177595Sweongyo	    !IFQ_IS_EMPTY(&ifp->if_snd))
2247177595Sweongyo		malo_start(ifp);
2248177595Sweongyo#undef IEEE80211_DIR_DSTODS
2249177595Sweongyo}
2250177595Sweongyo
2251177595Sweongyostatic void
2252177595Sweongyomalo_stop(struct ifnet *ifp, int disable)
2253177595Sweongyo{
2254177595Sweongyo	struct malo_softc *sc = ifp->if_softc;
2255177595Sweongyo
2256177595Sweongyo	MALO_LOCK(sc);
2257177595Sweongyo	malo_stop_locked(ifp, disable);
2258177595Sweongyo	MALO_UNLOCK(sc);
2259177595Sweongyo}
2260177595Sweongyo
2261177595Sweongyo/*
2262177595Sweongyo * Reclaim all tx queue resources.
2263177595Sweongyo */
2264177595Sweongyostatic void
2265177595Sweongyomalo_tx_cleanup(struct malo_softc *sc)
2266177595Sweongyo{
2267177595Sweongyo	int i;
2268177595Sweongyo
2269177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2270177595Sweongyo		malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2271177595Sweongyo}
2272177595Sweongyo
2273177595Sweongyoint
2274177595Sweongyomalo_detach(struct malo_softc *sc)
2275177595Sweongyo{
2276177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
2277178354Ssam	struct ieee80211com *ic = ifp->if_l2com;
2278177595Sweongyo
2279177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2280177595Sweongyo		__func__, ifp->if_flags);
2281177595Sweongyo
2282177595Sweongyo	malo_stop(ifp, 1);
2283177595Sweongyo
2284177595Sweongyo	if (sc->malo_tq != NULL) {
2285177595Sweongyo		taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2286177595Sweongyo		taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2287177595Sweongyo		taskqueue_free(sc->malo_tq);
2288177595Sweongyo		sc->malo_tq = NULL;
2289177595Sweongyo	}
2290177595Sweongyo
2291177595Sweongyo	bpfdetach(ifp);
2292177595Sweongyo
2293177595Sweongyo	/*
2294177595Sweongyo	 * NB: the order of these is important:
2295177595Sweongyo	 * o call the 802.11 layer before detaching the hal to
2296177595Sweongyo	 *   insure callbacks into the driver to delete global
2297177595Sweongyo	 *   key cache entries can be handled
2298177595Sweongyo	 * o reclaim the tx queue data structures after calling
2299177595Sweongyo	 *   the 802.11 layer as we'll get called back to reclaim
2300177595Sweongyo	 *   node state and potentially want to use them
2301177595Sweongyo	 * o to cleanup the tx queues the hal is called, so detach
2302177595Sweongyo	 *   it last
2303177595Sweongyo	 * Other than that, it's straightforward...
2304177595Sweongyo	 */
2305178354Ssam	ieee80211_ifdetach(ic);
2306177595Sweongyo	malo_dma_cleanup(sc);
2307177595Sweongyo	malo_tx_cleanup(sc);
2308177595Sweongyo	malo_hal_detach(sc->malo_mh);
2309177595Sweongyo	if_free(ifp);
2310177595Sweongyo
2311177595Sweongyo	MALO_LOCK_DESTROY(sc);
2312177595Sweongyo
2313177595Sweongyo	return 0;
2314177595Sweongyo}
2315177595Sweongyo
2316177595Sweongyovoid
2317177595Sweongyomalo_shutdown(struct malo_softc *sc)
2318177595Sweongyo{
2319177595Sweongyo	malo_stop(sc->malo_ifp, 1);
2320177595Sweongyo}
2321177595Sweongyo
2322177595Sweongyovoid
2323177595Sweongyomalo_suspend(struct malo_softc *sc)
2324177595Sweongyo{
2325177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
2326177595Sweongyo
2327177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2328177595Sweongyo		__func__, ifp->if_flags);
2329177595Sweongyo
2330177595Sweongyo	malo_stop(ifp, 1);
2331177595Sweongyo}
2332177595Sweongyo
2333177595Sweongyovoid
2334177595Sweongyomalo_resume(struct malo_softc *sc)
2335177595Sweongyo{
2336177595Sweongyo	struct ifnet *ifp = sc->malo_ifp;
2337177595Sweongyo
2338177595Sweongyo	DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n",
2339177595Sweongyo		__func__, ifp->if_flags);
2340177595Sweongyo
2341178354Ssam	if (ifp->if_flags & IFF_UP)
2342177595Sweongyo		malo_init(sc);
2343177595Sweongyo}
2344