1177595Sweongyo/*-
2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc.
4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting
5177595Sweongyo * All rights reserved.
6177595Sweongyo *
7177595Sweongyo * Redistribution and use in source and binary forms, with or without
8177595Sweongyo * modification, are permitted provided that the following conditions
9177595Sweongyo * are met:
10177595Sweongyo * 1. Redistributions of source code must retain the above copyright
11177595Sweongyo *    notice, this list of conditions and the following disclaimer,
12177595Sweongyo *    without modification.
13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14177595Sweongyo *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15177595Sweongyo *    redistribution must be conditioned upon including a substantially
16177595Sweongyo *    similar Disclaimer requirement for further binary redistribution.
17177595Sweongyo *
18177595Sweongyo * NO WARRANTY
19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES.
30177595Sweongyo */
31177595Sweongyo
32177595Sweongyo#include <sys/cdefs.h>
33177595Sweongyo#ifdef __FreeBSD__
34177595Sweongyo__FBSDID("$FreeBSD: stable/11/sys/dev/malo/if_malo.c 344969 2019-03-09 12:54:10Z avos $");
35177595Sweongyo#endif
36177595Sweongyo
37178354Ssam#include "opt_malo.h"
38178354Ssam
39177595Sweongyo#include <sys/param.h>
40177595Sweongyo#include <sys/endian.h>
41177595Sweongyo#include <sys/kernel.h>
42295126Sglebius#include <sys/malloc.h>
43177595Sweongyo#include <sys/socket.h>
44177595Sweongyo#include <sys/sockio.h>
45177595Sweongyo#include <sys/sysctl.h>
46177595Sweongyo#include <sys/taskqueue.h>
47177595Sweongyo
48177595Sweongyo#include <machine/bus.h>
49177595Sweongyo#include <sys/bus.h>
50177595Sweongyo
51177595Sweongyo#include <net/if.h>
52257176Sglebius#include <net/if_var.h>
53177595Sweongyo#include <net/if_dl.h>
54177595Sweongyo#include <net/if_media.h>
55177595Sweongyo#include <net/if_types.h>
56177595Sweongyo#include <net/ethernet.h>
57177595Sweongyo
58177595Sweongyo#include <net80211/ieee80211_var.h>
59177595Sweongyo#include <net80211/ieee80211_regdomain.h>
60177595Sweongyo
61177595Sweongyo#include <net/bpf.h>
62177595Sweongyo
63177595Sweongyo#include <dev/malo/if_malo.h>
64177595Sweongyo
65177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0,
66177595Sweongyo    "Marvell 88w8335 driver parameters");
67177595Sweongyo
68177595Sweongyostatic	int malo_txcoalesce = 8;	/* # tx pkts to q before poking f/w*/
69267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce,
70177595Sweongyo	    0, "tx buffers to send at once");
71177595Sweongyostatic	int malo_rxbuf = MALO_RXBUF;		/* # rx buffers to allocate */
72267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf,
73177595Sweongyo	    0, "rx buffers allocated");
74177595Sweongyostatic	int malo_rxquota = MALO_RXBUF;		/* # max buffers to process */
75267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota,
76177595Sweongyo	    0, "max rx buffers to process per interrupt");
77177595Sweongyostatic	int malo_txbuf = MALO_TXBUF;		/* # tx buffers to allocate */
78267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf,
79177595Sweongyo	    0, "tx buffers allocated");
80177595Sweongyo
81177595Sweongyo#ifdef MALO_DEBUG
82177595Sweongyostatic	int malo_debug = 0;
83267992ShselaskySYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug,
84177595Sweongyo	    0, "control debugging printfs");
85177595Sweongyoenum {
86177595Sweongyo	MALO_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
87177595Sweongyo	MALO_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
88177595Sweongyo	MALO_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
89177595Sweongyo	MALO_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
90177595Sweongyo	MALO_DEBUG_RESET	= 0x00000010,	/* reset processing */
91177595Sweongyo	MALO_DEBUG_INTR		= 0x00000040,	/* ISR */
92177595Sweongyo	MALO_DEBUG_TX_PROC	= 0x00000080,	/* tx ISR proc */
93177595Sweongyo	MALO_DEBUG_RX_PROC	= 0x00000100,	/* rx ISR proc */
94177595Sweongyo	MALO_DEBUG_STATE	= 0x00000400,	/* 802.11 state transitions */
95177595Sweongyo	MALO_DEBUG_NODE		= 0x00000800,	/* node management */
96177595Sweongyo	MALO_DEBUG_RECV_ALL	= 0x00001000,	/* trace all frames (beacons) */
97177595Sweongyo	MALO_DEBUG_FW		= 0x00008000,	/* firmware */
98177595Sweongyo	MALO_DEBUG_ANY		= 0xffffffff
99177595Sweongyo};
100177595Sweongyo#define	IS_BEACON(wh)							\
101177595Sweongyo	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK |			\
102177595Sweongyo		IEEE80211_FC0_SUBTYPE_MASK)) ==				\
103177595Sweongyo	 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
104177595Sweongyo#define	IFF_DUMPPKTS_RECV(sc, wh)					\
105177595Sweongyo	(((sc->malo_debug & MALO_DEBUG_RECV) &&				\
106287197Sglebius	  ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))))
107177595Sweongyo#define	IFF_DUMPPKTS_XMIT(sc)						\
108287197Sglebius	(sc->malo_debug & MALO_DEBUG_XMIT)
109177595Sweongyo#define	DPRINTF(sc, m, fmt, ...) do {				\
110177595Sweongyo	if (sc->malo_debug & (m))				\
111177595Sweongyo		printf(fmt, __VA_ARGS__);			\
112177595Sweongyo} while (0)
113177595Sweongyo#else
114177595Sweongyo#define	DPRINTF(sc, m, fmt, ...) do {				\
115177595Sweongyo	(void) sc;						\
116177595Sweongyo} while (0)
117177595Sweongyo#endif
118177595Sweongyo
119227293Sedstatic MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
120177595Sweongyo
121228621Sbschmidtstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *,
122228621Sbschmidt		    const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
123228621Sbschmidt		    const uint8_t [IEEE80211_ADDR_LEN],
124228621Sbschmidt		    const uint8_t [IEEE80211_ADDR_LEN]);
125178354Ssamstatic  void	malo_vap_delete(struct ieee80211vap *);
126177595Sweongyostatic	int	malo_dma_setup(struct malo_softc *);
127177595Sweongyostatic	int	malo_setup_hwdma(struct malo_softc *);
128177595Sweongyostatic	void	malo_txq_init(struct malo_softc *, struct malo_txq *, int);
129177595Sweongyostatic	void	malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
130287197Sglebiusstatic	void	malo_parent(struct ieee80211com *);
131287197Sglebiusstatic	int	malo_transmit(struct ieee80211com *, struct mbuf *);
132287197Sglebiusstatic	void	malo_start(struct malo_softc *);
133199559Sjhbstatic	void	malo_watchdog(void *);
134283540Sglebiusstatic	void	malo_updateslot(struct ieee80211com *);
135178354Ssamstatic	int	malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
136177595Sweongyostatic	void	malo_scan_start(struct ieee80211com *);
137177595Sweongyostatic	void	malo_scan_end(struct ieee80211com *);
138177595Sweongyostatic	void	malo_set_channel(struct ieee80211com *);
139177595Sweongyostatic	int	malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
140177595Sweongyo		    const struct ieee80211_bpf_params *);
141177595Sweongyostatic	void	malo_sysctlattach(struct malo_softc *);
142177595Sweongyostatic	void	malo_announce(struct malo_softc *);
143177595Sweongyostatic	void	malo_dma_cleanup(struct malo_softc *);
144287197Sglebiusstatic	void	malo_stop(struct malo_softc *);
145177595Sweongyostatic	int	malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
146177595Sweongyostatic	int	malo_mode_init(struct malo_softc *);
147177595Sweongyostatic	void	malo_tx_proc(void *, int);
148177595Sweongyostatic	void	malo_rx_proc(void *, int);
149177595Sweongyostatic	void	malo_init(void *);
150177595Sweongyo
151177595Sweongyo/*
152177595Sweongyo * Read/Write shorthands for accesses to BAR 0.  Note that all BAR 1
153177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at
154177595Sweongyo * malo_attach and there should be no reference to them here.
155177595Sweongyo */
156177595Sweongyostatic uint32_t
157177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off)
158177595Sweongyo{
159177595Sweongyo	return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
160177595Sweongyo}
161177595Sweongyo
162177595Sweongyostatic void
163177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
164177595Sweongyo{
165205843Simp	DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
166278532Smarius	    __func__, (uintmax_t)off, val);
167177595Sweongyo
168177595Sweongyo	bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
169177595Sweongyo}
170177595Sweongyo
171177595Sweongyoint
172177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc)
173177595Sweongyo{
174287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
175287197Sglebius	struct malo_hal *mh;
176286437Sadrian	int error;
177298818Savos	uint8_t bands[IEEE80211_MODE_BYTES];
178177595Sweongyo
179177595Sweongyo	MALO_LOCK_INIT(sc);
180199559Sjhb	callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
181287197Sglebius	mbufq_init(&sc->malo_snd, ifqmaxlen);
182177595Sweongyo
183177595Sweongyo	mh = malo_hal_attach(sc->malo_dev, devid,
184177595Sweongyo	    sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
185177595Sweongyo	if (mh == NULL) {
186287197Sglebius		device_printf(sc->malo_dev, "unable to attach HAL\n");
187177595Sweongyo		error = EIO;
188177595Sweongyo		goto bad;
189177595Sweongyo	}
190177595Sweongyo	sc->malo_mh = mh;
191177595Sweongyo
192178354Ssam	/*
193178354Ssam	 * Load firmware so we can get setup.  We arbitrarily pick station
194178354Ssam	 * firmware; we'll re-load firmware as needed so setting up
195178354Ssam	 * the wrong mode isn't a big deal.
196178354Ssam	 */
197178354Ssam	error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
198178354Ssam	if (error != 0) {
199287197Sglebius		device_printf(sc->malo_dev, "unable to setup firmware\n");
200178354Ssam		goto bad1;
201178354Ssam	}
202178354Ssam	/* XXX gethwspecs() extracts correct informations?  not maybe!  */
203178354Ssam	error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
204178354Ssam	if (error != 0) {
205287197Sglebius		device_printf(sc->malo_dev, "unable to fetch h/w specs\n");
206178354Ssam		goto bad1;
207178354Ssam	}
208178354Ssam
209178354Ssam	DPRINTF(sc, MALO_DEBUG_FW,
210178354Ssam	    "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
211178354Ssam	    "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
212178354Ssam	    "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
213178354Ssam	    "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
214178354Ssam	    "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
215178354Ssam	    sc->malo_hwspecs.hwversion,
216178354Ssam	    sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
217178354Ssam	    sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
218178354Ssam	    sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
219178354Ssam	    sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
220178354Ssam	    sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
221178354Ssam	    sc->malo_hwspecs.ul_fw_awakecookie,
222178354Ssam	    sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
223178354Ssam	    sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
224178354Ssam
225178354Ssam	/* NB: firmware looks that it does not export regdomain info API.  */
226293339Savos	memset(bands, 0, sizeof(bands));
227293339Savos	setbit(bands, IEEE80211_MODE_11B);
228293339Savos	setbit(bands, IEEE80211_MODE_11G);
229293339Savos	ieee80211_init_channels(ic, NULL, bands);
230178354Ssam
231177595Sweongyo	sc->malo_txantenna = 0x2;	/* h/w default */
232177595Sweongyo	sc->malo_rxantenna = 0xffff;	/* h/w default */
233177595Sweongyo
234177595Sweongyo	/*
235177595Sweongyo	 * Allocate tx + rx descriptors and populate the lists.
236177595Sweongyo	 * We immediately push the information to the firmware
237177595Sweongyo	 * as otherwise it gets upset.
238177595Sweongyo	 */
239177595Sweongyo	error = malo_dma_setup(sc);
240177595Sweongyo	if (error != 0) {
241287197Sglebius		device_printf(sc->malo_dev,
242287197Sglebius		    "failed to setup descriptors: %d\n", error);
243177595Sweongyo		goto bad1;
244177595Sweongyo	}
245178354Ssam	error = malo_setup_hwdma(sc);	/* push to firmware */
246178354Ssam	if (error != 0)			/* NB: malo_setupdma prints msg */
247190552Sweongyo		goto bad2;
248177595Sweongyo
249177595Sweongyo	sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
250177595Sweongyo		taskqueue_thread_enqueue, &sc->malo_tq);
251177595Sweongyo	taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
252287197Sglebius		"%s taskq", device_get_nameunit(sc->malo_dev));
253177595Sweongyo
254177595Sweongyo	TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
255177595Sweongyo	TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
256177595Sweongyo
257283537Sglebius	ic->ic_softc = sc;
258283527Sglebius	ic->ic_name = device_get_nameunit(sc->malo_dev);
259177595Sweongyo	/* XXX not right but it's not used anywhere important */
260177595Sweongyo	ic->ic_phytype = IEEE80211_T_OFDM;
261177595Sweongyo	ic->ic_opmode = IEEE80211_M_STA;
262177595Sweongyo	ic->ic_caps =
263178957Ssam	      IEEE80211_C_STA			/* station mode supported */
264178957Ssam	    | IEEE80211_C_BGSCAN		/* capable of bg scanning */
265177595Sweongyo	    | IEEE80211_C_MONITOR		/* monitor mode */
266177595Sweongyo	    | IEEE80211_C_SHPREAMBLE		/* short preamble supported */
267177595Sweongyo	    | IEEE80211_C_SHSLOT		/* short slot time supported */
268177595Sweongyo	    | IEEE80211_C_TXPMGT		/* capable of txpow mgt */
269177595Sweongyo	    | IEEE80211_C_WPA			/* capable of WPA1+WPA2 */
270177595Sweongyo	    ;
271287197Sglebius	IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->malo_hwspecs.macaddr);
272177595Sweongyo
273177595Sweongyo	/*
274177595Sweongyo	 * Transmit requires space in the packet for a special format transmit
275177595Sweongyo	 * record and optional padding between this record and the payload.
276177595Sweongyo	 * Ask the net80211 layer to arrange this when encapsulating
277177595Sweongyo	 * packets so we can add it efficiently.
278177595Sweongyo	 */
279177595Sweongyo	ic->ic_headroom = sizeof(struct malo_txrec) -
280178354Ssam		sizeof(struct ieee80211_frame);
281177595Sweongyo
282177595Sweongyo	/* call MI attach routine. */
283287197Sglebius	ieee80211_ifattach(ic);
284177595Sweongyo	/* override default methods */
285178354Ssam	ic->ic_vap_create = malo_vap_create;
286178354Ssam	ic->ic_vap_delete = malo_vap_delete;
287178354Ssam	ic->ic_raw_xmit = malo_raw_xmit;
288177595Sweongyo	ic->ic_updateslot = malo_updateslot;
289177595Sweongyo	ic->ic_scan_start = malo_scan_start;
290177595Sweongyo	ic->ic_scan_end = malo_scan_end;
291177595Sweongyo	ic->ic_set_channel = malo_set_channel;
292287197Sglebius	ic->ic_parent = malo_parent;
293287197Sglebius	ic->ic_transmit = malo_transmit;
294177595Sweongyo
295177595Sweongyo	sc->malo_invalid = 0;		/* ready to go, enable int handling */
296177595Sweongyo
297192468Ssam	ieee80211_radiotap_attach(ic,
298192468Ssam	    &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
299192468Ssam		MALO_TX_RADIOTAP_PRESENT,
300192468Ssam	    &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
301192468Ssam		MALO_RX_RADIOTAP_PRESENT);
302177595Sweongyo
303177595Sweongyo	/*
304177595Sweongyo	 * Setup dynamic sysctl's.
305177595Sweongyo	 */
306177595Sweongyo	malo_sysctlattach(sc);
307177595Sweongyo
308177595Sweongyo	if (bootverbose)
309177595Sweongyo		ieee80211_announce(ic);
310178354Ssam	malo_announce(sc);
311177595Sweongyo
312177595Sweongyo	return 0;
313190552Sweongyobad2:
314190552Sweongyo	malo_dma_cleanup(sc);
315177595Sweongyobad1:
316177595Sweongyo	malo_hal_detach(mh);
317177595Sweongyobad:
318177595Sweongyo	sc->malo_invalid = 1;
319177595Sweongyo
320177595Sweongyo	return error;
321177595Sweongyo}
322177595Sweongyo
323178354Ssamstatic struct ieee80211vap *
324228621Sbschmidtmalo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
325228621Sbschmidt    enum ieee80211_opmode opmode, int flags,
326228621Sbschmidt    const uint8_t bssid[IEEE80211_ADDR_LEN],
327228621Sbschmidt    const uint8_t mac[IEEE80211_ADDR_LEN])
328178354Ssam{
329287197Sglebius	struct malo_softc *sc = ic->ic_softc;
330178354Ssam	struct malo_vap *mvp;
331178354Ssam	struct ieee80211vap *vap;
332178354Ssam
333178354Ssam	if (!TAILQ_EMPTY(&ic->ic_vaps)) {
334287197Sglebius		device_printf(sc->malo_dev, "multiple vaps not supported\n");
335178354Ssam		return NULL;
336178354Ssam	}
337178354Ssam	switch (opmode) {
338178354Ssam	case IEEE80211_M_STA:
339178354Ssam		if (opmode == IEEE80211_M_STA)
340178354Ssam			flags |= IEEE80211_CLONE_NOBEACONS;
341178354Ssam		/* fall thru... */
342178354Ssam	case IEEE80211_M_MONITOR:
343178354Ssam		break;
344178354Ssam	default:
345287197Sglebius		device_printf(sc->malo_dev, "%s mode not supported\n",
346178354Ssam		    ieee80211_opmode_name[opmode]);
347178354Ssam		return NULL;		/* unsupported */
348178354Ssam	}
349287197Sglebius	mvp = malloc(sizeof(struct malo_vap), M_80211_VAP, M_WAITOK | M_ZERO);
350178354Ssam	vap = &mvp->malo_vap;
351287197Sglebius	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
352178354Ssam
353178354Ssam	/* override state transition machine */
354178354Ssam	mvp->malo_newstate = vap->iv_newstate;
355178354Ssam	vap->iv_newstate = malo_newstate;
356178354Ssam
357178354Ssam	/* complete setup */
358178354Ssam	ieee80211_vap_attach(vap,
359287197Sglebius	    ieee80211_media_change, ieee80211_media_status, mac);
360178354Ssam	ic->ic_opmode = opmode;
361178354Ssam	return vap;
362178354Ssam}
363178354Ssam
364178354Ssamstatic void
365178354Ssammalo_vap_delete(struct ieee80211vap *vap)
366178354Ssam{
367178354Ssam	struct malo_vap *mvp = MALO_VAP(vap);
368178354Ssam
369178354Ssam	ieee80211_vap_detach(vap);
370178354Ssam	free(mvp, M_80211_VAP);
371178354Ssam}
372178354Ssam
373177595Sweongyoint
374177595Sweongyomalo_intr(void *arg)
375177595Sweongyo{
376177595Sweongyo	struct malo_softc *sc = arg;
377177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
378177595Sweongyo	uint32_t status;
379177595Sweongyo
380177595Sweongyo	if (sc->malo_invalid) {
381177595Sweongyo		/*
382177595Sweongyo		 * The hardware is not ready/present, don't touch anything.
383177595Sweongyo		 * Note this can happen early on if the IRQ is shared.
384177595Sweongyo		 */
385177595Sweongyo		DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
386177595Sweongyo		return (FILTER_STRAY);
387177595Sweongyo	}
388177595Sweongyo
389177595Sweongyo	/*
390177595Sweongyo	 * Figure out the reason(s) for the interrupt.
391177595Sweongyo	 */
392177595Sweongyo	malo_hal_getisr(mh, &status);		/* NB: clears ISR too */
393177595Sweongyo	if (status == 0)			/* must be a shared irq */
394177595Sweongyo		return (FILTER_STRAY);
395177595Sweongyo
396177595Sweongyo	DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
397177595Sweongyo	    __func__, status, sc->malo_imask);
398177595Sweongyo
399177595Sweongyo	if (status & MALO_A2HRIC_BIT_RX_RDY)
400296272Sjhb		taskqueue_enqueue(sc->malo_tq, &sc->malo_rxtask);
401177595Sweongyo	if (status & MALO_A2HRIC_BIT_TX_DONE)
402296272Sjhb		taskqueue_enqueue(sc->malo_tq, &sc->malo_txtask);
403177595Sweongyo	if (status & MALO_A2HRIC_BIT_OPC_DONE)
404177595Sweongyo		malo_hal_cmddone(mh);
405177595Sweongyo	if (status & MALO_A2HRIC_BIT_MAC_EVENT)
406177595Sweongyo		;
407177595Sweongyo	if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
408177595Sweongyo		;
409177595Sweongyo	if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
410177595Sweongyo		/* TKIP ICV error */
411177595Sweongyo		sc->malo_stats.mst_rx_badtkipicv++;
412177595Sweongyo	}
413177595Sweongyo#ifdef MALO_DEBUG
414177595Sweongyo	if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
415177595Sweongyo		DPRINTF(sc, MALO_DEBUG_INTR,
416177595Sweongyo		    "%s: can't handle interrupt status 0x%x\n",
417177595Sweongyo		    __func__, status);
418177595Sweongyo#endif
419177595Sweongyo	return (FILTER_HANDLED);
420177595Sweongyo}
421177595Sweongyo
422177595Sweongyostatic void
423177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
424177595Sweongyo{
425177595Sweongyo	bus_addr_t *paddr = (bus_addr_t*) arg;
426177595Sweongyo
427177595Sweongyo	KASSERT(error == 0, ("error %u on bus_dma callback", error));
428177595Sweongyo
429177595Sweongyo	*paddr = segs->ds_addr;
430177595Sweongyo}
431177595Sweongyo
432177595Sweongyostatic int
433177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name,
434177595Sweongyo    struct malo_descdma *dd,
435177595Sweongyo    int nbuf, size_t bufsize, int ndesc, size_t descsize)
436177595Sweongyo{
437177595Sweongyo	int error;
438177595Sweongyo	uint8_t *ds;
439177595Sweongyo
440177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET,
441177595Sweongyo	    "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
442177595Sweongyo	    __func__, name, nbuf, (uintmax_t) bufsize,
443177595Sweongyo	    ndesc, (uintmax_t) descsize);
444177595Sweongyo
445177595Sweongyo	dd->dd_name = name;
446177595Sweongyo	dd->dd_desc_len = nbuf * ndesc * descsize;
447177595Sweongyo
448177595Sweongyo	/*
449177595Sweongyo	 * Setup DMA descriptor area.
450177595Sweongyo	 */
451177595Sweongyo	error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
452177595Sweongyo		       PAGE_SIZE, 0,		/* alignment, bounds */
453177595Sweongyo		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
454177595Sweongyo		       BUS_SPACE_MAXADDR,	/* highaddr */
455177595Sweongyo		       NULL, NULL,		/* filter, filterarg */
456177595Sweongyo		       dd->dd_desc_len,		/* maxsize */
457177595Sweongyo		       1,			/* nsegments */
458177595Sweongyo		       dd->dd_desc_len,		/* maxsegsize */
459177595Sweongyo		       BUS_DMA_ALLOCNOW,	/* flags */
460177595Sweongyo		       NULL,			/* lockfunc */
461177595Sweongyo		       NULL,			/* lockarg */
462177595Sweongyo		       &dd->dd_dmat);
463177595Sweongyo	if (error != 0) {
464287197Sglebius		device_printf(sc->malo_dev, "cannot allocate %s DMA tag\n",
465287197Sglebius		    dd->dd_name);
466177595Sweongyo		return error;
467177595Sweongyo	}
468177595Sweongyo
469177595Sweongyo	/* allocate descriptors */
470177595Sweongyo	error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
471177595Sweongyo	    BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
472177595Sweongyo	if (error != 0) {
473287197Sglebius		device_printf(sc->malo_dev,
474287197Sglebius		    "unable to alloc memory for %u %s descriptors, "
475177595Sweongyo		    "error %u\n", nbuf * ndesc, dd->dd_name, error);
476177595Sweongyo		goto fail1;
477177595Sweongyo	}
478177595Sweongyo
479177595Sweongyo	error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
480177595Sweongyo	    dd->dd_desc, dd->dd_desc_len,
481177595Sweongyo	    malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
482177595Sweongyo	if (error != 0) {
483287197Sglebius		device_printf(sc->malo_dev,
484287197Sglebius		    "unable to map %s descriptors, error %u\n",
485177595Sweongyo		    dd->dd_name, error);
486177595Sweongyo		goto fail2;
487177595Sweongyo	}
488177595Sweongyo
489177595Sweongyo	ds = dd->dd_desc;
490177595Sweongyo	memset(ds, 0, dd->dd_desc_len);
491278532Smarius	DPRINTF(sc, MALO_DEBUG_RESET,
492278532Smarius	    "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n",
493177595Sweongyo	    __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
494278532Smarius	    (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
495177595Sweongyo
496177595Sweongyo	return 0;
497177595Sweongyofail2:
498177595Sweongyo	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
499177595Sweongyofail1:
500177595Sweongyo	bus_dma_tag_destroy(dd->dd_dmat);
501177595Sweongyo	memset(dd, 0, sizeof(*dd));
502177595Sweongyo	return error;
503177595Sweongyo}
504177595Sweongyo
505177595Sweongyo#define	DS2PHYS(_dd, _ds) \
506177595Sweongyo	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
507177595Sweongyo
508177595Sweongyostatic int
509177595Sweongyomalo_rxdma_setup(struct malo_softc *sc)
510177595Sweongyo{
511177595Sweongyo	int error, bsize, i;
512177595Sweongyo	struct malo_rxbuf *bf;
513177595Sweongyo	struct malo_rxdesc *ds;
514177595Sweongyo
515177595Sweongyo	error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
516177595Sweongyo	    malo_rxbuf, sizeof(struct malo_rxbuf),
517177595Sweongyo	    1, sizeof(struct malo_rxdesc));
518177595Sweongyo	if (error != 0)
519177595Sweongyo		return error;
520177595Sweongyo
521177595Sweongyo	/*
522177595Sweongyo	 * Allocate rx buffers and set them up.
523177595Sweongyo	 */
524177595Sweongyo	bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
525177595Sweongyo	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
526177595Sweongyo	if (bf == NULL) {
527287197Sglebius		device_printf(sc->malo_dev,
528287197Sglebius		    "malloc of %u rx buffers failed\n", bsize);
529177595Sweongyo		return error;
530177595Sweongyo	}
531177595Sweongyo	sc->malo_rxdma.dd_bufptr = bf;
532177595Sweongyo
533177595Sweongyo	STAILQ_INIT(&sc->malo_rxbuf);
534177595Sweongyo	ds = sc->malo_rxdma.dd_desc;
535177595Sweongyo	for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
536177595Sweongyo		bf->bf_desc = ds;
537177595Sweongyo		bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
538177595Sweongyo		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
539177595Sweongyo		    &bf->bf_dmamap);
540177595Sweongyo		if (error != 0) {
541287197Sglebius			device_printf(sc->malo_dev,
542287197Sglebius			    "%s: unable to dmamap for rx buffer, error %d\n",
543287197Sglebius			    __func__, error);
544177595Sweongyo			return error;
545177595Sweongyo		}
546177595Sweongyo		/* NB: tail is intentional to preserve descriptor order */
547177595Sweongyo		STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
548177595Sweongyo	}
549177595Sweongyo	return 0;
550177595Sweongyo}
551177595Sweongyo
552177595Sweongyostatic int
553177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
554177595Sweongyo{
555177595Sweongyo	int error, bsize, i;
556177595Sweongyo	struct malo_txbuf *bf;
557177595Sweongyo	struct malo_txdesc *ds;
558177595Sweongyo
559177595Sweongyo	error = malo_desc_setup(sc, "tx", &txq->dma,
560177595Sweongyo	    malo_txbuf, sizeof(struct malo_txbuf),
561177595Sweongyo	    MALO_TXDESC, sizeof(struct malo_txdesc));
562177595Sweongyo	if (error != 0)
563177595Sweongyo		return error;
564177595Sweongyo
565177595Sweongyo	/* allocate and setup tx buffers */
566177595Sweongyo	bsize = malo_txbuf * sizeof(struct malo_txbuf);
567177595Sweongyo	bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
568177595Sweongyo	if (bf == NULL) {
569287197Sglebius		device_printf(sc->malo_dev, "malloc of %u tx buffers failed\n",
570177595Sweongyo		    malo_txbuf);
571177595Sweongyo		return ENOMEM;
572177595Sweongyo	}
573177595Sweongyo	txq->dma.dd_bufptr = bf;
574177595Sweongyo
575177595Sweongyo	STAILQ_INIT(&txq->free);
576177595Sweongyo	txq->nfree = 0;
577177595Sweongyo	ds = txq->dma.dd_desc;
578177595Sweongyo	for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
579177595Sweongyo		bf->bf_desc = ds;
580177595Sweongyo		bf->bf_daddr = DS2PHYS(&txq->dma, ds);
581177595Sweongyo		error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
582177595Sweongyo		    &bf->bf_dmamap);
583177595Sweongyo		if (error != 0) {
584287197Sglebius			device_printf(sc->malo_dev,
585287197Sglebius			    "unable to create dmamap for tx "
586177595Sweongyo			    "buffer %u, error %u\n", i, error);
587177595Sweongyo			return error;
588177595Sweongyo		}
589177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
590177595Sweongyo		txq->nfree++;
591177595Sweongyo	}
592177595Sweongyo
593177595Sweongyo	return 0;
594177595Sweongyo}
595177595Sweongyo
596177595Sweongyostatic void
597177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
598177595Sweongyo{
599177595Sweongyo	bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
600177595Sweongyo	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
601177595Sweongyo	bus_dma_tag_destroy(dd->dd_dmat);
602177595Sweongyo
603177595Sweongyo	memset(dd, 0, sizeof(*dd));
604177595Sweongyo}
605177595Sweongyo
606177595Sweongyostatic void
607177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc)
608177595Sweongyo{
609177595Sweongyo	struct malo_rxbuf *bf;
610177595Sweongyo
611177595Sweongyo	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
612177595Sweongyo		if (bf->bf_m != NULL) {
613177595Sweongyo			m_freem(bf->bf_m);
614177595Sweongyo			bf->bf_m = NULL;
615177595Sweongyo		}
616177595Sweongyo		if (bf->bf_dmamap != NULL) {
617177595Sweongyo			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
618177595Sweongyo			bf->bf_dmamap = NULL;
619177595Sweongyo		}
620177595Sweongyo	}
621177595Sweongyo	STAILQ_INIT(&sc->malo_rxbuf);
622177595Sweongyo	if (sc->malo_rxdma.dd_bufptr != NULL) {
623177595Sweongyo		free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
624177595Sweongyo		sc->malo_rxdma.dd_bufptr = NULL;
625177595Sweongyo	}
626177595Sweongyo	if (sc->malo_rxdma.dd_desc_len != 0)
627177595Sweongyo		malo_desc_cleanup(sc, &sc->malo_rxdma);
628177595Sweongyo}
629177595Sweongyo
630177595Sweongyostatic void
631177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
632177595Sweongyo{
633177595Sweongyo	struct malo_txbuf *bf;
634177595Sweongyo	struct ieee80211_node *ni;
635177595Sweongyo
636177595Sweongyo	STAILQ_FOREACH(bf, &txq->free, bf_list) {
637177595Sweongyo		if (bf->bf_m != NULL) {
638177595Sweongyo			m_freem(bf->bf_m);
639177595Sweongyo			bf->bf_m = NULL;
640177595Sweongyo		}
641177595Sweongyo		ni = bf->bf_node;
642177595Sweongyo		bf->bf_node = NULL;
643177595Sweongyo		if (ni != NULL) {
644177595Sweongyo			/*
645177595Sweongyo			 * Reclaim node reference.
646177595Sweongyo			 */
647177595Sweongyo			ieee80211_free_node(ni);
648177595Sweongyo		}
649177595Sweongyo		if (bf->bf_dmamap != NULL) {
650177595Sweongyo			bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
651177595Sweongyo			bf->bf_dmamap = NULL;
652177595Sweongyo		}
653177595Sweongyo	}
654177595Sweongyo	STAILQ_INIT(&txq->free);
655177595Sweongyo	txq->nfree = 0;
656177595Sweongyo	if (txq->dma.dd_bufptr != NULL) {
657177595Sweongyo		free(txq->dma.dd_bufptr, M_MALODEV);
658177595Sweongyo		txq->dma.dd_bufptr = NULL;
659177595Sweongyo	}
660177595Sweongyo	if (txq->dma.dd_desc_len != 0)
661177595Sweongyo		malo_desc_cleanup(sc, &txq->dma);
662177595Sweongyo}
663177595Sweongyo
664177595Sweongyostatic void
665177595Sweongyomalo_dma_cleanup(struct malo_softc *sc)
666177595Sweongyo{
667177595Sweongyo	int i;
668177595Sweongyo
669177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
670177595Sweongyo		malo_txdma_cleanup(sc, &sc->malo_txq[i]);
671177595Sweongyo
672177595Sweongyo	malo_rxdma_cleanup(sc);
673177595Sweongyo}
674177595Sweongyo
675177595Sweongyostatic int
676177595Sweongyomalo_dma_setup(struct malo_softc *sc)
677177595Sweongyo{
678177595Sweongyo	int error, i;
679177595Sweongyo
680177595Sweongyo	/* rxdma initializing.  */
681177595Sweongyo	error = malo_rxdma_setup(sc);
682177595Sweongyo	if (error != 0)
683177595Sweongyo		return error;
684177595Sweongyo
685177595Sweongyo	/* NB: we just have 1 tx queue now.  */
686177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
687177595Sweongyo		error = malo_txdma_setup(sc, &sc->malo_txq[i]);
688177595Sweongyo		if (error != 0) {
689177595Sweongyo			malo_dma_cleanup(sc);
690177595Sweongyo
691177595Sweongyo			return error;
692177595Sweongyo		}
693177595Sweongyo
694177595Sweongyo		malo_txq_init(sc, &sc->malo_txq[i], i);
695177595Sweongyo	}
696177595Sweongyo
697177595Sweongyo	return 0;
698177595Sweongyo}
699177595Sweongyo
700177595Sweongyostatic void
701177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc)
702177595Sweongyo{
703177595Sweongyo	int i;
704177595Sweongyo
705177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
706177595Sweongyo	    sc->malo_hwdma.rxdesc_read);
707177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
708177595Sweongyo	    sc->malo_hwdma.rxdesc_read);
709177595Sweongyo
710177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
711177595Sweongyo		malo_bar0_write4(sc,
712177595Sweongyo		    sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
713177595Sweongyo	}
714177595Sweongyo}
715177595Sweongyo
716177595Sweongyo/*
717177595Sweongyo * Inform firmware of our tx/rx dma setup.  The BAR 0 writes below are
718177595Sweongyo * for compatibility with older firmware.  For current firmware we send
719177595Sweongyo * this information with a cmd block via malo_hal_sethwdma.
720177595Sweongyo */
721177595Sweongyostatic int
722177595Sweongyomalo_setup_hwdma(struct malo_softc *sc)
723177595Sweongyo{
724177595Sweongyo	int i;
725177595Sweongyo	struct malo_txq *txq;
726177595Sweongyo
727177595Sweongyo	sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
728177595Sweongyo
729177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
730177595Sweongyo		txq = &sc->malo_txq[i];
731177595Sweongyo		sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
732177595Sweongyo	}
733177595Sweongyo	sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
734177595Sweongyo	sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
735177595Sweongyo
736177595Sweongyo	malo_hal_set_rxtxdma(sc);
737177595Sweongyo
738177595Sweongyo	return 0;
739177595Sweongyo}
740177595Sweongyo
741177595Sweongyostatic void
742177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
743177595Sweongyo{
744177595Sweongyo	struct malo_txbuf *bf, *bn;
745177595Sweongyo	struct malo_txdesc *ds;
746177595Sweongyo
747177595Sweongyo	MALO_TXQ_LOCK_INIT(sc, txq);
748177595Sweongyo	txq->qnum = qnum;
749177595Sweongyo	txq->txpri = 0;	/* XXX */
750177595Sweongyo
751177595Sweongyo	STAILQ_FOREACH(bf, &txq->free, bf_list) {
752177595Sweongyo		bf->bf_txq = txq;
753177595Sweongyo
754177595Sweongyo		ds = bf->bf_desc;
755177595Sweongyo		bn = STAILQ_NEXT(bf, bf_list);
756177595Sweongyo		if (bn == NULL)
757177595Sweongyo			bn = STAILQ_FIRST(&txq->free);
758177595Sweongyo		ds->physnext = htole32(bn->bf_daddr);
759177595Sweongyo	}
760177595Sweongyo	STAILQ_INIT(&txq->active);
761177595Sweongyo}
762177595Sweongyo
763177595Sweongyo/*
764177595Sweongyo * Reclaim resources for a setup queue.
765177595Sweongyo */
766177595Sweongyostatic void
767177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
768177595Sweongyo{
769177595Sweongyo	/* XXX hal work? */
770177595Sweongyo	MALO_TXQ_LOCK_DESTROY(txq);
771177595Sweongyo}
772177595Sweongyo
773177595Sweongyo/*
774177595Sweongyo * Allocate a tx buffer for sending a frame.
775177595Sweongyo */
776177595Sweongyostatic struct malo_txbuf *
777177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
778177595Sweongyo{
779177595Sweongyo	struct malo_txbuf *bf;
780177595Sweongyo
781177595Sweongyo	MALO_TXQ_LOCK(txq);
782177595Sweongyo	bf = STAILQ_FIRST(&txq->free);
783177595Sweongyo	if (bf != NULL) {
784177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->free, bf_list);
785177595Sweongyo		txq->nfree--;
786177595Sweongyo	}
787177595Sweongyo	MALO_TXQ_UNLOCK(txq);
788177595Sweongyo	if (bf == NULL) {
789177595Sweongyo		DPRINTF(sc, MALO_DEBUG_XMIT,
790177595Sweongyo		    "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
791177595Sweongyo		sc->malo_stats.mst_tx_qstop++;
792177595Sweongyo	}
793177595Sweongyo	return bf;
794177595Sweongyo}
795177595Sweongyo
796177595Sweongyostatic int
797177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
798177595Sweongyo{
799177595Sweongyo	struct mbuf *m;
800177595Sweongyo	int error;
801177595Sweongyo
802177595Sweongyo	/*
803177595Sweongyo	 * Load the DMA map so any coalescing is done.  This also calculates
804177595Sweongyo	 * the number of descriptors we need.
805177595Sweongyo	 */
806177595Sweongyo	error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
807177595Sweongyo				     bf->bf_segs, &bf->bf_nseg,
808177595Sweongyo				     BUS_DMA_NOWAIT);
809177595Sweongyo	if (error == EFBIG) {
810177595Sweongyo		/* XXX packet requires too many descriptors */
811177595Sweongyo		bf->bf_nseg = MALO_TXDESC + 1;
812177595Sweongyo	} else if (error != 0) {
813177595Sweongyo		sc->malo_stats.mst_tx_busdma++;
814177595Sweongyo		m_freem(m0);
815177595Sweongyo		return error;
816177595Sweongyo	}
817177595Sweongyo	/*
818177595Sweongyo	 * Discard null packets and check for packets that require too many
819177595Sweongyo	 * TX descriptors.  We try to convert the latter to a cluster.
820177595Sweongyo	 */
821177595Sweongyo	if (error == EFBIG) {		/* too many desc's, linearize */
822177595Sweongyo		sc->malo_stats.mst_tx_linear++;
823243857Sglebius		m = m_defrag(m0, M_NOWAIT);
824177595Sweongyo		if (m == NULL) {
825177595Sweongyo			m_freem(m0);
826177595Sweongyo			sc->malo_stats.mst_tx_nombuf++;
827177595Sweongyo			return ENOMEM;
828177595Sweongyo		}
829177595Sweongyo		m0 = m;
830177595Sweongyo		error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
831177595Sweongyo					     bf->bf_segs, &bf->bf_nseg,
832177595Sweongyo					     BUS_DMA_NOWAIT);
833177595Sweongyo		if (error != 0) {
834177595Sweongyo			sc->malo_stats.mst_tx_busdma++;
835177595Sweongyo			m_freem(m0);
836177595Sweongyo			return error;
837177595Sweongyo		}
838177595Sweongyo		KASSERT(bf->bf_nseg <= MALO_TXDESC,
839177595Sweongyo		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
840177595Sweongyo	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
841177595Sweongyo		sc->malo_stats.mst_tx_nodata++;
842177595Sweongyo		m_freem(m0);
843177595Sweongyo		return EIO;
844177595Sweongyo	}
845177595Sweongyo	DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
846177595Sweongyo		__func__, m0, m0->m_pkthdr.len);
847177595Sweongyo	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
848177595Sweongyo	bf->bf_m = m0;
849177595Sweongyo
850177595Sweongyo	return 0;
851177595Sweongyo}
852177595Sweongyo
853177595Sweongyo#ifdef MALO_DEBUG
854177595Sweongyostatic void
855177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
856177595Sweongyo{
857177595Sweongyo	const struct malo_rxdesc *ds = bf->bf_desc;
858177595Sweongyo	uint32_t status = le32toh(ds->status);
859177595Sweongyo
860278532Smarius	printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n"
861177595Sweongyo	    "      STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
862278532Smarius	    " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr,
863177595Sweongyo	    le32toh(ds->physnext), le32toh(ds->physbuffdata),
864177595Sweongyo	    ds->rxcontrol,
865177595Sweongyo	    ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
866177595Sweongyo	        "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
867177595Sweongyo	    ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
868177595Sweongyo	    ds->rate, le16toh(ds->qosctrl));
869177595Sweongyo}
870177595Sweongyo
871177595Sweongyostatic void
872177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
873177595Sweongyo{
874177595Sweongyo	const struct malo_txdesc *ds = bf->bf_desc;
875177595Sweongyo	uint32_t status = le32toh(ds->status);
876177595Sweongyo
877177595Sweongyo	printf("Q%u[%3u]", qnum, ix);
878278532Smarius	printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr);
879177595Sweongyo	printf("    NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
880177595Sweongyo	    le32toh(ds->physnext),
881177595Sweongyo	    le32toh(ds->pktptr), le16toh(ds->pktlen), status,
882177595Sweongyo	    status & MALO_TXD_STATUS_USED ?
883177595Sweongyo	    "" : (status & 3) != 0 ? " *" : " !");
884177595Sweongyo	printf("    RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
885177595Sweongyo	    ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
886177595Sweongyo	    le32toh(ds->sap_pktinfo), le16toh(ds->format));
887177595Sweongyo#if 0
888177595Sweongyo	{
889177595Sweongyo		const uint8_t *cp = (const uint8_t *) ds;
890177595Sweongyo		int i;
891177595Sweongyo		for (i = 0; i < sizeof(struct malo_txdesc); i++) {
892177595Sweongyo			printf("%02x ", cp[i]);
893177595Sweongyo			if (((i+1) % 16) == 0)
894177595Sweongyo				printf("\n");
895177595Sweongyo		}
896177595Sweongyo		printf("\n");
897177595Sweongyo	}
898177595Sweongyo#endif
899177595Sweongyo}
900177595Sweongyo#endif /* MALO_DEBUG */
901177595Sweongyo
902177595Sweongyostatic __inline void
903177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix)
904177595Sweongyo{
905177595Sweongyo	static const int ieeerates[] =
906177595Sweongyo	    { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
907288087Sadrian	if (rix < nitems(ieeerates))
908177595Sweongyo		ni->ni_txrate = ieeerates[rix];
909177595Sweongyo}
910177595Sweongyo
911177595Sweongyostatic int
912177595Sweongyomalo_fix2rate(int fix_rate)
913177595Sweongyo{
914177595Sweongyo	static const int rates[] =
915177595Sweongyo	    { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
916288087Sadrian	return (fix_rate < nitems(rates) ? rates[fix_rate] : 0);
917177595Sweongyo}
918177595Sweongyo
919177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
920177595Sweongyo#define	MS(v,x)			(((v) & x) >> x##_S)
921177595Sweongyo#define	SM(v,x)			(((v) << x##_S) & x)
922177595Sweongyo
923177595Sweongyo/*
924177595Sweongyo * Process completed xmit descriptors from the specified queue.
925177595Sweongyo */
926177595Sweongyostatic int
927177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
928177595Sweongyo{
929177595Sweongyo	struct malo_txbuf *bf;
930177595Sweongyo	struct malo_txdesc *ds;
931177595Sweongyo	struct ieee80211_node *ni;
932177595Sweongyo	int nreaped;
933177595Sweongyo	uint32_t status;
934177595Sweongyo
935177595Sweongyo	DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
936177595Sweongyo	    __func__, txq->qnum);
937177595Sweongyo	for (nreaped = 0;; nreaped++) {
938177595Sweongyo		MALO_TXQ_LOCK(txq);
939177595Sweongyo		bf = STAILQ_FIRST(&txq->active);
940177595Sweongyo		if (bf == NULL) {
941177595Sweongyo			MALO_TXQ_UNLOCK(txq);
942177595Sweongyo			break;
943177595Sweongyo		}
944177595Sweongyo		ds = bf->bf_desc;
945177595Sweongyo		MALO_TXDESC_SYNC(txq, ds,
946177595Sweongyo		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
947177595Sweongyo		if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
948177595Sweongyo			MALO_TXQ_UNLOCK(txq);
949177595Sweongyo			break;
950177595Sweongyo		}
951177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
952177595Sweongyo		MALO_TXQ_UNLOCK(txq);
953177595Sweongyo
954177595Sweongyo#ifdef MALO_DEBUG
955177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
956177595Sweongyo			malo_printtxbuf(bf, txq->qnum, nreaped);
957177595Sweongyo#endif
958177595Sweongyo		ni = bf->bf_node;
959177595Sweongyo		if (ni != NULL) {
960177595Sweongyo			status = le32toh(ds->status);
961177595Sweongyo			if (status & MALO_TXD_STATUS_OK) {
962177595Sweongyo				uint16_t format = le16toh(ds->format);
963177595Sweongyo				uint8_t txant = MS(format, MALO_TXD_ANTENNA);
964177595Sweongyo
965177595Sweongyo				sc->malo_stats.mst_ant_tx[txant]++;
966177595Sweongyo				if (status & MALO_TXD_STATUS_OK_RETRY)
967177595Sweongyo					sc->malo_stats.mst_tx_retries++;
968177595Sweongyo				if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
969177595Sweongyo					sc->malo_stats.mst_tx_mretries++;
970177595Sweongyo				malo_updatetxrate(ni, ds->datarate);
971177595Sweongyo				sc->malo_stats.mst_tx_rate = ds->datarate;
972177595Sweongyo			} else {
973177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
974177595Sweongyo					sc->malo_stats.mst_tx_linkerror++;
975177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_XRETRY)
976177595Sweongyo					sc->malo_stats.mst_tx_xretries++;
977177595Sweongyo				if (status & MALO_TXD_STATUS_FAILED_AGING)
978177595Sweongyo					sc->malo_stats.mst_tx_aging++;
979177595Sweongyo			}
980287197Sglebius			/* XXX strip fw len in case header inspected */
981287197Sglebius			m_adj(bf->bf_m, sizeof(uint16_t));
982287197Sglebius			ieee80211_tx_complete(ni, bf->bf_m,
983287197Sglebius			    (status & MALO_TXD_STATUS_OK) == 0);
984287197Sglebius		} else
985287197Sglebius			m_freem(bf->bf_m);
986287197Sglebius
987177595Sweongyo		ds->status = htole32(MALO_TXD_STATUS_IDLE);
988177595Sweongyo		ds->pktlen = htole32(0);
989177595Sweongyo
990177595Sweongyo		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
991177595Sweongyo		    BUS_DMASYNC_POSTWRITE);
992177595Sweongyo		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
993177595Sweongyo		bf->bf_m = NULL;
994177595Sweongyo		bf->bf_node = NULL;
995177595Sweongyo
996177595Sweongyo		MALO_TXQ_LOCK(txq);
997177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
998177595Sweongyo		txq->nfree++;
999177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1000177595Sweongyo	}
1001177595Sweongyo	return nreaped;
1002177595Sweongyo}
1003177595Sweongyo
1004177595Sweongyo/*
1005177595Sweongyo * Deferred processing of transmit interrupt.
1006177595Sweongyo */
1007177595Sweongyostatic void
1008177595Sweongyomalo_tx_proc(void *arg, int npending)
1009177595Sweongyo{
1010177595Sweongyo	struct malo_softc *sc = arg;
1011177595Sweongyo	int i, nreaped;
1012177595Sweongyo
1013177595Sweongyo	/*
1014177595Sweongyo	 * Process each active queue.
1015177595Sweongyo	 */
1016177595Sweongyo	nreaped = 0;
1017287197Sglebius	MALO_LOCK(sc);
1018177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1019177595Sweongyo		if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1020177595Sweongyo			nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1021177595Sweongyo	}
1022177595Sweongyo
1023177595Sweongyo	if (nreaped != 0) {
1024199559Sjhb		sc->malo_timer = 0;
1025287197Sglebius		malo_start(sc);
1026177595Sweongyo	}
1027287197Sglebius	MALO_UNLOCK(sc);
1028177595Sweongyo}
1029177595Sweongyo
1030177595Sweongyostatic int
1031177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1032177595Sweongyo    struct malo_txbuf *bf, struct mbuf *m0)
1033177595Sweongyo{
1034177595Sweongyo#define	IS_DATA_FRAME(wh)						\
1035177595Sweongyo	((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1036177595Sweongyo	int error, ismcast, iswep;
1037177595Sweongyo	int copyhdrlen, hdrlen, pktlen;
1038177595Sweongyo	struct ieee80211_frame *wh;
1039287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
1040192468Ssam	struct ieee80211vap *vap = ni->ni_vap;
1041177595Sweongyo	struct malo_txdesc *ds;
1042177595Sweongyo	struct malo_txrec *tr;
1043177595Sweongyo	struct malo_txq *txq;
1044177595Sweongyo	uint16_t qos;
1045177595Sweongyo
1046177595Sweongyo	wh = mtod(m0, struct ieee80211_frame *);
1047260444Skevlo	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1048177595Sweongyo	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1049177595Sweongyo	copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1050177595Sweongyo	pktlen = m0->m_pkthdr.len;
1051177595Sweongyo	if (IEEE80211_QOS_HAS_SEQ(wh)) {
1052344969Savos		qos = *(uint16_t *)ieee80211_getqos(wh);
1053344969Savos		if (IEEE80211_IS_DSTODS(wh))
1054177595Sweongyo			copyhdrlen -= sizeof(qos);
1055177595Sweongyo	} else
1056177595Sweongyo		qos = 0;
1057177595Sweongyo
1058177595Sweongyo	if (iswep) {
1059177595Sweongyo		struct ieee80211_key *k;
1060177595Sweongyo
1061177595Sweongyo		/*
1062177595Sweongyo		 * Construct the 802.11 header+trailer for an encrypted
1063177595Sweongyo		 * frame. The only reason this can fail is because of an
1064177595Sweongyo		 * unknown or unsupported cipher/key type.
1065177595Sweongyo		 *
1066177595Sweongyo		 * NB: we do this even though the firmware will ignore
1067177595Sweongyo		 *     what we've done for WEP and TKIP as we need the
1068177595Sweongyo		 *     ExtIV filled in for CCMP and this also adjusts
1069177595Sweongyo		 *     the headers which simplifies our work below.
1070177595Sweongyo		 */
1071178354Ssam		k = ieee80211_crypto_encap(ni, m0);
1072177595Sweongyo		if (k == NULL) {
1073177595Sweongyo			/*
1074177595Sweongyo			 * This can happen when the key is yanked after the
1075177595Sweongyo			 * frame was queued.  Just discard the frame; the
1076177595Sweongyo			 * 802.11 layer counts failures and provides
1077177595Sweongyo			 * debugging/diagnostics.
1078177595Sweongyo			 */
1079177595Sweongyo			m_freem(m0);
1080177595Sweongyo			return EIO;
1081177595Sweongyo		}
1082177595Sweongyo
1083177595Sweongyo		/*
1084177595Sweongyo		 * Adjust the packet length for the crypto additions
1085177595Sweongyo		 * done during encap and any other bits that the f/w
1086177595Sweongyo		 * will add later on.
1087177595Sweongyo		 */
1088177595Sweongyo		pktlen = m0->m_pkthdr.len;
1089177595Sweongyo
1090177595Sweongyo		/* packet header may have moved, reset our local pointer */
1091177595Sweongyo		wh = mtod(m0, struct ieee80211_frame *);
1092177595Sweongyo	}
1093177595Sweongyo
1094192468Ssam	if (ieee80211_radiotap_active_vap(vap)) {
1095177595Sweongyo		sc->malo_tx_th.wt_flags = 0;	/* XXX */
1096177595Sweongyo		if (iswep)
1097177595Sweongyo			sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1098177595Sweongyo		sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1099177595Sweongyo		sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1100177595Sweongyo
1101192468Ssam		ieee80211_radiotap_tx(vap, m0);
1102177595Sweongyo	}
1103177595Sweongyo
1104177595Sweongyo	/*
1105177595Sweongyo	 * Copy up/down the 802.11 header; the firmware requires
1106177595Sweongyo	 * we present a 2-byte payload length followed by a
1107177595Sweongyo	 * 4-address header (w/o QoS), followed (optionally) by
1108177595Sweongyo	 * any WEP/ExtIV header (but only filled in for CCMP).
1109177595Sweongyo	 * We are assured the mbuf has sufficient headroom to
1110177595Sweongyo	 * prepend in-place by the setup of ic_headroom in
1111177595Sweongyo	 * malo_attach.
1112177595Sweongyo	 */
1113177595Sweongyo	if (hdrlen < sizeof(struct malo_txrec)) {
1114177595Sweongyo		const int space = sizeof(struct malo_txrec) - hdrlen;
1115177595Sweongyo		if (M_LEADINGSPACE(m0) < space) {
1116177595Sweongyo			/* NB: should never happen */
1117177595Sweongyo			device_printf(sc->malo_dev,
1118177595Sweongyo			    "not enough headroom, need %d found %zd, "
1119177595Sweongyo			    "m_flags 0x%x m_len %d\n",
1120177595Sweongyo			    space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1121177595Sweongyo			ieee80211_dump_pkt(ic,
1122177595Sweongyo			    mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1123177595Sweongyo			m_freem(m0);
1124177595Sweongyo			/* XXX stat */
1125177595Sweongyo			return EIO;
1126177595Sweongyo		}
1127177595Sweongyo		M_PREPEND(m0, space, M_NOWAIT);
1128177595Sweongyo	}
1129177595Sweongyo	tr = mtod(m0, struct malo_txrec *);
1130177595Sweongyo	if (wh != (struct ieee80211_frame *) &tr->wh)
1131177595Sweongyo		ovbcopy(wh, &tr->wh, hdrlen);
1132177595Sweongyo	/*
1133177595Sweongyo	 * Note: the "firmware length" is actually the length of the fully
1134177595Sweongyo	 * formed "802.11 payload".  That is, it's everything except for
1135177595Sweongyo	 * the 802.11 header.  In particular this includes all crypto
1136177595Sweongyo	 * material including the MIC!
1137177595Sweongyo	 */
1138177595Sweongyo	tr->fwlen = htole16(pktlen - hdrlen);
1139177595Sweongyo
1140177595Sweongyo	/*
1141177595Sweongyo	 * Load the DMA map so any coalescing is done.  This
1142177595Sweongyo	 * also calculates the number of descriptors we need.
1143177595Sweongyo	 */
1144177595Sweongyo	error = malo_tx_dmasetup(sc, bf, m0);
1145177595Sweongyo	if (error != 0)
1146177595Sweongyo		return error;
1147177595Sweongyo	bf->bf_node = ni;			/* NB: held reference */
1148177595Sweongyo	m0 = bf->bf_m;				/* NB: may have changed */
1149177595Sweongyo	tr = mtod(m0, struct malo_txrec *);
1150177595Sweongyo	wh = (struct ieee80211_frame *)&tr->wh;
1151177595Sweongyo
1152177595Sweongyo	/*
1153177595Sweongyo	 * Formulate tx descriptor.
1154177595Sweongyo	 */
1155177595Sweongyo	ds = bf->bf_desc;
1156177595Sweongyo	txq = bf->bf_txq;
1157177595Sweongyo
1158177595Sweongyo	ds->qosctrl = qos;			/* NB: already little-endian */
1159177595Sweongyo	ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1160177595Sweongyo	ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1161177595Sweongyo	/* NB: pPhysNext setup once, don't touch */
1162177595Sweongyo	ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1163177595Sweongyo	ds->sap_pktinfo = 0;
1164177595Sweongyo	ds->format = 0;
1165177595Sweongyo
1166177595Sweongyo	/*
1167177595Sweongyo	 * Select transmit rate.
1168177595Sweongyo	 */
1169177595Sweongyo	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1170177595Sweongyo	case IEEE80211_FC0_TYPE_MGT:
1171177595Sweongyo		sc->malo_stats.mst_tx_mgmt++;
1172177595Sweongyo		/* fall thru... */
1173177595Sweongyo	case IEEE80211_FC0_TYPE_CTL:
1174177595Sweongyo		ds->txpriority = 1;
1175177595Sweongyo		break;
1176177595Sweongyo	case IEEE80211_FC0_TYPE_DATA:
1177177595Sweongyo		ds->txpriority = txq->qnum;
1178177595Sweongyo		break;
1179177595Sweongyo	default:
1180287197Sglebius		device_printf(sc->malo_dev, "bogus frame type 0x%x (%s)\n",
1181177595Sweongyo			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1182177595Sweongyo		/* XXX statistic */
1183177595Sweongyo		m_freem(m0);
1184177595Sweongyo		return EIO;
1185177595Sweongyo	}
1186177595Sweongyo
1187177595Sweongyo#ifdef MALO_DEBUG
1188177595Sweongyo	if (IFF_DUMPPKTS_XMIT(sc))
1189177595Sweongyo		ieee80211_dump_pkt(ic,
1190177595Sweongyo		    mtod(m0, const uint8_t *)+sizeof(uint16_t),
1191177595Sweongyo		    m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1192177595Sweongyo#endif
1193177595Sweongyo
1194177595Sweongyo	MALO_TXQ_LOCK(txq);
1195177595Sweongyo	if (!IS_DATA_FRAME(wh))
1196177595Sweongyo		ds->status |= htole32(1);
1197177595Sweongyo	ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1198177595Sweongyo	STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1199177595Sweongyo	MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1200177595Sweongyo
1201199559Sjhb	sc->malo_timer = 5;
1202177595Sweongyo	MALO_TXQ_UNLOCK(txq);
1203177595Sweongyo	return 0;
1204177595Sweongyo}
1205177595Sweongyo
1206287197Sglebiusstatic int
1207287197Sglebiusmalo_transmit(struct ieee80211com *ic, struct mbuf *m)
1208287197Sglebius{
1209287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1210287197Sglebius	int error;
1211287197Sglebius
1212287197Sglebius	MALO_LOCK(sc);
1213287197Sglebius	if (!sc->malo_running) {
1214287197Sglebius		MALO_UNLOCK(sc);
1215287197Sglebius		return (ENXIO);
1216287197Sglebius	}
1217287197Sglebius	error = mbufq_enqueue(&sc->malo_snd, m);
1218287197Sglebius	if (error) {
1219287197Sglebius		MALO_UNLOCK(sc);
1220287197Sglebius		return (error);
1221287197Sglebius	}
1222287197Sglebius	malo_start(sc);
1223287197Sglebius	MALO_UNLOCK(sc);
1224287197Sglebius	return (0);
1225287197Sglebius}
1226287197Sglebius
1227177595Sweongyostatic void
1228287197Sglebiusmalo_start(struct malo_softc *sc)
1229177595Sweongyo{
1230177595Sweongyo	struct ieee80211_node *ni;
1231178354Ssam	struct malo_txq *txq = &sc->malo_txq[0];
1232177595Sweongyo	struct malo_txbuf *bf = NULL;
1233177595Sweongyo	struct mbuf *m;
1234178354Ssam	int nqueued = 0;
1235177595Sweongyo
1236287197Sglebius	MALO_LOCK_ASSERT(sc);
1237287197Sglebius
1238287197Sglebius	if (!sc->malo_running || sc->malo_invalid)
1239177595Sweongyo		return;
1240177595Sweongyo
1241287197Sglebius	while ((m = mbufq_dequeue(&sc->malo_snd)) != NULL) {
1242178354Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1243178354Ssam		bf = malo_getbuf(sc, txq);
1244178354Ssam		if (bf == NULL) {
1245287197Sglebius			mbufq_prepend(&sc->malo_snd, m);
1246178354Ssam			sc->malo_stats.mst_tx_qstop++;
1247178354Ssam			break;
1248178354Ssam		}
1249177595Sweongyo		/*
1250177595Sweongyo		 * Pass the frame to the h/w for transmission.
1251177595Sweongyo		 */
1252177595Sweongyo		if (malo_tx_start(sc, ni, bf, m)) {
1253287197Sglebius			if_inc_counter(ni->ni_vap->iv_ifp,
1254287197Sglebius			    IFCOUNTER_OERRORS, 1);
1255177595Sweongyo			if (bf != NULL) {
1256177595Sweongyo				bf->bf_m = NULL;
1257177595Sweongyo				bf->bf_node = NULL;
1258177595Sweongyo				MALO_TXQ_LOCK(txq);
1259177595Sweongyo				STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1260177595Sweongyo				MALO_TXQ_UNLOCK(txq);
1261177595Sweongyo			}
1262177595Sweongyo			ieee80211_free_node(ni);
1263177595Sweongyo			continue;
1264177595Sweongyo		}
1265177595Sweongyo		nqueued++;
1266177595Sweongyo
1267177595Sweongyo		if (nqueued >= malo_txcoalesce) {
1268177595Sweongyo			/*
1269177595Sweongyo			 * Poke the firmware to process queued frames;
1270177595Sweongyo			 * see below about (lack of) locking.
1271177595Sweongyo			 */
1272177595Sweongyo			nqueued = 0;
1273177595Sweongyo			malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1274177595Sweongyo		}
1275177595Sweongyo	}
1276177595Sweongyo
1277177595Sweongyo	if (nqueued) {
1278177595Sweongyo		/*
1279177595Sweongyo		 * NB: We don't need to lock against tx done because
1280177595Sweongyo		 * this just prods the firmware to check the transmit
1281177595Sweongyo		 * descriptors.  The firmware will also start fetching
1282177595Sweongyo		 * descriptors by itself if it notices new ones are
1283177595Sweongyo		 * present when it goes to deliver a tx done interrupt
1284177595Sweongyo		 * to the host. So if we race with tx done processing
1285177595Sweongyo		 * it's ok.  Delivering the kick here rather than in
1286177595Sweongyo		 * malo_tx_start is an optimization to avoid poking the
1287177595Sweongyo		 * firmware for each packet.
1288177595Sweongyo		 *
1289177595Sweongyo		 * NB: the queue id isn't used so 0 is ok.
1290177595Sweongyo		 */
1291177595Sweongyo		malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1292177595Sweongyo	}
1293177595Sweongyo}
1294177595Sweongyo
1295177595Sweongyostatic void
1296199559Sjhbmalo_watchdog(void *arg)
1297177595Sweongyo{
1298287197Sglebius	struct malo_softc *sc = arg;
1299177595Sweongyo
1300199559Sjhb	callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1301199559Sjhb	if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1302199559Sjhb		return;
1303199559Sjhb
1304287197Sglebius	if (sc->malo_running && !sc->malo_invalid) {
1305287197Sglebius		device_printf(sc->malo_dev, "watchdog timeout\n");
1306177595Sweongyo
1307177595Sweongyo		/* XXX no way to reset h/w. now  */
1308177595Sweongyo
1309287197Sglebius		counter_u64_add(sc->malo_ic.ic_oerrors, 1);
1310177595Sweongyo		sc->malo_stats.mst_watchdog++;
1311177595Sweongyo	}
1312177595Sweongyo}
1313177595Sweongyo
1314177595Sweongyostatic int
1315177595Sweongyomalo_hal_reset(struct malo_softc *sc)
1316177595Sweongyo{
1317177595Sweongyo	static int first = 0;
1318287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
1319177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1320177595Sweongyo
1321177595Sweongyo	if (first == 0) {
1322177595Sweongyo		/*
1323177595Sweongyo		 * NB: when the device firstly is initialized, sometimes
1324177595Sweongyo		 * firmware could override rx/tx dma registers so we re-set
1325177595Sweongyo		 * these values once.
1326177595Sweongyo		 */
1327177595Sweongyo		malo_hal_set_rxtxdma(sc);
1328177595Sweongyo		first = 1;
1329177595Sweongyo	}
1330177595Sweongyo
1331177595Sweongyo	malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1332177595Sweongyo	malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1333177595Sweongyo	malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1334177595Sweongyo	malo_chan_set(sc, ic->ic_curchan);
1335177595Sweongyo
1336177595Sweongyo	/* XXX needs other stuffs?  */
1337177595Sweongyo
1338177595Sweongyo	return 1;
1339177595Sweongyo}
1340177595Sweongyo
1341177595Sweongyostatic __inline struct mbuf *
1342177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1343177595Sweongyo{
1344177595Sweongyo	struct mbuf *m;
1345177595Sweongyo	bus_addr_t paddr;
1346177595Sweongyo	int error;
1347177595Sweongyo
1348177595Sweongyo	/* XXX don't need mbuf, just dma buffer */
1349243857Sglebius	m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1350177595Sweongyo	if (m == NULL) {
1351177595Sweongyo		sc->malo_stats.mst_rx_nombuf++;	/* XXX */
1352177595Sweongyo		return NULL;
1353177595Sweongyo	}
1354177595Sweongyo	error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1355177595Sweongyo	    mtod(m, caddr_t), MJUMPAGESIZE,
1356177595Sweongyo	    malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1357177595Sweongyo	if (error != 0) {
1358287197Sglebius		device_printf(sc->malo_dev,
1359177595Sweongyo		    "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1360177595Sweongyo		m_freem(m);
1361177595Sweongyo		return NULL;
1362177595Sweongyo	}
1363177595Sweongyo	bf->bf_data = paddr;
1364177595Sweongyo	bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1365177595Sweongyo
1366177595Sweongyo	return m;
1367177595Sweongyo}
1368177595Sweongyo
1369177595Sweongyostatic int
1370177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1371177595Sweongyo{
1372177595Sweongyo	struct malo_rxdesc *ds;
1373177595Sweongyo
1374177595Sweongyo	ds = bf->bf_desc;
1375177595Sweongyo	if (bf->bf_m == NULL) {
1376177595Sweongyo		bf->bf_m = malo_getrxmbuf(sc, bf);
1377177595Sweongyo		if (bf->bf_m == NULL) {
1378177595Sweongyo			/* mark descriptor to be skipped */
1379177595Sweongyo			ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1380177595Sweongyo			/* NB: don't need PREREAD */
1381177595Sweongyo			MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1382177595Sweongyo			return ENOMEM;
1383177595Sweongyo		}
1384177595Sweongyo	}
1385177595Sweongyo
1386177595Sweongyo	/*
1387177595Sweongyo	 * Setup descriptor.
1388177595Sweongyo	 */
1389177595Sweongyo	ds->qosctrl = 0;
1390177595Sweongyo	ds->snr = 0;
1391177595Sweongyo	ds->status = MALO_RXD_STATUS_IDLE;
1392177595Sweongyo	ds->channel = 0;
1393177595Sweongyo	ds->pktlen = htole16(MALO_RXSIZE);
1394177595Sweongyo	ds->nf = 0;
1395177595Sweongyo	ds->physbuffdata = htole32(bf->bf_data);
1396177595Sweongyo	/* NB: don't touch pPhysNext, set once */
1397177595Sweongyo	ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1398177595Sweongyo	MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1399177595Sweongyo
1400177595Sweongyo	return 0;
1401177595Sweongyo}
1402177595Sweongyo
1403177595Sweongyo/*
1404177595Sweongyo * Setup the rx data structures.  This should only be done once or we may get
1405177595Sweongyo * out of sync with the firmware.
1406177595Sweongyo */
1407177595Sweongyostatic int
1408177595Sweongyomalo_startrecv(struct malo_softc *sc)
1409177595Sweongyo{
1410177595Sweongyo	struct malo_rxbuf *bf, *prev;
1411177595Sweongyo	struct malo_rxdesc *ds;
1412177595Sweongyo
1413177595Sweongyo	if (sc->malo_recvsetup == 1) {
1414177595Sweongyo		malo_mode_init(sc);		/* set filters, etc. */
1415177595Sweongyo		return 0;
1416177595Sweongyo	}
1417177595Sweongyo
1418177595Sweongyo	prev = NULL;
1419177595Sweongyo	STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1420177595Sweongyo		int error = malo_rxbuf_init(sc, bf);
1421177595Sweongyo		if (error != 0) {
1422177595Sweongyo			DPRINTF(sc, MALO_DEBUG_RECV,
1423177595Sweongyo			    "%s: malo_rxbuf_init failed %d\n",
1424177595Sweongyo			    __func__, error);
1425177595Sweongyo			return error;
1426177595Sweongyo		}
1427177595Sweongyo		if (prev != NULL) {
1428177595Sweongyo			ds = prev->bf_desc;
1429177595Sweongyo			ds->physnext = htole32(bf->bf_daddr);
1430177595Sweongyo		}
1431177595Sweongyo		prev = bf;
1432177595Sweongyo	}
1433177595Sweongyo	if (prev != NULL) {
1434177595Sweongyo		ds = prev->bf_desc;
1435177595Sweongyo		ds->physnext =
1436177595Sweongyo		    htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1437177595Sweongyo	}
1438177595Sweongyo
1439177595Sweongyo	sc->malo_recvsetup = 1;
1440177595Sweongyo
1441177595Sweongyo	malo_mode_init(sc);		/* set filters, etc. */
1442177595Sweongyo
1443177595Sweongyo	return 0;
1444177595Sweongyo}
1445177595Sweongyo
1446177595Sweongyostatic void
1447178354Ssammalo_init_locked(struct malo_softc *sc)
1448177595Sweongyo{
1449177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1450177595Sweongyo	int error;
1451177595Sweongyo
1452178354Ssam	MALO_LOCK_ASSERT(sc);
1453177595Sweongyo
1454177595Sweongyo	/*
1455177595Sweongyo	 * Stop anything previously setup.  This is safe whether this is
1456177595Sweongyo	 * the first time through or not.
1457177595Sweongyo	 */
1458287197Sglebius	malo_stop(sc);
1459177595Sweongyo
1460177595Sweongyo	/*
1461177595Sweongyo	 * Push state to the firmware.
1462177595Sweongyo	 */
1463177595Sweongyo	if (!malo_hal_reset(sc)) {
1464287197Sglebius		device_printf(sc->malo_dev,
1465287197Sglebius		    "%s: unable to reset hardware\n", __func__);
1466178354Ssam		return;
1467177595Sweongyo	}
1468177595Sweongyo
1469177595Sweongyo	/*
1470177595Sweongyo	 * Setup recv (once); transmit is already good to go.
1471177595Sweongyo	 */
1472177595Sweongyo	error = malo_startrecv(sc);
1473177595Sweongyo	if (error != 0) {
1474287197Sglebius		device_printf(sc->malo_dev,
1475287197Sglebius		    "%s: unable to start recv logic, error %d\n",
1476177595Sweongyo		    __func__, error);
1477178354Ssam		return;
1478177595Sweongyo	}
1479177595Sweongyo
1480177595Sweongyo	/*
1481177595Sweongyo	 * Enable interrupts.
1482177595Sweongyo	 */
1483177595Sweongyo	sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1484177595Sweongyo	    | MALO_A2HRIC_BIT_TX_DONE
1485177595Sweongyo	    | MALO_A2HRIC_BIT_OPC_DONE
1486177595Sweongyo	    | MALO_A2HRIC_BIT_MAC_EVENT
1487177595Sweongyo	    | MALO_A2HRIC_BIT_RX_PROBLEM
1488177595Sweongyo	    | MALO_A2HRIC_BIT_ICV_ERROR
1489177595Sweongyo	    | MALO_A2HRIC_BIT_RADAR_DETECT
1490177595Sweongyo	    | MALO_A2HRIC_BIT_CHAN_SWITCH;
1491177595Sweongyo
1492287197Sglebius	sc->malo_running = 1;
1493177595Sweongyo	malo_hal_intrset(mh, sc->malo_imask);
1494199559Sjhb	callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1495178354Ssam}
1496177595Sweongyo
1497178354Ssamstatic void
1498178354Ssammalo_init(void *arg)
1499178354Ssam{
1500178354Ssam	struct malo_softc *sc = (struct malo_softc *) arg;
1501287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
1502178354Ssam
1503178354Ssam	MALO_LOCK(sc);
1504178354Ssam	malo_init_locked(sc);
1505177595Sweongyo	MALO_UNLOCK(sc);
1506177595Sweongyo
1507287197Sglebius	if (sc->malo_running)
1508178354Ssam		ieee80211_start_all(ic);	/* start all vap's */
1509177595Sweongyo}
1510177595Sweongyo
1511177595Sweongyo/*
1512177595Sweongyo * Set the multicast filter contents into the hardware.
1513177595Sweongyo */
1514177595Sweongyostatic void
1515177595Sweongyomalo_setmcastfilter(struct malo_softc *sc)
1516177595Sweongyo{
1517287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
1518287197Sglebius	struct ieee80211vap *vap;
1519177595Sweongyo	uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1520177595Sweongyo	uint8_t *mp;
1521177595Sweongyo	int nmc;
1522177595Sweongyo
1523177595Sweongyo	mp = macs;
1524177595Sweongyo	nmc = 0;
1525177595Sweongyo
1526287197Sglebius	if (ic->ic_opmode == IEEE80211_M_MONITOR || ic->ic_allmulti > 0 ||
1527287197Sglebius	    ic->ic_promisc > 0)
1528177595Sweongyo		goto all;
1529177595Sweongyo
1530287197Sglebius	TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) {
1531287197Sglebius		struct ifnet *ifp;
1532287197Sglebius		struct ifmultiaddr *ifma;
1533287197Sglebius
1534287197Sglebius		ifp = vap->iv_ifp;
1535287197Sglebius		if_maddr_rlock(ifp);
1536287197Sglebius		TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1537287197Sglebius			if (ifma->ifma_addr->sa_family != AF_LINK)
1538287197Sglebius				continue;
1539287197Sglebius
1540287197Sglebius			if (nmc == MALO_HAL_MCAST_MAX) {
1541287197Sglebius				ifp->if_flags |= IFF_ALLMULTI;
1542287197Sglebius				if_maddr_runlock(ifp);
1543287197Sglebius				goto all;
1544287197Sglebius			}
1545287197Sglebius			IEEE80211_ADDR_COPY(mp,
1546287197Sglebius			    LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
1547287197Sglebius
1548287197Sglebius			mp += IEEE80211_ADDR_LEN, nmc++;
1549286437Sadrian		}
1550287197Sglebius		if_maddr_runlock(ifp);
1551177595Sweongyo	}
1552177595Sweongyo
1553177595Sweongyo	malo_hal_setmcast(sc->malo_mh, nmc, macs);
1554177595Sweongyo
1555177595Sweongyoall:
1556177595Sweongyo	/*
1557177595Sweongyo	 * XXX we don't know how to set the f/w for supporting
1558177595Sweongyo	 * IFF_ALLMULTI | IFF_PROMISC cases
1559177595Sweongyo	 */
1560177595Sweongyo	return;
1561177595Sweongyo}
1562177595Sweongyo
1563177595Sweongyostatic int
1564177595Sweongyomalo_mode_init(struct malo_softc *sc)
1565177595Sweongyo{
1566287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
1567177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1568177595Sweongyo
1569298389Savos	malo_hal_setpromisc(mh, ic->ic_promisc > 0);
1570177595Sweongyo	malo_setmcastfilter(sc);
1571177595Sweongyo
1572177595Sweongyo	return ENXIO;
1573177595Sweongyo}
1574177595Sweongyo
1575177595Sweongyostatic void
1576177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1577177595Sweongyo{
1578177595Sweongyo	struct ieee80211_node *ni;
1579177595Sweongyo	struct malo_txbuf *bf;
1580177595Sweongyo	u_int ix;
1581177595Sweongyo
1582177595Sweongyo	/*
1583177595Sweongyo	 * NB: this assumes output has been stopped and
1584177595Sweongyo	 *     we do not need to block malo_tx_tasklet
1585177595Sweongyo	 */
1586177595Sweongyo	for (ix = 0;; ix++) {
1587177595Sweongyo		MALO_TXQ_LOCK(txq);
1588177595Sweongyo		bf = STAILQ_FIRST(&txq->active);
1589177595Sweongyo		if (bf == NULL) {
1590177595Sweongyo			MALO_TXQ_UNLOCK(txq);
1591177595Sweongyo			break;
1592177595Sweongyo		}
1593177595Sweongyo		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1594177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1595177595Sweongyo#ifdef MALO_DEBUG
1596177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_RESET) {
1597287197Sglebius			struct ieee80211com *ic = &sc->malo_ic;
1598177595Sweongyo			const struct malo_txrec *tr =
1599177595Sweongyo			    mtod(bf->bf_m, const struct malo_txrec *);
1600177595Sweongyo			malo_printtxbuf(bf, txq->qnum, ix);
1601178354Ssam			ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1602177595Sweongyo			    bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1603177595Sweongyo		}
1604177595Sweongyo#endif /* MALO_DEBUG */
1605177595Sweongyo		bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1606177595Sweongyo		ni = bf->bf_node;
1607177595Sweongyo		bf->bf_node = NULL;
1608177595Sweongyo		if (ni != NULL) {
1609177595Sweongyo			/*
1610177595Sweongyo			 * Reclaim node reference.
1611177595Sweongyo			 */
1612177595Sweongyo			ieee80211_free_node(ni);
1613177595Sweongyo		}
1614177595Sweongyo		m_freem(bf->bf_m);
1615177595Sweongyo		bf->bf_m = NULL;
1616177595Sweongyo
1617177595Sweongyo		MALO_TXQ_LOCK(txq);
1618177595Sweongyo		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1619177595Sweongyo		txq->nfree++;
1620177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1621177595Sweongyo	}
1622177595Sweongyo}
1623177595Sweongyo
1624177595Sweongyostatic void
1625287197Sglebiusmalo_stop(struct malo_softc *sc)
1626177595Sweongyo{
1627177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1628178354Ssam	int i;
1629177595Sweongyo
1630287197Sglebius	DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u running %u\n",
1631287197Sglebius	    __func__, sc->malo_invalid, sc->malo_running);
1632177595Sweongyo
1633177595Sweongyo	MALO_LOCK_ASSERT(sc);
1634177595Sweongyo
1635287197Sglebius	if (!sc->malo_running)
1636177595Sweongyo		return;
1637177595Sweongyo
1638177595Sweongyo	/*
1639177595Sweongyo	 * Shutdown the hardware and driver:
1640177595Sweongyo	 *    disable interrupts
1641177595Sweongyo	 *    turn off the radio
1642177595Sweongyo	 *    drain and release tx queues
1643177595Sweongyo	 *
1644177595Sweongyo	 * Note that some of this work is not possible if the hardware
1645177595Sweongyo	 * is gone (invalid).
1646177595Sweongyo	 */
1647287197Sglebius	sc->malo_running = 0;
1648199559Sjhb	callout_stop(&sc->malo_watchdog_timer);
1649199559Sjhb	sc->malo_timer = 0;
1650287197Sglebius	/* disable interrupt.  */
1651178354Ssam	malo_hal_intrset(mh, 0);
1652178354Ssam	/* turn off the radio.  */
1653178354Ssam	malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1654177595Sweongyo
1655177595Sweongyo	/* drain and release tx queues.  */
1656177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1657177595Sweongyo		malo_tx_draintxq(sc, &sc->malo_txq[i]);
1658177595Sweongyo}
1659177595Sweongyo
1660287197Sglebiusstatic void
1661287197Sglebiusmalo_parent(struct ieee80211com *ic)
1662177595Sweongyo{
1663287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1664287197Sglebius	int startall = 0;
1665177595Sweongyo
1666177595Sweongyo	MALO_LOCK(sc);
1667287197Sglebius	if (ic->ic_nrunning > 0) {
1668287197Sglebius		/*
1669287197Sglebius		 * Beware of being called during attach/detach
1670287197Sglebius		 * to reset promiscuous mode.  In that case we
1671287197Sglebius		 * will still be marked UP but not RUNNING.
1672287197Sglebius		 * However trying to re-init the interface
1673287197Sglebius		 * is the wrong thing to do as we've already
1674287197Sglebius		 * torn down much of our state.  There's
1675287197Sglebius		 * probably a better way to deal with this.
1676287197Sglebius		 */
1677287197Sglebius		if (!sc->malo_running && !sc->malo_invalid) {
1678287197Sglebius			malo_init(sc);
1679287197Sglebius			startall = 1;
1680287197Sglebius		}
1681287197Sglebius		/*
1682287197Sglebius		 * To avoid rescanning another access point,
1683287197Sglebius		 * do not call malo_init() here.  Instead,
1684287197Sglebius		 * only reflect promisc mode settings.
1685287197Sglebius		 */
1686287197Sglebius		malo_mode_init(sc);
1687287197Sglebius	} else if (sc->malo_running)
1688287197Sglebius		malo_stop(sc);
1689177595Sweongyo	MALO_UNLOCK(sc);
1690178354Ssam	if (startall)
1691178354Ssam		ieee80211_start_all(ic);
1692177595Sweongyo}
1693177595Sweongyo
1694177595Sweongyo/*
1695177595Sweongyo * Callback from the 802.11 layer to update the slot time
1696177595Sweongyo * based on the current setting.  We use it to notify the
1697177595Sweongyo * firmware of ERP changes and the f/w takes care of things
1698177595Sweongyo * like slot time and preamble.
1699177595Sweongyo */
1700177595Sweongyostatic void
1701283540Sglebiusmalo_updateslot(struct ieee80211com *ic)
1702177595Sweongyo{
1703283540Sglebius	struct malo_softc *sc = ic->ic_softc;
1704177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1705177595Sweongyo	int error;
1706177595Sweongyo
1707177595Sweongyo	/* NB: can be called early; suppress needless cmds */
1708287197Sglebius	if (!sc->malo_running)
1709177595Sweongyo		return;
1710177595Sweongyo
1711177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET,
1712177595Sweongyo	    "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1713177595Sweongyo	    __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1714177595Sweongyo	    ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1715177595Sweongyo
1716177595Sweongyo	if (ic->ic_flags & IEEE80211_F_SHSLOT)
1717177595Sweongyo		error = malo_hal_set_slot(mh, 1);
1718177595Sweongyo	else
1719177595Sweongyo		error = malo_hal_set_slot(mh, 0);
1720177595Sweongyo
1721177595Sweongyo	if (error != 0)
1722177595Sweongyo		device_printf(sc->malo_dev, "setting %s slot failed\n",
1723177595Sweongyo			ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1724177595Sweongyo}
1725177595Sweongyo
1726177595Sweongyostatic int
1727178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1728177595Sweongyo{
1729178354Ssam	struct ieee80211com *ic = vap->iv_ic;
1730287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1731177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1732177595Sweongyo	int error;
1733177595Sweongyo
1734177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1735178354Ssam	    ieee80211_state_name[vap->iv_state],
1736177595Sweongyo	    ieee80211_state_name[nstate]);
1737177595Sweongyo
1738177595Sweongyo	/*
1739178354Ssam	 * Invoke the net80211 layer first so iv_bss is setup.
1740177595Sweongyo	 */
1741178354Ssam	error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1742178354Ssam	if (error != 0)
1743178354Ssam		return error;
1744178354Ssam
1745178354Ssam	if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1746178354Ssam		struct ieee80211_node *ni = vap->iv_bss;
1747178354Ssam		enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1748178354Ssam		const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1749178354Ssam
1750177595Sweongyo		DPRINTF(sc, MALO_DEBUG_STATE,
1751178354Ssam		    "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1752178354Ssam		    "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1753178354Ssam		    vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1754177595Sweongyo		    ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1755178354Ssam		    ieee80211_chan2ieee(ic, ic->ic_curchan),
1756178354Ssam		    ni->ni_associd, mode, tp->ucastrate);
1757177595Sweongyo
1758178354Ssam		malo_hal_setradio(mh, 1,
1759178354Ssam		    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1760178354Ssam			MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1761178354Ssam		malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1762178354Ssam		malo_hal_set_rate(mh, mode,
1763178354Ssam		   tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1764178354Ssam		       0 : malo_fix2rate(tp->ucastrate));
1765177595Sweongyo	}
1766178354Ssam	return 0;
1767177595Sweongyo}
1768177595Sweongyo
1769177595Sweongyostatic int
1770177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1771177595Sweongyo	const struct ieee80211_bpf_params *params)
1772177595Sweongyo{
1773177595Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1774287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1775177595Sweongyo	struct malo_txbuf *bf;
1776177595Sweongyo	struct malo_txq *txq;
1777177595Sweongyo
1778287197Sglebius	if (!sc->malo_running || sc->malo_invalid) {
1779177595Sweongyo		m_freem(m);
1780177595Sweongyo		return ENETDOWN;
1781177595Sweongyo	}
1782177595Sweongyo
1783177595Sweongyo	/*
1784177595Sweongyo	 * Grab a TX buffer and associated resources.  Note that we depend
1785177595Sweongyo	 * on the classification by the 802.11 layer to get to the right h/w
1786177595Sweongyo	 * queue.  Management frames must ALWAYS go on queue 1 but we
1787177595Sweongyo	 * cannot just force that here because we may receive non-mgt frames.
1788177595Sweongyo	 */
1789177595Sweongyo	txq = &sc->malo_txq[0];
1790177595Sweongyo	bf = malo_getbuf(sc, txq);
1791177595Sweongyo	if (bf == NULL) {
1792177595Sweongyo		m_freem(m);
1793177595Sweongyo		return ENOBUFS;
1794177595Sweongyo	}
1795177595Sweongyo
1796177595Sweongyo	/*
1797177595Sweongyo	 * Pass the frame to the h/w for transmission.
1798177595Sweongyo	 */
1799177595Sweongyo	if (malo_tx_start(sc, ni, bf, m) != 0) {
1800177595Sweongyo		bf->bf_m = NULL;
1801177595Sweongyo		bf->bf_node = NULL;
1802177595Sweongyo		MALO_TXQ_LOCK(txq);
1803177595Sweongyo		STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1804177595Sweongyo		txq->nfree++;
1805177595Sweongyo		MALO_TXQ_UNLOCK(txq);
1806177595Sweongyo
1807177595Sweongyo		return EIO;		/* XXX */
1808177595Sweongyo	}
1809177595Sweongyo
1810177595Sweongyo	/*
1811177595Sweongyo	 * NB: We don't need to lock against tx done because this just
1812177595Sweongyo	 * prods the firmware to check the transmit descriptors.  The firmware
1813177595Sweongyo	 * will also start fetching descriptors by itself if it notices
1814177595Sweongyo	 * new ones are present when it goes to deliver a tx done interrupt
1815177595Sweongyo	 * to the host. So if we race with tx done processing it's ok.
1816177595Sweongyo	 * Delivering the kick here rather than in malo_tx_start is
1817177595Sweongyo	 * an optimization to avoid poking the firmware for each packet.
1818177595Sweongyo	 *
1819177595Sweongyo	 * NB: the queue id isn't used so 0 is ok.
1820177595Sweongyo	 */
1821177595Sweongyo	malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1822177595Sweongyo
1823177595Sweongyo	return 0;
1824177595Sweongyo}
1825177595Sweongyo
1826177595Sweongyostatic void
1827177595Sweongyomalo_sysctlattach(struct malo_softc *sc)
1828177595Sweongyo{
1829177595Sweongyo#ifdef	MALO_DEBUG
1830177595Sweongyo	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1831177595Sweongyo	struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1832177595Sweongyo
1833177595Sweongyo	sc->malo_debug = malo_debug;
1834177595Sweongyo	SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1835177595Sweongyo		"debug", CTLFLAG_RW, &sc->malo_debug, 0,
1836177595Sweongyo		"control debugging printfs");
1837177595Sweongyo#endif
1838177595Sweongyo}
1839177595Sweongyo
1840177595Sweongyostatic void
1841177595Sweongyomalo_announce(struct malo_softc *sc)
1842177595Sweongyo{
1843177595Sweongyo
1844287197Sglebius	device_printf(sc->malo_dev,
1845287197Sglebius		"versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1846177595Sweongyo		sc->malo_hwspecs.hwversion,
1847177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1848177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1849177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1850177595Sweongyo		(sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1851177595Sweongyo		sc->malo_hwspecs.regioncode);
1852177595Sweongyo
1853177595Sweongyo	if (bootverbose || malo_rxbuf != MALO_RXBUF)
1854287197Sglebius		device_printf(sc->malo_dev,
1855287197Sglebius		    "using %u rx buffers\n", malo_rxbuf);
1856177595Sweongyo	if (bootverbose || malo_txbuf != MALO_TXBUF)
1857287197Sglebius		device_printf(sc->malo_dev,
1858287197Sglebius		    "using %u tx buffers\n", malo_txbuf);
1859177595Sweongyo}
1860177595Sweongyo
1861177595Sweongyo/*
1862177595Sweongyo * Convert net80211 channel to a HAL channel.
1863177595Sweongyo */
1864177595Sweongyostatic void
1865177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1866177595Sweongyo{
1867177595Sweongyo	hc->channel = chan->ic_ieee;
1868177595Sweongyo
1869177595Sweongyo	*(uint32_t *)&hc->flags = 0;
1870177595Sweongyo	if (IEEE80211_IS_CHAN_2GHZ(chan))
1871177595Sweongyo		hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1872177595Sweongyo}
1873177595Sweongyo
1874177595Sweongyo/*
1875177595Sweongyo * Set/change channels.  If the channel is really being changed,
1876177595Sweongyo * it's done by reseting the chip.  To accomplish this we must
1877177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la
1878177595Sweongyo * malo_init.
1879177595Sweongyo */
1880177595Sweongyostatic int
1881177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1882177595Sweongyo{
1883177595Sweongyo	struct malo_hal *mh = sc->malo_mh;
1884177595Sweongyo	struct malo_hal_channel hchan;
1885177595Sweongyo
1886177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1887177595Sweongyo	    __func__, chan->ic_freq, chan->ic_flags);
1888177595Sweongyo
1889177595Sweongyo	/*
1890177595Sweongyo	 * Convert to a HAL channel description with the flags constrained
1891177595Sweongyo	 * to reflect the current operating mode.
1892177595Sweongyo	 */
1893177595Sweongyo	malo_mapchan(&hchan, chan);
1894177595Sweongyo	malo_hal_intrset(mh, 0);		/* disable interrupts */
1895177595Sweongyo	malo_hal_setchannel(mh, &hchan);
1896177595Sweongyo	malo_hal_settxpower(mh, &hchan);
1897177595Sweongyo
1898177595Sweongyo	/*
1899177595Sweongyo	 * Update internal state.
1900177595Sweongyo	 */
1901177595Sweongyo	sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1902177595Sweongyo	sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1903177595Sweongyo	if (IEEE80211_IS_CHAN_ANYG(chan)) {
1904177595Sweongyo		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1905177595Sweongyo		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1906177595Sweongyo	} else {
1907177595Sweongyo		sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1908177595Sweongyo		sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1909177595Sweongyo	}
1910177595Sweongyo	sc->malo_curchan = hchan;
1911177595Sweongyo	malo_hal_intrset(mh, sc->malo_imask);
1912177595Sweongyo
1913177595Sweongyo	return 0;
1914177595Sweongyo}
1915177595Sweongyo
1916177595Sweongyostatic void
1917177595Sweongyomalo_scan_start(struct ieee80211com *ic)
1918177595Sweongyo{
1919287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1920177595Sweongyo
1921177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1922177595Sweongyo}
1923177595Sweongyo
1924177595Sweongyostatic void
1925177595Sweongyomalo_scan_end(struct ieee80211com *ic)
1926177595Sweongyo{
1927287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1928177595Sweongyo
1929177595Sweongyo	DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1930177595Sweongyo}
1931177595Sweongyo
1932177595Sweongyostatic void
1933177595Sweongyomalo_set_channel(struct ieee80211com *ic)
1934177595Sweongyo{
1935287197Sglebius	struct malo_softc *sc = ic->ic_softc;
1936177595Sweongyo
1937177595Sweongyo	(void) malo_chan_set(sc, ic->ic_curchan);
1938177595Sweongyo}
1939177595Sweongyo
1940177595Sweongyostatic void
1941177595Sweongyomalo_rx_proc(void *arg, int npending)
1942177595Sweongyo{
1943177595Sweongyo	struct malo_softc *sc = arg;
1944287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
1945177595Sweongyo	struct malo_rxbuf *bf;
1946177595Sweongyo	struct malo_rxdesc *ds;
1947177595Sweongyo	struct mbuf *m, *mnew;
1948177595Sweongyo	struct ieee80211_qosframe *wh;
1949177595Sweongyo	struct ieee80211_node *ni;
1950177595Sweongyo	int off, len, hdrlen, pktlen, rssi, ntodo;
1951177595Sweongyo	uint8_t *data, status;
1952177595Sweongyo	uint32_t readptr, writeptr;
1953177595Sweongyo
1954177595Sweongyo	DPRINTF(sc, MALO_DEBUG_RX_PROC,
1955177595Sweongyo	    "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
1956177595Sweongyo	    __func__, npending,
1957177595Sweongyo	    sc->malo_hwspecs.rxdesc_read,
1958177595Sweongyo	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
1959177595Sweongyo	    sc->malo_hwspecs.rxdesc_write,
1960177595Sweongyo	    malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
1961177595Sweongyo
1962177595Sweongyo	readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
1963177595Sweongyo	writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
1964177595Sweongyo	if (readptr == writeptr)
1965177595Sweongyo		return;
1966177595Sweongyo
1967177595Sweongyo	bf = sc->malo_rxnext;
1968178354Ssam	for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
1969177595Sweongyo		if (bf == NULL) {
1970177595Sweongyo			bf = STAILQ_FIRST(&sc->malo_rxbuf);
1971177595Sweongyo			break;
1972177595Sweongyo		}
1973177595Sweongyo		ds = bf->bf_desc;
1974177595Sweongyo		if (bf->bf_m == NULL) {
1975177595Sweongyo			/*
1976177595Sweongyo			 * If data allocation failed previously there
1977177595Sweongyo			 * will be no buffer; try again to re-populate it.
1978177595Sweongyo			 * Note the firmware will not advance to the next
1979177595Sweongyo			 * descriptor with a dma buffer so we must mimic
1980177595Sweongyo			 * this or we'll get out of sync.
1981177595Sweongyo			 */
1982177595Sweongyo			DPRINTF(sc, MALO_DEBUG_ANY,
1983177595Sweongyo			    "%s: rx buf w/o dma memory\n", __func__);
1984177595Sweongyo			(void)malo_rxbuf_init(sc, bf);
1985177595Sweongyo			break;
1986177595Sweongyo		}
1987177595Sweongyo		MALO_RXDESC_SYNC(sc, ds,
1988177595Sweongyo		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1989177595Sweongyo		if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
1990177595Sweongyo			break;
1991177595Sweongyo
1992177595Sweongyo		readptr = le32toh(ds->physnext);
1993177595Sweongyo
1994177595Sweongyo#ifdef MALO_DEBUG
1995177595Sweongyo		if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
1996177595Sweongyo			malo_printrxbuf(bf, 0);
1997177595Sweongyo#endif
1998177595Sweongyo		status = ds->status;
1999177595Sweongyo		if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
2000287197Sglebius			counter_u64_add(ic->ic_ierrors, 1);
2001177595Sweongyo			goto rx_next;
2002177595Sweongyo		}
2003177595Sweongyo		/*
2004177595Sweongyo		 * Sync the data buffer.
2005177595Sweongyo		 */
2006177595Sweongyo		len = le16toh(ds->pktlen);
2007177595Sweongyo		bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2008177595Sweongyo		    BUS_DMASYNC_POSTREAD);
2009177595Sweongyo		/*
2010177595Sweongyo		 * The 802.11 header is provided all or in part at the front;
2011177595Sweongyo		 * use it to calculate the true size of the header that we'll
2012177595Sweongyo		 * construct below.  We use this to figure out where to copy
2013177595Sweongyo		 * payload prior to constructing the header.
2014177595Sweongyo		 */
2015177595Sweongyo		m = bf->bf_m;
2016201758Smbr		data = mtod(m, uint8_t *);
2017177595Sweongyo		hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2018177595Sweongyo		off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2019177595Sweongyo
2020177595Sweongyo		/*
2021178354Ssam		 * Calculate RSSI. XXX wrong
2022177595Sweongyo		 */
2023177595Sweongyo		rssi = 2 * ((int) ds->snr - ds->nf);	/* NB: .5 dBm  */
2024177595Sweongyo		if (rssi > 100)
2025177595Sweongyo			rssi = 100;
2026177595Sweongyo
2027177595Sweongyo		pktlen = hdrlen + (len - off);
2028177595Sweongyo		/*
2029177595Sweongyo		 * NB: we know our frame is at least as large as
2030177595Sweongyo		 * IEEE80211_MIN_LEN because there is a 4-address frame at
2031177595Sweongyo		 * the front.  Hence there's no need to vet the packet length.
2032177595Sweongyo		 * If the frame in fact is too small it should be discarded
2033177595Sweongyo		 * at the net80211 layer.
2034177595Sweongyo		 */
2035177595Sweongyo
2036177595Sweongyo		/* XXX don't need mbuf, just dma buffer */
2037177595Sweongyo		mnew = malo_getrxmbuf(sc, bf);
2038177595Sweongyo		if (mnew == NULL) {
2039287197Sglebius			counter_u64_add(ic->ic_ierrors, 1);
2040177595Sweongyo			goto rx_next;
2041177595Sweongyo		}
2042177595Sweongyo		/*
2043177595Sweongyo		 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2044177595Sweongyo		 * re-setup the rx descriptor using the replacement dma
2045177595Sweongyo		 * buffer we just installed above.
2046177595Sweongyo		 */
2047177595Sweongyo		bf->bf_m = mnew;
2048177595Sweongyo		m->m_data += off - hdrlen;
2049177595Sweongyo		m->m_pkthdr.len = m->m_len = pktlen;
2050177595Sweongyo
2051177595Sweongyo		/*
2052177595Sweongyo		 * Piece 802.11 header together.
2053177595Sweongyo		 */
2054177595Sweongyo		wh = mtod(m, struct ieee80211_qosframe *);
2055177595Sweongyo		/* NB: don't need to do this sometimes but ... */
2056177595Sweongyo		/* XXX special case so we can memcpy after m_devget? */
2057177595Sweongyo		ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2058344969Savos		if (IEEE80211_QOS_HAS_SEQ(wh))
2059344969Savos			*(uint16_t *)ieee80211_getqos(wh) = ds->qosctrl;
2060192468Ssam		if (ieee80211_radiotap_active(ic)) {
2061177595Sweongyo			sc->malo_rx_th.wr_flags = 0;
2062177595Sweongyo			sc->malo_rx_th.wr_rate = ds->rate;
2063177595Sweongyo			sc->malo_rx_th.wr_antsignal = rssi;
2064177595Sweongyo			sc->malo_rx_th.wr_antnoise = ds->nf;
2065177595Sweongyo		}
2066177595Sweongyo#ifdef MALO_DEBUG
2067177595Sweongyo		if (IFF_DUMPPKTS_RECV(sc, wh)) {
2068177595Sweongyo			ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2069177595Sweongyo			    len, ds->rate, rssi);
2070177595Sweongyo		}
2071177595Sweongyo#endif
2072177595Sweongyo		/* dispatch */
2073177595Sweongyo		ni = ieee80211_find_rxnode(ic,
2074178354Ssam		    (struct ieee80211_frame_min *)wh);
2075178354Ssam		if (ni != NULL) {
2076192468Ssam			(void) ieee80211_input(ni, m, rssi, ds->nf);
2077178354Ssam			ieee80211_free_node(ni);
2078178354Ssam		} else
2079192468Ssam			(void) ieee80211_input_all(ic, m, rssi, ds->nf);
2080177595Sweongyorx_next:
2081177595Sweongyo		/* NB: ignore ENOMEM so we process more descriptors */
2082177595Sweongyo		(void) malo_rxbuf_init(sc, bf);
2083177595Sweongyo		bf = STAILQ_NEXT(bf, bf_list);
2084177595Sweongyo	}
2085177595Sweongyo
2086177595Sweongyo	malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2087177595Sweongyo	sc->malo_rxnext = bf;
2088177595Sweongyo
2089287197Sglebius	if (mbufq_first(&sc->malo_snd) != NULL)
2090287197Sglebius		malo_start(sc);
2091177595Sweongyo}
2092177595Sweongyo
2093177595Sweongyo/*
2094177595Sweongyo * Reclaim all tx queue resources.
2095177595Sweongyo */
2096177595Sweongyostatic void
2097177595Sweongyomalo_tx_cleanup(struct malo_softc *sc)
2098177595Sweongyo{
2099177595Sweongyo	int i;
2100177595Sweongyo
2101177595Sweongyo	for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2102177595Sweongyo		malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2103177595Sweongyo}
2104177595Sweongyo
2105177595Sweongyoint
2106177595Sweongyomalo_detach(struct malo_softc *sc)
2107177595Sweongyo{
2108287197Sglebius	struct ieee80211com *ic = &sc->malo_ic;
2109177595Sweongyo
2110287197Sglebius	malo_stop(sc);
2111177595Sweongyo
2112177595Sweongyo	if (sc->malo_tq != NULL) {
2113177595Sweongyo		taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2114177595Sweongyo		taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2115177595Sweongyo		taskqueue_free(sc->malo_tq);
2116177595Sweongyo		sc->malo_tq = NULL;
2117177595Sweongyo	}
2118177595Sweongyo
2119177595Sweongyo	/*
2120177595Sweongyo	 * NB: the order of these is important:
2121177595Sweongyo	 * o call the 802.11 layer before detaching the hal to
2122177595Sweongyo	 *   insure callbacks into the driver to delete global
2123177595Sweongyo	 *   key cache entries can be handled
2124177595Sweongyo	 * o reclaim the tx queue data structures after calling
2125177595Sweongyo	 *   the 802.11 layer as we'll get called back to reclaim
2126177595Sweongyo	 *   node state and potentially want to use them
2127177595Sweongyo	 * o to cleanup the tx queues the hal is called, so detach
2128177595Sweongyo	 *   it last
2129177595Sweongyo	 * Other than that, it's straightforward...
2130177595Sweongyo	 */
2131178354Ssam	ieee80211_ifdetach(ic);
2132199559Sjhb	callout_drain(&sc->malo_watchdog_timer);
2133177595Sweongyo	malo_dma_cleanup(sc);
2134177595Sweongyo	malo_tx_cleanup(sc);
2135177595Sweongyo	malo_hal_detach(sc->malo_mh);
2136287197Sglebius	mbufq_drain(&sc->malo_snd);
2137177595Sweongyo	MALO_LOCK_DESTROY(sc);
2138177595Sweongyo
2139177595Sweongyo	return 0;
2140177595Sweongyo}
2141177595Sweongyo
2142177595Sweongyovoid
2143177595Sweongyomalo_shutdown(struct malo_softc *sc)
2144177595Sweongyo{
2145287197Sglebius
2146287197Sglebius	malo_stop(sc);
2147177595Sweongyo}
2148177595Sweongyo
2149177595Sweongyovoid
2150177595Sweongyomalo_suspend(struct malo_softc *sc)
2151177595Sweongyo{
2152177595Sweongyo
2153287197Sglebius	malo_stop(sc);
2154177595Sweongyo}
2155177595Sweongyo
2156177595Sweongyovoid
2157177595Sweongyomalo_resume(struct malo_softc *sc)
2158177595Sweongyo{
2159177595Sweongyo
2160287197Sglebius	if (sc->malo_ic.ic_nrunning > 0)
2161177595Sweongyo		malo_init(sc);
2162177595Sweongyo}
2163