1/****************************************************************************** 2 3 Copyright (c) 2013-2019, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: stable/11/sys/dev/ixl/ixl.h 349163 2019-06-18 00:08:02Z erj $*/ 34 35 36#ifndef _IXL_H_ 37#define _IXL_H_ 38 39#include "opt_inet.h" 40#include "opt_inet6.h" 41#include "opt_rss.h" 42#include "opt_ixl.h" 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <sys/buf_ring.h> 47#include <sys/mbuf.h> 48#include <sys/protosw.h> 49#include <sys/socket.h> 50#include <sys/malloc.h> 51#include <sys/kernel.h> 52#include <sys/module.h> 53#include <sys/sockio.h> 54#include <sys/eventhandler.h> 55#include <sys/syslog.h> 56 57#include <net/if.h> 58#include <net/if_var.h> 59#include <net/if_arp.h> 60#include <net/bpf.h> 61#include <net/ethernet.h> 62#include <net/if_dl.h> 63#include <net/if_media.h> 64 65#include <net/bpf.h> 66#include <net/if_types.h> 67#include <net/if_vlan_var.h> 68 69#include <netinet/in_systm.h> 70#include <netinet/in.h> 71#include <netinet/if_ether.h> 72#include <netinet/ip.h> 73#include <netinet/ip6.h> 74#include <netinet/tcp.h> 75#include <netinet/tcp_lro.h> 76#include <netinet/udp.h> 77#include <netinet/sctp.h> 78 79#include <machine/in_cksum.h> 80 81#include <sys/bus.h> 82#include <machine/bus.h> 83#include <sys/rman.h> 84#include <machine/resource.h> 85#include <vm/vm.h> 86#include <vm/pmap.h> 87#include <machine/clock.h> 88#include <dev/pci/pcivar.h> 89#include <dev/pci/pcireg.h> 90#include <sys/proc.h> 91#include <sys/sysctl.h> 92#include <sys/endian.h> 93#include <sys/taskqueue.h> 94#include <sys/pcpu.h> 95#include <sys/smp.h> 96#include <sys/sbuf.h> 97#include <machine/smp.h> 98#include <machine/stdarg.h> 99 100#ifdef RSS 101#include <net/rss_config.h> 102#include <netinet/in_rss.h> 103#endif 104 105#include "i40e_type.h" 106#include "i40e_prototype.h" 107#include "i40e_dcb.h" 108 109#define MAC_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x" 110#define MAC_FORMAT_ARGS(mac_addr) \ 111 (mac_addr)[0], (mac_addr)[1], (mac_addr)[2], (mac_addr)[3], \ 112 (mac_addr)[4], (mac_addr)[5] 113#define ON_OFF_STR(is_set) ((is_set) ? "On" : "Off") 114 115#ifdef IXL_DEBUG 116 117#define _DBG_PRINTF(S, ...) printf("%s: " S "\n", __func__, ##__VA_ARGS__) 118#define _DEV_DBG_PRINTF(dev, S, ...) device_printf(dev, "%s: " S "\n", __func__, ##__VA_ARGS__) 119#define _IF_DBG_PRINTF(ifp, S, ...) if_printf(ifp, "%s: " S "\n", __func__, ##__VA_ARGS__) 120 121/* Defines for printing generic debug information */ 122#define DPRINTF(...) _DBG_PRINTF(__VA_ARGS__) 123#define DDPRINTF(...) _DEV_DBG_PRINTF(__VA_ARGS__) 124#define IDPRINTF(...) _IF_DBG_PRINTF(__VA_ARGS__) 125 126/* Defines for printing specific debug information */ 127#define DEBUG_INIT 1 128#define DEBUG_IOCTL 1 129#define DEBUG_HW 1 130 131#define INIT_DEBUGOUT(...) if (DEBUG_INIT) _DBG_PRINTF(__VA_ARGS__) 132#define INIT_DBG_DEV(...) if (DEBUG_INIT) _DEV_DBG_PRINTF(__VA_ARGS__) 133#define INIT_DBG_IF(...) if (DEBUG_INIT) _IF_DBG_PRINTF(__VA_ARGS__) 134 135#define IOCTL_DEBUGOUT(...) if (DEBUG_IOCTL) _DBG_PRINTF(__VA_ARGS__) 136#define IOCTL_DBG_IF2(ifp, S, ...) if (DEBUG_IOCTL) \ 137 if_printf(ifp, S "\n", ##__VA_ARGS__) 138#define IOCTL_DBG_IF(...) if (DEBUG_IOCTL) _IF_DBG_PRINTF(__VA_ARGS__) 139 140#define HW_DEBUGOUT(...) if (DEBUG_HW) _DBG_PRINTF(__VA_ARGS__) 141 142#else /* no IXL_DEBUG */ 143#define DEBUG_INIT 0 144#define DEBUG_IOCTL 0 145#define DEBUG_HW 0 146 147#define DPRINTF(...) 148#define DDPRINTF(...) 149#define IDPRINTF(...) 150 151#define INIT_DEBUGOUT(...) 152#define INIT_DBG_DEV(...) 153#define INIT_DBG_IF(...) 154#define IOCTL_DEBUGOUT(...) 155#define IOCTL_DBG_IF2(...) 156#define IOCTL_DBG_IF(...) 157#define HW_DEBUGOUT(...) 158#endif /* IXL_DEBUG */ 159 160enum ixl_dbg_mask { 161 IXL_DBG_INFO = 0x00000001, 162 IXL_DBG_EN_DIS = 0x00000002, 163 IXL_DBG_AQ = 0x00000004, 164 IXL_DBG_NVMUPD = 0x00000008, 165 166 IXL_DBG_IOCTL_KNOWN = 0x00000010, 167 IXL_DBG_IOCTL_UNKNOWN = 0x00000020, 168 IXL_DBG_IOCTL_ALL = 0x00000030, 169 170 I40E_DEBUG_RSS = 0x00000100, 171 172 IXL_DBG_IOV = 0x00001000, 173 IXL_DBG_IOV_VC = 0x00002000, 174 175 IXL_DBG_SWITCH_INFO = 0x00010000, 176 IXL_DBG_I2C = 0x00020000, 177 178 IXL_DBG_ALL = 0xFFFFFFFF 179}; 180 181/* Tunables */ 182 183/* 184 * Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the 185 * number of tx/rx descriptors allocated by the driver. Increasing this 186 * value allows the driver to queue more operations. 187 * 188 * Tx descriptors are always 16 bytes, but Rx descriptors can be 32 bytes. 189 * The driver currently always uses 32 byte Rx descriptors. 190 */ 191#define IXL_DEFAULT_RING 1024 192#define IXL_MAX_RING 4096 193#define IXL_MIN_RING 64 194#define IXL_RING_INCREMENT 32 195 196#define IXL_AQ_LEN 256 197#define IXL_AQ_LEN_MAX 1024 198 199/* 200** Default number of entries in Tx queue buf_ring. 201*/ 202#define DEFAULT_TXBRSZ 4096 203 204/* Alignment for rings */ 205#define DBA_ALIGN 128 206 207/* 208 * This is the max watchdog interval, ie. the time that can 209 * pass between any two TX clean operations, such only happening 210 * when the TX hardware is functioning. 211 * 212 * XXX: Watchdog currently counts down in units of (hz) 213 * Set this to just (hz) if you want queues to hang under a little bit of stress 214 */ 215#define IXL_WATCHDOG (10 * hz) 216 217/* 218 * This parameters control when the driver calls the routine to reclaim 219 * transmit descriptors. 220 */ 221#define IXL_TX_CLEANUP_THRESHOLD (que->num_tx_desc / 8) 222#define IXL_TX_OP_THRESHOLD (que->num_tx_desc / 32) 223 224#define MAX_MULTICAST_ADDR 128 225 226#define IXL_MSIX_BAR 3 227#define IXL_ADM_LIMIT 2 228#define IXL_TSO_SIZE 65535 229#define IXL_AQ_BUF_SZ ((u32) 4096) 230#define IXL_RX_HDR 128 231#define IXL_RX_LIMIT 512 232#define IXL_RX_ITR 0 233#define IXL_TX_ITR 1 234#define IXL_ITR_NONE 3 235#define IXL_QUEUE_EOL 0x7FF 236#define IXL_MAX_FRAME 9728 237#define IXL_MAX_TX_SEGS 8 238#define IXL_MAX_TSO_SEGS 128 239#define IXL_SPARSE_CHAIN 7 240#define IXL_QUEUE_HUNG 0x80000000 241#define IXL_MIN_TSO_MSS 64 242#define IXL_MAX_DMA_SEG_SIZE ((16 * 1024) - 1) 243 244#define IXL_RSS_KEY_SIZE_REG 13 245#define IXL_RSS_KEY_SIZE (IXL_RSS_KEY_SIZE_REG * 4) 246#define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ 247#define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F 248#define IXL_RSS_VF_LUT_ENTRY_MASK 0xF 249 250#define IXL_VF_MAX_BUFFER 0x3F80 251#define IXL_VF_MAX_HDR_BUFFER 0x840 252#define IXL_VF_MAX_FRAME 0x3FFF 253 254/* ERJ: hardware can support ~2k (SW5+) filters between all functions */ 255#define IXL_MAX_FILTERS 256 256#define IXL_MAX_TX_BUSY 10 257 258#define IXL_NVM_VERSION_LO_SHIFT 0 259#define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) 260#define IXL_NVM_VERSION_HI_SHIFT 12 261#define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) 262 263/* 264 * Interrupt Moderation parameters 265 * Multiply ITR values by 2 for real ITR value 266 */ 267#define IXL_MAX_ITR 0x0FF0 268#define IXL_ITR_100K 0x0005 269#define IXL_ITR_20K 0x0019 270#define IXL_ITR_8K 0x003E 271#define IXL_ITR_4K 0x007A 272#define IXL_ITR_1K 0x01F4 273#define IXL_ITR_DYNAMIC 0x8000 274#define IXL_LOW_LATENCY 0 275#define IXL_AVE_LATENCY 1 276#define IXL_BULK_LATENCY 2 277 278/* MacVlan Flags */ 279#define IXL_FILTER_USED (u16)(1 << 0) 280#define IXL_FILTER_VLAN (u16)(1 << 1) 281#define IXL_FILTER_ADD (u16)(1 << 2) 282#define IXL_FILTER_DEL (u16)(1 << 3) 283#define IXL_FILTER_MC (u16)(1 << 4) 284 285/* used in the vlan field of the filter when not a vlan */ 286#define IXL_VLAN_ANY -1 287 288#define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 289#define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6) 290#define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO) 291 292/* Misc flags for ixl_vsi.flags */ 293#define IXL_FLAGS_KEEP_TSO4 (1 << 0) 294#define IXL_FLAGS_KEEP_TSO6 (1 << 1) 295#define IXL_FLAGS_USES_MSIX (1 << 2) 296#define IXL_FLAGS_IS_VF (1 << 3) 297 298#define IXL_VSI_IS_PF(v) ((v->flags & IXL_FLAGS_IS_VF) == 0) 299#define IXL_VSI_IS_VF(v) ((v->flags & IXL_FLAGS_IS_VF) != 0) 300 301#define IXL_VF_RESET_TIMEOUT 100 302 303#define IXL_VSI_DATA_PORT 0x01 304 305#define IXLV_MAX_QUEUES 16 306#define IXL_MAX_VSI_QUEUES (2 * (I40E_VSILAN_QTABLE_MAX_INDEX + 1)) 307 308#define IXL_RX_CTX_BASE_UNITS 128 309#define IXL_TX_CTX_BASE_UNITS 128 310 311#define IXL_VPINT_LNKLSTN_REG(hw, vector, vf_num) \ 312 I40E_VPINT_LNKLSTN(((vector) - 1) + \ 313 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 314 315#define IXL_VFINT_DYN_CTLN_REG(hw, vector, vf_num) \ 316 I40E_VFINT_DYN_CTLN(((vector) - 1) + \ 317 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 318 319#define IXL_PF_PCI_CIAA_VF_DEVICE_STATUS 0xAA 320 321#define IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK 0x20 322 323#define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf) ((glb_vf) / 32) 324#define IXL_GLGEN_VFLRSTAT_MASK(glb_vf) (1 << ((glb_vf) % 32)) 325 326#define IXL_MAX_ITR_IDX 3 327 328#define IXL_END_OF_INTR_LNKLST 0x7FF 329 330#define IXL_DEFAULT_RSS_HENA_BASE (\ 331 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ 332 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ 333 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ 334 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ 335 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ 336 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ 337 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ 338 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ 339 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ 340 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ 341 BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) 342 343#define IXL_DEFAULT_RSS_HENA_XL710 IXL_DEFAULT_RSS_HENA_BASE 344 345#define IXL_DEFAULT_RSS_HENA_X722 (\ 346 IXL_DEFAULT_RSS_HENA_BASE | \ 347 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \ 348 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \ 349 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \ 350 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \ 351 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \ 352 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK)) 353 354#define IXL_TX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 355#define IXL_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 356#define IXL_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 357#define IXL_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->mtx) 358#define IXL_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 359 360#define IXL_RX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 361#define IXL_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 362#define IXL_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 363 364/* Pre-11 counter(9) compatibility */ 365#if __FreeBSD_version >= 1100036 366#define IXL_SET_IPACKETS(vsi, count) (vsi)->ipackets = (count) 367#define IXL_SET_IERRORS(vsi, count) (vsi)->ierrors = (count) 368#define IXL_SET_OPACKETS(vsi, count) (vsi)->opackets = (count) 369#define IXL_SET_OERRORS(vsi, count) (vsi)->oerrors = (count) 370#define IXL_SET_COLLISIONS(vsi, count) /* Do nothing; collisions is always 0. */ 371#define IXL_SET_IBYTES(vsi, count) (vsi)->ibytes = (count) 372#define IXL_SET_OBYTES(vsi, count) (vsi)->obytes = (count) 373#define IXL_SET_IMCASTS(vsi, count) (vsi)->imcasts = (count) 374#define IXL_SET_OMCASTS(vsi, count) (vsi)->omcasts = (count) 375#define IXL_SET_IQDROPS(vsi, count) (vsi)->iqdrops = (count) 376#define IXL_SET_OQDROPS(vsi, count) (vsi)->oqdrops = (count) 377#define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count) 378#else 379#define IXL_SET_IPACKETS(vsi, count) (vsi)->ifp->if_ipackets = (count) 380#define IXL_SET_IERRORS(vsi, count) (vsi)->ifp->if_ierrors = (count) 381#define IXL_SET_OPACKETS(vsi, count) (vsi)->ifp->if_opackets = (count) 382#define IXL_SET_OERRORS(vsi, count) (vsi)->ifp->if_oerrors = (count) 383#define IXL_SET_COLLISIONS(vsi, count) (vsi)->ifp->if_collisions = (count) 384#define IXL_SET_IBYTES(vsi, count) (vsi)->ifp->if_ibytes = (count) 385#define IXL_SET_OBYTES(vsi, count) (vsi)->ifp->if_obytes = (count) 386#define IXL_SET_IMCASTS(vsi, count) (vsi)->ifp->if_imcasts = (count) 387#define IXL_SET_OMCASTS(vsi, count) (vsi)->ifp->if_omcasts = (count) 388#define IXL_SET_IQDROPS(vsi, count) (vsi)->ifp->if_iqdrops = (count) 389#define IXL_SET_OQDROPS(vsi, odrops) (vsi)->ifp->if_snd.ifq_drops = (odrops) 390#define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count) 391#endif 392 393/* For stats sysctl naming */ 394#define IXL_QUEUE_NAME_LEN 32 395 396/* 397 ***************************************************************************** 398 * vendor_info_array 399 * 400 * This array contains the list of Subvendor/Subdevice IDs on which the driver 401 * should load. 402 * 403 ***************************************************************************** 404 */ 405typedef struct _ixl_vendor_info_t { 406 unsigned int vendor_id; 407 unsigned int device_id; 408 unsigned int subvendor_id; 409 unsigned int subdevice_id; 410 unsigned int index; 411} ixl_vendor_info_t; 412 413 414struct ixl_tx_buf { 415 u32 eop_index; 416 struct mbuf *m_head; 417 bus_dmamap_t map; 418 bus_dma_tag_t tag; 419}; 420 421struct ixl_rx_buf { 422 struct mbuf *m_head; 423 struct mbuf *m_pack; 424 struct mbuf *fmp; 425 bus_dmamap_t hmap; 426 bus_dmamap_t pmap; 427}; 428 429/* 430** This struct has multiple uses, multicast 431** addresses, vlans, and mac filters all use it. 432*/ 433struct ixl_mac_filter { 434 SLIST_ENTRY(ixl_mac_filter) next; 435 u8 macaddr[ETHER_ADDR_LEN]; 436 s16 vlan; 437 u16 flags; 438}; 439 440/* 441 * The Transmit ring control struct 442 */ 443struct tx_ring { 444 struct ixl_queue *que; 445 struct mtx mtx; 446 u32 tail; 447 struct i40e_tx_desc *base; 448 struct i40e_dma_mem dma; 449 u16 next_avail; 450 u16 next_to_clean; 451 u16 atr_rate; 452 u16 atr_count; 453 u32 itr; 454 u32 latency; 455 struct ixl_tx_buf *buffers; 456 volatile u16 avail; 457 u32 cmd; 458 bus_dma_tag_t tx_tag; 459 bus_dma_tag_t tso_tag; 460 char mtx_name[16]; 461 struct buf_ring *br; 462 s32 watchdog_timer; 463 464 /* Used for Dynamic ITR calculation */ 465 u32 packets; 466 u32 bytes; 467 468 /* Soft Stats */ 469 u64 tx_bytes; 470 u64 no_desc; 471 u64 total_packets; 472}; 473 474 475/* 476 * The Receive ring control struct 477 */ 478struct rx_ring { 479 struct ixl_queue *que; 480 struct mtx mtx; 481 union i40e_rx_desc *base; 482 struct i40e_dma_mem dma; 483 struct lro_ctrl lro; 484 bool lro_enabled; 485 bool hdr_split; 486 bool discard; 487 u32 next_refresh; 488 u32 next_check; 489 u32 itr; 490 u32 latency; 491 char mtx_name[16]; 492 struct ixl_rx_buf *buffers; 493 u32 mbuf_sz; 494 u32 tail; 495 bus_dma_tag_t htag; 496 bus_dma_tag_t ptag; 497 498 /* Used for Dynamic ITR calculation */ 499 u32 packets; 500 u32 bytes; 501 502 /* Soft stats */ 503 u64 split; 504 u64 rx_packets; 505 u64 rx_bytes; 506 u64 desc_errs; 507 u64 not_done; 508}; 509 510/* 511** Driver queue struct: this is the interrupt container 512** for the associated tx and rx ring pair. 513*/ 514struct ixl_queue { 515 struct ixl_vsi *vsi; 516 u32 me; 517 u32 msix; /* This queue's MSIX vector */ 518 u32 eims; /* This queue's EIMS bit */ 519 struct resource *res; 520 void *tag; 521 int num_tx_desc; /* both tx and rx */ 522 int num_rx_desc; /* both tx and rx */ 523 struct tx_ring txr; 524 struct rx_ring rxr; 525 struct task task; 526 struct task tx_task; 527 struct taskqueue *tq; 528 529 /* Queue stats */ 530 u64 irqs; 531 u64 tso; 532 u64 mbuf_defrag_failed; 533 u64 mbuf_hdr_failed; 534 u64 mbuf_pkt_failed; 535 u64 tx_dmamap_failed; 536 u64 dropped_pkts; 537 u64 mss_too_small; 538}; 539 540/* 541** Virtual Station Interface 542*/ 543SLIST_HEAD(ixl_ftl_head, ixl_mac_filter); 544struct ixl_vsi { 545 void *back; 546 struct ifnet *ifp; 547 struct device *dev; 548 struct i40e_hw *hw; 549 struct ifmedia media; 550 enum i40e_vsi_type type; 551 int id; 552 u16 num_queues; 553 int num_tx_desc; 554 int num_rx_desc; 555 u32 rx_itr_setting; 556 u32 tx_itr_setting; 557 u16 max_frame_size; 558 bool enable_head_writeback; 559 560 struct ixl_queue *queues; /* head of queues */ 561 562 u16 vsi_num; 563 bool link_active; 564 u16 seid; 565 u16 uplink_seid; 566 u16 downlink_seid; 567 568 /* MAC/VLAN Filter list */ 569 struct ixl_ftl_head ftl; 570 u16 num_macs; 571 u64 num_hw_filters; 572 573 /* Contains readylist & stat counter id */ 574 struct i40e_aqc_vsi_properties_data info; 575 576 eventhandler_tag vlan_attach; 577 eventhandler_tag vlan_detach; 578 u16 num_vlans; 579 580 /* Per-VSI stats from hardware */ 581 struct i40e_eth_stats eth_stats; 582 struct i40e_eth_stats eth_stats_offsets; 583 bool stat_offsets_loaded; 584 /* VSI stat counters */ 585 u64 ipackets; 586 u64 ierrors; 587 u64 opackets; 588 u64 oerrors; 589 u64 ibytes; 590 u64 obytes; 591 u64 imcasts; 592 u64 omcasts; 593 u64 iqdrops; 594 u64 oqdrops; 595 u64 noproto; 596 597 /* Misc. */ 598 u64 flags; 599 struct sysctl_oid *vsi_node; 600 struct sysctl_ctx_list sysctl_ctx; 601}; 602 603/* 604** Find the number of unrefreshed RX descriptors 605*/ 606static inline u16 607ixl_rx_unrefreshed(struct ixl_queue *que) 608{ 609 struct rx_ring *rxr = &que->rxr; 610 611 if (rxr->next_check > rxr->next_refresh) 612 return (rxr->next_check - rxr->next_refresh - 1); 613 else 614 return ((que->num_rx_desc + rxr->next_check) - 615 rxr->next_refresh - 1); 616} 617 618/* 619** Find the next available unused filter 620*/ 621static inline struct ixl_mac_filter * 622ixl_get_filter(struct ixl_vsi *vsi) 623{ 624 struct ixl_mac_filter *f; 625 626 /* create a new empty filter */ 627 f = malloc(sizeof(struct ixl_mac_filter), 628 M_DEVBUF, M_NOWAIT | M_ZERO); 629 if (f) 630 SLIST_INSERT_HEAD(&vsi->ftl, f, next); 631 632 return (f); 633} 634 635/* 636** Compare two ethernet addresses 637*/ 638static inline bool 639cmp_etheraddr(const u8 *ea1, const u8 *ea2) 640{ 641 bool cmp = FALSE; 642 643 if ((ea1[0] == ea2[0]) && (ea1[1] == ea2[1]) && 644 (ea1[2] == ea2[2]) && (ea1[3] == ea2[3]) && 645 (ea1[4] == ea2[4]) && (ea1[5] == ea2[5])) 646 cmp = TRUE; 647 648 return (cmp); 649} 650 651/* 652 * Return next largest power of 2, unsigned 653 * 654 * Public domain, from Bit Twiddling Hacks 655 */ 656static inline u32 657next_power_of_two(u32 n) 658{ 659 n--; 660 n |= n >> 1; 661 n |= n >> 2; 662 n |= n >> 4; 663 n |= n >> 8; 664 n |= n >> 16; 665 n++; 666 667 /* Next power of two > 0 is 1 */ 668 n += (n == 0); 669 670 return (n); 671} 672 673/* 674 * Info for stats sysctls 675 */ 676struct ixl_sysctl_info { 677 u64 *stat; 678 char *name; 679 char *description; 680}; 681 682extern const uint8_t ixl_bcast_addr[ETHER_ADDR_LEN]; 683 684/********************************************************************* 685 * TXRX Function prototypes 686 *********************************************************************/ 687int ixl_allocate_tx_data(struct ixl_queue *); 688int ixl_allocate_rx_data(struct ixl_queue *); 689void ixl_init_tx_ring(struct ixl_queue *); 690int ixl_init_rx_ring(struct ixl_queue *); 691bool ixl_rxeof(struct ixl_queue *, int); 692bool ixl_txeof(struct ixl_queue *); 693void ixl_free_que_tx(struct ixl_queue *); 694void ixl_free_que_rx(struct ixl_queue *); 695 696int ixl_mq_start(struct ifnet *, struct mbuf *); 697int ixl_mq_start_locked(struct ifnet *, struct tx_ring *); 698void ixl_deferred_mq_start(void *, int); 699 700void ixl_add_sysctls_eth_stats(struct sysctl_ctx_list *, struct sysctl_oid_list *, 701 struct i40e_eth_stats *); 702void ixl_vsi_add_queues_stats(struct ixl_vsi *); 703void ixl_vsi_setup_rings_size(struct ixl_vsi *, int, int); 704int ixl_queue_hang_check(struct ixl_vsi *); 705void ixl_free_vsi(struct ixl_vsi *); 706void ixl_qflush(struct ifnet *); 707 708/* Common function prototypes between PF/VF driver */ 709#if __FreeBSD_version >= 1100000 710uint64_t ixl_get_counter(if_t ifp, ift_counter cnt); 711#endif 712void ixl_get_default_rss_key(u32 *); 713const char * i40e_vc_stat_str(struct i40e_hw *hw, 714 enum virtchnl_status_code stat_err); 715void ixl_set_busmaster(device_t); 716void ixl_set_msix_enable(device_t); 717#endif /* _IXL_H_ */ 718