ixgbe_common.h revision 247822
1/****************************************************************************** 2 3 Copyright (c) 2001-2013, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_common.h 247822 2013-03-04 23:07:40Z jfv $*/ 34 35#ifndef _IXGBE_COMMON_H_ 36#define _IXGBE_COMMON_H_ 37 38#include "ixgbe_type.h" 39#define IXGBE_WRITE_REG64(hw, reg, value) \ 40 do { \ 41 IXGBE_WRITE_REG(hw, reg, (u32) value); \ 42 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \ 43 } while (0) 44#if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW) 45struct ixgbe_pba { 46 u16 word[2]; 47 u16 *pba_block; 48}; 49#endif 50 51u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 52s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 53s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 54s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 55s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw); 56s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 57s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num); 58s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 59 u32 pba_num_size); 60s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf, 61 u32 eeprom_buf_size, u16 max_pba_block_size, 62 struct ixgbe_pba *pba); 63s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf, 64 u32 eeprom_buf_size, struct ixgbe_pba *pba); 65s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf, 66 u32 eeprom_buf_size, u16 *pba_block_size); 67s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 68s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); 69void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); 70s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); 71 72s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); 73s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); 74 75s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); 76s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 77s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 78 u16 words, u16 *data); 79s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); 80s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, 81 u16 words, u16 *data); 82s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 83s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, 84 u16 words, u16 *data); 85s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 86 u16 *data); 87s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 88 u16 words, u16 *data); 89u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 90s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 91 u16 *checksum_val); 92s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 93s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); 94 95s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 96 u32 enable_addr); 97s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 98s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 99s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, 100 u32 mc_addr_count, 101 ixgbe_mc_addr_itr func, bool clear); 102s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, 103 u32 addr_count, ixgbe_mc_addr_itr func); 104s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 105s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 106s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 107s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw); 108s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw); 109 110s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); 111s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); 112void ixgbe_fc_autoneg(struct ixgbe_hw *hw); 113 114s32 ixgbe_validate_mac_addr(u8 *mac_addr); 115s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); 116void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask); 117s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); 118 119s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); 120s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); 121 122s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 123s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 124 125s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 126s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); 127s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 128s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); 129s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 130s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 131 u32 vind, bool vlan_on); 132s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, 133 bool vlan_on, bool *vfta_changed); 134s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 135s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan); 136 137s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 138 ixgbe_link_speed *speed, 139 bool *link_up, bool link_up_wait_to_complete); 140 141s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 142 u16 *wwpn_prefix); 143 144s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); 145void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf); 146void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 147s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); 148void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, 149 int strategy); 150void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw); 151s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 152 u8 build, u8 ver); 153u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); 154s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, 155 u32 length); 156void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); 157 158extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw); 159 160#endif /* IXGBE_COMMON */ 161