ixgbe_api.h revision 292674 
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32******************************************************************************/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_api.h 292674 2015-12-23 22:45:17Z sbruno $*/
34
35#ifndef _IXGBE_API_H_
36#define _IXGBE_API_H_
37
38#include "ixgbe_type.h"
39
40void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map);
41
42s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
43
44extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
45extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
46extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
47extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
48extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
49extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
50
51s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
52s32 ixgbe_init_hw(struct ixgbe_hw *hw);
53s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
54s32 ixgbe_start_hw(struct ixgbe_hw *hw);
55void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
56s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
57enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
58s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
59s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
60u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
61u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
62s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
63s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
64s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
65
66s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
67s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
68s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
69		       u16 *phy_data);
70s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
71			u16 phy_data);
72
73s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
74s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw);
75s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
76			 ixgbe_link_speed *speed,
77			 bool *link_up);
78s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
79			       ixgbe_link_speed speed,
80			       bool autoneg_wait_to_complete);
81s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on);
82void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
83void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
84void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
85s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
86		     bool autoneg_wait_to_complete);
87s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
88			 bool autoneg_wait_to_complete);
89s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
90		     bool *link_up, bool link_up_wait_to_complete);
91s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
92				bool *autoneg);
93s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
94s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
95s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
96s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
97
98s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
99s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
100s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
101			      u16 words, u16 *data);
102s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
103s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
104			     u16 words, u16 *data);
105
106s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
107s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
108
109s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
110s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
111		  u32 enable_addr);
112s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
113s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
114s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
115s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
116s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
117u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
118s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
119			      u32 addr_count, ixgbe_mc_addr_itr func);
120s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
121			      u32 mc_addr_count, ixgbe_mc_addr_itr func,
122			      bool clear);
123void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
124s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
125s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
126s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
127s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
128		   u32 vind, bool vlan_on);
129s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
130		   bool vlan_on, bool *vfta_changed);
131s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
132s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
133s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
134			 u8 ver);
135void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
136s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
137				   u16 *firmware_version);
138s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
139s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
140s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
141s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
142u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
143s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
144s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);
145s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);
146s32 ixgbe_mng_fw_enabled(struct ixgbe_hw *hw);
147s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
148s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
149s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
150					bool cloud_mode);
151void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
152					   union ixgbe_atr_hash_dword input,
153					   union ixgbe_atr_hash_dword common,
154					   u8 queue);
155s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
156				    union ixgbe_atr_input *input_mask, bool cloud_mode);
157s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
158					  union ixgbe_atr_input *input,
159					  u16 soft_id, u8 queue, bool cloud_mode);
160s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
161					  union ixgbe_atr_input *input,
162					  u16 soft_id);
163s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
164					union ixgbe_atr_input *input,
165					union ixgbe_atr_input *mask,
166					u16 soft_id,
167					u8 queue,
168					bool cloud_mode);
169void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
170					  union ixgbe_atr_input *mask);
171u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
172				     union ixgbe_atr_hash_dword common);
173bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
174s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
175			u8 *data);
176s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
177				 u8 dev_addr, u8 *data);
178s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
179s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
180				     u16 *val);
181s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
182			 u8 data);
183void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
184s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
185				  u8 dev_addr, u8 data);
186s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
187s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
188				      u16 val);
189s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
190s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
191s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
192s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
193s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
194void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
195s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
196			 u16 *wwpn_prefix);
197s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
198s32 ixgbe_dmac_config(struct ixgbe_hw *hw);
199s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw);
200s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw);
201s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee);
202void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
203				      unsigned int vf);
204void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable,
205				       int vf);
206s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
207			u32 device_type, u32 *phy_data);
208s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
209			u32 device_type, u32 phy_data);
210void ixgbe_disable_mdd(struct ixgbe_hw *hw);
211void ixgbe_enable_mdd(struct ixgbe_hw *hw);
212void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
213void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
214s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);
215s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);
216void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);
217void ixgbe_disable_rx(struct ixgbe_hw *hw);
218void ixgbe_enable_rx(struct ixgbe_hw *hw);
219
220#endif /* _IXGBE_API_H_ */
221